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Sun, 01 Feb 2026 23:52:50 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 08:52:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN PATCH] xen: add paddings after bitmap section in LLVM coverage profile To: Wentao Zhang Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org, samaan.dehghan@gmail.com References: <71775ef5c267b3888ddf3e4a55bdb5914cf1f890.1766228666.git.zhangwt1997@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <71775ef5c267b3888ddf3e4a55bdb5914cf1f890.1766228666.git.zhangwt1997@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Since you ping-ed the patch, I'll give some comments, albeit I wouldn't feel qualified to eventually ack the change. On 20.12.2025 12:22, Wentao Zhang wrote: > The layout of LLVM coverage profile is like > > header > data section > (padding #1) > counter section > (padding #2) > bitmap section > (padding #3) > name section > (padding #4) > > Padding areas #1 and #2 are always zeroed on 64-bit platforms, How does zeroing (or not) matter when size is what is of interest? > but that > is not the case for padding area #3 and #4. See LLVM docs [1] and > compiler-rt's own version of "get_size()" [2]. > > The implementation in 08c787f "xen: Enable MC/DC coverage for Clang" > partly considers padding #4 in get_size() but not in dump(). It worked > because in the header .padding_bytes_after_bitmap_bytes is also > initialized to zero so a reader may still know how to parse the profile. > But we should probably not base ourselves on such assumption. Instead > let's be as close as possible to hosted environment generated profiles, > i.e. those generated by compiler-rt. > > In this patch, get_size() implementation is mathematically the same but > changed to reflect the layout somewhat better. For dump(), padding #4 is > added both in the header and in the payload. #4 is after the name section as per the description at the top, yet code you add in dump() is to set / use the .padding_bytes_after_bitmap_bytes field. That's #3 as per above, though. > --- a/xen/common/coverage/llvm.c > +++ b/xen/common/coverage/llvm.c > @@ -141,11 +141,11 @@ static void cf_check reset_counters(void) > > static uint32_t cf_check get_size(void) > { > - uint32_t size = ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA + > - END_COUNTERS - START_COUNTERS + END_NAMES - START_NAMES, 8); > - if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) ) > - size += ROUNDUP(END_BITMAP - START_BITMAP, 8); > - return size; > + return sizeof(struct llvm_profile_header) + > + END_DATA - START_DATA + > + END_COUNTERS - START_COUNTERS + > + ROUNDUP(END_BITMAP - START_BITMAP, 8) + > + ROUNDUP(END_NAMES - START_NAMES, 8); > } Where are these 8-s and ... > @@ -167,6 +167,7 @@ static int cf_check dump( > #if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9 > .num_bitmap_bytes = END_BITMAP - START_BITMAP, > .bitmap_delta = START_BITMAP - START_DATA, > + .padding_bytes_after_bitmap_bytes = (-(END_BITMAP - START_BITMAP)) & 7, ... this 7 coming from? All I can find in your [1] reference is "Sections might be padded to meet specific alignment requirements. For simplicity, header fields and data sections solely for padding purposes are omitted in the data layout graph above and the rest of this document." No other hit when searching for "pad" or "align" in that doc. Unrelated to your change but relevant for understanding: I also can't seem to be able to figure out where the various __{start,stop}___llvm_prf_*[] symbols are coming from. It doesn't look to be our linker script: The LLVM_COV_{RW,RO}_DATA macros both don't define any symbols. If they did, I would have asked whether the alignment needs couldn't be accounted for there. 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Mon, 02 Feb 2026 00:51:17 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 09:51:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/6] x86/PCI: avoid re-evaluation of extended config space accessibility From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.01.2026 14:10, Jan Beulich wrote: > @@ -160,10 +161,13 @@ int pci_mmcfg_arch_enable(unsigned int i > return 0; > } > > -void pci_mmcfg_arch_disable(unsigned int idx) > +int pci_mmcfg_arch_disable(unsigned int idx) > { > const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; > > + if ( !pci_mmcfg_virt[idx].virt ) > + return 1; Afaict this is what causes CI (adl-*) to say no here: (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- (XEN) [ 4.132700] CPU: 12 (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a (XEN) [ 4.132816] Xen call trace: (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 (XEN) [ 4.132847] (XEN) [ 4.132848] Pagetable walk from ffff808000300100: (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff There is an important comment in pci_mmcfg_arch_disable(): /* * Don't use destroy_xen_mappings() here, or make sure that at least * the necessary L4 entries get populated (so that they get properly * propagated to guest domains' page tables). */ Hence it is wrong to bypass mcfg_ioremap(cfg, idx, 0); . v4 coming. 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> > } > > > > -void pci_mmcfg_arch_disable(unsigned int idx) > > +int pci_mmcfg_arch_disable(unsigned int idx) > > { > > const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; > > > > + if ( !pci_mmcfg_virt[idx].virt ) > > + return 1; > > Afaict this is what causes CI (adl-*) to say no here: > > (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff > (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 4.132700] CPU: 12 > (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 > (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) > (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 > (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec > (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 > (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 > (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c > (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 > (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 > (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 > (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 > (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): > (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 > (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: > (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 > (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 > (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 > (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b > (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 > (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef > (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba > (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 > (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 > (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 > (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 > (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 > (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 > (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 > (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 > (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 > (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 > (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 > (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 > (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a > (XEN) [ 4.132816] Xen call trace: > (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 > (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e > (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b > (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 > (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 > (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 > (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 > (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 > (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 > (XEN) [ 4.132847] > (XEN) [ 4.132848] Pagetable walk from ffff808000300100: > (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff > > There is an important comment in pci_mmcfg_arch_disable(): > > /* > * Don't use destroy_xen_mappings() here, or make sure that at least > * the necessary L4 entries get populated (so that they get properly > * propagated to guest domains' page tables). > */ > > Hence it is wrong to bypass > > mcfg_ioremap(cfg, idx, 0); Hm, I see. The L4 slot must be unconditionally populated before we clone the idle page-table, otherwise the mappings won't propagate. What about unconditionally populating the L4 slot in subarch_init_memory()? That seems less fragile than doing it in pci_mmcfg_arch_disable(). Thanks, Roger. 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Mon, 02 Feb 2026 01:14:57 -0800 (PST) Message-ID: <0873c6e6-eac9-4d9a-bde0-347050b1547e@suse.com> Date: Mon, 2 Feb 2026 10:14:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/6] PCI: determine whether a device has extended config space From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: <99d45a27-ce67-4f10-9883-dba96f055285@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <99d45a27-ce67-4f10-9883-dba96f055285@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.01.2026 14:08, Jan Beulich wrote: > @@ -1042,6 +1053,79 @@ enum pdev_type pdev_type(u16 seg, u8 bus > return pos ? DEV_TYPE_PCIe_ENDPOINT : DEV_TYPE_PCI; > } > > +void pci_check_extcfg(struct pci_dev *pdev) > +{ > + unsigned int pos; > + > + pdev->ext_cfg = false; > + > + switch ( pdev->type ) > + { > + case DEV_TYPE_PCIe_ENDPOINT: > + case DEV_TYPE_PCIe_BRIDGE: > + case DEV_TYPE_PCI_HOST_BRIDGE: > + case DEV_TYPE_PCIe2PCI_BRIDGE: > + case DEV_TYPE_PCI2PCIe_BRIDGE: > + break; > + > + case DEV_TYPE_LEGACY_PCI_BRIDGE: > + case DEV_TYPE_PCI: > + pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_PCIX); > + if ( !pos || > + !(pci_conf_read32(pdev->sbdf, pos + PCI_X_STATUS) & > + (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)) ) To not violate Misra rule 7.2 I'll fold in the change below. I guess I'll further follow up with a patch adjusting other problematic #define-s in that header, too. Jan --- a/xen/include/xen/pci_regs.h +++ b/xen/include/xen/pci_regs.h @@ -382,7 +382,7 @@ #define PCI_X_STATUS_MAX_CUM 0x1c000000 /* Designed Max Cumulative Read Size */ #define PCI_X_STATUS_SPL_ERR 0x20000000 /* Rcvd Split Completion Error Msg */ #define PCI_X_STATUS_266MHZ 0x40000000 /* 266 MHz capable */ -#define PCI_X_STATUS_533MHZ 0x80000000 /* 533 MHz capable */ +#define PCI_X_STATUS_533MHZ 0x80000000U /* 533 MHz capable */ /* PCI Express capability registers */ From xen-devel-bounces@lists.xenproject.org Mon Feb 02 09:21:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 09:21:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218439.1527180 (Exim 4.92) (envelope-from ) id 1vmq7d-0004so-Cy; Mon, 02 Feb 2026 09:21:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218439.1527180; Mon, 02 Feb 2026 09:21:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmq7d-0004sh-9q; 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DEV_TYPE_PCIe_ENDPOINT : DEV_TYPE_PCI; > > } > > > > +void pci_check_extcfg(struct pci_dev *pdev) > > +{ > > + unsigned int pos; > > + > > + pdev->ext_cfg = false; > > + > > + switch ( pdev->type ) > > + { > > + case DEV_TYPE_PCIe_ENDPOINT: > > + case DEV_TYPE_PCIe_BRIDGE: > > + case DEV_TYPE_PCI_HOST_BRIDGE: > > + case DEV_TYPE_PCIe2PCI_BRIDGE: > > + case DEV_TYPE_PCI2PCIe_BRIDGE: > > + break; > > + > > + case DEV_TYPE_LEGACY_PCI_BRIDGE: > > + case DEV_TYPE_PCI: > > + pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_PCIX); > > + if ( !pos || > > + !(pci_conf_read32(pdev->sbdf, pos + PCI_X_STATUS) & > > + (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)) ) > > To not violate Misra rule 7.2 I'll fold in the change below. I guess I'll > further follow up with a patch adjusting other problematic #define-s in > that header, too. I'm fine if you want to do a pre-patch fixing all the problematic defines in the header and put it ahead of the series. Maybe it makes more sense to fix them all in a single commit than fixing one here and the rest separately? Thanks, Roger. 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Mon, 02 Feb 2026 01:30:28 -0800 (PST) Message-ID: <1bcdd2dd-9b2b-4eb2-a569-e28b03c1e1fb@suse.com> Date: Mon, 2 Feb 2026 10:30:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/6] x86/PCI: avoid re-evaluation of extended config space accessibility To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Stewart Hildebrand References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 10:14, Roger Pau Monné wrote: > On Mon, Feb 02, 2026 at 09:51:18AM +0100, Jan Beulich wrote: >> On 29.01.2026 14:10, Jan Beulich wrote: >>> @@ -160,10 +161,13 @@ int pci_mmcfg_arch_enable(unsigned int i >>> return 0; >>> } >>> >>> -void pci_mmcfg_arch_disable(unsigned int idx) >>> +int pci_mmcfg_arch_disable(unsigned int idx) >>> { >>> const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; >>> >>> + if ( !pci_mmcfg_virt[idx].virt ) >>> + return 1; >> >> Afaict this is what causes CI (adl-*) to say no here: >> >> (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff >> (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- >> (XEN) [ 4.132700] CPU: 12 >> (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 >> (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) >> (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 >> (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec >> (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 >> (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 >> (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c >> (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 >> (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 >> (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 >> (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 >> (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): >> (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 >> (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: >> (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 >> (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 >> (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 >> (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b >> (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 >> (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef >> (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba >> (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 >> (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 >> (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 >> (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 >> (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 >> (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 >> (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 >> (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 >> (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 >> (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 >> (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 >> (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 >> (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a >> (XEN) [ 4.132816] Xen call trace: >> (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 >> (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e >> (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b >> (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 >> (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 >> (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 >> (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 >> (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 >> (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 >> (XEN) [ 4.132847] >> (XEN) [ 4.132848] Pagetable walk from ffff808000300100: >> (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff >> >> There is an important comment in pci_mmcfg_arch_disable(): >> >> /* >> * Don't use destroy_xen_mappings() here, or make sure that at least >> * the necessary L4 entries get populated (so that they get properly >> * propagated to guest domains' page tables). >> */ >> >> Hence it is wrong to bypass >> >> mcfg_ioremap(cfg, idx, 0); > > Hm, I see. The L4 slot must be unconditionally populated before we > clone the idle page-table, otherwise the mappings won't propagate. > > What about unconditionally populating the L4 slot in > subarch_init_memory()? That seems less fragile than doing it in > pci_mmcfg_arch_disable(). Less fragile - perhaps. Yet I don't see why we should populate the field if we wouldn't ever need it. Of course with violating layering some, we could know in subarch_init_memory(), as pci_setup() runs earlier. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 02 09:57:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 09:57:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218461.1527204 (Exim 4.92) (envelope-from ) id 1vmqgT-0001Z4-RW; Mon, 02 Feb 2026 09:57:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218461.1527204; Mon, 02 Feb 2026 09:57:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqgT-0001YC-Od; Mon, 02 Feb 2026 09:57:29 +0000 Received: by outflank-mailman (input) for mailman id 1218461; Mon, 02 Feb 2026 09:52:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqbB-0001Il-Vv for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 09:52:01 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d121b1ab-001c-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 10:51:59 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 18:51:38 +0900 Received: from unknown (HELO [127.0.1.1]) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP; 02 Feb 2026 18:51:38 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d121b1ab-001c-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770025920; x=1801561920; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=4/LXZGnNgY5t+nsrdXbfktyTBcde00tw0WwNVU5EQeQ=; b=nI6A7Ytwa1+zLh8IWECSnhLfuTcw4lqBn+HE9NyTzMST2ejWcv/0885i bTphFfjN08hVCUeoZAOE0EzeJREtl4uhiNSonsGqcqWEDvSz3lSXyl9il kCroDYD+AJfjEwynf9Os7NyNE4mOmUWHbpB8KhpFljpEoQbSqMerrIh04 AaQqpxAFGmxeBvSlpT0xL/QFwy8O0wGOZm9RTvk3W33wtQp+XJTOobQCv ez1PLsvIjuQ9BBALQdp0icSXXp7Vu6xil43egXNmHWYY/7WgCtdDnY9fZ l9V+C4CXNxlWqVzJ8EDWE4beYS17MnLNWhTjezCZmv9yyV7GDK60pIxfR g==; X-IronPort-AV: E=Sophos;i="6.21,268,1763391600"; d="scan'208";a="607384935" From: Shashank Balaji Date: Mon, 02 Feb 2026 18:51:02 +0900 Subject: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> In-Reply-To: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird , stable@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1476; i=shashank.mahadasyam@sony.com; h=from:subject:message-id; bh=paULGXp6rwtbR4pGaBXqE9RYtLD7iRkEUs2lKCF5e4o=; b=owGbwMvMwCU2bX1+URVTXyjjabUkhsyG4hUGCzw4VzFOfPGnVC7+kcNGzhiLW3NYOT9WyZ0Rv y9psSK2o5SFQYyLQVZMkaVUqfrX3hVBS3rOvFaEmcPKBDKEgYtTACaytoXhv9Nrfese5QfJMkqT Qxp2Whn+q/TjDzf7xqHB/8O9W3/eVob/iW1Xy2aecbmXM6u73+ju1V8pak2+7/wsF/ZYNW4wOtz NCwA= X-Developer-Key: i=shashank.mahadasyam@sony.com; a=openpgp; fpr=75227BFABDA852A48CCCEB2196AF6F727A028E55 In lapic_resume, ensure x2apic is actually disabled when the kernel expects it to be disabled, i.e. when x2apic_mode = 0. x2apic_mode is set to 0 and x2apic is disabled on boot if the kernel doesn't support irq remapping or for other reasons. On resume from s2ram (/sys/power/mem_sleep = deep), firmware can re-enable x2apic, but the kernel continues using the xapic interface because it didn't check to see if someone enabled x2apic behind its back, which causes hangs. This situation happens on defconfig + bare metal + s2ram, on which this fix has been tested. Fixes: 6e1cb38a2aef ("x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping") Cc: stable@vger.kernel.org Co-developed-by: Rahul Bukte Signed-off-by: Rahul Bukte Signed-off-by: Shashank Balaji --- arch/x86/kernel/apic/apic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index d93f87f29d03..cc64d61f82cf 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2456,6 +2456,12 @@ static void lapic_resume(void *data) if (x2apic_mode) { __x2apic_enable(); } else { + /* + * x2apic may have been re-enabled by the + * firmware on resuming from s2ram + */ + __x2apic_disable(); + /* * Make sure the APICBASE points to the right address * -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 09:57:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 09:57:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218465.1527216 (Exim 4.92) (envelope-from ) id 1vmqgU-0001iM-CZ; Mon, 02 Feb 2026 09:57:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218465.1527216; Mon, 02 Feb 2026 09:57:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqgU-0001hX-8T; Mon, 02 Feb 2026 09:57:30 +0000 Received: by outflank-mailman (input) for mailman id 1218465; Mon, 02 Feb 2026 09:52:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqbH-0001Jw-EQ for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 09:52:07 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d14876f9-001c-11f1-b161-2bf370ae4941; Mon, 02 Feb 2026 10:52:02 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 18:51:38 +0900 Received: from unknown (HELO [127.0.1.1]) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP; 02 Feb 2026 18:51:38 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d14876f9-001c-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770025922; x=1801561922; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=GI9OPx+uxZW/9+u+5es0pePWKf46Zy6n4IWktANHhfk=; b=e0byH80zs8rrbQ+SG/yAl5pVranguTJiTv2KWDsjEGqSkO0OssSgf3fK xLzgSY2byQDmZEO4/gMmtjRIcIrv2X6uzjUHJw77nRIxKz6zZi3K55kuO 38sboMnzWKGwEVC0Zp2KqjPEJLlHec1DN8AtGEPooANNGGJtI6coTmKye 5hIKBQTElzNhrXwgQOfvEpHM1OIIwfjdq1yl7+F60z6UYNgiQVOQnwjXj TvdVB5woj9IHUULn1vhdFdW7zWl1CVTL6qjcg2C/PMXGBcbnYXMGpbUti HU5HUQYXh7YyUpPOeZeRJyOI/VdGYcQrYiwlb3Do/Hh/Ox5hYn8ib/1Vc w==; X-IronPort-AV: E=Sophos;i="6.21,268,1763391600"; d="scan'208";a="607384937" From: Shashank Balaji Date: Mon, 02 Feb 2026 18:51:03 +0900 Subject: [PATCH 2/3] x86/defconfig: add CONFIG_IRQ_REMAP MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> In-Reply-To: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=897; i=shashank.mahadasyam@sony.com; h=from:subject:message-id; bh=WGBqeRf3m3q38dcFfIzoZC7KITAdIHJXG+fCWgOOD40=; b=owGbwMvMwCU2bX1+URVTXyjjabUkhsyG4hWJ5ZPesy10dLqdVPT13NLfdzYoem+Z+6FTrppr+ 3YRUxvJjlIWBjEuBlkxRZZSpepfe1cELek581oRZg4rE8gQBi5OAZiI71yG/3G5dneW7G7keJnx 4Wd+z+9zOUtZjcKVjm+qm6rqVBCX9Jnhf+n3kx2OkYsNn+1Qe6/XFrn9pXSWzssdU98b3/BZ2S2 XyAQA X-Developer-Key: i=shashank.mahadasyam@sony.com; a=openpgp; fpr=75227BFABDA852A48CCCEB2196AF6F727A028E55 Interrupt remapping is an architectural dependency of x2apic, which is already enabled in the defconfig. Enable CONFIG_IRQ_REMAP so that a defconfig kernel on bare metal actually uses x2apic. Co-developed-by: Rahul Bukte Signed-off-by: Rahul Bukte Signed-off-by: Shashank Balaji --- arch/x86/configs/x86_64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig index 7d7310cdf8b0..269f7d808be4 100644 --- a/arch/x86/configs/x86_64_defconfig +++ b/arch/x86/configs/x86_64_defconfig @@ -230,6 +230,7 @@ CONFIG_EEEPC_LAPTOP=y CONFIG_AMD_IOMMU=y CONFIG_INTEL_IOMMU=y # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set +CONFIG_IRQ_REMAP=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 09:57:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 09:57:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218459.1527199 (Exim 4.92) (envelope-from ) id 1vmqgT-0001W5-Ld; Mon, 02 Feb 2026 09:57:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218459.1527199; Mon, 02 Feb 2026 09:57:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqgT-0001Vy-IT; Mon, 02 Feb 2026 09:57:29 +0000 Received: by outflank-mailman (input) for mailman id 1218459; Mon, 02 Feb 2026 09:51:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqb9-0001Il-KV for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 09:51:59 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c633f1e7-001c-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 10:51:45 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 18:51:37 +0900 Received: from unknown (HELO [127.0.1.1]) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP; 02 Feb 2026 18:51:37 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c633f1e7-001c-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770025905; x=1801561905; h=from:subject:date:message-id:mime-version: content-transfer-encoding:to:cc; bh=9aqqCS44lWCHB49Zm7J55r5rkQXnOnuoUWB3fHL0bvM=; b=tWqmpYNVkTwCd5q2PW+AHOynhhM3yHAvejO1MOH2xhnJeXjIgapPj/7Y 9ieaJfZh5khD/WXCmcDH0+fMwj2ZyI/xcWreyYrlSyuczdFx3gk2ueIZB zz3SYdKMnbQ/yQ9RpkPlJnuZ1Nohwl7plv3IUHAKEe51xLhX0qpzPzKza TpsWiQFvj0KARrOr9GYduaunh4gh8TsJM2MIeIlM4c5blYDeyGxfvbF59 O9pQkskUoXCc+AcYT3QqRCREKIwLXbLx9Xwht9TOavQA71bWvMKkxnluZ rOXoq/PJwF30dDVuXrb6hpkCnj51uKlSCHrvvKc+47I2AAnia9rjxX1Ss Q==; X-IronPort-AV: E=Sophos;i="6.21,268,1763391600"; d="scan'208";a="607384933" From: Shashank Balaji Subject: [PATCH 0/3] x86/x2apic: Fix hang-up of defconfig kernel on resume from s2ram Date: Mon, 02 Feb 2026 18:51:01 +0900 Message-Id: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAIZzgGkC/x2MQQqAIBAAvyJ7TlDBsL4SHXTbai8mCiGIf086z sBMg0KZqcAqGmR6ufATB+hJAN4+XiT5GAxGmVkZpWU1PjHKk6t0Fh3qYDEsCkaQMg39z7a99w8 R+TM4XAAAAA== X-Change-ID: 20260201-x2apic-fix-85c8c1b5cb90 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird , stable@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2357; i=shashank.mahadasyam@sony.com; h=from:subject:message-id; bh=rciqWe9MknIhKucUK+4wbzClj9FvwHeXsn6kPpt+wM8=; b=owGbwMvMwCU2bX1+URVTXyjjabUkhsyG4hXbtvp/s2L/pXvGSPVq9wtGQUU/0+sZWw9OOKhfs jfkl8CHjlIWBjEuBlkxRZZSpepfe1cELek581oRZg4rE8gQBi5OAZhIlhTD/8DScGFBO6NF8ydO ftFcVXsmfwpX6p0FupNYLebce84rq8zI0Cddbi5zcoJG8MkZzSbn5D/+eMqwb04Pw8ycnOdp7hW XuQA= X-Developer-Key: i=shashank.mahadasyam@sony.com; a=openpgp; fpr=75227BFABDA852A48CCCEB2196AF6F727A028E55 On resume from s2ram, a defconfig kernel gets into a state where the x2apic hardware state and the kernel's perceived state are different. On boot, x2apic is enabled by the firmware, and then the kernel does the following (relevant lines from dmesg): [ 0.000381] x2apic: enabled by BIOS, switching to x2apic ops [ 0.009939] APIC: Switched APIC routing to: cluster x2apic [ 0.095151] x2apic: IRQ remapping doesn't support X2APIC mode [ 0.095154] x2apic disabled [ 0.095551] APIC: Switched APIC routing to: physical flat defconfig has CONFIG_IRQ_REMAP=n, which leads to x2apic being disabled, because on bare metal, x2apic has an architectural dependence on interrupt remapping. While resuming from s2ram, x2apic is enabled again by the firmware, but the kernel continues using the physical flat apic routing. This causes a hang-up and no console output. Patch 1 fixes this in lapic_resume by disabling x2apic when the kernel expects it to be disabled. Patch 2 enables CONFIG_IRQ_REMAP in defconfig so that defconfig kernels at least don't disable x2apic because of a lack of IRQ_REMAP support. Patch 3 is a non-functional change renaming x2apic_available to x2apic_without_ir_available in struct x86_hyper_init, to better convey the semantic. Signed-off-by: Rahul Bukte Signed-off-by: Shashank Balaji --- Shashank Balaji (3): x86/x2apic: disable x2apic on resume if the kernel expects so x86/defconfig: add CONFIG_IRQ_REMAP x86/virt: rename x2apic_available to x2apic_without_ir_available arch/x86/configs/x86_64_defconfig | 1 + arch/x86/include/asm/x86_init.h | 4 ++-- arch/x86/kernel/apic/apic.c | 10 ++++++++-- arch/x86/kernel/cpu/acrn.c | 2 +- arch/x86/kernel/cpu/bhyve.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 2 +- arch/x86/kernel/cpu/vmware.c | 2 +- arch/x86/kernel/jailhouse.c | 2 +- arch/x86/kernel/kvm.c | 2 +- arch/x86/kernel/x86_init.c | 12 ++++++------ arch/x86/xen/enlighten_hvm.c | 4 ++-- 11 files changed, 25 insertions(+), 18 deletions(-) --- base-commit: 18f7fcd5e69a04df57b563360b88be72471d6b62 change-id: 20260201-x2apic-fix-85c8c1b5cb90 Best regards, -- Shashank Balaji From xen-devel-bounces@lists.xenproject.org Mon Feb 02 09:57:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 09:57:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218463.1527212 (Exim 4.92) (envelope-from ) id 1vmqgU-0001eN-6u; Mon, 02 Feb 2026 09:57:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218463.1527212; Mon, 02 Feb 2026 09:57:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqgU-0001cy-08; Mon, 02 Feb 2026 09:57:30 +0000 Received: by outflank-mailman (input) for mailman id 1218463; Mon, 02 Feb 2026 09:52:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmqbE-0001Il-Va for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 09:52:04 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d2cc2a73-001c-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 10:52:02 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 18:51:38 +0900 Received: from unknown (HELO [127.0.1.1]) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP; 02 Feb 2026 18:51:38 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d2cc2a73-001c-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770025922; x=1801561922; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=UGbV0HlypAsqDyqCwF4KKZshjhbYqkotn40a85H3Q7U=; b=Fsk8atP8nOli3A/kdU1FTFujNMxydunfy/0QabsYe7jNJhGm6H88rUTl inKAlL/r973SUJg9eT/QLvQ6XUQ5Z1zzVR3WfUx82Bh/+OVteJj5i9c0c i9g8QYmd1M2Fj6GWZ0zQGLNBVz7vA8wVOPX0KiVqO3vhAXRtayG1s6aam JyXxACjk15x5b0CeL9dCyap3V5e5y9+P4V5uVk2lZ9ONogp1rfsnTlbDL nFVA8cTmEmXDW5zHMNTWZ8HLFoZDQMYuHpAsQWRS6QQZHtlDkpL+jif+G i+LoAuD8joUkr/+y1Qm+QfGxsdGCUdd3H8PsWEFMyX0QDGANlaggsztfq w==; X-IronPort-AV: E=Sophos;i="6.21,268,1763391600"; d="scan'208";a="607384938" From: Shashank Balaji Date: Mon, 02 Feb 2026 18:51:04 +0900 Subject: [PATCH 3/3] x86/virt: rename x2apic_available to x2apic_without_ir_available MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260202-x2apic-fix-v1-3-71c8f488a88b@sony.com> References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> In-Reply-To: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=8661; i=shashank.mahadasyam@sony.com; h=from:subject:message-id; bh=40ywH2ksTo16iKGC5c7aKcdzHSb3M0fEznHdLx5ChZY=; b=owGbwMvMwCU2bX1+URVTXyjjabUkhsyG4pV73BSkW2t+bFj8lP/axHMSXQ/nLg+dcOZBrWq1l IycyNnlHaUsDGJcDLJiiiylStW/9q4IWtJz5rUizBxWJpAhDFycAjAR/UqGn4xiaRxyy02Nn4be 9Xesdnx9Matg+r2d2y7WH5tzzWHmuTSG/4lN6178i2r5JLaG8/tKKYYCxeYn2uGibz7WxSq6yev mMAAA X-Developer-Key: i=shashank.mahadasyam@sony.com; a=openpgp; fpr=75227BFABDA852A48CCCEB2196AF6F727A028E55 No functional change. x86_init.hyper.x2apic_available is used only in try_to_enable_x2apic to check if x2apic needs to be disabled if interrupt remapping support isn't present. But the name x2apic_available doesn't reflect that usage. This is what x2apic_available is set to for various hypervisors: acrn boot_cpu_has(X86_FEATURE_X2APIC) mshyperv boot_cpu_has(X86_FEATURE_X2APIC) xen boot_cpu_has(X86_FEATURE_X2APIC) or false vmware vmware_legacy_x2apic_available kvm kvm_cpuid_base() != 0 jailhouse x2apic_enabled() bhyve true default false Bare metal and vmware correctly check if x2apic is available without interrupt remapping. The rest of them check if x2apic is enabled/supported, and kvm just checks if the kernel is running on kvm. The other hypervisors may have to have their checks audited. Also fix the backwards pr_info message printed on disabling x2apic because of lack of irq remapping support. Compile tested with all the hypervisor guest support enabled. Co-developed-by: Rahul Bukte Signed-off-by: Rahul Bukte Signed-off-by: Shashank Balaji --- arch/x86/include/asm/x86_init.h | 4 ++-- arch/x86/kernel/apic/apic.c | 4 ++-- arch/x86/kernel/cpu/acrn.c | 2 +- arch/x86/kernel/cpu/bhyve.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 2 +- arch/x86/kernel/cpu/vmware.c | 2 +- arch/x86/kernel/jailhouse.c | 2 +- arch/x86/kernel/kvm.c | 2 +- arch/x86/kernel/x86_init.c | 12 ++++++------ arch/x86/xen/enlighten_hvm.c | 4 ++-- 10 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index 6c8a6ead84f6..b270d9eed755 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -116,7 +116,7 @@ struct x86_init_pci { * struct x86_hyper_init - x86 hypervisor init functions * @init_platform: platform setup * @guest_late_init: guest late init - * @x2apic_available: X2APIC detection + * @x2apic_without_ir_available: is x2apic available without irq remap? * @msi_ext_dest_id: MSI supports 15-bit APIC IDs * @init_mem_mapping: setup early mappings during init_mem_mapping() * @init_after_bootmem: guest init after boot allocator is finished @@ -124,7 +124,7 @@ struct x86_init_pci { struct x86_hyper_init { void (*init_platform)(void); void (*guest_late_init)(void); - bool (*x2apic_available)(void); + bool (*x2apic_without_ir_available)(void); bool (*msi_ext_dest_id)(void); void (*init_mem_mapping)(void); void (*init_after_bootmem)(void); diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index cc64d61f82cf..8820b631f8a2 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1836,8 +1836,8 @@ static __init void try_to_enable_x2apic(int remap_mode) * Using X2APIC without IR is not architecturally supported * on bare metal but may be supported in guests. */ - if (!x86_init.hyper.x2apic_available()) { - pr_info("x2apic: IRQ remapping doesn't support X2APIC mode\n"); + if (!x86_init.hyper.x2apic_without_ir_available()) { + pr_info("x2apic: Not supported without IRQ remapping\n"); x2apic_disable(); return; } diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 2c5b51aad91a..9204b98d4786 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -77,5 +77,5 @@ const __initconst struct hypervisor_x86 x86_hyper_acrn = { .detect = acrn_detect, .type = X86_HYPER_ACRN, .init.init_platform = acrn_init_platform, - .init.x2apic_available = acrn_x2apic_available, + .init.x2apic_without_ir_available = acrn_x2apic_available, }; diff --git a/arch/x86/kernel/cpu/bhyve.c b/arch/x86/kernel/cpu/bhyve.c index f1a8ca3dd1ed..91a90a7459ce 100644 --- a/arch/x86/kernel/cpu/bhyve.c +++ b/arch/x86/kernel/cpu/bhyve.c @@ -61,6 +61,6 @@ const struct hypervisor_x86 x86_hyper_bhyve __refconst = { .name = "Bhyve", .detect = bhyve_detect, .init.init_platform = x86_init_noop, - .init.x2apic_available = bhyve_x2apic_available, + .init.x2apic_without_ir_available = bhyve_x2apic_available, .init.msi_ext_dest_id = bhyve_ext_dest_id, }; diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 579fb2c64cfd..61458855094a 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -760,7 +760,7 @@ const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { .name = "Microsoft Hyper-V", .detect = ms_hyperv_platform, .type = X86_HYPER_MS_HYPERV, - .init.x2apic_available = ms_hyperv_x2apic_available, + .init.x2apic_without_ir_available = ms_hyperv_x2apic_available, .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id, .init.init_platform = ms_hyperv_init_platform, .init.guest_late_init = ms_hyperv_late_init, diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index cb3f900c46fc..46d325818797 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -585,7 +585,7 @@ const __initconst struct hypervisor_x86 x86_hyper_vmware = { .detect = vmware_platform, .type = X86_HYPER_VMWARE, .init.init_platform = vmware_platform_setup, - .init.x2apic_available = vmware_legacy_x2apic_available, + .init.x2apic_without_ir_available = vmware_legacy_x2apic_available, #ifdef CONFIG_AMD_MEM_ENCRYPT .runtime.sev_es_hcall_prepare = vmware_sev_es_hcall_prepare, .runtime.sev_es_hcall_finish = vmware_sev_es_hcall_finish, diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index 9e9a591a5fec..84a0bbe15989 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -291,6 +291,6 @@ const struct hypervisor_x86 x86_hyper_jailhouse __refconst = { .name = "Jailhouse", .detect = jailhouse_detect, .init.init_platform = jailhouse_init_platform, - .init.x2apic_available = jailhouse_x2apic_available, + .init.x2apic_without_ir_available = jailhouse_x2apic_available, .ignore_nopv = true, }; diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 37dc8465e0f5..709eba87d58e 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -1042,7 +1042,7 @@ const __initconst struct hypervisor_x86 x86_hyper_kvm = { .detect = kvm_detect, .type = X86_HYPER_KVM, .init.guest_late_init = kvm_guest_init, - .init.x2apic_available = kvm_para_available, + .init.x2apic_without_ir_available = kvm_para_available, .init.msi_ext_dest_id = kvm_msi_ext_dest_id, .init.init_platform = kvm_init_platform, #if defined(CONFIG_AMD_MEM_ENCRYPT) diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index ebefb77c37bb..9ddf8c901ac6 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -112,12 +112,12 @@ struct x86_init_ops x86_init __initdata = { }, .hyper = { - .init_platform = x86_init_noop, - .guest_late_init = x86_init_noop, - .x2apic_available = bool_x86_init_noop, - .msi_ext_dest_id = bool_x86_init_noop, - .init_mem_mapping = x86_init_noop, - .init_after_bootmem = x86_init_noop, + .init_platform = x86_init_noop, + .guest_late_init = x86_init_noop, + .x2apic_without_ir_available = bool_x86_init_noop, + .msi_ext_dest_id = bool_x86_init_noop, + .init_mem_mapping = x86_init_noop, + .init_after_bootmem = x86_init_noop, }, .acpi = { diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c index fe57ff85d004..42f3d21f313d 100644 --- a/arch/x86/xen/enlighten_hvm.c +++ b/arch/x86/xen/enlighten_hvm.c @@ -311,7 +311,7 @@ static uint32_t __init xen_platform_hvm(void) * detect PVH and panic there. */ h->init_platform = x86_init_noop; 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> >>> } > >>> > >>> -void pci_mmcfg_arch_disable(unsigned int idx) > >>> +int pci_mmcfg_arch_disable(unsigned int idx) > >>> { > >>> const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; > >>> > >>> + if ( !pci_mmcfg_virt[idx].virt ) > >>> + return 1; > >> > >> Afaict this is what causes CI (adl-*) to say no here: > >> > >> (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff > >> (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > >> (XEN) [ 4.132700] CPU: 12 > >> (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 > >> (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) > >> (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 > >> (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec > >> (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 > >> (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 > >> (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c > >> (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 > >> (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 > >> (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 > >> (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 > >> (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): > >> (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 > >> (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: > >> (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 > >> (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 > >> (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 > >> (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b > >> (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 > >> (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef > >> (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba > >> (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 > >> (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 > >> (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 > >> (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 > >> (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 > >> (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 > >> (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 > >> (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 > >> (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 > >> (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 > >> (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 > >> (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 > >> (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a > >> (XEN) [ 4.132816] Xen call trace: > >> (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 > >> (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e > >> (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b > >> (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 > >> (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 > >> (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 > >> (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 > >> (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 > >> (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 > >> (XEN) [ 4.132847] > >> (XEN) [ 4.132848] Pagetable walk from ffff808000300100: > >> (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff > >> > >> There is an important comment in pci_mmcfg_arch_disable(): > >> > >> /* > >> * Don't use destroy_xen_mappings() here, or make sure that at least > >> * the necessary L4 entries get populated (so that they get properly > >> * propagated to guest domains' page tables). > >> */ > >> > >> Hence it is wrong to bypass > >> > >> mcfg_ioremap(cfg, idx, 0); > > > > Hm, I see. The L4 slot must be unconditionally populated before we > > clone the idle page-table, otherwise the mappings won't propagate. > > > > What about unconditionally populating the L4 slot in > > subarch_init_memory()? That seems less fragile than doing it in > > pci_mmcfg_arch_disable(). > > Less fragile - perhaps. Yet I don't see why we should populate the field if > we wouldn't ever need it. Of course with violating layering some, we could > know in subarch_init_memory(), as pci_setup() runs earlier. How can Xen be sure at setup time that the slot will never be used? The MMCFG could be empty initially when parsed by Xen, but MMCFG regions might appear as a result of AML method execution (_CBA and _CRS methods in hotplug host bridges). Thanks, Roger. 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Producers may set bits in >> irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is >> performed only by the consumer via xchg_acquire(). The consumer must not >> write to irqs_pending and must not act on bits that are not set in the >> mask. Otherwise, extra synchronization should be provided. >> >> On RISC-V interrupts are not injected via guest registers, so pending >> interrupts must be recorded in irqs_pending (using the new >> vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating >> HVIP before returning control to the guest. The consumer side is >> implemented in a follow-up patch. >> >> A barrier between updating irqs_pending and setting the corresponding >> mask bit in vcpu_set_interrupt() / vcpu_unset_interrupt() guarantees >> that if the consumer observes a mask bit set, the corresponding pending >> bit is also visible. This prevents missed interrupts during the flush. >> >> Signed-off-by: Oleksii Kurochko > The use of barriers here matches the (Linux) specification, so > Acked-by: Jan Beulich > > However, ... > >> @@ -130,3 +131,43 @@ void arch_vcpu_destroy(struct vcpu *v) >> { >> vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info)); >> } >> + >> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* >> + * We only allow VS-mode software, timer, and external >> + * interrupts when irq is one of the local interrupts >> + * defined by RISC-V privilege specification. >> + */ >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; >> + >> + set_bit(irq, v->arch.irqs_pending); >> + smp_mb__before_atomic(); >> + set_bit(irq, v->arch.irqs_pending_mask); > ... isn't it too heavy a barrier here? You only need ordering of writes, > without any regard to reads, don't you? It is true, we could have FENCE W, W here. I'll update in the next patch version. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 02 10:27:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 10:27:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218512.1527260 (Exim 4.92) (envelope-from ) id 1vmr9S-00009q-4G; Mon, 02 Feb 2026 10:27:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218512.1527260; Mon, 02 Feb 2026 10:27:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmr9S-00009j-1F; Mon, 02 Feb 2026 10:27:26 +0000 Received: by outflank-mailman (input) for mailman id 1218512; Mon, 02 Feb 2026 10:27:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmr9Q-00008L-Qf for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 10:27:24 +0000 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [2a00:1450:4864:20::52d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c24a703e-0021-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 11:27:22 +0100 (CET) Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-658ad86082dso7478058a12.0 for ; Mon, 02 Feb 2026 02:27:22 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5b:2f01:4042:c03:ce4d:a5a1? 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Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Denis Efremov , Jens Axboe References: <20260119182632.596369-1-jgross@suse.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260119182632.596369-1-jgross@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------EFFtuyAw2mxdAKPsAqPioBPH" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------EFFtuyAw2mxdAKPsAqPioBPH Content-Type: multipart/mixed; boundary="------------DPiBTuW4WhK0KFF1cKCxJjmg"; protected-headers="v1" From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-block@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. 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According, to the >> design only one consumer is possible, and it is vCPU itself. >> vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due >> to the lack of functionality) before the hypervisor returns control to the >> guest. >> >> Producers may set bits in irqs_pending_mask without a lock. Clearing bits in >> irqs_pending_mask is performed only by the consumer via xchg() (with aquire & >> release semantics). The consumer must not write to irqs_pending and must not >> act on bits that are not set in the mask. Otherwise, extra synchronization >> should be provided. >> The worst thing which could happen with such approach is that a new pending >> bit will be set to irqs_pending bitmap during update of hvip variable in >> vcpu_flush_interrupt() but it isn't problem as the new pending bit won't >> be lost and just be proceded during the next flush. >> >> It is possible a guest could have pending bit not result in the hardware >> register without to be marked pending in irq_pending bitmap as: >> According to the RISC-V ISA specification: >> Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and >> interrupt-enable bits for VS-level software interrupts. VSSIP in hip >> is an alias (writable) of the same bit in hvip. >> Additionally: >> When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only >> zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and >> hie.VSSIE. >> This means the guest may modify vsip.SSIP, which implicitly updates >> hip.VSSIP and the bit being writable with 1 would also trigger an interrupt >> as according to the RISC-V spec: >> These conditions for an interrupt trap to occur must be evaluated in a >> bounded amount of time from when an interrupt becomes, or ceases to be, >> pending in sip, and must also be evaluated immediately following the >> execution of an SRET instruction or an explicit write to a CSR on which >> these interrupt trap conditions expressly depend (including sip, sie and >> sstatus). >> What means that IRQ_VS_SOFT must be synchronized separately, what is done >> in vcpu_sync_interrupts(). > And this function is going to be used from where? Exit from guest into the > hypervisor? Whereas vcpu_flush_interrupt() is to be called ahead of re- > entering the guest? Both of them are called before returning control to a guest (missed to mention that in the commit message) in do_trap() at the end: static void check_for_pcpu_work(void) { ... vcpu_flush_interrupts(current); vcpu_sync_interrupts(current); } void do_trap(struct cpu_user_regs *cpu_regs) { ... if ( cpu_regs->hstatus & HSTATUS_SPV ) check_for_pcpu_work(); } > > I ask because vcpu_sync_interrupts() very much looks like a producer to me, > yet the patch here supposedly is the consumer side. Yes, vcpu_sync_interrupts() should be in producer side, I'll move it to the prev. patch. > >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -171,3 +171,68 @@ int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) >> >> return 0; >> } >> + >> +static void vcpu_update_hvip(struct vcpu *v) > Pointer-to-const? > >> +{ >> + csr_write(CSR_HVIP, v->arch.hvip); >> +} >> + >> +void vcpu_flush_interrupts(struct vcpu *v) >> +{ >> + register_t *hvip = &v->arch.hvip; >> + >> + unsigned long mask, val; > These are used ... > >> + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) >> + { >> + mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); >> + val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; >> + >> + *hvip &= ~mask; >> + *hvip |= val; > ... solely in this more narrow scope. I'll declare them inside the if(). > >> + } >> + >> + /* >> + * Flush AIA high interrupts. >> + * >> + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported >> + * now. >> + */ >> +#ifdef CONFIG_RISCV_32 >> +# error "Update hviph" >> +#endif >> + >> + vcpu_update_hvip(v); > Why would bits for which the mask bit wasn't set be written here? This function inside uses only v->arch.hvip which is updated above according to the mask. > >> +void vcpu_sync_interrupts(struct vcpu *v) >> +{ >> + unsigned long hvip; >> + >> + /* Read current HVIP and VSIE CSRs */ >> + v->arch.vsie = csr_read(CSR_VSIE); >> + >> + /* Sync-up HVIP.VSSIP bit changes does by Guest */ > Nit: s/does/done/ ? > >> + hvip = csr_read(CSR_HVIP); >> + if ( (v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL) ) >> + { >> + if ( !test_and_set_bit(IRQ_VS_SOFT, >> + &v->arch.irqs_pending_mask) ) > Why two separate, nested if()s? Do you mean that it could be: if ( !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) && (hvip & BIT(IRQ_VS_SOFT, UL)) ? > >> + { >> + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) >> + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); >> + else >> + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); >> + } > In the previous patch you set forth strict ordering rules, with a barrier in > the middle. All of this is violated here. It still respects the rule that the producer (|vcpu_sync_interrupts()| which should be in the producer path) never clears the mask and only writes to |irqs_pending| if it is the one that flipped the corresponding mask bit from 0 to 1. Considering that the consumer cannot be called concurrently in this case (since|vcpu_flush_interrupts()| and|vcpu_sync_interrupts()| are only invoked sequentially in|check_for_pcpu_work()|, as mentioned above), nothing can clear a bit in the mask in between. Therefore, I think it is acceptable to slightly bend (and it should be explained in the comment above the function or in the commit message) the rule that the|irqs_pending| bit must be written first, followed by updating the corresponding bit in |irqs_pending_mask() specifically for |vcpu_sync_interrupts(). > >> + } >> + >> + /* >> + * Sync-up AIA high interrupts. >> + * >> + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported >> + * now. >> + */ >> +#ifdef CONFIG_RISCV_32 >> +# error "Update vsieh" >> +#endif > Here you mean the register or the struct vcpu field? It may be helpful to > disambiguate; assuming it's the latter, simply spell out v->arch.vsieh? > (Same then for the similar code in vcpu_flush_interrupts().) Agree, it would be better. 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Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P265CA0284.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:38f::9) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|LV4PR03MB8187:EE_ X-MS-Office365-Filtering-Correlation-Id: 0f063a44-8b77-4480-aa43-08de624f34cc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|10070799003|1800799024|7416014|366016|376014|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Tmt2VkQxR1R0Y3pNZEpSVWxjdU1xdXpMdnNtQ3ZsK1FSeldWYmpzRDhZdzhr?= =?utf-8?B?dzdRNkNQZVhzbGRXRFU5OERwaVpta29qdEJuMFJHSTVBazBLRzVVQ2dFTHpK?= =?utf-8?B?anBhellGU2k0bHY3ZWdhNk04VkhKbE5nN3JvbE8vVmY3WTZpbkV0Yzd6VjZo?= =?utf-8?B?YzN1cUFOeWRvWU5qNlFGVUZjVDVXaGpzNDhSemczRmRGN2pCeHRNU2R0UWts?= =?utf-8?B?OU1VN0QwaldJeHViSk03N1hRWlhzcllPSVVUNXlSMHVKT0pQcEh6Tm5VdXBL?= =?utf-8?B?TnovQzZPckVrTmdlTHhsbzZYaHhDL2FhcndYQlhtTEwwcThMaUFvTHg2V2FQ?= =?utf-8?B?eEpqWlA0aFdubU84NnBYT0VvRWMzd0lmYTdwQzJaZERNMjdpL1lVeFJxNGtR?= =?utf-8?B?K2o5THVWUDJ5OWpYOTVTRzRhSHorcXBrSFZmLzBwZlJWL2ZKSnFhRFZtMitm?= =?utf-8?B?S0ZBQmxqZ2R1STJzQUZMQ2toRTlmcndSSUZJc2FJYVBkcXNZVlRLcXkyQmpo?= =?utf-8?B?LzRvMzQ4N2ZUOU5Mb3haaWRnSEdmUWxrQW1LYVFUeU4wZ1B2QUE5UnduVGV3?= =?utf-8?B?RFFKTnE5OUdWaSt6UzVvSlhnOGVsTE1NODhsb0JNY093L0plSGdZU2xaTkY4?= =?utf-8?B?QkxSbmN5c3VxTUNXcnpUTE5PWHFpQllPdDBMUXpvQmNBVDQ1OUcxOWxpd0hz?= =?utf-8?B?bzlUZEVINU1KVHpsVGM4THZvb2hSNkcrOURJZDNMeG9FcHQ0WXVCdy81OU1N?= =?utf-8?B?QUJGeTNoMXp5VXBiOVFXakpuWThES2hyVXVPZGJtUUMyVmJOMi9TZmhUbWFy?= =?utf-8?B?SlRMRFA2R0xwQUc4c3lENlNDcXRkeXRqQTNWN0dHckpOeVAyci9YOUxTalBT?= =?utf-8?B?dFVWQUZKbkh3a3RhR084REcwQWNmV05OU2lDNElJNzU2N0VyQkx1aTgwZ0NN?= =?utf-8?B?b2VhTGMyWUJucnY2Z0tpaDZxengwT0MyVmZQT1ZJdlhqYlhFRFMzczFxS1RL?= =?utf-8?B?N1lFVDdyMDBJNXFMWlUydUR1NXlLYURrNXF4S1NScllVbFFiZ25vTnJzV1cz?= =?utf-8?B?SS96SENpNVJyaFZXM1FGOHd0Tzk2QmlTY25JYng2eHVpcTl0MG5FK0Izalhz?= =?utf-8?B?azhFKzhZZmhtSm9ubHpkR1I1K1VNTXo4QjMzTXIzUnpsWkNBRkZiTkE4T0dw?= =?utf-8?B?b0drczFieXp6VVdNQUFEU1M4enB5T1U2cS9DK0hnZWRXVGNML3YwK2Q4RVh5?= =?utf-8?B?bFZ2aHJrdVVGcmxVNkR3MTlkMnpwTk9yN2Jnbm5pRnRXT0M0dmRDSWF2RWtv?= =?utf-8?B?dWl1U1Y3MWF0a2h4bzNwWXpHYVQvaE1iR0tzV2ZNN2JheHIwUDNDZ2RGUzRQ?= =?utf-8?B?a0xMaEcvb05RS0R6YUlTdDV6QkpJY3YvYzBzWmpZU0NPZW5uUGZkWitUZURj?= =?utf-8?B?QVU1dExHeFh5Z2I3YVFCUkJqWHMyNmpDKzZFbS9LMGdXbHVwcjJxTXpReVVT?= =?utf-8?B?cDJBY3VNRnMxVE55YmFOMU9xeXd3bm5oeU9RQ1grQm9ZQjRqTUMvOVZjQm1V?= =?utf-8?B?RUN1Y2NlSVNBTFZEUlVaZjFCbnJ2L1l2YzZDeGtYZHg4RTh6d2llYWROUXg3?= =?utf-8?B?L0owaTV5V0tlZ1Z4YjhySHIxZTh2Y1N5QnBRWnNmT1RXemNXK0EyTDVtSXRC?= =?utf-8?B?b0NpWWl4N0Z0Z1k1QkZ5blk3VzFkTC94UUUwZFM4ZkVsbUM3WDBUN1kreTNn?= =?utf-8?B?SHRoWjBBMEg2SzJHU2VNR0dOeFpGZTNHTGJ4NEx4T05wU3VrRWhLS1o3a1hY?= =?utf-8?B?WlR4Zm8xb2U1UWkxQkJlRWZSRGoxUlZuUHZMaWM5NitKUHJjTm0weThqOSti?= =?utf-8?B?Tm1Nbzhya29hNWNVWW1KRDB6QXJ6YTZCMGQ3dksrTzRaQlB5WnhqWW1lMkZS?= =?utf-8?B?d1JZd1lhWUJwOVJqcFNybTlGSHVaZC9peXBPZHVLSXh4bElrc0RQa05YUW1j?= =?utf-8?B?dENTNmlJTU8wOTZRd3gzYXd5ckJMNDlnOWhpR1JuU1FPK0JQOUtpSVRQN2py?= =?utf-8?B?WjFtMTM5WXRFUmhtdGJUamlac3Q2Q2lXaTk4NGJQWDhtQU1ZRjhPTmJOMFZi?= =?utf-8?B?anY2ZEpiYzFmanBJeE01VWxzTUtqVEVxQ2FlcWF3NlE1aVBDSitPcjg0L2lP?= =?utf-8?B?anc9PQ==?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH8PR03MB8275.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(10070799003)(1800799024)(7416014)(366016)(376014)(921020);DIR:OUT;SFP:1101; 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There is no such dependency.  VMs for example commonly have x2APIC and no IOMMU, and even native system with fewer than 254 CPUs does not need interrupt remapping for IO-APIC interrupts to function correctly. For native systems with 255 or more CPUs you do want Interrupt Remapping so enabling it in defconfig is a good move, but the justification needs correcting. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 02 11:54:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 11:54:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218546.1527326 (Exim 4.92) (envelope-from ) id 1vmsW3-0005AJ-4K; Mon, 02 Feb 2026 11:54:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218546.1527326; Mon, 02 Feb 2026 11:54:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmsW3-0005AC-1E; Mon, 02 Feb 2026 11:54:51 +0000 Received: by outflank-mailman (input) for mailman id 1218546; Mon, 02 Feb 2026 11:54:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmsW1-0005A6-5O for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 11:54:49 +0000 Received: from MRWPR03CU001.outbound.protection.outlook.com (mail-francesouthazlp170110003.outbound.protection.outlook.com [2a01:111:f403:c207::3]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f8460913-002d-11f1-b161-2bf370ae4941; Mon, 02 Feb 2026 12:54:46 +0100 (CET) Received: from AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:588::19) by AM7PR10MB3892.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:14c::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.16; Mon, 2 Feb 2026 11:54:42 +0000 Received: from AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM ([fe80::be9f:e8ca:ee9:83e1]) by AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM ([fe80::be9f:e8ca:ee9:83e1%6]) with mapi id 15.20.9564.014; Mon, 2 Feb 2026 11:54:42 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f8460913-002d-11f1-b161-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=DozXTZV0kx5ROzKeem5FK2V/FOHC6/dH0lotIlOYCHL3ZQIDfFtSxZi1xx5ycNzZC/Tb1CJflSSSq2/nFiOwT4/y/in89K44mK8o5a+3TGJU47YnrwQAyO95DbGcnJM3qpMKfzq+22MSzZd90DPiEJR6C3HWocQ+xoshaPBm+Gt5S0ppH0Yj0B/a/qZe7UVR1FMpPgkVOL/IJLjJHBHCTVPYoNcdLbpBIrYaxzWb1dR9aLU6DKaxhMJ2VOl7G5r7DKElpZVX+vOHSXLj12Sg6vK0ZQ7Z+7aHdxveu8afO1ExPN83LFhCstmXSppLUG3Y2zqseq+1brhFdSOZmGRktQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=YzfWWF6jM28jFZOkgFILKwIP1XwR7LJcAB/6B93JfUg=; b=SVJT5Io95w6cCExyw8q2qYOteGFMQTdE3OenwQ3wJXGId6LkLsxmh4cPS+iHsbykeII9Lpckztcw7ssUtScKcM8ai2zRw8xGRSuWyuA3E6qNmBoX/cs26yBg2u4Pew6mgk2vW/ZvCPopxoPfuo/fh1UwYIlKMKK73ghkTf+RdATmv7NZm4PrRZVvBmtDDdNyc5X4nvw78XnVsEh9K9maoaUTnJ+EqBG+XXMj/jCs+BDz9uA50U9fpmrfJCE2hlKbtcfGsx705VCghRd8Mdr4kPPrhV7EluDZDfkkzlLpoQeJ+yATnzFgmLsZY3GR1OqQ2s+e+baGjMXIDhZhvatkdQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=siemens.com; dmarc=pass action=none header.from=siemens.com; dkim=pass header.d=siemens.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=siemens.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YzfWWF6jM28jFZOkgFILKwIP1XwR7LJcAB/6B93JfUg=; b=bRBopqjf8Qg7MR8ntdZfcoeXIZamYuC3k66Mfx19KhlksKdiMgmCyVNHrGUuxCv6rC0Bcftuh71gsUSh3gXhhi1Ncpbg0bAo5/i8xrjgsHDU9casr/6daQHqjWgkLtGJpPqzemDKhuWyUBUfedkFTsRyDEZZdq/V2EmsjX0ARBnQ4HI/SxgfPB4ycGRjBMVk6brV+3/u2JLZaUyrPPBTng94zyRZL94rsXetUuRhdlYZw+eKjfBQXK/bjvEaDJUT5QoXby1bYm6B1hU8+TDI3r681p3yMr9FQX1IMBLHxj7Koqom4ZOQ6D0dAqWyUkmKwz/pqMGzvJ2DZWaWcvHk6Q== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siemens.com; Message-ID: Date: Mon, 2 Feb 2026 12:54:30 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/defconfig: add CONFIG_IRQ_REMAP To: Andrew Cooper , Shashank Balaji , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> From: Jan Kiszka Content-Language: en-US Autocrypt: addr=jan.kiszka@siemens.com; keydata= xsFNBGZY+hkBEACkdtFD81AUVtTVX+UEiUFs7ZQPQsdFpzVmr6R3D059f+lzr4Mlg6KKAcNZ uNUqthIkgLGWzKugodvkcCK8Wbyw+1vxcl4Lw56WezLsOTfu7oi7Z0vp1XkrLcM0tofTbClW xMA964mgUlBT2m/J/ybZd945D0wU57k/smGzDAxkpJgHBrYE/iJWcu46jkGZaLjK4xcMoBWB I6hW9Njxx3Ek0fpLO3876bszc8KjcHOulKreK+ezyJ01Hvbx85s68XWN6N2ulLGtk7E/sXlb 79hylHy5QuU9mZdsRjjRGJb0H9Buzfuz0XrcwOTMJq7e7fbN0QakjivAXsmXim+s5dlKlZjr L3ILWte4ah7cGgqc06nFb5jOhnGnZwnKJlpuod3pc/BFaFGtVHvyoRgxJ9tmDZnjzMfu8YrA +MVv6muwbHnEAeh/f8e9O+oeouqTBzgcaWTq81IyS56/UD6U5GHet9Pz1MB15nnzVcyZXIoC roIhgCUkcl+5m2Z9G56bkiUcFq0IcACzjcRPWvwA09ZbRHXAK/ao/+vPAIMnU6OTx3ejsbHn oh6VpHD3tucIt+xA4/l3LlkZMt5FZjFdkZUuAVU6kBAwElNBCYcrrLYZBRkSGPGDGYZmXAW/ VkNUVTJkRg6MGIeqZmpeoaV2xaIGHBSTDX8+b0c0hT/Bgzjv8QARAQABzSNKYW4gS2lzemth IDxqYW4ua2lzemthQHNpZW1lbnMuY29tPsLBlAQTAQoAPhYhBABMZH11cs99cr20+2mdhQqf QXvYBQJmWPvXAhsDBQkFo5qABQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEGmdhQqfQXvY zPAP/jGiVJ2VgPcRWt2P8FbByfrJJAPCsos+SZpncRi7tl9yTEpS+t57h7myEKPdB3L+kxzg K3dt1UhYp4FeIHA3jpJYaFvD7kNZJZ1cU55QXrJI3xu/xfB6VhCs+VAUlt7XhOsOmTQqCpH7 pRcZ5juxZCOxXG2fTQTQo0gfF5+PQwQYUp0NdTbVox5PTx5RK3KfPqmAJsBKdwEaIkuY9FbM 9lGg8XBNzD2R/13cCd4hRrZDtyegrtocpBAruVqOZhsMb/h7Wd0TGoJ/zJr3w3WnDM08c+RA 5LHMbiA29MXq1KxlnsYDfWB8ts3HIJ3ROBvagA20mbOm26ddeFjLdGcBTrzbHbzCReEtN++s gZneKsYiueFDTxXjUOJgp8JDdVPM+++axSMo2js8TwVefTfCYt0oWMEqlQqSqgQwIuzpRO6I ik7HAFq8fssy2cY8Imofbj77uKz0BNZC/1nGG1OI9cU2jHrqsn1i95KaS6fPu4EN6XP/Gi/O 0DxND+HEyzVqhUJkvXUhTsOzgzWAvW9BlkKRiVizKM6PLsVm/XmeapGs4ir/U8OzKI+SM3R8 VMW8eovWgXNUQ9F2vS1dHO8eRn2UqDKBZSo+qCRWLRtsqNzmU4N0zuGqZSaDCvkMwF6kIRkD ZkDjjYQtoftPGchLBTUzeUa2gfOr1T4xSQUHhPL8zsFNBGZY+hkBEADb5quW4M0eaWPIjqY6 aC/vHCmpELmS/HMa5zlA0dWlxCPEjkchN8W4PB+NMOXFEJuKLLFs6+s5/KlNok/kGKg4fITf Vcd+BQd/YRks3qFifckU+kxoXpTc2bksTtLuiPkcyFmjBph/BGms35mvOA0OaEO6fQbauiHa QnYrgUQM+YD4uFoQOLnWTPmBjccoPuiJDafzLxwj4r+JH4fA/4zzDa5OFbfVq3ieYGqiBrtj tBFv5epVvGK1zoQ+Rc+h5+dCWPwC2i3cXTUVf0woepF8mUXFcNhY+Eh8vvh1lxfD35z2CJeY txMcA44Lp06kArpWDjGJddd+OTmUkFWeYtAdaCpj/GItuJcQZkaaTeiHqPPrbvXM361rtvaw XFUzUlvoW1Sb7/SeE/BtWoxkeZOgsqouXPTjlFLapvLu5g9MPNimjkYqukASq/+e8MMKP+EE v3BAFVFGvNE3UlNRh+ppBqBUZiqkzg4q2hfeTjnivgChzXlvfTx9M6BJmuDnYAho4BA6vRh4 Dr7LYTLIwGjguIuuQcP2ENN+l32nidy154zCEp5/Rv4K8SYdVegrQ7rWiULgDz9VQWo2zAjo TgFKg3AE3ujDy4V2VndtkMRYpwwuilCDQ+Bpb5ixfbFyZ4oVGs6F3jhtWN5Uu43FhHSCqUv8 FCzl44AyGulVYU7hTQARAQABwsF8BBgBCgAmFiEEAExkfXVyz31yvbT7aZ2FCp9Be9gFAmZY +hkCGwwFCQWjmoAACgkQaZ2FCp9Be9hN3g/8CdNqlOfBZGCFNZ8Kf4tpRpeN3TGmekGRpohU bBMvHYiWW8SvmCgEuBokS+Lx3pyPJQCYZDXLCq47gsLdnhVcQ2ZKNCrr9yhrj6kHxe1Sqv1S MhxD8dBqW6CFe/mbiK9wEMDIqys7L0Xy/lgCFxZswlBW3eU2Zacdo0fDzLiJm9I0C9iPZzkJ gITjoqsiIi/5c3eCY2s2OENL9VPXiH1GPQfHZ23ouiMf+ojVZ7kycLjz+nFr5A14w/B7uHjz uL6tnA+AtGCredDne66LSK3HD0vC7569sZ/j8kGKjlUtC+zm0j03iPI6gi8YeCn9b4F8sLpB lBdlqo9BB+uqoM6F8zMfIfDsqjB0r/q7WeJaI8NKfFwNOGPuo93N+WUyBi2yYCXMOgBUifm0 T6Hbf3SHQpbA56wcKPWJqAC2iFaxNDowcJij9LtEqOlToCMtDBekDwchRvqrWN1mDXLg+av8 qH4kDzsqKX8zzTzfAWFxrkXA/kFpR3JsMzNmvextkN2kOLCCHkym0zz5Y3vxaYtbXG2wTrqJ 8WpkWIE8STUhQa9AkezgucXN7r6uSrzW8IQXxBInZwFIyBgM0f/fzyNqzThFT15QMrYUqhhW ZffO4PeNJOUYfXdH13A6rbU0y6xE7Okuoa01EqNi9yqyLA8gPgg/DhOpGtK8KokCsdYsTbk= In-Reply-To: Content-Type: text/plain; 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IIRC, ignoring this would move us into undefined behaviour space that may work on some system and did not on others. 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Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P265CA0292.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:38f::18) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|DS2PR03MB8418:EE_ X-MS-Office365-Filtering-Correlation-Id: 03d7229a-38da-4c35-8ac0-08de62545c54 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|10070799003|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?NDJxOTM2d2hvUjFYT0J4R1g1d3ppbFJsZkNMQ2xuZEY5T25kYnlaZFphNUkz?= =?utf-8?B?YmVjTE1JbWJ0N1hhT1QvOUpSTTVUUElvYkNkeHV3UWdOMVM2U25LKytIclhJ?= =?utf-8?B?L3pIVGVTK3Fyd1NySkVtbHlnOFd4YnNuVlVCRTB0akxYUCtXVG5laWYxbENZ?= =?utf-8?B?M1pzcjkyUU9ES0dEZlkyempMem53Qit6T0E5NEN0NXBxdW5kOHI2cUIxdVY5?= =?utf-8?B?MFpGeXN2S0hzUXJ0MFQzRGVVNFYwdzk3QTNwTkFLeTZ5YWlqYmc1MmVmTFpJ?= =?utf-8?B?L29IdFFGOS9GTnhEU2g1aDY2VVo2Vll3MmwwL1hvZUp1dCtucHBkWVg3aVdJ?= =?utf-8?B?S0RKWTRLd0EyWjdhL1hsNVk2dzFiMWRQekhBZGVvT2I5Sy95a2l5TXNHWFBT?= =?utf-8?B?U2JlMksxTXVhZjNYeXlBTW5XYXFaWGpBZGsxZ29iZ3o2MEh3Y0ZvOG56dTZx?= =?utf-8?B?WG1XaDVUL1BPQ0xxWGppcE1hMWRVUzJMN3dFdElpT0FKWkRDYVJDRHBBalF5?= =?utf-8?B?Y3kzSXE5RjUzbXluZE1hY1FsVDZxR0JjL0xXbFZnbWF2b3VEd0VRSitkb0hj?= =?utf-8?B?UFByN1g5MTFZcTZZeFk0UFRrdWltRnNWSktxWTFic081aXJwUytrWEZOaW1Q?= =?utf-8?B?U2NadWg4dnIreVFBRTFGRGFyNHh1ajJsdHdneUxPL1VqcCtiZHh0UnFaLzZX?= =?utf-8?B?QkN6YXNsSHJqQmhUWVBCMWlJSVZNck1rbEZMbFBvOW5HOWIraHVOWHNlNWxV?= =?utf-8?B?SmN1YjU3NXhSc2kyME1QRisrV3UvYWU3Q2pNb3d1ZHp6MWljcmZ6R0lMQXJm?= =?utf-8?B?WlNONHBPMzc2R0o1YjR6U25VMzlkbW5qbnFNWWt4NXZVUFRUTnZBSVdrZWE5?= =?utf-8?B?OE5sSVVGK3JZM090ZEtDdHN0Z0p1aW1jSzc3eWh0VHFZYTlVNFdSTkxmdElX?= =?utf-8?B?QTZLVDNzcEZ5MWVsV3VkYmJsR1ZmaWk0ZkJmNGxhV052c3ZrZDUrbDI1eDV2?= =?utf-8?B?c3cvVm83d2YyTUR5MjRobWY1TGYyRUowYVZ2a0YvRHFuenZQaStRMlFOTVpR?= =?utf-8?B?MHIyRXJ5dm13N1lEVUIyZS9sUkFoSlN4ZXZUcXprVlJocjhLM2Nob0QzajRy?= =?utf-8?B?QmVRdklEZUFyeGtITWNib1MrSVlKWlVFSmhzZlRWTTFGNU1tKzUxTkJYMnF4?= =?utf-8?B?a2Z4YjJxRjk3NnlUU1BuSnRhRDVTUHl2Z1k5REV6S3pEMFQ2Mm9aVmlJc1Np?= =?utf-8?B?V28zOC95WDRHTWFWd0VJRGdtSlVJcll1V1UrMVM0TEx4ZlRQTklKQ29zUFov?= =?utf-8?B?ajhUY2hiL1NQWHFnc2tIQ3dmbUx0NG5jMDhGc2ZielFmck5YeURtY1NTSHRi?= =?utf-8?B?WS9VY2daaFloQk9rT0xqUUhpV3JCMEp4SG1LdS9DVis2WnhRL2kvdVJpcUZv?= =?utf-8?B?S0JLbmYweWFrM21zM21LRldobzg0NklaVE92aUluVlZtNEhvZGljY0c1MUhP?= =?utf-8?B?dFJrTlVIdTZRVmR3Z29IWTUyTFRBQlJjU2RZUDk2SElFSTNEbUVHVkJvYXdo?= =?utf-8?B?Qmg2dkdOOCtjcHR3K1dpMS9tTTJYWExQSXR1Z1JVa2xORHU4b0RNcjFWNU1y?= =?utf-8?B?Q29tUEk0dUhUUVN3YnlNbkVpOWo5QWMxNm96N3VPanphZGkzbndJeTkrOHNU?= =?utf-8?B?SUw3NjVSSWFKeENtSXVxc0xFaFQwSnM3TG9Yc0dMUE9sd1JNVGZmZTc3NUIy?= =?utf-8?B?T0Exc0NTMWdGdHBmYmk2UFFMQUhMeVROckZrN3VxOHpXV0FDRXJic1lZRTBz?= =?utf-8?B?bGI4M3B6U1N2V29HZHE5UzRiN2RUVEJwdHhhdnU0Z3ZYaDNDNE41Mk8yK0ZS?= =?utf-8?B?T0VNYlBaTVlFOGtFN3Bremc4Y2pvalZzaEZGZlFUNDJqdjFCU0FqMTllZ1hQ?= =?utf-8?B?bFllTVUyVndjMjQxWWRUeGtSUzlCTTVCZ0ZmZEhkNWNQNjVsak8vak9KbVg5?= =?utf-8?B?enJ3eU42UmtNUGxTWmdoK3h4aVplaWgwV1hSV01oR1d1TzBXWDFONVhLendm?= =?utf-8?B?OW9iR3VDUEhrNWpiWld0NG9BYjBZT1Y5Ly9FeUpPQ2tySW0rUVdybTNZZE9h?= =?utf-8?B?OGFsWFJwc3l0eTFQTlBQeTR5TUhTVlpPd3cxdU9xMVcrZVBaZWgyd0cralhp?= =?utf-8?B?YWc9PQ==?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH8PR03MB8275.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(10070799003)(1800799024)(921020);DIR:OUT;SFP:1101; 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This statement is misleading and has been argued over before.  It's missing the key word "all". What IR gets you in this case is the ability to target CPU 255 and higher. The OS-side access mechanism (xAPIC MMIO vs x2APIC MSRs) has no baring on how external interrupts are handled in the fabric. There are plenty of good reasons to have Interrupt Remapping enabled when available, but it is not a hard requirement architecturally. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 02 12:58:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 12:58:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218573.1527396 (Exim 4.92) (envelope-from ) id 1vmtVR-0005dJ-Iv; Mon, 02 Feb 2026 12:58:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218573.1527396; Mon, 02 Feb 2026 12:58:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVR-0005cX-F3; Mon, 02 Feb 2026 12:58:17 +0000 Received: by outflank-mailman (input) for mailman id 1218573; Mon, 02 Feb 2026 12:58:16 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVQ-0005NS-2J for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 12:58:16 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d5026416-0036-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 13:58:12 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4805ef35864so37478475e9.0 for ; Mon, 02 Feb 2026 04:58:12 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-482dbd0f043sm107954345e9.7.2026.02.02.04.58.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Feb 2026 04:58:11 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d5026416-0036-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770037092; x=1770641892; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rqUOsiASfyAaQ53ugdDDDMH77tCws+wp7hpoj2RKf+w=; b=i9GcaZt88NsQP0HC3cGNsIJFPhOFGfnRkySAAfndjEF83GoFW75P93CQWq9RuchUk+ WXyK+b9SAkTz+ih7Y0t72t3ohT/Lzqo9ZW2cLlaG61uQ24kPDusq9PFENyfb0iv1Huvk FMKPZdzlNy2sKQ5+xLxAEPRr4zLyZlgaQ6QIOt6bRElYL4r2pnN0iYybvAH5JlOV9eBi eTm0RKxVWskFR0CYI7Fpv4j3kS05Sbl09rPwh1e/5+TmLTw/WVMeZdgQMLlIRu7cYSrf kFSliw8g5o9xm0zPC9qpC12Y0W9R6BmNOMUidfxIZTwQrW30hSPwW1rUgBWkgW7p5Mt4 dt7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770037092; x=1770641892; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=rqUOsiASfyAaQ53ugdDDDMH77tCws+wp7hpoj2RKf+w=; b=jBq+gwbwbfzjazRm4Ul4JY2G29Z5KadxV2rLkMimVlulWLBlrhHxw/7CL8ttvDdMx4 E6Efs6QD3QQgQzKTVhu0VBVTAJCp93ANUGEIvJCRvplDiiqbwUa2XlrbLX3sT/8XSJk7 txCPJg4zw6yH0EEtP169iwBSAw0cS2SpNpVbbiUlqULuQXbrB8usibuZ6uyiNKqQpfEj MzilOVC0xz5k+7xkzaaVwm3JPhrxWkzFDWxfccsyPQHCz+a9SXxLImKa+w9+nmUbxcXB e4nD/DSfMpUcqZapX/m4s33bqNCnIWPFe6eSBGbE3FyJr3Js6Pe2CrWag4suINzAuNP7 zvmg== X-Gm-Message-State: AOJu0YzIhPBtgsH7J2CHDtKYqfdLJPW3+4GN09OSw9ttuYI/QEEdXidB TExpsMVECdrbWfpu227QFqpr98kNRPQKDoYO2hKKOHMCNFGlhoBjgLNIsAlUPg== X-Gm-Gg: AZuq6aJ88zJkadul7Dn2ybwSJkmW8ouAVPHaNO+lYb6LcXOj73TYJHsMw3NCbwG8+C7 4Oa0DwJBv61mXpCmOYGg2hSF8KRGmuQJiSICzcMzfUOQatELljR3SU/E+HHP2K6PKWnXaNXnXst MHp8K1hdk1sW3hVBhtvHJYDSr7ujuHeErbIwIvFc8SQctXKR+BmAe61BmYhR8+jU5qOFABmAss+ KX/7n4CSM5DO9OjSssiWHVgahzOZbLP6cmBtiWqN6eDe7yj+vd79LQhXzJDyHfRFlan05/jFgAz B7KLFFTVphluuv7GfOmtEwPr6T6fn6F6dLl2vqFz4CeF2X4BP4xRLz6Y5pRnzj+QV8dhBn9/UT/ p7eV13ARFitD7K+Zo9qyJVkzHExGA1aeRYRV2rxTO9Ldxy2oksO2uXx+/iTlZA/uaupexkG9w1G SdBxXroPYid8BeKlOwbbIo0UH1xXbXfSqUpEHLa1TdTA8OTTSQ1r12ig== X-Received: by 2002:a05:600c:8a17:20b0:480:25ae:9993 with SMTP id 5b1f17b1804b1-482db47ce2emr108464705e9.20.1770037092037; Mon, 02 Feb 2026 04:58:12 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 2/3] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA Date: Mon, 2 Feb 2026 13:57:58 +0100 Message-ID: <89f50ab2c1a1c79abea4db3a53393f974bb9a473.1770036584.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce flush_tlb_guest_local() to perform a local TLB flush of the guest's address space for the current hart. This leverages the RISC-V HFENCE.VVMA instruction, which is used to invalidate translations in the VS-stage of address translation. As for RISC-V binutils >= 2.39 is choosen, we can use hfence.vvma mnemonics instead of defining hfence.vvma using .insn. Although it would be possible to use sbi_remote_hfence_vvma() for this purpose, it is unnecessary in this context since the flush is required only on the local hart. Using the SBI call would introduce additional overhead without benefit, resulting in unnecessary performance loss. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/flushtlb.h | 7 +++++++ xen/arch/riscv/include/asm/insn-defs.h | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 xen/arch/riscv/include/asm/insn-defs.h diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index 4f64f9757058..b0112d416dbe 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -5,6 +5,7 @@ #include #include +#include #include struct page_info; @@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void) asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); } +/* Flush VS-stage TLB for current hart. */ +static inline void flush_tlb_guest_local(void) +{ + HFENCE_VVMA(0, 0); +} + /* Flush TLB of local processor for address va. */ static inline void flush_tlb_one_local(vaddr_t va) { diff --git a/xen/arch/riscv/include/asm/insn-defs.h b/xen/arch/riscv/include/asm/insn-defs.h new file mode 100644 index 000000000000..4d50b5e23c11 --- /dev/null +++ b/xen/arch/riscv/include/asm/insn-defs.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_INSN_DEFS_H +#define ASM_RISCV_INSN_DEFS_H + +#define HFENCE_VVMA(vaddr, asid) \ + asm volatile ("hfence.vvma %0, %1" \ + :: "r"(vaddr), "r"(asid) : "memory") + +#endif /* ASM_RISCV_INSN_DEFS_H */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 12:58:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 12:58:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218574.1527411 (Exim 4.92) (envelope-from ) id 1vmtVW-000665-W8; Mon, 02 Feb 2026 12:58:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218574.1527411; Mon, 02 Feb 2026 12:58:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVW-00065y-TS; Mon, 02 Feb 2026 12:58:22 +0000 Received: by outflank-mailman (input) for mailman id 1218574; Mon, 02 Feb 2026 12:58:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVW-00064e-AI for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 12:58:22 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d4897cc4-0036-11f1-b161-2bf370ae4941; Mon, 02 Feb 2026 13:58:12 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-480706554beso48047475e9.1 for ; Mon, 02 Feb 2026 04:58:12 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-482dbd0f043sm107954345e9.7.2026.02.02.04.58.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Feb 2026 04:58:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d4897cc4-0036-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770037091; x=1770641891; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SCI6k1gY6hOQ2mQg++ELmk05/We6ArMoGY0m7U5btes=; b=eVEIF2XKupOCYe1HF/FW+Ml5yT7nZQg28EDXtYJ4ZXqVIMuQwmrKBjiCiV2NCGjJK/ Jj4cdqRb8694nY2IQV5KTIHuDG7ehBfaAX3Qc8dcRi12y/zVII107HMvqOikkAj4EMp6 ejntekFx3AaTFLeRu1bBno+/xQAxPa7qs3Uav1uOcchlPAP+ybcxc9nX0pR95wUYPx0u oqmkeAusWfZxT/cOpePNSgfSgW+WrockMQTYct5qn+BmPPuLE/jS6UOASpi77O0JN8EK 23kwe95sC/gBOfpy0yR96PbJtSgG0TqqqjTf2i2ixiU0U+LrmXPGnC0NWKcoXMwiXHN2 hsFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770037091; x=1770641891; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=SCI6k1gY6hOQ2mQg++ELmk05/We6ArMoGY0m7U5btes=; b=ADw+COdCO+Z0iOLzRib+j3/UKMclRB30cCUy0+29xfD/8fhnzg9BZgi6W5DNbbD70e aXf7I1izP3fpuZP3G67kziWvSjhIp0Rs46YFrHSVH7tbQ52TAdw9CJmLTDhUGw2QQpx3 23Y2cVO8g+igN+5EupTFGlreFFWQoXwAGefaQkBkoW30ec4AWxVi370nrGn3FLTQdo1J nUIRPqoN8+0W3AF1MfcmM1hif7E2VT84VBLt7UjS4jHkq3JxMi28+IY5Kbm51zRXIr6q EiUHA3Pmxzkt7PyklN+qsRcYXwpuQPMbKDNTbrgKL6yjvQArBvi6CwiKu1ooh+d815iY RC2g== X-Gm-Message-State: AOJu0YwszNlIvAUwQhspEnZDpbj+fKxw8jTB20WUCewGozKyymUAjSQ5 CFaTmMKVKHrN02wxNvXm4ZKOsxnpDTgT7EWUVzKjz/gmwruxtdcO4bHdUqHPKA== X-Gm-Gg: AZuq6aLzBIm8thjnNuwAT3iXBKddFeGgrEiiG7ALolS23QfxOwK8BlxUWWwv8w9utSz yB1RA8KT/Tb910mZtIh/VwAPYITplH2quM8zOyaQRg9gLgMCHfd9mSSirBZXYLJ7clNZDnfF7h7 edlLq1Av5NHDAuLc2QDeHLVGDGhVcejZC9yo8rckIYqarUHFb2j8sDXwD/cLTLYtWzBl/leJHl4 9R2C3f/GXFIsrovcoOW/1VbDZix8/IzA3F4VfV6m6Ahxd0cudsJSAPwiDeGd3Plbwl0HKp5ZqdU 1mTXz+o90D1v79nfN/sQZpay2sCefhOvlT9WdvGelF60ElWMCzFsA2cd3fzCa3T6f1EQw2jDo1G Rw9EYZgma3OV3RIIu2iSQ5fin4Y1RyKOCbpHvn3eY2sy+j/MOO1NotmIArqRrWqFZRAeNHli328 9GlnslKymE9AkJaU3DIz7l8r/AGm5b9vWCfqd9RJuy/jJDObwvp8wu7g== X-Received: by 2002:a05:600c:1d1b:b0:46e:59bd:f7d3 with SMTP id 5b1f17b1804b1-482db4939d8mr145289775e9.20.1770037091020; Mon, 02 Feb 2026 04:58:11 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 1/3] xen/riscv: introduce struct arch_vcpu Date: Mon, 2 Feb 2026 13:57:57 +0100 Message-ID: <98214488c67fac866ba519c368aef697da2d2bb6.1770036584.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introdce struct arch_vcpu to hold RISC-V vCPU-specific state. The structure contains: - Guest-visible CSR state, used to save and restore vCPU execution state across context switches. hstatus isn't added here as it is already part of cpu_user_regs struct. - Callee-saved registers used to preserve Xen’s own execution context when switching between vCPU stacks. It is going to be used in the following way (pseudocode): context_switch(prev_vcpu, next_vcpu): ... /* Switch from previous stack to the next stack. */ __context_switch(prev_vcpu, next_vcpu); ... schedule_tail(prev_vcpu): Save and restore vCPU's CSRs. The Xen-saved context allows __context_switch() to switch execution from the previous vCPU’s stack to the next vCPU’s stack and later resume execution on the original stack when switching back. During vCPU creation, the Xen-saved context is going to be initialized with: - SP pointing to the newly allocated vCPU stack - RA pointing to a helper that performs final vCPU setup before transferring control to the guest After the first execution of __context_switch(), RA naturally points to the instruction following the call site, and the remaining callee-saved registers contain the Xen register state at the time of the switch. Signed-off-by: Oleksii Kurochko --- Changes in V3: - Drop gp from struct {...} xen_saved_context as it ought to be stable accross Xen so there is no need to be saved/restored and, also, it shouldn't be preserved across calls according to RISC-V ABI. - Update the comment above struct {...} xen_saved_context to make it more clear. - Drop CSRs and VCSRS comments in arch_vcpu as it is clear what kind of CSR it is based on the name. - Drop __cacheline_aligned for struct arch_vcpu as proper measurements can't be made now so it is hard to prove that the attribute really boost performance. --- Changes in v2: - Drop hstatus from struct arch_vcpu as it is stored in struct cpu_user_regs which will be stored on top of vCPU's stack. - Drop the comment above ra in xen_saved_context struct as it is potentially misleading. --- xen/arch/riscv/include/asm/domain.h | 49 +++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 316e7c6c8448..cca39effc1ba 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -24,6 +24,55 @@ struct arch_vcpu_io { struct arch_vcpu { struct vcpu_vmid vmid; + + /* + * Callee saved registers for Xen's state used to switch from + * prev's stack to the next's stack during context switch. + */ + struct + { + register_t s0; + register_t s1; + register_t s2; + register_t s3; + register_t s4; + register_t s5; + register_t s6; + register_t s7; + register_t s8; + register_t s9; + register_t s10; + register_t s11; + register_t sp; + register_t ra; + } xen_saved_context; + + register_t hedeleg; + register_t hideleg; + register_t hvip; + register_t hip; + register_t hie; + register_t hgeie; + register_t henvcfg; + register_t hcounteren; + register_t htimedelta; + register_t htval; + register_t htinst; + register_t hstateen0; +#ifdef CONFIG_RISCV_32 + register_t henvcfgh; + register_t htimedeltah; +#endif + + register_t vsstatus; + register_t vsip; + register_t vsie; + register_t vstvec; + register_t vsscratch; + register_t vscause; + register_t vstval; + register_t vsatp; + register_t vsepc; }; struct paging_domain { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 12:58:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 12:58:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218572.1527392 (Exim 4.92) (envelope-from ) id 1vmtVR-0005b2-BL; Mon, 02 Feb 2026 12:58:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218572.1527392; Mon, 02 Feb 2026 12:58:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVR-0005av-8H; Mon, 02 Feb 2026 12:58:17 +0000 Received: by outflank-mailman (input) for mailman id 1218572; Mon, 02 Feb 2026 12:58:15 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVP-0005NS-R4 for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 12:58:15 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d5b82926-0036-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 13:58:14 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4806b43beb6so32497125e9.3 for ; Mon, 02 Feb 2026 04:58:14 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-482dbd0f043sm107954345e9.7.2026.02.02.04.58.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Feb 2026 04:58:12 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d5b82926-0036-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770037093; x=1770641893; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6PCN+JMwSkisOaNF3qhnnL2HUsH6g8JJShv2LCENQeM=; b=YVlBgNaCVXNtD76XpGKsE6lEJ7z4OUjIrUDUIivzutuW6f/DHJUJ3hMnPf31qB4gpN gkHuB3ykpe+Ycc9gUaj+zg4BF8K2bKzntsGVHMoHxw+5OOGRBZol2VHaEz/1oF1m7alz bCqq2jP4WWVsJzj6h5QYLKI5bJx6dcYm5JluXQDubz0qQ055NMf799lH7vAf2S9r2k/S aSwfmTIn4calC5AUXyMsIuidw5O250md8x5iocUJM659y1x3R3DuQ2l3ip4K1VlqG0sv fPfyHuUoYsQYnqUOgz3n+z/mJVvzi3sJeuaN8cyiRIpuSk97VsdyKy6R+jdDjy3cYq2o Krog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770037093; x=1770641893; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=6PCN+JMwSkisOaNF3qhnnL2HUsH6g8JJShv2LCENQeM=; b=uQjBEb9dDuK4mhaZVpn0FTTryVivD6KtzOjEKQG9mcXWsL2TSlhohG3C8B+SQbfp4s ZIIn10p9k5dAnYT3ngfmzVtaJ7f8lQHtvVLB8NrPhIr5TR2p2PWw6Yj0cJ1QAMJRmeNk F6HLsJ3BkuoaDXZssImmhqYaWmpUSOkHAMMakgtt6R8FJQj7zAUvoAiBaERvF+cEzMMi ENALCY+zz/blRIrErXXj9tgsELJXliZqQ6Rw/LepCU8MctRydyubJtwwl7AD11wN5Hdd ByrvPEdkP0uxAmWXSsJEL5Jv6iuMlq6A9eSqK3vgzY+OiW2mcV7OFupbMlrKg3jpoBjl v7wQ== X-Gm-Message-State: AOJu0Yw3/NQ47YT4wxmtvfBqZtNtSK+e4d+n7fpmxbRHuBW7AgdiNa6r Lr7dxOylN7fn5q4vQmK2MB2lbo2P0cyZjQmwMdFOH8YrVb0w+4MdJK9/aN5oIA== X-Gm-Gg: AZuq6aKWE58m0fWF77oANglcQFAC/nVzdigvlE0bW745XT/23JM4OhaJ2E2eFNoOfYk IGCPHtj3HvRc9A5HXr+NrQKvwYrxJZv1/CGqE2pbIou1GUYNRvG0kHs251RY1pRL7LNt4phGTY1 IZzFlRNCqpc7TDTxUKsw35ureDDEo6B8L8z70lpmZLxVzKpPtYafqBVNGq2+Kqqeuf6mchPp/TV baHnCiCGinpGBSZLJ4SKGnhEeKB5wD/81gHYyj70poNGmfs/ZK96FtEc3gr4JupEz7YdKYH797R vHp0roKE+Q+htv9USolQXlzG2NvKjGTFZWWq67ZAh0z60uZ2ePZ+hqmxK/gdclXw9Fucbc4zD5t wcZQo/ovbOrCBCCpW8gbCxqTtRsc2xWUpIBl9Otdv4zYccHW0eQpY0yqt1Ua6E3C9yjqKscgop4 Wdb8C+sIyT7aqn9ZQaetp52/KYNx+XSSRfiY3KXXipyQTQbGV+dSOk3wXe3A== X-Received: by 2002:a05:600c:1549:b0:475:dde5:d91b with SMTP id 5b1f17b1804b1-482db493944mr154293685e9.17.1770037093221; Mon, 02 Feb 2026 04:58:13 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 3/3] xen/riscv: implement p2m_ctx_switch_{to,from}_state() Date: Mon, 2 Feb 2026 13:57:59 +0100 Message-ID: <2e4cd29f19945e90733ac85e023d53cecbe1d14d.1770036584.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce functions required to perform a p2m context switch during a vCPU context switch. As no mechanism is provided to atomically change vsatp and hgatp together. Hence, to prevent speculative execution causing one guest’s VS-stage translations to be cached under another guest’s VMID, world-switch code should zero vsatp in p2m_ctx_swith_from(), then construct new hgatp and write the new vsatp value in p2m_ctx_switch_to(). Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/p2m.h | 4 ++ xen/arch/riscv/p2m.c | 81 ++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index f63b5dec99b1..1d8c97326565 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, p2m_type_t *t); + +void p2m_ctx_switch_from(struct vcpu *p); +void p2m_ctx_switch_to(struct vcpu *n); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 0abeb374c110..af68497c4200 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1434,3 +1434,84 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, return get_page(page, p2m->domain) ? page : NULL; } + +void p2m_ctx_switch_from(struct vcpu *p) +{ + /* + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value. + */ + p->arch.vsatp = csr_read(CSR_VSATP); + csr_write(CSR_VSATP, 0); + + /* + * No need for VS-stage TLB flush here: + * Changing satp.MODE from Bare to other modes and vice versa also + * takes effect immediately, without the need to execute an + * SFENCE.VMA instruction. + * Note that VSATP is just VS-mode’s version of SATP, so the mentioned + * above should be true for VSATP. + */ + + /* + * Nothing to do with HGATP as it is constructed each time when + * p2m_ctx_switch_to() is called. + */ +} + +void p2m_ctx_switch_to(struct vcpu *n) +{ + struct vcpu_vmid *p_vmid = &n->arch.vmid; + uint16_t old_vmid, new_vmid; + bool need_flush; + + if ( is_idle_vcpu(n) ) + return; + + old_vmid = p_vmid->vmid; + need_flush = vmid_handle_vmenter(p_vmid); + new_vmid = p_vmid->vmid; + +#ifdef P2M_DEBUG + printk(XENLOG_INFO, "%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", + n, old_vmid, new_vmid, need_flush); +#endif + + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), + new_vmid)); + + if ( unlikely(need_flush) ) + local_hfence_gvma_all(); + + /* + * According to the RISC-V specification, speculation can happen + * during an update of hgatp and vsatp: + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value. Similarly, if henvcfg.PBMTE + * need be world-switched, it should be switched after zeroing vsatp + * but before writing the new vsatp value, obviating the need to + * execute an HFENCE.VVMA instruction. + * So just flush TLBs for VS-Stage and G-stage after both of regs are + * touched. + */ + flush_tlb_guest_local(); + + /* + * The vsatp register is a VSXLEN-bit read/write register that is + * VS-mode’s version of supervisor register satp, so the following is + * true for VSATP registers: + * Changing satp.MODE from Bare to other modes and vice versa also takes + * effect immediately, without the need to execute an SFENCE.VMA + * instruction. Likewise, changes to satp.ASID take effect immediately. + * Considering the mentioned above and that VS-stage TLB flush has been + * already done there is no need to flush VS-stage TLB after an update + * of VSATP from Bare mode to what is written in `n->arch.vsatp`. + */ + csr_write(CSR_VSATP, n->arch.vsatp); +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 12:58:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 12:58:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218571.1527382 (Exim 4.92) (envelope-from ) id 1vmtVQ-0005Nn-5B; Mon, 02 Feb 2026 12:58:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218571.1527382; Mon, 02 Feb 2026 12:58:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVQ-0005Ng-1q; Mon, 02 Feb 2026 12:58:16 +0000 Received: by outflank-mailman (input) for mailman id 1218571; Mon, 02 Feb 2026 12:58:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmtVO-0005NS-L9 for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 12:58:14 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d3eab34f-0036-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 13:58:11 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-48069a48629so45946015e9.0 for ; Mon, 02 Feb 2026 04:58:11 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This patch series originally depended on a single patch (Patch 1) from [1]. To avoid introducing a dependency on the larger patch series [1], that patch was cherry-picked into the current series, since it is the only true dependency. Patch 2 is fully independent. Patch 3 depends on Patch 1. [1] https://lore.kernel.org/xen-devel/cover.1769099883.git.oleksii.kurochko@gmail.com/T/#t Oleksii Kurochko (3): xen/riscv: introduce struct arch_vcpu xen/riscv: add support for local guest TLB flush using HFENCE.VVMA xen/riscv: implement p2m_ctx_switch_{to,from}_state() xen/arch/riscv/include/asm/domain.h | 49 ++++++++++++++++ xen/arch/riscv/include/asm/flushtlb.h | 7 +++ xen/arch/riscv/include/asm/insn-defs.h | 10 ++++ xen/arch/riscv/include/asm/p2m.h | 4 ++ xen/arch/riscv/p2m.c | 81 ++++++++++++++++++++++++++ 5 files changed, 151 insertions(+) create mode 100644 xen/arch/riscv/include/asm/insn-defs.h -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 13:51:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 13:51:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218607.1527421 (Exim 4.92) (envelope-from ) id 1vmuKa-0006DM-94; Mon, 02 Feb 2026 13:51:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218607.1527421; Mon, 02 Feb 2026 13:51:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmuKa-0006DF-63; Mon, 02 Feb 2026 13:51:08 +0000 Received: by outflank-mailman (input) for mailman id 1218607; Mon, 02 Feb 2026 13:51:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmuKZ-0006D9-Ee for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 13:51:07 +0000 Received: from DUZPR83CU001.outbound.protection.outlook.com (mail-northeuropeazlp170120005.outbound.protection.outlook.com [2a01:111:f403:c200::5]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 36962222-003e-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 14:51:03 +0100 (CET) Received: from AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:588::19) by VI0PR10MB9380.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:800:2b2::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.11; Mon, 2 Feb 2026 13:50:59 +0000 Received: from AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM ([fe80::be9f:e8ca:ee9:83e1]) by AS4PR10MB6181.EURPRD10.PROD.OUTLOOK.COM ([fe80::be9f:e8ca:ee9:83e1%6]) with mapi id 15.20.9564.014; Mon, 2 Feb 2026 13:50:59 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 36962222-003e-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=SvzxotOPprVwaSq7b27OICqbZZdMPWARxPeuhmYrLJWXZiMhEQ5+Wy+wVUCTqIbqOiWxNG4wAhOhCpZ4urTPjGLz0WkKRhxbqQU7xtvJxLRnoosEQw2foMIVHcKyLAlIWWjpsLgxFmCBPALROey3q8olRdelzKVjeIodt14rLv2IsY8qBOS019oL5/EwaN3RyfG2FUg8pSFDbYcut4sNQnVYG0l6DEDayUVXG4OKkXmIPKYkpjCoAuw3yxNfry3PuZjburgPZvOcc02wrJvRECnZMzIBANs7RZkPS5AFA27TfTLMhBjEfBxOixIWrZgR+him6CWUcoZzDgrBjVP4mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=fXATRkmSBS3hlr4oI8moLbEhZpRsYQ9uBsOirJST0lQ=; b=cTUqL4RbzNADMRVzSgcTcHuzG+myYU597xSfY4aI/Si9Fs3VTb6dIRAG0OATWnAj+zh6glcg2lAB0IT6xTGAiKbSKLzdlNOtRsVCTw0j6/qqbU/By0K4x0Ufw4qmUDukix9KSTvv4qtOUxxaSs0Oi70nOXvB3R37/Wqc7CQkvhGC4OzaBLqDgvqT5J//Qkpl3f2vE4pjaXbnaCrd2h9yg49Nn23uAP6aY3VGfeWH3wI9zFEEnf5z//f6StAwMtt+zGFXdJhZh/j8rRygc1hJn05VIV0rm+3uJy53ENmSzwbp/ZZGXOqZfQRHRPoc3AYQ2Y21XbOnSe3XqrvwDRG56A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=siemens.com; dmarc=pass action=none header.from=siemens.com; dkim=pass header.d=siemens.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=siemens.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fXATRkmSBS3hlr4oI8moLbEhZpRsYQ9uBsOirJST0lQ=; b=mDG0IrqO6HmdZHzhnihMpT7hdntY7g8hfp81YomdL9B0P2+aWaauhQ8qfMTUxU5Z2DQTRBocMF46/iVgvmvCyK9DeekECuqj4dPiAZnHyXnmyTREwUkqum1+hWGZV7uORN9AmnbOEXiSrH83GXx1ivGNIAbQ/eBr6vuWH2PQ8Wc6wH+ERax90QYnPPBbBA2fhs3uHQ3tr7k4N85Tpo66dbcuPn74yAfuxZ1UkcJ1RplHVUfEUw/rGNk/j5TEZHOuKjj/KVIosnm2dPTxhMZrnM+Nm/FTBQziXkd+/Wpt+IEDtBfGYqZQFLSYGMTPRBBM2d8Whai4weDIlgW1nepjAg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siemens.com; Message-ID: Date: Mon, 2 Feb 2026 14:50:44 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/defconfig: add CONFIG_IRQ_REMAP To: Andrew Cooper , Shashank Balaji , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-2-71c8f488a88b@sony.com> <7469ab46-94c9-48c8-b6e7-b500550768a9@citrix.com> From: Jan Kiszka Content-Language: en-US Autocrypt: addr=jan.kiszka@siemens.com; keydata= xsFNBGZY+hkBEACkdtFD81AUVtTVX+UEiUFs7ZQPQsdFpzVmr6R3D059f+lzr4Mlg6KKAcNZ uNUqthIkgLGWzKugodvkcCK8Wbyw+1vxcl4Lw56WezLsOTfu7oi7Z0vp1XkrLcM0tofTbClW xMA964mgUlBT2m/J/ybZd945D0wU57k/smGzDAxkpJgHBrYE/iJWcu46jkGZaLjK4xcMoBWB I6hW9Njxx3Ek0fpLO3876bszc8KjcHOulKreK+ezyJ01Hvbx85s68XWN6N2ulLGtk7E/sXlb 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X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Z1T6xcS+yFPWwMhyV7E89b40MzeUNoePMqGD3p3/tkoRyhlgM4UirFDK23/RvtEPJtLOuVIPgoocK+hP+sz8xA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR10MB9380 On 02.02.26 13:12, Andrew Cooper wrote: > On 02/02/2026 11:54 am, Jan Kiszka wrote: >> On 02.02.26 12:35, Andrew Cooper wrote: >>> On 02/02/2026 9:51 am, Shashank Balaji wrote: >>>> Interrupt remapping is an architectural dependency of x2apic, which is already >>>> enabled in the defconfig. >>> There is no such dependency.  VMs for example commonly have x2APIC and >>> no IOMMU, and even native system with fewer than 254 CPUs does not need >>> interrupt remapping for IO-APIC interrupts to function correctly. >>> >> It is theoretically possible with less than 254 CPUs, and that is why >> virtualization uses it, but the Intel SDM clearly states: >> >> "Routing of device interrupts to local APIC units operating in x2APIC >> mode requires use of the interrupt-remapping architecture specified in >> the Intel® Virtualization Technology for Directed I/O (Revision 1.3 >> and/or later versions)." > > This statement is misleading and has been argued over before.  It's > missing the key word "all". > > What IR gets you in this case is the ability to target CPU 255 and higher. > > The OS-side access mechanism (xAPIC MMIO vs x2APIC MSRs) has no baring > on how external interrupts are handled in the fabric. > > There are plenty of good reasons to have Interrupt Remapping enabled > when available, but it is not a hard requirement architecturally. > If that is true, then this patch is the wrong one to blame because it only reacts on existing kernel logic and repeats the arguments that are in the code and even provided to kernel users. If you have hard proof that the existing code is wrong (some confirmation from Intel folks would be "nice" I guess), then propose a patch to change that logic. Jan -- Siemens AG, Foundational Technologies Linux Expert Center From xen-devel-bounces@lists.xenproject.org Mon Feb 02 13:57:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 13:57:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218617.1527444 (Exim 4.92) (envelope-from ) id 1vmuQp-0006yJ-0I; Mon, 02 Feb 2026 13:57:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218617.1527444; Mon, 02 Feb 2026 13:57:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmuQo-0006yC-Tb; Mon, 02 Feb 2026 13:57:34 +0000 Received: by outflank-mailman (input) for mailman id 1218617; Mon, 02 Feb 2026 13:57:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmuQo-0006y6-7H for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 13:57:34 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1ad763a2-003f-11f1-b161-2bf370ae4941; Mon, 02 Feb 2026 14:57:26 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4359a16a400so3829997f8f.1 for ; Mon, 02 Feb 2026 05:57:26 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 02 Feb 2026 05:57:25 -0800 (PST) Message-ID: <57dca154-5ef9-4c03-bd88-fe5e20d7cc2a@suse.com> Date: Mon, 2 Feb 2026 14:57:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 0/3] RISC-V: p2m context switch To: Oleksii Kurochko , xen-devel@lists.xenproject.org Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 13:57, Oleksii Kurochko wrote: > Introduce functions required to perform a p2m context switch during a vCPU > context switch. > > This patch series originally depended on a single patch (Patch 1) from [1]. > To avoid introducing a dependency on the larger patch series [1], > that patch was cherry-picked into the current series, since it is the > only true dependency. But its versioning is now broken. A v2 of that was already posted, and now we have a (newer) v1, with a revision log claiming it's v3. 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Mon, 02 Feb 2026 06:08:57 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 15:08:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/3] xen/riscv: introduce struct arch_vcpu To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , xen-devel@lists.xenproject.org, Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <98214488c67fac866ba519c368aef697da2d2bb6.1770036584.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <98214488c67fac866ba519c368aef697da2d2bb6.1770036584.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 13:57, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -24,6 +24,55 @@ struct arch_vcpu_io { > > struct arch_vcpu { > struct vcpu_vmid vmid; Nit: This being already here contradicts the title saying "introduce". > + > + /* > + * Callee saved registers for Xen's state used to switch from > + * prev's stack to the next's stack during context switch. > + */ > + struct > + { > + register_t s0; > + register_t s1; > + register_t s2; > + register_t s3; > + register_t s4; > + register_t s5; > + register_t s6; > + register_t s7; > + register_t s8; > + register_t s9; > + register_t s10; > + register_t s11; > + register_t sp; > + register_t ra; > + } xen_saved_context; > + > + register_t hedeleg; > + register_t hideleg; > + register_t hvip; > + register_t hip; > + register_t hie; > + register_t hgeie; > + register_t henvcfg; > + register_t hcounteren; > + register_t htimedelta; > + register_t htval; > + register_t htinst; > + register_t hstateen0; > +#ifdef CONFIG_RISCV_32 > + register_t henvcfgh; > + register_t htimedeltah; > +#endif When you add these right away, any reason other high-half registers aren't added as well? HVIP (above) and VSIE / VSIP at the very least have such counterparts, iirc. > + register_t vsstatus; > + register_t vsip; > + register_t vsie; > + register_t vstvec; > + register_t vsscratch; > + register_t vscause; > + register_t vstval; > + register_t vsatp; > + register_t vsepc; > }; What I'm generally concerned of: With the registers all being put here in one go, without any of them actually being used in this patch, it'll likely be harder to track that they're saved / restored / initialized correctly (once uses appear). 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Mon, 02 Feb 2026 06:22:51 -0800 (PST) Message-ID: <6d58fd59-000f-48b8-85de-07065c82c275@suse.com> Date: Mon, 2 Feb 2026 15:22:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 2 To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <58a7723ec48d84b91fd4730fe3ae653f55a0fd99.1769099885.git.oleksii.kurochko@gmail.com> <1bd0726d-20d8-4506-bb8e-849fd8b091a7@suse.com> <5fd2bbce-7d27-4f54-8eed-5bee0d2a6dd2@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5fd2bbce-7d27-4f54-8eed-5bee0d2a6dd2@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 11:50, Oleksii Kurochko wrote: > On 1/29/26 6:01 PM, Jan Beulich wrote: >> On 22.01.2026 17:47, Oleksii Kurochko wrote: >>> This patch is based on Linux kernel 6.16.0. >>> +void vcpu_sync_interrupts(struct vcpu *v) >>> +{ >>> + unsigned long hvip; >>> + >>> + /* Read current HVIP and VSIE CSRs */ >>> + v->arch.vsie = csr_read(CSR_VSIE); >>> + >>> + /* Sync-up HVIP.VSSIP bit changes does by Guest */ >> Nit: s/does/done/ ? >> >>> + hvip = csr_read(CSR_HVIP); >>> + if ( (v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL) ) >>> + { >>> + if ( !test_and_set_bit(IRQ_VS_SOFT, >>> + &v->arch.irqs_pending_mask) ) >> Why two separate, nested if()s? > > Do you mean that it could be: > if ( !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) && (hvip & BIT(IRQ_VS_SOFT, UL)) > ? That's combining with the if() ... >>> + { >>> + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) ... down here, which - ... >>> + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); >>> + else ... having an "else" - can't be folded like this, I think. I meant the two if()s immediately ahead of my remark. >>> + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); >>> + } >> In the previous patch you set forth strict ordering rules, with a barrier in >> the middle. All of this is violated here. > > It still respects the rule that the producer (|vcpu_sync_interrupts()| which > should be in the producer path) never clears the mask and only writes to > |irqs_pending| if it is the one that flipped the corresponding mask bit from 0 > to 1. > > Considering that the consumer cannot be called concurrently in this case > (since|vcpu_flush_interrupts()| and|vcpu_sync_interrupts()| are only invoked > sequentially in|check_for_pcpu_work()|, as mentioned above), nothing can > clear a bit in the mask in between. Therefore, I think it is acceptable to > slightly bend (and it should be explained in the comment above the > function or in the commit message) the rule that the|irqs_pending| bit must > be written first, followed by updating the corresponding bit in > |irqs_pending_mask() specifically for |vcpu_sync_interrupts(). With suitable commenting - yes. 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Mon, 02 Feb 2026 06:40:39 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 15:40:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/6] x86/PCI: avoid re-evaluation of extended config space accessibility To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Stewart Hildebrand References: <1bcdd2dd-9b2b-4eb2-a569-e28b03c1e1fb@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 11:13, Roger Pau Monné wrote: > On Mon, Feb 02, 2026 at 10:30:29AM +0100, Jan Beulich wrote: >> On 02.02.2026 10:14, Roger Pau Monné wrote: >>> On Mon, Feb 02, 2026 at 09:51:18AM +0100, Jan Beulich wrote: >>>> On 29.01.2026 14:10, Jan Beulich wrote: >>>>> @@ -160,10 +161,13 @@ int pci_mmcfg_arch_enable(unsigned int i >>>>> return 0; >>>>> } >>>>> >>>>> -void pci_mmcfg_arch_disable(unsigned int idx) >>>>> +int pci_mmcfg_arch_disable(unsigned int idx) >>>>> { >>>>> const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; >>>>> >>>>> + if ( !pci_mmcfg_virt[idx].virt ) >>>>> + return 1; >>>> >>>> Afaict this is what causes CI (adl-*) to say no here: >>>> >>>> (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff >>>> (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- >>>> (XEN) [ 4.132700] CPU: 12 >>>> (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 >>>> (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) >>>> (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 >>>> (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec >>>> (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 >>>> (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 >>>> (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c >>>> (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 >>>> (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 >>>> (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 >>>> (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 >>>> (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): >>>> (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 >>>> (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: >>>> (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 >>>> (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 >>>> (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 >>>> (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b >>>> (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 >>>> (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef >>>> (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba >>>> (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 >>>> (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 >>>> (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 >>>> (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 >>>> (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 >>>> (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 >>>> (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 >>>> (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 >>>> (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 >>>> (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 >>>> (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 >>>> (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 >>>> (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a >>>> (XEN) [ 4.132816] Xen call trace: >>>> (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 >>>> (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e >>>> (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b >>>> (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 >>>> (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 >>>> (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 >>>> (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 >>>> (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 >>>> (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 >>>> (XEN) [ 4.132847] >>>> (XEN) [ 4.132848] Pagetable walk from ffff808000300100: >>>> (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff >>>> >>>> There is an important comment in pci_mmcfg_arch_disable(): >>>> >>>> /* >>>> * Don't use destroy_xen_mappings() here, or make sure that at least >>>> * the necessary L4 entries get populated (so that they get properly >>>> * propagated to guest domains' page tables). >>>> */ >>>> >>>> Hence it is wrong to bypass >>>> >>>> mcfg_ioremap(cfg, idx, 0); >>> >>> Hm, I see. The L4 slot must be unconditionally populated before we >>> clone the idle page-table, otherwise the mappings won't propagate. >>> >>> What about unconditionally populating the L4 slot in >>> subarch_init_memory()? That seems less fragile than doing it in >>> pci_mmcfg_arch_disable(). >> >> Less fragile - perhaps. Yet I don't see why we should populate the field if >> we wouldn't ever need it. Of course with violating layering some, we could >> know in subarch_init_memory(), as pci_setup() runs earlier. > > How can Xen be sure at setup time that the slot will never be used? > The MMCFG could be empty initially when parsed by Xen, but MMCFG > regions might appear as a result of AML method execution (_CBA and > _CRS methods in hotplug host bridges). Their usability may change, but how many of them there are (going to be) we need to know at boot time. See how pci_mmcfg_config_num, pci_mmcfg_config[], and pci_mmcfg_virt[] are initialized (all by __init functions). If regions could truly appear "out of the blue", we'd have a bigger problem. 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Mon, 02 Feb 2026 06:43:05 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 15:43:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] PCI/regs: minimal adjustments for Misra rule 7.2 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit As was recently noticed with PCI_X_STATUS_533MHZ, leaving presently unused #define-s in non-Misra-compliant shape (7.2 is "A `u' or `U' suffix shall be applied to all integer constants that are represented in an unsigned type") is putting new code actually using any of the constants at risk of then causing Misra scan failures in CI. Adjust those few constants which strictly require a suffix. Signed-off-by: Jan Beulich --- a/xen/include/xen/pci_regs.h +++ b/xen/include/xen/pci_regs.h @@ -272,7 +272,7 @@ #define PCI_AGP_VERSION 2 /* BCD version number */ #define PCI_AGP_RFU 3 /* Rest of capability flags */ #define PCI_AGP_STATUS 4 /* Status register */ -#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */ +#define PCI_AGP_STATUS_RQ_MASK 0xff000000U /* Maximum number of requests - 1 */ #define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */ #define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */ #define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */ @@ -280,7 +280,7 @@ #define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */ #define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */ #define PCI_AGP_COMMAND 8 /* Control register */ -#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */ +#define PCI_AGP_COMMAND_RQ_MASK 0xff000000U /* Master: Maximum number of requests */ #define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */ #define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */ #define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */ @@ -582,7 +582,7 @@ #define HT_MSI_FLAGS_FIXED 0x2 /* Fixed mapping only */ #define HT_MSI_FIXED_ADDR 0x00000000FEE00000ULL /* Fixed addr */ #define HT_MSI_ADDR_LO 0x04 /* Offset to low addr bits */ -#define HT_MSI_ADDR_LO_MASK 0xFFF00000 /* Low address bit mask */ +#define HT_MSI_ADDR_LO_MASK 0xFFF00000U /* Low address bit mask */ #define HT_MSI_ADDR_HI 0x08 /* Offset to high addr bits */ #define HT_CAPTYPE_DIRECT_ROUTE 0xB0 /* Direct routing configuration */ #define HT_CAPTYPE_VCSET 0xB8 /* Virtual Channel configuration */ From xen-devel-bounces@lists.xenproject.org Mon Feb 02 14:45:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 14:45:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218659.1527494 (Exim 4.92) (envelope-from ) id 1vmvBM-00073R-Eo; Mon, 02 Feb 2026 14:45:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218659.1527494; Mon, 02 Feb 2026 14:45:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmvBM-00073K-Bx; Mon, 02 Feb 2026 14:45:40 +0000 Received: by outflank-mailman (input) for mailman id 1218659; Mon, 02 Feb 2026 14:45:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmvBL-00073E-Hj for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 14:45:39 +0000 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [2a00:1450:4864:20::341]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d634295d-0045-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 15:45:37 +0100 (CET) Received: by mail-wm1-x341.google.com with SMTP id 5b1f17b1804b1-481188b7760so29782395e9.0 for ; Mon, 02 Feb 2026 06:45:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -99,6 +99,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -26,6 +26,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -40,6 +40,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ From xen-devel-bounces@lists.xenproject.org Mon Feb 02 14:56:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 14:56:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218674.1527515 (Exim 4.92) (envelope-from ) id 1vmvLs-0000Tq-Fr; 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Adjust those few constants which > strictly require a suffix. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon Feb 02 15:03:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 15:03:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218682.1527526 (Exim 4.92) (envelope-from ) id 1vmvSO-0002Bx-5D; Mon, 02 Feb 2026 15:03:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218682.1527526; Mon, 02 Feb 2026 15:03:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmvSO-0002Bq-2L; Mon, 02 Feb 2026 15:03:16 +0000 Received: by outflank-mailman (input) for mailman id 1218682; Mon, 02 Feb 2026 15:03:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmvSM-0002Bh-J6 for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 15:03:14 +0000 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 478f50c8-0048-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 16:03:08 +0100 (CET) Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 07:03:06 -0800 Received: from lkp-server01.sh.intel.com (HELO 765f4a05e27f) ([10.239.97.150]) by fmviesa008.fm.intel.com with ESMTP; 02 Feb 2026 07:03:00 -0800 Received: from kbuild by 765f4a05e27f with local (Exim 4.98.2) (envelope-from ) id 1vmvS4-00000000ffw-49bj; Mon, 02 Feb 2026 15:02:56 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 478f50c8-0048-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770044588; x=1801580588; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=f4jiSWaAUMy80OsaVE6o84JI4KEEK5M17ot8dH2cPts=; b=amKUcJQGy4d7dAO4Cv+CRx7Bb39fi4/YwXfTLqhIpC43OWDztsqd8r6B gfVShaBOXIVMdvnvLE9pENMQknkr4XjGyXAETZyyL7U0prLjF4qABj0yV YE0rOyudXRv80TLpmnAlQZR1jYr0zkvU3TdwgS21JEkWuoRCf5luqk/Fq jB90Lr3iHxjFuZrrNwJp2ggK1oukeR/O19p8Iy6Kb2T6OIkmm5yxGr1WL Tk88iL2gDAlL4oYfmAxhB5xCSCwexP/UGIE1cUH8Y2LhM713isaJy80+s jwqN0LxI0+jFNkFcnUklOVWt7X8LLhYvPyssuH1lMQSpiWKS97qhC5nkw A==; X-CSE-ConnectionGUID: Je93ZHC0Tz+CO4NY0upsJg== X-CSE-MsgGUID: dCccp1sDQWmH697FmaTPpA== X-IronPort-AV: E=McAfee;i="6800,10657,11690"; a="71099594" X-IronPort-AV: E=Sophos;i="6.21,269,1763452800"; d="scan'208";a="71099594" X-CSE-ConnectionGUID: 1Sm55USrTViCYi6oLwwXlg== X-CSE-MsgGUID: ZhozEz8UQCq9wlrljDbqsQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,269,1763452800"; d="scan'208";a="209698373" Date: Mon, 2 Feb 2026 23:02:50 +0800 From: kernel test robot To: Shashank Balaji , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: <202602022242.iSdFHMDI-lkp@intel.com> References: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> Hi Shashank, kernel test robot noticed the following build errors: [auto build test ERROR on 18f7fcd5e69a04df57b563360b88be72471d6b62] url: https://github.com/intel-lab-lkp/linux/commits/Shashank-Balaji/x86-x2apic-disable-x2apic-on-resume-if-the-kernel-expects-so/20260202-181147 base: 18f7fcd5e69a04df57b563360b88be72471d6b62 patch link: https://lore.kernel.org/r/20260202-x2apic-fix-v1-1-71c8f488a88b%40sony.com patch subject: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so config: x86_64-buildonly-randconfig-001-20260202 (https://download.01.org/0day-ci/archive/20260202/202602022242.iSdFHMDI-lkp@intel.com/config) compiler: gcc-14 (Debian 14.2.0-19) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260202/202602022242.iSdFHMDI-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202602022242.iSdFHMDI-lkp@intel.com/ All errors (new ones prefixed by >>): arch/x86/kernel/apic/apic.c: In function 'lapic_resume': >> arch/x86/kernel/apic/apic.c:2463:17: error: implicit declaration of function '__x2apic_disable'; did you mean '__x2apic_enable'? [-Wimplicit-function-declaration] 2463 | __x2apic_disable(); | ^~~~~~~~~~~~~~~~ | __x2apic_enable vim +2463 arch/x86/kernel/apic/apic.c 2435 2436 static void lapic_resume(void *data) 2437 { 2438 unsigned int l, h; 2439 unsigned long flags; 2440 int maxlvt; 2441 2442 if (!apic_pm_state.active) 2443 return; 2444 2445 local_irq_save(flags); 2446 2447 /* 2448 * IO-APIC and PIC have their own resume routines. 2449 * We just mask them here to make sure the interrupt 2450 * subsystem is completely quiet while we enable x2apic 2451 * and interrupt-remapping. 2452 */ 2453 mask_ioapic_entries(); 2454 legacy_pic->mask_all(); 2455 2456 if (x2apic_mode) { 2457 __x2apic_enable(); 2458 } else { 2459 /* 2460 * x2apic may have been re-enabled by the 2461 * firmware on resuming from s2ram 2462 */ > 2463 __x2apic_disable(); 2464 2465 /* 2466 * Make sure the APICBASE points to the right address 2467 * 2468 * FIXME! This will be wrong if we ever support suspend on 2469 * SMP! We'll need to do this as part of the CPU restore! 2470 */ 2471 if (boot_cpu_data.x86 >= 6) { 2472 rdmsr(MSR_IA32_APICBASE, l, h); 2473 l &= ~MSR_IA32_APICBASE_BASE; 2474 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; 2475 wrmsr(MSR_IA32_APICBASE, l, h); 2476 } 2477 } 2478 2479 maxlvt = lapic_get_maxlvt(); 2480 apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); 2481 apic_write(APIC_ID, apic_pm_state.apic_id); 2482 apic_write(APIC_DFR, apic_pm_state.apic_dfr); 2483 apic_write(APIC_LDR, apic_pm_state.apic_ldr); 2484 apic_write(APIC_TASKPRI, apic_pm_state.apic_taskpri); 2485 apic_write(APIC_SPIV, apic_pm_state.apic_spiv); 2486 apic_write(APIC_LVT0, apic_pm_state.apic_lvt0); 2487 apic_write(APIC_LVT1, apic_pm_state.apic_lvt1); 2488 #ifdef CONFIG_X86_THERMAL_VECTOR 2489 if (maxlvt >= 5) 2490 apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr); 2491 #endif 2492 #ifdef CONFIG_X86_MCE_INTEL 2493 if (maxlvt >= 6) 2494 apic_write(APIC_LVTCMCI, apic_pm_state.apic_cmci); 2495 #endif 2496 if (maxlvt >= 4) 2497 apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc); 2498 apic_write(APIC_LVTT, apic_pm_state.apic_lvtt); 2499 apic_write(APIC_TDCR, apic_pm_state.apic_tdcr); 2500 apic_write(APIC_TMICT, apic_pm_state.apic_tmict); 2501 apic_write(APIC_ESR, 0); 2502 apic_read(APIC_ESR); 2503 apic_write(APIC_LVTERR, apic_pm_state.apic_lvterr); 2504 apic_write(APIC_ESR, 0); 2505 apic_read(APIC_ESR); 2506 2507 irq_remapping_reenable(x2apic_mode); 2508 2509 local_irq_restore(flags); 2510 } 2511 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki From xen-devel-bounces@lists.xenproject.org Mon Feb 02 15:19:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 15:19:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218696.1527537 (Exim 4.92) (envelope-from ) id 1vmvhU-00049y-Jb; Mon, 02 Feb 2026 15:18:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218696.1527537; Mon, 02 Feb 2026 15:18:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmvhU-00049r-Em; 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> >>>>> } > >>>>> > >>>>> -void pci_mmcfg_arch_disable(unsigned int idx) > >>>>> +int pci_mmcfg_arch_disable(unsigned int idx) > >>>>> { > >>>>> const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; > >>>>> > >>>>> + if ( !pci_mmcfg_virt[idx].virt ) > >>>>> + return 1; > >>>> > >>>> Afaict this is what causes CI (adl-*) to say no here: > >>>> > >>>> (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff > >>>> (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > >>>> (XEN) [ 4.132700] CPU: 12 > >>>> (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 > >>>> (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) > >>>> (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 > >>>> (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec > >>>> (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 > >>>> (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 > >>>> (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c > >>>> (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 > >>>> (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 > >>>> (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 > >>>> (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 > >>>> (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): > >>>> (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 > >>>> (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: > >>>> (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 > >>>> (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 > >>>> (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 > >>>> (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b > >>>> (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 > >>>> (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef > >>>> (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba > >>>> (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 > >>>> (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 > >>>> (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 > >>>> (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 > >>>> (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 > >>>> (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 > >>>> (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 > >>>> (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 > >>>> (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 > >>>> (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 > >>>> (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 > >>>> (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 > >>>> (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a > >>>> (XEN) [ 4.132816] Xen call trace: > >>>> (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 > >>>> (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e > >>>> (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b > >>>> (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 > >>>> (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 > >>>> (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 > >>>> (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 > >>>> (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 > >>>> (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 > >>>> (XEN) [ 4.132847] > >>>> (XEN) [ 4.132848] Pagetable walk from ffff808000300100: > >>>> (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff > >>>> > >>>> There is an important comment in pci_mmcfg_arch_disable(): > >>>> > >>>> /* > >>>> * Don't use destroy_xen_mappings() here, or make sure that at least > >>>> * the necessary L4 entries get populated (so that they get properly > >>>> * propagated to guest domains' page tables). > >>>> */ > >>>> > >>>> Hence it is wrong to bypass > >>>> > >>>> mcfg_ioremap(cfg, idx, 0); > >>> > >>> Hm, I see. The L4 slot must be unconditionally populated before we > >>> clone the idle page-table, otherwise the mappings won't propagate. > >>> > >>> What about unconditionally populating the L4 slot in > >>> subarch_init_memory()? That seems less fragile than doing it in > >>> pci_mmcfg_arch_disable(). > >> > >> Less fragile - perhaps. Yet I don't see why we should populate the field if > >> we wouldn't ever need it. Of course with violating layering some, we could > >> know in subarch_init_memory(), as pci_setup() runs earlier. > > > > How can Xen be sure at setup time that the slot will never be used? > > The MMCFG could be empty initially when parsed by Xen, but MMCFG > > regions might appear as a result of AML method execution (_CBA and > > _CRS methods in hotplug host bridges). > > Their usability may change, but how many of them there are (going to be) we > need to know at boot time. See how pci_mmcfg_config_num, pci_mmcfg_config[], > and pci_mmcfg_virt[] are initialized (all by __init functions). If regions > could truly appear "out of the blue", we'd have a bigger problem. My copy of the PCI Firmware Spec v3.3 contains: "4.1.2. MCFG Table Description The MCFG table is an ACPI table that is used to communicate the base addresses corresponding to the non-hot removable PCI Segment Groups range within a PCI Segment Group available to the operating system at boot. [...] 4.1.3. The _CBA Method Some systems may support hot plug of host bridges that introduce either a range of buses within an existing PCI Segment Group or introduce a new PCI Segment Group. For example, each I/O chip in a multi-chip PCI Express root complex implementation could start a new PCI Segment Group." Together with this: "The MCFG table format allows for more than one memory mapped base address entry provided each entry (memory mapped configuration space base address allocation structure) corresponds to a unique PCI Segment Group consisting of 256 PCI buses. Multiple entries corresponding to a single PCI Segment Group is not allowed." Given that each segment group can only appear once in the MCFG, and that the _CBA method can introduce new segment groups, it would seem to me the spec does allow for new segments appearing exclusively as the return of _CBA method? It does read as if hot-removable segment groups must not appear in the MCFG table. I'm not finding any clear statement in the spec that says that ECAM areas must previously appear in the MCFG table. I'm not sure how common that is, but it doesn't seem impossible given my reading of the spec. Thanks, Roger. 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Mon, 02 Feb 2026 07:29:28 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 16:29:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/4] xen/mm: remove aliasing of PGC_need_scrub over PGC_allocated To: Roger Pau Monne Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Alistair Francis , Connor Davis , Oleksii Kurochko , xen-devel@lists.xenproject.org References: <20260130145726.85907-1-roger.pau@citrix.com> <20260130145726.85907-2-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260130145726.85907-2-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 30.01.2026 15:57, Roger Pau Monne wrote: > Future changes will care about the state of the PGC_need_scrub flag even > when pages have the PGC_allocated set, and hence it's no longer possible to > alias both values. Also introduce PGC_need_scrub to the set of preserved > flags, so it's not dropped by assign_pages(). > > No functional change intended, albeit the page counter on x86 looses a bit. > > Suggested-by: Jan Beulich > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon Feb 02 15:45:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 15:45:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218714.1527556 (Exim 4.92) (envelope-from ) id 1vmw6p-00004r-Kk; Mon, 02 Feb 2026 15:45:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218714.1527556; Mon, 02 Feb 2026 15:45:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmw6p-0008WQ-I1; Mon, 02 Feb 2026 15:45:03 +0000 Received: by outflank-mailman (input) for mailman id 1218714; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ES+ieoLD5uUoVz6BKe774jv+TQNngUc/F3XNxshb/bGwCsXU6vRdjKbcUTu6ejA9pFoCEnc1Bca6UTCqgiJBWnBv74HWNfJeWneoyS8EvOL+N15O6zcBDqmrajNFaYE2dIQW9unjdQRooeSVD+9jiIKUu6Zzpq8aq6LHzH9ZKtM83o69lCcGCWTQS+CltVX6tfkuEKJsaYKu4AUoQZTGNdS6WkVJ9wgwS5i76nA4ZdrYatOVemBzVn8VoFxgsyuOz4wTlBmDd0TLf1DVyKY4haW4MXGnVUPnFmiNY97tN0wf0Lgi5P7mSZXfoAaj2vEKOkEJfu6Du7b9C9RtOSDTVv1SqJgNNLY6tVigx86LUaAXp2BX0BUYJeQi38Z6xFptFU79U0fOlPWPT1XSgLFJ3Qw8ZDWCPH9nia0J5SWzcYoDaY2QR6oAB6Vv1aS32fzo X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2026 15:44:49.4276 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5bb3cc29-c944-4e1e-36a7-08de6271ffc5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF0001C710.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB10724 Hi Jan, I checked that xen on arm is still compiling properly with that so > On 2 Feb 2026, at 15:45, Jan Beulich wrote: >=20 > Extend commit 1df11ccceb1a ("symbols: check table sizes don't change > between linking passes 2 and 3") to other ports as well. >=20 > Signed-off-by: Jan Beulich For Arm: Acked-by: Bertrand Marquis Cheers Bertrand >=20 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -99,6 +99,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=3D$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=3Dsysv $@ \ > --- a/xen/arch/ppc/Makefile > +++ b/xen/arch/ppc/Makefile > @@ -26,6 +26,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=3D$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=3Dsysv $@ \ > --- a/xen/arch/riscv/Makefile > +++ b/xen/arch/riscv/Makefile > @@ -40,6 +40,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=3D$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=3Dsysv $@ \ From xen-devel-bounces@lists.xenproject.org Mon Feb 02 15:50:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 15:50:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218723.1527566 (Exim 4.92) (envelope-from ) id 1vmwCK-0001oJ-Bc; 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While the pointer > typically is allocated once for a CPU and then only read (i.e. wants to be > marked read-mostly), the same isn't necessarily true for the array case. > There things depend on how the variable is actually used. cpu_core_mask > and cpu_sibling_mask (which all architectures have inherited from x86, > which in turn is possibly wrong) are altered only as CPUs are brought up > or down, so may remain uniformly read-mostly. Other (x86-only) instances > want to change, to avoid disturbing adjacent read-mostly data. > > While doing the x86 adjustment, also do one in the opposite direction, > i.e. where there was no read-mostly annotation when it is applicable in > the "pointer" case. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné > --- > Really in the pointer case it would be nice if the allocations could then > also come from "read-mostly" space. Hm, I guess for some of them yes, it would make sense to come from __read_mostly space, but would require passing an extra parameter to the DEFINE_ helper? Or introduce another variant. Thanks, Roger. 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> > - if ( vector < FIRST_DYNAMIC_VECTOR ) > + if ( vector < FIRST_IRQ_VECTOR ) Should vector also be rejected if it's > LAST_IRQ_VECTOR? Thanks, Roger. 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Mon, 02 Feb 2026 07:59:06 -0800 (PST) Message-ID: <7eed3c7e-b3e8-4a0c-bd6d-c4ba22bb1c10@suse.com> Date: Mon, 2 Feb 2026 16:59:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CPU: abstract read-mostly-ness for per-CPU cpumask_var_t variables To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 16:50, Roger Pau Monné wrote: > On Wed, Nov 12, 2025 at 04:53:27PM +0100, Jan Beulich wrote: >> cpumask_var_t can resolve to a pointer or to an array. While the pointer >> typically is allocated once for a CPU and then only read (i.e. wants to be >> marked read-mostly), the same isn't necessarily true for the array case. >> There things depend on how the variable is actually used. cpu_core_mask >> and cpu_sibling_mask (which all architectures have inherited from x86, >> which in turn is possibly wrong) are altered only as CPUs are brought up >> or down, so may remain uniformly read-mostly. Other (x86-only) instances >> want to change, to avoid disturbing adjacent read-mostly data. >> >> While doing the x86 adjustment, also do one in the opposite direction, >> i.e. where there was no read-mostly annotation when it is applicable in >> the "pointer" case. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- >> Really in the pointer case it would be nice if the allocations could then >> also come from "read-mostly" space. > > Hm, I guess for some of them yes, it would make sense to come from > __read_mostly space, but would require passing an extra parameter to > the DEFINE_ helper? Or introduce another variant. Whether this could be sorted purely at the macro wrapper layer I'm not sure. It's the actual allocation (which alloc_cpumask_var() et al do) which would need to be more sophisticated than a simple _x[mz]alloc(). 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By moving them to separate archive > members, the linker simply will not pick them up when not needed. > > As the CPUID and MSR ones are always used together, put the "from" and > "to" variants of each together in one file respectively. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:01:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:01:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218757.1527616 (Exim 4.92) (envelope-from ) id 1vmwMx-0005qH-7p; Mon, 02 Feb 2026 16:01:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218757.1527616; Mon, 02 Feb 2026 16:01:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwMx-0005q7-4h; Mon, 02 Feb 2026 16:01:43 +0000 Received: by outflank-mailman (input) for mailman id 1218757; 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Presumably because of the substantial increase in preprocessed output? > > Signed-off-by: Jan Beulich > --- > This is an alternative to "x86: guard synthetic feature and bug > enumerators", bulding upon the expectation that when adding to the end of > either list people will notice the sentinel and not forget to update it. The extra preprocessing overhead is not ideal, but it's certainly preferable to the first version. Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:05:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:05:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218774.1527626 (Exim 4.92) (envelope-from ) id 1vmwQH-0006k0-Pv; Mon, 02 Feb 2026 16:05:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218774.1527626; Mon, 02 Feb 2026 16:05:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwQH-0006jt-N5; Mon, 02 Feb 2026 16:05:09 +0000 Received: by outflank-mailman (input) for mailman id 1218774; Mon, 02 Feb 2026 16:05:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwQG-0006jn-TN for xen-devel@lists.xenproject.org; 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While the pointer > >> typically is allocated once for a CPU and then only read (i.e. wants to be > >> marked read-mostly), the same isn't necessarily true for the array case. > >> There things depend on how the variable is actually used. cpu_core_mask > >> and cpu_sibling_mask (which all architectures have inherited from x86, > >> which in turn is possibly wrong) are altered only as CPUs are brought up > >> or down, so may remain uniformly read-mostly. Other (x86-only) instances > >> want to change, to avoid disturbing adjacent read-mostly data. > >> > >> While doing the x86 adjustment, also do one in the opposite direction, > >> i.e. where there was no read-mostly annotation when it is applicable in > >> the "pointer" case. > >> > >> Signed-off-by: Jan Beulich > > > > Acked-by: Roger Pau Monné > > Thanks. > > >> --- > >> Really in the pointer case it would be nice if the allocations could then > >> also come from "read-mostly" space. > > > > Hm, I guess for some of them yes, it would make sense to come from > > __read_mostly space, but would require passing an extra parameter to > > the DEFINE_ helper? Or introduce another variant. > > Whether this could be sorted purely at the macro wrapper layer I'm not > sure. It's the actual allocation (which alloc_cpumask_var() et al do) > which would need to be more sophisticated than a simple _x[mz]alloc(). For the array case it could be sorted out in the macro wrapper - for the pointer case it would need to be sorted at allocation, which makes this quite weird to deal with. Anyway, this is better than nothing I guess. Thanks, Roger. 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Mon, 02 Feb 2026 08:12:39 -0800 (PST) Message-ID: <858301e5-2ca0-494d-9032-bf5802771e8a@suse.com> Date: Mon, 2 Feb 2026 17:12:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/MSI: adjust permitted vector range To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <52227196-dbc9-4f6d-9c64-a5da5037b1ec@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 16:54, Roger Pau Monné wrote: > On Wed, Nov 12, 2025 at 04:45:05PM +0100, Jan Beulich wrote: >> It's really FIRST_IRQ_VECTOR vector which is meant here, i.e. effectively >> there is a form of open-coding in use right now. >> >> No change in practice, due to the present aliasing. >> >> Signed-off-by: Jan Beulich >> --- >> While doing the HPET work I had to fiddle with this, even if in the end >> no vector below FIRST_DYNAMIC_VECTOR is being used there (for now at >> least). >> >> --- a/xen/arch/x86/msi.c >> +++ b/xen/arch/x86/msi.c >> @@ -158,7 +158,7 @@ void msi_compose_msg(unsigned vector, co >> { >> memset(msg, 0, sizeof(*msg)); >> >> - if ( vector < FIRST_DYNAMIC_VECTOR ) >> + if ( vector < FIRST_IRQ_VECTOR ) > > Should vector also be rejected if it's > LAST_IRQ_VECTOR? That's a good question for which I don't have a good answer. I can't exclude that composing an MSI message (for purposes other than using in an MSI capability) might make sense with a vector above LAST_IRQ_VECTOR. Originally (as hinted at in the post-commit-message remark) this change was part of the HPET work, where it was an actual functional change as in an early version I needed to move FIRST_IRQ_VECTOR down (i.e. decouple it from FIRST_DYNAMIC_VECTOR). There the "composed" message was used to fill HPET_T_ROUTE. Something similar might be wanted elsewhere, and it's not quite clear to me whether in such a situation LAST_IRQ_VECTOR would then also need moving (likely it would). Right here I'm really only after the semantic, but non-functional change. If we can settle on also enforcing an upper bound, I think that would then want to be another change on top. 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Signed-off-by: Mykyta Poturai --- xen/arch/arm/include/asm/vgic.h | 43 +++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index 6f9ab1c98c..a874a02d70 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -127,6 +127,42 @@ struct vgic_irq_rank { uint8_t vcpu[32]; }; =20 +#ifdef CONFIG_GICV4 +struct its_vm { + struct its_vpe **vpes; + /* Number of VPE. */ + unsigned int nr_vpes; + uint32_t *db_lpi_bases; + unsigned int nr_db_lpis; + /* Property table per VM. */ + void *vproptable; +}; + +struct its_vpe { + rwlock_t lock; + uint32_t vpe_id; + /* Pending table per VCPU. */ + void *vpendtable; + uint32_t vpe_db_lpi; + struct its_vm *its_vm; + unsigned int col_idx; + bool resident; + /* Pending VLPIs on schedule out? */ + bool pending_last; + struct { + /* Implementation Defined Area Invalid */ + bool idai; + /* VPE proxy mapping */ + int vpe_proxy_event; + }; + /* + * Ensure mutual exclusion between affinity setting of the vPE + * and vLPI operations using vpe->col_idx. + */ + spinlock_t vpe_lock; +}; +#endif + struct vgic_dist { /* Version of the vGIC */ enum gic_version version; @@ -193,6 +229,10 @@ struct vgic_dist { */ bool rdists_enabled; /* Is any redistributor enabled? *= / bool has_its; +#ifdef CONFIG_GICV4 + struct its_vm *its_vm; +#endif + bool nassgireq; #endif }; =20 @@ -227,6 +267,9 @@ struct vgic_cpu { #define VGIC_V3_RDIST_LAST (1 << 0) /* last vCPU of the rdist = */ #define VGIC_V3_LPIS_ENABLED (1 << 1) uint8_t flags; +#ifdef CONFIG_GICV4 + struct its_vpe *its_vpe; +#endif }; =20 struct sgi_target { --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218790.1527647 (Exim 4.92) (envelope-from ) id 1vmwZV-0000fv-S1; Mon, 02 Feb 2026 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Signed-off-by: Mykyta Poturai --- xen/arch/arm/include/asm/gic_v4_its.h | 41 +++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 xen/arch/arm/include/asm/gic_v4_its.h diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h new file mode 100644 index 0000000000..f48eae60ad --- /dev/null +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -0,0 +1,41 @@ +/* + * ARM GICv4 ITS support + * + * Penny Zheng + * Copyright (c) 2023 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; under version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#ifndef __ASM_ARM_GICV4_ITS_H__ +#define __ASM_ARM_GICV4_ITS_H__ + +#define GITS_CMD_VMOVI 0x21 +#define GITS_CMD_VMOVP 0x22 +#define GITS_CMD_VSGI 0x23 +#define GITS_CMD_VSYNC 0x25 +#define GITS_CMD_VMAPP 0x29 +#define GITS_CMD_VMAPTI 0x2a +#define GITS_CMD_VINVALL 0x2d +#define GITS_CMD_INVDB 0x2e + +#endif + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218793.1527676 (Exim 4.92) (envelope-from ) id 1vmwZY-0001Mg-Q1; Mon, 02 Feb 2026 16:14:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218793.1527676; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0d63e815-d2ec-4e10-9f97-08de62762a19 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:38.5061 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5F71G833OERRta/JCzqHTQNxuHXsP0F/tDRlw9VysD6uy7dySJnn3C9SLXFMkEXw+UhAdLFLYtaGwsUtgjC7LA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Make struct its_device and its commands sending methods publicly available so they can be used by GICv4 implementation. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 30 +++++---------------------- xen/arch/arm/include/asm/gic_v3_its.h | 29 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 34833166ad..25c07eb861 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -30,26 +30,6 @@ */ LIST_HEAD(host_its_list); =20 -/* - * Describes a device which is using the ITS and is used by a guest. - * Since device IDs are per ITS (in contrast to vLPIs, which are per - * guest), we have to differentiate between different virtual ITSes. - * We use the doorbell address here, since this is a nice architectural - * property of MSIs in general and we can easily get to the base address - * of the ITS and look that up. - */ -struct its_device { - struct rb_node rbnode; - struct host_its *hw_its; - void *itt_addr; - unsigned int itt_order; - paddr_t guest_doorbell; /* Identifies the virtual ITS */ - uint32_t host_devid; - uint32_t guest_devid; - uint32_t eventids; /* Number of event IDs (MSIs) */ - uint32_t *host_lpi_blocks; /* Which LPIs are used on the host= */ - struct pending_irq *pend_irqs; /* One struct per event */ -}; =20 /* * It is unlikely that a platform implements ITSes with different quirks, @@ -155,7 +135,7 @@ bool gicv3_its_host_has_its(void) } =20 #define BUFPTR_MASK GENMASK(19, 5) -static int its_send_command(struct host_its *hw_its, const void *its_cmd) +int its_send_command(struct host_its *hw_its, const void *its_cmd) { /* * The command queue should actually never become full, if it does any= way @@ -258,7 +238,7 @@ static uint64_t encode_rdbase(struct host_its *hw_its, = unsigned int cpu, return reg; } =20 -static int its_send_cmd_sync(struct host_its *its, unsigned int cpu) +int its_send_cmd_sync(struct host_its *its, unsigned int cpu) { uint64_t cmd[4]; =20 @@ -270,7 +250,7 @@ static int its_send_cmd_sync(struct host_its *its, unsi= gned int cpu) return its_send_command(its, cmd); } =20 -static int its_send_cmd_mapti(struct host_its *its, +int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid) { @@ -322,7 +302,7 @@ static int its_send_cmd_mapd(struct host_its *its, uint= 32_t deviceid, return its_send_command(its, cmd); } =20 -static int its_send_cmd_inv(struct host_its *its, +int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t eventid) { uint64_t cmd[4]; @@ -897,7 +877,7 @@ out: } =20 /* Must be called with the its_device_lock held. */ -static struct its_device *get_its_device(struct domain *d, paddr_t vdoorbe= ll, +struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, uint32_t vdevid) { struct rb_node *node =3D d->arch.vgic.its_devices.rb_node; diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index fc5a84892c..aa54e9a364 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -116,6 +116,27 @@ /* We allocate LPIs on the hosts in chunks of 32 to reduce handling overhe= ad. */ #define LPI_BLOCK 32U =20 +/* + * Describes a device which is using the ITS and is used by a guest. + * Since device IDs are per ITS (in contrast to vLPIs, which are per + * guest), we have to differentiate between different virtual ITSes. + * We use the doorbell address here, since this is a nice architectural + * property of MSIs in general and we can easily get to the base address + * of the ITS and look that up. + */ +struct its_device { + struct rb_node rbnode; + struct host_its *hw_its; + unsigned int itt_order; + void *itt_addr; + paddr_t guest_doorbell; /* Identifies the virtual ITS */ + uint32_t host_devid; + uint32_t guest_devid; + uint32_t eventids; /* Number of event IDs (MSIs) */ + uint32_t *host_lpi_blocks; /* Which LPIs are used on the host= */ + struct pending_irq *pend_irqs; /* One struct per event */ +}; + /* data structure for each hardware ITS */ struct host_its { struct list_head entry; @@ -138,6 +159,10 @@ int gicv3_its_setup_collection(unsigned int cpu); =20 extern struct list_head host_its_list; =20 +int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t eve= ntid); +int its_send_cmd_clear(struct host_its *its, uint32_t deviceid, uint32_t e= ventid); +int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, + uint32_t eventid, uint32_t pintid, uint16_t icid); #ifdef CONFIG_ACPI unsigned long gicv3_its_make_hwdom_madt(const struct domain *d, void *base_ptr); @@ -198,6 +223,10 @@ struct pending_irq *gicv3_assign_guest_event(struct do= main *d, uint32_t virt_lpi); void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, uint32_t virt_lpi); +int its_send_command(struct host_its *hw_its, const void *its_cmd); + +struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, + uint32_t vdevid); =20 /* ITS quirks handling. */ uint64_t gicv3_its_get_cacheability(void); --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218794.1527682 (Exim 4.92) (envelope-from ) id 1vmwZZ-0001Qa-78; Mon, 02 Feb 2026 16:14:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218794.1527682; Mon, 02 Feb 2026 16:14:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwZY-0001Pv-VO; Mon, 02 Feb 2026 16:14:44 +0000 Received: by outflank-mailman (input) for mailman id 1218794; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 48df5614-b3bf-4b5f-7b3e-08de62762a5a X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:38.9082 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eYrJ1o6b5X3GGapGp+aJsYzpIjgVgsjSsGfOVltrGr83RUIvHw8FjvMfjXkJRVaea4wInPk+omAQGzwNRlypCg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Add a helper to write LPI configuration entries. Expose lpi_data structure in the header to be used in said helper. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-lpi.c | 39 +++++++++++---------------- xen/arch/arm/include/asm/gic_v3_its.h | 27 +++++++++++++++++++ 2 files changed, 43 insertions(+), 23 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index de5052e5cf..c029d5d7a4 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -46,29 +46,7 @@ union host_lpi { #define LPI_PROPTABLE_NEEDS_FLUSHING (1U << 0) =20 /* Global state */ -static struct { - /* The global LPI property table, shared by all redistributors. */ - uint8_t *lpi_property; - /* - * A two-level table to lookup LPIs firing on the host and look up the - * VCPU and virtual LPI number to inject into. - */ - union host_lpi **host_lpis; - /* - * Number of physical LPIs the host supports. This is a property of - * the GIC hardware. We depart from the habit of naming these things - * "physical" in Xen, as the GICv3/4 spec uses the term "physical LPI" - * in a different context to differentiate them from "virtual LPIs". - */ - unsigned long int max_host_lpi_ids; - /* - * Protects allocation and deallocation of host LPIs and next_free_lpi= , - * but not the actual data stored in the host_lpi entry. - */ - spinlock_t host_lpis_lock; - uint32_t next_free_lpi; - unsigned int flags; -} lpi_data; +struct __lpi_data lpi_data; =20 struct lpi_redist_data { paddr_t redist_addr; @@ -492,6 +470,21 @@ static int find_unused_host_lpi(uint32_t start, uint32= _t *index) return -1; } =20 +void lpi_write_config(uint8_t *prop_table, uint32_t lpi, uint8_t clr, + uint8_t set) +{ + u8 *cfg; + + cfg =3D prop_table + lpi - LPI_OFFSET; + *cfg &=3D ~clr; + *cfg |=3D set | LPI_PROP_RES1; + + /* Make the above write visible to the redistributors. */ + if ( lpi_data.flags & LPI_PROPTABLE_NEEDS_FLUSHING ) { + clean_and_invalidate_dcache_va_range(cfg, sizeof(*cfg)); + } +} + /* * Allocate a block of 32 LPIs on the given host ITS for device "devid", * starting with "eventid". Put them into the respective ITT by issuing a diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index aa54e9a364..9f0ea9ccb1 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -157,6 +157,31 @@ int gicv3_its_setup_collection(unsigned int cpu); =20 #ifdef CONFIG_HAS_ITS =20 +struct __lpi_data { + /* The global LPI property table, shared by all redistributors. */ + uint8_t *lpi_property; + /* + * A two-level table to lookup LPIs firing on the host and look up the + * VCPU and virtual LPI number to inject into. + */ + union host_lpi **host_lpis; + /* + * Number of physical LPIs the host supports. This is a property of + * the GIC hardware. We depart from the habit of naming these things + * "physical" in Xen, as the GICv3/4 spec uses the term "physical LPI" + * in a different context to differentiate them from "virtual LPIs". + */ + unsigned long int max_host_lpi_ids; + /* + * Protects allocation and deallocation of host LPIs and next_free_lpi= , + * but not the actual data stored in the host_lpi entry. + */ + spinlock_t host_lpis_lock; + uint32_t next_free_lpi; + unsigned int flags; +}; +extern struct __lpi_data lpi_data; + extern struct list_head host_its_list; =20 int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t eve= ntid); @@ -223,6 +248,8 @@ struct pending_irq *gicv3_assign_guest_event(struct dom= ain *d, uint32_t virt_lpi); void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, uint32_t virt_lpi); +void lpi_write_config(uint8_t *prop_table, uint32_t lpi, uint8_t clr, + uint8_t set); int its_send_command(struct host_its *hw_its, const void *its_cmd); =20 struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218795.1527696 (Exim 4.92) (envelope-from ) id 1vmwZb-0001tB-HN; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 895c550e-c48f-45b5-6e73-08de62762a8a X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:39.2434 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JXwwlmfxxG7ZsUUcxaQHvqiFUQpNvhKMdIy/f2xQ4FSCLGChlRqbjpvhj/NfN2X7cMLBcuwh2/Jm9P2H3X2iSg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Add a new flag to vgic_init_pending_irq() so that we can record whether a virtual interrupt is tied to a hardware one. The ITS code sets the flag when mapping an LPI on GICv4 systems and the cleanup path skips removing such IRQs from the virtual queues to avoid interfering with hardware-backed injections. Signed-off-by: Mykyta Poturai --- xen/arch/arm/include/asm/vgic.h | 15 ++++++++++++++- xen/arch/arm/vgic-v3-its.c | 4 ++-- xen/arch/arm/vgic.c | 10 ++++++---- 3 files changed, 22 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index a874a02d70..77323b2584 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -94,11 +94,23 @@ struct pending_irq * TODO: when implementing irq migration, taking only the current * vgic lock is not going to be enough. */ struct list_head lr_queue; + bool hw; /* Tied to HW IRQ */ }; =20 #define NR_INTERRUPT_PER_RANK 32 #define INTERRUPT_RANK_MASK (NR_INTERRUPT_PER_RANK - 1) =20 +#ifdef CONFIG_GICV4 +static inline bool pirq_is_tied_to_hw(struct pending_irq *pirq) +{ + ASSERT(pirq); + return pirq->hw; +} + +#else +#define pirq_is_tied_to_hw(pirq) ((void)pirq, false) +#endif + /* Represents state corresponding to a block of 32 interrupts */ struct vgic_irq_rank { spinlock_t lock; /* Covers access to all other members of this struct = */ @@ -360,7 +372,8 @@ static inline paddr_t vgic_dist_base(const struct vgic_= dist *vgic) extern struct vcpu *vgic_get_target_vcpu(struct vcpu *v, unsigned int virq= ); extern void vgic_remove_irq_from_queues(struct vcpu *v, struct pending_irq= *p); extern void gic_remove_from_lr_pending(struct vcpu *v, struct pending_irq = *p); -extern void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq= ); +extern void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq= , + bool hw); extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq= ); extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int i= rq); extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index bc738614bb..576e7fd4b0 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -610,7 +610,7 @@ static int its_discard_event(struct virt_its *its, =20 /* Cleanup the pending_irq and disconnect it from the LPI. */ vgic_remove_irq_from_queues(vcpu, p); - vgic_init_pending_irq(p, INVALID_LPI); + vgic_init_pending_irq(p, INVALID_LPI, false); =20 spin_unlock_irqrestore(&vcpu->arch.vgic.lock, flags); =20 @@ -749,7 +749,7 @@ static int its_handle_mapti(struct virt_its *its, uint6= 4_t *cmdptr) if ( !pirq ) goto out_remove_mapping; =20 - vgic_init_pending_irq(pirq, intid); + vgic_init_pending_irq(pirq, intid, gic_is_gicv4()); =20 /* * Now read the guest's property table to initialize our cached state. diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 6647071ad4..0da8c1a425 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -112,7 +112,7 @@ struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, uns= igned int irq) return vgic_get_rank(v, rank); } =20 -void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq) +void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq, bool = hw) { /* The lpi_vcpu_id field must be big enough to hold a VCPU ID. */ BUILD_BUG_ON(BIT(sizeof(p->lpi_vcpu_id) * 8, UL) < MAX_VIRT_CPUS); @@ -122,6 +122,8 @@ void vgic_init_pending_irq(struct pending_irq *p, unsig= ned int virq) INIT_LIST_HEAD(&p->lr_queue); p->irq =3D virq; p->lpi_vcpu_id =3D INVALID_VCPU_ID; + /* Whether virtual irq is tied to a HW one. */ + p->hw =3D hw; } =20 static void vgic_rank_init(struct vgic_irq_rank *rank, uint8_t index, @@ -202,7 +204,7 @@ static int init_vgic_espi(struct domain *d) for ( i =3D d->arch.vgic.nr_spis, idx =3D 0; i < vgic_num_spi_lines(d); i++, idx++ ) vgic_init_pending_irq(&d->arch.vgic.pending_irqs[i], - espi_idx_to_intid(idx)); + espi_idx_to_intid(idx), false); =20 for ( i =3D 0; i < DOMAIN_NR_EXT_RANKS(d); i++ ) vgic_rank_init(&d->arch.vgic.ext_shared_irqs[i], @@ -304,7 +306,7 @@ int domain_vgic_init(struct domain *d, unsigned int nr_= spis) return -ENOMEM; =20 for (i=3D0; iarch.vgic.nr_spis; i++) - vgic_init_pending_irq(&d->arch.vgic.pending_irqs[i], i + 32); + vgic_init_pending_irq(&d->arch.vgic.pending_irqs[i], i + 32, false= ); =20 /* SPIs are routed to VCPU0 by default */ for ( i =3D 0; i < DOMAIN_NR_RANKS(d); i++ ) @@ -381,7 +383,7 @@ int vcpu_vgic_init(struct vcpu *v) =20 memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs= )); for (i =3D 0; i < 32; i++) - vgic_init_pending_irq(&v->arch.vgic.pending_irqs[i], i); + vgic_init_pending_irq(&v->arch.vgic.pending_irqs[i], i, false); =20 INIT_LIST_HEAD(&v->arch.vgic.inflight_irqs); INIT_LIST_HEAD(&v->arch.vgic.lr_pending); --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218796.1527700 (Exim 4.92) (envelope-from ) id 1vmwZb-0001xJ-Sx; Mon, 02 Feb 2026 16:14:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218796.1527700; Mon, 02 Feb 2026 16:14:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwZb-0001w4-Ni; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: dda4a3ec-6969-4f7d-f260-08de62762ac3 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:39.6030 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: aazgJq0TTbF/EnamPFW34rY0hS57enu2SGrW5/cIwQlkSvKD0Mbxh3WTPoOWa8whBRP2Cd6An3rY+L6iZOQRKw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 For VLPI to be injected into a guest, it needs to be mapped or moved to a corresponding VPE first. Add a struct to handle the info about the VLPI mapping and a flag indicating whether the IRQ is tied to a HW one. Implement mapping/unmapping of VLPIs to VPEs, also handle moving. Tie them to emulated MAPTI/MOVI/DISCARD commands. Add GIC_IRQ_GUEST_FORWARDED IRQ status flag to keep track of which LPIs are mapped to virtual ones. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 14 ++ xen/arch/arm/gic-v4-its.c | 292 ++++++++++++++++++++++++++ xen/arch/arm/include/asm/gic_v3_its.h | 20 ++ xen/arch/arm/include/asm/gic_v4_its.h | 20 ++ xen/arch/arm/include/asm/vgic.h | 5 + xen/arch/arm/vgic-v3-its.c | 42 +++- 6 files changed, 387 insertions(+), 6 deletions(-) create mode 100644 xen/arch/arm/gic-v4-its.c diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 25c07eb861..25889445f5 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -315,6 +315,20 @@ int its_send_cmd_inv(struct host_its *its, return its_send_command(its, cmd); } =20 +int its_send_cmd_discard(struct host_its *its, struct its_device *dev, + uint32_t eventid) +{ + uint64_t cmd[4]; + uint32_t deviceid =3D dev->host_devid; + + cmd[0] =3D GITS_CMD_DISCARD | ((uint64_t)deviceid << 32); + cmd[1] =3D (uint64_t)eventid; + cmd[2] =3D 0x00; + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + /* Set up the (1:1) collection mapping for the given host CPU. */ int gicv3_its_setup_collection(unsigned int cpu) { diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c new file mode 100644 index 0000000000..9bbd0d96b7 --- /dev/null +++ b/xen/arch/arm/gic-v4-its.c @@ -0,0 +1,292 @@ +/* + * xen/arch/arm/gic-v4-its.c + * + * ARM Generic Interrupt Controller support v4 version + * based on xen/arch/arm/gic-v3-its.c and kernel GICv4 driver + * + * Copyright (C) 2023 - ARM Ltd + * Penny Zheng , ARM Ltd ported to Xen + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +static int its_send_cmd_vsync(struct host_its *its, uint16_t vpeid) +{ + uint64_t cmd[4]; + + cmd[0] =3D GITS_CMD_VSYNC; + cmd[1] =3D (uint64_t)vpeid << 32; + cmd[2] =3D 0x00; + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + +static int its_send_cmd_vmapti(struct host_its *its, struct its_device *de= v, + uint32_t eventid) +{ + uint64_t cmd[4]; + uint32_t deviceid =3D dev->host_devid; + struct its_vlpi_map *map =3D &dev->event_map.vlpi_maps[eventid]; + uint16_t vpeid =3D map->vm->vpes[map->vpe_idx]->vpe_id; + uint32_t vintid =3D map->vintid; + uint32_t db_pintid; + + if ( map->db_enabled ) + db_pintid =3D map->vm->vpes[map->vpe_idx]->vpe_db_lpi; + else + db_pintid =3D INVALID_LPI; + + cmd[0] =3D GITS_CMD_VMAPTI | ((uint64_t)deviceid << 32); + cmd[1] =3D eventid | ((uint64_t)vpeid << 32); + cmd[2] =3D vintid | ((uint64_t)db_pintid << 32); + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + +static bool pirq_is_forwarded_to_vcpu(struct pending_irq *pirq) +{ + ASSERT(pirq); + return test_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); +} + +bool event_is_forwarded_to_vcpu(struct its_device *dev, uint32_t eventid) +{ + struct pending_irq *pirq; + + /* No vlpi maps at all ? */ + if ( !dev->event_map.vlpi_maps) + return false; + + pirq =3D dev->event_map.vlpi_maps[eventid].pirq; + return pirq_is_forwarded_to_vcpu(pirq); +} + +static int its_send_cmd_vmovi(struct host_its *its, struct its_vlpi_map *m= ap) +{ + uint64_t cmd[4]; + struct its_device *dev =3D map->dev; + uint32_t eventid =3D map->eventid; + uint32_t deviceid =3D dev->host_devid; + uint16_t vpeid =3D map->vm->vpes[map->vpe_idx]->vpe_id; + uint32_t db_pintid; + + if ( map->db_enabled ) + db_pintid =3D map->vm->vpes[map->vpe_idx]->vpe_db_lpi; + else + db_pintid =3D INVALID_IRQ; + + cmd[0] =3D GITS_CMD_VMOVI | ((uint64_t)deviceid << 32); + cmd[1] =3D eventid | ((uint64_t)vpeid << 32); + cmd[2] =3D (map->db_enabled ? 1UL : 0UL) | ((uint64_t)db_pintid << 32)= ; + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + +static int gicv4_its_vlpi_map(struct its_vlpi_map *map) +{ + struct its_device *dev; + struct host_its *its; + uint32_t eventid; + int ret; + + if ( !map ) + return -EINVAL; + dev =3D map->dev; + its =3D map->dev->hw_its; + eventid =3D map->eventid; + + spin_lock(&dev->event_map.vlpi_lock); + + if ( !dev->event_map.vm ) + { + struct its_vlpi_map *maps; + + maps =3D xzalloc_array(struct its_vlpi_map, dev->event_map.nr_lpis= ); + if ( !maps ) + { + ret =3D -ENOMEM; + goto err; + } + + dev->event_map.vm =3D map->vm; + dev->event_map.vlpi_maps =3D maps; + } + else if ( dev->event_map.vm !=3D map->vm ) + { + ret =3D -EINVAL; + goto err; + } + + /* Get our private copy of the mapping information */ + dev->event_map.vlpi_maps[eventid] =3D *map; + + if ( pirq_is_forwarded_to_vcpu(map->pirq) ) + { + struct its_vlpi_map *old =3D &dev->event_map.vlpi_maps[eventid]; + uint32_t old_vpeid =3D old->vm->vpes[old->vpe_idx]->vpe_id; + + /* Already mapped, move it around */ + ret =3D its_send_cmd_vmovi(dev->hw_its, map); + if ( ret ) + goto err; + + /* + * ARM spec says that If, after using VMOVI to move an interrupt f= rom + * vPE A to vPE B, software moves the same interrupt again, a VSYN= C + * command must be issued to vPE A between the moves to ensure cor= rect + * behavior. + * So each time we issue VMOVI, we VSYNC the old VPE for good meas= ure. + */ + ret =3D its_send_cmd_vsync(dev->hw_its, old_vpeid); + } + else + { + /* Drop the original physical mapping firstly */ + ret =3D its_send_cmd_discard(its, dev, eventid); + if ( ret ) + goto err; + + /* Then install the virtual one */ + ret =3D its_send_cmd_vmapti(its, dev, eventid); + if ( ret ) + goto err; + + /* Increment the number of VLPIs */ + dev->event_map.nr_vlpis++; + } + + goto out; + + err: + xfree(dev->event_map.vlpi_maps); + out: + spin_unlock(&dev->event_map.vlpi_lock); + return ret; +} +int gicv4_its_vlpi_unmap(struct pending_irq *pirq) +{ + struct its_vlpi_map *map =3D pirq->vlpi_map; + struct its_device *dev =3D map->dev; + int ret; + uint32_t host_lpi; + + spin_lock(&dev->event_map.vlpi_lock); + + if ( !dev->event_map.vm || !pirq_is_tied_to_hw(pirq) ) + { + ret =3D -EINVAL; + goto out; + } + + /* Drop the virtual mapping */ + ret =3D its_send_cmd_discard(dev->hw_its, dev, map->eventid); + if ( ret ) + goto out; + + /* Restore the physical one */ + clear_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); + host_lpi =3D dev->host_lpi_blocks[map->eventid / LPI_BLOCK] + + (map->eventid % LPI_BLOCK); + /* Map every host LPI to host CPU 0 */ + ret =3D its_send_cmd_mapti(dev->hw_its, dev->host_devid, map->eventid, + host_lpi, 0); + if ( ret ) + goto out; + + lpi_write_config(lpi_data.lpi_property, host_lpi, 0xff, LPI_PROP_ENABL= ED); + + ret =3D its_inv_lpi(dev->hw_its, dev, map->eventid, 0); + if ( ret ) + goto out; + + xfree(map); + /* + * Drop the refcount and make the device available again if + * this was the last VLPI. + */ + if ( !--dev->event_map.nr_vlpis ) + { + dev->event_map.vm =3D NULL; + xfree(dev->event_map.vlpi_maps); + } + +out: + spin_unlock(&dev->event_map.vlpi_lock); + return ret; +} + +int gicv4_assign_guest_event(struct domain *d, paddr_t vdoorbell_address, + uint32_t vdevid, uint32_t eventid, + struct pending_irq *pirq) + +{ + int ret =3D ENODEV; + struct its_vm *vm =3D d->arch.vgic.its_vm; + struct its_vlpi_map *map; + struct its_device *dev; + + spin_lock(&d->arch.vgic.its_devices_lock); + dev =3D get_its_device(d, vdoorbell_address, vdevid); + if ( dev && eventid < dev->eventids ) + { + /* Prepare the vlpi mapping info */ + map =3D xzalloc(struct its_vlpi_map); + if ( !map ) + goto out; + map->vm =3D vm; + map->vintid =3D pirq->irq; + map->db_enabled =3D true; + map->vpe_idx =3D pirq->lpi_vcpu_id; + map->properties =3D pirq->lpi_priority | + (test_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status) = ? + LPI_PROP_ENABLED : 0); + map->pirq =3D pirq; + map->dev =3D dev; + map->eventid =3D eventid; + + ret =3D gicv4_its_vlpi_map(map); + if ( ret ) + { + xfree(map); + goto out; + } + + pirq->vlpi_map =3D map; + } + + out: + spin_unlock(&d->arch.vgic.its_devices_lock); + return ret; +} + +int gicv4_its_vlpi_move(struct pending_irq *pirq, struct vcpu *vcpu) +{ + struct its_vlpi_map *map =3D pirq->vlpi_map; + struct its_device *dev =3D map->dev; + + if ( !dev->event_map.vm || !map ) + return -EINVAL; + + map->vpe_idx =3D vcpu->vcpu_id; + return gicv4_its_vlpi_map(map); +} diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index 9f0ea9ccb1..75c91c0426 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -116,6 +116,9 @@ /* We allocate LPIs on the hosts in chunks of 32 to reduce handling overhe= ad. */ #define LPI_BLOCK 32U =20 +#ifdef CONFIG_GICV4 +#include +#endif /* * Describes a device which is using the ITS and is used by a guest. * Since device IDs are per ITS (in contrast to vLPIs, which are per @@ -135,6 +138,9 @@ struct its_device { uint32_t eventids; /* Number of event IDs (MSIs) */ uint32_t *host_lpi_blocks; /* Which LPIs are used on the host= */ struct pending_irq *pend_irqs; /* One struct per event */ +#ifdef CONFIG_GICV4 + struct event_vlpi_map event_map; +#endif }; =20 /* data structure for each hardware ITS */ @@ -184,6 +190,8 @@ extern struct __lpi_data lpi_data; =20 extern struct list_head host_its_list; =20 +int its_send_cmd_discard(struct host_its *its, struct its_device *dev, + uint32_t eventid); int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t eve= ntid); int its_send_cmd_clear(struct host_its *its, uint32_t deviceid, uint32_t e= ventid); int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, @@ -254,6 +262,18 @@ int its_send_command(struct host_its *hw_its, const vo= id *its_cmd); =20 struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, uint32_t vdevid); +/* GICv4 functions */ +int gicv4_assign_guest_event(struct domain *d, paddr_t vdoorbell_address, + uint32_t vdevid, uint32_t eventid, + struct pending_irq *pirq); +int gicv4_its_vlpi_move(struct pending_irq *pirq, struct vcpu *vcpu); +#ifndef CONFIG_GICV4 +#define event_is_forwarded_to_vcpu(dev, eventid) ((void)dev, (void)eventid= , false) +#else +bool event_is_forwarded_to_vcpu(struct its_device *dev, uint32_t eventid); +void its_vpe_mask_db(struct its_vpe *vpe); +#endif +int gicv4_its_vlpi_unmap(struct pending_irq *pirq); =20 /* ITS quirks handling. */ uint64_t gicv3_its_get_cacheability(void); diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h index f48eae60ad..722247ec60 100644 --- a/xen/arch/arm/include/asm/gic_v4_its.h +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -29,6 +29,26 @@ #define GITS_CMD_VINVALL 0x2d #define GITS_CMD_INVDB 0x2e =20 +/* Describes the mapping of a VLPI */ +struct its_vlpi_map { + struct its_vm *vm; + unsigned int vpe_idx; /* Index of the VPE */ + uint32_t vintid; /* Virtual LPI number */ + bool db_enabled; /* Is the VPE doorbell to be generated= ? */ + uint8_t properties; + struct pending_irq *pirq; + struct its_device *dev; + uint32_t eventid; +}; + +struct event_vlpi_map { + unsigned int nr_lpis; + spinlock_t vlpi_lock; + struct its_vm *vm; + struct its_vlpi_map *vlpi_maps; + unsigned int nr_vlpis; +}; + #endif =20 /* diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index 77323b2584..360f8a968e 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -70,6 +70,7 @@ struct pending_irq * LPI with the same number in an LR must be from an older LPI, which * has been unmapped before. * + * GIC_IRQ_GUEST_FORWARDED: the IRQ is forwarded to a VCPU(GICv4 only) */ #define GIC_IRQ_GUEST_QUEUED 0 #define GIC_IRQ_GUEST_ACTIVE 1 @@ -77,6 +78,7 @@ struct pending_irq #define GIC_IRQ_GUEST_ENABLED 3 #define GIC_IRQ_GUEST_MIGRATING 4 #define GIC_IRQ_GUEST_PRISTINE_LPI 5 +#define GIC_IRQ_GUEST_FORWARDED 6 unsigned long status; struct irq_desc *desc; /* only set if the irq corresponds to a physica= l irq */ unsigned int irq; @@ -95,6 +97,9 @@ struct pending_irq * vgic lock is not going to be enough. */ struct list_head lr_queue; bool hw; /* Tied to HW IRQ */ +#ifdef CONFIG_GICV4 + struct its_vlpi_map *vlpi_map; +#endif }; =20 #define NR_INTERRUPT_PER_RANK 32 diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 576e7fd4b0..94f7dd7d90 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -589,6 +589,14 @@ static int its_discard_event(struct virt_its *its, if ( vlpi =3D=3D INVALID_LPI ) return -ENOENT; =20 + p =3D gicv3_its_get_event_pending_irq(its->d, its->doorbell_address, + vdevid, vevid); + if ( unlikely(!p) ) + return -EINVAL; + + if ( pirq_is_tied_to_hw(p) ) + if ( gicv4_its_vlpi_unmap(p) ) + return -EINVAL; /* * TODO: This relies on the VCPU being correct in the ITS tables. * This can be fixed by either using a per-IRQ lock or by using @@ -751,6 +759,27 @@ static int its_handle_mapti(struct virt_its *its, uint= 64_t *cmdptr) =20 vgic_init_pending_irq(pirq, intid, gic_is_gicv4()); =20 + pirq->lpi_vcpu_id =3D vcpu->vcpu_id; + + if ( pirq_is_tied_to_hw(pirq) ) + /* + * If on GICv4, we could let the VLPI being directly injected + * to the guest. To achieve that, the VLPI must be mapped using + * the VMAPTI command. + */ + if ( gicv4_assign_guest_event(its->d, its->doorbell_address, devid= , + eventid, pirq) ) + goto out_remove_mapping; + + if ( pirq_is_tied_to_hw(pirq) ) + set_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); + else + /* + * Mark this LPI as new, so any older (now unmapped) LPI in any LR + * can be easily recognised as such. + */ + set_bit(GIC_IRQ_GUEST_PRISTINE_LPI, &pirq->status); + /* * Now read the guest's property table to initialize our cached state. * We don't need the VGIC VCPU lock here, because the pending_irq isn'= t @@ -761,12 +790,6 @@ static int its_handle_mapti(struct virt_its *its, uint= 64_t *cmdptr) goto out_remove_host_entry; =20 pirq->lpi_vcpu_id =3D vcpu->vcpu_id; - /* - * Mark this LPI as new, so any older (now unmapped) LPI in any LR - * can be easily recognised as such. - */ - set_bit(GIC_IRQ_GUEST_PRISTINE_LPI, &pirq->status); - /* * Now insert the pending_irq into the domain's LPI tree, so that * it becomes live. @@ -824,6 +847,13 @@ static int its_handle_movi(struct virt_its *its, uint6= 4_t *cmdptr) if ( unlikely(!p) ) goto out_unlock; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e2363123-0f4c-4f69-26b3-08de62762b05 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:39.9917 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Wu0KAP3jH3N2OAa7PO/65z0iRG8jeTglU4fY1NIRD0BleoMcBljWSRwN0t879yB0ZPrD6o4x3v6/VbqHdfaHMA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 With introduction of GICv4 the size of struct vcpu can again be more than one page. Modify struct vcpu allocation to request enough pages again. Don't reintroduce the MAX_PAGES_PER_VCPU check. As per commit b77d774d8274183c2252f5fbc9fa3b3b7022ba06 > It turns out that beyond efficiency, maybe, there is no real technical > reason this struct has to fit in one page Since there is no technical reason to limit struct vcpu size to one page, there also seems to be little reason the fiddle with 1 or 2 page limits. Signed-off-by: Mykyta Poturai --- xen/common/domain.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index 376351b528..c791fb5033 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -342,18 +342,24 @@ static struct vcpu *alloc_vcpu_struct(const struct do= main *d) # define arch_vcpu_struct_memflags(d) ((void)(d), 0) #endif struct vcpu *v; + unsigned int order =3D get_order_from_bytes(sizeof(*v)); =20 - BUILD_BUG_ON(sizeof(*v) > PAGE_SIZE); - v =3D alloc_xenheap_pages(0, arch_vcpu_struct_memflags(d)); + v =3D alloc_xenheap_pages(order, arch_vcpu_struct_memflags(d)); if ( v ) - clear_page(v); + { + unsigned int i; + + for ( i =3D 0; i < DIV_ROUND_UP(sizeof(*v), PAGE_SIZE); i++ ) + clear_page((void *)v + i * PAGE_SIZE); + } =20 return v; } =20 static void free_vcpu_struct(struct vcpu *v) { - free_xenheap_page(v); + unsigned int order =3D get_order_from_bytes(sizeof(*v)); + free_xenheap_pages(v, order); } =20 static void vmtrace_free_buffer(struct vcpu *v) --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:14:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:14:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218798.1527723 (Exim 4.92) (envelope-from ) id 1vmwZe-0002Wr-Cw; Mon, 02 Feb 2026 16:14:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218798.1527723; Mon, 02 Feb 2026 16:14:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwZe-0002VS-0w; Mon, 02 Feb 2026 16:14:50 +0000 Received: by outflank-mailman (input) for mailman id 1218798; Mon, 02 Feb 2026 16:14:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwZc-0000fY-1t for xen-devel@lists.xenproject.org; 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Record them and provide functions to check for their availability. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3.c | 175 ++++++++++++++++++++----- xen/arch/arm/include/asm/gic.h | 2 + xen/arch/arm/include/asm/gic_v3_defs.h | 9 ++ xen/arch/arm/include/asm/vgic.h | 9 ++ 4 files changed, 162 insertions(+), 33 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 9b8b87078b..14852d18c2 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -100,6 +100,38 @@ static struct { =20 static struct gic_info gicv3_info; =20 +#ifdef CONFIG_GICV4 +/* Global state */ +static struct { + bool has_vlpis; + bool has_direct_lpi; + bool has_vpend_valid_dirty; + bool has_rvpeid; +} gicv4 =3D { .has_vlpis =3D true, .has_direct_lpi =3D true, + .has_vpend_valid_dirty =3D true, .has_rvpeid =3D true, }; + + +bool gic_support_directLPI(void) +{ + return gicv4.has_direct_lpi; +} + +bool gic_support_vptValidDirty(void) +{ + return gicv4.has_vpend_valid_dirty; +} + +bool gic_has_v4_1_extension(void) +{ + return gicv4.has_rvpeid; +} + +bool gic_is_gicv4(void) +{ + return gicv4.has_vlpis; +} +#endif + /* per-cpu re-distributor base */ static DEFINE_PER_CPU(void __iomem*, rbase); =20 @@ -914,7 +946,8 @@ static bool gicv3_enable_lpis(void) return true; } =20 -static int __init gicv3_populate_rdist(void) +static int __init gic_iterate_rdists(int (*fn)(struct rdist_region *, + void __iomem *)) { int i; uint32_t aff; @@ -958,40 +991,16 @@ static int __init gicv3_populate_rdist(void) =20 if ( (typer >> 32) =3D=3D aff ) { + int ret; + this_cpu(rbase) =3D ptr; =20 - if ( typer & GICR_TYPER_PLPIS ) - { - paddr_t rdist_addr; - unsigned int procnum; - int ret; - - /* - * The ITS refers to redistributors either by their ph= ysical - * address or by their ID. Which one to use is an ITS - * choice. So determine those two values here (which w= e - * can do only here in GICv3 code) and tell the - * ITS code about it, so it can use them later to be a= ble - * to address those redistributors accordingly. - */ - rdist_addr =3D gicv3.rdist_regions[i].base; - rdist_addr +=3D ptr - gicv3.rdist_regions[i].map_base; - procnum =3D (typer & GICR_TYPER_PROC_NUM_MASK); - procnum >>=3D GICR_TYPER_PROC_NUM_SHIFT; - - gicv3_set_redist_address(rdist_addr, procnum); - - ret =3D gicv3_lpi_init_rdist(ptr); - if ( ret && ret !=3D -ENODEV ) - { - printk("GICv3: CPU%d: Cannot initialize LPIs: %u\n= ", - smp_processor_id(), ret); - break; - } - } - - printk("GICv3: CPU%d: Found redistributor in region %d @%p= \n", - smp_processor_id(), i, ptr); + ret =3D fn(gicv3.rdist_regions + i, ptr); + if ( ret ) + return ret; + + printk("GICv3: CPU%d: Found redistributor @%p\n", + smp_processor_id(), ptr); return 0; } =20 @@ -1010,11 +1019,107 @@ static int __init gicv3_populate_rdist(void) } while ( !(typer & GICR_TYPER_LAST) ); } =20 + return -ENODEV; +} + +static int __init __gicv3_populate_rdist(struct rdist_region *region, + void __iomem *ptr) +{ + uint64_t typer; + + typer =3D readq_relaxed(ptr + GICR_TYPER); + if ( typer & GICR_TYPER_PLPIS ) + { + paddr_t rdist_addr; + unsigned int procnum; + int ret; + + /* + * The ITS refers to redistributors either by their physical + * address or by their ID. Which one to use is an ITS + * choice. So determine those two values here (which we + * can do only here in GICv3 code) and tell the + * ITS code about it, so it can use them later to be able + * to address those redistributors accordingly. + */ + rdist_addr =3D region->base; + rdist_addr +=3D ptr - region->map_base; + procnum =3D (typer & GICR_TYPER_PROC_NUM_MASK); + procnum >>=3D GICR_TYPER_PROC_NUM_SHIFT; + + gicv3_set_redist_address(rdist_addr, procnum); + + ret =3D gicv3_lpi_init_rdist(ptr); + if ( ret && ret !=3D -ENODEV ) + { + printk("GICv3: CPU%d: Cannot initialize LPIs: %d\n", + smp_processor_id(), ret); + printk("%s %d\n", __func__, __LINE__); + return ret; + } + } + + return 0; +} + +static int __init gicv3_populate_rdist(void) +{ + int ret =3D gic_iterate_rdists(__gicv3_populate_rdist); + if ( ret =3D=3D 0) + return 0; + dprintk(XENLOG_ERR, "GICv3: CPU%d: mpidr 0x%"PRIregister" has no re-di= stributor!\n", smp_processor_id(), cpu_logical_map(smp_processor_id())); + return -ENODEV; +} + +#ifdef CONFIG_GICV4 +static int __init __gicv4_update_vlpi_properties(struct rdist_region *regi= on, + void __iomem *ptr) +{ + uint64_t typer; + + typer =3D readq_relaxed(ptr + GICR_TYPER); + gicv4.has_vlpis &=3D !!(typer & GICR_TYPER_VLPIS); + gicv4.has_rvpeid &=3D !!(typer & GICR_TYPER_RVPEID); + /* RVPEID implies some form of DirectLPI. */ + gicv4.has_direct_lpi &=3D (!!(typer & GICR_TYPER_DirectLPIS) || + !!(typer & GICR_TYPER_RVPEID)); + gicv4.has_vpend_valid_dirty &=3D !!(typer & GICR_TYPER_DIRTY); + + /* Detect non-sensical configurations */ + if ( gicv4.has_rvpeid && !gicv4.has_vlpis ) + { + gicv4.has_direct_lpi =3D false; + gicv4.has_vlpis =3D false; + gicv4.has_rvpeid =3D false; + } + + printk("GICv4: CPU%d: %sVLPI support, %sdirect LPI support, %sValid+Di= rty support, %sRVPEID support\n", + smp_processor_id(), !!(typer & GICR_TYPER_VLPIS) ? "" : "no ", + (!!(typer & GICR_TYPER_DirectLPIS) || + !!(typer & GICR_TYPER_RVPEID)) ? "" : "no ", + !!(typer & GICR_TYPER_DIRTY) ? "" : "no ", + !!(typer & GICR_TYPER_RVPEID) ? "" : "no "); + + return 0; +} + +static int __init gicv4_update_vlpi_properties(void) +{ + int ret =3D gic_iterate_rdists(__gicv4_update_vlpi_properties); + + if ( ret =3D=3D 0 ) + return 0; =20 return -ENODEV; } +#else +static int __init gicv4_update_vlpi_properties(void) +{ + return 0; +} +#endif =20 static int gicv3_cpu_init(void) { @@ -1024,6 +1129,10 @@ static int gicv3_cpu_init(void) if ( gicv3_populate_rdist() ) return -ENODEV; =20 + ret =3D gicv4_update_vlpi_properties(); + if ( ret ) + return ret; + if ( gicv3_enable_redist() ) return -ENODEV; =20 diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.= h index 8e713aa477..afb1cc3751 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -235,6 +235,8 @@ enum gic_version { GIC_INVALID =3D 0, /* the default until explicitly set up */ GIC_V2, GIC_V3, + GIC_V4, + GIC_V4_1, }; =20 DECLARE_PER_CPU(uint64_t, lr_mask); diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/= asm/gic_v3_defs.h index c373b94d19..3a7d18ef59 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -93,6 +93,12 @@ =20 #define GICD_TYPE_LPIS (1U << 17) =20 +#define GICD_TYPER2 0x000c + +#define GICD_TYPER2_VIL (1U << 7) +#define GICD_TYPER2_VID GENMASK(4, 0) +#define GICD_TYPER2_nASSGIcap (1U << 8) + #define GICD_CTLR_RWP (1UL << 31) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) @@ -149,7 +155,10 @@ =20 #define GICR_TYPER_PLPIS (1U << 0) #define GICR_TYPER_VLPIS (1U << 1) +#define GICR_TYPER_DIRTY (1U << 2) +#define GICR_TYPER_DirectLPIS (1U << 3) #define GICR_TYPER_LAST (1U << 4) +#define GICR_TYPER_RVPEID (1U << 7) #define GICR_TYPER_PROC_NUM_SHIFT 8 #define GICR_TYPER_PROC_NUM_MASK (0xffff << GICR_TYPER_PROC_NUM_SHIFT) =20 diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index 360f8a968e..f12d736808 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -405,6 +405,15 @@ extern bool vgic_migrate_irq(struct vcpu *old, struct = vcpu *new, unsigned int ir extern void vgic_check_inflight_irqs_pending(struct vcpu *v, unsigned int rank, uint32_t r= ); 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Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 21 ++++++++++++++++++++- xen/arch/arm/gic-v4-its.c | 22 ++++++++++++++++++++++ xen/arch/arm/include/asm/gic_v3_its.h | 5 +++++ 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 25889445f5..c628959f42 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -201,7 +201,7 @@ int its_send_command(struct host_its *hw_its, const voi= d *its_cmd) } =20 /* Wait for an ITS to finish processing all commands. */ -static int gicv3_its_wait_commands(struct host_its *hw_its) +int gicv3_its_wait_commands(struct host_its *hw_its) { /* * As there could be quite a number of commands in a queue, we will @@ -672,6 +672,25 @@ static int compare_its_guest_devices(struct its_device= *dev, return 0; } =20 +int its_inv_lpi(struct host_its *its, struct its_device *dev, + uint32_t eventid, unsigned int cpu) +{ + int ret; + + if ( event_is_forwarded_to_vcpu(dev, eventid) ) + return its_send_cmd_vinv(its, dev, eventid); + + ret =3D its_send_cmd_inv(its, dev->host_devid, eventid); + if ( ret ) + return ret; + + ret =3D its_send_cmd_sync(its, cpu); + if ( ret ) + return ret; + + return gicv3_its_wait_commands(its); +} + /* * On the host ITS @its, map @nr_events consecutive LPIs. * The mapping connects a device @devid and event @eventid pair to LPI @lp= i, diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index 9bbd0d96b7..358d0bffb9 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -290,3 +290,25 @@ int gicv4_its_vlpi_move(struct pending_irq *pirq, stru= ct vcpu *vcpu) map->vpe_idx =3D vcpu->vcpu_id; return gicv4_its_vlpi_map(map); } + +/* + * There is no real VINV command. + * We do a normal INV, with a VSYNC instead of a SYNC. + */ +int its_send_cmd_vinv(struct host_its *its, struct its_device *dev, + uint32_t eventid) +{ + int ret; + struct its_vlpi_map *map =3D &dev->event_map.vlpi_maps[eventid]; + uint16_t vpeid =3D map->vm->vpes[map->vpe_idx]->vpe_id; + + ret =3D its_send_cmd_inv(its, dev->host_devid, eventid); + if ( ret ) + return ret; + + ret =3D its_send_cmd_vsync(its, vpeid); + if ( ret ) + return ret; + + return gicv3_its_wait_commands(its); +} diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index 75c91c0426..973ca6acdd 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -194,6 +194,9 @@ int its_send_cmd_discard(struct host_its *its, struct i= ts_device *dev, uint32_t eventid); int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t eve= ntid); int its_send_cmd_clear(struct host_its *its, uint32_t deviceid, uint32_t e= ventid); +int gicv3_its_wait_commands(struct host_its *hw_its); +int its_inv_lpi(struct host_its *its, struct its_device *dev, + uint32_t eventid, unsigned int cpu); int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid); #ifdef CONFIG_ACPI @@ -267,6 +270,8 @@ int gicv4_assign_guest_event(struct domain *d, paddr_t = vdoorbell_address, uint32_t vdevid, uint32_t eventid, struct pending_irq *pirq); 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Mon, 2 Feb 2026 16:14:46 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4c673a93-0052-11f1-b161-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=C55WifUFioBhzi7YiXT1GEsrsKjJ0uztQmXkuIELdYrKbT+qJ4Uc/sx4F7SHoMmepTHqvA3fuAPcxstxhyqrYKINQHEV7iDohWRuUptNX+dOdgBLjG2zY3mpz4KPZgp7YlrrsSDA8gDWmLYKwzT/vZwervwAp+4NxF8cM9GjDcN++eV1CJaBn+HEGYClM2nmlW14IJaoFojzRhSNSN39RkPdlECP+VQcuNVArMCTZabXCB+XY3WoOiYoaS56kfcFwf6sjTiBXx/v5XfgX97n846G9+EKaxyhxBKlxVy8SjGS0zJw2mqdFojweOG5dqKRUvTY+KooFjV/KjgOgHAkVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 689dedab-d6a9-43c8-b3c0-08de62762e9a X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:44.3048 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lb0TkOsaab7wIH+NuoEm5FC5ABMA44F0rWi0Sd6V41LsFYQb5vnirB6C3ZsjtEgf9RS6jcqApZhphSqrjhGaAQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 When GIC wants to inject a virtual interrupt to a VCPU that is not currently scheduled, it sends a kick for a hypervisor to schedule it. To receive such kicks, we need to set up a doorbell interrupt for each VPE. Add changes necessary to allocate, mask/unmask and handle doorbell interrupts for each VPE. When a doorbell interrupt is received, set the pending_last flag for the corresponding VPE and kick it, so that the hypervisor schedules the VCPU to handle pending VLPIs. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 13 ++- xen/arch/arm/gic-v3-lpi.c | 69 ++++++++++---- xen/arch/arm/gic-v4-its.c | 127 ++++++++++++++++++++++++++ xen/arch/arm/include/asm/gic_v3_its.h | 6 +- xen/arch/arm/vgic-v3-its.c | 14 ++- 5 files changed, 203 insertions(+), 26 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index be840fbc8f..fa5c1eb6d1 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -1016,8 +1016,11 @@ int gicv3_its_map_guest_device(struct domain *d, =20 dev->guest_doorbell =3D guest_doorbell; dev->guest_devid =3D guest_devid; - dev->host_devid =3D host_devid; - dev->eventids =3D nr_events; + + #ifdef CONFIG_GICV4 + spin_lock_init(&dev->event_map.vlpi_lock); + dev->event_map.nr_lpis =3D nr_events; + #endif =20 rb_link_node(&dev->rbnode, parent, new); rb_insert_color(&dev->rbnode, &d->arch.vgic.its_devices); @@ -1142,7 +1145,8 @@ int gicv3_remove_guest_event(struct domain *d, paddr_= t vdoorbell_address, if ( host_lpi =3D=3D INVALID_LPI ) return -EINVAL; =20 - gicv3_lpi_update_host_entry(host_lpi, d->domain_id, INVALID_LPI); + gicv3_lpi_update_host_entry(host_lpi, d->domain_id, INVALID_LPI, + false, INVALID_VCPU_ID); =20 return 0; } @@ -1169,7 +1173,8 @@ struct pending_irq *gicv3_assign_guest_event(struct d= omain *d, if ( !pirq ) return NULL; =20 - gicv3_lpi_update_host_entry(host_lpi, d->domain_id, virt_lpi); + gicv3_lpi_update_host_entry(host_lpi, d->domain_id, virt_lpi, + false, INVALID_VCPU_ID); =20 return pirq; } diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 3c2649b695..37f1aa1064 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -39,7 +39,7 @@ union host_lpi { struct { uint32_t virt_lpi; uint16_t dom_id; - uint16_t pad; + uint16_t db_vcpu_id; }; }; =20 @@ -161,24 +161,48 @@ void gicv3_do_LPI(unsigned int lpi) * ignore them, as they have no further state and no-one can expect * to see them if they have not been mapped. */ - if ( hlpi.virt_lpi =3D=3D INVALID_LPI ) + if ( hlpi.virt_lpi =3D=3D INVALID_LPI && hlpi.db_vcpu_id =3D=3D INVALI= D_VCPU_ID ) goto out; =20 d =3D rcu_lock_domain_by_id(hlpi.dom_id); if ( !d ) goto out; =20 - /* - * TODO: Investigate what to do here for potential interrupt storms. - * As we keep all host LPIs enabled, for disabling LPIs we would need - * to queue a ITS host command, which we avoid so far during a guest's - * runtime. Also re-enabling would trigger a host command upon the - * guest sending a command, which could be an attack vector for - * hogging the host command queue. - * See the thread around here for some background: - * https://lists.xen.org/archives/html/xen-devel/2016-12/msg00003.html - */ - vgic_vcpu_inject_lpi(d, hlpi.virt_lpi); + /* It is a doorbell interrupt. */ + if ( hlpi.db_vcpu_id !=3D INVALID_VCPU_ID ) + { +#ifdef CONFIG_GICV4 + struct vcpu *v =3D d->vcpu[hlpi.db_vcpu_id]; + + /* We got the message, no need to fire again */ + its_vpe_mask_db(v->arch.vgic.its_vpe); + + /* + * Update the pending_last flag that indicates that VLPIs are pend= ing. + * And the corresponding vcpu is also kicked into action. + */ + v->arch.vgic.its_vpe->pending_last =3D true; + + vcpu_kick(v); +#else + printk(XENLOG_WARNING + "Doorbell LPI is only suooprted on GICV4\n"); +#endif + } + else + { + /* + * TODO: Investigate what to do here for potential interrupt storm= s. + * As we keep all host LPIs enabled, for disabling LPIs we would n= eed + * to queue a ITS host command, which we avoid so far during a gue= st's + * runtime. Also re-enabling would trigger a host command upon the + * guest sending a command, which could be an attack vector for + * hogging the host command queue. + * See the thread around here for some background: + * https://lists.xen.org/archives/html/xen-devel/2016-12/msg00003.= html + */ + vgic_vcpu_inject_lpi(d, hlpi.virt_lpi); + } =20 rcu_unlock_domain(d); =20 @@ -187,7 +211,8 @@ out: } =20 void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, - uint32_t virt_lpi) + uint32_t virt_lpi, bool is_db, + uint16_t db_vcpu_id) { union host_lpi *hlpip, hlpi; =20 @@ -197,8 +222,16 @@ void gicv3_lpi_update_host_entry(uint32_t host_lpi, in= t domain_id, =20 hlpip =3D &lpi_data.host_lpis[host_lpi / HOST_LPIS_PER_PAGE][host_lpi = % HOST_LPIS_PER_PAGE]; =20 - hlpi.virt_lpi =3D virt_lpi; - hlpi.dom_id =3D domain_id; + if ( !is_db ) + { + hlpi.virt_lpi =3D virt_lpi; + hlpi.dom_id =3D domain_id; + } + else + { + hlpi.dom_id =3D domain_id; + hlpi.db_vcpu_id =3D db_vcpu_id; + } =20 write_u64_atomic(&hlpip->data, hlpi.data); } @@ -595,6 +628,7 @@ int gicv3_allocate_host_lpi_block(struct domain *d, uin= t32_t *first_lpi) */ hlpi.virt_lpi =3D INVALID_LPI; hlpi.dom_id =3D d->domain_id; + hlpi.db_vcpu_id =3D INVALID_VCPU_ID; write_u64_atomic(&lpi_data.host_lpis[chunk][lpi_idx + i].data, hlpi.data); =20 @@ -602,7 +636,8 @@ int gicv3_allocate_host_lpi_block(struct domain *d, uin= t32_t *first_lpi) * Enable this host LPI, so we don't have to do this during the * guest's runtime. */ - lpi_data.lpi_property[lpi + i] |=3D LPI_PROP_ENABLED; + lpi_write_config(lpi_data.lpi_property, lpi + i + LPI_OFFSET, 0xff= , + LPI_PROP_ENABLED); } =20 lpi_data.next_free_lpi =3D lpi + LPI_BLOCK; diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index 175fda7acb..0462976b93 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -157,6 +157,9 @@ static int its_send_cmd_vmapp(struct host_its *its, str= uct its_vpe *vpe, cmd[3] =3D (vpt_addr & GENMASK(51, 16)) | ((HOST_LPIS_NRBITS - 1) & GENMASK(4, 0)); =20 + /* Default doorbell interrupt */ + cmd[1] |=3D (uint64_t)vpe->vpe_db_lpi; + out: ret =3D its_send_command(its, cmd); =20 @@ -296,6 +299,37 @@ static int its_send_cmd_vmovp(struct its_vpe *vpe) return 0; } =20 + +static void its_vpe_send_inv_db(struct its_vpe *vpe) +{ + // struct its_device *dev =3D vpe_proxy.dev; + // unsigned long flags; + + // spin_lock_irqsave(&vpe_proxy.lock, flags); + // gicv4_vpe_db_proxy_map_locked(vpe); + // its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_event= ); + // spin_unlock_irqrestore(&vpe_proxy.lock, flags); +} + +static void its_vpe_inv_db(struct its_vpe *vpe) +{ + its_vpe_send_inv_db(vpe); +} + +void its_vpe_mask_db(struct its_vpe *vpe) +{ + /* Only clear enable bit. */ + lpi_write_config(lpi_data.lpi_property, vpe->vpe_db_lpi, LPI_PROP_ENAB= LED, 0); + its_vpe_inv_db(vpe); +} + +static void its_vpe_unmask_db(struct its_vpe *vpe) +{ + /* Only set enable bit. */ + lpi_write_config(lpi_data.lpi_property, vpe->vpe_db_lpi, 0, LPI_PROP_E= NABLED); + its_vpe_inv_db(vpe); +} + static void __init its_vpe_teardown(struct its_vpe *vpe) { unsigned int order; @@ -309,6 +343,8 @@ static void __init its_vpe_teardown(struct its_vpe *vpe= ) int vgic_v4_its_vm_init(struct domain *d) { unsigned int nr_vcpus =3D d->max_vcpus; + unsigned int nr_db_lpis, nr_chunks, i =3D 0; + uint32_t *db_lpi_bases; int ret =3D -ENOMEM; =20 if ( !gicv3_its_host_has_its() ) @@ -326,9 +362,31 @@ int vgic_v4_its_vm_init(struct domain *d) d->arch.vgic.its_vm->vproptable =3D lpi_allocate_proptable(); if ( !d->arch.vgic.its_vm->vproptable ) goto fail_vprop; + /* Allocate a doorbell interrupt for each VPE. */ + nr_db_lpis =3D d->arch.vgic.its_vm->nr_vpes; + nr_chunks =3D DIV_ROUND_UP(nr_db_lpis, LPI_BLOCK); + db_lpi_bases =3D xzalloc_array(uint32_t, nr_chunks); + if ( !db_lpi_bases ) + goto fail_db_bases; + + do { + /* Allocate doorbell interrupts in chunks of LPI_BLOCK (=3D32). */ + ret =3D gicv3_allocate_host_lpi_block(d, &db_lpi_bases[i]); + if ( ret ) + goto fail_db; + } while ( ++i < nr_chunks ); + + d->arch.vgic.its_vm->db_lpi_bases =3D db_lpi_bases; + d->arch.vgic.its_vm->nr_db_lpis =3D nr_db_lpis; =20 return 0; =20 +fail_db: + while ( --i >=3D 0 ) + gicv3_free_host_lpi_block(d->arch.vgic.its_vm->db_lpi_bases[i]); + xfree(db_lpi_bases); +fail_db_bases: + lpi_free_proptable(d->arch.vgic.its_vm->vproptable); fail_vprop: xfree(d->arch.vgic.its_vm->vpes); fail_vpes: @@ -340,8 +398,13 @@ fail_vprop: void vgic_v4_free_its_vm(struct domain *d) { struct its_vm *its_vm =3D d->arch.vgic.its_vm; + int nr_chunks =3D DIV_ROUND_UP(its_vm->nr_db_lpis, LPI_BLOCK); if ( its_vm->vpes ) xfree(its_vm->vpes); + while ( --nr_chunks >=3D 0 ) + gicv3_free_host_lpi_block(its_vm->db_lpi_bases[nr_chunks]); + if ( its_vm->db_lpi_bases ) + xfree(its_vm->db_lpi_bases); if ( its_vm->vproptable ) lpi_free_proptable(its_vm); } @@ -357,14 +420,29 @@ int vgic_v4_its_vpe_init(struct vcpu *vcpu) return -ENOMEM; =20 its_vm->vpes[vcpuid] =3D vcpu->arch.vgic.its_vpe; + vcpu->arch.vgic.its_vpe =3D vcpu->arch.vgic.its_vpe; + vcpu->arch.vgic.its_vpe->vpe_db_lpi =3D its_vm->db_lpi_bases[vcpuid/32= ] + (vcpuid % 32); + /* + * Sometimes vlpi gets firstly mapped before associated vpe + * becoming resident, so in case missing the interrupt, we intend to + * enable doorbell at the initialization stage + */ + vcpu->arch.vgic.its_vpe->its_vm =3D its_vm; =20 + gicv3_lpi_update_host_entry(vcpu->arch.vgic.its_vpe->vpe_db_lpi, + vcpu->domain->domain_id, INVALID_LPI, true= , + vcpu->vcpu_id); + + ret =3D its_vpe_init(vcpu->arch.vgic.its_vpe); if ( ret ) { its_vpe_teardown(vcpu->arch.vgic.its_vpe); return ret; } + its_vpe_unmask_db(vcpu->arch.vgic.its_vpe); + return 0; } =20 @@ -800,6 +878,7 @@ void vgic_v4_load(struct vcpu *vcpu) * corresponding to our current CPU expects us here */ WARN_ON(gicv4_vpe_set_affinity(vcpu)); + its_vpe_mask_db(vpe); its_make_vpe_resident(vpe, vcpu->processor); vpe->resident =3D true; } @@ -812,5 +891,53 @@ void vgic_v4_put(struct vcpu *vcpu, bool need_db) return; =20 its_make_vpe_non_resident(vpe, vcpu->processor); + if ( need_db ) + /* Enable the doorbell, as the guest is going to block */ + its_vpe_unmask_db(vpe); vpe->resident =3D false; } + +static int its_vlpi_set_doorbell(struct its_vlpi_map *map, bool enable) +{ + if (map->db_enabled =3D=3D enable) + return 0; + + map->db_enabled =3D enable; + + /* + * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI + * value or to 1023, depending on the enable bit. But that + * would be issuing a mapping for an /existing/ DevID+EventID + * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI + * to the /same/ vPE, using this opportunity to adjust the doorbell. + */ + return its_send_cmd_vmovi(map->dev->hw_its, map); +} + +int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, + bool needs_inv) +{ + struct its_vlpi_map *map; + unsigned int cpu; + int ret; + + if ( !pirq->vlpi_map ) + return -EINVAL; + + map =3D pirq->vlpi_map; + + /* Cache the updated property and update the vproptable. */ + map->properties =3D property; + lpi_write_config(map->vm->vproptable, pirq->irq, 0xff, property); + + if ( needs_inv ) + { + cpu =3D map->vm->vpes[map->vpe_idx]->col_idx; + ret =3D its_inv_lpi(map->dev->hw_its, map->dev, map->eventid, cpu)= ; + if ( ret ) + return ret; + } + + return its_vlpi_set_doorbell(map, property & LPI_PROP_ENABLED); +} + diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index f03a8fad47..dababe97cd 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -295,7 +295,9 @@ struct pending_irq *gicv3_assign_guest_event(struct dom= ain *d, uint32_t vdevid, uint32_t eve= ntid, uint32_t virt_lpi); void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, - uint32_t virt_lpi); + uint32_t virt_lpi, bool is_db, + uint16_t db_vcpu_id); + struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type); bool its_alloc_table_entry(struct its_baser *baser, uint32_t id); struct page_info *lpi_allocate_pendtable(void); @@ -322,6 +324,8 @@ bool event_is_forwarded_to_vcpu(struct its_device *dev,= uint32_t eventid); void its_vpe_mask_db(struct its_vpe *vpe); #endif int gicv4_its_vlpi_unmap(struct pending_irq *pirq); +int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, + bool needs_inv); =20 /* ITS quirks handling. */ uint64_t gicv3_its_get_cacheability(void); diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 94f7dd7d90..0a740ad68f 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -387,7 +387,7 @@ out_unlock: * property table and update the virtual IRQ's state in the given pending_= irq. * Must be called with the respective VGIC VCPU lock held. */ -static int update_lpi_property(struct domain *d, struct pending_irq *p) +int update_lpi_property(struct domain *d, struct pending_irq *p, bool need= s_inv) { paddr_t addr; uint8_t property; @@ -417,6 +417,9 @@ static int update_lpi_property(struct domain *d, struct= pending_irq *p) else clear_bit(GIC_IRQ_GUEST_ENABLED, &p->status); =20 + if ( pirq_is_tied_to_hw(p) ) + return its_vlpi_prop_update(p, property, needs_inv); + return 0; } =20 @@ -430,6 +433,9 @@ static int update_lpi_property(struct domain *d, struct= pending_irq *p) */ static void update_lpi_vgic_status(struct vcpu *v, struct pending_irq *p) { + if ( pirq_is_tied_to_hw(p) ) + return; + ASSERT(spin_is_locked(&v->arch.vgic.lock)); =20 if ( test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) ) @@ -479,7 +485,7 @@ static int its_handle_inv(struct virt_its *its, uint64_= t *cmdptr) spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); =20 /* Read the property table and update our cached status. */ - if ( update_lpi_property(d, p) ) + if ( update_lpi_property(d, p, true) ) goto out_unlock; =20 /* Check whether the LPI needs to go on a VCPU. */ @@ -552,7 +558,7 @@ static int its_handle_invall(struct virt_its *its, uint= 64_t *cmdptr) =20 vlpi =3D pirqs[i]->irq; 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Signed-off-by: Mykyta Poturai --- xen/arch/arm/Kconfig | 6 ++++++ xen/arch/arm/Makefile | 1 + 2 files changed, 7 insertions(+) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 442d353b43..c18eca9f9a 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -255,6 +255,12 @@ config ARM64_BTI Branch Target Identification support. This feature is not supported in Xen. =20 +config GICV4 + bool "GICv4 driver" + depends on GICV3 && HAS_ITS + help + Driver for ARM Generic Interrupt Controller v4 extension. + source "arch/arm/tee/Kconfig" =20 config PARTIAL_EMULATION diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 95bc7ad25e..8569df571b 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -27,6 +27,7 @@ obj-y +=3D gic.o obj-$(CONFIG_GICV2) +=3D gic-v2.o obj-$(CONFIG_GICV3) +=3D gic-v3.o obj-$(CONFIG_HAS_ITS) +=3D gic-v3-its.o +obj-$(CONFIG_GICV4) +=3D gic-v4-its.o obj-$(CONFIG_HAS_ITS) +=3D gic-v3-lpi.o obj-y +=3D guestcopy.o obj-y +=3D guest_atomics.o --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:17:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:17:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218877.1527761 (Exim 4.92) (envelope-from ) id 1vmwcR-0006cG-6I; Mon, 02 Feb 2026 16:17:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218877.1527761; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 54576a18-9c90-4227-e258-08de62762d49 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:43.0668 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Ha2n/UlX+/AS/iMDNbdDPWxS8nRRupBq2fRLIvVcz25V9gg0he+XVGb44rG1omzQfGJCJ9poz6i0Re9uBlBnSg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 When a VCPU is migrated to another PCPU, its VPE affinity must be updated. Hook into VPE scheduling to ensure that the VPE to be scheduled is located on the correct PCPU, if not, move it with VMOVP command. VMOVP needs to be issued on all ITSes in the system, and in the same order, unlsess single VMOVP capable ITS is used. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 55 ++++++++++++++ xen/arch/arm/gic-v4-its.c | 105 ++++++++++++++++++++++++++ xen/arch/arm/include/asm/gic_v3_its.h | 12 +++ 3 files changed, 172 insertions(+) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index fb1d2709be..be840fbc8f 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -31,6 +31,8 @@ LIST_HEAD(host_its_list); =20 =20 +unsigned long its_list_map; + unsigned int nvpeid =3D 16; =20 /* @@ -612,10 +614,47 @@ static int gicv3_disable_its(struct host_its *hw_its) return -ETIMEDOUT; } =20 +static int __init its_compute_its_list_map(struct host_its *hw_its) +{ + int its_number; + uint32_t ctlr; + + its_number =3D find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); + if ( its_number >=3D GICv4_ITS_LIST_MAX ) + { + printk(XENLOG_ERR + "ITS@%lx: No ITSList entry available!\n", hw_its->addr); + return -EINVAL; + } + + ctlr =3D readl_relaxed(hw_its->its_base + GITS_CTLR); + ctlr &=3D ~GITS_CTLR_ITS_NUMBER; + ctlr |=3D its_number << GITS_CTLR_ITS_NUMBER_SHIFT; + writel_relaxed(ctlr, hw_its->its_base + GITS_CTLR); + ctlr =3D readl_relaxed(hw_its->its_base + GITS_CTLR); + if ( (ctlr & GITS_CTLR_ITS_NUMBER) !=3D + (its_number << GITS_CTLR_ITS_NUMBER_SHIFT) ) + { + its_number =3D ctlr & GITS_CTLR_ITS_NUMBER; + its_number >>=3D GITS_CTLR_ITS_NUMBER_SHIFT; + } + + if ( test_and_set_bit(its_number, &its_list_map) ) + { + printk(XENLOG_ERR + "ITS@%lx: Duplicate ITSList entry %d\n", + hw_its->addr, its_number); + return -EINVAL; + } + + return its_number; +} + static int gicv3_its_init_single_its(struct host_its *hw_its) { uint64_t reg; int i, ret; + int its_number; =20 hw_its->its_base =3D ioremap_nocache(hw_its->addr, hw_its->size); if ( !hw_its->its_base ) @@ -633,6 +672,22 @@ static int gicv3_its_init_single_its(struct host_its *= hw_its) hw_its->itte_size =3D GITS_TYPER_ITT_SIZE(reg); if ( reg & GITS_TYPER_PTA ) hw_its->flags |=3D HOST_ITS_USES_PTA; + hw_its->is_v4 =3D reg & GITS_TYPER_VLPIS; + if ( hw_its->is_v4 ) + { + if ( !(reg & GITS_TYPER_VMOVP) ) + { + its_number =3D its_compute_its_list_map(hw_its); + if ( its_number < 0 ) + return its_number; + dprintk(XENLOG_INFO, + "ITS@%lx: Using ITS number %d\n", + hw_its->addr, its_number); + } + else + dprintk(XENLOG_INFO, + "ITS@%lx: Single VMOVP capable\n", hw_its->addr); + } spin_lock_init(&hw_its->cmd_lock); =20 for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index 6a550a65b2..175fda7acb 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -36,6 +36,9 @@ static unsigned long *vpeid_mask; =20 static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOCKED; =20 +static uint16_t vmovp_seq_num; +static spinlock_t vmovp_lock =3D SPIN_LOCK_UNLOCKED; + void __init gicv4_its_vpeid_allocator_init(void) { /* Allocate space for vpeid_mask based on MAX_VPEID */ @@ -242,6 +245,57 @@ static int __init its_vpe_init(struct its_vpe *vpe) return rc; } =20 +static int its_send_cmd_vmovp(struct its_vpe *vpe) +{ + uint16_t vpeid =3D vpe->vpe_id; + int ret; + struct host_its *hw_its; + + if ( !its_list_map ) + { + uint64_t cmd[4]; + + hw_its =3D list_first_entry(&host_its_list, struct host_its, entry= ); + cmd[0] =3D GITS_CMD_VMOVP; + cmd[1] =3D (uint64_t)vpeid << 32; + cmd[2] =3D encode_rdbase(hw_its, vpe->col_idx, 0x0); + cmd[3] =3D 0x00; + + return its_send_command(hw_its, cmd); + } + + /* + * If using the its_list "feature", we need to make sure that all ITSs + * receive all VMOVP commands in the same order. The only way + * to guarantee this is to make vmovp a serialization point. + */ + spin_lock(&vmovp_lock); + + vmovp_seq_num++; + + /* Emit VMOVPs */ + list_for_each_entry(hw_its, &host_its_list, entry) + { + uint64_t cmd[4]; + + cmd[0] =3D GITS_CMD_VMOVP | ((uint64_t)vmovp_seq_num << 32); + cmd[1] =3D its_list_map | ((uint64_t)vpeid << 32); + cmd[2] =3D encode_rdbase(hw_its, vpe->col_idx, 0x0); + cmd[3] =3D 0x00; + + ret =3D its_send_command(hw_its, cmd); + if ( ret ) + { + spin_unlock(&vmovp_lock); + return ret; + } + } + + spin_unlock(&vmovp_lock); + + return 0; +} + static void __init its_vpe_teardown(struct its_vpe *vpe) { unsigned int order; @@ -687,6 +741,52 @@ static void its_make_vpe_non_resident(struct its_vpe *= vpe, unsigned int cpu) vpe->pending_last =3D val & GICR_VPENDBASER_PendingLast; } =20 +static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) +{ + spin_lock_irqsave(&vpe->vpe_lock, *flags); + return vpe->col_idx; +} + +static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long *flags) +{ + spin_unlock_irqrestore(&vpe->vpe_lock, *flags); +} + +static int gicv4_vpe_set_affinity(struct vcpu *vcpu) +{ + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; + unsigned int from, to =3D vcpu->processor; + unsigned long flags; + int ret =3D 0; + + /* + * Changing affinity is mega expensive, so let's be as lazy as + * we can and only do it if we really have to. Also, if mapped + * into the proxy device, we need to move the doorbell interrupt + * to its new location. + * + * Another thing is that changing the affinity of a vPE affects + * *other interrupts* such as all the vLPIs that are routed to + * this vPE. This means that we must ensure nobody samples + * vpe->col_idx during the update, hence the lock below which + * must also be taken on any vLPI handling path that evaluates + * vpe->col_idx, such as reg-based vLPI invalidation. + */ + from =3D vpe_to_cpuid_lock(vpe, &flags); + if ( from =3D=3D to ) + goto out; + + vpe->col_idx =3D to; + + ret =3D its_send_cmd_vmovp(vpe); + if ( ret ) + goto out; + + out: + vpe_to_cpuid_unlock(vpe, &flags); + return ret; +} + void vgic_v4_load(struct vcpu *vcpu) { struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; @@ -695,6 +795,11 @@ void vgic_v4_load(struct vcpu *vcpu) if ( vpe->resident ) return; =20 + /* + * Before making the VPE resident, make sure the redistributor + * corresponding to our current CPU expects us here + */ + WARN_ON(gicv4_vpe_set_affinity(vcpu)); its_make_vpe_resident(vpe, vcpu->processor); vpe->resident =3D true; } diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index 411beb81c8..f03a8fad47 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -43,6 +43,9 @@ #define GITS_CTLR_QUIESCENT BIT(31, UL) #define GITS_CTLR_ENABLE BIT(0, UL) =20 +#define GITS_CTLR_ITS_NUMBER_SHIFT 4 +#define GITS_CTLR_ITS_NUMBER (0xfUL << GITS_CTLR_ITS_NUMBER_SHI= FT) + #define GITS_TYPER_PTA BIT(19, UL) #define GITS_TYPER_DEVIDS_SHIFT 13 #define GITS_TYPER_DEVIDS_MASK (0x1fUL << GITS_TYPER_DEVIDS_SHIFT= ) @@ -60,6 +63,8 @@ GITS_TYPER_ITT_SIZE_SHIFT= ) + 1) #define GITS_TYPER_PHYSICAL (1U << 0) =20 +#define GITS_TYPER_VLPIS (1UL << 1) +#define GITS_TYPER_VMOVP (1UL << 37) #define GITS_BASER_INDIRECT BIT(62, UL) #define GITS_BASER_INNER_CACHEABILITY_SHIFT 59 #define GITS_BASER_TYPE_SHIFT 56 @@ -118,6 +123,12 @@ /* We allocate LPIs on the hosts in chunks of 32 to reduce handling overhe= ad. */ #define LPI_BLOCK 32U =20 +/* + * Maximum number of ITSs when GITS_TYPER.VMOVP =3D=3D 0, using the + * ITSList mechanism to perform inter-ITS synchronization. + */ +#define GICv4_ITS_LIST_MAX 16 + extern unsigned int nvpeid; /* The maximum number of VPEID bits supported by VLPI commands */ #define ITS_MAX_VPEID_BITS nvpeid @@ -214,6 +225,7 @@ struct __lpi_data { extern struct __lpi_data lpi_data; =20 extern struct list_head host_its_list; +extern unsigned long its_list_map; =20 int its_send_cmd_discard(struct host_its *its, struct its_device *dev, uint32_t eventid); --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:17:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:17:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218890.1527776 (Exim 4.92) (envelope-from ) id 1vmwcc-0007J0-I8; Mon, 02 Feb 2026 16:17:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218890.1527776; Mon, 02 Feb 2026 16:17:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwcc-0007In-FC; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3dcea2b8-59b8-4cc9-542f-08de62762bd7 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:41.1902 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: NdnESA2f/BYACB1dRnAj+VCY3ps1gKaun/AHMrfF8jmc6T3ljNCxb2+CuzKFEA8Y4SJA+LGy1nrJNk8wUpJF3w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Keep all the info about BASER regs in host_its structure to be able to easi= ly access it later. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 36 +++++++++++++++++++++------ xen/arch/arm/include/asm/gic_v3_its.h | 14 +++++++++++ 2 files changed, 43 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index c628959f42..2328595a85 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -430,16 +430,32 @@ static void *its_map_cbaser(struct host_its *its) /* The ITS BASE registers work with page sizes of 4K, 16K or 64K. */ #define BASER_PAGE_BITS(sz) ((sz) * 2 + 12) =20 +struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type) +{ + unsigned int i; + + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) + { + if (GITS_BASER_TYPE(hw_its->tables[i].val) =3D=3D type) + return &hw_its->tables[i]; + } + + return NULL; +} + static int its_map_baser(void __iomem *basereg, uint64_t regc, - unsigned int nr_items) + unsigned int nr_items, struct its_baser *baser) { uint64_t attr, reg; unsigned int entry_size =3D GITS_BASER_ENTRY_SIZE(regc); - unsigned int pagesz =3D 2; /* try 64K pages first, then go down. */ + unsigned int page_size[4] =3D {SZ_4K, SZ_16K, SZ_64K, SZ_64K}; + unsigned int pagesz =3D 0; /* try 64K pages first, then go down. */ unsigned int table_size; unsigned int order; void *buffer; + uint32_t type; =20 + type =3D GITS_BASER_TYPE(regc); attr =3D gicv3_its_get_shareability() << GITS_BASER_SHAREABILITY_SHIF= T; attr |=3D GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILITY= _SHIFT; attr |=3D gicv3_its_get_cacheability() << GITS_BASER_INNER_CACHEABILIT= Y_SHIFT; @@ -479,6 +495,11 @@ retry: writeq_relaxed(reg, basereg); regc =3D readq_relaxed(basereg); =20 + baser->val =3D regc; + baser->base =3D buffer; + baser->table_size =3D table_size; + baser->pagesz =3D page_size[pagesz]; + /* The host didn't like our attributes, just use what it returned. */ if ( (regc & BASER_ATTR_MASK) !=3D attr ) { @@ -490,7 +511,7 @@ retry: } attr =3D regc & BASER_ATTR_MASK; } - if ( (regc & GITS_BASER_INNER_CACHEABILITY_MASK) <=3D GIC_BASER_CACHE_= nC ) + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) clean_and_invalidate_dcache_va_range(buffer, table_size); =20 /* If the host accepted our page size, we are done. */ @@ -568,26 +589,27 @@ static int gicv3_its_init_single_its(struct host_its = *hw_its) { void __iomem *basereg =3D hw_its->its_base + GITS_BASER0 + i * 8; unsigned int type; + struct its_baser *baser =3D hw_its->tables + i; =20 reg =3D readq_relaxed(basereg); - type =3D (reg & GITS_BASER_TYPE_MASK) >> GITS_BASER_TYPE_SHIFT; + type =3D GITS_BASER_TYPE(reg); switch ( type ) { case GITS_BASER_TYPE_NONE: continue; case GITS_BASER_TYPE_DEVICE: - ret =3D its_map_baser(basereg, reg, BIT(hw_its->devid_bits, UL= )); + ret =3D its_map_baser(basereg, reg, BIT(hw_its->devid_bits, UL= ), baser); if ( ret ) return ret; break; case GITS_BASER_TYPE_COLLECTION: - ret =3D its_map_baser(basereg, reg, num_possible_cpus()); + ret =3D its_map_baser(basereg, reg, num_possible_cpus(), baser= ); if ( ret ) return ret; break; /* In case this is a GICv4, provide a (dummy) vPE table as well. *= / case GITS_BASER_TYPE_VCPU: - ret =3D its_map_baser(basereg, reg, 1); + ret =3D its_map_baser(basereg, reg, 32, baser); if ( ret ) return ret; break; diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index 973ca6acdd..bd2696f354 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -64,6 +64,7 @@ #define GITS_BASER_INNER_CACHEABILITY_SHIFT 59 #define GITS_BASER_TYPE_SHIFT 56 #define GITS_BASER_TYPE_MASK (7ULL << GITS_BASER_TYPE_SHIFT) +#define GITS_BASER_TYPE(reg) ((reg & GITS_BASER_TYPE_MASK) >> G= ITS_BASER_TYPE_SHIFT) #define GITS_BASER_OUTER_CACHEABILITY_SHIFT 53 #define GITS_BASER_TYPE_NONE 0UL #define GITS_BASER_TYPE_DEVICE 1UL @@ -143,6 +144,17 @@ struct its_device { #endif }; =20 +/* + * The ITS_BASER structure - contains memory information, cached + * value of BASER register configuration. + */ +struct its_baser { + void *base; + uint64_t val; + unsigned int table_size; + unsigned int pagesz; +}; + /* data structure for each hardware ITS */ struct host_its { struct list_head entry; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 45f50c92-6743-42d1-e590-08de62762c86 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:42.5831 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 3yppVIHYBl4L73U/JPqGlIP7DCVJbEmChT6/T+yHaU2EV7nWjzKbHBP44Sl8X7XJrfqXcxAtYmhz31Rf5GFrKQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 GICv4 needs to know which VCPU is currently scheduled to be able to deliver VLPIs. Implement switching of VPEs on VCPU context switch by extending the existing save/restore mechanism used for GICv2 and GICv3. Scheduling a VPE is done by setting up the VPENDBASER and VPROPBASER registers to the appropriate tables for the currently running VCPU. When scheduling out, preserve the IDAI and PendingLast bits from VPENDBASER. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v2.c | 2 +- xen/arch/arm/gic-v3.c | 9 +- xen/arch/arm/gic-v4-its.c | 138 +++++++++++++++++++++++++ xen/arch/arm/gic-vgic.c | 6 ++ xen/arch/arm/include/asm/gic.h | 2 +- xen/arch/arm/include/asm/gic_v3_defs.h | 6 ++ xen/arch/arm/include/asm/gic_v4_its.h | 9 ++ xen/arch/arm/include/asm/vgic.h | 2 + 8 files changed, 170 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 0cd41eac12..c16fa5d67e 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -181,7 +181,7 @@ static void gicv2_save_state(struct vcpu *v) writel_gich(0, GICH_HCR); } =20 -static void gicv2_restore_state(const struct vcpu *v) +static void gicv2_restore_state(struct vcpu *v) { int i; =20 diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index d4af332b0e..07736179db 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -133,7 +133,7 @@ bool gic_is_gicv4(void) #endif =20 /* per-cpu re-distributor base */ -static DEFINE_PER_CPU(void __iomem*, rbase); +DEFINE_PER_CPU(void __iomem*, rbase); =20 #define GICD (gicv3.map_dbase) #define GICD_RDIST_BASE (this_cpu(rbase)) @@ -475,13 +475,15 @@ static void gicv3_save_state(struct vcpu *v) * are now visible to the system register interface */ dsb(sy); + if ( gic_is_gicv4() ) + vgic_v4_put(v, false); gicv3_save_lrs(v); save_aprn_regs(&v->arch.gic); v->arch.gic.v3.vmcr =3D READ_SYSREG(ICH_VMCR_EL2); v->arch.gic.v3.sre_el1 =3D READ_SYSREG(ICC_SRE_EL1); } =20 -static void gicv3_restore_state(const struct vcpu *v) +static void gicv3_restore_state(struct vcpu *v) { register_t val; =20 @@ -510,6 +512,9 @@ static void gicv3_restore_state(const struct vcpu *v) restore_aprn_regs(&v->arch.gic); gicv3_restore_lrs(v); =20 + if ( gic_is_gicv4() ) + vgic_v4_load(v); + /* * Make sure all stores are visible the GIC */ diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index fac3b44a94..6a550a65b2 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -18,6 +18,7 @@ * GNU General Public License for more details. */ =20 +#include #include #include #include @@ -44,6 +45,21 @@ void __init gicv4_its_vpeid_allocator_init(void) panic("Could not allocate VPEID bitmap space\n"); } =20 +static void __iomem *gic_data_rdist_vlpi_base(unsigned int cpu) +{ + /* + * Each Redistributor defines two 64KB frames in the physical address = map. + * In GICv4, there are two additional 64KB frames. + * The frames for each Redistributor must be contiguous and must be + * ordered as follows: + * 1. RD_base + * 2. SGI_base + * 3. VLPI_base + * 4. Reserved + */ + return GICD_RDIST_BASE_CPU(cpu) + SZ_128K; +} + static int __init its_alloc_vpeid(struct its_vpe *vpe) { int id; @@ -571,3 +587,125 @@ int its_send_cmd_vinv(struct host_its *its, struct it= s_device *dev, =20 return gicv3_its_wait_commands(its); } + +static uint64_t read_vpend_dirty_clean(void __iomem *vlpi_base, + unsigned int count) +{ + uint64_t val; + bool clean; + + do { + val =3D gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); + /* Poll GICR_VPENDBASER.Dirty until it reads 0. */ + clean =3D !(val & GICR_VPENDBASER_Dirty); + if ( !clean ) + { + count--; + cpu_relax(); + udelay(1); + } + } while ( !clean && count ); + + if ( !clean ) + { + printk(XENLOG_WARNING "ITS virtual pending table not totally parse= d\n"); + val |=3D GICR_VPENDBASER_PendingLast; + } + + return val; +} + +/* + * When a vPE is made resident, the GIC starts parsing the virtual pending + * table to deliver pending interrupts. This takes place asynchronously, + * and can at times take a long while. + */ +static void its_wait_vpt_parse_complete(void __iomem *vlpi_base) +{ + if ( !gic_support_vptValidDirty() ) + return; + + read_vpend_dirty_clean(vlpi_base, 500); +} + +static uint64_t its_clear_vpend_valid(void __iomem *vlpi_base, uint64_t cl= r, + uint64_t set) +{ + unsigned int count =3D 1000000; /* 1s! */ + uint64_t val; + + /* + * Clearing the Valid bit informs the Redistributor that a context + * switch is taking place. + */ + val =3D gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); + val &=3D ~GICR_VPENDBASER_Valid; + val &=3D ~clr; + val |=3D set; + gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); + + return read_vpend_dirty_clean(vlpi_base, count); +} + +static void its_make_vpe_resident(struct its_vpe *vpe, unsigned int cpu) +{ + void __iomem *vlpi_base =3D gic_data_rdist_vlpi_base(cpu); + uint64_t val; + + /* Switch in this VM's virtual property table. */ + val =3D virt_to_maddr(vpe->its_vm->vproptable) & GENMASK(51, 12); + val |=3D gicv3_its_get_cacheability() << GICR_VPROPBASER_INNER_CACHEAB= ILITY_SHIFT; + val |=3D gicv3_its_get_shareability() << GICR_VPROPBASER_SHAREABILITY_= SHIFT; + val |=3D GIC_BASER_CACHE_SameAsInner << GICR_VPROPBASER_OUTER_CACHEABI= LITY_SHIFT; + val |=3D (HOST_LPIS_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; + gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); + + /* Switch in this VCPU's VPT. */ + val =3D virt_to_maddr(vpe->vpendtable) & GENMASK(51, 16); + val |=3D gicv3_its_get_cacheability() << GICR_VPENDBASER_INNER_CACHEAB= ILITY_SHIFT; + val |=3D gicv3_its_get_shareability() << GICR_VPENDBASER_SHAREABILITY_= SHIFT; + val |=3D GIC_BASER_CACHE_SameAsInner << GICR_VPENDBASER_OUTER_CACHEABI= LITY_SHIFT; + /* + * When the GICR_VPENDBASER.Valid bit is written from 0 to 1, + * this bit is RES1. + */ + val |=3D GICR_VPENDBASER_PendingLast; + val |=3D vpe->idai ? GICR_VPENDBASER_IDAI : 0; + val |=3D GICR_VPENDBASER_Valid; + gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); + + its_wait_vpt_parse_complete(vlpi_base); +} + +static void its_make_vpe_non_resident(struct its_vpe *vpe, unsigned int cp= u) +{ + void __iomem *vlpi_base =3D gic_data_rdist_vlpi_base(cpu); + uint64_t val; + + val =3D its_clear_vpend_valid(vlpi_base, 0, 0); + vpe->idai =3D val & GICR_VPENDBASER_IDAI; + vpe->pending_last =3D val & GICR_VPENDBASER_PendingLast; +} + +void vgic_v4_load(struct vcpu *vcpu) +{ + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; + + + if ( vpe->resident ) + return; + + its_make_vpe_resident(vpe, vcpu->processor); + vpe->resident =3D true; +} + +void vgic_v4_put(struct vcpu *vcpu, bool need_db) +{ + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; + + if ( !vpe->resident ) + return; + + its_make_vpe_non_resident(vpe, vcpu->processor); + vpe->resident =3D false; +} diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c index ea48c5375a..44db142dbd 100644 --- a/xen/arch/arm/gic-vgic.c +++ b/xen/arch/arm/gic-vgic.c @@ -377,6 +377,12 @@ int vgic_vcpu_pending_irq(struct vcpu *v) } } =20 +#ifdef CONFIG_GICV4 + if ( gic_is_gicv4() ) + if ( v->arch.vgic.its_vpe->pending_last ) + rc =3D 1; +#endif + out: spin_unlock_irqrestore(&v->arch.vgic.lock, flags); return rc; diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.= h index afb1cc3751..04a20bdca5 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -362,7 +362,7 @@ struct gic_hw_operations { /* Save GIC registers */ void (*save_state)(struct vcpu *v); /* Restore GIC registers */ - void (*restore_state)(const struct vcpu *v); + void (*restore_state)(struct vcpu *v); /* Dump GIC LR register information */ void (*dump_state)(const struct vcpu *v); =20 diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/= asm/gic_v3_defs.h index 3a7d18ef59..0db75309cf 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -257,6 +257,12 @@ struct rdist_region { bool single_rdist; }; =20 +/* per-cpu re-distributor base */ +DECLARE_PER_CPU(void __iomem*, rbase); + +#define GICD_RDIST_BASE (this_cpu(rbase)) +#define GICD_RDIST_BASE_CPU(cpu) (per_cpu(rbase, cpu)) + #endif /* __ASM_ARM_GIC_V3_DEFS_H__ */ =20 /* diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h index ba81b25bde..37b6b92f0c 100644 --- a/xen/arch/arm/include/asm/gic_v4_its.h +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -56,6 +56,15 @@ void gicv4_its_vpeid_allocator_init(void); #define GICR_VPROPBASER 0x0070 #define GICR_VPENDBASER 0x0078 =20 +#define GICR_VPROPBASER_OUTER_CACHEABILITY_SHIFT 56 +#define GICR_VPROPBASER_SHAREABILITY_SHIFT 10 +#define GICR_VPROPBASER_SHAREABILITY_MASK \ + (3UL << GICR_VPROPBASER_SHAREABILITY_SHIFT) +#define GICR_VPROPBASER_INNER_CACHEABILITY_SHIFT 7 +#define GICR_VPROPBASER_INNER_CACHEABILITY_MASK \ + (7UL << GICR_VPROPBASER_INNER_CACHEABILITY_SHIFT) +#define GICR_VPROPBASER_IDBITS_MASK 0x1f + #define GICR_VPENDBASER_Dirty (1UL << 60) #define GICR_VPENDBASER_PendingLast (1UL << 61) #define GICR_VPENDBASER_IDAI (1UL << 62) diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index 580310fec4..9ef667decb 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -417,6 +417,8 @@ bool gic_is_gicv4(void); int vgic_v4_its_vm_init(struct domain *d); void vgic_v4_free_its_vm(struct domain *d); int vgic_v4_its_vpe_init(struct vcpu *vcpu); +void vgic_v4_load(struct vcpu *vcpu); +void vgic_v4_put(struct vcpu *vcpu, bool need_db); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 075950dc-5880-4d24-e1ce-08de62762c00 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:41.6618 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: y7u24g0Ke3qQoGWBInZ4xP5waUsn/dG/0q2QQBMhra+iFQtcTiGyIUe2dmQgP49LKy/JPqVPl989KEvE5bwung== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Do necessary allocations for GICv4 VLPI injection. When creating a domain allocate its_vm and property tables. For each VCPU allocate a VPe with a unique vpe id and separate pending tabl= e. Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 157 ++++++++++++---- xen/arch/arm/gic-v3-lpi.c | 61 +++++- xen/arch/arm/gic-v3.c | 18 ++ xen/arch/arm/gic-v4-its.c | 259 ++++++++++++++++++++++++++ xen/arch/arm/include/asm/gic_v3_its.h | 17 ++ xen/arch/arm/include/asm/gic_v4_its.h | 1 + xen/arch/arm/include/asm/vgic.h | 3 + xen/arch/arm/vgic.c | 25 ++- 8 files changed, 496 insertions(+), 45 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 2328595a85..fb1d2709be 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -31,6 +31,8 @@ LIST_HEAD(host_its_list); =20 =20 +unsigned int nvpeid =3D 16; + /* * It is unlikely that a platform implements ITSes with different quirks, * so assume they all share the same. @@ -228,7 +230,7 @@ int gicv3_its_wait_commands(struct host_its *hw_its) return -ETIMEDOUT; } =20 -static uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, +uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, uint64_t reg) { reg &=3D ~GENMASK(51, 16); @@ -443,6 +445,54 @@ struct its_baser *its_get_baser(struct host_its *hw_it= s, uint32_t type) return NULL; } =20 +bool its_alloc_table_entry(struct its_baser *baser, uint32_t id) +{ + uint64_t reg =3D baser->val; + bool indirect =3D reg & GITS_BASER_INDIRECT; + unsigned int idx; + __le64 *table; + unsigned int entry_size =3D GITS_BASER_ENTRY_SIZE(reg); + + /* Don't allow id that exceeds single, flat table limit */ + if ( !indirect ) + return (id < (baser->table_size / entry_size)); + + /* Compute 1st level table index & check if that exceeds table limit *= / + idx =3D id / (baser->pagesz / entry_size); + if ( idx >=3D (baser->pagesz / GITS_LVL1_ENTRY_SIZE) ) + return false; + + table =3D baser->base; + + /* Allocate memory for 2nd level table */ + if (!table[idx]) + { + unsigned int page_size =3D baser->pagesz; + void *buffer; + + buffer =3D alloc_xenheap_pages(get_order_from_bytes(page_size), + gicv3_its_get_memflags()); + if ( !buffer ) + return -ENOMEM; + + /* Flush Lvl2 table to PoC if hw doesn't support coherency */ + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) + clean_and_invalidate_dcache_va_range(buffer, page_size); + + table[idx] =3D cpu_to_le64(virt_to_maddr(buffer) | GITS_VALID_BIT)= ; + + /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) + clean_and_invalidate_dcache_va_range(table + idx, + GITS_LVL1_ENTRY_SIZE); + + /* Ensure updated table contents are visible to ITS hardware */ + dsb(sy); + } + + return true; +} + static int its_map_baser(void __iomem *basereg, uint64_t regc, unsigned int nr_items, struct its_baser *baser) { @@ -737,13 +787,75 @@ static int gicv3_its_map_host_events(struct host_its = *its, return ret; } =20 - /* TODO: Consider using INVALL here. Didn't work on the model, though.= */ + return 0; +} + +static bool its_alloc_device_table(struct host_its *hw_its, uint32_t dev_i= d) +{ + struct its_baser *baser; + + baser =3D its_get_baser(hw_its, GITS_BASER_TYPE_DEVICE); + if ( !baser ) + return false; + + return its_alloc_table_entry(baser, dev_id); +} + +struct its_device *its_create_device(struct host_its *hw_its, + uint32_t host_devid, uint64_t nr_even= ts) +{ + void *itt_addr =3D NULL; + struct its_device *dev =3D NULL; + int ret; + + /* Sanitise the provided hardware values against the host ITS. */ + if ( host_devid >=3D BIT(hw_its->devid_bits, UL) ) + return NULL; + + dev =3D xzalloc(struct its_device); + if ( !dev ) + return NULL; + + /* An Interrupt Translation Table needs to be 256-byte aligned. */ + dev->itt_order =3D get_order_from_bytes(nr_events * hw_its->itte_size)= ; + itt_addr =3D alloc_xenheap_pages(dev->itt_order, gicv3_its_get_memflag= s()); + if ( !itt_addr ) + goto fail_dev; + + clean_and_invalidate_dcache_va_range(itt_addr, + nr_events * hw_its->itte_size); + =20 - ret =3D its_send_cmd_sync(its, 0); + if ( !its_alloc_device_table(hw_its, host_devid) ) + goto fail_itt; + + ret =3D its_send_cmd_mapd(hw_its, host_devid, max(fls(nr_events - 1), = 1U), + virt_to_maddr(itt_addr), true); if ( ret ) - return ret; + goto fail_itt; =20 - return gicv3_its_wait_commands(its); + dev->itt_addr =3D itt_addr; + dev->hw_its =3D hw_its; + dev->host_devid =3D host_devid; + dev->eventids =3D nr_events; + + return dev; + +fail_itt: + free_xenheap_pages(itt_addr, dev->itt_order); +fail_dev: + xfree(dev); + + return NULL; +} + +static void its_free_device(struct its_device *dev) +{ + xfree(dev->host_lpi_blocks); + xfree(dev->itt_addr); + if ( dev->pend_irqs ) + xfree(dev->pend_irqs); + xfree(dev); } =20 /* @@ -758,12 +870,10 @@ int gicv3_its_map_guest_device(struct domain *d, paddr_t guest_doorbell, uint32_t guest_devi= d, uint64_t nr_events, bool valid) { - void *itt_addr =3D NULL; struct host_its *hw_its; struct its_device *dev =3D NULL; struct rb_node **new =3D &d->arch.vgic.its_devices.rb_node, *parent = =3D NULL; int i, ret =3D -ENOENT; /* "i" must be signed to check for >=3D 0= below. */ - unsigned int order; =20 hw_its =3D gicv3_its_find_by_doorbell(host_doorbell); if ( !hw_its ) @@ -823,23 +933,12 @@ int gicv3_its_map_guest_device(struct domain *d, if ( !valid ) goto out_unlock; =20 - ret =3D -ENOMEM; - - /* An Interrupt Translation Table needs to be 256-byte aligned. */ - order =3D get_order_from_bytes(max(nr_events * hw_its->itte_size, 256U= L)); - itt_addr =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); - if ( !itt_addr ) - goto out_unlock; - - memset(itt_addr, 0, PAGE_SIZE << order); - - clean_and_invalidate_dcache_va_range(itt_addr, - nr_events * hw_its->itte_size); - - dev =3D xzalloc(struct its_device); + dev =3D its_create_device(hw_its, host_devid, nr_events); if ( !dev ) goto out_unlock; =20 + ret =3D -ENOMEM; + /* * Allocate the pending_irqs for each virtual LPI. They will be put * into the domain's radix tree upon the guest's MAPTI command. @@ -860,14 +959,6 @@ int gicv3_its_map_guest_device(struct domain *d, if ( !dev->host_lpi_blocks ) goto out_unlock; =20 - ret =3D its_send_cmd_mapd(hw_its, host_devid, fls(nr_events - 1), - virt_to_maddr(itt_addr), true); - if ( ret ) - goto out_unlock; - - dev->itt_addr =3D itt_addr; - dev->itt_order =3D order; - dev->hw_its =3D hw_its; dev->guest_doorbell =3D guest_doorbell; dev->guest_devid =3D guest_devid; dev->host_devid =3D host_devid; @@ -920,13 +1011,7 @@ out_unlock: =20 out: if ( dev ) - { - xfree(dev->pend_irqs); - xfree(dev->host_lpi_blocks); - } - if ( itt_addr ) - free_xenheap_pages(itt_addr, order); - xfree(dev); + its_free_device(dev); =20 return ret; } diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index c029d5d7a4..3c2649b695 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -58,6 +58,7 @@ static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redist)= ; =20 #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) +uint32_t lpi_id_bits; =20 static union host_lpi *gic_get_host_lpi(uint32_t plpi) { @@ -202,14 +203,11 @@ void gicv3_lpi_update_host_entry(uint32_t host_lpi, i= nt domain_id, write_u64_atomic(&hlpip->data, hlpi.data); } =20 -static int gicv3_lpi_allocate_pendtable(unsigned int cpu) +struct page_info *lpi_allocate_pendtable(void) { void *pendtable; unsigned int order; =20 - if ( per_cpu(lpi_redist, cpu).pending_table ) - return -EBUSY; - /* * The pending table holds one bit per LPI and even covers bits for * interrupt IDs below 8192, so we allocate the full range. @@ -219,20 +217,34 @@ static int gicv3_lpi_allocate_pendtable(unsigned int = cpu) order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (uns= igned long)SZ_64K)); pendtable =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); if ( !pendtable ) - return -ENOMEM; + return NULL; =20 memset(pendtable, 0, PAGE_SIZE << order); /* Make sure the physical address can be encoded in the register. */ if ( virt_to_maddr(pendtable) & ~GENMASK(51, 16) ) { free_xenheap_pages(pendtable, order); - return -ERANGE; + return NULL; } clean_and_invalidate_dcache_va_range(pendtable, lpi_data.max_host_lpi_ids / 8); =20 - per_cpu(lpi_redist, cpu).pending_table =3D pendtable; + return virt_to_page(pendtable); +} + +static int gicv3_lpi_allocate_pendtable(unsigned int cpu) +{ + struct page_info *pendtable; + + if ( per_cpu(lpi_redist, cpu).pending_table ) + return -EBUSY; + + pendtable =3D lpi_allocate_pendtable(); + if ( !pendtable ) + return -EINVAL; =20 + per_cpu(lpi_redist, cpu).pending_table =3D page_to_virt(pendtable); +=20 return 0; } =20 @@ -274,6 +286,38 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist= _base) return 0; } =20 +void *lpi_allocate_proptable(void) +{ + void *table; + int order; + + /* The property table holds one byte per LPI. */ + order =3D get_order_from_bytes(lpi_data.max_host_lpi_ids); + table =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); + if ( !table ) + return NULL; + + /* Make sure the physical address can be encoded in the register. */ + if ( (virt_to_maddr(table) & ~GENMASK(51, 12)) ) + { + free_xenheap_pages(table, order); + return NULL; + } + memset(table, GIC_PRI_IRQ | LPI_PROP_RES1, MAX_NR_HOST_LPIS); + clean_and_invalidate_dcache_va_range(table, MAX_NR_HOST_LPIS); + + return table; +} + +void lpi_free_proptable(void *vproptable) +{ + int order; + + /* The property table holds one byte per LPI. */ + order =3D get_order_from_bytes(lpi_data.max_host_lpi_ids); + free_xenheap_pages(vproptable, order); +} + /* * Tell a redistributor about the (shared) property table, allocating one * if not already done. @@ -314,7 +358,8 @@ static int gicv3_lpi_set_proptable(void __iomem * rdist= _base) } =20 /* Encode the number of bits needed, minus one */ - reg |=3D fls(lpi_data.max_host_lpi_ids - 1) - 1; + lpi_id_bits =3D fls(lpi_data.max_host_lpi_ids - 1); + reg |=3D lpi_id_bits - 1; =20 reg |=3D virt_to_maddr(lpi_data.lpi_property); =20 diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 14852d18c2..d4af332b0e 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -2083,6 +2083,22 @@ static bool gic_dist_supports_lpis(void) return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); } =20 +#ifdef CONFIG_GICV4 +static void __init gicv4_init(void) +{ + gicv3_info.hw_version =3D GIC_V4; + + + gicv4_its_vpeid_allocator_init(); + +} +#else +static void __init gicv4_init(void) +{ + ASSERT_UNREACHABLE(); +} +#endif + /* Set up the GIC */ static int __init gicv3_init(void) { @@ -2157,6 +2173,8 @@ static int __init gicv3_init(void) =20 gicv3_hyp_init(); =20 + if ( gic_is_gicv4() ) + gicv4_init(); out: spin_unlock(&gicv3.lock); =20 diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index 358d0bffb9..fac3b44a94 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -27,6 +27,83 @@ #include =20 =20 +/* + * VPE ID is at most 16 bits. + * Using a bitmap here limits us to 65536 concurrent VPEs. + */ +static unsigned long *vpeid_mask; + +static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOCKED; + +void __init gicv4_its_vpeid_allocator_init(void) +{ + /* Allocate space for vpeid_mask based on MAX_VPEID */ + vpeid_mask =3D xzalloc_array(unsigned long, BITS_TO_LONGS(MAX_VPEID)); + + if ( !vpeid_mask ) + panic("Could not allocate VPEID bitmap space\n"); +} + +static int __init its_alloc_vpeid(struct its_vpe *vpe) +{ + int id; + + spin_lock(&vpeid_alloc_lock); + + id =3D find_first_zero_bit(vpeid_mask, MAX_VPEID); + + if ( id =3D=3D MAX_VPEID ) + { + id =3D -EBUSY; + printk(XENLOG_ERR "VPEID pool exhausted\n"); + goto out; + } + + set_bit(id, vpeid_mask); + +out: + spin_unlock(&vpeid_alloc_lock); + + return id; +} + +static void __init its_free_vpeid(uint32_t vpe_id) +{ + spin_lock(&vpeid_alloc_lock); + + clear_bit(vpe_id, vpeid_mask); + + spin_unlock(&vpeid_alloc_lock); +} + +static bool __init its_alloc_vpe_entry(uint32_t vpe_id) +{ + struct host_its *hw_its; + + /* + * Make sure the L2 tables are allocated on *all* v4 ITSs. We + * could try and only do it on ITSs corresponding to devices + * that have interrupts targeted at this VPE, but the + * complexity becomes crazy. + */ + list_for_each_entry(hw_its, &host_its_list, entry) + { + struct its_baser *baser; + + if ( !hw_its->is_v4 ) + continue; + + baser =3D its_get_baser(hw_its, GITS_BASER_TYPE_VCPU); + if ( !baser ) + return false; + + if ( !its_alloc_table_entry(baser, vpe_id) ) + return false; + } + + return true; +} + static int its_send_cmd_vsync(struct host_its *its, uint16_t vpeid) { uint64_t cmd[4]; @@ -39,6 +116,188 @@ static int its_send_cmd_vsync(struct host_its *its, ui= nt16_t vpeid) return its_send_command(its, cmd); } =20 +static int its_send_cmd_vmapp(struct host_its *its, struct its_vpe *vpe, + bool valid) +{ + uint64_t cmd[4]; + uint16_t vpeid =3D vpe->vpe_id; + uint64_t vpt_addr; + int ret; + + cmd[0] =3D GITS_CMD_VMAPP; + cmd[1] =3D (uint64_t)vpeid << 32; + cmd[2] =3D valid ? GITS_VALID_BIT : 0; + + /* Unmap command */ + if ( !valid ) + goto out; + + /* Target redistributor */ + cmd[2] |=3D encode_rdbase(its, vpe->col_idx, 0x0); + vpt_addr =3D virt_to_maddr(vpe->vpendtable); + cmd[3] =3D (vpt_addr & GENMASK(51, 16)) | + ((HOST_LPIS_NRBITS - 1) & GENMASK(4, 0)); + + out: + ret =3D its_send_command(its, cmd); + + return ret; +} + +static int its_send_cmd_vinvall(struct host_its *its, struct its_vpe *vpe) +{ + uint64_t cmd[4]; + uint16_t vpeid =3D vpe->vpe_id; + + cmd[0] =3D GITS_CMD_VINVALL; + cmd[1] =3D (uint64_t)vpeid << 32; + cmd[2] =3D 0x00; + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + +static int its_map_vpe(struct host_its *its, struct its_vpe *vpe) +{ + int ret; + + /* + * VMAPP command maps the vPE to the target RDbase, including an + * associated virtual LPI Pending table. + */ + ret =3D its_send_cmd_vmapp(its, vpe, true); + if ( ret ) + return ret; + + ret =3D its_send_cmd_vinvall(its, vpe); + if ( ret ) + return ret; + + ret =3D its_send_cmd_vsync(its, vpe->vpe_id); + if ( ret ) + return ret; + + return 0; +} +static int __init its_vpe_init(struct its_vpe *vpe) +{ + int vpe_id, rc =3D -ENOMEM; + struct page_info *vpendtable; + struct host_its *hw_its; + + /* Allocate vpe id */ + vpe_id =3D its_alloc_vpeid(vpe); + if ( vpe_id < 0 ) + return rc; + + /* Allocate VPT */ + vpendtable =3D lpi_allocate_pendtable(); + + if ( !vpendtable ) + goto fail_vpt; + + if ( !its_alloc_vpe_entry(vpe_id) ) + goto fail_entry; + + rwlock_init(&vpe->lock); + vpe->vpe_id =3D vpe_id; + vpe->vpendtable =3D page_to_virt(vpendtable); + /* + * We eagerly inform all the v4 ITS and map vPE to the first + * possible CPU + */ + vpe->col_idx =3D cpumask_first(&cpu_online_map); + list_for_each_entry(hw_its, &host_its_list, entry) + { + if ( !hw_its->is_v4 ) + continue; + + if ( its_map_vpe(hw_its, vpe) ) + goto fail_entry; + } + + return 0; + + fail_entry: + xfree(page_to_virt(vpendtable)); + fail_vpt: + its_free_vpeid(vpe_id); + + return rc; +} + +static void __init its_vpe_teardown(struct its_vpe *vpe) +{ + unsigned int order; + + order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (uns= igned long)SZ_64K)); + its_free_vpeid(vpe->vpe_id); + free_xenheap_pages(vpe->vpendtable, order); + xfree(vpe); +} + +int vgic_v4_its_vm_init(struct domain *d) +{ + unsigned int nr_vcpus =3D d->max_vcpus; + int ret =3D -ENOMEM; + + if ( !gicv3_its_host_has_its() ) + return 0; + + d->arch.vgic.its_vm =3D xzalloc(struct its_vm); + if ( !d->arch.vgic.its_vm ) + return ret; + + d->arch.vgic.its_vm->vpes =3D xzalloc_array(struct its_vpe *, nr_vcpus= ); + if ( !d->arch.vgic.its_vm->vpes ) + goto fail_vpes; + d->arch.vgic.its_vm->nr_vpes =3D nr_vcpus; + + d->arch.vgic.its_vm->vproptable =3D lpi_allocate_proptable(); + if ( !d->arch.vgic.its_vm->vproptable ) + goto fail_vprop; + + return 0; + +fail_vprop: + xfree(d->arch.vgic.its_vm->vpes); + fail_vpes: + xfree(d->arch.vgic.its_vm); + + return ret; +} + +void vgic_v4_free_its_vm(struct domain *d) +{ + struct its_vm *its_vm =3D d->arch.vgic.its_vm; + if ( its_vm->vpes ) + xfree(its_vm->vpes); + if ( its_vm->vproptable ) + lpi_free_proptable(its_vm); +} + +int vgic_v4_its_vpe_init(struct vcpu *vcpu) +{ + int ret; + struct its_vm *its_vm =3D vcpu->domain->arch.vgic.its_vm; + unsigned int vcpuid =3D vcpu->vcpu_id; + + vcpu->arch.vgic.its_vpe =3D xzalloc(struct its_vpe); + if ( !vcpu->arch.vgic.its_vpe ) + return -ENOMEM; + + its_vm->vpes[vcpuid] =3D vcpu->arch.vgic.its_vpe; + vcpu->arch.vgic.its_vpe->its_vm =3D its_vm; + + ret =3D its_vpe_init(vcpu->arch.vgic.its_vpe); + if ( ret ) + { + its_vpe_teardown(vcpu->arch.vgic.its_vpe); + return ret; + } + return 0; +} + static int its_send_cmd_vmapti(struct host_its *its, struct its_device *de= v, uint32_t eventid) { diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index bd2696f354..411beb81c8 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -77,6 +77,7 @@ #define GITS_BASER_ENTRY_SIZE_SHIFT 48 #define GITS_BASER_ENTRY_SIZE(reg) \ ((((reg) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) += 1) +#define GITS_LVL1_ENTRY_SIZE 8UL #define GITS_BASER_SHAREABILITY_SHIFT 10 #define GITS_BASER_PAGE_SIZE_SHIFT 8 #define GITS_BASER_SIZE_MASK 0xff @@ -117,9 +118,19 @@ /* We allocate LPIs on the hosts in chunks of 32 to reduce handling overhe= ad. */ #define LPI_BLOCK 32U =20 +extern unsigned int nvpeid; +/* The maximum number of VPEID bits supported by VLPI commands */ +#define ITS_MAX_VPEID_BITS nvpeid +#define MAX_VPEID (1UL << ITS_MAX_VPEID_BITS) + #ifdef CONFIG_GICV4 #include #endif + +extern uint32_t lpi_id_bits; +#define HOST_LPIS_NRBITS lpi_id_bits +#define MAX_HOST_LPIS BIT(lpi_id_bits, UL) + /* * Describes a device which is using the ITS and is used by a guest. * Since device IDs are per ITS (in contrast to vLPIs, which are per @@ -169,6 +180,7 @@ struct host_its { void *cmd_buf; unsigned int flags; struct its_baser tables[GITS_BASER_NR_REGS]; + bool is_v4; }; =20 /* Map a collection for this host CPU to each host ITS. */ @@ -273,8 +285,13 @@ struct pending_irq *gicv3_assign_guest_event(struct do= main *d, void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, uint32_t virt_lpi); struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type); +bool its_alloc_table_entry(struct its_baser *baser, uint32_t id); +struct page_info *lpi_allocate_pendtable(void); +void *lpi_allocate_proptable(void); +void lpi_free_proptable(void *vproptable); void lpi_write_config(uint8_t *prop_table, uint32_t lpi, uint8_t clr, uint8_t set); +uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, uint64_t= reg); int its_send_command(struct host_its *hw_its, const void *its_cmd); =20 struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h index 722247ec60..fb0ef37bbe 100644 --- a/xen/arch/arm/include/asm/gic_v4_its.h +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -49,6 +49,7 @@ struct event_vlpi_map { unsigned int nr_vlpis; }; =20 +void gicv4_its_vpeid_allocator_init(void); #endif =20 /* diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi= c.h index f12d736808..580310fec4 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -414,6 +414,9 @@ bool gic_is_gicv4(void); #define gic_is_gicv4() (false) #endif =20 +int vgic_v4_its_vm_init(struct domain *d); +void vgic_v4_free_its_vm(struct domain *d); +int vgic_v4_its_vpe_init(struct vcpu *vcpu); #endif /* !CONFIG_NEW_VGIC */ =20 /*** Common VGIC functions used by Xen arch code ****/ diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 0da8c1a425..6baf870ad5 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -22,6 +22,7 @@ =20 #include #include +#include #include =20 =20 @@ -329,6 +330,15 @@ int domain_vgic_init(struct domain *d, unsigned int nr= _spis) for ( i =3D 0; i < NR_GIC_SGI; i++ ) set_bit(i, d->arch.vgic.allocated_irqs); =20 + if ( gic_is_gicv4() ) + { + ret =3D vgic_v4_its_vm_init(d); + if ( ret ) + { + printk(XENLOG_ERR "GICv4 its vm allocation failed\n"); + return ret; + } + } return 0; } =20 @@ -366,11 +376,14 @@ void domain_vgic_free(struct domain *d) #endif xfree(d->arch.vgic.pending_irqs); xfree(d->arch.vgic.allocated_irqs); + + if ( gic_is_gicv4() ) + vgic_v4_free_its_vm(d); } =20 int vcpu_vgic_init(struct vcpu *v) { - int i; + int i, ret; =20 v->arch.vgic.private_irqs =3D xzalloc(struct vgic_irq_rank); if ( v->arch.vgic.private_irqs =3D=3D NULL ) @@ -389,6 +402,16 @@ int vcpu_vgic_init(struct vcpu *v) INIT_LIST_HEAD(&v->arch.vgic.lr_pending); spin_lock_init(&v->arch.vgic.lock); =20 + if ( gic_is_gicv4() && gicv3_its_host_has_its()) + { + ret =3D vgic_v4_its_vpe_init(v); + if ( ret ) + { + printk(XENLOG_ERR "GICv4 its vpe allocation failed\n"); + return ret; + } + } + return 0; } =20 --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:17:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:17:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218893.1527781 (Exim 4.92) (envelope-from ) id 1vmwcc-0007L1-RV; Mon, 02 Feb 2026 16:17:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218893.1527781; Mon, 02 Feb 2026 16:17:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwcc-0007KT-Mh; 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Mon, 2 Feb 2026 16:14:45 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4c1ce79a-0052-11f1-b161-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=PZFwqLP8jnAX3vL533jFRxDiixPUBW2I/QRHrFwYd9qqpzalhNpjeYhXYGWrcGmuJUWz+toKCq/mbF2qkz0n9ITyIrZadbY4OTvmG/tNcEu2DQQFgnux7rmSp9yT4S/BOk9HSk8b/Z8ZCwI0DkNLfmTz4OJ5M2+QeF2CANSqZ0BiFw4MZSTAiaEw/lRShgP5RTHym8sfhznHZ3YvkDrzKTdiwMK1dF+JTiU4GwnmBxlawBPH43JwNJaSOd4R/885eh53byFsLjBtObUN4ZKzNEFI6qBwnMgdQDPFGfwlKW8Iugdg4HMCE2EfSUU22xatwPKRxJsgpNtxCsz2dMFPmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 38f49fc7-6f95-4cff-ec65-08de62762e6d X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:43.9878 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: A236MjKGG2Pg/MIz8G3Z7Od71MBa6gWYClrUz5yOodliucWrSkFJrLtAAwKrN08z+eFPi2ebWt2TTKeI6zSnAQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 Extend the check to mark interrupts as Group1 for all GIC versions >=3D 3 Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 07736179db..1cb3169b72 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1366,10 +1366,10 @@ static void gicv3_update_lr(int lr, unsigned int vi= rq, uint8_t priority, val =3D (((uint64_t)state & 0x3) << ICH_LR_STATE_SHIFT); =20 /* - * When the guest is GICv3, all guest IRQs are Group 1, as Group0 - * would result in a FIQ in the guest, which it wouldn't expect + * When the guest is GICv3/GICv4/GICv4.1, all guest IRQs are Group 1, = as + * Group0 would result in a FIQ in the guest, which it wouldn't expect */ - if ( current->domain->arch.vgic.version =3D=3D GIC_V3 ) + if ( current->domain->arch.vgic.version >=3D GIC_V3 ) val |=3D ICH_LR_GRP1; =20 val |=3D (uint64_t)priority << ICH_LR_PRIORITY_SHIFT; @@ -1455,10 +1455,10 @@ static void gicv3_write_lr(int lr, const struct gic= _lr *lr_reg) } =20 /* - * When the guest is using vGICv3, all the IRQs are Group 1. Group 0 - * would result in a FIQ, which will not be expected by the guest OS. + * When the guest is using vGICv3/vGICv4/vGICv4.1, all the IRQs are Gr= oup 1. + * Group 0 would result in a FIQ, which will not be expected by the gu= est OS. */ - if ( vgic_version =3D=3D GIC_V3 ) + if ( vgic_version >=3D GIC_V3 ) lrv |=3D ICH_LR_GRP1; =20 gicv3_ich_write_lr(lr, lrv); --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:17:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:17:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218894.1527786 (Exim 4.92) (envelope-from ) id 1vmwcd-0007TO-9M; Mon, 02 Feb 2026 16:17:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218894.1527786; Mon, 02 Feb 2026 16:17:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwcd-0007Qj-1x; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c99e3eb7-35cf-4e75-69a0-08de62762ed7 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:44.6107 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JDe0wUbfyeAzn7BTfW4lAGXf9AM5f4YJuxLQ8nR1E/eiTGu7nxnV6bMZmuum0lCHjuiCCiaDT/t396RSEyHpWA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 Signed-off-by: Mykyta Poturai --- xen/arch/arm/gic-v3-its.c | 13 ++ xen/arch/arm/gic-v3.c | 1 + xen/arch/arm/gic-v4-its.c | 207 ++++++++++++++++++++++++- xen/arch/arm/include/asm/gic_v3_defs.h | 7 + xen/arch/arm/include/asm/gic_v3_its.h | 7 + xen/arch/arm/include/asm/gic_v4_its.h | 5 + xen/arch/arm/include/asm/vgic.h | 2 + 7 files changed, 235 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index fa5c1eb6d1..5979a82526 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -333,6 +333,19 @@ int its_send_cmd_discard(struct host_its *its, struct = its_device *dev, return its_send_command(its, cmd); } =20 +int its_send_cmd_movi(struct host_its *its, uint32_t deviceid, uint32_t ev= entid, + uint16_t icid) +{ + uint64_t cmd[4]; + + cmd[0] =3D GITS_CMD_MOVI | ((uint64_t)deviceid << 32); + cmd[1] =3D eventid; + cmd[2] =3D icid; + cmd[3] =3D 0x00; + + return its_send_command(its, cmd); +} + /* Set up the (1:1) collection mapping for the given host CPU. */ int gicv3_its_setup_collection(unsigned int cpu) { diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 1cb3169b72..fb80038f17 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -2096,6 +2096,7 @@ static void __init gicv4_init(void) =20 gicv4_its_vpeid_allocator_init(); =20 + gicv4_init_vpe_proxy(); } #else static void __init gicv4_init(void) diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c index 0462976b93..83ee0510ac 100644 --- a/xen/arch/arm/gic-v4-its.c +++ b/xen/arch/arm/gic-v4-its.c @@ -39,6 +39,13 @@ static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOCKE= D; static uint16_t vmovp_seq_num; static spinlock_t vmovp_lock =3D SPIN_LOCK_UNLOCKED; =20 +static struct { + spinlock_t lock; + struct its_device *dev; + struct its_vpe **vpes; + int next_victim; +} vpe_proxy; + void __init gicv4_its_vpeid_allocator_init(void) { /* Allocate space for vpeid_mask based on MAX_VPEID */ @@ -201,6 +208,124 @@ static int its_map_vpe(struct host_its *its, struct i= ts_vpe *vpe) =20 return 0; } +static int gicv4_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) +{ + int ret; + + /* Already unmapped? */ + if ( vpe->vpe_proxy_event =3D=3D -1 ) + return 0; + + ret =3D its_send_cmd_discard(vpe_proxy.dev->hw_its, vpe_proxy.dev, + vpe->vpe_proxy_event); + if ( ret ) + return ret; + vpe_proxy.vpes[vpe->vpe_proxy_event] =3D NULL; + + /* + * We don't track empty slots at all, so let's move the + * next_victim pointer to quickly reuse the unmapped slot + */ + if ( vpe_proxy.vpes[vpe_proxy.next_victim] ) + vpe_proxy.next_victim =3D vpe->vpe_proxy_event; + + vpe->vpe_proxy_event =3D -1; + + return 0; +} + +static void gicv4_vpe_db_proxy_unmap(struct its_vpe *vpe) +{ + if ( !gic_support_directLPI() ) + { + unsigned long flags; + + spin_lock_irqsave(&vpe_proxy.lock, flags); + gicv4_vpe_db_proxy_unmap_locked(vpe); + spin_unlock_irqrestore(&vpe_proxy.lock, flags); + } +} + +/* + * If a GICv4.0 doesn't implement Direct LPIs (which is extremely + * likely), the only way to perform an invalidate is to use a fake + * device to issue an INV command, implying that the LPI has first + * been mapped to some event on that device. Since this is not exactly + * cheap, we try to keep that mapping around as long as possible, and + * only issue an UNMAP if we're short on available slots. + * + * GICv4.1 mandates that we're able to invalidate by writing to a + * MMIO register. And most of the time, we don't even have to invalidate + * vPE doorbell, as the redistributor can be told whether to generate a + * doorbell or not. + */ +static int gicv4_vpe_db_proxy_map_locked(struct its_vpe *vpe) +{ + int ret; + + /* Already mapped? */ + if ( vpe->vpe_proxy_event !=3D -1 ) + return 0; + + /* This slot was already allocated. Kick the other VPE out. */ + if ( vpe_proxy.vpes[vpe_proxy.next_victim] ) + { + struct its_vpe *old_vpe =3D vpe_proxy.vpes[vpe_proxy.next_victim]; + + ret =3D gicv4_vpe_db_proxy_unmap_locked(old_vpe); + if ( ret ) + return ret; + } + + /* Map the new VPE instead */ + vpe_proxy.vpes[vpe_proxy.next_victim] =3D vpe; + vpe->vpe_proxy_event =3D vpe_proxy.next_victim; + vpe_proxy.next_victim =3D (vpe_proxy.next_victim + 1) % + vpe_proxy.dev->eventids; + + return its_send_cmd_mapti(vpe_proxy.dev->hw_its, vpe_proxy.dev->host_d= evid, + vpe->vpe_proxy_event, vpe->vpe_db_lpi, + vpe->col_idx); +} + +int __init gicv4_init_vpe_proxy(void) +{ + struct host_its *hw_its; + uint32_t devid; + + if ( gic_support_directLPI() ) + { + printk("ITS: Using DirectLPI for GICv4 VPE invalidation\n"); + return 0; + } + + /* Any ITS will do, even if not v4 */ + hw_its =3D list_first_entry(&host_its_list, struct host_its, entry); + + vpe_proxy.vpes =3D xzalloc_array(struct its_vpe *, nr_cpu_ids); + if ( !vpe_proxy.vpes ) + { + printk(XENLOG_ERR "ITS: Can't allocate GICv4 VPE proxy device arra= y\n"); + return -ENOMEM; + } + + /* Use the last possible DevID */ + devid =3D BIT(hw_its->devid_bits, UL) - 1; + vpe_proxy.dev =3D its_create_device(hw_its, devid, nr_cpu_ids); + if ( !vpe_proxy.dev ) + { + printk(XENLOG_ERR "ITS: Can't allocate GICv4 VPE proxy device\n"); + return -ENOMEM; + } + + spin_lock_init(&vpe_proxy.lock); + vpe_proxy.next_victim =3D 0; + printk(XENLOG_INFO + "ITS: Allocated DevID %u as GICv4 VPE proxy device\n", devid); + + return 0; +} + static int __init its_vpe_init(struct its_vpe *vpe) { int vpe_id, rc =3D -ENOMEM; @@ -224,6 +349,7 @@ static int __init its_vpe_init(struct its_vpe *vpe) rwlock_init(&vpe->lock); vpe->vpe_id =3D vpe_id; vpe->vpendtable =3D page_to_virt(vpendtable); + vpe->vpe_proxy_event =3D -1; /* * We eagerly inform all the v4 ITS and map vPE to the first * possible CPU @@ -299,16 +425,45 @@ static int its_send_cmd_vmovp(struct its_vpe *vpe) return 0; } =20 +/* GICR_SYNCR.Busy =3D=3D 1 until the invalidation completes. */ +static void wait_for_syncr(void __iomem *rdbase) +{ + while ( readl_relaxed(rdbase + GICR_SYNCR) & 1 ) + cpu_relax(); +} + +void direct_lpi_inv(struct its_device *dev, uint32_t eventid, + uint32_t db_lpi, unsigned int cpu) +{ + void __iomem *rdbase; + uint64_t val; + /* Register-based LPI invalidation for DB on GICv4.0 */ + val =3D FIELD_PREP(GICR_INVLPIR_INTID, db_lpi); + + rdbase =3D per_cpu(rbase, cpu); + writeq_relaxed(val, rdbase + GICR_INVLPIR); + wait_for_syncr(rdbase); +} =20 static void its_vpe_send_inv_db(struct its_vpe *vpe) { - // struct its_device *dev =3D vpe_proxy.dev; - // unsigned long flags; + if ( gic_support_directLPI() ) + { + unsigned int cpu =3D vpe->col_idx; =20 - // spin_lock_irqsave(&vpe_proxy.lock, flags); - // gicv4_vpe_db_proxy_map_locked(vpe); - // its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_event= ); - // spin_unlock_irqrestore(&vpe_proxy.lock, flags); + /* Target the redistributor this VPE is currently known on */ + direct_lpi_inv(NULL, 0, vpe->vpe_db_lpi, cpu); + } + else + { + struct its_device *dev =3D vpe_proxy.dev; + unsigned long flags; + + spin_lock_irqsave(&vpe_proxy.lock, flags); + gicv4_vpe_db_proxy_map_locked(vpe); + its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_even= t); + spin_unlock_irqrestore(&vpe_proxy.lock, flags); + } } =20 static void its_vpe_inv_db(struct its_vpe *vpe) @@ -335,6 +490,7 @@ static void __init its_vpe_teardown(struct its_vpe *vpe= ) unsigned int order; =20 order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (uns= igned long)SZ_64K)); + gicv4_vpe_db_proxy_unmap(vpe); its_free_vpeid(vpe->vpe_id); free_xenheap_pages(vpe->vpendtable, order); xfree(vpe); @@ -830,6 +986,43 @@ static void vpe_to_cpuid_unlock(struct its_vpe *vpe, u= nsigned long *flags) spin_unlock_irqrestore(&vpe->vpe_lock, *flags); } =20 +static void gicv4_vpe_db_proxy_move(struct its_vpe *vpe, unsigned int from= , + unsigned int to) +{ + unsigned long flags; + + if ( gic_support_directLPI() ) + { + void __iomem *rdbase; + + rdbase =3D per_cpu(rbase, from); + /* Clear potential pending state on the old redistributor */ + writeq_relaxed(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); + wait_for_syncr(rdbase); + return; + } + + spin_lock_irqsave(&vpe_proxy.lock, flags); + + gicv4_vpe_db_proxy_map_locked(vpe); + + /* MOVI instructs the appropriate Redistributor to move the pending st= ate */ + its_send_cmd_movi(vpe_proxy.dev->hw_its, vpe_proxy.dev->host_devid, + vpe->vpe_proxy_event, to); + + /* + * ARM spec says that If, after using MOVI to move an interrupt from + * collection A to collection B, software moves the same interrupt aga= in + * from collection B to collection C, a SYNC command must be used befo= re + * the second MOVI for the Redistributor associated with collection A = to + * ensure correct behavior. + * So each time we issue VMOVI, we VSYNC the old VPE for good measure. + */ + WARN_ON(its_send_cmd_sync(vpe_proxy.dev->hw_its, from)); + + spin_unlock_irqrestore(&vpe_proxy.lock, flags); +} + static int gicv4_vpe_set_affinity(struct vcpu *vcpu) { struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; @@ -859,6 +1052,7 @@ static int gicv4_vpe_set_affinity(struct vcpu *vcpu) ret =3D its_send_cmd_vmovp(vpe); if ( ret ) goto out; + gicv4_vpe_db_proxy_move(vpe, from, to); =20 out: vpe_to_cpuid_unlock(vpe, &flags); @@ -940,4 +1134,3 @@ int its_vlpi_prop_update(struct pending_irq *pirq, uin= t8_t property, =20 return its_vlpi_set_doorbell(map, property & LPI_PROP_ENABLED); } - diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/= asm/gic_v3_defs.h index 0db75309cf..b4d50516ef 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -20,6 +20,13 @@ =20 #include =20 +#ifndef FIELD_GET +#define FIELD_GET(_mask, _reg) \ + ((typeof(_mask))(((_reg) & (_mask)) >> (ffs64(_mask) - 1))) +#endif + +#define FIELD_PREP(_mask, _val) \ + (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask)) /* * Additional registers defined in GIC v3. * Common GICD registers are defined in gic.h diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/a= sm/gic_v3_its.h index dababe97cd..0e82625840 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -236,6 +236,11 @@ int its_inv_lpi(struct host_its *its, struct its_devic= e *dev, uint32_t eventid, unsigned int cpu); int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid); +struct its_device *its_create_device(struct host_its *hw_its, + uint32_t host_devid, uint64_t nr_even= ts); +int its_send_cmd_movi(struct host_its *its, uint32_t deviceid, uint32_t ev= entid, + uint16_t icid); +int its_send_cmd_sync(struct host_its *its, unsigned int cpu); #ifdef CONFIG_ACPI unsigned long gicv3_its_make_hwdom_madt(const struct domain *d, void *base_ptr); @@ -326,6 +331,8 @@ void its_vpe_mask_db(struct its_vpe *vpe); int gicv4_its_vlpi_unmap(struct pending_irq *pirq); int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, bool needs_inv); +void direct_lpi_inv(struct its_device *dev, uint32_t eventid, + uint32_t db_lpi, unsigned int cpu); =20 /* ITS quirks handling. */ uint64_t gicv3_its_get_cacheability(void); diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h index 37b6b92f0c..1d800fdbaf 100644 --- a/xen/arch/arm/include/asm/gic_v4_its.h +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -52,6 +52,7 @@ struct event_vlpi_map { }; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1ae26ef1-ac91-4f86-2655-08de62762e45 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:43.5062 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Fp74PmtN5Cug13gXiPBl68BEakKfHcso4FZZLPdRqR/uGzI1E2UjMTd60UvqdGXoveRp6HSZeunJ65CV4aUkIg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10299 Allow creating domains with GIC_V4 version. Signed-off-by: Mykyta Poturai --- xen/arch/arm/dom0less-build.c | 1 + xen/arch/arm/domain.c | 16 ++++++++++++++++ xen/arch/arm/vgic.c | 2 ++ xen/include/public/arch-arm.h | 2 ++ 4 files changed, 21 insertions(+) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c10538..3c4b074b05 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -157,6 +157,7 @@ int __init make_intc_domU_node(struct kernel_info *kinf= o) { #ifdef CONFIG_GICV3 case GIC_V3: + case GIC_V4: return make_gicv3_domU_node(kinfo); #endif #ifdef CONFIG_VGICV2 diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 507df807ed..864e5511c9 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -604,6 +604,14 @@ int arch_sanitise_domain_config(struct xen_domctl_crea= tedomain *config) config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V3; break; =20 + case GIC_V4: + config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V4; + break; + + case GIC_V4_1: + config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V4_1; + break; + default: ASSERT_UNREACHABLE(); return -EINVAL; @@ -679,6 +687,14 @@ int arch_domain_create(struct domain *d, d->arch.vgic.version =3D GIC_V3; break; =20 + case XEN_DOMCTL_CONFIG_GIC_V4: + d->arch.vgic.version =3D GIC_V4; + break; + + case XEN_DOMCTL_CONFIG_GIC_V4_1: + d->arch.vgic.version =3D GIC_V4_1; + break; + default: BUG(); } diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 6baf870ad5..e5752faeb7 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -153,6 +153,7 @@ int domain_vgic_register(struct domain *d, unsigned int= *mmio_count) { #ifdef CONFIG_GICV3 case GIC_V3: + case GIC_V4: if ( vgic_v3_init(d, mmio_count) ) return -ENODEV; break; @@ -929,6 +930,7 @@ unsigned int vgic_max_vcpus(unsigned int domctl_vgic_ve= rsion) =20 #ifdef CONFIG_GICV3 case XEN_DOMCTL_CONFIG_GIC_V3: + case XEN_DOMCTL_CONFIG_GIC_V4: return 4096; #endif =20 diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index 96365e5603..12690cf3ac 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -322,6 +322,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: bbca65a2-2351-4be3-25fa-08de62762c37 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2026 16:14:42.0533 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nXocrPXq/w2x2PyglV+fh8ncdKOYZ5IUoWaxcBR09ifZliZ4z5eK4c+Vk7JKqy4Q/DkCSLOvIPQfh5/vNpTBAQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11643 Implement accessors for GICv4 registers VPENDBASER and VPROPBASER. VPENDBASER access needs special handling to clear the Valid bit before writing a new value. Signed-off-by: Mykyta Poturai --- xen/arch/arm/include/asm/gic_v4_its.h | 38 +++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include/a= sm/gic_v4_its.h index fb0ef37bbe..ba81b25bde 100644 --- a/xen/arch/arm/include/asm/gic_v4_its.h +++ b/xen/arch/arm/include/asm/gic_v4_its.h @@ -17,6 +17,8 @@ * along with this program; If not, see . */ =20 +#include + #ifndef __ASM_ARM_GICV4_ITS_H__ #define __ASM_ARM_GICV4_ITS_H__ =20 @@ -50,6 +52,42 @@ struct event_vlpi_map { }; =20 void gicv4_its_vpeid_allocator_init(void); + +#define GICR_VPROPBASER 0x0070 +#define GICR_VPENDBASER 0x0078 + +#define GICR_VPENDBASER_Dirty (1UL << 60) +#define GICR_VPENDBASER_PendingLast (1UL << 61) +#define GICR_VPENDBASER_IDAI (1UL << 62) +#define GICR_VPENDBASER_Valid (1UL << 63) + +#define GICR_VPENDBASER_OUTER_CACHEABILITY_SHIFT 56 +#define GICR_VPENDBASER_SHAREABILITY_SHIFT 10 +#define GICR_VPENDBASER_INNER_CACHEABILITY_SHIFT 7 + +#define gits_read_vpropbaser(c) readq_relaxed(c) +#define gits_write_vpropbaser(v, c) {writeq_relaxed(v, c);} + +/* + * GICR_VPENDBASER - the Valid bit must be cleared before changing + * anything else. + */ +static inline void gits_write_vpendbaser(uint64_t val, void __iomem *addr) +{ + uint64_t tmp; + + tmp =3D readq_relaxed(addr); + while ( tmp & GICR_VPENDBASER_Valid ) + { + tmp &=3D ~GICR_VPENDBASER_Valid; + writeq_relaxed(tmp, addr); + tmp =3D readq_relaxed(addr); + } + + writeq_relaxed(val, addr); +} +#define gits_read_vpendbaser(c) readq_relaxed(c) + #endif =20 /* --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 16:20:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 16:20:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1218961.1527846 (Exim 4.92) (envelope-from ) id 1vmwfQ-0004KV-Ru; Mon, 02 Feb 2026 16:20:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1218961.1527846; Mon, 02 Feb 2026 16:20:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwfQ-0004KO-OI; Mon, 02 Feb 2026 16:20:48 +0000 Received: by outflank-mailman (input) for mailman id 1218961; Mon, 02 Feb 2026 16:20:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmwfO-0004K8-Nn for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 16:20:46 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 20793d4f-0053-11f1-b161-2bf370ae4941; Mon, 02 Feb 2026 17:20:45 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso39687785e9.0 for ; Mon, 02 Feb 2026 08:20:45 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 02 Feb 2026 08:20:44 -0800 (PST) Message-ID: <27eefb94-ae13-469c-9b1e-f730a27ab22d@suse.com> Date: Mon, 2 Feb 2026 17:20:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: calculate number of synthetic feature and bug enumerators To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <70fe3986-ad89-4b42-b158-7e7b2b24ec1e@suse.com> <5f42ae1e-7f3f-4e95-a6c3-5a7f39623971@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5f42ae1e-7f3f-4e95-a6c3-5a7f39623971@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 16:56, Andrew Cooper wrote: > On 19/01/2026 3:30 pm, Jan Beulich wrote: >> Rather than spelling out their amounts (requiring updates when multiples >> of 32 are crossed), introduce a sentinel each and calculate the two >> numbers from those. >> >> No difference in generated code, albeit debug info size grows quite a bit. > > Presumably because of the substantial increase in preprocessed output? I wouldn't expect that to matter. My suspicion was that de-duplication might not work very well there. But I didn't go check, as debug info size really isn't a primary concern to me. >> Signed-off-by: Jan Beulich >> --- >> This is an alternative to "x86: guard synthetic feature and bug >> enumerators", bulding upon the expectation that when adding to the end of >> either list people will notice the sentinel and not forget to update it. > > The extra preprocessing overhead is not ideal, but it's certainly > preferable to the first version. > > Acked-by: Andrew Cooper Thanks. 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Mon, 02 Feb 2026 08:26:05 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 17:26:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] x86/cpu-policy: move CPU policy library code To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <4bd68e41-e665-4992-9d3c-0086bb5195ef@suse.com> <7c06bd5e-fad2-42cb-947f-6749f647b068@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 16:47, Andrew Cooper wrote: > On 07/01/2026 2:17 pm, Jan Beulich wrote: >> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk >> index 0203138a819a..be6c76d2934b 100644 >> --- a/xen/arch/x86/arch.mk >> +++ b/xen/arch/x86/arch.mk >> @@ -4,6 +4,7 @@ >> export XEN_IMG_OFFSET := 0x200000 >> >> ARCH_LIBS-y += arch/x86/lib/lib.a >> +ALL_LIBS-y += arch/x86/lib/cpu-policy/lib.a > > This wants to extend ARCH_LIBS-y surely?  Is this a rebasing oversight? No, this was deliberate. The functions here are different from those in arch/x86/lib/lib.a. We don't need to fear collision with "common code" ones. Hence I preferred to use the more "normal" placement into what's passed to the linker. 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Mon, 02 Feb 2026 08:45:51 -0800 (PST) Message-ID: <8a303ef0-32fb-44f3-bc73-2276e5e08be6@suse.com> Date: Mon, 2 Feb 2026 17:45:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 07/19] xen/domain: Alloc enough pages for VCPU struct To: Mykyta Poturai Cc: "xakep.amatop@gmail.com" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 17:14, Mykyta Poturai wrote: > With introduction of GICv4 the size of struct vcpu can again be more > than one page. Modify struct vcpu allocation to request enough pages > again. > > Don't reintroduce the MAX_PAGES_PER_VCPU check. > As per commit b77d774d8274183c2252f5fbc9fa3b3b7022ba06 >> It turns out that beyond efficiency, maybe, there is no real technical >> reason this struct has to fit in one page > > Since there is no technical reason to limit struct vcpu size to one page, > there also seems to be little reason the fiddle with 1 or 2 page limits. Before writing this, did you check the recent discussion around the Arm side change going back to a single page, and the moving of this code to common/? Any ... > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -342,18 +342,24 @@ static struct vcpu *alloc_vcpu_struct(const struct domain *d) > # define arch_vcpu_struct_memflags(d) ((void)(d), 0) > #endif > struct vcpu *v; > + unsigned int order = get_order_from_bytes(sizeof(*v)); > > - BUILD_BUG_ON(sizeof(*v) > PAGE_SIZE); > - v = alloc_xenheap_pages(0, arch_vcpu_struct_memflags(d)); > + v = alloc_xenheap_pages(order, arch_vcpu_struct_memflags(d)); ... non-order-0 allocation is at risk of failing despite there being ample memory available, if there's heavy fragmentation. I'm sorry, but without a much better justification this gets a NAK from me. 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Mon, 02 Feb 2026 08:58:42 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 17:58:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/4] xen/mm: allow deferred scrub of physmap populate allocated pages To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260130145726.85907-1-roger.pau@citrix.com> <20260130145726.85907-4-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260130145726.85907-4-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 30.01.2026 15:57, Roger Pau Monne wrote: > Physmap population has the need to use pages as big as possible to reduce > p2m shattering. However that triggers issues when big enough pages are not > yet scrubbed, and so scrubbing must be done at allocation time. On some > scenarios with added contention the watchdog can trigger: > > Watchdog timer detects that CPU55 is stuck! > ----[ Xen-4.17.5-21 x86_64 debug=n Not tainted ]---- > CPU: 55 > RIP: e008:[] clear_page_sse2+0x1a/0x30 > RFLAGS: 0000000000000202 CONTEXT: hypervisor (d0v12) > [...] > Xen call trace: > [] R clear_page_sse2+0x1a/0x30 > [] S clear_domain_page+0x11/0x20 > [] S common/page_alloc.c#alloc_heap_pages+0x400/0x5a0 > [] S alloc_domheap_pages+0x67/0x180 > [] S common/memory.c#populate_physmap+0x22f/0x3b0 > [] S do_memory_op+0x728/0x1970 > > Introduce a mechanism to preempt page scrubbing in populate_physmap(). It > relies on stashing the dirty page in the domain struct temporarily to > preempt to guest context, so the scrubbing can resume when the domain > re-enters the hypercall. The added deferral mechanism will only be used for > domain construction, and is designed to be used with a single threaded > domain builder. If the toolstack makes concurrent calls to > XENMEM_populate_physmap for the same target domain it will trash stashed > pages, resulting in slow domain physmap population. > > Note a similar issue is present in increase reservation. However that > hypercall is likely to only be used once the domain is already running and > the known implementations use 4K pages. It will be deal with in a separate > patch using a different approach, that will also take care of the > allocation in populate_physmap() once the domain is running. > > Fixes: 74d2e11ccfd2 ("mm: Scrub pages in alloc_heap_pages() if needed") > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich with one minor remark: > @@ -286,6 +365,30 @@ static void populate_physmap(struct memop_args *a) > goto out; > } > > + if ( memflags & MEMF_no_scrub ) > + { > + unsigned int dirty_cnt = 0; > + > + /* Check if there's anything to scrub. */ > + for ( j = scrub_start; j < (1U << a->extent_order); j++ ) > + { > + if ( !test_and_clear_bit(_PGC_need_scrub, > + &page[j].count_info) ) > + continue; > + > + scrub_one_page(&page[j], true); > + > + if ( (j + 1) != (1U << a->extent_order) && > + !(++dirty_cnt & 0xff) && > + hypercall_preempt_check() ) > + { > + a->preempted = 1; > + stash_allocation(d, page, a->extent_order, ++j); > + goto out; As j isn't used anymore afterwards, j + 1 may be more natural to use here, if only to avoid raised eyebrows. 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In struct hvm_domain it therefore suffices to have > a union of two (generally opaque) pointers. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Just some minor suggestions below. > > --- a/xen/arch/x86/include/asm/hvm/domain.h > +++ b/xen/arch/x86/include/asm/hvm/domain.h > @@ -95,7 +95,10 @@ struct hvm_domain { > struct list_head pinned_cacheattr_ranges; > > /* VRAM dirty support. Protect with the domain paging lock. */ > - struct sh_dirty_vram *dirty_vram; > + union { > + struct sh_dirty_vram *sh; > + struct hap_dirty_vram *hap; > + } dirty_vram; Other in-place declared structures don't use this aligning. I have to admit it looks somewhat odd for structs like this one. > > /* If one of vcpus of this domain is in no_fill_mode or > * mtrr/pat between vcpus is not the same, set is_in_uc_mode > --- a/xen/arch/x86/include/asm/paging.h > +++ b/xen/arch/x86/include/asm/paging.h > @@ -133,19 +133,6 @@ struct paging_mode { > (DIV_ROUND_UP(PADDR_BITS - PAGE_SHIFT - (PAGE_SHIFT + 3), \ > PAGE_SHIFT - ilog2(sizeof(mfn_t))) + 1) > > -#ifdef CONFIG_HVM > -/* VRAM dirty tracking support */ > -struct sh_dirty_vram { > - unsigned long begin_pfn; > - unsigned long end_pfn; > -#ifdef CONFIG_SHADOW_PAGING > - paddr_t *sl1ma; > - uint8_t *dirty_bitmap; > - s_time_t last_dirty; > -#endif > -}; > -#endif > - > #if PG_log_dirty > > /* log dirty initialization */ > --- a/xen/arch/x86/mm/hap/hap.c > +++ b/xen/arch/x86/mm/hap/hap.c > @@ -36,6 +36,11 @@ > /* HAP VRAM TRACKING SUPPORT */ > /************************************************/ > > +struct hap_dirty_vram { > + unsigned long begin_pfn; > + unsigned long end_pfn; > +}; > + > /* > * hap_track_dirty_vram() > * Create the domain's dv_dirty_vram struct on demand. > @@ -52,7 +57,7 @@ int hap_track_dirty_vram(struct domain * > XEN_GUEST_HANDLE(void) guest_dirty_bitmap) > { > long rc = 0; > - struct sh_dirty_vram *dirty_vram; > + struct hap_dirty_vram *dirty_vram; > uint8_t *dirty_bitmap = NULL; > > if ( nr_frames ) > @@ -66,17 +71,17 @@ int hap_track_dirty_vram(struct domain * > > paging_lock(d); > > - dirty_vram = d->arch.hvm.dirty_vram; > + dirty_vram = d->arch.hvm.dirty_vram.hap; > if ( !dirty_vram ) > { > rc = -ENOMEM; > - if ( (dirty_vram = xzalloc(struct sh_dirty_vram)) == NULL ) > + if ( (dirty_vram = xzalloc(struct hap_dirty_vram)) == NULL ) > { > paging_unlock(d); > goto out; > } > > - d->arch.hvm.dirty_vram = dirty_vram; > + d->arch.hvm.dirty_vram.hap = dirty_vram; > } > > if ( begin_pfn != dirty_vram->begin_pfn || > @@ -132,7 +137,7 @@ int hap_track_dirty_vram(struct domain * > { > paging_lock(d); > > - dirty_vram = d->arch.hvm.dirty_vram; > + dirty_vram = d->arch.hvm.dirty_vram.hap; > if ( dirty_vram ) > { > /* > @@ -142,7 +147,7 @@ int hap_track_dirty_vram(struct domain * > begin_pfn = dirty_vram->begin_pfn; > nr_frames = dirty_vram->end_pfn - dirty_vram->begin_pfn; > xfree(dirty_vram); > - d->arch.hvm.dirty_vram = NULL; > + d->arch.hvm.dirty_vram.hap = NULL; > } > > paging_unlock(d); > @@ -630,7 +635,7 @@ void hap_teardown(struct domain *d, bool > > d->arch.paging.mode &= ~PG_log_dirty; > > - XFREE(d->arch.hvm.dirty_vram); > + XFREE(d->arch.hvm.dirty_vram.hap); > > out: > paging_unlock(d); > --- a/xen/arch/x86/mm/shadow/common.c > +++ b/xen/arch/x86/mm/shadow/common.c > @@ -2886,11 +2886,11 @@ void shadow_teardown(struct domain *d, b > d->arch.paging.mode &= ~PG_log_dirty; > > #ifdef CONFIG_HVM > - if ( is_hvm_domain(d) && d->arch.hvm.dirty_vram ) > + if ( is_hvm_domain(d) && d->arch.hvm.dirty_vram.sh ) > { > - xfree(d->arch.hvm.dirty_vram->sl1ma); > - xfree(d->arch.hvm.dirty_vram->dirty_bitmap); > - XFREE(d->arch.hvm.dirty_vram); > + xfree(d->arch.hvm.dirty_vram.sh->sl1ma); > + xfree(d->arch.hvm.dirty_vram.sh->dirty_bitmap); > + XFREE(d->arch.hvm.dirty_vram.sh); > } > #endif > > --- a/xen/arch/x86/mm/shadow/hvm.c > +++ b/xen/arch/x86/mm/shadow/hvm.c > @@ -1033,7 +1033,7 @@ int shadow_track_dirty_vram(struct domai > p2m_lock(p2m_get_hostp2m(d)); > paging_lock(d); > > - dirty_vram = d->arch.hvm.dirty_vram; > + dirty_vram = d->arch.hvm.dirty_vram.sh; > > if ( dirty_vram && (!nr_frames || > ( begin_pfn != dirty_vram->begin_pfn > @@ -1043,8 +1043,8 @@ int shadow_track_dirty_vram(struct domai > gdprintk(XENLOG_INFO, "stopping tracking VRAM %lx - %lx\n", dirty_vram->begin_pfn, dirty_vram->end_pfn); > xfree(dirty_vram->sl1ma); > xfree(dirty_vram->dirty_bitmap); > - xfree(dirty_vram); > - dirty_vram = d->arch.hvm.dirty_vram = NULL; > + XFREE(dirty_vram); > + d->arch.hvm.dirty_vram.sh = NULL; It would be better if this was done the other way around, first set the reference to NULL, then free the memory? d->arch.hvm.dirty_vram.sh = NULL; XFREE(dirty_vram); > } > > if ( !nr_frames ) > @@ -1075,7 +1075,7 @@ int shadow_track_dirty_vram(struct domai > goto out; > dirty_vram->begin_pfn = begin_pfn; > dirty_vram->end_pfn = end_pfn; > - d->arch.hvm.dirty_vram = dirty_vram; > + d->arch.hvm.dirty_vram.sh = dirty_vram; > > if ( (dirty_vram->sl1ma = xmalloc_array(paddr_t, nr_frames)) == NULL ) > goto out_dirty_vram; > @@ -1202,8 +1202,8 @@ int shadow_track_dirty_vram(struct domai > out_sl1ma: > xfree(dirty_vram->sl1ma); > out_dirty_vram: > - xfree(dirty_vram); > - dirty_vram = d->arch.hvm.dirty_vram = NULL; > + XFREE(dirty_vram); > + d->arch.hvm.dirty_vram.sh = NULL; Similar here, I would change the order. Thanks, Roger. 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> >> > >> - if ( vector < FIRST_DYNAMIC_VECTOR ) > >> + if ( vector < FIRST_IRQ_VECTOR ) > > > > Should vector also be rejected if it's > LAST_IRQ_VECTOR? > > That's a good question for which I don't have a good answer. I can't exclude > that composing an MSI message (for purposes other than using in an MSI > capability) might make sense with a vector above LAST_IRQ_VECTOR. Originally > (as hinted at in the post-commit-message remark) this change was part of the > HPET work, where it was an actual functional change as in an early version I > needed to move FIRST_IRQ_VECTOR down (i.e. decouple it from > FIRST_DYNAMIC_VECTOR). There the "composed" message was used to fill > HPET_T_ROUTE. Something similar might be wanted elsewhere, and it's not > quite clear to me whether in such a situation LAST_IRQ_VECTOR would then > also need moving (likely it would). It's possible that we could add a range between FIRST_IRQ_VECTOR and FIRST_DYNAMIC_VECTOR that could be used for fixed low priority vectors. > Right here I'm really only after the semantic, but non-functional change. If > we can settle on also enforcing an upper bound, I think that would then want > to be another change on top. Acked-by: Roger Pau Monné Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wYtpvMKYsB77bFzbiGa8denaGWZ4oUgRyKKg1f8mAg7jISksN1+YUhCtBGhKB6wE+MBqoGUF/0c0DzsdmzL8VhPYZg3KVo3tvspVpTsXNxjvorlkFpx2zPmzbf7os9iDmvf7eiQF8WSPxSXjv3b5MM8364MV/ZMSolUCCLW8YlJ2jaxhnB/YjASxnr5eOnsoE1kJgSn23ahROARVOokjAHE4++g6lc5ec0gOFp35pWPGiQTZUAw8K63Czv+CmdgTPMedLWF4gd3+U8VLbonc1t3eyrWN/o279dGZHgR4kvKu1IY2ZWFwF0Q3w7dU5owqqRKWU723Hbku7W6vZRKqvsfUkrmoqKg0r9NvWUvG9UTRwV9FzcitNHLLtc5tmN1saCBOGU7/mmPExl4l+isyqxMdlKsSvwXYw30c9EybSxqIkonVvrg5Tf7DaVIhQxfb X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2026 19:25:11.6002 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f16ef799-0391-479c-2305-08de6290c8ca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000203.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPF84B7B0C96 On 2/2/26 03:51, Jan Beulich wrote: > On 29.01.2026 14:10, Jan Beulich wrote: >> @@ -160,10 +161,13 @@ int pci_mmcfg_arch_enable(unsigned int i >> return 0; >> } >> >> -void pci_mmcfg_arch_disable(unsigned int idx) >> +int pci_mmcfg_arch_disable(unsigned int idx) >> { >> const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; >> >> + if ( !pci_mmcfg_virt[idx].virt ) >> + return 1; > > Afaict this is what causes CI (adl-*) to say no here: > > (XEN) [ 4.132689] PCI: Using MCFG for segment 0000 bus 00-ff > (XEN) [ 4.132697] ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 4.132700] CPU: 12 > (XEN) [ 4.132702] RIP: e008:[] pci_mmcfg_read+0x19e/0x1c7 > (XEN) [ 4.132708] RFLAGS: 0000000000010286 CONTEXT: hypervisor (d0v0) > (XEN) [ 4.132711] rax: 0000000000300000 rbx: ffff808000300100 rcx: 0000000000000000 > (XEN) [ 4.132714] rdx: ffff808000300100 rsi: 0000000000000000 rdi: ffff8304959ffcec > (XEN) [ 4.132716] rbp: ffff8304959ffd18 rsp: ffff8304959ffce8 r8: 0000000000000004 > (XEN) [ 4.132718] r9: ffff8304959ffd2c r10: 0000000000000000 r11: 0000000000000000 > (XEN) [ 4.132720] r12: 0000000000000100 r13: 0000000000000004 r14: ffff8304959ffd2c > (XEN) [ 4.132723] r15: ffff808000000000 cr0: 0000000080050033 cr4: 0000000000b526e0 > (XEN) [ 4.132725] cr3: 0000000492a30000 cr2: ffff808000300100 > (XEN) [ 4.132727] fsb: 0000000000000000 gsb: ffff8881b9a00000 gss: 0000000000000000 > (XEN) [ 4.132729] ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: e010 cs: e008 > (XEN) [ 4.132733] Xen code around (pci_mmcfg_read+0x19e/0x1c7): > (XEN) [ 4.132734] 48 39 d3 72 ea 4c 01 e3 <8b> 03 89 c3 4d 85 f6 74 0d 41 89 1e b8 00 00 00 > (XEN) [ 4.132744] Xen stack trace from rsp=ffff8304959ffce8: > (XEN) [ 4.132745] 0000000300000286 ffff830495bd8010 0000000000000003 ffff830495bd8010 > (XEN) [ 4.132749] ffff8304959ffdd0 ffff82d0405fa7ef ffff8304959ffd30 ffff82d040576877 > (XEN) [ 4.132753] 000000000000000c ffff8304959ffd58 ffff82d04039b81d ffff8304959ffe28 > (XEN) [ 4.132756] 0000000000000003 ffff830495bd8010 ffff8304959ffd80 ffff82d0405fa90b > (XEN) [ 4.132760] ffff8304959ffdc8 ffff830495bd8010 ffff830498019650 ffff8304959ffdb8 > (XEN) [ 4.132764] ffff82d0403983e0 ffff830498019650 ffff8304959ffe28 ffff82d0405fa7ef > (XEN) [ 4.132767] 0000000000000018 ffffc9004002b900 ffff8304959ffdf8 ffff82d04039feba > (XEN) [ 4.132771] ffff82d0405fa7ef ffff8304959ffe28 0000000000000000 ffffc9004002b900 > (XEN) [ 4.132774] 0000000000000000 ffff8304959bb000 ffff8304959ffe78 ffff82d0405ff666 > (XEN) [ 4.132778] ffff82d0405713b8 00000000ffffffff 00a0fb0081f456e0 ffff8304959b3010 > (XEN) [ 4.132782] 00000000c0000000 00000001ff000000 ffff8304959fff08 0000000000000040 > (XEN) [ 4.132785] 000000ec00000001 ffff8304959fff08 ffff8304959a4000 0000000000000021 > (XEN) [ 4.132789] 0000000000000000 ffffc9004002b900 ffff8304959ffef8 ffff82d0405711b2 > (XEN) [ 4.132792] 0000000000000000 ffff888100456938 ffff8881001470b8 0000000000000018 > (XEN) [ 4.132795] 0000000000000000 ffff8304959ffef8 ffff82d0406213f9 ffff8304959a4000 > (XEN) [ 4.132799] 0000000000000000 ffff8304959a4000 0000000000000000 0000000000000000 > (XEN) [ 4.132802] ffff8304959fffff 0000000000000000 00007cfb6a6000d7 ffff82d0402012d3 > (XEN) [ 4.132806] 0000000000000000 00000000ffffffff ffff8881001470b8 ffff888100b88900 > (XEN) [ 4.132809] ffffc9004002b900 ffff8881001470b8 0000000000000283 ffff888100456938 > (XEN) [ 4.132813] ffff888100065410 0000000000000000 0000000000000021 ffffffff81f7842a > (XEN) [ 4.132816] Xen call trace: > (XEN) [ 4.132819] [] R pci_mmcfg_read+0x19e/0x1c7 > (XEN) [ 4.132822] [] F pci_conf_read32+0x55/0x5e > (XEN) [ 4.132826] [] F pci_check_extcfg+0xb1/0x13b > (XEN) [ 4.132831] [] F physdev_check_pci_extcfg+0x11c/0x121 > (XEN) [ 4.132833] [] F drivers/passthrough/pci.c#iterate_all+0xa2/0xe2 > (XEN) [ 4.132836] [] F pci_segment_iterate+0x4e/0x74 > (XEN) [ 4.132839] [] F do_physdev_op+0x362a/0x4161 > (XEN) [ 4.132842] [] F pv_hypercall+0x6be/0x838 > (XEN) [ 4.132845] [] F lstar_enter+0x143/0x148 > (XEN) [ 4.132847] > (XEN) [ 4.132848] Pagetable walk from ffff808000300100: > (XEN) [ 4.132851] L4[0x101] = 0000000000000000 ffffffffffffffff FWIW, I can reproduce this on my test machine. > There is an important comment in pci_mmcfg_arch_disable(): > > /* > * Don't use destroy_xen_mappings() here, or make sure that at least > * the necessary L4 entries get populated (so that they get properly > * propagated to guest domains' page tables). > */ > > Hence it is wrong to bypass > > mcfg_ioremap(cfg, idx, 0); Indeed, restoring this call resolves it. From xen-devel-bounces@lists.xenproject.org Mon Feb 02 19:33:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 19:33:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219049.1527916 (Exim 4.92) (envelope-from ) id 1vmzfm-0003RX-DG; Mon, 02 Feb 2026 19:33:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219049.1527916; Mon, 02 Feb 2026 19:33:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmzfm-0003RQ-AF; Mon, 02 Feb 2026 19:33:22 +0000 Received: by outflank-mailman (input) for mailman id 1219049; Mon, 02 Feb 2026 19:33:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vmzfl-0003RK-C7 for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 19:33:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vmzfl-00H77H-0g; Mon, 02 Feb 2026 19:33:20 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vmzfk-00EHaV-1o; Mon, 02 Feb 2026 19:33:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:Message-ID:Date: Subject:Cc:To:From; bh=22z1W8ArJdHHeBbTucgXt39+2PIybp7ytLowPDqnvIU=; b=bNz3ON 9bySzHKbGNlMiA/4KzLiM+GpaJGQ/YmBNXnQC5TTa0klCqO9jViG4tcGXR2doSXOqKtaQU1oPtsvL pVu5iF8EMk/iGN8uysRu/KsPlVMvF8E6wwt4sbUzXCxdz2rhWEwNNLscth5AfruKulof8k0MCKXFm 00sHobB+Lsg=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1] automation: align XTF qemu parameters across achitectures Date: Mon, 2 Feb 2026 11:32:31 -0800 Message-ID: <20260202193230.21412-2-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin It is handy to have 2 CPUs and more RAM for smoke testing a hypervisor change via XTF. Align x86 QEMU configuration with Arm for XTF tests: 2 CPU and 2G of RAM. Signed-off-by: Denis Mukhin --- automation/scripts/include/xtf-x86-64 | 3 ++- automation/scripts/include/xtf-x86-64-efi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/include/xtf-x86-64 index b1b0cc201efa..186f074bd8eb 100644 --- a/automation/scripts/include/xtf-x86-64 +++ b/automation/scripts/include/xtf-x86-64 @@ -23,7 +23,8 @@ function xtf_arch_setup() -nographic \ -monitor none \ -serial stdio \ - -m 512 \ + -m 2048 \ + -smp 2 \ -kernel ${XEN_BINARY} \ -initrd ${XTF_BINARY} \ -append \"${XEN_CMDLINE}\" \ diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts/include/xtf-x86-64-efi index 8340c745dbf4..15c6463dcdc5 100644 --- a/automation/scripts/include/xtf-x86-64-efi +++ b/automation/scripts/include/xtf-x86-64-efi @@ -49,7 +49,8 @@ EOF -nographic \ -monitor none \ -serial stdio \ - -m 512 \ + -m 2048 \ + -smp 2 \ -M q35,kernel-irqchip=split \ -drive if=pflash,format=raw,readonly=on,file=${FW_PREFIX}OVMF_CODE${suff}.fd \ -drive if=pflash,format=raw,file=${WORKDIR}/OVMF_VARS${suff}.fd \ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 02 22:33:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 22:33:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219075.1527982 (Exim 4.92) (envelope-from ) id 1vn2Tr-0000aF-7v; Mon, 02 Feb 2026 22:33:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219075.1527982; Mon, 02 Feb 2026 22:33:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn2Tr-0000a8-4O; Mon, 02 Feb 2026 22:33:15 +0000 Received: by outflank-mailman (input) for mailman id 1219075; Mon, 02 Feb 2026 22:33:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn2Tp-0000Y6-TP for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 22:33:14 +0000 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 22b22552-0087-11f1-9ccf-f158ae23cfc8; Mon, 02 Feb 2026 23:33:04 +0100 (CET) Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2026 14:33:02 -0800 Received: from lkp-server01.sh.intel.com (HELO 765f4a05e27f) ([10.239.97.150]) by orviesa008.jf.intel.com with ESMTP; 02 Feb 2026 14:32:27 -0800 Received: from kbuild by 765f4a05e27f with local (Exim 4.98.2) (envelope-from ) id 1vn2T3-00000000g1M-0wih; Mon, 02 Feb 2026 22:32:25 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 22b22552-0087-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770071585; x=1801607585; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=K94Yr5tqFVaHsCYCKnsxMVUvUOkbufB1DVdDJ7sbhdg=; b=Mo7KSeTz/uazX1Pb2AoxFvMLvR960NeRTCHbsSmT3BVyD9BVWaMKAZuf oDT+dLnhSTbJiIeLCuyJyRr/3mYEnH8eN3r4gUHXuWVMRPWXQ8jBpozvu HzJCzivs0+LTIS5SArxVPk5jgA5JKdh9o+Dc/EDDMGzykadoN5MMd2/N1 PXdIRSL98zco18tB0bGgzb3K2wE/AJvIlb2p68qTHcPRznwabPcMQh0qs kada6Ec0CllL4k03U9HLZVcAszM2OMZSHnWy5zgxgKkXWMuvkkUsYhyfs m+jNXua27PKVRsWOg7Yb3UKmM6vcpLaNbbTCmJ3BgTiTfV3MDweulAjs+ A==; X-CSE-ConnectionGUID: 03oaMUEmSP2tkInjVAZE7w== X-CSE-MsgGUID: dDRTsuLATRCbX+zBq02bXA== X-IronPort-AV: E=McAfee;i="6800,10657,11690"; a="82348628" X-IronPort-AV: E=Sophos;i="6.21,269,1763452800"; d="scan'208";a="82348628" X-CSE-ConnectionGUID: f0cfM4HPRO+EXrWtBO5R7A== X-CSE-MsgGUID: e2M1VSzVScuy0rx2orDXBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,269,1763452800"; d="scan'208";a="209657809" Date: Tue, 3 Feb 2026 06:31:40 +0800 From: kernel test robot To: Shashank Balaji , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Shashank Balaji , Daniel Palmer , Tim Bird Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: <202602030600.jFhsJyEC-lkp@intel.com> References: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> Hi Shashank, kernel test robot noticed the following build errors: [auto build test ERROR on 18f7fcd5e69a04df57b563360b88be72471d6b62] url: https://github.com/intel-lab-lkp/linux/commits/Shashank-Balaji/x86-x2apic-disable-x2apic-on-resume-if-the-kernel-expects-so/20260202-181147 base: 18f7fcd5e69a04df57b563360b88be72471d6b62 patch link: https://lore.kernel.org/r/20260202-x2apic-fix-v1-1-71c8f488a88b%40sony.com patch subject: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so config: i386-randconfig-001-20260202 (https://download.01.org/0day-ci/archive/20260203/202602030600.jFhsJyEC-lkp@intel.com/config) compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260203/202602030600.jFhsJyEC-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202602030600.jFhsJyEC-lkp@intel.com/ All errors (new ones prefixed by >>): >> arch/x86/kernel/apic/apic.c:2463:3: error: call to undeclared function '__x2apic_disable'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 2463 | __x2apic_disable(); | ^ arch/x86/kernel/apic/apic.c:2463:3: note: did you mean '__x2apic_enable'? arch/x86/kernel/apic/apic.c:1896:20: note: '__x2apic_enable' declared here 1896 | static inline void __x2apic_enable(void) { } | ^ 1 error generated. vim +/__x2apic_disable +2463 arch/x86/kernel/apic/apic.c 2435 2436 static void lapic_resume(void *data) 2437 { 2438 unsigned int l, h; 2439 unsigned long flags; 2440 int maxlvt; 2441 2442 if (!apic_pm_state.active) 2443 return; 2444 2445 local_irq_save(flags); 2446 2447 /* 2448 * IO-APIC and PIC have their own resume routines. 2449 * We just mask them here to make sure the interrupt 2450 * subsystem is completely quiet while we enable x2apic 2451 * and interrupt-remapping. 2452 */ 2453 mask_ioapic_entries(); 2454 legacy_pic->mask_all(); 2455 2456 if (x2apic_mode) { 2457 __x2apic_enable(); 2458 } else { 2459 /* 2460 * x2apic may have been re-enabled by the 2461 * firmware on resuming from s2ram 2462 */ > 2463 __x2apic_disable(); 2464 2465 /* 2466 * Make sure the APICBASE points to the right address 2467 * 2468 * FIXME! This will be wrong if we ever support suspend on 2469 * SMP! We'll need to do this as part of the CPU restore! 2470 */ 2471 if (boot_cpu_data.x86 >= 6) { 2472 rdmsr(MSR_IA32_APICBASE, l, h); 2473 l &= ~MSR_IA32_APICBASE_BASE; 2474 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; 2475 wrmsr(MSR_IA32_APICBASE, l, h); 2476 } 2477 } 2478 2479 maxlvt = lapic_get_maxlvt(); 2480 apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); 2481 apic_write(APIC_ID, apic_pm_state.apic_id); 2482 apic_write(APIC_DFR, apic_pm_state.apic_dfr); 2483 apic_write(APIC_LDR, apic_pm_state.apic_ldr); 2484 apic_write(APIC_TASKPRI, apic_pm_state.apic_taskpri); 2485 apic_write(APIC_SPIV, apic_pm_state.apic_spiv); 2486 apic_write(APIC_LVT0, apic_pm_state.apic_lvt0); 2487 apic_write(APIC_LVT1, apic_pm_state.apic_lvt1); 2488 #ifdef CONFIG_X86_THERMAL_VECTOR 2489 if (maxlvt >= 5) 2490 apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr); 2491 #endif 2492 #ifdef CONFIG_X86_MCE_INTEL 2493 if (maxlvt >= 6) 2494 apic_write(APIC_LVTCMCI, apic_pm_state.apic_cmci); 2495 #endif 2496 if (maxlvt >= 4) 2497 apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc); 2498 apic_write(APIC_LVTT, apic_pm_state.apic_lvtt); 2499 apic_write(APIC_TDCR, apic_pm_state.apic_tdcr); 2500 apic_write(APIC_TMICT, apic_pm_state.apic_tmict); 2501 apic_write(APIC_ESR, 0); 2502 apic_read(APIC_ESR); 2503 apic_write(APIC_LVTERR, apic_pm_state.apic_lvterr); 2504 apic_write(APIC_ESR, 0); 2505 apic_read(APIC_ESR); 2506 2507 irq_remapping_reenable(x2apic_mode); 2508 2509 local_irq_restore(flags); 2510 } 2511 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki From xen-devel-bounces@lists.xenproject.org Mon Feb 02 23:40:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 02 Feb 2026 23:40:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219092.1528032 (Exim 4.92) (envelope-from ) id 1vn3Ws-0001LX-5a; Mon, 02 Feb 2026 23:40:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219092.1528032; Mon, 02 Feb 2026 23:40:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn3Ws-0001LQ-2g; Mon, 02 Feb 2026 23:40:26 +0000 Received: by outflank-mailman (input) for mailman id 1219092; Mon, 02 Feb 2026 23:40:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn3Wq-0001LK-QG for xen-devel@lists.xenproject.org; Mon, 02 Feb 2026 23:40:24 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8919cd28-0090-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 00:40:21 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 5A6C840DC8; Mon, 2 Feb 2026 23:40:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 08CAEC116C6; Mon, 2 Feb 2026 23:40:17 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8919cd28-0090-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770075619; bh=7o7SfeYG+gMPMtdSkYXK8C7sCYH2mIvH1bLRi5urTCE=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=rQDlwiDSc1Qkae7/U8YIz8I7YsB2Mr+PMrvTcAaHKl+YItGh5xdgzqTiPKR+uXx2o 9AhZ2jpcPyGFVMBBG2QmZhn2Ip7cU5hPjwulhzZTJMfuwyZ4pFzx+vEZJ48TnUA/p6 Fj3H8c550xx5wohlTLcKt3eUYLCQetaWThRGgX+7GUD1Fgu3Hz2sgfIZQlJJP43YH3 BqQvetezLEhbutxWbFTlaHHrbIN3plfkVvWCKatxaiybM3i4U3qTB4DPKVDowx9Wlm /yb/OgGQXf/SIXOxTVHIg7PGEkIEYIZpHOiMUHI4J2G1I2jCwJIdzl3vP9QWHHyDec L/X032BruFYQA== Date: Mon, 2 Feb 2026 15:40:16 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: dmukhin@xen.org cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: Re: [PATCH v1] automation: align XTF qemu parameters across achitectures In-Reply-To: <20260202193230.21412-2-dmukhin@ford.com> Message-ID: References: <20260202193230.21412-2-dmukhin@ford.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 1 Feb 2026, dmukhin@xen.org wrote: > From: Denis Mukhin > > It is handy to have 2 CPUs and more RAM for smoke testing a hypervisor > change via XTF. > > Align x86 QEMU configuration with Arm for XTF tests: 2 CPU and 2G of RAM. > > Signed-off-by: Denis Mukhin Please provide a link to the successful pipeline. With that: Acked-by: Stefano Stabellini > --- > automation/scripts/include/xtf-x86-64 | 3 ++- > automation/scripts/include/xtf-x86-64-efi | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/include/xtf-x86-64 > index b1b0cc201efa..186f074bd8eb 100644 > --- a/automation/scripts/include/xtf-x86-64 > +++ b/automation/scripts/include/xtf-x86-64 > @@ -23,7 +23,8 @@ function xtf_arch_setup() > -nographic \ > -monitor none \ > -serial stdio \ > - -m 512 \ > + -m 2048 \ > + -smp 2 \ > -kernel ${XEN_BINARY} \ > -initrd ${XTF_BINARY} \ > -append \"${XEN_CMDLINE}\" \ > diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts/include/xtf-x86-64-efi > index 8340c745dbf4..15c6463dcdc5 100644 > --- a/automation/scripts/include/xtf-x86-64-efi > +++ b/automation/scripts/include/xtf-x86-64-efi > @@ -49,7 +49,8 @@ EOF > -nographic \ > -monitor none \ > -serial stdio \ > - -m 512 \ > + -m 2048 \ > + -smp 2 \ > -M q35,kernel-irqchip=split \ > -drive if=pflash,format=raw,readonly=on,file=${FW_PREFIX}OVMF_CODE${suff}.fd \ > -drive if=pflash,format=raw,file=${WORKDIR}/OVMF_VARS${suff}.fd \ > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Tue Feb 03 00:11:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 00:11:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219100.1528041 (Exim 4.92) (envelope-from ) id 1vn410-00062y-9g; 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Tue, 3 Feb 2026 00:11:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 98EB9C116C6; Tue, 3 Feb 2026 00:11:25 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e2911345-0094-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770077487; bh=IWHHgytLEWt062oltx3FQsUSxw3KaDNf5I7nUPrphEs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=MVXC/8QAySIjUMj4+QNoKHfhx9VIfSPMD3LmeIJmqWgKoWn5hKzl/gbhaqcLDGTw/ bmVmgc1NrDPyqh3LcIX/1MedUvpl4c0yqM+ll9MsrG32z+ekbE8uLyJwOmpI6IeT3x 0/Cjfq0tifb+meegAiqrmHJtQ5uZMV8ZzHtG6jigtKBT0PyDXnoFN6GjVW6YnXe/Xh fHLPS4QzYzFBsYPSSOCtFbvfXY2XC9CLEiDUryanRxjJkdjxM0DM6RhLXT+foESJlc /mnf7MXaxHftXqFaNtHUmN8RNnse07ftkBODLYExeLZvIXyQ1AZuvb1kEHWLIkpxDm mzQIEOC3Aihbg== Date: Mon, 2 Feb 2026 16:11:24 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: Stefano Stabellini , xen-devel@lists.xenproject.org, grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, jbeulich@suse.com, sstabellini@kernel.org Subject: Re: [PATCH v8 2/2] xen: enable dom0less guests to use console_io hypercalls In-Reply-To: Message-ID: References: <20260129220858.2371938-2-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 29 Jan 2026, Jason Andryuk wrote: > On 2026-01-29 17:08, Stefano Stabellini wrote: > > Enable dom0less guests on ARM to use console_io hypercalls: > > - set input_allow = true for dom0less domains > > - update the in-code comment in console.c > > - prioritize the VUART check to retain the same behavior as today > > > > Signed-off-by: Stefano Stabellini > > --- > > Changes in v8: > > - move in-code comment update to previous patch > > - add in-code comment about is_focus_domain() check > > --- > > xen/common/device-tree/dom0less-build.c | 2 ++ > > xen/drivers/char/console.c | 16 ++++++++++------ > > 2 files changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/xen/common/device-tree/dom0less-build.c > > b/xen/common/device-tree/dom0less-build.c > > index 840d14419d..cb7026fa7e 100644 > > --- a/xen/common/device-tree/dom0less-build.c > > +++ b/xen/common/device-tree/dom0less-build.c > > @@ -829,6 +829,8 @@ static int __init construct_domU(struct kernel_info > > *kinfo, > > rangeset_destroy(kinfo->xen_reg_assigned); > > + d->console->input_allowed = true; > > + > > return rc; > > } > > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > > index ed8f1ad8f2..418d194cef 100644 > > --- a/xen/drivers/char/console.c > > +++ b/xen/drivers/char/console.c > > @@ -613,11 +613,20 @@ static void __serial_rx(char c) > > if ( console_rx == 0 ) > > return handle_keypress(c, false); > > + /* Includes an is_focus_domain() check. */ > > d = console_get_domain(); > > if ( !d ) > > return; > > - if ( is_hardware_domain(d) ) > > +#ifdef CONFIG_SBSA_VUART_CONSOLE > > + /* Prioritize vpl011 if enabled for this domain */ > > + if ( d->arch.vpl011.base_addr ) > > + { > > + /* Deliver input to the emulated UART. */ > > + rc = vpl011_rx_char_xen(d, c); > > + } > > + else > > +#endif > > { > > unsigned long flags; > > @@ -636,11 +645,6 @@ static void __serial_rx(char c) > > */ > > send_global_virq(VIRQ_CONSOLE); > > I think we need an additional patch, or included in one of these two, to > change VIRQ_CONSOLE to a VIRQ_DOMAIN. Otherwise only hwdom could bind to the > virq, I think? It would be the two changes below: Thank you Jason. I didn't notice this problem because Linux is able to silently fallback to polling which works surprisingly well. I didn't notice the difference. I confirm that the error you highlighted is real and that with the patch below the error goes away. My preference is to submit it as a separate patch, it can still be part of this series. Especially as the other two patches have already been reviewed and tested independently a few times. But I am happy either way. Jan, what do you think? > diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c > index 67700b050a..dab123f20d 100644 > --- a/xen/common/event_channel.c > +++ b/xen/common/event_channel.c > @@ -138,6 +138,7 @@ static enum virq_type get_virq_type(unsigned int virq) > return VIRQ_VCPU; > > case VIRQ_ARGO: > + case VIRQ_CONSOLE: > return VIRQ_DOMAIN; > > case VIRQ_ARCH_0 ... VIRQ_ARCH_7: > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > index 903ad912cc..138eeaa14d 100644 > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -611,7 +611,7 @@ static void __serial_rx(char c) > * Always notify the hardware domain: prevents receive path from > * getting stuck. > */ > - send_global_virq(VIRQ_CONSOLE); > + send_guest_domain_virq(d, VIRQ_CONSOLE); > } > #ifdef CONFIG_SBSA_VUART_CONSOLE > else > From xen-devel-bounces@lists.xenproject.org Tue Feb 03 00:25:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 00:25:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219109.1528052 (Exim 4.92) (envelope-from ) id 1vn4EB-0007na-FN; Tue, 03 Feb 2026 00:25:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219109.1528052; Tue, 03 Feb 2026 00:25:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn4EB-0007nT-B1; Tue, 03 Feb 2026 00:25:11 +0000 Received: by outflank-mailman (input) for mailman id 1219109; Tue, 03 Feb 2026 00:25:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vn4EA-0007nN-OY for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 00:25:10 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c848afe5-0096-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 01:25:06 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2026 09:25:02 +0900 Received: from unknown (HELO JPC00244420) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2026 09:25:02 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c848afe5-0096-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770078307; x=1801614307; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=+mESz147mY99AmYLlTyE/1U+z38Cj71ObLjn1oYbbso=; b=lIZk9Nru1lYOyTYyZwlWz0K0m3na9f5DoSvqAWGz6qd+RByXd3XPx3QG 7xJUg+BwJmNVO3flmDlLgzhVVayK0UeUqU17i3h6cP2ANauBhBe7+vCfy ghUhmjiYxIgXqcanDUJ3t3srGMyWbbK4QmQajdTVbSxgmkbKGxPm/JMkO Zg4fozLDhe1+FulAXVhQgNLM3/RFd9Lnl4G7Zu6sBWzEz8EeCB3KEEGBf b7LaCAn+Rr+t1CG+QBdfvSuSl2ome02HkrxMunrCIQ4WUaUJVJap6gFi9 m8brJ8PFL6aOp3BIYw1YZnReUZ3Iisits6A1nGLAm8Rz1nxf1RXG0wdcI w==; X-IronPort-AV: E=Sophos;i="6.21,269,1763391600"; d="scan'208";a="607577797" Date: Tue, 3 Feb 2026 09:24:56 +0900 From: Shashank Balaji To: kernel test robot Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: References: <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <202602030600.jFhsJyEC-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <202602030600.jFhsJyEC-lkp@intel.com> On Tue, Feb 03, 2026 at 06:31:40AM +0800, kernel test robot wrote: > Hi Shashank, > > kernel test robot noticed the following build errors: > > [auto build test ERROR on 18f7fcd5e69a04df57b563360b88be72471d6b62] > > url: https://github.com/intel-lab-lkp/linux/commits/Shashank-Balaji/x86-x2apic-disable-x2apic-on-resume-if-the-kernel-expects-so/20260202-181147 > base: 18f7fcd5e69a04df57b563360b88be72471d6b62 > patch link: https://lore.kernel.org/r/20260202-x2apic-fix-v1-1-71c8f488a88b%40sony.com > patch subject: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so > config: i386-randconfig-001-20260202 (https://download.01.org/0day-ci/archive/20260203/202602030600.jFhsJyEC-lkp@intel.com/config) > compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261) > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260203/202602030600.jFhsJyEC-lkp@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot > | Closes: https://lore.kernel.org/oe-kbuild-all/202602030600.jFhsJyEC-lkp@intel.com/ > > All errors (new ones prefixed by >>): > > >> arch/x86/kernel/apic/apic.c:2463:3: error: call to undeclared function '__x2apic_disable'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] > 2463 | __x2apic_disable(); > | ^ > arch/x86/kernel/apic/apic.c:2463:3: note: did you mean '__x2apic_enable'? > arch/x86/kernel/apic/apic.c:1896:20: note: '__x2apic_enable' declared here > 1896 | static inline void __x2apic_enable(void) { } > | ^ > 1 error generated. This happens when CONFIG_X86_X2APIC is disabled. This patch fixes it, which I'll include in v2: diff --git i/arch/x86/kernel/apic/apic.c w/arch/x86/kernel/apic/apic.c index 8820b631f8a2..06cce23b89c1 100644 --- i/arch/x86/kernel/apic/apic.c +++ w/arch/x86/kernel/apic/apic.c @@ -1894,6 +1894,7 @@ void __init check_x2apic(void) static inline void try_to_enable_x2apic(int remap_mode) { } static inline void __x2apic_enable(void) { } +static inline void __x2apic_disable(void) {} #endif /* !CONFIG_X86_X2APIC */ void __init enable_IR_x2apic(void) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 07:24:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 07:24:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219122.1528062 (Exim 4.92) (envelope-from ) id 1vnAlY-0007bK-Ro; Tue, 03 Feb 2026 07:24:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219122.1528062; Tue, 03 Feb 2026 07:24:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnAlY-0007bD-NN; Tue, 03 Feb 2026 07:24:04 +0000 Received: by outflank-mailman (input) for mailman id 1219122; Tue, 03 Feb 2026 07:24:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnAlX-0007ao-Dx for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 07:24:03 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 47ab7cbd-00d1-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 08:23:47 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-4359228b7c6so3671741f8f.2 for ; Mon, 02 Feb 2026 23:23:47 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 02 Feb 2026 23:23:47 -0800 (PST) Message-ID: <27b67abe-78f4-4867-99c6-e8beed29013e@suse.com> Date: Tue, 3 Feb 2026 08:23:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/2] xen: enable dom0less guests to use console_io hypercalls To: Stefano Stabellini Cc: Stefano Stabellini , xen-devel@lists.xenproject.org, grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, Jason Andryuk References: <20260129220858.2371938-2-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.02.2026 01:11, Stefano Stabellini wrote: > On Thu, 29 Jan 2026, Jason Andryuk wrote: >> On 2026-01-29 17:08, Stefano Stabellini wrote: >>> --- a/xen/drivers/char/console.c >>> +++ b/xen/drivers/char/console.c >>> @@ -613,11 +613,20 @@ static void __serial_rx(char c) >>> if ( console_rx == 0 ) >>> return handle_keypress(c, false); >>> + /* Includes an is_focus_domain() check. */ >>> d = console_get_domain(); >>> if ( !d ) >>> return; >>> - if ( is_hardware_domain(d) ) >>> +#ifdef CONFIG_SBSA_VUART_CONSOLE >>> + /* Prioritize vpl011 if enabled for this domain */ >>> + if ( d->arch.vpl011.base_addr ) >>> + { >>> + /* Deliver input to the emulated UART. */ >>> + rc = vpl011_rx_char_xen(d, c); >>> + } >>> + else >>> +#endif >>> { >>> unsigned long flags; >>> @@ -636,11 +645,6 @@ static void __serial_rx(char c) >>> */ >>> send_global_virq(VIRQ_CONSOLE); >> >> I think we need an additional patch, or included in one of these two, to >> change VIRQ_CONSOLE to a VIRQ_DOMAIN. Otherwise only hwdom could bind to the >> virq, I think? It would be the two changes below: > > Thank you Jason. I didn't notice this problem because Linux is able to > silently fallback to polling which works surprisingly well. I didn't > notice the difference. > > I confirm that the error you highlighted is real and that with the patch > below the error goes away. > > My preference is to submit it as a separate patch, it can still be part > of this series. Especially as the other two patches have already been > reviewed and tested independently a few times. But I am happy either > way. > > Jan, what do you think? Imo this wants to be a separate change, yes. Likely a prereq one. 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Mon, 02 Feb 2026 23:41:53 -0800 (PST) Message-ID: <6bf9c569-9843-41fd-820e-6377255b13e5@suse.com> Date: Tue, 3 Feb 2026 08:41:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/mm: split struct sh_dirty_vram and make results private To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Penny Zheng References: <3dce4f28-558b-495c-ac45-0f699da82458@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 18:35, Roger Pau Monné wrote: > On Wed, Nov 12, 2025 at 04:47:31PM +0100, Jan Beulich wrote: >> The types are local to the shadow and HAP subsystems respectively, and >> HAP has no need for the shadow-specific fields (i.e. it can get away with >> smaller allocations). In struct hvm_domain it therefore suffices to have >> a union of two (generally opaque) pointers. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- a/xen/arch/x86/include/asm/hvm/domain.h >> +++ b/xen/arch/x86/include/asm/hvm/domain.h >> @@ -95,7 +95,10 @@ struct hvm_domain { >> struct list_head pinned_cacheattr_ranges; >> >> /* VRAM dirty support. Protect with the domain paging lock. */ >> - struct sh_dirty_vram *dirty_vram; >> + union { >> + struct sh_dirty_vram *sh; >> + struct hap_dirty_vram *hap; >> + } dirty_vram; > > Other in-place declared structures don't use this aligning. I have to > admit it looks somewhat odd for structs like this one. As I don't mind much, I've changed it. It's odd either way - either, as you say, it looks odd, or it's not in line with the other field decls which all align their names (except for the in-place struct decls). >> --- a/xen/arch/x86/mm/shadow/hvm.c >> +++ b/xen/arch/x86/mm/shadow/hvm.c >> @@ -1033,7 +1033,7 @@ int shadow_track_dirty_vram(struct domai >> p2m_lock(p2m_get_hostp2m(d)); >> paging_lock(d); >> >> - dirty_vram = d->arch.hvm.dirty_vram; >> + dirty_vram = d->arch.hvm.dirty_vram.sh; >> >> if ( dirty_vram && (!nr_frames || >> ( begin_pfn != dirty_vram->begin_pfn >> @@ -1043,8 +1043,8 @@ int shadow_track_dirty_vram(struct domai >> gdprintk(XENLOG_INFO, "stopping tracking VRAM %lx - %lx\n", dirty_vram->begin_pfn, dirty_vram->end_pfn); >> xfree(dirty_vram->sl1ma); >> xfree(dirty_vram->dirty_bitmap); >> - xfree(dirty_vram); >> - dirty_vram = d->arch.hvm.dirty_vram = NULL; >> + XFREE(dirty_vram); >> + d->arch.hvm.dirty_vram.sh = NULL; > > It would be better if this was done the other way around, first set > the reference to NULL, then free the memory? > > d->arch.hvm.dirty_vram.sh = NULL; > XFREE(dirty_vram); Indeed, changed. >> @@ -1075,7 +1075,7 @@ int shadow_track_dirty_vram(struct domai >> goto out; >> dirty_vram->begin_pfn = begin_pfn; >> dirty_vram->end_pfn = end_pfn; >> - d->arch.hvm.dirty_vram = dirty_vram; >> + d->arch.hvm.dirty_vram.sh = dirty_vram; >> >> if ( (dirty_vram->sl1ma = xmalloc_array(paddr_t, nr_frames)) == NULL ) >> goto out_dirty_vram; >> @@ -1202,8 +1202,8 @@ int shadow_track_dirty_vram(struct domai >> out_sl1ma: >> xfree(dirty_vram->sl1ma); >> out_dirty_vram: >> - xfree(dirty_vram); >> - dirty_vram = d->arch.hvm.dirty_vram = NULL; >> + XFREE(dirty_vram); >> + d->arch.hvm.dirty_vram.sh = NULL; > > Similar here, I would change the order. Changed as well. I can't tell why I didn't do it this way right away. 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I'll update then the commit message. > >> + >> + /* >> + * Callee saved registers for Xen's state used to switch from >> + * prev's stack to the next's stack during context switch. >> + */ >> + struct >> + { >> + register_t s0; >> + register_t s1; >> + register_t s2; >> + register_t s3; >> + register_t s4; >> + register_t s5; >> + register_t s6; >> + register_t s7; >> + register_t s8; >> + register_t s9; >> + register_t s10; >> + register_t s11; >> + register_t sp; >> + register_t ra; >> + } xen_saved_context; >> + >> + register_t hedeleg; >> + register_t hideleg; >> + register_t hvip; >> + register_t hip; >> + register_t hie; >> + register_t hgeie; >> + register_t henvcfg; >> + register_t hcounteren; >> + register_t htimedelta; >> + register_t htval; >> + register_t htinst; >> + register_t hstateen0; >> +#ifdef CONFIG_RISCV_32 >> + register_t henvcfgh; >> + register_t htimedeltah; >> +#endif > When you add these right away, any reason other high-half registers aren't added > as well? HVIP (above) and VSIE / VSIP at the very least have such counterparts, > iirc. No specific reason. It was added early in the RISC-V port when I was considering supporting RV32, but as you know I later decided to focus only on RV64, at least for now. Therefore, it seems better to drop this `#ifdef` from the `arch_vcpu` structure and re-introduce when RV32 support will be added. > >> + register_t vsstatus; >> + register_t vsip; >> + register_t vsie; >> + register_t vstvec; >> + register_t vsscratch; >> + register_t vscause; >> + register_t vstval; >> + register_t vsatp; >> + register_t vsepc; >> }; > What I'm generally concerned of: With the registers all being put here in one go, > without any of them actually being used in this patch, it'll likely be harder to > track that they're saved / restored / initialized correctly (once uses appear). Then if it will really better I'll introduce in this patch series only vsatp register as it is used in the further patches. (or even will just introduce vsatp in Patch 3) I will keep the patch [1] separately in the patch series with introduction of vtimer things and drop only an introduction of vsatp there. [1] https://lore.kernel.org/xen-devel/cover.1769099883.git.oleksii.kurochko@gmail.com/T/#ma33af3ff4b2b033f86aa964902ebcab8705fd114 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 03 09:06:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 09:06:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219161.1528091 (Exim 4.92) (envelope-from ) id 1vnCM8-00057V-9G; Tue, 03 Feb 2026 09:05:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219161.1528091; Tue, 03 Feb 2026 09:05:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnCM8-00057O-62; Tue, 03 Feb 2026 09:05:56 +0000 Received: by outflank-mailman (input) for mailman id 1219161; Tue, 03 Feb 2026 09:05:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnCM7-00057I-6h for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 09:05:55 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 88365f25-00df-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 10:05:49 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EB006339; Tue, 3 Feb 2026 01:05:41 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.130]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A53863F632; Tue, 3 Feb 2026 01:05:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 88365f25-00df-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: jens.wiklander@linaro.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH] MAINTAINERS: Add Jens as arm TEE reviewer Date: Tue, 3 Feb 2026 10:05:34 +0100 Message-ID: <1f545f1fc56c8e5f898cff688434b6f38fb16ed4.1770109450.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add Jens as arm TEE reviewers so that he is informed of changes in FF-A or OPTEE changes in Xen and can review them. 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X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2026 10:15:05.7837 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kH7Jrnfr81ROGvdZXvKGDCTViNnf2ih8Fx9afPx+KWgb/lbYu2YocCk560oCUncNjCbzbYKB3DmUGBhltA/IaQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR03MB7873 The limitation of shared_info being allocated below 4G to fit in the start_info field only applies to 32bit PV guests. On 64bit PV guests the start_info field is 64bits wide. HVM guests don't use start_info at all. Limit the allocation address restriction to 32bit PV guests only. Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") Signed-off-by: Roger Pau Monné --- xen/arch/x86/domain.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index edb76366b596..4163568043b1 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -882,10 +882,13 @@ int arch_domain_create(struct domain *d, goto fail; /* - * The shared_info machine address must fit in a 32-bit field within a - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). + * For 32bit PV guests the shared_info machine address must fit in a 32-bit + * field within the guest's start_info structure. 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MEMF_bits(32) + : 0)) == NULL ) goto fail; clear_page(d->shared_info); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 10:20:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 10:20:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219192.1528122 (Exim 4.92) (envelope-from ) id 1vnDW2-0007q0-OC; Tue, 03 Feb 2026 10:20:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219192.1528122; Tue, 03 Feb 2026 10:20:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnDW2-0007pt-LD; Tue, 03 Feb 2026 10:20:14 +0000 Received: by outflank-mailman (input) for mailman id 1219192; Tue, 03 Feb 2026 10:20:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnDW1-0007pn-6h for xen-devel@lists.xenproject.org; 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On 64bit PV guests the > start_info field is 64bits wide. HVM guests don't use start_info at all. > > Limit the allocation address restriction to 32bit PV guests only. > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > Signed-off-by: Roger Pau Monné > --- > xen/arch/x86/domain.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index edb76366b596..4163568043b1 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -882,10 +882,13 @@ int arch_domain_create(struct domain *d, > goto fail; > > /* > - * The shared_info machine address must fit in a 32-bit field within a > - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > + * field within the guest's start_info structure. Hence we specify > + * MEMF_bits(32). > */ > - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) > + if ( (d->shared_info = > + alloc_xenheap_pages(0, is_pv_32bit_domain(d) ? MEMF_bits(32) > + : 0)) == NULL ) Sorry, this is wrong, it's too early to know whether the domain is 32 or 64bit. Roger. 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Tue, 03 Feb 2026 02:26:33 -0800 (PST) MIME-Version: 1.0 References: <1f545f1fc56c8e5f898cff688434b6f38fb16ed4.1770109450.git.bertrand.marquis@arm.com> In-Reply-To: <1f545f1fc56c8e5f898cff688434b6f38fb16ed4.1770109450.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Tue, 3 Feb 2026 11:26:21 +0100 X-Gm-Features: AZwV_QgD8LDsWiTcaHlPURipg8GuZPXU2BkZTFTPF6tnNhP8-kL-8mG4iOzOVCM Message-ID: Subject: Re: [PATCH] MAINTAINERS: Add Jens as arm TEE reviewer To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 10:05=E2=80=AFAM Bertrand Marquis wrote: > > Add Jens as arm TEE reviewers so that he is informed of changes in FF-A > or OPTEE changes in Xen and can review them. > > Signed-off-by: Bertrand Marquis > --- > MAINTAINERS | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 0ceb4bba21cd..ccc25a0e55dc 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -547,6 +547,7 @@ F: stubdom/ > TEE MEDIATORS > M: Volodymyr Babchuk > M: Bertrand Marquis > +R: Jens Wiklander > S: Supported > F: xen/arch/arm/include/asm/tee/ > F: xen/arch/arm/tee/ > -- > 2.51.2 > Thanks, looks good: Acked-by: Jens Wiklander Cheers, Jens From xen-devel-bounces@lists.xenproject.org Tue Feb 03 10:30:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 10:30:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219211.1528142 (Exim 4.92) (envelope-from ) id 1vnDg8-0001ki-U2; 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suspend/resume support To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Oleksandr, Thanks for the review. On Sat, Jan 31, 2026 at 7:00=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 11.12.25 20:43, Mykola Kvach wrote: > > Hello Mykola > > > From: Mykola Kvach > > > > Handle system suspend/resume for GICv3 with an ITS present so LPIs keep > > working after firmware powers the GIC down. Snapshot the CPU interface, > > distributor and last-CPU redistributor state, disable the ITS to cache = its > > CTLR/CBASER/BASER registers, then restore everything and re-arm the > > collection on resume. > > > > Add list_for_each_entry_continue_reverse() in list.h for the ITS suspen= d > > error path that needs to roll back partially saved state. > > > > Based on Linux commit: dba0bc7b76dc ("irqchip/gic-v3-its: Add ability t= o save/restore ITS state") > > Signed-off-by: Mykola Kvach > > --- > > xen/arch/arm/gic-v3-its.c | 91 ++++++++++++++++++++++++++= + > > xen/arch/arm/gic-v3.c | 15 ++++- > > xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++++ > > xen/include/xen/list.h | 14 +++++ > > 4 files changed, 140 insertions(+), 3 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index 34833166ad..08a3d8d1ef 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -1209,6 +1209,97 @@ int gicv3_its_init(void) > > return 0; > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +int gicv3_its_suspend(void) > > +{ > > + struct host_its *its; > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > + { > > + unsigned int i; > > + void __iomem *base =3D its->its_base; > > + > > + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR); > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + { > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + goto err; > > + } > > + > > + its->suspend_ctx.cbaser =3D readq_relaxed(base + GITS_CBASER); > > + > > + for (i =3D 0; i < GITS_BASER_NR_REGS; i++) { > > + uint64_t baser =3D readq_relaxed(base + GITS_BASER0 + i * = 8); > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + its->suspend_ctx.baser[i] =3D baser; > > + } > > + } > > + > > + return 0; > > + > > + err: > > + list_for_each_entry_continue_reverse(its, &host_its_list, entry) > > + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTL= R); > > + > > + return ret; > > +} > > + > > +void gicv3_its_resume(void) > > +{ > > + struct host_its *its; > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > + { > > + void __iomem *base; > > + unsigned int i; > > + > > + base =3D its->its_base; > > + > > + /* > > + * Make sure that the ITS is disabled. If it fails to quiesce, > > + * don't restore it since writing to CBASER or BASER > > + * registers is undefined according to the GIC v3 ITS > > + * Specification. > > + * > > + * Firmware resuming with the ITS enabled is terminally broken= . > > + */ > > + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + continue; > > If ITS fails to disable (quiesce), the code skips restoration and ITS > remains in an unconfigured state. However, immediately after the loop ... > > > > + > > + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); > > + > > + /* > > + * Writing CBASER resets CREADR to 0, so make CWRITER and > > + * cmd_write line up with it. > > NIT: The variable "cmd_write" does not exist in the Xen driver. As I > understand, this comment was ported from the Linux kernel driver as is, > which maintains a software shadow copy of the write pointer named > "cmd_write". Good catch, thanks. You=E2=80=99re right - cmd_write doesn=E2=80=99t exist in the Xen driver; t= his comment was ported from Linux. I=E2=80=99ll drop the cmd_write mention and keep the comment focused on aligning CWRITER with the reset CREADR. > > > > + */ > > + writeq_relaxed(0, base + GITS_CWRITER); > > + > > + /* Restore GITS_BASER from the value cache. */ > > + for (i =3D 0; i < GITS_BASER_NR_REGS; i++) { > > + uint64_t baser =3D its->suspend_ctx.baser[i]; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); > > + } > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + } > > + > > + ret =3D gicv3_its_setup_collection(smp_processor_id()); > > ... this function iterates over all host ITS instances (including the > one we skipped) and attempts to send MAPC commands. I am afraid, that > attempting to write to the command queue of an uninitialized/unrestored > ITS might have bad consequences. Good catch, thanks. Since gicv3_its_setup_collection() iterates over all host ITS instances, it may send MAPC commands through an ITS that we intentionally skipped or failed to restore. That=E2=80=99s unsafe. I=E2=80=99ll fix this by invoking= collection setup only for ITS instances successfully restored in this loop. Best regards, Mykola > > > + if ( ret ) > > + panic("GICv3: ITS: resume setup collection failed: %d\n", ret)= ; > > +} > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > > > [snip] > From xen-devel-bounces@lists.xenproject.org Tue Feb 03 11:20:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 11:20:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219238.1528161 (Exim 4.92) (envelope-from ) id 1vnESF-0000iR-J7; Tue, 03 Feb 2026 11:20:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219238.1528161; Tue, 03 Feb 2026 11:20:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnESF-0000iK-G0; Tue, 03 Feb 2026 11:20:23 +0000 Received: by outflank-mailman (input) for mailman id 1219238; Tue, 03 Feb 2026 11:20:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnESE-0000iE-9s for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 11:20:22 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 530859b6-00f2-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 12:20:20 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-47ff94b46afso6846675e9.1 for ; Tue, 03 Feb 2026 03:20:20 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" References: <54a015e0e47ea311471bad7f13fbf21e14389ef3.1768293759.git.mykyta_poturai@epam.com> <00e17b41-f31e-4121-80c8-d4ea2bb02f34@suse.com> <17a56445-0c5b-48ef-9adc-3544d06abe3b@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <17a56445-0c5b-48ef-9adc-3544d06abe3b@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.02.2026 11:30, Mykyta Poturai wrote: > On 14.01.26 11:49, Jan Beulich wrote: >> On 13.01.2026 09:45, Mykyta Poturai wrote: >>> Move XEN_SYSCTL_CPU_HOTPLUG_{ONLINE,OFFLINE} handlers to common code to >>> allow for enabling/disabling CPU cores in runtime on Arm64. >>> >>> SMT-disable enforcement check is moved into a separate >>> architecture-specific function. >>> >>> For now this operations only support Arm64. For proper Arm32 support, >>> there needs to be a mechanism to free per-cpu page tables, allocated in >>> init_domheap_mappings. Also, hotplug is not supported if ITS, FFA, or >>> TEE is enabled, as they use non-static IRQ actions. >> >> For all of these "not supported" cases, what if a user nevertheless tries? >> Wouldn't the request better be outright denied, rather leaving the system in >> a questionable state? Hmm, I see you ... >> >>> --- a/xen/arch/arm/Kconfig >>> +++ b/xen/arch/arm/Kconfig >>> @@ -7,6 +7,7 @@ config ARM_64 >>> def_bool y >>> depends on !ARM_32 >>> select 64BIT >>> + select CPU_HOTPLUG if !TEE && !FFA && !HAS_ITS >> >> ... make the select conditional. But do TEE, FFA, and HAS_ITS each mean the >> feature is actually in use when the hypervisor runs? >> > The way interrupts are requested in these modules causes Xen to crash > when trying to offline a cpu. It’s a fairly simple fix and I plan to > send them eventually. I’ve decided to omit them now and do these fixes > only for supported code to keep the series from ballooning with too many > patches. I disagree with such an approach, but it'll be the Arm maintainers to judge here. >>> + int ret = cpu_up(cpu); >>> + >>> + /* Have one more go on EBUSY. */ >>> + if ( ret == -EBUSY ) >>> + ret = cpu_up(cpu); >>> + >>> + if ( !ret && arch_smt_cpu_disable(cpu) ) >> >> As you validly note in a comment in do_sysctl(), SMT is an arch-specific concept >> and perhaps even an arch-specific term. Hence using it in the name of an arch >> hook feels inappropriate. Plus - the hook could be used for other purposes. What >> the arch needs to indicate is whether the CPU that was brought up may actually >> stay online. That more generic purpose is what imo the name wants to cover. > > Would arch_cpu_online_allowed() be okay, or maybe you have something > more specific in mind? The name is already much better, just that it gives the impression that it perhaps rather would want using ahead of calling cpu_up(). >>> + case XEN_SYSCTL_CPU_HOTPLUG_SMT_ENABLE: >>> + case XEN_SYSCTL_CPU_HOTPLUG_SMT_DISABLE: >>> + /* Use arch specific handlers as SMT is very arch-dependent */ >>> + ret = arch_do_sysctl(op, u_sysctl); >>> + copyback = 0; >>> + goto out; >> >> I wonder if it wouldn't be neater for this and actually also ... >> >>> + default: >>> + ret = -EOPNOTSUPP; >>> + break; >> >> ... this to fall through to ... >> >>> + } >>> + >>> + if ( !ret ) >>> + ret = plug ? xsm_resource_plug_core(XSM_HOOK) >>> + : xsm_resource_unplug_core(XSM_HOOK); >>> + >>> + if ( !ret ) >>> + ret = continue_hypercall_on_cpu(0, fn, hcpu); >>> + break; >>> + } >>> +#endif >>> + >>> default: >>> ret = arch_do_sysctl(op, u_sysctl); >> >> ... here. (Minimally the earlier default case wants uniformly forwarding to >> the arch handler, or else arch-specific additions would always require >> adjustment here.) > > Would it be okay to mix goto and switch like this, or is it too convoluted? I'm not a fan of using goto, but maybe it would be acceptable here. By ... > case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: > plug = false; > fn = cpu_down_helper; > hcpu = _p(cpu); > break; > > default: > goto outer_default; > } > > if ( !ret ) > ret = plug ? xsm_resource_plug_core(XSM_HOOK) > : xsm_resource_unplug_core(XSM_HOOK); > > if ( !ret ) > ret = continue_hypercall_on_cpu(0, fn, hcpu); > break; ... wrapping everything past the switch() block in "if ( fn )" you'd already get what is wanted. > } > #endif > > default: > outer_default: Nit: See ./CODING_STYLE. Jan > ret = arch_do_sysctl(op, u_sysctl); > copyback = 0; > break; > } > > > From xen-devel-bounces@lists.xenproject.org Tue Feb 03 12:24:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 12:24:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219256.1528171 (Exim 4.92) (envelope-from ) id 1vnFS3-0000Bx-7C; Tue, 03 Feb 2026 12:24:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219256.1528171; Tue, 03 Feb 2026 12:24:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnFS3-0000Bq-4V; Tue, 03 Feb 2026 12:24:15 +0000 Received: by outflank-mailman (input) for mailman id 1219256; Tue, 03 Feb 2026 12:24:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 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b=UZ7n+CsqmOUFQlqrVCefemjyAmWEMHIeuVfEMG+dDhmle9Xz/uj2q0kfpbbxGoq0tbTqAr8vWMG4PjF+eI1/4JlVIkcqb6FqjqypeDCQAXPt91qyKSpgVsXcFobj5hs7HfDs2uQSsXJbqA2BmOqTii2+TJMpAm8EJLSiwEzZNQxj7ymxY4A3b1hW39gHICGiP8hU54CFq+WGnJpl9XfYixiRCHH8RdXUA/O90AJs6ke9TfOiv9MBWAGb9nfApveUijk4HAyENV1NgrXzl04grXYeW8ata5ZG/3EpmyvFxwJhukm/rdm3D74f5K36JZGxiQLVLTUsl5yl9PyJ+NQ8Kg== From: Mykyta Poturai To: Bertrand Marquis CC: "xen-devel@lists.xenproject.org" , "xakep.amatop@gmail.com" , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= Subject: Re: [RFC PATCH 00/19] GICv4 Support for Xen Thread-Topic: [RFC PATCH 00/19] GICv4 Support for Xen Thread-Index: AQHclF8GgI2Kr/X/QEO5wnP/6sbdXbVwv1qAgAAn3QA= Date: Tue, 3 Feb 2026 12:24:03 +0000 Message-ID: <88755b1b-a9c9-489a-80e3-e014244b108a@epam.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: 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Amends: 819cdc5a7301 ("x86/p2m: re-arrange {,__}put_gfn()") Signed-off-by: Jan Beulich --- Easy to spot by adding ASSERT(!gfn_eq(g, INVALID_GFN)) to the respective macros. While imo that should be a correct thing to do (as with hypothetical split locks a valid GFN would really need passing in, in order to be able to figure out which lock to use), we can't do so right now: The lock is acquired ahead of respective checking in a number of places, e.g. in p2m_get_gfn_type_access(). There's no clear Fixes: tag to use, I think - the problem looks to have been introduced by the gradual conversion to gfn_t. I probably should not have added gfn_x() in the referenced commit, to unbreak things already at that time. --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -338,9 +338,9 @@ mfn_t p2m_get_gfn_type_access(struct p2m void p2m_put_gfn(struct p2m_domain *p2m, gfn_t gfn) { - ASSERT(gfn_locked_by_me(p2m, gfn_x(gfn))); + ASSERT(gfn_locked_by_me(p2m, gfn)); - gfn_unlock(p2m, gfn_x(gfn), 0); + gfn_unlock(p2m, gfn, 0); } static struct page_info *get_page_from_mfn_and_type( From xen-devel-bounces@lists.xenproject.org Tue Feb 03 14:49:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 14:49:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219306.1528191 (Exim 4.92) (envelope-from ) id 1vnHi6-0001pU-Du; Tue, 03 Feb 2026 14:48:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219306.1528191; Tue, 03 Feb 2026 14:48:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnHi6-0001pN-B0; Tue, 03 Feb 2026 14:48:58 +0000 Received: by outflank-mailman (input) for mailman id 1219306; Tue, 03 Feb 2026 14:48:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnHi4-0001pH-Om for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 14:48:56 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 766c12cd-010f-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 15:48:55 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-47ee3a63300so62931115e9.2 for ; Tue, 03 Feb 2026 06:48:55 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 06:48:54 -0800 (PST) Message-ID: <4913d9b3-03ec-443e-b908-a1531dca6699@suse.com> Date: Tue, 3 Feb 2026 15:48:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/6] x86/PCI: avoid re-evaluation of extended config space accessibility To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Stewart Hildebrand References: <1bcdd2dd-9b2b-4eb2-a569-e28b03c1e1fb@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 16:18, Roger Pau Monné wrote: > My copy of the PCI Firmware Spec v3.3 contains: > > "4.1.2. MCFG Table Description > > The MCFG table is an ACPI table that is used to communicate the base > addresses corresponding to the non-hot removable PCI Segment Groups > range within a PCI Segment Group available to the operating system at > boot. > > [...] > > 4.1.3. The _CBA Method > > Some systems may support hot plug of host bridges that introduce > either a range of buses within an existing PCI Segment Group or > introduce a new PCI Segment Group. For example, each I/O chip in a > multi-chip PCI Express root complex implementation could start a new > PCI Segment Group." > > Together with this: > > "The MCFG table format allows for more than one memory mapped base > address entry provided each entry (memory mapped configuration space > base address allocation structure) corresponds to a unique PCI Segment > Group consisting of 256 PCI buses. Multiple entries corresponding to a > single PCI Segment Group is not allowed." > > Given that each segment group can only appear once in the MCFG, and > that the _CBA method can introduce new segment groups, it would seem > to me the spec does allow for new segments appearing exclusively as > the return of _CBA method? It does read as if hot-removable segment > groups must not appear in the MCFG table. I'm not finding any clear > statement in the spec that says that ECAM areas must previously appear > in the MCFG table. > > I'm not sure how common that is, but it doesn't seem impossible given > my reading of the spec. Hmm, that'll be a bit of work then, as Dom0 will also need to propagate the necessary data into Xen. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 03 15:00:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 15:00:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219321.1528203 (Exim 4.92) (envelope-from ) id 1vnHt1-0004fG-JD; Tue, 03 Feb 2026 15:00:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219321.1528203; Tue, 03 Feb 2026 15:00:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnHt1-0004f9-FP; Tue, 03 Feb 2026 15:00:15 +0000 Received: by outflank-mailman (input) for mailman id 1219321; Tue, 03 Feb 2026 15:00:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnHt0-0004f3-Ci for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 15:00:14 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0a58f970-0111-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 16:00:13 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-432d2c7a8b9so4905069f8f.2 for ; Tue, 03 Feb 2026 07:00:12 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 07:00:11 -0800 (PST) Message-ID: <2c2b6189-9404-4378-a101-3a93cbadee43@suse.com> Date: Tue, 3 Feb 2026 16:00:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/4] xen/mm: limit non-scrubbed allocations to a specific order To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260130145726.85907-1-roger.pau@citrix.com> <20260130145726.85907-5-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260130145726.85907-5-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 30.01.2026 15:57, Roger Pau Monne wrote: > @@ -1117,6 +1130,14 @@ static struct page_info *alloc_heap_pages( > scrub_one_page(&pg[i], cold); > > dirty_cnt++; > + > + /* > + * Use SYS_STATE_smp_boot explicitly; ahead of that state > + * interrupts are disabled. > + */ > + if ( system_state == SYS_STATE_smp_boot && > + !(dirty_cnt & 0xff) ) > + process_pending_softirqs(); > } > else > check_one_page(&pg[i]); Coming back to this, I see two possible issues. One is that on x86 enabling of IRQs happens a bit earlier than setting of SYS_STATE_smp_boot. Maybe this isn't really a problem right now, but it could become one if the "wrong" thing is inserted into that window in __start_xen(). The other is that only x86 actually ever sets that state. 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Tue, 03 Feb 2026 07:30:42 -0800 (PST) Message-ID: <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> Date: Tue, 3 Feb 2026 16:30:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 1/2] xen/console: handle multiple domains using console_io hypercalls To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260129220858.2371938-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260129220858.2371938-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.01.2026 23:08, Stefano Stabellini wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -518,11 +518,16 @@ static unsigned int __read_mostly console_rx = 0; > struct domain *console_get_domain(void) > { > struct domain *d; > + unsigned int rx; > > - if ( console_rx == 0 ) > + nrspin_lock(&console_lock); > + rx = console_rx; > + nrspin_unlock(&console_lock); Did you test this in a debug build, and it didn't blow up? The console lock is an IRQ-safe one, so I'd expect check_lock() to complain that you do not disable IRQs here. At the same time I don't think you can rely on IRQs being off upon entry into the function. Anyway - is locking here really needed? Wouldn't suitable use of ACCESS_ONCE() (also elsewhere) do? (Such a switchover likely could be a separate, prereq patch.) Further, if already you add locking on the read sides, what about ... > @@ -540,6 +545,12 @@ void console_put_domain(struct domain *d) > rcu_unlock_domain(d); > } > > +static bool is_focus_domain(const struct domain *d) > +{ > + ASSERT(rspin_is_locked(&console_lock)); > + return d != NULL && d->domain_id == console_rx - 1; > +} > + > static void console_switch_input(void) > { > unsigned int next_rx = console_rx; ... this read? > @@ -555,7 +566,10 @@ static void console_switch_input(void) > > if ( next_rx++ >= max_console_rx ) > { > + nrspin_lock_irq(&console_lock); As indicated earlier, you can't know IRQ state in anything down the call tree from serial_rx(). > @@ -742,17 +765,36 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, > if ( copy_from_guest(kbuf, buffer, kcount) ) > return -EFAULT; > > - if ( is_hardware_domain(cd) ) > + /* > + * Take both cons->lock and console_lock: > + * - cons->lock protects cons->buf and cons->idx > + * - console_lock protects console_send() and is_focus_domain() > + * checks > + * > + * The order must be respected. guest_printk() takes the > + * console_lock so it is important that cons->lock is taken > + * first. > + */ > + spin_lock(&cons->lock); > + nrspin_lock_irq(&console_lock); While guest_printk() does matter here, it taking (down the call tree) console_lock isn't alone relevant. It being called with cons->lock held is, . > @@ -816,22 +857,39 @@ long do_console_io( > break; > > rc = 0; > + nrspin_lock_irq(&console_lock); > + if ( !is_focus_domain(current->domain) ) > + count = 0; > while ( (serial_rx_cons != serial_rx_prod) && (rc < count) ) > { > idx = SERIAL_RX_MASK(serial_rx_cons); > len = serial_rx_prod - serial_rx_cons; > + nrspin_unlock_irq(&console_lock); Can we please have blank lines on both sides of this? > if ( (idx + len) > SERIAL_RX_SIZE ) > len = SERIAL_RX_SIZE - idx; > if ( (rc + len) > count ) > len = count - rc; > if ( copy_to_guest_offset(buffer, rc, &serial_rx_ring[idx], len) ) Have I perhaps talked you into moving the unlock too early? serial_rx_ring[] accesses look like they need to be with the lock still held. Or, to avoid calling copy_to_guest_offset() with the lock held, a local copy would need making. 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Tue, 03 Feb 2026 07:47:06 -0800 (PST) Message-ID: Date: Tue, 3 Feb 2026 16:47:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/16] xen/riscv: introduce basic vtimer infrastructure for guests To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <381c200edaff013d999c6314c20e8cc8bdb5b041.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <381c200edaff013d999c6314c20e8cc8bdb5b041.1769099885.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) > +{ > + struct arch_vcpu *avcpu = container_of(t, struct arch_vcpu, vtimer); > + struct vcpu *v = container_of(avcpu, struct vcpu, arch); Why two container_of() when one will do? (Same again further down.) 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UT90I6fjRJc/0nnYOjgXPQ4MsxyuhtEUy2F7aQSye4Bs8ISzXSZQAKxHvDB/Xo2BaZoHSC1fh0G79GPB9HAKG8diflv/63P47Yl1llC14eiZ+Atjq93Snw0wiob/Ccna9G8RMHOhEnBb2Lil7L/mTR9pkqFCkrK1/ptbMcjqgL34qq0V2ZMZJIYBwXM0eBpTAyHRyzUHj51LmWgmBXkd+erb1x+ODu0lz6wpmFRhrDaEYVWs2Jynhr8onsHTiofQ8jnQ4/8tTak0YNM98TV03cSMfOnLv1rRCCQQVE+3ioLtuIsTxNALCVyHCNvaLu+u1N6PjJTJHoxOMYQPW6wy6paNbpv5Hc3NY/HsnKAfONciMvyhPw/7tVDIonRUhe9/ucdaG2Csvlkf+yb5MEDKjN8ghF//uz4Ocmv/+r9q+cZL9V15Jkv1MKvn7ugDoIFT X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2026 16:36:13.0247 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b0703e7-dc5f-4e69-8584-08de63425826 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000043.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR08MB10812 Hi Mykyta, > On 13 Jan 2026, at 09:45, Mykyta Poturai wrote: >=20 > This series implements support for CPU hotplug/unplug on Arm. To achieve = this, > several things need to be done: >=20 > 1. XEN_SYSCTL_CPU_HOTPLUG_* calls implemented on Arm64. > 2. Enabled building of xen-hptool. > 3. Migration of irqs from dying CPUs implemented. >=20 > Tested on QEMU. Do you have a way to validate this on real hardware ? Doing hotplug/unplug might have side effects (caches, coherency, interrupts= , etc) that I would not be completely confident to have validated by only testing this = in qemu. Could you explain how you validated this (what kind of tests you did). I would be interested to know how the system behave in the following cases: - stopping cpu with guests pinned to specific cores - stopping a cpu with a guest pinned and only running on that one - checking with passthrough devices (for irq balancing) Then a general remark i have is that most of this code (if not all) is alwa= ys in Xen even if CONFIG_CPU_HOTPLUG is not activated in xen config which will probab= ly generate some dead code. Could we protect some of the code not used when HOTPLUG is not activated with if (is_enabled(CONFIG_CPU_HOTPLUG)) or equivalent forms ? Cheers Bertrand >=20 > v4->v5: > * drop merged patches > * combine "smp: Move cpu_up/down helpers to common code" with=20 > "arm/sysctl: Implement cpu hotplug ops" > * see individual patches >=20 > v3->v4: > * add irq migration patches > * see individual patches >=20 > v2->v3: > * add docs >=20 > v1->v2: > * see individual patches >=20 > Mykyta Poturai (5): > arm/irq: Keep track of irq affinities > arm/irq: Migrate IRQs during CPU up/down operations > arm/sysctl: Implement cpu hotplug ops > tools: Allow building xen-hptool without CONFIG_MIGRATE > docs: Document CPU hotplug >=20 > SUPPORT.md | 1 + > docs/misc/cpu-hotplug.txt | 50 +++++++++++++++++++++++++ > tools/libs/guest/Makefile.common | 2 +- > tools/misc/Makefile | 2 +- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/gic-vgic.c | 2 + > xen/arch/arm/include/asm/irq.h | 2 + > xen/arch/arm/irq.c | 63 +++++++++++++++++++++++++++++++- > xen/arch/arm/smp.c | 9 +++++ > xen/arch/arm/smpboot.c | 6 +++ > xen/arch/arm/vgic.c | 14 ++++++- > xen/arch/ppc/stubs.c | 4 ++ > xen/arch/riscv/stubs.c | 5 +++ > xen/arch/x86/Kconfig | 1 + > xen/arch/x86/include/asm/smp.h | 3 -- > xen/arch/x86/smp.c | 33 ++--------------- > xen/arch/x86/sysctl.c | 12 ++---- > xen/common/Kconfig | 3 ++ > xen/common/smp.c | 34 +++++++++++++++++ > xen/common/sysctl.c | 45 +++++++++++++++++++++++ > xen/include/xen/smp.h | 4 ++ > 21 files changed, 248 insertions(+), 48 deletions(-) > create mode 100644 docs/misc/cpu-hotplug.txt >=20 > --=20 > 2.51.2 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:44:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:44:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219398.1528271 (Exim 4.92) (envelope-from ) id 1vnJVe-0003R7-Oz; Tue, 03 Feb 2026 16:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219398.1528271; Tue, 03 Feb 2026 16:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJVe-0003R0-MM; Tue, 03 Feb 2026 16:44:14 +0000 Received: by outflank-mailman (input) for mailman id 1219398; Tue, 03 Feb 2026 16:44:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJVd-0003Qu-BM for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 16:44:13 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8bdec120-011f-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 17:44:02 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-47f5c2283b6so47879035e9.1 for ; Tue, 03 Feb 2026 08:44:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 08:44:02 -0800 (PST) Message-ID: Date: Tue, 3 Feb 2026 17:43:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/16] xen/riscv: add vtimer context switch helpers To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > Introduce vtimer_ctx_switch_from() and vtimer_ctx_switch_to() to handle > virtual timer state across vCPU context switches. > > At present, vtimer_ctx_switch_from() is a no-op because the RISC-V SSTC > extension, which provides a virtualization-aware timer, is not yet > supported. Xen therefore relies the virtual (SBI-based) timer. > > The virtual timer uses Xen's internal timer infrastructure and must be > associated with the pCPU on which the vCPU is currently running so that > timer events can be delivered efficiently. As a result, vtimer_ctx_switch_to() > migrates the timer to the target pCPU when a vCPU is scheduled in. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich However, ... > --- a/xen/arch/riscv/include/asm/vtimer.h > +++ b/xen/arch/riscv/include/asm/vtimer.h > @@ -17,4 +17,7 @@ void vcpu_timer_destroy(struct vcpu *v); > > void vtimer_set_timer(struct vtimer *t, uint64_t ticks); > > +void vtimer_ctx_switch_from(struct vcpu *p); > +void vtimer_ctx_switch_to(struct vcpu *n); ... may I ask that you reconsider naming here? Both Arm and x86 have functions where the prefix / infix is "ctxt", not just "ctx". Being able to find all by grep-ing for e.g. ctxt_switch_from might be quite nice. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:47:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:47:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219405.1528281 (Exim 4.92) (envelope-from ) id 1vnJYx-00049X-6S; Tue, 03 Feb 2026 16:47:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219405.1528281; Tue, 03 Feb 2026 16:47:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJYx-00049Q-3p; Tue, 03 Feb 2026 16:47:39 +0000 Received: by outflank-mailman (input) for mailman id 1219405; Tue, 03 Feb 2026 16:47:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJYv-00049J-NP for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 16:47:37 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0a9fc2aa-0120-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 17:47:35 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-480142406b3so43757985e9.1 for ; Tue, 03 Feb 2026 08:47:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 08:47:34 -0800 (PST) Message-ID: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Date: Tue, 3 Feb 2026 17:47:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH 0/3] x86/shadow: tidy VRAM tracking a little Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit While dealing with Roger's comments on "x86/mm: split struct sh_dirty_vram and make results private" I spotted more aspects which may want changing. 1: unlock P2M slightly earlier in shadow_track_dirty_vram() 2: VRAM last_dirty tagging 3: reduce flush_tlb's scope in shadow_track_dirty_vram() Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:49:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:49:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219416.1528291 (Exim 4.92) (envelope-from ) id 1vnJav-0004ja-JS; Tue, 03 Feb 2026 16:49:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219416.1528291; Tue, 03 Feb 2026 16:49:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJav-0004jT-Gq; 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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4830512e61dsm73209105e9.8.2026.02.03.08.49.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Feb 2026 08:49:37 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5394b2a4-0120-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=google; t=1770137377; x=1770742177; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:autocrypt:content-language :references:cc:to:from:subject:user-agent:mime-version:date :message-id:from:to:cc:subject:date:message-id:reply-to; bh=hsihNRRAUO9irjyqUmGl+lYbNZkIHXJWPrKLzjEl7yk=; b=d27/gVMW0dgCW5fycMRRMONDxt5VtrUc+jYbcyrvU3GpbWgLvNVJQziC/NIdy4Hkmj XWnKj4hl+HahwnUIoa/tWA1ALHnf04I4EIVAPReRU0y4lpGRmp3CvJsrqF0o8OLARtk7 52+S3qeMKmI6fTsk5zkptCQkrq9B1ZFE6rXGvXzSY2QjV035zf5qxJ7VsMScc0NxiNnm Ii2yY3XO8ERDQHCfC5EScMx8dTk0GMPBwAQ3uSeoS8mRH3WirXrUIlV3oO0qkI1wKpbH /MXnJs4oMJRYmTxXGE2nMSpXNk4DRi+G+khHdON5Vh3pqXtpyiW2Rp7Tn1ewnntCw+YJ LZBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770137377; x=1770742177; h=content-transfer-encoding:in-reply-to:autocrypt:content-language :references:cc:to:from:subject:user-agent:mime-version:date :message-id:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=hsihNRRAUO9irjyqUmGl+lYbNZkIHXJWPrKLzjEl7yk=; b=dZlNSU50ABndHyyalHo1vWQEUWWYY4u5Z7KRlWBAB+AWXxtqYPQoaZxmQt/jD8xuOL Beny4Ezg+Iyl4SOhIN/acXDO6pDZUts1/j442PjWALg9TcJCZhXggd35luvsOiGk+/Fl mSTxeRfvyJq+rMRtcj3Yztjy96tNtIIyUesab4OkTu/uCQXqQKCi1EcI8AZDCfzbNZoA 21itmqcVww6n9tVgQDs9oITFaH0qYAh6OGM4BTd5bGJHmx2RlmLjsNwPF7x+OiYFeTaH WHj4477H/8PDOPtGk3ggFTXJnV4kvYGk1AnCiyMl/1oyzPf8nBmeY5hjY9pj9UIxhDDf 17PA== X-Gm-Message-State: AOJu0YzpOllN2h78BuReqjWnxbfdmTgEukkM9eOvO99Ea+1SFFs2KdnU y/ESPQfXCr1qYW5z7LiQE94FiZPHb0CV1pjNBKlMNcftfcw69JDIY+hPKV/1E7VPLh1wP8uhM0E D1PYtRg== X-Gm-Gg: AZuq6aIt1W2BXxlURoNO8yUUvZZM8vIifbYBeCpUngMcckJjYLicj7NM0Wg7gsQiljC QJkaYgpyRxQgBxN6+VokPG/ws3f362nR4b3RdI3tz2+sQIwQetMrroPfrB9HYN0H2uGaGpvmtLZ k7QaUJCxPxq4wxq4XTbB5FFtat4JPxIyPClLufNc73Kr10nAyC4vhiPBCeRqzNRjjECR+Ib2suy qmT3lv285oPX18SO4klGvoRsUls0jCVG13uCYwZvNz4isI7YhRsDoN5mxoff1263TDoQgkEr94c 7raEKzH2B2JFW/XQ1SemPMu91qZKKyPv4CVAu9CHdy1RuMAdh91LXnRFvjNPM/FLRHvt9xplwaS 7aQK0ceBfaIfEbr2w5Vp9ukC/GxLeoQeXDF/MJbDfQWiL6p0Lk0mmjozeoaviqGVZHH0AZAl9HK Yx0P3OYha2wbjJR5oO7vV0HDhqSPD4X6ctY20nBf/HFsIdtGM1mQD6r47BK19xKxE5F1/Zc0gag 1HyxThvcLMNTg== X-Received: by 2002:a05:600c:1f08:b0:480:6941:d38b with SMTP id 5b1f17b1804b1-4830e991a8emr3540515e9.30.1770137377374; Tue, 03 Feb 2026 08:49:37 -0800 (PST) Message-ID: Date: Tue, 3 Feb 2026 17:49:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/3] x86/shadow: unlock P2M slightly earlier in shadow_track_dirty_vram() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit There's no need to call vfree() with the lock still held. Signed-off-by: Jan Beulich --- In fact for the purposes of the function the P2M lock could really be obtained merely in read mode, and it could be dropped immediately in both the main "if()" and its "else if()". If only there wasn't the error handling after copy_to_guest(): Dropping the paging lock ahead of that call, we rely solely on the P2M lock to also guard the changing of d->arch.hvm.dirty_vram.sh and what it points to. Question is why dropping the paging lock (but continuing to hold the P2M lock) is necessary there in the first place. --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -1219,8 +1219,8 @@ int shadow_track_dirty_vram(struct domai paging_unlock(d); rc = -EFAULT; } - vfree(dirty_bitmap); p2m_unlock(p2m_get_hostp2m(d)); + vfree(dirty_bitmap); return rc; } From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:50:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:50:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219421.1528301 (Exim 4.92) (envelope-from ) id 1vnJbF-0005AG-Pi; Tue, 03 Feb 2026 16:50:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219421.1528301; Tue, 03 Feb 2026 16:50:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJbF-00059k-N9; Tue, 03 Feb 2026 16:50:01 +0000 Received: by outflank-mailman (input) for mailman id 1219421; Tue, 03 Feb 2026 16:49:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJbD-0004jK-Oq for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 16:49:59 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5f6c0bc4-0120-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 17:49:57 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-435a517be33so3521246f8f.0 for ; Tue, 03 Feb 2026 08:49:57 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 08:49:57 -0800 (PST) Message-ID: <8559db88-5f1d-4ced-980c-e71c4e229c7c@suse.com> Date: Tue, 3 Feb 2026 17:49:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/3] x86/shadow: VRAM last_dirty tagging From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit ->last_dirty holding a valid value (one other than -1) is solely an indication of the bitmap being entirely clean. (The opposite isn't true, because of _sh_propagate() setting the field to a valid value without setting a bit in the bitmap.) As a consequence - setting the field to a valid value right after having allocated zero- filled space is pointless, - copying the the all empty bitmap to the output array is pointless; with the output array also having been allocated zero-filled, not even a memset() is needed there, - after restoring bitmap contents when dealing with copy_to_guest() having failed, the field needs setting to a valid value again. Furthermore invoking NOW() in perhaps many loop iterations of the main loop is wasteful, too. Record whether any bit was set, and record a new ->last_dirty only once, after the loop. Then use the same NOW() value also for the subsequent check. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -1087,18 +1087,18 @@ int shadow_track_dirty_vram(struct domai if ( (dirty_vram->dirty_bitmap = xzalloc_array(uint8_t, dirty_size)) == NULL ) goto out_sl1ma; - dirty_vram->last_dirty = NOW(); + dirty_vram->last_dirty = -1; /* Tell the caller that this time we could not track dirty bits. */ rc = -ENODATA; } - else if ( dirty_vram->last_dirty == -1 ) - /* still completely clean, just copy our empty bitmap */ - memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); - else + /* Nothing to do when the bitmap is still completely clean. */ + else if ( dirty_vram->last_dirty != -1 ) { mfn_t map_mfn = INVALID_MFN; void *map_sl1p = NULL; + bool any_dirty = false; + s_time_t now; /* Iterate over VRAM to track dirty bits. */ for ( i = 0; i < nr_frames; i++ ) @@ -1174,16 +1174,20 @@ int shadow_track_dirty_vram(struct domai if ( dirty ) { dirty_vram->dirty_bitmap[i / 8] |= 1 << (i % 8); - dirty_vram->last_dirty = NOW(); + any_dirty = true; } } + now = NOW(); + if ( any_dirty ) + dirty_vram->last_dirty = now; + if ( map_sl1p ) unmap_domain_page(map_sl1p); memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); memset(dirty_vram->dirty_bitmap, 0, dirty_size); - if ( dirty_vram->last_dirty + SECONDS(2) < NOW() ) + if ( dirty_vram->last_dirty + SECONDS(2) < now ) { /* * Was clean for more than two seconds, try to disable guest @@ -1216,6 +1220,7 @@ int shadow_track_dirty_vram(struct domai paging_lock(d); for ( i = 0; i < dirty_size; i++ ) dirty_vram->dirty_bitmap[i] |= dirty_bitmap[i]; + dirty_vram->last_dirty = NOW(); paging_unlock(d); rc = -EFAULT; } From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:50:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:50:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219426.1528312 (Exim 4.92) (envelope-from ) id 1vnJbp-0006bm-2U; Tue, 03 Feb 2026 16:50:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219426.1528312; Tue, 03 Feb 2026 16:50:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJbo-0006bf-Vr; Tue, 03 Feb 2026 16:50:36 +0000 Received: by outflank-mailman (input) for mailman id 1219426; Tue, 03 Feb 2026 16:50:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJbo-0006bJ-0k for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 16:50:36 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 74e040b3-0120-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 17:50:33 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4801ea9bafdso26650015e9.3 for ; Tue, 03 Feb 2026 08:50:33 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 08:50:33 -0800 (PST) Message-ID: <38581c16-e2a0-4f7e-a08a-3517063a27cc@suse.com> Date: Tue, 3 Feb 2026 17:50:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 3/3] x86/shadow: reduce flush_tlb's scope in shadow_track_dirty_vram() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit It's set only in the main "else", so the declaration as well as the sole consumer can also move into that more narrow scope. This may in particular help with possible future locking changes. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -1022,7 +1022,6 @@ int shadow_track_dirty_vram(struct domai int rc = 0; unsigned long end_pfn = begin_pfn + nr_frames; unsigned int dirty_size = DIV_ROUND_UP(nr_frames, BITS_PER_BYTE); - int flush_tlb = 0; unsigned long i; p2m_type_t t; struct sh_dirty_vram *dirty_vram; @@ -1097,7 +1096,7 @@ int shadow_track_dirty_vram(struct domai { mfn_t map_mfn = INVALID_MFN; void *map_sl1p = NULL; - bool any_dirty = false; + bool any_dirty = false, flush_tlb = false; s_time_t now; /* Iterate over VRAM to track dirty bits. */ @@ -1158,7 +1157,7 @@ int shadow_track_dirty_vram(struct domai * _PAGE_ACCESSED set by another processor. */ l1e_remove_flags(*sl1e, _PAGE_DIRTY); - flush_tlb = 1; + flush_tlb = true; } } break; @@ -1201,9 +1200,10 @@ int shadow_track_dirty_vram(struct domai } dirty_vram->last_dirty = -1; } + + if ( flush_tlb ) + guest_flush_tlb_mask(d, d->dirty_cpumask); } - if ( flush_tlb ) - guest_flush_tlb_mask(d, d->dirty_cpumask); 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: myBumqaQDmyr5P/gC7xJs59bJybqEsIHRNn33uQdTzMqGkJUfIqsDcCi55LM7e3KgTmsL0u7jhucF3uZUz/3zYFtFwrIzmYyNx1bPlX9wSjqJgMckFbYyIAKDuW7gV3fpXXRf7Xx0vmqk4t6k8ntkbDX79Lk1h79vMn97iGkvbtm8X4FVTqa0DoRosO3lj66pr5woYDMAD6+kvH/+WRyf266b3wMlhp+t5+qnSQspaxHzxXdcEEYPg7l/IdhSbN10Aquniyy1g6AgY5rs/PbBf4gSWiDtMFA7hAWEmLbwl6kJrQ9waOXTjZxemhfPs7iXR7pl8rnk3kga12hfu9plg7JRrl4VuqjGzAVzus7nGbieF8S3JAN2wuROlaWI94f+m/4pCXjfzlMQSoTfLJ3Bo+vUxQCND8UceHtUxx1GemQ/aUgtKJdoUQdg5bZ44ly X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2026 16:52:22.9208 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3a12eddd-675c-4e9a-f2ab-08de63449a43 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF0003922F.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB7943 Hi Mykyta, > On 13 Jan 2026, at 09:45, Mykyta Poturai wrote: >=20 > Currently on Arm the desc->affinity mask of an irq is never updated, > which makes it hard to know the actual affinity of an interrupt. >=20 > Fix this by updating the field in irq_set_affinity. You are changing the generic irq_set_affinity which now requires the irq descriptor to be locked. This is good because it puts arm at an equivalent state than x86 one. By doing a quick check there might be places where you forgot to add the lock/unlock: vgic/vgic.c line 826 (arch_move_irqs) vgic/vgic-mmio-v2.c line 173 (vgic_mmio_write_target) both of them take the irq lock but not the desc lock as far as i can see. Cheers Bertrand >=20 > Signed-off-by: Mykyta Poturai >=20 > --- > v4->v5: > * add locking >=20 > v3->v4: > * patch introduced > --- > xen/arch/arm/gic-vgic.c | 2 ++ > xen/arch/arm/irq.c | 9 +++++++-- > xen/arch/arm/vgic.c | 14 ++++++++++++-- > 3 files changed, 21 insertions(+), 4 deletions(-) >=20 > diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c > index ea48c5375a..5253caf002 100644 > --- a/xen/arch/arm/gic-vgic.c > +++ b/xen/arch/arm/gic-vgic.c > @@ -232,7 +232,9 @@ static void gic_update_one_lr(struct vcpu *v, int i) > if ( test_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) ) > { > struct vcpu *v_target =3D vgic_get_target_vcpu(v, irq); > + spin_lock(&p->desc->lock); > irq_set_affinity(p->desc, cpumask_of(v_target->processor)= ); > + spin_unlock(&p->desc->lock); > clear_bit(GIC_IRQ_GUEST_MIGRATING, &p->status); > } > } > diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c > index 73e58a5108..7204bc2b68 100644 > --- a/xen/arch/arm/irq.c > +++ b/xen/arch/arm/irq.c > @@ -216,10 +216,15 @@ static inline struct domain *irq_get_domain(struct = irq_desc *desc) > return irq_get_guest_info(desc)->d; > } >=20 > +/* Must be called with desc->lock held */ > void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask) > { > - if ( desc !=3D NULL ) > - desc->handler->set_affinity(desc, mask); > + if ( desc =3D=3D NULL ) > + return; > + > + ASSERT(spin_is_locked(&desc->lock)); > + cpumask_copy(desc->affinity, mask); > + desc->handler->set_affinity(desc, mask); > } >=20 > int request_irq(unsigned int irq, unsigned int irqflags, > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 6647071ad4..c59f6873db 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -445,7 +445,9 @@ bool vgic_migrate_irq(struct vcpu *old, struct vcpu *= new, unsigned int irq) >=20 > if ( list_empty(&p->inflight) ) > { > + spin_lock(&p->desc->lock); > irq_set_affinity(p->desc, cpumask_of(new->processor)); > + spin_unlock(&p->desc->lock); > spin_unlock_irqrestore(&old->arch.vgic.lock, flags); > return true; > } > @@ -453,7 +455,9 @@ bool vgic_migrate_irq(struct vcpu *old, struct vcpu *= new, unsigned int irq) > if ( !list_empty(&p->lr_queue) ) > { > vgic_remove_irq_from_queues(old, p); > + spin_lock(&p->desc->lock); > irq_set_affinity(p->desc, cpumask_of(new->processor)); > + spin_unlock(&p->desc->lock); > spin_unlock_irqrestore(&old->arch.vgic.lock, flags); > vgic_inject_irq(new->domain, new, irq, true); > return true; > @@ -473,6 +477,7 @@ void arch_move_irqs(struct vcpu *v) > struct domain *d =3D v->domain; > struct pending_irq *p; > struct vcpu *v_target; > + unsigned long flags; > int i; >=20 > /* > @@ -494,7 +499,13 @@ void arch_move_irqs(struct vcpu *v) > p =3D irq_to_pending(v_target, virq); >=20 > if ( v_target =3D=3D v && !test_bit(GIC_IRQ_GUEST_MIGRATING, &p->= status) ) > + { > + if ( !p->desc ) > + continue; > + spin_lock_irqsave(&p->desc->lock, flags); > irq_set_affinity(p->desc, cpu_mask); > + spin_unlock_irqrestore(&p->desc->lock, flags); > + } > } > } >=20 > @@ -574,8 +585,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, uns= igned int n) > spin_unlock_irqrestore(&v_target->arch.vgic.lock, flags); > if ( p->desc !=3D NULL ) > { > - irq_set_affinity(p->desc, cpumask_of(v_target->processor)); > spin_lock_irqsave(&p->desc->lock, flags); > + irq_set_affinity(p->desc, cpumask_of(v_target->processor)); > /* > * The irq cannot be a PPI, we only support delivery of SPIs > * to guests. > @@ -944,4 +955,3 @@ void vgic_check_inflight_irqs_pending(struct vcpu *v,= unsigned int rank, uint32_ > * indent-tabs-mode: nil > * End: > */ > - > --=20 > 2.51.2 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:55:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:55:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219454.1528332 (Exim 4.92) (envelope-from ) id 1vnJgD-0007pv-UQ; Tue, 03 Feb 2026 16:55:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219454.1528332; Tue, 03 Feb 2026 16:55:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJgD-0007po-Qw; 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(Same again further down.) I didn't think that container_of(t, struct vcpu, arch.vtimer) would work (as arch.vtimer is embedded inside struct vcpu. Is my assumption correct that if it was arch->vtimer then it won't work?) ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 03 16:56:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 16:56:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219462.1528341 (Exim 4.92) (envelope-from ) id 1vnJhL-0008KY-5L; Tue, 03 Feb 2026 16:56:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219462.1528341; Tue, 03 Feb 2026 16:56:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJhL-0008KR-2q; Tue, 03 Feb 2026 16:56:19 +0000 Received: by outflank-mailman (input) for mailman id 1219462; Tue, 03 Feb 2026 16:56:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJhK-0008KJ-3K for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 16:56:18 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 415a91d8-0121-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 17:56:16 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso58860425e9.0 for ; Tue, 03 Feb 2026 08:56:16 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Xen therefore relies the virtual (SBI-based) timer. >> >> The virtual timer uses Xen's internal timer infrastructure and must be >> associated with the pCPU on which the vCPU is currently running so that >> timer events can be delivered efficiently. As a result, vtimer_ctx_switch_to() >> migrates the timer to the target pCPU when a vCPU is scheduled in. >> >> Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich Thanks. > > However, ... > >> --- a/xen/arch/riscv/include/asm/vtimer.h >> +++ b/xen/arch/riscv/include/asm/vtimer.h >> @@ -17,4 +17,7 @@ void vcpu_timer_destroy(struct vcpu *v); >> >> void vtimer_set_timer(struct vtimer *t, uint64_t ticks); >> >> +void vtimer_ctx_switch_from(struct vcpu *p); >> +void vtimer_ctx_switch_to(struct vcpu *n); > ... may I ask that you reconsider naming here? Both Arm and x86 have functions > where the prefix / infix is "ctxt", not just "ctx". Being able to find all by > grep-ing for e.g. ctxt_switch_from might be quite nice. Sure, I will do that, it makes sense. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:02:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:02:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219475.1528353 (Exim 4.92) (envelope-from ) id 1vnJnc-0001rY-R4; Tue, 03 Feb 2026 17:02:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219475.1528353; Tue, 03 Feb 2026 17:02:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJnc-0001rR-NL; Tue, 03 Feb 2026 17:02:48 +0000 Received: by outflank-mailman (input) for mailman id 1219475; Tue, 03 Feb 2026 17:02:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnJnb-0001rL-70 for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:02:47 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 28a5084a-0122-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:02:44 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-432d2c96215so5573590f8f.3 for ; Tue, 03 Feb 2026 09:02:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 03 Feb 2026 09:02:44 -0800 (PST) Message-ID: <9f2b3559-0658-4343-abec-1a35e7d6da44@suse.com> Date: Tue, 3 Feb 2026 18:02:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 12/16] xen/riscv: introduce sbi_set_timer() To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <2fd4da2ad7c4af2241368edba739b24d0e976552.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2fd4da2ad7c4af2241368edba739b24d0e976552.1769099885.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/sbi.c > +++ b/xen/arch/riscv/sbi.c > @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, > unsigned long arg4, > unsigned long arg5); > > +static int cf_check sbi_set_timer_v02(uint64_t stime_value) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, > +#ifdef CONFIG_RISCV_32 > + stime_value >> 32, > +#else > + 0, > +#endif > + 0, 0, 0, 0); > + > + return sbi_err_map_xen_errno(ret.error); > +} > + > +static int cf_check sbi_set_timer_v01(uint64_t stime_value) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, >From this name I'm judging version 0.1 is meant. How does this fit with ... > @@ -326,6 +358,14 @@ int __init sbi_init(void) > sbi_rfence = sbi_rfence_v02; > printk("SBI v0.2 RFENCE extension detected\n"); > } > + > + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) > + { > + sbi_set_timer = sbi_set_timer_v02; > + printk("SBI v0.2 TIME extension detected\n"); > + } > + else > + sbi_set_timer = sbi_set_timer_v01; > } > else > panic("Ooops. SBI spec version 0.1 detected. Need to add support"); ... the panic() here? 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Tue, 03 Feb 2026 09:04:57 -0800 (PST) Message-ID: Date: Tue, 3 Feb 2026 18:04:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/16] xen/riscv: introduce basic vtimer infrastructure for guests To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <381c200edaff013d999c6314c20e8cc8bdb5b041.1769099885.git.oleksii.kurochko@gmail.com> <63655a5f-1259-43bb-914d-9e1a79638abb@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <63655a5f-1259-43bb-914d-9e1a79638abb@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.02.2026 17:55, Oleksii Kurochko wrote: > On 2/3/26 4:47 PM, Jan Beulich wrote: >> On 22.01.2026 17:47, Oleksii Kurochko wrote: >>> +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) >>> +{ >>> + struct arch_vcpu *avcpu = container_of(t, struct arch_vcpu, vtimer); >>> + struct vcpu *v = container_of(avcpu, struct vcpu, arch); >> Why two container_of() when one will do? (Same again further down.) > > I didn't think that container_of(t, struct vcpu, arch.vtimer) would work > (as arch.vtimer is embedded inside struct vcpu. Is my assumption correct that > if it was arch->vtimer then it won't work?) Please simply go look at the container_of() definition. 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Both point into the build tree. The two simply > shouldn't be glued together. >=20 > Note that the earlier >=20 > [ -d $(D)$(BOOT_DIR) ] || $(INSTALL_DIR) $(D)$(BOOT_DIR) >=20 > continues to be working fine, as BOOT_DIR continues to be controlled by > config/StdGNU.mk. Its DEBUG_DIR isn't taking effect anymore, when for the > hypervisor build it should. >=20 > And of course behavior now differs between building xen/ in a tree where > tools/ was built before vs in an otherwise clean tree. >=20 I cannot fully validate this but it seems to make sense so > Fixes: 82b9cc04a7c7 ("build: add make macro for making file from file.in"= ) > Signed-off-by: Jan Beulich Acked-by: Bertrand Marquis Cheers Bertrand > --- > This is clumsy, but I can't think of anything better. Suggestions anyone? >=20 > --- a/Config.mk > +++ b/Config.mk > @@ -162,7 +162,9 @@ endef > PATH_FILES :=3D Paths.mk > INC_FILES =3D $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f)) >=20 > +ifndef XEN_FULLVERSION > -include $(INC_FILES) > +endif >=20 > BUILD_MAKE_VARS =3D $(foreach f, $(PATH_FILES), $(shell awk '$$2 =3D=3D "= :=3D" { print $$1; }' $(XEN_ROOT)/config/$(f).in)) >=20 >=20 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:19:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:19:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219512.1528382 (Exim 4.92) (envelope-from ) id 1vnK3W-0005PC-En; Tue, 03 Feb 2026 17:19:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219512.1528382; Tue, 03 Feb 2026 17:19:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnK3W-0005P5-Bz; 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Date: Tue, 3 Feb 2026 18:19:03 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Stewart Hildebrand Subject: Re: [PATCH v3 5/6] x86/PCI: avoid re-evaluation of extended config space accessibility Message-ID: References: <1bcdd2dd-9b2b-4eb2-a569-e28b03c1e1fb@suse.com> <4913d9b3-03ec-443e-b908-a1531dca6699@suse.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <4913d9b3-03ec-443e-b908-a1531dca6699@suse.com> X-ClientProxiedBy: MR2P264CA0168.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:1::31) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|DS4PR03MB8374:EE_ X-MS-Office365-Filtering-Correlation-Id: 0c338bdc-e154-4374-daaf-08de63485649 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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MCFG Table Description > > > > The MCFG table is an ACPI table that is used to communicate the base > > addresses corresponding to the non-hot removable PCI Segment Groups > > range within a PCI Segment Group available to the operating system at > > boot. > > > > [...] > > > > 4.1.3. The _CBA Method > > > > Some systems may support hot plug of host bridges that introduce > > either a range of buses within an existing PCI Segment Group or > > introduce a new PCI Segment Group. For example, each I/O chip in a > > multi-chip PCI Express root complex implementation could start a new > > PCI Segment Group." > > > > Together with this: > > > > "The MCFG table format allows for more than one memory mapped base > > address entry provided each entry (memory mapped configuration space > > base address allocation structure) corresponds to a unique PCI Segment > > Group consisting of 256 PCI buses. Multiple entries corresponding to a > > single PCI Segment Group is not allowed." > > > > Given that each segment group can only appear once in the MCFG, and > > that the _CBA method can introduce new segment groups, it would seem > > to me the spec does allow for new segments appearing exclusively as > > the return of _CBA method? It does read as if hot-removable segment > > groups must not appear in the MCFG table. I'm not finding any clear > > statement in the spec that says that ECAM areas must previously appear > > in the MCFG table. > > > > I'm not sure how common that is, but it doesn't seem impossible given > > my reading of the spec. > > Hmm, that'll be a bit of work then, as Dom0 will also need to propagate > the necessary data into Xen. TBH this is what the spec says, but I've never encountered such a system. In fact I've never tested hotplug of a PCI host bridge. Not sure this can be simulated with QEMU so that we could at least test whatever fixes we plan to do in that area? I guess we could "fake" a bodge where Xen ignores the MCFG completely and only becomes aware of the ECAM areas from what the hardware domain reports back. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219537.1528401 (Exim 4.92) (envelope-from ) id 1vnKMQ-0000eU-6J; Tue, 03 Feb 2026 17:38:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219537.1528401; Tue, 03 Feb 2026 17:38:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMQ-0000eN-3Q; Tue, 03 Feb 2026 17:38:46 +0000 Received: by outflank-mailman (input) for mailman id 1219537; Tue, 03 Feb 2026 17:38:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMO-0000KW-Ml for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:44 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 2fa3276b-0127-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 18:38:44 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 32C8C497; Tue, 3 Feb 2026 09:38:37 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 904F73F632; Tue, 3 Feb 2026 09:38:42 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2fa3276b-0127-11f1-b161-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 02/12] xen/arm: ffa: Fix MEM_SHARE NS attribute handling Date: Tue, 3 Feb 2026 18:37:57 +0100 Message-ID: <9886df295f4c4365668576cc956299ee36f36c8b.1770115301.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The FF-A memory attribute encoding is currently a literal value (0x2f), which makes reviews and validation harder. In addition, MEM_SHARE accepts the NS (non-secure) attribute bit even though the normal world must not set it according to FF-A specification. Introduce named attribute bit masks and express FFA_NORMAL_MEM_REG_ATTR in terms of them for clarity. Reject MEM_SHARE descriptors with the NS bit set, returning INVALID_PARAMETERS to match FF-A v1.1 rules that prohibit normal world from setting this bit. Functional impact: MEM_SHARE now rejects descriptors with NS bit set, which were previously accepted but violate FF-A specification. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_private.h | 17 ++++++++++++++++- xen/arch/arm/tee/ffa_shm.c | 6 ++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index cd7ecabc7eff..b625f1c72914 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -129,11 +129,26 @@ #define FFA_HANDLE_HYP_FLAG BIT(63, ULL) #define FFA_HANDLE_INVALID 0xffffffffffffffffULL +/* NS attribute was introduced in v1.1 */ +#define FFA_MEM_ATTR_NS BIT(6, U) + +#define FFA_MEM_ATTR_TYPE_DEV (1U << 3) +#define FFA_MEM_ATTR_TYPE_MEM (2U << 4) + +#define FFA_MEM_ATTR_NC (1U << 2) +#define FFA_MEM_ATTR_WB (3U << 2) + +#define FFA_MEM_ATTR_NON_SHARE (0U) +#define FFA_MEM_ATTR_OUT_SHARE (2U) +#define FFA_MEM_ATTR_INN_SHARE (3U) + /* * Memory attributes: Normal memory, Write-Back cacheable, Inner shareable * Defined in FF-A-1.1-REL0 Table 10.18 at page 175. */ -#define FFA_NORMAL_MEM_REG_ATTR 0x2fU +#define FFA_NORMAL_MEM_REG_ATTR (FFA_MEM_ATTR_TYPE_MEM | \ + FFA_MEM_ATTR_WB | \ + FFA_MEM_ATTR_INN_SHARE) /* * Memory access permissions: Read-write * Defined in FF-A-1.1-REL0 Table 10.15 at page 168. diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 8282bacf85d3..90800e44a86a 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -512,6 +512,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( ret ) goto out_unlock; + if ( trans.mem_reg_attr & FFA_MEM_ATTR_NS ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + if ( trans.mem_reg_attr != FFA_NORMAL_MEM_REG_ATTR ) { ret = FFA_RET_NOT_SUPPORTED; -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219538.1528412 (Exim 4.92) (envelope-from ) id 1vnKMR-0000sG-Dz; Tue, 03 Feb 2026 17:38:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219538.1528412; Tue, 03 Feb 2026 17:38:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMR-0000s6-9V; Tue, 03 Feb 2026 17:38:47 +0000 Received: by outflank-mailman (input) for mailman id 1219538; Tue, 03 Feb 2026 17:38:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMP-0000Zt-EA for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:45 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 2edc0ddb-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:43 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C66EC339; Tue, 3 Feb 2026 09:38:35 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 281583F632; Tue, 3 Feb 2026 09:38:41 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2edc0ddb-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 01/12] xen/arm: ffa: Add endpoint lookup helper Date: Tue, 3 Feb 2026 18:37:56 +0100 Message-ID: X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Direct messaging paths duplicate endpoint validation and RCU domain lookup logic across multiple call sites, which makes the checks easy to drift and complicates maintenance. Introduce ffa_endpoint_domain_lookup() to centralize this logic. The helper validates the endpoint ID (rejecting ID 0 for the hypervisor), performs RCU domain lookup, ensures the domain is live and has an initialized FF-A context with a negotiated version, and returns the domain locked via RCU. Switch ffa_msg_send2_vm() to use the helper, replacing its open-coded validation sequence. This consolidates approximately 20 lines of duplicated checks into a single call. No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 45 ++++++++++++++++++++++++++++++++++ xen/arch/arm/tee/ffa_msg.c | 24 +++--------------- xen/arch/arm/tee/ffa_private.h | 3 +++ 3 files changed, 51 insertions(+), 21 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index ed18e76080d0..6de2b9f8ac8e 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -433,6 +433,51 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) return true; } +/* + * Look up a domain by its FF-A endpoint ID and validate it's ready for FF-A. + * Returns FFA_RET_OK on success with domain locked via RCU. + * Caller must call rcu_unlock_domain() when done. + * + * Validates: + * - endpoint_id is not 0 (the hypervisor) + * - domain exists and is live + * - domain has FF-A context initialized + * - domain has negotiated an FF-A version + */ +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, + struct ffa_ctx **ctx_out) +{ + struct domain *d; + struct ffa_ctx *ctx; + int err; + + if ( endpoint_id == 0 ) + return FFA_RET_INVALID_PARAMETERS; + + err = rcu_lock_live_remote_domain_by_id(endpoint_id - 1, &d); + if ( err ) + return FFA_RET_INVALID_PARAMETERS; + + if ( !d->arch.tee ) + { + rcu_unlock_domain(d); + return FFA_RET_INVALID_PARAMETERS; + } + + ctx = d->arch.tee; + if ( !ACCESS_ONCE(ctx->guest_vers) ) + { + rcu_unlock_domain(d); + return FFA_RET_INVALID_PARAMETERS; + } + + *d_out = d; + if ( ctx_out ) + *ctx_out = ctx; + + return FFA_RET_OK; +} + static int ffa_domain_init(struct domain *d) { struct ffa_ctx *ctx; diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 4e26596461a9..10856fddcbc4 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -161,30 +161,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, struct ffa_part_msg_rxtx_1_2 *dst_msg; void *rx_buf; size_t rx_size; - int err; int32_t ret; - if ( dst_id == 0 ) - /* FF-A ID 0 is the hypervisor, this is not valid */ - return FFA_RET_INVALID_PARAMETERS; - /* This is also checking that dest is not src */ - err = rcu_lock_live_remote_domain_by_id(dst_id - 1, &dst_d); - if ( err ) - return FFA_RET_INVALID_PARAMETERS; - - if ( dst_d->arch.tee == NULL ) - { - ret = FFA_RET_INVALID_PARAMETERS; - goto out_unlock; - } - - dst_ctx = dst_d->arch.tee; - if ( !ACCESS_ONCE(dst_ctx->guest_vers) ) - { - ret = FFA_RET_INVALID_PARAMETERS; - goto out_unlock; - } + ret = ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); + if ( ret ) + return ret; /* This also checks that destination has set a Rx buffer */ ret = ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index 282c105f3bce..cd7ecabc7eff 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -437,6 +437,9 @@ int32_t ffa_partinfo_domain_init(struct domain *d); bool ffa_partinfo_domain_destroy(struct domain *d); void ffa_handle_partition_info_get(struct cpu_user_regs *regs); +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, + struct ffa_ctx **ctx_out); + bool ffa_rxtx_spmc_init(void); void ffa_rxtx_spmc_destroy(void); void *ffa_rxtx_spmc_rx_acquire(void); -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219533.1528392 (Exim 4.92) (envelope-from ) id 1vnKM9-0000Kj-Vj; Tue, 03 Feb 2026 17:38:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219533.1528392; Tue, 03 Feb 2026 17:38:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKM9-0000Kc-SA; Tue, 03 Feb 2026 17:38:29 +0000 Received: by outflank-mailman (input) for mailman id 1219533; Tue, 03 Feb 2026 17:38:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKM8-0000KW-G6 for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:28 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 25168f8e-0127-11f1-b161-2bf370ae4941; Tue, 03 Feb 2026 18:38:26 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6E49C339; Tue, 3 Feb 2026 09:38:19 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A22673F632; Tue, 3 Feb 2026 09:38:24 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 25168f8e-0127-11f1-b161-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 00/12] xen/arm: ffa: v1.2 improvements Date: Tue, 3 Feb 2026 18:37:55 +0100 Message-ID: X-Mailer: git-send-email 2.51.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series tightens Xen's FF-A mediator after the v1.2 enablement work, focusing on correctness, validation, and diagnostics while keeping existing v1.0/v1.1 guests working. Hardening and validation (Patches 1-3): 1) centralize endpoint lookup validation for messaging paths 2) reject NS MEM_SHARE attributes and name normal memory encoding 3) tighten MEM_SHARE page parsing with overflow/alignment checks FF-A 1.2 support (Patch 4): 4) accept 1.2 EMADs in MEM_SHARE and forward IMPDEF while allowing 1.1 layouts Correctness fixes (Patches 5-9): 5) avoid spurious SPMC RX releases on PARTINFO failures 6) align RX/TX map descriptor layout and return NO_MEMORY on map failures 7) deny RXTX_UNMAP while a VM owns the RX buffer and close the race 8) validate FFA_FEATURES properties and gate ABIs, with RX_ACQUIRE workaround 9) gate SEND2 SP support on RX_ACQUIRE Code quality and diagnostics (Patches 10-12): 10) reduce log noise and ratelimit expected failures 11) add MEM_SHARE page diagnostics for malformed ranges and mapping issues 12) add message parameter diagnostics for SEND2 and direct requests Backward compatibility: v1.0/v1.1 guests continue to use their ABI unchanged; v1.2 guests use EMADs and negotiated ABI features. The implementation passes the FF-A Architecture Compliance Suite. This serie was validated through gitlab-ci here: https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/tree/ffa-v12-improve/v1 Build pipeline for the serie: https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/pipelines/2303128986 Bertrand Marquis (12): xen/arm: ffa: Add endpoint lookup helper xen/arm: ffa: Fix MEM_SHARE NS attribute handling xen/arm: ffa: Harden shm page parsing xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors xen/arm: ffa: Fix PARTINFO RX release errors xen/arm: ffa: Fix RX/TX map layout and errors xen/arm: ffa: Fix RXTX_UNMAP ownership race xen/arm: ffa: Fix FFA_FEATURES validation xen/arm: ffa: Fix SEND2 SP support gating xen/arm: ffa: Reduce logging noise xen/arm: ffa: Add MEM_SHARE page diagnostics xen/arm: ffa: Add message parameter diagnostics xen/arch/arm/tee/ffa.c | 124 +++++++++++++++-- xen/arch/arm/tee/ffa_msg.c | 76 +++++++--- xen/arch/arm/tee/ffa_notif.c | 11 +- xen/arch/arm/tee/ffa_partinfo.c | 29 ++-- xen/arch/arm/tee/ffa_private.h | 33 ++++- xen/arch/arm/tee/ffa_rxtx.c | 84 +++++++++-- xen/arch/arm/tee/ffa_shm.c | 240 ++++++++++++++++++++++++-------- 7 files changed, 479 insertions(+), 118 deletions(-) -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219539.1528423 (Exim 4.92) (envelope-from ) id 1vnKMT-0001B3-Mn; Tue, 03 Feb 2026 17:38:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219539.1528423; Tue, 03 Feb 2026 17:38:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMT-0001Au-Gp; Tue, 03 Feb 2026 17:38:49 +0000 Received: by outflank-mailman (input) for mailman id 1219539; Tue, 03 Feb 2026 17:38:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMR-0000Zt-Ow for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:47 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 3082c8e9-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:45 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A181C1063; Tue, 3 Feb 2026 09:38:38 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DE5CF3F632; Tue, 3 Feb 2026 09:38:43 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3082c8e9-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 03/12] xen/arm: ffa: Harden shm page parsing Date: Tue, 3 Feb 2026 18:37:58 +0100 Message-ID: <97a064c81ee5ea26774c189538f9f1e37dd3eebc.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit get_shm_pages() uses unchecked address arithmetic and does not enforce alignment, so malformed descriptors can cause overflow or slip through validation. The reclaim path also repeats handle-to-shm-mem conversion in multiple places, duplicating error handling. Harden page parsing and reclaim handling: - add ffa_safe_addr_add() and use it to detect address overflows - enforce alignment checks in get_shm_pages() and return FF-A errors - introduce ffa_secure_reclaim() and use it for MEM_RECLAIM and teardown - simplify ffa_mem_share() argument handling and allow max page count Functional impact: invalid or misaligned memory ranges now fail earlier with proper error codes; behavior for valid descriptors is unchanged. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_private.h | 11 +++++++ xen/arch/arm/tee/ffa_shm.c | 57 +++++++++++++++++----------------- 2 files changed, 40 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index b625f1c72914..58562d8e733c 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -632,4 +632,15 @@ static inline void ffa_uuid_set(struct ffa_uuid *id, uint32_t val0, id->val[1] = ((uint64_t)val3 << 32U) | val2; } +/* + * Common overflow-safe helper to verify that adding a number of pages to an + * address will not wrap around. + */ +static inline bool ffa_safe_addr_add(uint64_t addr, uint64_t pages) +{ + uint64_t off = pages * FFA_PAGE_SIZE; + + return (off / FFA_PAGE_SIZE) == pages && addr <= UINT64_MAX - off; +} + #endif /*__FFA_PRIVATE_H__*/ diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 90800e44a86a..4c0b45cde6ee 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -96,16 +96,14 @@ struct ffa_shm_mem { struct page_info *pages[]; }; -static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, - register_t addr, uint32_t pg_count, - uint64_t *handle) +static int32_t ffa_mem_share(uint32_t tot_len, uint64_t *handle) { struct arm_smccc_1_2_regs arg = { .a0 = FFA_MEM_SHARE_64, .a1 = tot_len, - .a2 = frag_len, - .a3 = addr, - .a4 = pg_count, + .a2 = tot_len, + .a3 = 0, + .a4 = 0, }; struct arm_smccc_1_2_regs resp; @@ -131,12 +129,16 @@ static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, } } -static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, - uint32_t flags) +static int32_t ffa_secure_reclaim(struct ffa_shm_mem *shm, uint32_t flags) { + register_t handle_hi; + register_t handle_lo; + if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) return FFA_RET_NOT_SUPPORTED; + uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); + return ffa_simple_call(FFA_MEM_RECLAIM, handle_lo, handle_hi, flags, 0); } @@ -145,7 +147,7 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, * this function fails then the caller is still expected to call * put_shm_pages() as a cleanup. */ -static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, +static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, const struct ffa_address_range *range, uint32_t range_count) { @@ -156,17 +158,26 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, p2m_type_t t; uint64_t addr; uint64_t page_count; + uint64_t gaddr; for ( n = 0; n < range_count; n++ ) { page_count = ACCESS_ONCE(range[n].page_count); addr = ACCESS_ONCE(range[n].address); + + if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) + return FFA_RET_INVALID_PARAMETERS; + for ( m = 0; m < page_count; m++ ) { if ( pg_idx >= shm->page_count ) return FFA_RET_INVALID_PARAMETERS; - gfn = gaddr_to_gfn(addr + m * FFA_PAGE_SIZE); + if ( !ffa_safe_addr_add(addr, m) ) + return FFA_RET_INVALID_PARAMETERS; + + gaddr = addr + m * FFA_PAGE_SIZE; + gfn = gaddr_to_gfn(gaddr); shm->pages[pg_idx] = get_page_from_gfn(d, gfn_x(gfn), &t, P2M_ALLOC); if ( !shm->pages[pg_idx] ) @@ -180,7 +191,7 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, /* The ranges must add up */ if ( pg_idx < shm->page_count ) - return FFA_RET_INVALID_PARAMETERS; + return FFA_RET_INVALID_PARAMETERS; return FFA_RET_OK; } @@ -198,15 +209,11 @@ static void put_shm_pages(struct ffa_shm_mem *shm) static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) { - bool ret = true; + bool ret = false; spin_lock(&ctx->lock); - if ( ctx->shm_count >= FFA_MAX_SHM_COUNT ) - { - ret = false; - } - else + if ( ctx->shm_count < FFA_MAX_SHM_COUNT ) { /* * If this is the first shm added, increase the domain reference @@ -217,6 +224,7 @@ static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) get_knownalive_domain(d); ctx->shm_count++; + ret = true; } spin_unlock(&ctx->lock); @@ -251,7 +259,7 @@ static struct ffa_shm_mem *alloc_ffa_shm_mem(struct domain *d, struct ffa_ctx *ctx = d->arch.tee; struct ffa_shm_mem *shm; - if ( page_count >= FFA_MAX_SHM_PAGE_COUNT ) + if ( page_count > FFA_MAX_SHM_PAGE_COUNT ) return NULL; if ( !inc_ctx_shm_count(d, ctx) ) return NULL; @@ -367,7 +375,7 @@ static int share_shm(struct ffa_shm_mem *shm) init_range(addr_range, pa); } - ret = ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle); + ret = ffa_mem_share(tot_len, &shm->handle); out: ffa_rxtx_spmc_tx_release(); @@ -637,8 +645,6 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags) struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; struct ffa_shm_mem *shm; - register_t handle_hi; - register_t handle_lo; int32_t ret; if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) @@ -652,8 +658,7 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags) if ( !shm ) return FFA_RET_INVALID_PARAMETERS; - uint64_to_regpair(&handle_hi, &handle_lo, handle); - ret = ffa_mem_reclaim(handle_lo, handle_hi, flags); + ret = ffa_secure_reclaim(shm, flags); if ( ret ) { @@ -677,11 +682,7 @@ bool ffa_shm_domain_destroy(struct domain *d) list_for_each_entry_safe(shm, tmp, &ctx->shm_list, list) { - register_t handle_hi; - register_t handle_lo; - - uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); - res = ffa_mem_reclaim(handle_lo, handle_hi, 0); + res = ffa_secure_reclaim(shm, 0); switch ( res ) { case FFA_RET_OK: printk(XENLOG_G_DEBUG "%pd: ffa: Reclaimed handle %#lx\n", -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219540.1528428 (Exim 4.92) (envelope-from ) id 1vnKMU-0001H8-3D; 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Tue, 3 Feb 2026 09:38:39 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5699A3F632; Tue, 3 Feb 2026 09:38:45 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 315067dd-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 04/12] xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors Date: Tue, 3 Feb 2026 18:37:59 +0100 Message-ID: X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FF-A 1.2 extends the endpoint memory access descriptor (EMAD) from 16 to 32 bytes, adding implementation-defined (IMPDEF) fields and reserved space. The MEM_SHARE path currently assumes the 1.1 EMAD size and rejects the 1.2 layout. Add FF-A 1.2 EMAD support to MEM_SHARE: - define ffa_mem_access_1_2 and store IMPDEF payload in ffa_shm_mem - emit 1.2 EMADs to the SPMC for FF-A 1.2 guests, forwarding IMPDEF - refactor header parsing into read_mem_transaction() for 1.0/1.1+ - detect EMAD format by mem_access_size to allow 1.1 on 1.2 guests Functional impact: MEM_SHARE supports FF-A 1.2 EMADs. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_shm.c | 108 +++++++++++++++++++++++++++++-------- 1 file changed, 86 insertions(+), 22 deletions(-) diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 4c0b45cde6ee..905a64e3db01 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -30,6 +30,14 @@ struct ffa_mem_access { uint64_t reserved; }; +/* Endpoint memory access descriptor (FF-A 1.2) */ +struct ffa_mem_access_1_2 { + struct ffa_mem_access_perm access_perm; + uint32_t region_offs; + uint8_t impdef[16]; + uint8_t reserved[8]; +}; + /* Lend, donate or share memory transaction descriptor */ struct ffa_mem_transaction_1_0 { uint16_t sender_id; @@ -73,7 +81,7 @@ struct ffa_mem_transaction_1_1 { /* * The parts needed from struct ffa_mem_transaction_1_0 or struct * ffa_mem_transaction_1_1, used to provide an abstraction of difference in - * data structures between version 1.0 and 1.1. This is just an internal + * data structures between version 1.0 and 1.2. This is just an internal * interface and can be changed without changing any ABI. */ struct ffa_mem_transaction_int { @@ -92,6 +100,8 @@ struct ffa_shm_mem { uint16_t sender_id; uint16_t ep_id; /* endpoint, the one lending */ uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ + /* Endpoint memory access descriptor IMPDEF value (FF-A 1.2). */ + uint64_t impdef[2]; unsigned int page_count; struct page_info *pages[]; }; @@ -297,17 +307,21 @@ static void init_range(struct ffa_address_range *addr_range, * This function uses the ffa_spmc tx buffer to transmit the memory transaction * descriptor. */ -static int share_shm(struct ffa_shm_mem *shm) +static int share_shm(struct ffa_shm_mem *shm, uint32_t ffa_vers) { const uint32_t max_frag_len = FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE; struct ffa_mem_access *mem_access_array; + struct ffa_mem_access_1_2 *mem_access_array_1_2; struct ffa_mem_transaction_1_1 *descr; struct ffa_address_range *addr_range; struct ffa_mem_region *region_descr; - const unsigned int region_count = 1; uint32_t frag_len; uint32_t tot_len; + uint32_t mem_access_size; + uint32_t mem_access_offs; + uint32_t region_offs; paddr_t last_pa; + uint32_t range_count; unsigned int n; paddr_t pa; int32_t ret; @@ -326,16 +340,35 @@ static int share_shm(struct ffa_shm_mem *shm) descr->handle = shm->handle; descr->mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR; descr->mem_access_count = 1; - descr->mem_access_size = sizeof(*mem_access_array); - descr->mem_access_offs = MEM_ACCESS_OFFSET(0); + if ( ffa_vers >= FFA_VERSION_1_2 ) + mem_access_size = sizeof(struct ffa_mem_access_1_2); + else + mem_access_size = sizeof(struct ffa_mem_access); + mem_access_offs = sizeof(struct ffa_mem_transaction_1_1); + region_offs = mem_access_offs + mem_access_size; + descr->mem_access_size = mem_access_size; + descr->mem_access_offs = mem_access_offs; - mem_access_array = buf + descr->mem_access_offs; - memset(mem_access_array, 0, sizeof(*mem_access_array)); - mem_access_array[0].access_perm.endpoint_id = shm->ep_id; - mem_access_array[0].access_perm.perm = FFA_MEM_ACC_RW; - mem_access_array[0].region_offs = REGION_OFFSET(descr->mem_access_count, 0); + if ( ffa_vers >= FFA_VERSION_1_2 ) + { + mem_access_array_1_2 = buf + mem_access_offs; + memset(mem_access_array_1_2, 0, sizeof(*mem_access_array_1_2)); + mem_access_array_1_2[0].access_perm.endpoint_id = shm->ep_id; + mem_access_array_1_2[0].access_perm.perm = FFA_MEM_ACC_RW; + mem_access_array_1_2[0].region_offs = region_offs; + memcpy(mem_access_array_1_2[0].impdef, shm->impdef, + sizeof(mem_access_array_1_2[0].impdef)); + } + else + { + mem_access_array = buf + mem_access_offs; + memset(mem_access_array, 0, sizeof(*mem_access_array)); + mem_access_array[0].access_perm.endpoint_id = shm->ep_id; + mem_access_array[0].access_perm.perm = FFA_MEM_ACC_RW; + mem_access_array[0].region_offs = region_offs; + } - region_descr = buf + mem_access_array[0].region_offs; + region_descr = buf + region_offs; memset(region_descr, 0, sizeof(*region_descr)); region_descr->total_page_count = shm->page_count; @@ -349,8 +382,9 @@ static int share_shm(struct ffa_shm_mem *shm) region_descr->address_range_count++; } - tot_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, - region_descr->address_range_count); + range_count = region_descr->address_range_count; + tot_len = region_offs + sizeof(*region_descr) + + range_count * sizeof(struct ffa_address_range); if ( tot_len > max_frag_len ) { ret = FFA_RET_NOT_SUPPORTED; @@ -358,7 +392,7 @@ static int share_shm(struct ffa_shm_mem *shm) } addr_range = region_descr->address_range_array; - frag_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, 1); + frag_len = region_offs + sizeof(*region_descr) + sizeof(*addr_range); last_pa = page_to_maddr(shm->pages[0]); init_range(addr_range, last_pa); for ( n = 1; n < shm->page_count; last_pa = pa, n++ ) @@ -448,6 +482,12 @@ static int read_mem_transaction(uint32_t ffa_vers, const void *buf, size_t blen, if ( size * count + offs > blen ) return FFA_RET_INVALID_PARAMETERS; + if ( size < sizeof(struct ffa_mem_access) ) + return FFA_RET_INVALID_PARAMETERS; + + if ( offs & 0xF ) + return FFA_RET_INVALID_PARAMETERS; + trans->mem_reg_attr = mem_reg_attr; trans->flags = flags; trans->mem_access_size = size; @@ -464,7 +504,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) uint64_t addr = get_user_reg(regs, 3); uint32_t page_count = get_user_reg(regs, 4); const struct ffa_mem_region *region_descr; - const struct ffa_mem_access *mem_access; + const struct ffa_mem_access_1_2 *mem_access; struct ffa_mem_transaction_int trans; struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; @@ -474,9 +514,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) register_t handle_hi = 0; register_t handle_lo = 0; int ret = FFA_RET_DENIED; + uint32_t ffa_vers; uint32_t range_count; uint32_t region_offs; uint16_t dst_id; + uint8_t perm; + uint64_t impdef[2]; if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) { @@ -515,8 +558,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( frag_len > tx_size ) goto out_unlock; - ret = read_mem_transaction(ACCESS_ONCE(ctx->guest_vers), tx_buf, - frag_len, &trans); + ffa_vers = ACCESS_ONCE(ctx->guest_vers); + ret = read_mem_transaction(ffa_vers, tx_buf, frag_len, &trans); if ( ret ) goto out_unlock; @@ -545,13 +588,35 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) goto out_unlock; } + if ( trans.mem_access_size < sizeof(struct ffa_mem_access) ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + /* Check that it fits in the supplied data */ if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) goto out_unlock; mem_access = tx_buf + trans.mem_access_offs; - dst_id = ACCESS_ONCE(mem_access->access_perm.endpoint_id); + perm = ACCESS_ONCE(mem_access->access_perm.perm); + region_offs = ACCESS_ONCE(mem_access->region_offs); + + /* + * FF-A 1.2 introduced an extended mem_access descriptor with impdef + * fields, but guests can still use the 1.1 format if they don't need + * implementation-defined data. Detect which format is used based on + * the mem_access_size field rather than the negotiated FF-A version. + */ + if ( trans.mem_access_size >= sizeof(struct ffa_mem_access_1_2) ) + memcpy(impdef, mem_access->impdef, sizeof(impdef)); + else + { + impdef[0] = 0; + impdef[1] = 0; + } + if ( !FFA_ID_IS_SECURE(dst_id) ) { /* we do not support sharing with VMs */ @@ -559,13 +624,11 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) goto out_unlock; } - if ( ACCESS_ONCE(mem_access->access_perm.perm) != FFA_MEM_ACC_RW ) + if ( perm != FFA_MEM_ACC_RW ) { ret = FFA_RET_NOT_SUPPORTED; goto out_unlock; } - - region_offs = ACCESS_ONCE(mem_access->region_offs); if ( sizeof(*region_descr) + region_offs > frag_len ) { ret = FFA_RET_NOT_SUPPORTED; @@ -590,6 +653,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) } shm->sender_id = trans.sender_id; shm->ep_id = dst_id; + memcpy(shm->impdef, impdef, sizeof(shm->impdef)); /* * Check that the Composite memory region descriptor fits. @@ -605,7 +669,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( ret ) goto out; - ret = share_shm(shm); + ret = share_shm(shm, ffa_vers); if ( ret ) goto out; -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219541.1528442 (Exim 4.92) (envelope-from ) id 1vnKMV-0001d6-Fr; Tue, 03 Feb 2026 17:38:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219541.1528442; Tue, 03 Feb 2026 17:38:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMV-0001cv-9J; Tue, 03 Feb 2026 17:38:51 +0000 Received: by outflank-mailman (input) for mailman id 1219541; Tue, 03 Feb 2026 17:38:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMU-0000Zt-5Q for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:50 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 321b6341-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:48 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 71FDA497; Tue, 3 Feb 2026 09:38:41 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BF6933F632; Tue, 3 Feb 2026 09:38:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 321b6341-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 05/12] xen/arm: ffa: Fix PARTINFO RX release errors Date: Tue, 3 Feb 2026 18:38:00 +0100 Message-ID: <2cb24d49d7c72bf15a101cc3be62b3cccbfce3d5.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On PARTITION_INFO_GET error paths, Xen unconditionally called FFA_RX_RELEASE for the SPMC RX buffer. If the SPMC didn't grant RX ownership (i.e., the call failed early), this issues a spurious release that returns DENIED and produces warnings. Modify ffa_rxtx_spmc_rx_release() to return the release status and let callers choose whether to log it. Only issue FFA_RX_RELEASE after a successful PARTINFO SMC, while always releasing the local RX lock to avoid deadlocks. Update handle_partition_info_get() to only release the SPMC RX buffer after successful fw_ret checks, and ignore release errors during the error path. Functional impact: eliminates spurious FFA_RX_RELEASE calls and associated DENIED warnings when PARTITION_INFO_GET fails before obtaining SPMC RX buffer ownership. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_partinfo.c | 14 ++++++++++++-- xen/arch/arm/tee/ffa_private.h | 2 +- xen/arch/arm/tee/ffa_rxtx.c | 14 +++++++++----- 3 files changed, 22 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index bf906ed0c88f..6b01c4abe915 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -92,9 +92,11 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, uint32_t dst_size) { int32_t ret; + int32_t release_ret; uint32_t src_size, real_sp_count; void *src_buf; uint32_t count = 0; + bool spmc_ok = false; /* We need to use the RX buffer to receive the list */ src_buf = ffa_rxtx_spmc_rx_acquire(); @@ -104,6 +106,7 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, ret = ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size); if ( ret ) goto out; + spmc_ok = true; /* Validate the src_size we got */ if ( src_size < sizeof(struct ffa_partition_info_1_0) || @@ -157,7 +160,10 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, *sp_count = count; out: - ffa_rxtx_spmc_rx_release(); + release_ret = ffa_rxtx_spmc_rx_release(spmc_ok); + if ( release_ret ) + gprintk(XENLOG_WARNING, + "ffa: Error releasing SPMC RX buffer: %d\n", release_ret); return ret; } @@ -507,6 +513,7 @@ bool ffa_partinfo_init(void) int32_t e; void *spmc_rx; struct ffa_uuid nil_uuid = { .val = { 0ULL, 0ULL } }; + bool spmc_ok = false; if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) || !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32)) @@ -522,6 +529,7 @@ bool ffa_partinfo_init(void) printk(XENLOG_ERR "ffa: Failed to get list of SPs: %d\n", e); goto out; } + spmc_ok = true; if ( count >= FFA_MAX_NUM_SP ) { @@ -533,7 +541,9 @@ bool ffa_partinfo_init(void) ret = init_subscribers(spmc_rx, count, fpi_size); out: - ffa_rxtx_spmc_rx_release(); + e = ffa_rxtx_spmc_rx_release(spmc_ok); + if ( e ) + printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n", e); return ret; } diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index 58562d8e733c..461e87f6f9c4 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -458,7 +458,7 @@ int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, bool ffa_rxtx_spmc_init(void); void ffa_rxtx_spmc_destroy(void); void *ffa_rxtx_spmc_rx_acquire(void); -void ffa_rxtx_spmc_rx_release(void); +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw); void *ffa_rxtx_spmc_tx_acquire(void); void ffa_rxtx_spmc_tx_release(void); diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index 7d8bb4f4d031..50758fb57cdf 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -375,18 +375,22 @@ void *ffa_rxtx_spmc_rx_acquire(void) return NULL; } -void ffa_rxtx_spmc_rx_release(void) +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw) { int32_t ret; ASSERT(spin_is_locked(&ffa_spmc_rx_lock)); - /* Inform the SPMC that we are done with our RX buffer */ - ret = ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); - if ( ret != FFA_RET_OK ) - printk(XENLOG_DEBUG "Error releasing SPMC RX buffer: %d\n", ret); + if ( notify_fw ) + { + /* Inform the SPMC that we are done with our RX buffer */ + ret = ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); + } + else + ret = FFA_RET_OK; spin_unlock(&ffa_spmc_rx_lock); + return ret; } void *ffa_rxtx_spmc_tx_acquire(void) -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219542.1528451 (Exim 4.92) (envelope-from ) id 1vnKMW-0001u3-Kv; Tue, 03 Feb 2026 17:38:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219542.1528451; Tue, 03 Feb 2026 17:38:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMW-0001tF-I5; Tue, 03 Feb 2026 17:38:52 +0000 Received: by outflank-mailman (input) for mailman id 1219542; Tue, 03 Feb 2026 17:38:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMV-0000Zt-9h for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:51 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 32eca68a-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:49 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6359339; Tue, 3 Feb 2026 09:38:42 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3ADB03F632; Tue, 3 Feb 2026 09:38:48 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 32eca68a-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 06/12] xen/arm: ffa: Fix RX/TX map layout and errors Date: Tue, 3 Feb 2026 18:38:01 +0100 Message-ID: X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FFA_RXTX_MAP builds a descriptor for the SPMC and the composite region offsets must be 8-byte aligned. Xen currently uses a 12-byte header size, which produces misaligned RX/TX offsets. Mapping failures also return INVALID_PARAMETERS even when the failure is due to resource exhaustion, which misreports the error condition. Round the descriptor header size up to 8 bytes before placing the RX region and derive the TX offset from the aligned RX offset. Return FFA_RET_NO_MEMORY when the TX or RX buffer mapping fails before the error paths unwind. Functional impact: RXTX_MAP now returns NO_MEMORY on mapping failures and the SPMC receives an aligned RX/TX descriptor layout. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_rxtx.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index 50758fb57cdf..eff95a7955d7 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -119,11 +119,17 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, tx = __map_domain_page_global(tx_pg); if ( !tx ) + { + ret = FFA_RET_NO_MEMORY; goto err_put_rx_pg; + } rx = __map_domain_page_global(rx_pg); if ( !rx ) + { + ret = FFA_RET_NO_MEMORY; goto err_unmap_tx; + } /* * Transmit the RX/TX buffer information to the SPM if acquire is supported @@ -136,7 +142,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, struct ffa_mem_region *mem_reg; /* All must fit in our TX buffer */ - BUILD_BUG_ON(sizeof(*rxtx_desc) + sizeof(*mem_reg) * 2 + + BUILD_BUG_ON(ROUNDUP(sizeof(*rxtx_desc), 8) + + sizeof(*mem_reg) * 2 + sizeof(struct ffa_address_range) * 2 > FFA_MAX_RXTX_PAGE_COUNT * FFA_PAGE_SIZE); @@ -153,8 +160,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, */ rxtx_desc->sender_id = ffa_get_vm_id(d); rxtx_desc->reserved = 0; - rxtx_desc->rx_region_offs = sizeof(*rxtx_desc); - rxtx_desc->tx_region_offs = sizeof(*rxtx_desc) + + rxtx_desc->rx_region_offs = ROUNDUP(sizeof(*rxtx_desc), 8); + rxtx_desc->tx_region_offs = rxtx_desc->rx_region_offs + offsetof(struct ffa_mem_region, address_range_array[1]); -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219545.1528461 (Exim 4.92) (envelope-from ) id 1vnKMY-0002Eg-Sd; Tue, 03 Feb 2026 17:38:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219545.1528461; Tue, 03 Feb 2026 17:38:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMY-0002EX-PG; Tue, 03 Feb 2026 17:38:54 +0000 Received: by outflank-mailman (input) for mailman id 1219545; Tue, 03 Feb 2026 17:38:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMX-0000Zt-5S for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:53 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 33bb85be-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:51 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 30E051063; Tue, 3 Feb 2026 09:38:44 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 89D673F632; Tue, 3 Feb 2026 09:38:49 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 33bb85be-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 07/12] xen/arm: ffa: Fix RXTX_UNMAP ownership race Date: Tue, 3 Feb 2026 18:38:02 +0100 Message-ID: <971bf27b9a2cafa0ed405a638a532b6fbbf51142.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit rxtx_unmap() checks RX ownership without holding the RX/TX locks and only enforces the ownership rule when FFA_RX_ACQUIRE is supported. This allows a vCPU to acquire RX between the check and unmap, and it lets RXTX_UNMAP proceed while RX is owned when buffers are not forwarded to firmware. Hold rx_lock/tx_lock across the ownership check and unmap, and deny RXTX_UNMAP whenever RX is owned, independent of RX_ACQUIRE support. For teardown, release RX ownership under the same lock window; use FFA_RX_RELEASE directly because rx_lock is held, and clear the local flag when the firmware path is unavailable. Functional impact: RXTX_UNMAP now reliably returns DENIED while RX is owned, and teardown releases/clears ownership without a race. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_rxtx.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index eff95a7955d7..450ce102cbdc 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -220,7 +220,7 @@ err_unlock_rxtx: return ret; } -static int32_t rxtx_unmap(struct domain *d) +static int32_t rxtx_unmap(struct domain *d, bool teardown) { struct ffa_ctx *ctx = d->arch.tee; int32_t ret = FFA_RET_OK; @@ -234,6 +234,36 @@ static int32_t rxtx_unmap(struct domain *d) goto err_unlock_rxtx; } + if ( !ctx->rx_is_free ) + { + if ( teardown ) + { + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) + { + int32_t rel_ret; + + /* Can't use ffa_rx_release() while holding rx_lock. */ + rel_ret = ffa_simple_call(FFA_RX_RELEASE, ctx->ffa_id, + 0, 0, 0); + if ( rel_ret ) + gdprintk(XENLOG_DEBUG, + "ffa: RX release during teardown failed: %d\n", + rel_ret); + else + ctx->rx_is_free = true; + } + else + ctx->rx_is_free = true; + } + else + { + gdprintk(XENLOG_DEBUG, + "ffa: RXTX_UNMAP denied, RX buffer owned by VM\n"); + ret = FFA_RET_DENIED; + goto err_unlock_rxtx; + } + } + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) { ret = ffa_rxtx_unmap(ffa_get_vm_id(d)); @@ -261,7 +291,7 @@ err_unlock_rxtx: int32_t ffa_handle_rxtx_unmap(void) { - return rxtx_unmap(current->domain); + return rxtx_unmap(current->domain, false); } int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) @@ -369,7 +399,7 @@ int32_t ffa_rxtx_domain_init(struct domain *d) void ffa_rxtx_domain_destroy(struct domain *d) { - rxtx_unmap(d); + rxtx_unmap(d, true); } void *ffa_rxtx_spmc_rx_acquire(void) -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:38:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:38:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219549.1528473 (Exim 4.92) (envelope-from ) id 1vnKMa-0002U5-5x; Tue, 03 Feb 2026 17:38:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219549.1528473; Tue, 03 Feb 2026 17:38:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMa-0002TW-0H; Tue, 03 Feb 2026 17:38:56 +0000 Received: by outflank-mailman (input) for mailman id 1219549; Tue, 03 Feb 2026 17:38:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMY-0000Zt-Pm for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:54 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 347a7422-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:52 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7201A150C; Tue, 3 Feb 2026 09:38:45 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D84193F632; Tue, 3 Feb 2026 09:38:50 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 347a7422-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 08/12] xen/arm: ffa: Fix FFA_FEATURES validation Date: Tue, 3 Feb 2026 18:38:03 +0100 Message-ID: <5331b33343441028d10c290b21b82acce295fff0.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FFA_FEATURES currently accepts non-zero input properties (w2-w7) from guests and advertises several ABIs unconditionally, even when firmware support is missing or when the ABI is physical-instance-only. This can mislead guests about what Xen can actually provide and violates FF-A calling conventions. Some SPMCs (Hafnium v2.14 or earlier) also fail to report FFA_RX_ACQUIRE despite supporting it. Update FFA_FEATURES validation to match spec and firmware support: - reject non-zero w2-w7 input properties with INVALID_PARAMETERS - reject 64-bit calling conventions from 32-bit guests with NOT_SUPPORTED - return NOT_SUPPORTED for physical-instance-only ABIs (FFA_NOTIFICATION_BITMAP_{CREATE,DESTROY}, FFA_RX_ACQUIRE) - advertise FFA_INTERRUPT as supported - gate message ABIs on firmware support: - FFA_MSG_SEND_DIRECT_REQ_{32,64} - FFA_MSG_SEND_DIRECT_REQ2 (also requires FF-A 1.2 negotiation) - FFA_MSG_SEND2 (or VM-to-VM enabled) - report MEM_SHARE_{32,64} only when FFA_MEM_SHARE_64 is supported - stop advertising FFA_MSG_YIELD (not implemented) Update firmware probing: drop FFA_MEM_SHARE_32 checks (deprecated) and add FFA_RX_ACQUIRE to the probed set. If FFA_MSG_SEND2 is reported but FFA_RX_ACQUIRE is not, assume RX_ACQUIRE support and warn to work around the Hafnium bug. Functional impact: guests now see ABI support that reflects firmware capabilities and Xen implementation status. When SEND2 is present but RX_ACQUIRE is not reported, Xen assumes RX_ACQUIRE support. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 62 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 55 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 6de2b9f8ac8e..e9e020bb0cb3 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -91,10 +91,10 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = { FW_ABI(FFA_PARTITION_INFO_GET), FW_ABI(FFA_NOTIFICATION_INFO_GET_64), FW_ABI(FFA_NOTIFICATION_GET), + FW_ABI(FFA_RX_ACQUIRE), FW_ABI(FFA_RX_RELEASE), FW_ABI(FFA_RXTX_MAP_64), FW_ABI(FFA_RXTX_UNMAP), - FW_ABI(FFA_MEM_SHARE_32), FW_ABI(FFA_MEM_SHARE_64), FW_ABI(FFA_MEM_RECLAIM), FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32), @@ -240,19 +240,39 @@ static void handle_features(struct cpu_user_regs *regs) struct ffa_ctx *ctx = d->arch.tee; unsigned int n; + /* + * Xen does not accept any non-zero FFA_FEATURES input properties from + * VMs. The spec only defines w2 input properties for FFA_MEM_RETRIEVE_REQ + * (NS-bit negotiation for SP/SPMC) and FFA_RXTX_MAP (buffer size and + * alignment), so w2 must be MBZ for our callers. + */ for ( n = 2; n <= 7; n++ ) { if ( get_user_reg(regs, n) ) { - ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + ffa_set_regs_error(regs, FFA_RET_INVALID_PARAMETERS); return; } } + if ( !is_64bit_domain(d) && smccc_is_conv_64(a1) ) + { + /* 32bit guests should only use 32bit convention calls */ + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + return; + } + switch ( a1 ) { + case FFA_NOTIFICATION_BITMAP_CREATE: + case FFA_NOTIFICATION_BITMAP_DESTROY: + case FFA_RX_ACQUIRE: + /* Physical-instance-only ABIs are not exposed to VMs. */ + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; case FFA_ERROR: case FFA_VERSION: + case FFA_INTERRUPT: case FFA_SUCCESS_32: case FFA_SUCCESS_64: case FFA_FEATURES: @@ -261,16 +281,25 @@ static void handle_features(struct cpu_user_regs *regs) case FFA_RXTX_UNMAP: case FFA_MEM_RECLAIM: case FFA_PARTITION_INFO_GET: + ffa_set_regs_success(regs, 0, 0); + break; case FFA_MSG_SEND_DIRECT_REQ_32: case FFA_MSG_SEND_DIRECT_REQ_64: - case FFA_MSG_SEND2: case FFA_RUN: - case FFA_INTERRUPT: - case FFA_MSG_YIELD: - ffa_set_regs_success(regs, 0, 0); + if ( ffa_fw_supports_fid(a1) ) + ffa_set_regs_success(regs, 0, 0); + else + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; + case FFA_MSG_SEND2: + if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + ffa_set_regs_success(regs, 0, 0); + else + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); break; case FFA_MSG_SEND_DIRECT_REQ2: - if ( ACCESS_ONCE(ctx->guest_vers) >= FFA_VERSION_1_2 ) + if ( ACCESS_ONCE(ctx->guest_vers) >= FFA_VERSION_1_2 && + ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ2) ) { ffa_set_regs_success(regs, 0, 0); } @@ -281,6 +310,11 @@ static void handle_features(struct cpu_user_regs *regs) break; case FFA_MEM_SHARE_64: case FFA_MEM_SHARE_32: + if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) + { + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; + } /* * We currently don't support dynamically allocated buffers. Report * that with 0 in bit[0] of w2. @@ -688,6 +722,20 @@ static bool ffa_probe_fw(void) ffa_fw_abi_needed[i].name); } + /* + * Hafnium v2.14 or earlier does not report FFA_RX_ACQUIRE in + * FFA_FEATURES even though it supports it. + */ + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) && + ffa_fw_supports_fid(FFA_MSG_SEND2) ) + { + printk(XENLOG_WARNING + "ARM FF-A Firmware reports FFA_MSG_SEND2 without FFA_RX_ACQUIRE\n"); + printk(XENLOG_WARNING + "ffa: assuming RX_ACQUIRE support (workaround)\n"); + set_bit(FFA_ABI_BITNUM(FFA_RX_ACQUIRE), ffa_fw_abi_supported); + } + if ( !ffa_rxtx_spmc_init() ) { printk(XENLOG_ERR "ffa: Error during RXTX buffer init\n"); -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:47:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:47:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219609.1528483 (Exim 4.92) (envelope-from ) id 1vnKUm-00065c-BP; Tue, 03 Feb 2026 17:47:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219609.1528483; Tue, 03 Feb 2026 17:47:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKUm-00065V-5y; Tue, 03 Feb 2026 17:47:24 +0000 Received: by outflank-mailman (input) for mailman id 1219609; Tue, 03 Feb 2026 17:47:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMb-0000Zt-QJ for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:57 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 3616fea1-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:54 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 33F89339; Tue, 3 Feb 2026 09:38:48 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 76D9F3F632; Tue, 3 Feb 2026 09:38:53 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3616fea1-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 10/12] xen/arm: ffa: Reduce logging noise Date: Tue, 3 Feb 2026 18:38:05 +0100 Message-ID: <38d71ac53abeeb4598d6ffb6bdab3717b3531334.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Several FF-A paths log warnings for expected or recoverable conditions, leading to noisy logs during normal operation. Reduce log noise by: - demoting unhandled FID warnings to debug - ratelimiting notification and VM teardown failures - printing the bit-15 convention warning once per boot - adjusting log prefixes for hypervisor-only events - adding debug diagnostics for RX/TX acquire failures, with busy cases ratelimited No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 11 ++++++----- xen/arch/arm/tee/ffa_notif.c | 11 ++++++----- xen/arch/arm/tee/ffa_partinfo.c | 15 ++++++++------- xen/arch/arm/tee/ffa_rxtx.c | 21 +++++++++++++++++++-- 4 files changed, 39 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index a46c6e5e67f1..d0b9c9f1ab2e 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -461,7 +461,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) break; default: - gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); + gdprintk(XENLOG_DEBUG, "ffa: unhandled fid 0x%x\n", fid); e = FFA_RET_NOT_SUPPORTED; break; } @@ -581,7 +581,8 @@ static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time) if ( retry ) { - printk(XENLOG_G_INFO "%pd: ffa: Remaining cleanup, retrying\n", ctx->teardown_d); + printk(XENLOG_G_DEBUG "%pd: ffa: Remaining cleanup, retrying\n", + ctx->teardown_d); ctx->teardown_expire = NOW() + FFA_CTX_TEARDOWN_DELAY; @@ -622,7 +623,7 @@ static void ffa_teardown_timer_callback(void *arg) if ( ctx ) ffa_domain_teardown_continue(ctx, false /* !first_time */); else - printk(XENLOG_G_ERR "%s: teardown list is empty\n", __func__); + printk(XENLOG_ERR "%s: teardown list is empty\n", __func__); } /* This function is supposed to undo what ffa_domain_init() has done */ @@ -684,7 +685,7 @@ static bool ffa_probe_fw(void) if ( !ffa_get_version(&vers) ) { - gprintk(XENLOG_ERR, "Cannot retrieve the FFA version\n"); + printk(XENLOG_ERR "ffa: Cannot retrieve the FFA version\n"); goto err_no_fw; } @@ -724,7 +725,7 @@ static bool ffa_probe_fw(void) set_bit(FFA_ABI_BITNUM(ffa_fw_abi_needed[i].id), ffa_fw_abi_supported); else - printk(XENLOG_INFO "ARM FF-A Firmware does not support %s\n", + printk(XENLOG_WARNING "ARM FF-A Firmware does not support %s\n", ffa_fw_abi_needed[i].name); } diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c index 37b05747cd21..186e72641237 100644 --- a/xen/arch/arm/tee/ffa_notif.c +++ b/xen/arch/arm/tee/ffa_notif.c @@ -292,8 +292,9 @@ static void notif_vm_pend_intr(uint16_t vm_id) break; } } - if ( !v ) - printk(XENLOG_ERR "ffa: can't inject NPI, all vCPUs offline\n"); + if ( !v && printk_ratelimit() ) + printk(XENLOG_G_DEBUG "%pd: ffa: can't inject NPI, all vCPUs offline\n", + d); out_unlock: rcu_unlock_domain(d); @@ -316,9 +317,9 @@ static void notif_sri_action(void *unused) res = ffa_get_ret_code(&resp); if ( res ) { - if ( res != FFA_RET_NO_DATA ) - printk(XENLOG_ERR "ffa: notification info get failed: error %d\n", - res); + if ( res != FFA_RET_NO_DATA && printk_ratelimit() ) + printk(XENLOG_WARNING + "ffa: notification info get failed: error %d\n", res); return; } diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index 6b01c4abe915..c9f186b3720c 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -461,9 +461,11 @@ static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_size) */ if ( !FFA_ID_IS_SECURE(fpi->id) ) { - printk(XENLOG_ERR "ffa: Firmware is not using bit 15 convention for IDs !!\n" - "ffa: Secure partition with id 0x%04x cannot be used\n", - fpi->id); + printk_once(XENLOG_ERR + "ffa: Firmware is not using bit 15 convention for IDs !!\n"); + printk(XENLOG_ERR + "ffa: Secure partition with id 0x%04x cannot be used\n", + fpi->id); } else { @@ -632,11 +634,10 @@ bool ffa_partinfo_domain_destroy(struct domain *d) res = ffa_direct_req_send_vm(subscr_vm_destroyed[n], ffa_get_vm_id(d), FFA_MSG_SEND_VM_DESTROYED); - if ( res ) - { - printk(XENLOG_ERR "%pd: ffa: Failed to report destruction of vm_id %u to %u: res %d\n", + if ( res && printk_ratelimit() ) + printk(XENLOG_WARNING + "%pd: ffa: Failed to report destruction of vm_id %u to %u: res %d\n", d, ffa_get_vm_id(d), subscr_vm_destroyed[n], res); - } /* * For these two error codes the hypervisor is expected to resend diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index 450ce102cbdc..3147aba21ddf 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -82,8 +83,9 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, if ( page_count > FFA_MAX_RXTX_PAGE_COUNT || !page_count ) { - printk(XENLOG_ERR "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n", - page_count, FFA_MAX_RXTX_PAGE_COUNT); + gdprintk(XENLOG_DEBUG, + "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n", + page_count, FFA_MAX_RXTX_PAGE_COUNT); return FFA_RET_INVALID_PARAMETERS; } @@ -303,12 +305,15 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) if ( !ctx->page_count ) { ret = FFA_RET_DENIED; + gdprintk(XENLOG_DEBUG, "ffa: RX acquire denied, no RX/TX mapped\n"); goto out; } if ( !ctx->rx_is_free ) { ret = FFA_RET_BUSY; + if ( printk_ratelimit() ) + gdprintk(XENLOG_DEBUG, "ffa: RX acquire busy\n"); goto out; } @@ -316,7 +321,10 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) { ret = ffa_simple_call(FFA_RX_ACQUIRE, ctx->ffa_id, 0, 0, 0); if ( ret != FFA_RET_OK ) + { + gdprintk(XENLOG_DEBUG, "ffa: RX acquire failed: %d\n", ret); goto out; + } } ctx->rx_is_free = false; *buf = ctx->rx; @@ -355,13 +363,22 @@ int32_t ffa_tx_acquire(struct ffa_ctx *ctx, const void **buf, size_t *buf_size) int32_t ret = FFA_RET_DENIED; if ( !spin_trylock(&ctx->tx_lock) ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire busy\n"); return FFA_RET_BUSY; + } if ( !ctx->page_count ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, no RX/TX mapped\n"); goto err_unlock; + } if ( !ctx->tx ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, TX buffer missing\n"); goto err_unlock; + } *buf = ctx->tx; *buf_size = ctx->page_count * FFA_PAGE_SIZE; -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:47:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:47:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219612.1528492 (Exim 4.92) (envelope-from ) id 1vnKUn-0006JD-Gp; Tue, 03 Feb 2026 17:47:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219612.1528492; Tue, 03 Feb 2026 17:47:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKUn-0006J6-Cj; Tue, 03 Feb 2026 17:47:25 +0000 Received: by outflank-mailman (input) for mailman id 1219612; Tue, 03 Feb 2026 17:47:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMe-0000Zt-R6 for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:39:00 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 36fa34b3-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:56 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 84871497; Tue, 3 Feb 2026 09:38:49 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E1D003F632; Tue, 3 Feb 2026 09:38:54 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 36fa34b3-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 11/12] xen/arm: ffa: Add MEM_SHARE page diagnostics Date: Tue, 3 Feb 2026 18:38:06 +0100 Message-ID: <94e10f14d499d7e584fb0fbdd28d0288bb5831bd.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MEM_SHARE failures in get_shm_pages() are silent, which makes malformed ranges and page mapping failures hard to diagnose. Add debug logging for page validation failures: - descriptor validation failures (unaligned, range short/overflow) - per-page mapping failures (unmapped GFN, wrong p2m type) - address overflow detection in range walks Ratelimit temporary reclaim failures and log permanent reclaim failures as errors. No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_shm.c | 73 ++++++++++++++++++++++++++++++++------ 1 file changed, 63 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 905a64e3db01..89161753e922 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -169,6 +169,12 @@ static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, uint64_t addr; uint64_t page_count; uint64_t gaddr; + int32_t ret = FFA_RET_OK; + const char *reason = NULL; + unsigned int bad_rg = 0; + unsigned int bad_pg = 0; + unsigned long bad_addr = 0; + p2m_type_t bad_t = p2m_invalid; for ( n = 0; n < range_count; n++ ) { @@ -176,34 +182,78 @@ static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, addr = ACCESS_ONCE(range[n].address); if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) - return FFA_RET_INVALID_PARAMETERS; + { + ret = FFA_RET_INVALID_PARAMETERS; + reason = "unaligned"; + bad_rg = n; + bad_addr = (unsigned long)addr; + goto out; + } for ( m = 0; m < page_count; m++ ) { if ( pg_idx >= shm->page_count ) - return FFA_RET_INVALID_PARAMETERS; + { + ret = FFA_RET_INVALID_PARAMETERS; + reason = "range overflow"; + bad_rg = n; + bad_pg = m; + goto out; + } if ( !ffa_safe_addr_add(addr, m) ) - return FFA_RET_INVALID_PARAMETERS; + { + ret = FFA_RET_INVALID_PARAMETERS; + reason = "addr overflow"; + bad_rg = n; + bad_pg = m; + bad_addr = (unsigned long)addr; + goto out; + } gaddr = addr + m * FFA_PAGE_SIZE; gfn = gaddr_to_gfn(gaddr); shm->pages[pg_idx] = get_page_from_gfn(d, gfn_x(gfn), &t, P2M_ALLOC); if ( !shm->pages[pg_idx] ) - return FFA_RET_DENIED; + { + ret = FFA_RET_DENIED; + reason = "gfn unmapped"; + bad_rg = n; + bad_pg = m; + bad_addr = (unsigned long)gaddr; + goto out; + } /* Only normal RW RAM for now */ if ( t != p2m_ram_rw ) - return FFA_RET_DENIED; + { + ret = FFA_RET_DENIED; + reason = "p2m type"; + bad_rg = n; + bad_pg = m; + bad_addr = (unsigned long)gaddr; + bad_t = t; + goto out; + } pg_idx++; } } /* The ranges must add up */ if ( pg_idx < shm->page_count ) - return FFA_RET_INVALID_PARAMETERS; + { + ret = FFA_RET_INVALID_PARAMETERS; + reason = "range short"; + bad_pg = pg_idx; + goto out; + } - return FFA_RET_OK; +out: + if ( ret ) + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: %s rg %u pg %u addr %#lx p2m %u\n", + reason ? reason : "unknown", bad_rg, bad_pg, bad_addr, bad_t); + return ret; } static void put_shm_pages(struct ffa_shm_mem *shm) @@ -759,8 +809,10 @@ bool ffa_shm_domain_destroy(struct domain *d) * A temporary error that may get resolved a bit later, it's * worth retrying. */ - printk(XENLOG_G_INFO "%pd: ffa: Failed to reclaim handle %#lx : %d\n", - d, shm->handle, res); + if ( printk_ratelimit() ) + printk(XENLOG_G_WARNING + "%pd: ffa: Failed to reclaim handle %#lx : %d\n", + d, shm->handle, res); break; /* We will retry later */ default: /* @@ -772,7 +824,8 @@ bool ffa_shm_domain_destroy(struct domain *d) * FFA_RET_NO_MEMORY might be a temporary error as it it could * succeed if retried later, but treat it as permanent for now. */ - printk(XENLOG_G_INFO "%pd: ffa: Permanent failure to reclaim handle %#lx : %d\n", + printk(XENLOG_G_ERR + "%pd: ffa: Permanent failure to reclaim handle %#lx : %d\n", d, shm->handle, res); /* -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:47:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:47:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219614.1528497 (Exim 4.92) (envelope-from ) id 1vnKUn-0006LY-Ok; Tue, 03 Feb 2026 17:47:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219614.1528497; Tue, 03 Feb 2026 17:47:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKUn-0006KU-Js; Tue, 03 Feb 2026 17:47:25 +0000 Received: by outflank-mailman (input) for mailman id 1219614; Tue, 03 Feb 2026 17:47:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMZ-0000Zt-Q7 for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:38:55 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 35442268-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BD3931063; Tue, 3 Feb 2026 09:38:46 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 27CF83F632; Tue, 3 Feb 2026 09:38:52 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 35442268-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 09/12] xen/arm: ffa: Fix SEND2 SP support gating Date: Tue, 3 Feb 2026 18:38:04 +0100 Message-ID: <9466059cffcae65acb96a6c3710778f2e9ebcbbd.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen only maps a VM RX/TX buffer into the SPMC when firmware supports FFA_RX_ACQUIRE. Without that mapping, the SPMC cannot access the VM TX buffer to relay FFA_MSG_SEND2 to a secure partition. Advertise FFA_MSG_SEND2 to guests only when VM-to-VM is enabled or when the firmware supports both FFA_MSG_SEND2 and FFA_RX_ACQUIRE, and reject SEND2 to a secure partition otherwise. Add comments to document the mapping/ownership dependency. Functional impact: SEND2 to a secure partition is reported as NOT_SUPPORTED when FFA_RX_ACQUIRE is absent. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 8 +++++++- xen/arch/arm/tee/ffa_msg.c | 11 +++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index e9e020bb0cb3..a46c6e5e67f1 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -292,7 +292,13 @@ static void handle_features(struct cpu_user_regs *regs) ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); break; case FFA_MSG_SEND2: - if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + /* + * Forwarding SEND2 to an SP requires the SPMC to see the VM TX buffer. + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is supported. + */ + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) || + (ffa_fw_supports_fid(FFA_MSG_SEND2) && + ffa_fw_supports_fid(FFA_RX_ACQUIRE)) ) ffa_set_regs_success(regs, 0, 0); else ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 10856fddcbc4..928f269f6c3a 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -274,6 +274,17 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = FFA_RET_NOT_SUPPORTED; goto out; } + /* + * The SPMC needs access to the VM TX buffer to relay SEND2. + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is supported. + */ + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) + { + ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 to SP requires RX_ACQUIRE\n"); + goto out; + } ret = ffa_simple_call(FFA_MSG_SEND2, ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0, 0, 0); -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 17:47:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 17:47:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219623.1528512 (Exim 4.92) (envelope-from ) id 1vnKUs-0006wL-Vf; Tue, 03 Feb 2026 17:47:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219623.1528512; Tue, 03 Feb 2026 17:47:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKUs-0006w6-RC; Tue, 03 Feb 2026 17:47:30 +0000 Received: by outflank-mailman (input) for mailman id 1219623; Tue, 03 Feb 2026 17:47:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnKMg-0000Zt-RN for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 17:39:02 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 37c46894-0127-11f1-9ccf-f158ae23cfc8; Tue, 03 Feb 2026 18:38:57 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DB4B6150C; Tue, 3 Feb 2026 09:38:50 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 399083F632; Tue, 3 Feb 2026 09:38:56 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 37c46894-0127-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 12/12] xen/arm: ffa: Add message parameter diagnostics Date: Tue, 3 Feb 2026 18:38:07 +0100 Message-ID: <209e5474e236737dd13e0f7ff8120b05cdb7eabe.1770115302.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MSG_SEND2 and direct request validation failures are silent, making it hard to diagnose invalid IDs, oversized messages, or unsupported destination types. Add debug logs for parameter validation failures: - invalid endpoint IDs - oversized messages - unsupported destination types - invalid sender/receiver combinations - ratelimit MSG_SEND2 busy failures to avoid log flooding No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_msg.c | 45 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 928f269f6c3a..cc273c9a8e80 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -100,6 +101,7 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) if ( !ffa_fw_supports_fid(fid) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, "ffa: direct req fid %#x not supported\n", fid); goto out; } @@ -108,6 +110,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) (src_dst & GENMASK(15,0)) == ffa_get_vm_id(d) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: direct req invalid src/dst %#x\n", + (uint32_t)src_dst); goto out; } @@ -115,6 +120,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: direct req to non-secure dst %#x\n", + (uint32_t)(src_dst & GENMASK(15, 0))); goto out; } @@ -166,7 +174,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, /* This is also checking that dest is not src */ ret = ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); if ( ret ) + { + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 lookup failed: dst %#x ret %d\n", + dst_id, ret); return ret; + } /* This also checks that destination has set a Rx buffer */ ret = ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); @@ -199,6 +212,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, /* receiver rx buffer will be released by the receiver*/ out_unlock: + if ( ret ) + { + if ( ret != FFA_RET_BUSY || printk_ratelimit() ) + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to %#x failed: %d\n", + dst_id, ret); + } rcu_unlock_domain(dst_d); if ( !ret ) ffa_raise_rx_buffer_full(dst_d); @@ -226,7 +245,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_tx_acquire(src_ctx, &tx_buf, &tx_size); if ( ret != FFA_RET_OK ) + { + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 TX acquire failed: %d\n", ret); return ret; + } /* create a copy of the message header */ memcpy(&src_msg, tx_buf, sizeof(src_msg)); @@ -238,6 +261,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) dst_id == ffa_get_vm_id(src_d) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid src/dst src %#x dst %#x\n", + src_id, dst_id); goto out; } @@ -246,6 +272,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) if (src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1)) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_offset %u (v1.1)\n", + src_msg.msg_offset); goto out; } /* Set uuid to Nil UUID for v1.1 guests */ @@ -255,6 +284,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) else if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_2) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_offset %u (v1.2)\n", + src_msg.msg_offset); goto out; } @@ -263,6 +295,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) src_msg.msg_size > (tx_size - src_msg.msg_offset) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_size %u offset %u tx %zu\n", + src_msg.msg_size, src_msg.msg_offset, tx_size); goto out; } @@ -272,6 +307,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 to SP not supported\n"); goto out; } /* @@ -288,6 +325,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_simple_call(FFA_MSG_SEND2, ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0, 0, 0); + if ( ret ) + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to SP failed: %d\n", ret); } else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) { @@ -295,7 +334,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_msg_send2_vm(dst_id, tx_buf, &src_msg); } else + { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 to VM disabled (dst %#x)\n", dst_id); + } out: ffa_tx_release(src_ctx); @@ -311,6 +354,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint32_t fid) if ( !ffa_fw_supports_fid(fid) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, "ffa: run fid %#x not supported\n", fid); goto out; } @@ -322,6 +366,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint32_t fid) if ( !FFA_ID_IS_SECURE(dst >> 16) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, "ffa: run to non-secure dst %#x\n", dst); goto out; } -- 2.50.1 (Apple Git-155) From xen-devel-bounces@lists.xenproject.org Tue Feb 03 18:10:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 18:10:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219666.1528522 (Exim 4.92) (envelope-from ) id 1vnKqj-0003Lg-VJ; Tue, 03 Feb 2026 18:10:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219666.1528522; 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Tue, 03 Feb 2026 10:10:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:To:Subject:Message-ID:Date: From:MIME-Version; bh=nfUgb2rr3hKaUs/X3OZNRCZJ1Olxd1VmiOYt/cj9PcY=; b=YUxlg0H U2TKt+s7+CT8gMEKV7aUH/766e3n5FQ+UM4UnxCIwETumtSChOIuvEKDAioDqpOv9vo5M0NFC+JAi F2dC6m478ebYA8whSF9/GLxV8tErUavrRWKLWphlpk+OQMbJ9AYcLs/JL8qEIkAQgXw5NzYXkXw3+ tPjg7l5iSI=; X-Gm-Message-State: AOJu0YzfncWIwqKYURMdRriYUQTZcihEQoxxRGa8b5un1U2Q5daBSbSS /G+wEVRTGiTH3iUnzB9uCjcAzQMlj73875p14WDQ0AXFmGOTEd/xNB+sjtc2b+PNscrYEUvBCJ7 7wp/r8Q78rxQt5kkFnSu5Z7L+DQt7vnM= X-Received: by 2002:a05:6122:ca9:b0:539:2a2c:6efe with SMTP id 71dfb90a1353d-566e7fa4f87mr186589e0c.4.1770142203766; Tue, 03 Feb 2026 10:10:03 -0800 (PST) MIME-Version: 1.0 From: Cody Zuschlag Date: Tue, 3 Feb 2026 19:09:52 +0100 X-Gmail-Original-Message-ID: X-Gm-Features: AZwV_Qg4oLqnAuzUlf0GsLYDqJ_2TbCHMU3zMqMBZSeO-UH_W_C0ZdD8bvcViyo Message-ID: Subject: [ANNOUNCE] Call for agenda items for February 5 Xen Community Call @ 16:00 UTC To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="00000000000041ee7e0649ef59dc" --00000000000041ee7e0649ef59dc Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi everyone, We=E2=80=99re getting ready for February's Xen Project Community Call on Th= ursday, 5 February 2026 at 16:00 UTC (4 pm UK time). We=E2=80=99d love for you to join. Feel free to participate or just observe= . This call is a great opportunity to see what the community is working on, align our various efforts, and share updates. Everyone is welcome! *Preparation:* - Add any proposed agenda items or missing action items: https://cryptpad.fr/pad/#/2/pad/edit/tRcgCf32woHY2Yu4V3WJAbIU/ - If any action items have been resolved or are no longer relevant, feel free to remove them from the doc. I attempted to clean up the doc, so fe= el free to make any adjustments. *Call Details:* - Date: Thursday, 5 February 2026 - Time: 16:00 UTC (agenda begins at 16:05 UTC) - Find your local timezone here - Link to Join the Call: https://meet.jit.si/XenProjectCommunityCall We plan to open the meeting room at 16:00 UTC, but to allow time for switching between meetings and handling any technical issues, we=E2=80=99ll officially start discussing the agenda at 16:05 UTC. Want to be CC=E2=80=99d on future calls? Add or remove yourself from our Sign-up Sheet . See you Thursday! Cody Zuschlag Xen Project - Community Manager --00000000000041ee7e0649ef59dc Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi everyone,

We=E2=80=99re getting ready = for February's Xen Project Community Call on Thursday, 5 February 2026 = at 16:00 UTC (4 pm UK time).

We=E2=80=99d love for you to join. Feel= free to participate or just observe. This call is a great opportunity to s= ee what the community is working on, align our various efforts, and share u= pdates. Everyone is welcome!

Preparation:
  • Add any proposed agenda items or missing action items: <= a href=3D"https://cryptpad.fr/pad/#/2/pad/edit/tRcgCf32woHY2Yu4V3WJAbIU/">h= ttps://cryptpad.fr/pad/#/2/pad/edit/tRcgCf32woHY2Yu4V3WJAbIU/
  • If any action items have been resolved or are no = longer relevant, feel free to remove them from the doc. I attempted to clea= n up the doc, so feel free to make any adjustments.

Call De= tails:

We plan to open the meeting= room at 16:00 UTC, but to allow time for switching between meetings and ha= ndling any technical issues, we=E2=80=99ll officially start discussing the = agenda at 16:05 UTC.

Want to be CC=E2=80=99d on future calls?
Add or remove yourself from our=C2=A0Sign-up Sheet.<= br>
See you Thursday!


Cody Zuschlag
Xen Project - Community Manager
<= /div>
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> } else { > + /* > + * x2apic may have been re-enabled by the > + * firmware on resuming from s2ram > + */ > + __x2apic_disable(); > + We should likely only disable x2apic on platforms that support it and need the disabling. How about? ... } else { /* * */ if (x2apic_enabled()) __x2apic_disable(); I considered if an error message should be printed along with this. But, I am not sure if it can really be called a firmware issue. It's probably just that newer CPUs might have started defaulting to x2apic on. Can you specify what platform you are encountering this? From xen-devel-bounces@lists.xenproject.org Tue Feb 03 23:02:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 23:02:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219733.1528606 (Exim 4.92) (envelope-from ) id 1vnPPU-0007Nz-8z; Tue, 03 Feb 2026 23:02:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219733.1528606; Tue, 03 Feb 2026 23:02:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnPPU-0007Ns-69; Tue, 03 Feb 2026 23:02:16 +0000 Received: by outflank-mailman (input) for mailman id 1219733; Tue, 03 Feb 2026 23:02:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnPPS-0007NO-IM for xen-devel@lists.xenproject.org; Tue, 03 Feb 2026 23:02:14 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5f9781f4-0154-11f1-b161-2bf370ae4941; Wed, 04 Feb 2026 00:02:12 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 1B6BF432E0; Tue, 3 Feb 2026 23:02:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E255C116D0; Tue, 3 Feb 2026 23:02:09 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5f9781f4-0154-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770159731; bh=rN1vHEBu5BFuRFQMvN9Xkf1rjI4+tIIdv9j+7zG6JTM=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=OXKI8dINgXS4T5/XPa9oQel1PfVxUhGWodHEbSQis2CAQY84xRKbDaTQW0YV+vDeF bJfWpoIZvnlRiJz/+4uapY6idR7PisITjh83C1kWgALYf6FuAzoVZo8omdgEYE7rOo CNdosvrKFdIyBukkfQMM3cIu/K2/SVaIt+jAd3pmmLFH06fAkNsbAvjvdPWUPqZJBK 2glrgX1gYgXhf1FYNFi30Hc6T/Sjvk5rKmXNQOj6VBoJENbX4Tb9cacYlkELZ+sJ0U V6dAmGIAZmuCyEa/j+J4KetJ129QLPhXIc1toQrEO6FLHzaauvkm3M+XLBMtQ9kGzr hQ/OJBtwUXFJg== Date: Tue, 3 Feb 2026 15:02:05 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org Subject: Re: [PATCH v8 1/2] xen/console: handle multiple domains using console_io hypercalls In-Reply-To: <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> Message-ID: References: <20260129220858.2371938-1-stefano.stabellini@amd.com> <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 3 Feb 2026, Jan Beulich wrote: > On 29.01.2026 23:08, Stefano Stabellini wrote: > > --- a/xen/drivers/char/console.c > > +++ b/xen/drivers/char/console.c > > @@ -518,11 +518,16 @@ static unsigned int __read_mostly console_rx = 0; > > struct domain *console_get_domain(void) > > { > > struct domain *d; > > + unsigned int rx; > > > > - if ( console_rx == 0 ) > > + nrspin_lock(&console_lock); > > + rx = console_rx; > > + nrspin_unlock(&console_lock); > > Did you test this in a debug build, and it didn't blow up? The console lock > is an IRQ-safe one, so I'd expect check_lock() to complain that you do not > disable IRQs here. At the same time I don't think you can rely on IRQs being > off upon entry into the function. > > Anyway - is locking here really needed? Wouldn't suitable use of ACCESS_ONCE() > (also elsewhere) do? (Such a switchover likely could be a separate, prereq > patch.) I created a prereq patch which introduces ACCESS_ONCE everywhere for console_rx > Further, if already you add locking on the read sides, what about ... > > > @@ -540,6 +545,12 @@ void console_put_domain(struct domain *d) > > rcu_unlock_domain(d); > > } > > > > +static bool is_focus_domain(const struct domain *d) > > +{ > > + ASSERT(rspin_is_locked(&console_lock)); > > + return d != NULL && d->domain_id == console_rx - 1; > > +} > > + > > static void console_switch_input(void) > > { > > unsigned int next_rx = console_rx; > > ... this read? > > > @@ -555,7 +566,10 @@ static void console_switch_input(void) > > > > if ( next_rx++ >= max_console_rx ) > > { > > + nrspin_lock_irq(&console_lock); > > As indicated earlier, you can't know IRQ state in anything down the call > tree from serial_rx(). I'll switch to the irqsave/restore versions in console_switch_input > > > @@ -742,17 +765,36 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, > > if ( copy_from_guest(kbuf, buffer, kcount) ) > > return -EFAULT; > > > > - if ( is_hardware_domain(cd) ) > > + /* > > + * Take both cons->lock and console_lock: > > + * - cons->lock protects cons->buf and cons->idx > > + * - console_lock protects console_send() and is_focus_domain() > > + * checks > > + * > > + * The order must be respected. guest_printk() takes the > > + * console_lock so it is important that cons->lock is taken > > + * first. > > + */ > > + spin_lock(&cons->lock); > > + nrspin_lock_irq(&console_lock); > > While guest_printk() does matter here, it taking (down the call tree) > console_lock isn't alone relevant. It being called with cons->lock held > is, . I updated the in-code comment > > > @@ -816,22 +857,39 @@ long do_console_io( > > break; > > > > rc = 0; > > + nrspin_lock_irq(&console_lock); > > + if ( !is_focus_domain(current->domain) ) > > + count = 0; > > while ( (serial_rx_cons != serial_rx_prod) && (rc < count) ) > > { > > idx = SERIAL_RX_MASK(serial_rx_cons); > > len = serial_rx_prod - serial_rx_cons; > > + nrspin_unlock_irq(&console_lock); > > Can we please have blank lines on both sides of this? sure > > if ( (idx + len) > SERIAL_RX_SIZE ) > > len = SERIAL_RX_SIZE - idx; > > if ( (rc + len) > count ) > > len = count - rc; > > if ( copy_to_guest_offset(buffer, rc, &serial_rx_ring[idx], len) ) > > Have I perhaps talked you into moving the unlock too early? serial_rx_ring[] > accesses look like they need to be with the lock still held. Or, to avoid > calling copy_to_guest_offset() with the lock held, a local copy would need > making. I introduced a local copy From xen-devel-bounces@lists.xenproject.org Tue Feb 03 23:08:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 23:08:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219743.1528615 (Exim 4.92) (envelope-from ) id 1vnPUz-00088S-SJ; Tue, 03 Feb 2026 23:07:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219743.1528615; Tue, 03 Feb 2026 23:07:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnPUz-00088L-Pj; Tue, 03 Feb 2026 23:07:57 +0000 Received: by outflank-mailman (input) for mailman id 1219743; Tue, 03 Feb 2026 23:07:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnPUy-00088F-D2 for xen-devel@lists.xenproject.org; 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Signed-off-by: Stefano Stabellini --- xen/drivers/char/console.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 2bdb4d5fb4..35f541ca8e 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -518,11 +518,12 @@ static unsigned int __read_mostly console_rx = 0; struct domain *console_get_domain(void) { struct domain *d; + unsigned int rx = ACCESS_ONCE(console_rx); - if ( console_rx == 0 ) - return NULL; + if ( rx == 0 ) + return NULL; - d = rcu_lock_domain_by_id(console_rx - 1); + d = rcu_lock_domain_by_id(rx - 1); if ( !d ) return NULL; @@ -542,7 +543,7 @@ void console_put_domain(struct domain *d) static void console_switch_input(void) { - unsigned int next_rx = console_rx; + unsigned int next_rx = ACCESS_ONCE(console_rx); /* * Rotate among Xen, dom0 and boot-time created domUs while skipping @@ -555,7 +556,7 @@ static void console_switch_input(void) if ( next_rx++ >= max_console_rx ) { - console_rx = 0; + ACCESS_ONCE(console_rx) = 0; printk("*** Serial input to Xen"); break; } @@ -575,7 +576,7 @@ static void console_switch_input(void) rcu_unlock_domain(d); - console_rx = next_rx; + ACCESS_ONCE(console_rx) = next_rx; printk("*** Serial input to DOM%u", domid); break; } @@ -592,7 +593,7 @@ static void __serial_rx(char c) struct domain *d; int rc = 0; - if ( console_rx == 0 ) + if ( ACCESS_ONCE(console_rx) == 0 ) return handle_keypress(c, false); d = console_get_domain(); @@ -1193,7 +1194,7 @@ void __init console_endboot(void) * a useful 'how to switch' message. */ if ( opt_conswitch[1] == 'x' ) - console_rx = max_console_rx; + ACCESS_ONCE(console_rx) = max_console_rx; register_keyhandler('w', conring_dump_keyhandler, "synchronously dump console ring buffer (dmesg)", 0); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 23:08:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 23:08:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219746.1528631 (Exim 4.92) (envelope-from ) id 1vnPVF-0008UJ-Ld; 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This patch changes the virq from global to VIRQ_DOMAIN to allow other domains to bind to it. Note that Linux silently falls back to polling when binding fails, which masks the issue. Signed-off-by: Jason Andryuk Signed-off-by: Stefano Stabellini --- xen/common/event_channel.c | 1 + xen/drivers/char/console.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c index a3d18bc464..f9becb4ca5 100644 --- a/xen/common/event_channel.c +++ b/xen/common/event_channel.c @@ -138,6 +138,7 @@ static enum virq_type get_virq_type(unsigned int virq) return VIRQ_VCPU; case VIRQ_ARGO: + case VIRQ_CONSOLE: return VIRQ_DOMAIN; case VIRQ_ARCH_0 ... VIRQ_ARCH_7: diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 35f541ca8e..fbc89ca2a4 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -613,7 +613,7 @@ static void __serial_rx(char c) * Always notify the hardware domain: prevents receive path from * getting stuck. */ - send_global_virq(VIRQ_CONSOLE); + send_guest_domain_virq(d, VIRQ_CONSOLE); } #ifdef CONFIG_SBSA_VUART_CONSOLE else -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 23:08:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 23:08:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219747.1528646 (Exim 4.92) (envelope-from ) id 1vnPVG-0000SF-Nk; Tue, 03 Feb 2026 23:08:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219747.1528646; Tue, 03 Feb 2026 23:08:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnPVG-0000Qo-KI; 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pr=C From: Stefano Stabellini To: CC: , , , , , , , , , , Stefano Stabellini Subject: [PATCH v9 4/4] xen: enable dom0less guests to use console_io hypercalls Date: Tue, 3 Feb 2026 15:07:57 -0800 Message-ID: <20260203230757.3224547-4-stefano.stabellini@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A348:EE_|CH8PR12MB9765:EE_ X-MS-Office365-Filtering-Correlation-Id: 98e68f0e-7787-4116-8dda-08de637915cd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?lrcjk2n+688ve0Us9x616T/OtzKyojek7avAHRGqraUbAtt7rmGYw6nWgXS1?= =?us-ascii?Q?/IqVXvURzAbMMdwvY51uDKd7MwqRjdjQo+y6cM2PxlcJPRTbp73YyQsQRRce?= =?us-ascii?Q?t9IPxw9suSM0dj2KmJWfrfsyvZK8IEtp+ut0dOMU+85aQl5txmtnruiJxRge?= =?us-ascii?Q?/c+U41MWk9Y+Z8OUHwm0nnYMVlPgfpeYnxKMhG3pe6/OEEEWSsMJXCR8WKyv?= =?us-ascii?Q?lVwnNODoxKNUcQ0vRdy3Ahc+ePyBgYXCUL4JT9rHT5iqb5ZDWHhkVerR2AXc?= =?us-ascii?Q?swFOxzDHUZEzvn1SsmWFEufYxLt2tr2iaOgwhzxFz9mByjcJ+5vNZMgOBtEP?= =?us-ascii?Q?Cwxz9UTR0c3T3U4IgN0tVRHNUdIyxf1g55xn4RdZ/GgV3drNT7QttQU9WL2/?= =?us-ascii?Q?8VhzlgdRNYdmTRiUqSQSgD1/QIaytHjXc2UkCfBNB9qPRpXmRxq6kO3U8+VN?= =?us-ascii?Q?KjUVQLEw8L6d+ajnmoEmc9QrE+i/1v+vG/du68O+NAtj9mhVe/CLC0Qx0UNw?= =?us-ascii?Q?gLnE5FFYA4MKaNcNSp4whSdT6u1WZmOckn/+9bRnW4PsEL2x6OVpgA+znAuI?= =?us-ascii?Q?Wu97LVPUko0ts3qHpPZKhne4WyrjffjaKlLQUSHTiEyC0Raq7I4wZR+DgsI2?= =?us-ascii?Q?V0C7DeCQYOgPuQE6kFu2ofVbpc78ABCTV/SwO0efPpNRzd1/60DcOj6Q2LuU?= =?us-ascii?Q?qkmH6IwUmAqZ2CX3hP2bLxuoeTG23rOvrT6IvG0D7COV7zJ8NLj5iOgRrGFq?= =?us-ascii?Q?xikJK/sjII/6Hfdz6hWyV/Aa0iiWKpp20QQx6s05S6F+lUp4mq6alxAnpwod?= =?us-ascii?Q?UWmO/MvjofdGKnTJd4PBA0+3gv8W3cWLL9/0C4afoJkXwdOmVRZRLoFj3Xlo?= =?us-ascii?Q?UH75a2cxt9hkMXU2ELJPfa7O+XmiXHHEKG1MAs4oUOOih/n9p0cOggdi912q?= =?us-ascii?Q?TIrEx57+RvQPGwiCz+ZNKrYEuewQEfGmPzP4937Id+roFbimn8KCg7PNyY7e?= =?us-ascii?Q?oGR0Tmhx1eYfqTqeF12yXqT5NblQrvRCzdL7g9qjA6qKcfVJEj34uJh/D0k0?= =?us-ascii?Q?B0xg1cAGgpKcp5M/6eGh17NR0sZx8EhImI7YrS7LcmBfyH2nOwrGsZWEg83Q?= =?us-ascii?Q?8mcIkSlKbJtT9Ji71zDzg8sH2KLDc5vUubYA72lIuM8Obn7CHZ/qBlaj1HzQ?= =?us-ascii?Q?Ip8mbKMvvF6N5FQXXLN/4jogjpIfp6jlItGUGUvLyFSG+S49MLf9bwHDrm9q?= =?us-ascii?Q?Fx//BagnOV8xmyABu/kyyCg3VFeG60mTon3d3lvzVgj6eDY/pyTME2RkuEBQ?= =?us-ascii?Q?qyLoRxhebkyUPbcPVX+6Tc7geExDumqO5Mue//mH3NNut5ECmOAjqDk9DnFF?= =?us-ascii?Q?mzFYJMj7wBLtE5NbcW17auGqa5r3qcjqvuqqCOzXxuGxKg9M2g00+pPYBZjD?= =?us-ascii?Q?BwY7Obk2EJTDfWDQIDlnVkZWoN4aVZGEHuvnQ9ZfbZvjIN/0bUxAmARPIIU5?= =?us-ascii?Q?ShQFwDmg98ON3p7KDXbY0YAHxEdEgI6JZpmTTz+p56t3EhOpz/ZBUXBlH2Fs?= =?us-ascii?Q?0aMCh5ama+9YoDCOa3DNHhQGjznzLD5/lV/B54OvlUg/aQQw4h3QlMz5UCWa?= =?us-ascii?Q?vLEY3R5UZVwisLAP+Wlb8hxDoZbPa6Vk2ocLv5qZrHws+kOGLFqDiqomvtQO?= =?us-ascii?Q?v52xvQ=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; 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+ d->console->input_allowed = true; + return rc; } diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index b59ebdeddb..7afe9cfd41 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -610,11 +610,20 @@ static void __serial_rx(char c) if ( ACCESS_ONCE(console_rx) == 0 ) return handle_keypress(c, false); + /* Includes an is_focus_domain() check. */ d = console_get_domain(); if ( !d ) return; - if ( is_hardware_domain(d) ) +#ifdef CONFIG_SBSA_VUART_CONSOLE + /* Prioritize vpl011 if enabled for this domain */ + if ( d->arch.vpl011.base_addr ) + { + /* Deliver input to the emulated UART. */ + rc = vpl011_rx_char_xen(d, c); + } + else +#endif { unsigned long flags; @@ -633,11 +642,6 @@ static void __serial_rx(char c) */ send_guest_domain_virq(d, VIRQ_CONSOLE); } -#ifdef CONFIG_SBSA_VUART_CONSOLE - else - /* Deliver input to the emulated UART. */ - rc = vpl011_rx_char_xen(d, c); -#endif if ( consoled_is_enabled() ) /* Deliver input to the PV shim console. */ -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Tue Feb 03 23:08:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 03 Feb 2026 23:08:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219749.1528656 (Exim 4.92) (envelope-from ) id 1vnPVI-0000jn-59; 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pr=C From: Stefano Stabellini To: CC: , , , , , , , , , , Stefano Stabellini Subject: [PATCH v9 3/4] xen/console: handle multiple domains using console_io hypercalls Date: Tue, 3 Feb 2026 15:07:56 -0800 Message-ID: <20260203230757.3224547-3-stefano.stabellini@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A345:EE_|MN6PR12MB8591:EE_ X-MS-Office365-Filtering-Correlation-Id: 8fd9c07a-a6ba-47df-c2a1-08de6379155e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?vqYy73CN+zomQCQHpoknKaKoqkrbydagsDsESB3+SxCScMyS/nVuXasQhEbJ?= =?us-ascii?Q?TK5h6oirbBmVsPbNC9UHX1IYlXJWc3FF64uMo/ZFIfyfrLq7dusKAXuPH3gM?= =?us-ascii?Q?nmT0FeIZWO9KirZ8/Zpp+TM7KYf3z+4xoZLz8CFusN2AysWt/GstDhxutMBf?= =?us-ascii?Q?lRCr1/CIxw7QIWHauWImAvgupcE5RRIrezjQqu6yYcWwY2OjrYWJvV6/UWUu?= =?us-ascii?Q?0S3C+9kJ3WezNu3Iqp3EZeCPii2mI4eMT7YUUbssTb7j7b3i4L7giUKrhBh+?= =?us-ascii?Q?eJaR/FQ96gFpms+QE/KgT3Bc1K8dkEVDqV+ksOpHLaQzQ7Bl+ZCjGN+BwKwh?= =?us-ascii?Q?fWkwikoU1M3QT+vd1c3EOPHuuoY7ZBRHnxXQbj/QepKwaXp8Iivuk62XIkYt?= =?us-ascii?Q?+R4NwdPzgTI5c9mtx8Vqb5FQxb0qYDLEeBx8AdrvVzHUNoY5SjP7DxyizZ/2?= =?us-ascii?Q?P6wh6H78+YFbcDXU3k/0kNoUChGirEcGTHWEFK+Rhwdyre2vnBsi9Qc37Jqk?= =?us-ascii?Q?ldZ40I6kSRgIrFoGI+30rpMEvA4iD1jDULEjL0B/jjpozw5nBRu8YBNvW2Bn?= =?us-ascii?Q?G7IcqGb/CeBVSaJ0bhSahb+VIQSYKEPgA5RaKKHKbpb9brnMzjm+SwaHpHJd?= =?us-ascii?Q?k+kfRz5dcpn8GJgc7PaT66wwcTQo4E+AFdX/9sXFFlup6pTV+9mADLEzkehw?= =?us-ascii?Q?c3PRZ5RJouOY2JFRkphqfwEC+vdEu5pmNrK7nDPJU23/20rHyQAhA1yECtCW?= =?us-ascii?Q?VL5agWRJAJpKzUacdaHmhMZfGM3Io6LUgyp4HmhMoeQbAXaKZpf++I9AqXgz?= =?us-ascii?Q?2XmNOrdIDxfhUf4BT3C0DHFcZSRCwow8zJduTo2nRRlAVJzGhnmqKuWx1B+l?= =?us-ascii?Q?YvhJkWl/xB2JJd1lid51yooq5jhDxi5W+lxwlm17ja11WHMBSVjbPD+SxkcF?= =?us-ascii?Q?jPeQvZKMwc3yFZxSgBEhqbIaJ/4aKZZDFFlPQx3YvmDN0RKw9/oC87/5pzOo?= =?us-ascii?Q?SPAKH68grj7nwnXdwZf1KJ8Nez68UnjVCRbw0/NWNe6543bPzY7zaKS3zZp7?= =?us-ascii?Q?61NLbo5igAqvARHO/vY6UOL8p4gHF/n/M7YRIec2eGxpSUFEBM0l10KZr47d?= =?us-ascii?Q?E+3wYc+SEaAv3Jh/M/cCZtMxUga//ceGnGdsNZKP8mUbdcxcM8zcaSUdpSi9?= =?us-ascii?Q?YYZsJ/SbZrJ2X7yJZnxZm/rBmWzAr41zmWsQ3KBJJlRdvFvrUnWhw0nauAsx?= =?us-ascii?Q?HWAXgyX3TQ+OHyJtgUkaXK3FL7PItuMseEYOMPJ8jKB5pN8AO0uluKB+hrjN?= =?us-ascii?Q?VyUpyIkNCZkYJHMToHQHp4GpT15bjUKAhkFO50CW/FdEMhfbj/WztwaFDdaM?= =?us-ascii?Q?Gb8jvL8KWylk0esK8iS6WLH+Ji8saDjEr/e5V78xhV+SKjexML4+N0FloO/q?= =?us-ascii?Q?d6dgVVitHOvCJYR4tBeOYyIc5qPhwfACY+LRHuoU/LdOD359KEDrJ5JKCSi5?= =?us-ascii?Q?0TnwZbcHNAO0B3buGEc8BrwqqC8qV2iNVhnc4nULtgDWKa7VefXO7DnN4oyH?= =?us-ascii?Q?WEvjEaPo4kB+IIBLRIxTTnAkXGkD450Wg7u1/Qm9EbZzB8lKjR85bhVFIg0K?= =?us-ascii?Q?D51aAqPaYOflpkmK9PCFAplCY3MqtO3RvlmK5TpX3ReSTbq0brkh6MbZ2Azt?= =?us-ascii?Q?vxrGIA=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; 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Handle them in a similar way to vpl011: only the domain which has focus can read from the console. All domains can write to the console but the ones without focus have a prefix. In this case the prefix is applied by using guest_printk instead of printk or console_puts which is what the original code was already doing. When switching focus using Ctrl-AAA, discard any unread data in the input buffer. Input is read quickly and the user would be aware of it being slow or stuck as they use Ctrl-AAA to switch focus domain. In that situation, it is to be expected that the unread input is lost. The domain writes are buffered when the domain is not in focus. Push out the buffer after the domain enters focus on the first guest write. Locking updates: - Guard every mutation of serial_rx_cons/prod with console_lock and discard unread input under the lock when switching focus (including when returning to Xen) so that cross-domain reads can't see stale data - Require is_focus_domain() callers to hold console_lock, and take that lock around the entire CONSOLEIO_read loop, re-checking focus after each chunk so a focus change simply stops further copies without duplicating or leaking input - Hold cons->lock while flushing buffered writes in the focus path so the direct-write fast path does not race buffered guests or HVM debug output Signed-off-by: Stefano Stabellini --- Changes in v9: - use irqsave/irqrestore in console_switch_input - update in-code comment - blank lines - local copy of serial_rx_ring --- xen/drivers/char/console.c | 78 +++++++++++++++++++++++++++++++++----- 1 file changed, 68 insertions(+), 10 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index fbc89ca2a4..b59ebdeddb 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -541,6 +541,12 @@ void console_put_domain(struct domain *d) rcu_unlock_domain(d); } +static bool is_focus_domain(const struct domain *d) +{ + ASSERT(rspin_is_locked(&console_lock)); + return d != NULL && d->domain_id == console_rx - 1; +} + static void console_switch_input(void) { unsigned int next_rx = ACCESS_ONCE(console_rx); @@ -553,10 +559,14 @@ static void console_switch_input(void) { domid_t domid; struct domain *d; + unsigned long flags; if ( next_rx++ >= max_console_rx ) { + nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = 0; + serial_rx_cons = serial_rx_prod; + nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to Xen"); break; } @@ -576,7 +586,11 @@ static void console_switch_input(void) rcu_unlock_domain(d); + nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = next_rx; + /* Don't let the next dom read the previous dom's unread data. */ + serial_rx_cons = serial_rx_prod; + nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to DOM%u", domid); break; } @@ -602,12 +616,16 @@ static void __serial_rx(char c) if ( is_hardware_domain(d) ) { + unsigned long flags; + /* - * Deliver input to the hardware domain buffer, unless it is + * Deliver input to the focus domain buffer, unless it is * already full. */ + nrspin_lock_irqsave(&console_lock, flags); if ( (serial_rx_prod - serial_rx_cons) != SERIAL_RX_SIZE ) serial_rx_ring[SERIAL_RX_MASK(serial_rx_prod++)] = c; + nrspin_unlock_irqrestore(&console_lock, flags); /* * Always notify the hardware domain: prevents receive path from @@ -731,6 +749,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, unsigned int flags = opt_console_to_ring ? CONSOLE_ALL : CONSOLE_DEFAULT; struct domain *cd = current->domain; + struct domain_console *cons = cd->console; while ( count > 0 ) { @@ -743,17 +762,36 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, if ( copy_from_guest(kbuf, buffer, kcount) ) return -EFAULT; - if ( is_hardware_domain(cd) ) + /* + * Take both cons->lock and console_lock: + * - cons->lock protects cons->buf and cons->idx + * - console_lock protects console_send() and is_focus_domain() + * checks + * + * The order must be respected. guest_printk() takes the + * console_lock and it is called with cons->lock held. It is + * important that cons->lock is taken first. + */ + spin_lock(&cons->lock); + nrspin_lock_irq(&console_lock); + if ( is_focus_domain(cd) ) { + if ( cons->idx ) + { + console_send(cons->buf, cons->idx, flags); + cons->idx = 0; + } + spin_unlock(&cons->lock); + /* Use direct console output as it could be interactive */ - nrspin_lock_irq(&console_lock); console_send(kbuf, kcount, flags); nrspin_unlock_irq(&console_lock); } else { char *kin = kbuf, *kout = kbuf, c; - struct domain_console *cons = cd->console; + + nrspin_unlock_irq(&console_lock); /* Strip non-printable characters */ do @@ -766,7 +804,6 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, } while ( --kcount > 0 ); *kout = '\0'; - spin_lock(&cons->lock); kcount = kin - kbuf; if ( c != '\n' && (cons->idx + (kout - kbuf) < (ARRAY_SIZE(cons->buf) - 1)) ) @@ -796,6 +833,7 @@ long do_console_io( { long rc; unsigned int idx, len; + char kbuf[SERIAL_RX_SIZE]; rc = xsm_console_io(XSM_OTHER, current->domain, cmd); if ( rc ) @@ -817,6 +855,9 @@ long do_console_io( break; rc = 0; + nrspin_lock_irq(&console_lock); + if ( !is_focus_domain(current->domain) ) + count = 0; while ( (serial_rx_cons != serial_rx_prod) && (rc < count) ) { idx = SERIAL_RX_MASK(serial_rx_cons); @@ -825,14 +866,31 @@ long do_console_io( len = SERIAL_RX_SIZE - idx; if ( (rc + len) > count ) len = count - rc; - if ( copy_to_guest_offset(buffer, rc, &serial_rx_ring[idx], len) ) - { - rc = -EFAULT; - break; - } + memcpy(kbuf, &serial_rx_ring[idx], len); + + nrspin_unlock_irq(&console_lock); + + if ( copy_to_guest_offset(buffer, rc, kbuf, len) ) + return -EFAULT; rc += len; + + /* + * First get console_lock again, then check is_focus_domain(). + * It is possible that we switched focus domain during + * copy_to_guest_offset(). In that case, serial_rx_cons and + * serial_rx_prod have been reset so it would be wrong to + * update serial_rx_cons here. Get out of the loop instead. + * + * rc is updated regardless to provide the correct return + * value to the VM as the data has been copied. + */ + nrspin_lock_irq(&console_lock); + if ( !is_focus_domain(current->domain) ) + break; + serial_rx_cons += len; } + nrspin_unlock_irq(&console_lock); break; default: rc = -ENOSYS; -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 02:56:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 02:56:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1219808.1528666 (Exim 4.92) (envelope-from ) id 1vnT3K-0006Gv-1K; Wed, 04 Feb 2026 02:55:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1219808.1528666; Wed, 04 Feb 2026 02:55:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnT3J-0006Gn-RJ; Wed, 04 Feb 2026 02:55:37 +0000 Received: by outflank-mailman (input) for mailman id 1219808; Wed, 04 Feb 2026 02:55:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnT3I-0006Gh-KX for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 02:55:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnT3G-002Mva-0U; Wed, 04 Feb 2026 02:55:33 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnT3F-00GDbF-1q; Wed, 04 Feb 2026 02:55:33 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID :Subject:Cc:To:Date:From; bh=BjkKDM8fENKGt52Vxx+M3eeohZOF5rdjqIS54yPudmw=; b= QD2Aul0HpoOB/5KLr/LTX6zU1mSvJdT93BtDdIzNlUAkWxIL1k8kLihPlTea4F5mI5/old5uC5WgB g/sXhKYp3fKL7GKs+JruiCXKqjy/4Rea3eocLRqq7QPXmV3e5gQLpzT8S8e8lZUkqdHDmIKKLuR2U uJfncYeNy7Y57E93Q=; From: dmukhin@xen.org Date: Tue, 3 Feb 2026 18:55:32 -0800 To: Stefano Stabellini Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, dmukhin@ford.com Subject: Re: [PATCH v1] automation: align XTF qemu parameters across achitectures Message-ID: References: <20260202193230.21412-2-dmukhin@ford.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Feb 02, 2026 at 03:40:16PM -0800, Stefano Stabellini wrote: > On Mon, 1 Feb 2026, dmukhin@xen.org wrote: > > From: Denis Mukhin > > > > It is handy to have 2 CPUs and more RAM for smoke testing a hypervisor > > change via XTF. > > > > Align x86 QEMU configuration with Arm for XTF tests: 2 CPU and 2G of RAM. > > > > Signed-off-by: Denis Mukhin > > Please provide a link to the successful pipeline. With that: CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2304311308 > > Acked-by: Stefano Stabellini Thanks! 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Tue, 03 Feb 2026 20:00:55 -0800 (PST) MIME-Version: 1.0 From: Alap A Date: Wed, 4 Feb 2026 09:30:44 +0530 X-Gm-Features: AZwV_QhihaT8AEYZE7eUZXyEljIfxWUVK9gMryDJ8aUy0r_CvnTJ_H1WbZLHD0g Message-ID: Subject: [ARM64][Raspberry Pi 5][RP1] Dom0 firmware clocks + RP1 OF node missing under Xen, VC4/DRM never probes To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="000000000000561ecf0649f79aea" --000000000000561ecf0649f79aea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hello Xen Developers, I am working on Xen bring-up on a Raspberry Pi 5 (BCM2712 + RP1 over PCIe) and am stuck with Dom0 firmware clocks, RP1, and VC4/DRM not probing correctly. I am hoping for guidance on the *intended DT/Xen model for RP1 and Raspberry Pi firmware devices under Xen*. Setup - Board: Raspberry Pi 5 (BCM2712, RP1 southbridge over PCIe) - Xen: 4.17.0 (xen-troops build) - Dom0 kernel: - Linux 6.19.0-rc5 (mainline) - Also tested Raspberry Pi downstream 6.6 - Bootloader: U-Boot - Goal: Dom0 owns display/graphics; DomU gets a virtual display Problem Summary Dom0 never gets /dev/dri. The VC4/V3D/HVS DRM stack fails due to missing clocks/firmware and RP1 not binding. Key Dom0 dmesg errors: raspberrypi-clk soc@107c000000:firmware:clocks: probe with driver raspberrypi-clk failed with error -22 platform 1002000000.v3d: deferred probe pending: platform: supplier soc@107c000000:firmware:clocks not ready vc4_hvs 107c580000.hvs: Couldn't get core clock vc4-drm axi:gpu: failed to bind 107c580000.hvs (ops vc4_hvs_ops): -2 rp1_pci 0002:01:00.0: Missing of_node for device rp1_pci 0002:01:00.0: probe with driver rp1_pci failed with error -22 As a result: - raspberrypi-clk never binds - firmware clock/reset providers don=E2=80=99t come up - RP1 PCI device has no OF node - VC4 DRM never probes =E2=86=92 no /dev/dri Device Tree / Overlay DetailsXen DT Overlay I am using a Xen DT overlay based on xen-troops that enables HDMI, V3D, firmware, clocks, reset, vcio, and assigns devices without IOMMU. This overlay relies heavily on symbol fixups (__fixups__) and target =3D <0xffffffff> fragments. Excerpt: - Enables: - hdmi0, hdmi1, v3d, vc4, hvs, pixelvalve* - firmware, firmware_clocks, reset, vcio - rp1_clocks, bcm_reset, pcie_rescal - Uses xen,force-assign-without-iommu on most nodes (Full file: bcm2712-raspberrypi5-xen.dtso) HDMI / Dom0 Passthrough Overlay This overlay sets up /chosen multiboot nodes, UART for Xen console, and forces PCIe assignment. Key parts: dom0 { compatible =3D "multiboot,kernel\0multiboot,module"; reg =3D <0x8000000 0x20000000 0x00 0x2000000>; }; (Full file: hdmi-passthrough-dom0.dtso) Boot Logs Full Xen + Dom0 boot logs showing: - raspberrypi-clk failing with -EINVAL - rp1_pci missing of_node - VC4/HVS/V3D deferring and timing out (Full log: bootlogs3.txt) Observations 1. Firmware node exists and is enabled in the DT passed to Dom0: /soc@107c000000/firmware { compatible =3D "raspberrypi,bcm2835-firmware", "simple-mfd"; clocks { compatible =3D "raspberrypi,firmware-clocks"; status =3D "o= kay"; }; reset { compatible =3D "raspberrypi,firmware-reset"; status =3D "o= kay"; }; vcio { compatible =3D "raspberrypi,vcio"; status =3D "o= kay"; }; }; Despite this, raspberrypi-clk fails probing very early with -22. 2. RP1 enumerates correctly on PCIe: 0002:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge [1de4:0001] But Linux reports: rp1_pci ... Missing of_node for device Which prevents: - rp1-clk - GPIO - reset - HDMI PHY - downstream display pipeline 3. I attempted U-Boot DT overlays to attach an OF node at: /axi/pcie@1000120000/pci@0,0/dev@0,0 but overlays frequently fail with: FDT_ERR_NOTFOUND unless I rely on symbol-based fixups. Questions 1. *What is the intended DT model for RP1 under Xen on Raspberry Pi 5?* - Should RP1 be represented as a proper OF node under the PCI endpoint in the Xen DT? - Or is Xen expected to synthesize this mapping internally? 2. *Is raspberrypi,firmware-clocks supported in Dom0 under Xen on Pi 5?* - The driver probes but returns -EINVAL even when the DT node exists and is enabled. 3. *Are there known patches/branches for Xen or DT that enable VC4/DRM on Pi 5?* - Specifically for firmware clocks, RP1, and HVS/V3D dependencies. Reproduction Summary Boot flow: 1. U-Boot loads bcm2712-rpi-5-b.dtb 2. Applies bcm2712-raspberrypi5-xen.dtbo 3. Applies hdmi-passthrough-dom0.dtbo 4. Boots Xen 5. Loads Dom0 kernel as multiboot module Result: Dom0 boots, but RP1 and firmware clocks do not bind, so VC4/DRM never comes up. ------------------------------ Any guidance on the *correct DT/Xen integration model for BCM2712/RP1* would be greatly appreciated. If there is a reference DT, patch series, or recommended branch, I=E2=80=99d be happy to test and report back. Best regards, Alap --000000000000561ecf0649f79aea Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Hello Xen Developers,

I am working on Xen bring-u= p on a Raspberry Pi 5 (BCM2712 + RP1 over PCIe) and am stuck with Dom0 firm= ware clocks, RP1, and VC4/DRM not probing correctly. I am hoping for guidan= ce on the intended DT/Xen model for RP1 and Raspberry Pi firmware d= evices under Xen.

Setup

  • Board: Raspberry Pi = 5 (BCM2712, RP1 southbridge over PCIe)

  • Xen: 4.17.0 (xen-troo= ps build)

  • Dom0 kernel:

    • Linux 6.19.0-rc5 (mainl= ine)

    • Also tested Raspberry Pi downstream 6.6

  • Bootloader: U-Boot

  • Goal: Dom0 owns display/graphic= s; DomU gets a virtual display

Problem Summary

Dom0= never gets /dev/dri. The VC4/V3D/HVS DRM stack fails due to m= issing clocks/firmware and RP1 not binding.

Key Dom0 dmesg errors:

raspberrypi-clk soc@107c000000:firmware:clocks: probe with driv=
er raspberrypi-clk failed with error -22
platform 1002000000.v3d: deferred probe pending: platform: supplier soc@107=
c000000:firmware:clocks not ready
vc4_hvs 107c580000.hvs: Couldn't get core clock
vc4-drm axi:gpu: failed to bind 107c580000.hvs (ops vc4_hvs_ops): -2
rp1_pci 0002:01:00.0: Missing of_node for device
rp1_pci 0002:01:00.0: probe with driver rp1_pci failed with error -22

As a result:

  • raspberrypi-clk nev= er binds

  • firmware clock/reset providers don=E2=80=99t come u= p

  • RP1 PCI device has no OF node

  • VC4 DRM never= probes =E2=86=92 no /dev/dri

Device Tree / O= verlay Details

Xen DT Overlay

I am using a Xen DT overlay ba= sed on xen-troops that enables HDMI, V3D, firmware, clocks, reset, vcio, an= d assigns devices without IOMMU. This overlay relies heavily on symbol fixu= ps (__fixups__) and target =3D <0xffffffff>= fragments.

Excerpt:

  • Enables:

    • hdmi0= , hdmi1, v3d, vc4, hvs<= /code>, pixelvalve*

    • firmware, firmware_clocks, reset, vcio

      • rp1_clocks, bcm_reset, pcie_rescal

  • Uses xen,force-assign-without-iommu on most nodes

(Full file: bcm2712-raspberrypi5-xen.= dtso)

HDMI / Dom0 Passthrough Overlay

This overlay set= s up /chosen multiboot nodes, UART for Xen console, and forces= PCIe assignment.

Key parts:

dom0 {
  compatible =3D "multiboot,kernel\0multiboot,module";
  reg =3D <0x8000000 0x20000000 0x00 0x2000000>;
};

(Full file: hdmi-passthrough-dom0.dtso)

Boot Logs

Full Xen + Dom0 boot logs showing:

  • ra= spberrypi-clk failing with -EINVAL

  • rp1_pci missing of_node

  • VC4/HVS/V3D def= erring and timing out

(Full log: bootlogs3.txt= )

Observations

  1. Firmware node exists and is enabled in= the DT passed to Dom0:

    /soc@107c000000/firmware {
    compatible =3D "raspberrypi,bcm2835-firmware", "simple-m=
fd";
    clocks { compatible =3D "raspberrypi,firmware-clocks"; status=
 =3D "okay"; };
    reset  { compatible =3D "raspberrypi,firmware-reset";  status=
 =3D "okay"; };
    vcio   { compatible =3D "raspberrypi,vcio";            status=
 =3D "okay"; };
};

    Despite this, raspberrypi-clk fails probing ve= ry early with -22.

  2. RP1 enumerates correctly on = PCIe:

    0002:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 =
PCIe 2.0 South Bridge [1de4:0001]

    But Linux reports:

    rp1_pci ... Missing of_nod=
e for device

    Which prevents:

    • rp1-clk

    • GPIO

    • reset

    • HDMI PHY

    • downstream displ= ay pipeline

  3. I attempted U-Boot DT overlays to atta= ch an OF node at:

    /axi/pcie@1000120000/pci@0,0/dev@0,0

    but overlays frequently fail with:

    FDT_ERR_NO=
TFOUND

    unless I rely on symbol-based fixups.

Ques= tions

  1. What is the intended DT model for RP1 under Xe= n on Raspberry Pi 5?

    • Should RP1 be represented as a = proper OF node under the PCI endpoint in the Xen DT?

    • Or is X= en expected to synthesize this mapping internally?

  2. Is raspberrypi,firmware-clocks supported in Dom0 unde= r Xen on Pi 5?

    • The driver probes but returns -= EINVAL even when the DT node exists and is enabled.

  3. Are there known patches/branches for Xen or DT that enable= VC4/DRM on Pi 5?

    • Specifically for firmware clocks, = RP1, and HVS/V3D dependencies.

Reproduction Summ= ary

Boot flow:

  1. U-Boot loads bcm2712-rpi-5-b.dtb<= /code>

  2. Applies bcm2712-raspberrypi5-xen.dtbo

  3. Applies hdmi-passthrough-dom0.dtbo

  4. Boots Xen

  5. Loads Dom0 kernel as multiboot module

    6. Result: Dom0 boots, but RP1 and firmware clocks do not bind, so VC4/DR= M never comes up.

    Any guidance on the correct DT/Xen inte= gration model for BCM2712/RP1 would be greatly appreciated. If the= re is a reference DT, patch series, or recommended branch, I=E2=80=99d be h= appy to test and report back.

    Best regards,
    Alap

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Tue, 03 Feb 2026 22:50:31 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 07:50:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 12/16] xen/riscv: introduce sbi_set_timer() To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <2fd4da2ad7c4af2241368edba739b24d0e976552.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2fd4da2ad7c4af2241368edba739b24d0e976552.1769099885.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/sbi.h > +++ b/xen/arch/riscv/include/asm/sbi.h > @@ -29,6 +29,10 @@ > > #define SBI_EXT_BASE 0x10 > #define SBI_EXT_RFENCE 0x52464E43 > +#define SBI_EXT_TIME 0x54494D45 > + > +/* SBI function IDs for TIME extension */ > +#define SBI_EXT_TIME_SET_TIMER 0x0 Nit: Do you really mean to have the time extension IDs above ... > /* SBI function IDs for BASE extension */ > #define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 ... the base extension ones? > @@ -134,6 +138,20 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, > int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, > size_t size, unsigned long vmid); > > +/* > + * Programs the clock for next event after stime_value time. This function also > + * clears the pending timer interrupt bit. > + * If the supervisor wishes to clear the timer interrupt without scheduling the > + * next timer event, it can either request a timer interrupt infinitely far > + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer > + * interrupt by clearing sie.STIE CSR bit. > + * The stime_value parameter represents absolute time measured in ticks. > + * > + * This SBI call returns 0 upon success or an implementation specific negative > + * error code. > + */ > +extern int (*sbi_set_timer)(uint64_t stime_value); __read_mostly or even __ro_after_init? > @@ -326,6 +358,14 @@ int __init sbi_init(void) > sbi_rfence = sbi_rfence_v02; > printk("SBI v0.2 RFENCE extension detected\n"); > } > + > + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) > + { > + sbi_set_timer = sbi_set_timer_v02; > + printk("SBI v0.2 TIME extension detected\n"); Is this really relevant to log especially in release builds? IOW can this at least be downgraded to dprintk()? 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Tue, 03 Feb 2026 23:14:40 -0800 (PST) Message-ID: <0a437580-a373-4aeb-a153-b3dca0cf2bb7@suse.com> Date: Wed, 4 Feb 2026 08:14:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 1/2] xen/console: handle multiple domains using console_io hypercalls To: Stefano Stabellini Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: <20260129220858.2371938-1-stefano.stabellini@amd.com> <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 00:02, Stefano Stabellini wrote: > On Tue, 3 Feb 2026, Jan Beulich wrote: >> On 29.01.2026 23:08, Stefano Stabellini wrote: >>> @@ -555,7 +566,10 @@ static void console_switch_input(void) >>> >>> if ( next_rx++ >= max_console_rx ) >>> { >>> + nrspin_lock_irq(&console_lock); >> >> As indicated earlier, you can't know IRQ state in anything down the call >> tree from serial_rx(). > > I'll switch to the irqsave/restore versions in console_switch_input I've seen that you already sent v9, but seeing how getting the locking right has proven to be difficult, I have two more remarks towards this. 1) Can the locking additions to existing code please be split out into a separate patch? 2) As all of this is for dom0less only (for now at least), did you consider to make all of these changes dependent upon a new Kconfig option, so to avoid impacting other environments in case issues remain when this has gone in? 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Tue, 03 Feb 2026 23:27:32 -0800 (PST) Message-ID: <9396b300-2698-4bb1-a856-0a4b3bcc6e6a@suse.com> Date: Wed, 4 Feb 2026 08:27:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Ping: [XEN][PATCH v4] xen: make VMTRACE support optional From: Jan Beulich To: Tamas K Lengyel Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alexandru Isaila , Petre Pircalabu , Teddy Astie , Penny Zheng , "xen-devel@lists.xenproject.org" , Grygorii Strashko References: <20251119193120.1011448-1-grygorii_strashko@epam.com> <90ac9206-10ce-4c46-83e3-82ac8ef0d152@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <90ac9206-10ce-4c46-83e3-82ac8ef0d152@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.12.2025 11:57, Jan Beulich wrote: > On 19.11.2025 20:31, Grygorii Strashko wrote: >> From: Grygorii Strashko >> >> The VMTRACE feature is depends on Platform/Arch HW and code support and now >> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled. >> This makes VMTRACE support optional by introducing HVM Kconfig option: >> - CONFIG_VMTRACE to enable/disable the feature. >> >> Signed-off-by: Grygorii Strashko >> --- >> changes in v4: >> - format changes >> >> changes in v3: >> - drop vmtrace stubs for HVM=n case from hvm.h (VMTRACE depnds on HVM) >> - hvm_vmtrace_reset() fix return err code >> - add comment about using func declaration without definition >> >> changes in v2: >> - fix comments from Jan Beulich >> - move CONFIG_VMTRACE in HVM >> - drop HAS_VMTRACE >> >> v3: >> https://patchwork.kernel.org/project/xen-devel/patch/20251114142207.279834-1-grygorii_strashko@epam.com/ >> v2: >> https://patchwork.kernel.org/project/xen-devel/patch/20251112202442.3879997-1-grygorii_strashko@epam.com/ >> v1: >> https://patchwork.kernel.org/project/xen-devel/patch/20251031212005.1338212-1-grygorii_strashko@epam.com/ >> >> xen/arch/x86/domctl.c | 4 +++ >> xen/arch/x86/hvm/Kconfig | 12 +++++++++ >> xen/arch/x86/hvm/vmx/vmcs.c | 2 ++ >> xen/arch/x86/hvm/vmx/vmx.c | 11 ++++++++ >> xen/arch/x86/include/asm/guest-msr.h | 2 ++ >> xen/arch/x86/include/asm/hvm/hvm.h | 36 ++++++++++--------------- >> xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 2 ++ >> xen/arch/x86/mm/mem_sharing.c | 2 ++ >> xen/arch/x86/vm_event.c | 8 +++--- >> xen/common/domain.c | 10 +++++++ >> xen/common/memory.c | 6 +++++ >> xen/common/vm_event.c | 3 ++- >> xen/include/xen/domain.h | 4 +++ >> xen/include/xen/sched.h | 4 +++ >> 14 files changed, 80 insertions(+), 26 deletions(-) > > Tamas - any chance of an ack here? I guess I will time out on this early next week. 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Tue, 03 Feb 2026 23:30:28 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 08:30:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 1/4] xen/console: use ACCESS_ONCE for console_rx To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260203230757.3224547-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260203230757.3224547-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 00:07, Stefano Stabellini wrote: > There can be concurrent reads and writes to the console_rx variable so > it is prudent to use ACCESS_ONCE. > > Signed-off-by: Stefano Stabellini Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed Feb 04 07:35:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 07:35:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220091.1528806 (Exim 4.92) (envelope-from ) id 1vnXQS-0002SL-ME; Wed, 04 Feb 2026 07:35:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220091.1528806; Wed, 04 Feb 2026 07:35:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnXQS-0002SE-J5; Wed, 04 Feb 2026 07:35:48 +0000 Received: by outflank-mailman (input) for mailman id 1220091; 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While imo that should be a correct thing to do (as with > hypothetical split locks a valid GFN would really need passing in, in > order to be able to figure out which lock to use), we can't do so right > now: The lock is acquired ahead of respective checking in a number of > places, e.g. in p2m_get_gfn_type_access(). Could we convert those macros into static inlines? It's dangerous to use macros like those when the parameters are dropped, as the parameter is not evaluated at all. Thanks, Roger. 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Tue, 03 Feb 2026 23:39:05 -0800 (PST) Message-ID: <0a68463b-90e7-456f-9ec4-08d74b3714d2@suse.com> Date: Wed, 4 Feb 2026 08:39:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 2/4] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260203230757.3224547-2-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260203230757.3224547-2-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 00:07, Stefano Stabellini wrote: > Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from > global to VIRQ_DOMAIN to allow other domains to bind to it. > > Note that Linux silently falls back to polling when binding fails, which > masks the issue. > > Signed-off-by: Jason Andryuk > Signed-off-by: Stefano Stabellini > --- > xen/common/event_channel.c | 1 + > xen/drivers/char/console.c | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) The public header also needs updating then, to not leave the comment there stale. I also wonder whether "emergency" there is then still appropriate. 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=?utf-8?B?UUMxaGdieDJwUS9Vd29jVXp2bXk3dVdzc2dZeVlSSDYyQkl6eDRtUT09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: b8371a61-04e9-47a7-1b81-08de63c1ecd5 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2026 07:49:28.8401 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: msDv+i441yk2WHDoPIXCysehdENmLDqFHmSkxW91l33kc+5hI8IrigGqeHgpGxaEQ0NmsYrVW92kyA7hH+FIow== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR03MB8256 On Fri, Jan 09, 2026 at 06:07:48AM -0800, dmukhin@xen.org wrote: > From: Denis Mukhin > > Add a new symbol DOMID_ANY to improve the readability of the code. > > Update all relevant domid_alloc() call sites. > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > Signed-off-by: Denis Mukhin > --- > Changes since v3: > - new value for DOMID_ANY instead of aliasing DOMID_INVALID > - Link to v3: https://lore.kernel.org/xen-devel/20250924030630.122229-2-dmukhin@ford.com/ > --- > tools/tests/domid/harness.h | 1 + > tools/tests/domid/test-domid.c | 12 ++++++------ > xen/common/device-tree/dom0less-build.c | 2 +- > xen/common/domctl.c | 2 +- > xen/common/domid.c | 2 +- > xen/include/public/xen.h | 5 +++++ > 6 files changed, 15 insertions(+), 9 deletions(-) > > diff --git a/tools/tests/domid/harness.h b/tools/tests/domid/harness.h > index 17eb22a9a854..65da0d075a2b 100644 > --- a/tools/tests/domid/harness.h > +++ b/tools/tests/domid/harness.h > @@ -41,6 +41,7 @@ extern unsigned long find_next_zero_bit(const unsigned long *addr, > > #define DOMID_FIRST_RESERVED (100) > #define DOMID_INVALID (101) > +#define DOMID_ANY (102) > > #endif /* _TEST_HARNESS_ */ > > diff --git a/tools/tests/domid/test-domid.c b/tools/tests/domid/test-domid.c > index 5915c4699a5c..71cc4e7fd86d 100644 > --- a/tools/tests/domid/test-domid.c > +++ b/tools/tests/domid/test-domid.c > @@ -41,20 +41,20 @@ int main(int argc, char **argv) > domid_free(expected); > > /* > - * Test that that two consecutive calls of domid_alloc(DOMID_INVALID) > + * Test that that two consecutive calls of domid_alloc(DOMID_ANY) > * will never return the same ID. > * NB: ID#0 is reserved and shall not be allocated by > - * domid_alloc(DOMID_INVALID). > + * domid_alloc(DOMID_ANY). > */ > for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) > { > - allocated = domid_alloc(DOMID_INVALID); > + allocated = domid_alloc(DOMID_ANY); > verify(allocated == expected, > "TEST 3: expected %u allocated %u\n", expected, allocated); > } > for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) > { > - allocated = domid_alloc(DOMID_INVALID); > + allocated = domid_alloc(DOMID_ANY); > verify(allocated == DOMID_INVALID, > "TEST 4: expected %u allocated %u\n", DOMID_INVALID, allocated); > } > @@ -64,7 +64,7 @@ int main(int argc, char **argv) > domid_free(expected); > for ( expected = 1; expected < DOMID_FIRST_RESERVED / 2; expected++ ) > { > - allocated = domid_alloc(DOMID_INVALID); > + allocated = domid_alloc(DOMID_ANY); > verify(allocated == expected, > "TEST 5: expected %u allocated %u\n", expected, allocated); > } > @@ -72,7 +72,7 @@ int main(int argc, char **argv) > /* Re-allocate last ID from [1..DOMID_FIRST_RESERVED - 1]. */ > expected = DOMID_FIRST_RESERVED - 1; > domid_free(DOMID_FIRST_RESERVED - 1); > - allocated = domid_alloc(DOMID_INVALID); > + allocated = domid_alloc(DOMID_ANY); > verify(allocated == expected, > "TEST 6: expected %u allocated %u\n", expected, allocated); > > diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c > index 495ef7b16aa0..9130c38681df 100644 > --- a/xen/common/device-tree/dom0less-build.c > +++ b/xen/common/device-tree/dom0less-build.c > @@ -842,7 +842,7 @@ void __init create_domUs(void) > if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) > panic("No more domain IDs available\n"); > > - domid = domid_alloc(DOMID_INVALID); > + domid = domid_alloc(DOMID_ANY); > if ( domid == DOMID_INVALID ) > panic("Error allocating ID for domain %s\n", dt_node_name(node)); > > diff --git a/xen/common/domctl.c b/xen/common/domctl.c > index 29a7726d32d0..e2c8990531ad 100644 > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -410,7 +410,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) > case XEN_DOMCTL_createdomain: > { > /* NB: ID#0 is reserved, find the first suitable ID instead. */ > - domid_t domid = domid_alloc(op->domain ?: DOMID_INVALID); > + domid_t domid = domid_alloc(op->domain ?: DOMID_ANY); I don't think you need to do it here, but you want to check the parameter passed to domid_alloc(). It should return an error if: domid >= DOMID_FIRST_RESERVED && domid != DOMID_ANY > > if ( domid == DOMID_INVALID ) > { > diff --git a/xen/common/domid.c b/xen/common/domid.c > index 2387ddb08300..76b7f3e7ae6e 100644 > --- a/xen/common/domid.c > +++ b/xen/common/domid.c > @@ -19,7 +19,7 @@ static DECLARE_BITMAP(domid_bitmap, DOMID_FIRST_RESERVED); > * @param domid Domain ID hint: > * - If an explicit domain ID is provided, verify its availability and use it > * if ID is not used; > - * - If DOMID_INVALID is provided, search [1..DOMID_FIRST_RESERVED-1] range, > + * - If DOMID_ANY is provided, search [1..DOMID_FIRST_RESERVED-1] range, > * starting from the last used ID. Implementation guarantees that two > * consecutive calls will never return the same ID. ID#0 is reserved for > * the first boot domain (currently, dom0) and excluded from the allocation > diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h > index 7f15204c3885..b5789c32ae1f 100644 > --- a/xen/include/public/xen.h > +++ b/xen/include/public/xen.h > @@ -608,6 +608,11 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); > /* DOMID_INVALID is used to identify pages with unknown owner. */ > #define DOMID_INVALID xen_mk_uint(0x7FF4) > > +#if defined(__XEN__) || defined(__XEN_TOOLS__) > +/* Domain ID allocator: search [1..DOMID_FIRST_RESERVED-1] range. */ > +#define DOMID_ANY xen_mk_uint(0x7FF5) > +#endif I would attempt to word the comment in a more generic way. While this is now only used for the domain ID allocator, it's likely to gain more uses going forward (Juergen already expressed interest): "DOMID_ANY is used to signal no specific domid requested. Handler should pick a valid domid, or handle it as a broadcast value depending on the context." Also, I would remove the tools guards, I think once a DOMID_ constant is allocated it becomes part of the public ABI, and it cannot be withdrawn. See for example DOMID_IDLE: it's only used internally in the hypervisor AFAICT, yet the define is fully visible in the headers. Thanks, Roger. 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Tue, 03 Feb 2026 23:49:55 -0800 (PST) Message-ID: <40707659-0365-469d-ac29-2b558d423b24@suse.com> Date: Wed, 4 Feb 2026 08:49:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/P2M: correct type use in p2m_put_gfn() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <1ecefc98-f1c2-4116-95bf-a86c3b066843@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 08:35, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 03:01:27PM +0100, Jan Beulich wrote: >> Everywhere else gfn_t are passed into respective GFN locking macros: Do so >> here as well. >> >> Amends: 819cdc5a7301 ("x86/p2m: re-arrange {,__}put_gfn()") >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- >> Easy to spot by adding ASSERT(!gfn_eq(g, INVALID_GFN)) to the respective >> macros. While imo that should be a correct thing to do (as with >> hypothetical split locks a valid GFN would really need passing in, in >> order to be able to figure out which lock to use), we can't do so right >> now: The lock is acquired ahead of respective checking in a number of >> places, e.g. in p2m_get_gfn_type_access(). > > Could we convert those macros into static inlines? It's dangerous to > use macros like those when the parameters are dropped, as the > parameter is not evaluated at all. It is. Seeing how the header is used, converting may be possible. There's one slight concern I'd have with doing so: It would move us one step closer to giving the impression that the arguments passed are correct at all use sites (while as long as they're entirely ignored, that's kind of a hint that they may need checking). I can't point at it right now, but I'm pretty sure I had come across at least one place where they're pretty clearly wrong. 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Smith" Subject: RE: [PATCH v4 14/24] xen/domctl: wrap pci-subset iommu-related domctl op with CONFIG_MGMT_HYPERCALLS Thread-Topic: [PATCH v4 14/24] xen/domctl: wrap pci-subset iommu-related domctl op with CONFIG_MGMT_HYPERCALLS Thread-Index: AQHcWtXdwWaFTRetvk29bNPbH/CVXLVylQnw Date: Wed, 4 Feb 2026 07:50:35 +0000 Message-ID: References: <20251121105801.1251262-1-Penny.Zheng@amd.com> <20251121105801.1251262-15-Penny.Zheng@amd.com> In-Reply-To: <20251121105801.1251262-15-Penny.Zheng@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Enabled=True;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SetDate=2026-02-04T07:50:25.0000000Z;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Name=Open Source;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_ContentBits=3;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Method=Privileged authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB8451.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8343c4b6-3a97-4f5f-3d48-08de63c214c5 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Feb 2026 07:50:35.6218 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WD8aoszFwMwmxZgIEmnJ4+fGuDe1vOkzf3proTNQAK0h/CtydLrMEaXrxG1j93w0Ga6LxfffQbnGVwGXpmQ6dA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB9527 [Public] > -----Original Message----- > From: Penny, Zheng > Sent: Friday, November 21, 2025 6:58 PM > To: xen-devel@lists.xenproject.org > Cc: Huang, Ray ; grygorii_strashko@epam.com; Penny, > Zheng ; Jan Beulich ; Andrew > Cooper ; Roger Pau Monn=E9 ; > Andryuk, Jason ; Daniel P. Smith > > Subject: [PATCH v4 14/24] xen/domctl: wrap pci-subset iommu-related domct= l op > with CONFIG_MGMT_HYPERCALLS > > Function iommu_do_pci_domctl() is the main entry for pci-subset iommu-rel= ated > domctl-op, and shall be wrapped with CONFIG_MGMT_HYPERCALLS. > Tracking its calling chain, the following functions shall all be wrapped = with > CONFIG_MGMT_HYPERCALLS: > - iommu_do_pci_domctl > - iommu_get_device_group > - xsm_get_device_group > - iommu_ops.get_device_group_id > - amd_iommu_group_id/intel_iommu_group_id > - device_assigned > - xsm_assign_device > - assign_device > - iommu_ops.assign_device > - intel_iommu_assign_device/amd_iommu_assign_device > - xsm_deassign_device > - deassign_device > - iommu_ops.reassign_device > - reassign_device_ownership/reassign_device > Otherwise all the functions will become unreachable when > MGMT_HYPERCALLS=3Dn, and hence violating Misra rule 2.1 > > Signed-off-by: Penny Zheng > --- > v1 -> v2: > - adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS" > - wrap XEN_DOMCTL_assign_device{test_assign_device,deassign_device, > get_device_group}-case transiently > --- > v2 -> v3: > - make PCI_PASSTHROUGH(, then HAS_VPCI_GUEST_SUPPORT) depend on > MGMT_HYPERCALLS > - add wrapping for > iommu_remove_dt_device/iommu_dt_device_is_assigned_locked/ > arm_smmu_detach_dev/arm_smmu_domain_remove_master > - fold commit > "xen/xsm: wrap xsm-iommu-related functions with > CONFIG_MGMT_HYPERCALLS" in > - fix overly long #ifdef > - add missing wrapping in xsm/dummy.h > - address "violating Misra rule 2.1" in commit message > - remove transient wrapping of > XEN_DOMCTL_assign_device{test_assign_device,deassign_device,get_device_gr > oup}-case > --- > v3 -> v4: > - move codes to wrap with a single #ifdef > - split into PCI related subset and DT subset > --- > xen/drivers/passthrough/amd/pci_amd_iommu.c | 20 ++++---- > xen/drivers/passthrough/pci.c | 52 +++++++++++---------- > xen/drivers/passthrough/vtd/iommu.c | 6 ++- > xen/include/xsm/dummy.h | 6 ++- > xen/include/xsm/xsm.h | 12 +++-- > xen/xsm/dummy.c | 6 ++- > xen/xsm/flask/hooks.c | 12 +++-- > 7 files changed, 68 insertions(+), 46 deletions(-) > > diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c > b/xen/drivers/passthrough/amd/pci_amd_iommu.c > index 3a14770855..576b36af92 100644 > --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c > +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c > @@ -461,6 +461,7 @@ static void amd_iommu_disable_domain_device(const > struct domain *domain, > spin_unlock_irqrestore(&iommu->lock, flags); } > > +#ifdef CONFIG_MGMT_HYPERCALLS > static int cf_check reassign_device( > struct domain *source, struct domain *target, u8 devfn, > struct pci_dev *pdev) > @@ -551,6 +552,14 @@ static int cf_check amd_iommu_assign_device( > return rc; > } > > +static int cf_check amd_iommu_group_id(u16 seg, u8 bus, u8 devfn) { > + unsigned int bdf =3D PCI_BDF(bus, devfn); > + > + return (bdf < ivrs_bdf_entries) ? get_dma_requestor_id(seg, bdf) : > +bdf; } #endif /* CONFIG_MGMT_HYPERCALLS */ > + > static void cf_check amd_iommu_clear_root_pgtable(struct domain *d) { > struct domain_iommu *hd =3D dom_iommu(d); @@ -698,13 +707,6 @@ stati= c int > cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev) > return 0; > } > > -static int cf_check amd_iommu_group_id(u16 seg, u8 bus, u8 devfn) -{ > - unsigned int bdf =3D PCI_BDF(bus, devfn); > - > - return (bdf < ivrs_bdf_entries) ? get_dma_requestor_id(seg, bdf) : b= df; > -} > - > #include > > static void amd_dump_page_table_level(struct page_info *pg, int level, @= @ - > 772,14 +774,16 @@ static const struct iommu_ops __initconst_cf_clobber > _iommu_ops =3D { > .quarantine_init =3D amd_iommu_quarantine_init, > .add_device =3D amd_iommu_add_device, > .remove_device =3D amd_iommu_remove_device, > - .assign_device =3D amd_iommu_assign_device, > .teardown =3D amd_iommu_domain_destroy, > .clear_root_pgtable =3D amd_iommu_clear_root_pgtable, > .map_page =3D amd_iommu_map_page, > .unmap_page =3D amd_iommu_unmap_page, > .iotlb_flush =3D amd_iommu_flush_iotlb_pages, > +#ifdef CONFIG_MGMT_HYPERCALLS > + .assign_device =3D amd_iommu_assign_device, > .reassign_device =3D reassign_device, > .get_device_group_id =3D amd_iommu_group_id, > +#endif FWIS, Alejandro has come up a more clever way to DCE these kinds of op, sta= ying conditionally as callback. Here, I just took this commit as example to= show the methodology: ``` .assign_device =3D IS_ENABLED(CONFIG_MGMT_HYPERCALLS) ? amd_iommu_assign_device : NULL, ``` The compiler has enough visibility to know that static(amd_iommu_assign_dev= ice()) is used, and is droppable when MGMT_HYPERCALLS=3Dn. So there is no n= eed to do ifdef-wrapping around these statics now. Later when jason's "--gc= -section" patch serie in, --gc-section will help linker identify them unus= ed when MGMT_HYPERCALLS=3Dn, then remove them automatically. If we all agreed to use above methodology to do DCE. Alejandro also recommended that since we will do this assignments in enough= places in this patch serie, we probably want something like MAYBE_OP() som= ewhere in xen/macros.h: #define MAYBE_OP(c, fn) (IS_ENABLED(c) ? fn : NULL) I'd like to listen from your opinions on whether I shall do such update for= v5, since it is quite a big update > diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c index 9774bb3bdb..0026a096= 3b > 100644 > --- a/xen/xsm/dummy.c > +++ b/xen/xsm/dummy.c > @@ -80,11 +80,13 @@ static const struct xsm_ops __initconst_cf_clobber > dummy_ops =3D { > .pci_config_permission =3D xsm_pci_config_permission, > .get_vnumainfo =3D xsm_get_vnumainfo, > > -#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI) > +#if defined(CONFIG_HAS_PASSTHROUGH) && > defined(CONFIG_MGMT_HYPERCALLS) > +#ifdef CONFIG_HAS_PCI > .get_device_group =3D xsm_get_device_group, > .assign_device =3D xsm_assign_device, > .deassign_device =3D xsm_deassign_device, > -#endif The same thing we shall do for XSM-changes too: .get_device_group =3D IS_ENABLED(CONFIG_MGMT_HYPERCALL= S) ? xsm_get_device_group : NULL, Many thanks Penny Zheng From xen-devel-bounces@lists.xenproject.org Wed Feb 04 07:55:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 07:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220139.1528856 (Exim 4.92) (envelope-from ) id 1vnXj8-0007oY-25; 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While imo that should be a correct thing to do (as with > >> hypothetical split locks a valid GFN would really need passing in, in > >> order to be able to figure out which lock to use), we can't do so right > >> now: The lock is acquired ahead of respective checking in a number of > >> places, e.g. in p2m_get_gfn_type_access(). > > > > Could we convert those macros into static inlines? It's dangerous to > > use macros like those when the parameters are dropped, as the > > parameter is not evaluated at all. > > It is. Seeing how the header is used, converting may be possible. There's > one slight concern I'd have with doing so: It would move us one step > closer to giving the impression that the arguments passed are correct at > all use sites (while as long as they're entirely ignored, that's kind of > a hint that they may need checking). I can't point at it right now, but > I'm pretty sure I had come across at least one place where they're pretty > clearly wrong. Well, having at least the type check is better than not checking anything at all. By clearly wrong you mean passing INVALID_GFN, or a random GFN that had something do to with the context? Thanks, Roger. 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Tue, 03 Feb 2026 23:56:13 -0800 (PST) Message-ID: <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> Date: Wed, 4 Feb 2026 08:56:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmukhin@xen.org Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com References: <20260109140747.195460-2-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 08:49, Roger Pau Monné wrote: > On Fri, Jan 09, 2026 at 06:07:48AM -0800, dmukhin@xen.org wrote: >> --- a/xen/include/public/xen.h >> +++ b/xen/include/public/xen.h >> @@ -608,6 +608,11 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); >> /* DOMID_INVALID is used to identify pages with unknown owner. */ >> #define DOMID_INVALID xen_mk_uint(0x7FF4) >> >> +#if defined(__XEN__) || defined(__XEN_TOOLS__) >> +/* Domain ID allocator: search [1..DOMID_FIRST_RESERVED-1] range. */ >> +#define DOMID_ANY xen_mk_uint(0x7FF5) >> +#endif > > I would attempt to word the comment in a more generic way. While this > is now only used for the domain ID allocator, it's likely to gain more > uses going forward (Juergen already expressed interest): > > "DOMID_ANY is used to signal no specific domid requested. Handler > should pick a valid domid, or handle it as a broadcast value depending > on the context." +1 > Also, I would remove the tools guards, I think once a DOMID_ constant > is allocated it becomes part of the public ABI, and it cannot be > withdrawn. See for example DOMID_IDLE: it's only used internally in > the hypervisor AFAICT, yet the define is fully visible in the > headers. It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps others) not being guarded (at least for IDLE: by just __XEN__) imo was a mistake. That mistake may in fact be correctable, if we could prove that the ID cannot usefully be passed into anywhere. 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Wed, 04 Feb 2026 00:00:42 -0800 (PST) Message-ID: <9675c989-3f25-4d8e-b16d-0fb27436ce1d@suse.com> Date: Wed, 4 Feb 2026 09:00:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/P2M: correct type use in p2m_put_gfn() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <1ecefc98-f1c2-4116-95bf-a86c3b066843@suse.com> <40707659-0365-469d-ac29-2b558d423b24@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 08:54, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 08:49:53AM +0100, Jan Beulich wrote: >> On 04.02.2026 08:35, Roger Pau Monné wrote: >>> On Tue, Feb 03, 2026 at 03:01:27PM +0100, Jan Beulich wrote: >>>> --- >>>> Easy to spot by adding ASSERT(!gfn_eq(g, INVALID_GFN)) to the respective >>>> macros. While imo that should be a correct thing to do (as with >>>> hypothetical split locks a valid GFN would really need passing in, in >>>> order to be able to figure out which lock to use), we can't do so right >>>> now: The lock is acquired ahead of respective checking in a number of >>>> places, e.g. in p2m_get_gfn_type_access(). >>> >>> Could we convert those macros into static inlines? It's dangerous to >>> use macros like those when the parameters are dropped, as the >>> parameter is not evaluated at all. >> >> It is. Seeing how the header is used, converting may be possible. There's >> one slight concern I'd have with doing so: It would move us one step >> closer to giving the impression that the arguments passed are correct at >> all use sites (while as long as they're entirely ignored, that's kind of >> a hint that they may need checking). I can't point at it right now, but >> I'm pretty sure I had come across at least one place where they're pretty >> clearly wrong. > > Well, having at least the type check is better than not checking > anything at all. By clearly wrong you mean passing INVALID_GFN, or a > random GFN that had something do to with the context? What I seem to recall is a bogus order value being passed somewhere. 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Smith" , "xen-devel@lists.xenproject.org" , "Garcia Vallejo, Alejandro" , "Stabellini, Stefano" References: <20251121105801.1251262-1-Penny.Zheng@amd.com> <20251121105801.1251262-15-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 08:50, Penny, Zheng wrote: >> -----Original Message----- >> From: Penny, Zheng >> Sent: Friday, November 21, 2025 6:58 PM >>[...] >> 772,14 +774,16 @@ static const struct iommu_ops __initconst_cf_clobber >> _iommu_ops = { >> .quarantine_init = amd_iommu_quarantine_init, >> .add_device = amd_iommu_add_device, >> .remove_device = amd_iommu_remove_device, >> - .assign_device = amd_iommu_assign_device, >> .teardown = amd_iommu_domain_destroy, >> .clear_root_pgtable = amd_iommu_clear_root_pgtable, >> .map_page = amd_iommu_map_page, >> .unmap_page = amd_iommu_unmap_page, >> .iotlb_flush = amd_iommu_flush_iotlb_pages, >> +#ifdef CONFIG_MGMT_HYPERCALLS >> + .assign_device = amd_iommu_assign_device, >> .reassign_device = reassign_device, >> .get_device_group_id = amd_iommu_group_id, >> +#endif > > FWIS, Alejandro has come up a more clever way to DCE these kinds of op, staying conditionally as callback. Here, I just took this commit as example to show the methodology: > ``` > .assign_device = IS_ENABLED(CONFIG_MGMT_HYPERCALLS) > ? amd_iommu_assign_device > : NULL, > ``` > The compiler has enough visibility to know that static(amd_iommu_assign_device()) is used, and is droppable when MGMT_HYPERCALLS=n. So there is no need to do ifdef-wrapping around these statics now. Later when jason's "--gc-section" patch serie in, --gc-section will help linker identify them unused when MGMT_HYPERCALLS=n, then remove them automatically. I fear I don't see why --gc-sections would make a difference when, for static functions, the compiler already is in the position of removing the functions. > If we all agreed to use above methodology to do DCE. > Alejandro also recommended that since we will do this assignments in enough places in this patch serie, we probably want something like MAYBE_OP() somewhere in xen/macros.h: > > #define MAYBE_OP(c, fn) (IS_ENABLED(c) ? fn : NULL) > > I'd like to listen from your opinions on whether I shall do such update for v5, since it is quite a big update Well, already there I did raise my concern of leaving around function pointer fields in structures which will only ever be NULL. If respective fields are removed altogether, there's no risk whatsoever that an accidental use may be overlooked - the build would simply fail when making such an attempt. Calls through NULL are privilege escalation XSAs when PV guests can somehow leverage them, and use of altcall patching would still only downgrade them to DoS XSAs. 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Wed, 04 Feb 2026 00:13:30 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 09:13:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/16] xen/time: move ticks<->ns helpers to common code From: Jan Beulich To: Oleksii Kurochko Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Connor Davis , Romain Caritey , xen-devel@lists.xenproject.org References: <2ff79945-f972-49ae-b50a-a7bbff9d4aa9@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2ff79945-f972-49ae-b50a-a7bbff9d4aa9@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.01.2026 09:48, Jan Beulich wrote: > On 22.01.2026 17:47, Oleksii Kurochko wrote: >> ticks_to_ns() and ns_to_ticks() are not architecture-specific, so provide a >> common implementation that is more resilient to overflow than the historical >> Arm version. This is not a practical issue for Arm, as the latest ARM ARM >> that timer frequency should be fixed at 1 GHz and older platforms used much >> lower rates, which is shy of 32-bit overflow. As the helpers are declared >> as static inline, they should not affect x86, which does not use them. >> >> On Arm, these helpers were historically implemented as out-of-line functions >> because the counter frequency was originally defined as static and unavailable >> to headers [1]. Later changes [2] removed this restriction, but the helpers >> remained unchanged. Now they can be implemented as static inline without any >> issues. >> >> Centralising the helpers avoids duplication and removes subtle differences >> between architectures while keeping the implementation simple. >> >> Drop redundant includes where already pulls it in. >> >> No functional change is intended. >> >> [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 >> [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and >> XEN_SYSCTL_topologyinfo to common code >> >> Signed-off-by: Oleksii Kurochko >> Suggested-by: Jan Beulich > > Nit: Flip the two (chronological order). > > Reviewed-by: Jan Beulich Btw, if this got the necessary Arm ack, I think it could also go in ahead of all earlier patches in the series? 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X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000044.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR08MB8822 Hi Jan, > On 14 Jan 2026, at 15:03, Jan Beulich wrote: >=20 > Its inclusion placed where it is, it affects the hypervisor build as well= . > The hypervisor build, in its _install rule, uses $(DEBUG_DIR), first in >=20 > [ -d "$(D)$(DEBUG_DIR)" ] || $(INSTALL_DIR) $(D)$(DEBUG_DIR) >=20 > $(D) is an absolute directory (shorthand for $(DESTDIR)). $(DEBUG_DIR) as > set by Paths.mk is, too. Both point into the build tree. The two simply > shouldn't be glued together. >=20 > Note that the earlier >=20 > [ -d $(D)$(BOOT_DIR) ] || $(INSTALL_DIR) $(D)$(BOOT_DIR) >=20 > continues to be working fine, as BOOT_DIR continues to be controlled by > config/StdGNU.mk. Its DEBUG_DIR isn't taking effect anymore, when for the > hypervisor build it should. >=20 > And of course behavior now differs between building xen/ in a tree where > tools/ was built before vs in an otherwise clean tree. >=20 > Fixes: 82b9cc04a7c7 ("build: add make macro for making file from file.in"= ) > Signed-off-by: Jan Beulich I did a bit more testing and checking and as far as i can tell this works. As I am confident the cases i did not cover during my testing will be cover= ed by CI: Reviewed-by: Bertrand Marquis Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Wed Feb 04 08:41:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 08:41:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220220.1528926 (Exim 4.92) (envelope-from ) id 1vnYS7-0002iK-93; Wed, 04 Feb 2026 08:41:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220220.1528926; Wed, 04 Feb 2026 08:41:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnYS7-0002iD-63; Wed, 04 Feb 2026 08:41:35 +0000 Received: by outflank-mailman (input) for mailman id 1220220; Wed, 04 Feb 2026 08:41:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnYS6-0002i7-27 for xen-devel@lists.xenproject.org; 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On 64bit PV guests the >> start_info field is 64bits wide. HVM guests don't use start_info at all. >> >> Limit the allocation address restriction to 32bit PV guests only. >> >> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") >> Signed-off-by: Roger Pau Monné >> --- >> xen/arch/x86/domain.c | 9 ++++++--- >> 1 file changed, 6 insertions(+), 3 deletions(-) >> >> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >> index edb76366b596..4163568043b1 100644 >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -882,10 +882,13 @@ int arch_domain_create(struct domain *d, >> goto fail; >> >> /* >> - * The shared_info machine address must fit in a 32-bit field within a >> - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). >> + * For 32bit PV guests the shared_info machine address must fit in a 32-bit >> + * field within the guest's start_info structure. Hence we specify >> + * MEMF_bits(32). >> */ >> - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) >> + if ( (d->shared_info = >> + alloc_xenheap_pages(0, is_pv_32bit_domain(d) ? MEMF_bits(32) >> + : 0)) == NULL ) > Sorry, this is wrong, it's too early to know whether the domain is 32 > or 64bit. It's probably fine to have this become an unrestricted xenhelp allocation, and for switch_compat() to make a restricted allocation and copy. When constructing a PV32 guest in practice, the set_compat hypercall is only moments after from the domain create, and it doesn't matter if we discover lowmem exhaustion marginally later That way we don't have a PV32-ism continuing to impact the all VMs. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 04 08:53:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 08:53:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220231.1528937 (Exim 4.92) (envelope-from ) id 1vnYdJ-0004ku-8g; Wed, 04 Feb 2026 08:53:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220231.1528937; Wed, 04 Feb 2026 08:53:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnYdJ-0004kn-4a; Wed, 04 Feb 2026 08:53:09 +0000 Received: by outflank-mailman (input) for mailman id 1220231; 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Date: Wed, 4 Feb 2026 09:52:56 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Jan Beulich Subject: Re: [PATCH] x86/domain: adjust limitation on shared_info allocation below 4G Message-ID: References: <20260203101017.56962-1-roger.pau@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: MR1P264CA0219.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:56::17) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|DSWPR03MB989106:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a3d0f43-83ca-4978-3b90-08de63cacc2a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016; X-Microsoft-Antispam-Message-Info: =?utf-8?B?U2lvTHZHWE9GdUhGajF5c25QeGZTMm9GaVBJZjVkc3U2M2tiS09sWWRzM2F4?= =?utf-8?B?SVZmSkR4b3JaUVpSUnVwb1lSei9UdmtDNWl0dU1lRDAxYlZPa0p6U0NLVXZ2?= =?utf-8?B?bisyTU9sOW5aRTI3ZWJpdUxYa3d6TTlGMnowTXNFSHdyaHo5RjAyMzJQOTJF?= =?utf-8?B?OVRHbFZ2MGxSVUYxd3RiTU9taDY3a0E2cms4Z3hGT3Y1d2VROHBhekNnb1dh?= =?utf-8?B?NFJDRVVmcThGZEh2c2l3RjVwSlM0ei80ckFvY1hiVE5NMGZmZDVZM0FVVVZM?= =?utf-8?B?b1RzUjByOG5wa3ltbU1HOE04cVZONGY0OVBISFRZVnFCeERmRS9WRkQvaGdX?= =?utf-8?B?c3Y4V1J0NFgvUWQyS1VLYzU3RWlYOFB3WjJNMEVnaElmZUdGQkQ2dDcwRW41?= =?utf-8?B?d2dieDNwcVRoTmphVVpRYkNxK0VYWlJNUGRIVnJlV01KY2ZHeTFyZkhnK3Bi?= =?utf-8?B?am1oWHU3ZXlvcFJjUzZ2bnRzRTlkOEYzVU1xSTFhL0s1VUZDQjJra3BRenVU?= =?utf-8?B?UzhXZTBXblk3SVg0L1l4eFM2c0FnSUtoMnF0eWwxSlBMRXVOQXBhSGpZU05p?= =?utf-8?B?amV6MThodkw5R0FNNVdqYTJLSHBSUXBVU0JPRmIyVU5ZRkE1SU9OTWluMytX?= =?utf-8?B?b2NIWmdGYW9jbVlxQzlOcjh3NWQyWUdCbWVVVHorWHFHSXl4REJZWlRleEIy?= =?utf-8?B?YUtqYXE4bEJtcnd2STl6cmFwc3pIRTFIZ0FLbnRFVmtIZFpuellmRlhDQkli?= =?utf-8?B?K3JyUXVJa0RpUHdIU3lTeW52aGFDNm10dmJBRVNIa1dQSWQ1bG44REdUV1Bk?= =?utf-8?B?Q1NNV0ZTU0NIY1lRSUdKdGthVjVPSlNtNm1zK3A5TDI2ZWFqWE9IcjZyczB5?= =?utf-8?B?VGVXckxZMUY0VURpZjgwbnpOU1Fia01ib2x2dEdLbGJGMUljVGluK2ZXTHJr?= =?utf-8?B?bmQ4LzcvZUxjUStZZWNxd0RYNndiazd2WkNSQkV0WjEvSHE2b2lhOEpjcVZS?= =?utf-8?B?TDdiRTY5UEE2cHVmSExPcSt1UkRSM0xyQXh2ZnhLcHcvd2VZRVdrQ0dwMTJL?= =?utf-8?B?NGlaM3B3bHJvVzZyc2d4ZTlFUSt3MzJyNGZ0TWhHYVVzbnh3eWsyRWgvUlJR?= =?utf-8?B?MHBpRDh5RWpWdVhKQlBpM2hJVXlhMTNOUHAvTzBveCtzbWZpVlk0SVJjeTRx?= =?utf-8?B?cElNYnljQ2d5T3pneVRlZ0hueFFqY1l5YVk5UFJaMXpsTFdrbEw4VTZndFc5?= =?utf-8?B?ZGVYcm8yaHhKRVhvOWNhaU5UbGtzaDlLOWZFVEg5OUswaFZIVVpmSkdqZVBK?= =?utf-8?B?V1BZVUYxKzJuSnUwTU1NWHhaTGRtMFI2dnI5bUwyUlhRTVhvTmVMdkdvWXhi?= =?utf-8?B?dWhrdHhXU0thMm85bmR2Qm1KR2V2MkxibDNOdk5vQTE3R3JRMlRUL0RxUWgw?= =?utf-8?B?NnR2TjByajh6Q0JCRXFaaWx6cVptWjNrOURITGcrZmcrYmxVQk9iVkxMOHpT?= =?utf-8?B?RlMrUkFNcTNGTXdJUzRlazgzd2gzMktMaUlxSExERkF4eU5zRlZMMTZFNWRt?= =?utf-8?B?M2tnZlZsVUg4ZXRPKzFMcXJLMkxGRjYvWnVhUXlhY2IrOFB3T2trQnBTWnpD?= =?utf-8?B?OVdyeVRHakZUczI0aVZpbWlLaFNMY09QczRrZWZsSG1RNzZlcmxFcHdNUlhR?= =?utf-8?B?L3BEanViZlRyUmcySldxMTl4TGRDOEtpT2tJSyt0TkJwMUZ1ZmIxblJCNmNU?= =?utf-8?B?a2lWc3lQL1F0Nmt5Z1p0dlB0UXJDdjVrdVRHendDdElXZ3gvRlRvY1A0SGty?= =?utf-8?B?Z3lGa1AvT3RqT3UrUUZubmFTN0UvZ29CR2hTTHNMR0ozWGxaWUF2bm5wRjE2?= =?utf-8?B?c3hIWDZvSWptQ2dLcEwrUzc5TEhpZVEvM1l6Q01sYU9lTVRtNWpQQVAvYkFr?= =?utf-8?B?eGNNRkxBV3NwNzMvRGRvSXJxOWZlOUVpMndiOFh2elRMUDBpRHVMcm82aTRv?= =?utf-8?B?RXIxRXBqNXZkeGE5MHMzVC9velhWT25ub1RTQWJGMW9TT05Db21JT3R3Tytu?= =?utf-8?B?QzBCbFNlZGM1dUZEeElvWEIvRGRESW1WcWJrSG1qNmF3b0lXczJFODIxcjhH?= =?utf-8?Q?sbTs=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016);DIR:OUT;SFP:1101; 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On 64bit PV guests the > >> start_info field is 64bits wide. HVM guests don't use start_info at all. > >> > >> Limit the allocation address restriction to 32bit PV guests only. > >> > >> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > >> Signed-off-by: Roger Pau Monné > >> --- > >> xen/arch/x86/domain.c | 9 ++++++--- > >> 1 file changed, 6 insertions(+), 3 deletions(-) > >> > >> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > >> index edb76366b596..4163568043b1 100644 > >> --- a/xen/arch/x86/domain.c > >> +++ b/xen/arch/x86/domain.c > >> @@ -882,10 +882,13 @@ int arch_domain_create(struct domain *d, > >> goto fail; > >> > >> /* > >> - * The shared_info machine address must fit in a 32-bit field within a > >> - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). > >> + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > >> + * field within the guest's start_info structure. Hence we specify > >> + * MEMF_bits(32). > >> */ > >> - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) > >> + if ( (d->shared_info = > >> + alloc_xenheap_pages(0, is_pv_32bit_domain(d) ? MEMF_bits(32) > >> + : 0)) == NULL ) > > Sorry, this is wrong, it's too early to know whether the domain is 32 > > or 64bit. > > It's probably fine to have this become an unrestricted xenhelp > allocation, and for switch_compat() to make a restricted allocation and > copy. Yeah, that's what I'm doing. It turns out to be a bit more complicated that I originally anticipated, because you also need to reset the v->vcpu_info_area.map filed to point to the new page. > When constructing a PV32 guest in practice, the set_compat hypercall is > only moments after from the domain create, and it doesn't matter if we > discover lowmem exhaustion marginally later > > That way we don't have a PV32-ism continuing to impact the all VMs. Indeed, that's my approach, just took me a bit more than expected because of the already taken references to the shared_info page by the time switch_compat() is executed. Regards, Roger. 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> >> /* DOMID_INVALID is used to identify pages with unknown owner. */ > >> #define DOMID_INVALID xen_mk_uint(0x7FF4) > >> > >> +#if defined(__XEN__) || defined(__XEN_TOOLS__) > >> +/* Domain ID allocator: search [1..DOMID_FIRST_RESERVED-1] range. */ > >> +#define DOMID_ANY xen_mk_uint(0x7FF5) > >> +#endif > > > > I would attempt to word the comment in a more generic way. While this > > is now only used for the domain ID allocator, it's likely to gain more > > uses going forward (Juergen already expressed interest): > > > > "DOMID_ANY is used to signal no specific domid requested. Handler > > should pick a valid domid, or handle it as a broadcast value depending > > on the context." > > +1 > > > Also, I would remove the tools guards, I think once a DOMID_ constant > > is allocated it becomes part of the public ABI, and it cannot be > > withdrawn. See for example DOMID_IDLE: it's only used internally in > > the hypervisor AFAICT, yet the define is fully visible in the > > headers. > > It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps > others) not being guarded (at least for IDLE: by just __XEN__) imo was a > mistake. That mistake may in fact be correctable, if we could prove that > the ID cannot usefully be passed into anywhere. Even if it's not passed into anything, does it make sense to guard them? The reserved domid values are already consumed, ie: cannot be reused in any way. It just seem to me like more ifdefery churn for no specific benefit. Thanks, Roger. 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This is not a practical issue for Arm, as the latest ARM ARM >>> that timer frequency should be fixed at 1 GHz and older platforms used much >>> lower rates, which is shy of 32-bit overflow. As the helpers are declared >>> as static inline, they should not affect x86, which does not use them. >>> >>> On Arm, these helpers were historically implemented as out-of-line functions >>> because the counter frequency was originally defined as static and unavailable >>> to headers [1]. Later changes [2] removed this restriction, but the helpers >>> remained unchanged. Now they can be implemented as static inline without any >>> issues. >>> >>> Centralising the helpers avoids duplication and removes subtle differences >>> between architectures while keeping the implementation simple. >>> >>> Drop redundant includes where already pulls it in. >>> >>> No functional change is intended. >>> >>> [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 >>> [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and >>> XEN_SYSCTL_topologyinfo to common code >>> >>> Signed-off-by: Oleksii Kurochko >>> Suggested-by: Jan Beulich >> Nit: Flip the two (chronological order). >> >> Reviewed-by: Jan Beulich > Btw, if this got the necessary Arm ack, I think it could also go in ahead of > all earlier patches in the series? Yes, it is independent from earlier patches in the series. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 04 09:15:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 09:15:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220258.1528965 (Exim 4.92) (envelope-from ) id 1vnYz7-0000sT-Gh; Wed, 04 Feb 2026 09:15:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220258.1528965; Wed, 04 Feb 2026 09:15:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnYz7-0000sM-EC; Wed, 04 Feb 2026 09:15:41 +0000 Received: by outflank-mailman (input) for mailman id 1220258; Wed, 04 Feb 2026 09:15:39 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnYz5-0000sF-QB for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 09:15:39 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0ef00f96-01aa-11f1-b161-2bf370ae4941; Wed, 04 Feb 2026 10:15:33 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-432d256c2e6so5220067f8f.3 for ; Wed, 04 Feb 2026 01:15:33 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 01:15:32 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 10:15:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 10:00, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 08:56:10AM +0100, Jan Beulich wrote: >> On 04.02.2026 08:49, Roger Pau Monné wrote: >>> Also, I would remove the tools guards, I think once a DOMID_ constant >>> is allocated it becomes part of the public ABI, and it cannot be >>> withdrawn. See for example DOMID_IDLE: it's only used internally in >>> the hypervisor AFAICT, yet the define is fully visible in the >>> headers. >> >> It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps >> others) not being guarded (at least for IDLE: by just __XEN__) imo was a >> mistake. That mistake may in fact be correctable, if we could prove that >> the ID cannot usefully be passed into anywhere. > > Even if it's not passed into anything, does it make sense to guard > them? The reserved domid values are already consumed, ie: cannot be > reused in any way. It just seem to me like more ifdefery churn for no > specific benefit. Well. From an abstract perspective, purely hypothetical at this point, I could see a potential need to re-number them, e.g. to simplify checking against groups of these special IDs. Yes, excess #ifdef-ary is an issue. Excess exposure of things also is, though. Finding the right balance between both can be interesting. Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 09:17:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 09:17:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220265.1528975 (Exim 4.92) (envelope-from ) id 1vnZ1E-0001gN-SY; Wed, 04 Feb 2026 09:17:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220265.1528975; Wed, 04 Feb 2026 09:17:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZ1E-0001gJ-Pk; Wed, 04 Feb 2026 09:17:52 +0000 Received: by outflank-mailman (input) for mailman id 1220265; Wed, 04 Feb 2026 09:17:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZ1D-0001g7-B7 for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 09:17:51 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5a8bd8ff-01aa-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 10:17:43 +0100 (CET) Received: from unknown (HELO jpmta-ob1.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::6]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2026 18:17:38 +0900 Received: from unknown (HELO JPC00244420) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob1.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2026 18:17:38 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5a8bd8ff-01aa-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770196664; x=1801732664; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=gSpoUwnGMiw8Hd9rxHOb3HRj7lon6L0Wu64wAWcD0ZA=; b=LIdgx8r9durid36hIW4viiOsrJsUW0MWC8WAXjvW1hDXnwWSwq4WwW2o 7AtVnv4//lpFDkI4fNectVdGiYkdgv3bEU0BqM3b1Ki4J9N/oA9dqgPsj HFtTLPPvSESSY3si4sQmdYMy6exwmZ1AC0zmwQErBR0hiLwxq6z3ynfZp hnbYV/WNabxsFWyLoNBOWaBtV5cvjQqi/mzLsuGHnZdFaTx6vVZ2Onrci UKpp4TrxKl3R9kd46cV92WmfJGQW43uQwI99bCh2yv4pR1JHz2MhYgXva aSLEwRmHYqQj4atNXjqFWfMiIX4iGoU+KHOm4PMUJktHXuMJ2EKXJgTfV A==; X-IronPort-AV: E=Sophos;i="6.21,272,1763391600"; d="scan'208";a="608110368" Date: Wed, 4 Feb 2026 18:17:29 +0900 From: Shashank Balaji To: Sohil Mehta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird , stable@vger.kernel.org Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> Hi Sohil, On Tue, Feb 03, 2026 at 01:08:39PM -0800, Sohil Mehta wrote: > > diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c > > index d93f87f29d03..cc64d61f82cf 100644 > > --- a/arch/x86/kernel/apic/apic.c > > +++ b/arch/x86/kernel/apic/apic.c > > @@ -2456,6 +2456,12 @@ static void lapic_resume(void *data) > > if (x2apic_mode) { > > __x2apic_enable(); > > } else { > > + /* > > + * x2apic may have been re-enabled by the > > + * firmware on resuming from s2ram > > + */ > > + __x2apic_disable(); > > + > > We should likely only disable x2apic on platforms that support it and > need the disabling. How about? > > ... > } else { > /* > * > */ > if (x2apic_enabled()) > __x2apic_disable(); __x2apic_disable disables x2apic only if boot_cpu_has(X86_FEATURE_APIC) and x2apic is already enabled. x2apic_enabled also does the same checks, the only difference being, it uses rdmsrq_safe instead of just rdmsrq, which is what __x2apic_disable uses. The safe version is because of Boris' suggestion [1]. If that's applicable here as well, then rdmsrq in __x2apic_disable should be changed to rdmsrq_safe. > I considered if an error message should be printed along with this. But, > I am not sure if it can really be called a firmware issue. It's probably > just that newer CPUs might have started defaulting to x2apic on. > > Can you specify what platform you are encountering this? I'm not sure it's the CPU defaulting to x2apic on. As per Section 12.12.5.1 of the Intel SDM: On coming out of reset, the local APIC unit is enabled and is in the xAPIC mode: IA32_APIC_BASE[EN]=1 and IA32_APIC_BASE[EXTD]=0. So, the CPU should be turning on in xapic mode. In fact, when x2apic is disabled in the firmware, this problem doesn't happen. Either way, a pr_warn maybe helpful. How about "x2apic re-enabled by the firmware during resume. Disabling\n"? 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Smith" , "xen-devel@lists.xenproject.org" , "Garcia Vallejo, Alejandro" , "Stabellini, Stefano" References: <20251121105801.1251262-1-Penny.Zheng@amd.com> <20251121105801.1251262-15-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 09:23, Penny, Zheng wrote: >> -----Original Message----- >> From: Jan Beulich >> Sent: Wednesday, February 4, 2026 4:09 PM >> >> On 04.02.2026 08:50, Penny, Zheng wrote: >>>> -----Original Message----- >>>> From: Penny, Zheng >>>> Sent: Friday, November 21, 2025 6:58 PM [...] >>>> 772,14 +774,16 @@ static const struct iommu_ops >>>> __initconst_cf_clobber _iommu_ops = { >>>> .quarantine_init = amd_iommu_quarantine_init, >>>> .add_device = amd_iommu_add_device, >>>> .remove_device = amd_iommu_remove_device, >>>> - .assign_device = amd_iommu_assign_device, >>>> .teardown = amd_iommu_domain_destroy, >>>> .clear_root_pgtable = amd_iommu_clear_root_pgtable, >>>> .map_page = amd_iommu_map_page, >>>> .unmap_page = amd_iommu_unmap_page, >>>> .iotlb_flush = amd_iommu_flush_iotlb_pages, >>>> +#ifdef CONFIG_MGMT_HYPERCALLS >>>> + .assign_device = amd_iommu_assign_device, >>>> .reassign_device = reassign_device, >>>> .get_device_group_id = amd_iommu_group_id, >>>> +#endif >>> >>> FWIS, Alejandro has come up a more clever way to DCE these kinds of op, >> staying conditionally as callback. Here, I just took this commit as example to show >> the methodology: >>> ``` >>> .assign_device = IS_ENABLED(CONFIG_MGMT_HYPERCALLS) >>> ? amd_iommu_assign_device >>> : NULL, ``` The compiler has >>> enough visibility to know that static(amd_iommu_assign_device()) is used, and is >> droppable when MGMT_HYPERCALLS=n. So there is no need to do ifdef-wrapping >> around these statics now. Later when jason's "--gc-section" patch serie in, --gc- >> section will help linker identify them unused when MGMT_HYPERCALLS=n, then >> remove them automatically. >> >> I fear I don't see why --gc-sections would make a difference when, for static >> functions, the compiler already is in the position of removing the functions. > > I may misunderstand the DCE process. With this change, we don't need to put #ifdef CONFIG_MGMT_HYPERCALLS around the statics (e.g. amd_iommu_assign_device()). So preprocessor will not help us remove them. But the compiler's optimization passes can, when they observe that a static function, while referenced by source code, is referenced only in branches of conditionals which are compile-time false. Without link-time optimization that's really about all DCE can do. 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Wed, 04 Feb 2026 01:25:49 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 10:25:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; 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How does this fit with ... > >> @@ -326,6 +358,14 @@ int __init sbi_init(void) >> sbi_rfence = sbi_rfence_v02; >> printk("SBI v0.2 RFENCE extension detected\n"); >> } >> + >> + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) >> + { >> + sbi_set_timer = sbi_set_timer_v02; >> + printk("SBI v0.2 TIME extension detected\n"); >> + } >> + else >> + sbi_set_timer = sbi_set_timer_v01; >> } >> else >> panic("Ooops. SBI spec version 0.1 detected. Need to add support"); > ... the panic() here? panic() is still here as then we will want to add support for rfence v01 SBI call too what hasn't been done yet. Could it be an option to change panic to: sbi_set_timer = sbi_set_timer_v01; dprintk("SBI v0.1 isn't fully supported\n"); and then add sbi_rfence = sbi_rfence_v01 when i will be first used? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 04 09:36:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 09:36:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220308.1529015 (Exim 4.92) (envelope-from ) id 1vnZJS-0006Hr-1l; Wed, 04 Feb 2026 09:36:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220308.1529015; Wed, 04 Feb 2026 09:36:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZJR-0006Hk-VV; Wed, 04 Feb 2026 09:36:41 +0000 Received: by outflank-mailman (input) for mailman id 1220308; Wed, 04 Feb 2026 09:36:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZJR-0006He-6T for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 09:36:41 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 01437435-01ad-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 10:36:39 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-43615d9c507so911854f8f.1 for ; Wed, 04 Feb 2026 01:36:39 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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I will move it after SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID to be aligned with how extensions are declared. > >> @@ -134,6 +138,20 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, >> int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, >> size_t size, unsigned long vmid); >> >> +/* >> + * Programs the clock for next event after stime_value time. This function also >> + * clears the pending timer interrupt bit. >> + * If the supervisor wishes to clear the timer interrupt without scheduling the >> + * next timer event, it can either request a timer interrupt infinitely far >> + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer >> + * interrupt by clearing sie.STIE CSR bit. >> + * The stime_value parameter represents absolute time measured in ticks. >> + * >> + * This SBI call returns 0 upon success or an implementation specific negative >> + * error code. >> + */ >> +extern int (*sbi_set_timer)(uint64_t stime_value); > __read_mostly or even __ro_after_init? I will add __ro_after_init to be in sync with sbi_rfence. > >> @@ -326,6 +358,14 @@ int __init sbi_init(void) >> sbi_rfence = sbi_rfence_v02; >> printk("SBI v0.2 RFENCE extension detected\n"); >> } >> + >> + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) >> + { >> + sbi_set_timer = sbi_set_timer_v02; >> + printk("SBI v0.2 TIME extension detected\n"); > Is this really relevant to log especially in release builds? IOW can this at > least be downgraded to dprintk()? Probably not, it could be useful for debugging to understand what kind and version of extension is used. I am okay with using of dprintk(). Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 04 09:51:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 09:51:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220317.1529026 (Exim 4.92) (envelope-from ) id 1vnZXe-00010P-Bh; Wed, 04 Feb 2026 09:51:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220317.1529026; Wed, 04 Feb 2026 09:51:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZXe-00010I-8l; Wed, 04 Feb 2026 09:51:22 +0000 Received: by outflank-mailman (input) for mailman id 1220317; Wed, 04 Feb 2026 09:51:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZXd-0000zt-5A for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 09:51:21 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0db45364-01af-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 10:51:18 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-4359249bbacso433153f8f.0 for ; Wed, 04 Feb 2026 01:51:18 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 01:51:18 -0800 (PST) Message-ID: <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> Date: Wed, 4 Feb 2026 10:51:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Juergen Gross Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 10:25, Juergen Gross wrote: > On 04.02.26 10:15, Jan Beulich wrote: >> On 04.02.2026 10:00, Roger Pau Monné wrote: >>> On Wed, Feb 04, 2026 at 08:56:10AM +0100, Jan Beulich wrote: >>>> On 04.02.2026 08:49, Roger Pau Monné wrote: >>>>> Also, I would remove the tools guards, I think once a DOMID_ constant >>>>> is allocated it becomes part of the public ABI, and it cannot be >>>>> withdrawn. See for example DOMID_IDLE: it's only used internally in >>>>> the hypervisor AFAICT, yet the define is fully visible in the >>>>> headers. >>>> >>>> It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps >>>> others) not being guarded (at least for IDLE: by just __XEN__) imo was a >>>> mistake. That mistake may in fact be correctable, if we could prove that >>>> the ID cannot usefully be passed into anywhere. >>> >>> Even if it's not passed into anything, does it make sense to guard >>> them? The reserved domid values are already consumed, ie: cannot be >>> reused in any way. It just seem to me like more ifdefery churn for no >>> specific benefit. >> >> Well. From an abstract perspective, purely hypothetical at this point, I >> could see a potential need to re-number them, e.g. to simplify checking >> against groups of these special IDs. >> >> Yes, excess #ifdef-ary is an issue. Excess exposure of things also is, >> though. Finding the right balance between both can be interesting. > > I have a patch in work which would want DOMID_ANY not be guarded. I think > especially DOMID_ANY could be useful for other cases, too. Mind me asking where, outside of the toolstack, you intend to use it? Note that unlike IDLE and perhaps a few others, ... > Look e.g. at XEN_ARGO_DOMID_ANY. Even if I don't think we can switch it > to DOMID_ANY, it shows that the concept as such is not restricted to Xen > internal use cases. ... I don't mean ANY to be constrained to just the hypervisor. That more strict guarding came up only because of Roger mentioning IDLE. Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 10:01:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 10:01:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220329.1529035 (Exim 4.92) (envelope-from ) id 1vnZhR-0003A2-7C; Wed, 04 Feb 2026 10:01:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220329.1529035; Wed, 04 Feb 2026 10:01:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZhR-00039v-4O; Wed, 04 Feb 2026 10:01:29 +0000 Received: by outflank-mailman (input) for mailman id 1220329; Wed, 04 Feb 2026 10:01:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZhO-00039p-Tx for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 10:01:27 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 76969848-01b0-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 11:01:24 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b8849dc12f6so951883566b.1 for ; Wed, 04 Feb 2026 02:01:24 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5b:2f01:4042:c03:ce4d:a5a1? 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Wed, 04 Feb 2026 02:01:23 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 11:01:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Jan Beulich Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> Content-Type: multipart/signed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmmDGPIFAwAAAAAACgkQsN6d1ii/Ey8N fAf/dAip2kUNJCY6limktZZOrWZIPvFcxoVi0kZUq7FzJjzGIm963q3zN5OgQFQprcyah/scnfrB ore5GtNlplcJc83We4oyC1ghpqrBfjrrhEdRd9QVHOMMMDJnw+IbZ4RyQz3I8Nlj8oCLH9cPhK7h gkH9WMrn4PxA1fMLSCe8GpM7+MRdExnhGp7zjUiu3ycMIuXML9hnOy2vJPBBx26gW4CpUj9bt5lU /g3uugTaX5DsdhD7WLLDXGKAbVxK8TtVMMUxaQ/afQHgcpZU/Ha5TASWXMo1ZdX30/zj5kpB6GTK 26l8/pxHFksE/Dba98ZRz7Qfwu+GtVnr930Drx49bw== =JQmw -----END PGP SIGNATURE----- --------------4x0hg2b3OAVh5lPhWK37SVJD-- From xen-devel-bounces@lists.xenproject.org Wed Feb 04 10:04:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 10:04:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220338.1529045 (Exim 4.92) (envelope-from ) id 1vnZkN-0003jj-KD; Wed, 04 Feb 2026 10:04:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220338.1529045; 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Wed, 04 Feb 2026 02:04:27 -0800 (PST) Message-ID: <59fa62df-0fd6-4dba-ada9-ab89570ff624@suse.com> Date: Wed, 4 Feb 2026 11:04:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Juergen Gross Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 11:01, Juergen Gross wrote: > On 04.02.26 10:51, Jan Beulich wrote: >> On 04.02.2026 10:25, Juergen Gross wrote: >>> On 04.02.26 10:15, Jan Beulich wrote: >>>> On 04.02.2026 10:00, Roger Pau Monné wrote: >>>>> On Wed, Feb 04, 2026 at 08:56:10AM +0100, Jan Beulich wrote: >>>>>> On 04.02.2026 08:49, Roger Pau Monné wrote: >>>>>>> Also, I would remove the tools guards, I think once a DOMID_ constant >>>>>>> is allocated it becomes part of the public ABI, and it cannot be >>>>>>> withdrawn. See for example DOMID_IDLE: it's only used internally in >>>>>>> the hypervisor AFAICT, yet the define is fully visible in the >>>>>>> headers. >>>>>> >>>>>> It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps >>>>>> others) not being guarded (at least for IDLE: by just __XEN__) imo was a >>>>>> mistake. That mistake may in fact be correctable, if we could prove that >>>>>> the ID cannot usefully be passed into anywhere. >>>>> >>>>> Even if it's not passed into anything, does it make sense to guard >>>>> them? The reserved domid values are already consumed, ie: cannot be >>>>> reused in any way. It just seem to me like more ifdefery churn for no >>>>> specific benefit. >>>> >>>> Well. From an abstract perspective, purely hypothetical at this point, I >>>> could see a potential need to re-number them, e.g. to simplify checking >>>> against groups of these special IDs. >>>> >>>> Yes, excess #ifdef-ary is an issue. Excess exposure of things also is, >>>> though. Finding the right balance between both can be interesting. >>> >>> I have a patch in work which would want DOMID_ANY not be guarded. I think >>> especially DOMID_ANY could be useful for other cases, too. >> >> Mind me asking where, outside of the toolstack, you intend to use it? > > I'd like to be able to use it for Xenstore permissions. > > Primary use case would be to allow the special watches for domain creation > and removal to be usable for all guests, but there might be use cases where > a domU wants to give node read access for everyone. Would that require exposing beyond the toolstack's boundaries? Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 10:11:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 10:11:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220348.1529056 (Exim 4.92) (envelope-from ) id 1vnZr8-0005dm-CH; Wed, 04 Feb 2026 10:11:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220348.1529056; Wed, 04 Feb 2026 10:11:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZr8-0005df-9P; Wed, 04 Feb 2026 10:11:30 +0000 Received: by outflank-mailman (input) for mailman id 1220348; Wed, 04 Feb 2026 10:11:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnZr7-0005dZ-1h for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 10:11:29 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id de215bec-01b1-11f1-b161-2bf370ae4941; Wed, 04 Feb 2026 11:11:27 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-43591b55727so5783682f8f.3 for ; Wed, 04 Feb 2026 02:11:27 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 02:11:26 -0800 (PST) Message-ID: <51e6e0d6-4d94-4035-9e32-37dacf612da3@suse.com> Date: Wed, 4 Feb 2026 11:11:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 12/16] xen/riscv: introduce sbi_set_timer() To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <2fd4da2ad7c4af2241368edba739b24d0e976552.1769099885.git.oleksii.kurochko@gmail.com> <9f2b3559-0658-4343-abec-1a35e7d6da44@suse.com> <061f894b-fbe0-4565-a9e2-502c97b1dada@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <061f894b-fbe0-4565-a9e2-502c97b1dada@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 10:29, Oleksii Kurochko wrote: > On 2/3/26 6:02 PM, Jan Beulich wrote: >> On 22.01.2026 17:47, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/sbi.c >>> +++ b/xen/arch/riscv/sbi.c >>> @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, >>> unsigned long arg4, >>> unsigned long arg5); >>> >>> +static int cf_check sbi_set_timer_v02(uint64_t stime_value) >>> +{ >>> + struct sbiret ret; >>> + >>> + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, >>> +#ifdef CONFIG_RISCV_32 >>> + stime_value >> 32, >>> +#else >>> + 0, >>> +#endif >>> + 0, 0, 0, 0); >>> + >>> + return sbi_err_map_xen_errno(ret.error); >>> +} >>> + >>> +static int cf_check sbi_set_timer_v01(uint64_t stime_value) >>> +{ >>> + struct sbiret ret; >>> + >>> + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, >> From this name I'm judging version 0.1 is meant. How does this fit with ... >> >>> @@ -326,6 +358,14 @@ int __init sbi_init(void) >>> sbi_rfence = sbi_rfence_v02; >>> printk("SBI v0.2 RFENCE extension detected\n"); >>> } >>> + >>> + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) >>> + { >>> + sbi_set_timer = sbi_set_timer_v02; >>> + printk("SBI v0.2 TIME extension detected\n"); >>> + } >>> + else >>> + sbi_set_timer = sbi_set_timer_v01; >>> } >>> else >>> panic("Ooops. SBI spec version 0.1 detected. Need to add support"); >> ... the panic() here? > > panic() is still here as then we will want to add support for rfence v01 SBI call > too what hasn't been done yet. > > Could it be an option to change panic to: > sbi_set_timer = sbi_set_timer_v01; > dprintk("SBI v0.1 isn't fully supported\n"); > and then add sbi_rfence = sbi_rfence_v01 when i will be first used? I don't mind keeping the panic(), but what you add here wants to be structured such that things won't need moving around once the panic() goes away. I.e. you want to avoid dealing with v0.1 in both the if() and the else. To accommodate that, perhaps sbi_set_timer_v01 could simply be the initializer of the new function pointer variable? Beyond that, once again you want to clarify things in the commit message. Adding support for a case which elsewhere you panic() on is, well, confusing without some explanation. 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Wed, 04 Feb 2026 02:12:14 -0800 (PST) Message-ID: <056fa0ce-2832-4b0b-925b-a55e4086d88a@suse.com> Date: Wed, 4 Feb 2026 11:12:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Jan Beulich Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> <59fa62df-0fd6-4dba-ada9-ab89570ff624@suse.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <59fa62df-0fd6-4dba-ada9-ab89570ff624@suse.com> Content-Type: multipart/signed; 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Wed, 04 Feb 2026 02:15:53 -0800 (PST) Message-ID: <17480ac0-438b-4af5-b733-f51eedd6e7a4@suse.com> Date: Wed, 4 Feb 2026 11:15:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Juergen Gross Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> <59fa62df-0fd6-4dba-ada9-ab89570ff624@suse.com> <056fa0ce-2832-4b0b-925b-a55e4086d88a@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <056fa0ce-2832-4b0b-925b-a55e4086d88a@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 11:12, Juergen Gross wrote: > On 04.02.26 11:04, Jan Beulich wrote: >> On 04.02.2026 11:01, Juergen Gross wrote: >>> On 04.02.26 10:51, Jan Beulich wrote: >>>> On 04.02.2026 10:25, Juergen Gross wrote: >>>>> On 04.02.26 10:15, Jan Beulich wrote: >>>>>> On 04.02.2026 10:00, Roger Pau Monné wrote: >>>>>>> On Wed, Feb 04, 2026 at 08:56:10AM +0100, Jan Beulich wrote: >>>>>>>> On 04.02.2026 08:49, Roger Pau Monné wrote: >>>>>>>>> Also, I would remove the tools guards, I think once a DOMID_ constant >>>>>>>>> is allocated it becomes part of the public ABI, and it cannot be >>>>>>>>> withdrawn. See for example DOMID_IDLE: it's only used internally in >>>>>>>>> the hypervisor AFAICT, yet the define is fully visible in the >>>>>>>>> headers. >>>>>>>> >>>>>>>> It was me to ask for it to be guarded like this. DOMID_IDLE (and perhaps >>>>>>>> others) not being guarded (at least for IDLE: by just __XEN__) imo was a >>>>>>>> mistake. That mistake may in fact be correctable, if we could prove that >>>>>>>> the ID cannot usefully be passed into anywhere. >>>>>>> >>>>>>> Even if it's not passed into anything, does it make sense to guard >>>>>>> them? The reserved domid values are already consumed, ie: cannot be >>>>>>> reused in any way. It just seem to me like more ifdefery churn for no >>>>>>> specific benefit. >>>>>> >>>>>> Well. From an abstract perspective, purely hypothetical at this point, I >>>>>> could see a potential need to re-number them, e.g. to simplify checking >>>>>> against groups of these special IDs. >>>>>> >>>>>> Yes, excess #ifdef-ary is an issue. Excess exposure of things also is, >>>>>> though. Finding the right balance between both can be interesting. >>>>> >>>>> I have a patch in work which would want DOMID_ANY not be guarded. I think >>>>> especially DOMID_ANY could be useful for other cases, too. >>>> >>>> Mind me asking where, outside of the toolstack, you intend to use it? >>> >>> I'd like to be able to use it for Xenstore permissions. >>> >>> Primary use case would be to allow the special watches for domain creation >>> and removal to be usable for all guests, but there might be use cases where >>> a domU wants to give node read access for everyone. >> >> Would that require exposing beyond the toolstack's boundaries? > > Yes, as this would require the user to specify DOMID_ANY as the domid in > struct xs_permissions. Hmm, I see. I wonder though whether things like this wouldn't want a separate layer of abstraction, such that users of the library won't need to include (and hence have available) Xen's public headers. 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Wed, 04 Feb 2026 02:26:31 -0800 (PST) Message-ID: <306ba24c-efe9-4dd6-bb6c-19bb5195c410@suse.com> Date: Wed, 4 Feb 2026 11:26:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/domain: introduce DOMID_ANY To: Jan Beulich Cc: dmukhin@xen.org, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260109140747.195460-2-dmukhin@ford.com> <0e3a1af4-d87c-405c-a0a7-598929df3f4b@suse.com> <36537370-1fe3-45e8-9790-852d73f93e07@suse.com> <59fa62df-0fd6-4dba-ada9-ab89570ff624@suse.com> <056fa0ce-2832-4b0b-925b-a55e4086d88a@suse.com> <17480ac0-438b-4af5-b733-f51eedd6e7a4@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <17480ac0-438b-4af5-b733-f51eedd6e7a4@suse.com> Content-Type: multipart/signed; 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Wed, 04 Feb 2026 02:39:09 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 11:39:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 13/16] xen/riscv: implement reprogram_timer() via SBI To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <732635f43fb80daec332f78d4442b56bf5dfda98.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <732635f43fb80daec332f78d4442b56bf5dfda98.1769099885.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) > cpu_khz = rate / 1000; > } > > +int reprogram_timer(s_time_t timeout) > +{ > + uint64_t deadline, now; > + int rc; > + > + if ( timeout == 0 ) > + { > + /* Disable timers */ > + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); For here and below: Is it guaranteed that the SIE bit is writable? The privileged spec looks to have provisions for the case that it isn't (together with the corresponding SIP bit). As to the comment - why plural here, when ... > + return 1; > + } > + > + deadline = ns_to_ticks(timeout) + boot_clock_cycles; > + now = get_cycles(); > + if ( deadline <= now ) > + return 0; > + > + /* Enable timer */ > + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); ... it's singular here? Also in both cases, isn't it the timer interrupt you enable, not the timer itself? > + /* > + * TODO: When the SSTC extension is supported, it would be preferable to > + * use the supervisor timer registers directly here for better > + * performance, since an SBI call and context switch would no longer > + * be required. I think you mean a mode switch here, not a context one? Jan > + * This would also reduce reliance on a specific SBI implementation. > + * For example, it is not ideal to panic() if sbi_set_timer() returns > + * a non-zero value. Currently it can return 0 or -ENOSUPP, and > + * without SSTC we still need an implementation because only the > + * M-mode timer is available, and it can only be programmed in > + * M-mode. > + */ > + if ( (rc = sbi_set_timer(deadline)) ) > + panic("%s: timer wasn't set because: %d\n", __func__, rc); > + > + return 1; > +} > + > void __init preinit_xen_time(void) > { > if ( acpi_disabled ) From xen-devel-bounces@lists.xenproject.org Wed Feb 04 10:42:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 10:42:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220400.1529109 (Exim 4.92) (envelope-from ) id 1vnaKr-00047Y-Px; Wed, 04 Feb 2026 10:42:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220400.1529109; Wed, 04 Feb 2026 10:42:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnaKr-00047R-Mn; Wed, 04 Feb 2026 10:42:13 +0000 Received: by outflank-mailman (input) for mailman id 1220400; Wed, 04 Feb 2026 10:42:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnaKq-00047L-Kc for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 10:42:12 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2509eeff-01b6-11f1-b161-2bf370ae4941; Wed, 04 Feb 2026 11:42:04 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-43590777e22so4131734f8f.3 for ; Wed, 04 Feb 2026 02:42:04 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 02:42:03 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 11:42:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 14/16] xen/riscv: handle hypervisor timer interrupts To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <5028577821754b86f633bedb0c32f5490ab6452c.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5028577821754b86f633bedb0c32f5490ab6452c.1769099885.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > Introduce timer_interrupt() to process IRQ_S_TIMER interrupts. > The handler disables further timer interrupts by clearing > SIE.STIE and raises TIMER_SOFTIRQ so the generic timer subsystem > can perform its processing. > > Update do_trap() to dispatch IRQ_S_TIMER to this new handler. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed Feb 04 10:49:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 10:49:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220413.1529120 (Exim 4.92) (envelope-from ) id 1vnaRo-00054Y-L8; Wed, 04 Feb 2026 10:49:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220413.1529120; Wed, 04 Feb 2026 10:49:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnaRo-00054R-Gl; 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Wed, 04 Feb 2026 02:49:19 -0800 (PST) Message-ID: <316accc5-2e6b-4571-98a7-5776a47a4ad7@suse.com> Date: Wed, 4 Feb 2026 11:49:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 16/16] xen/riscv: implement sync_vcpu_execstate() To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 22.01.2026 17:47, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -259,3 +259,21 @@ void sync_local_execstate(void) > { > /* Nothing to do -- no lazy switching */ > } > + > +void sync_vcpu_execstate(struct vcpu *v) > +{ > + /* > + * We don't support lazy switching. > + * > + * However the context may have been saved from a remote pCPU so we > + * need a barrier to ensure it is observed before continuing. > + * > + * Per vcpu_context_saved(), the context can be observed when > + * v->is_running is false (the caller should check it before calling > + * this function). > + * > + * Note this is a full barrier to also prevent update of the context > + * to happen before it was observed. > + */ > + smp_mb(); > +} Where's the counterpart of this barrier (going to be)? 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Wed, 04 Feb 2026 03:09:28 -0800 (PST) Message-ID: <309e4e0d-c2a3-4f56-ab6f-f648da313bb6@suse.com> Date: Wed, 4 Feb 2026 12:09:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <89f50ab2c1a1c79abea4db3a53393f974bb9a473.1770036584.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <89f50ab2c1a1c79abea4db3a53393f974bb9a473.1770036584.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.02.2026 13:57, Oleksii Kurochko wrote: > @@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void) > asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); > } > > +/* Flush VS-stage TLB for current hart. */ > +static inline void flush_tlb_guest_local(void) > +{ > + HFENCE_VVMA(0, 0); For this use, ... > --- /dev/null > +++ b/xen/arch/riscv/include/asm/insn-defs.h > @@ -0,0 +1,10 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#ifndef ASM_RISCV_INSN_DEFS_H > +#define ASM_RISCV_INSN_DEFS_H > + > +#define HFENCE_VVMA(vaddr, asid) \ > + asm volatile ("hfence.vvma %0, %1" \ > + :: "r"(vaddr), "r"(asid) : "memory") ... don't you want to use "rJ" as the constraints here? It's further not quite clear to me whether the memory clobber is really needed. Pretty certainly not for the use in context switch, but perhaps for other future uses it's better to be there, even if only to be on the safe side. Also, style nit: There are a number of blanks missing in this asm(). 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On 64bit PV guests the start_info field is 64bits wide. HVM guests don't use start_info at all. Drop the restriction in arch_domain_create() and instead free and re-allocate the page from memory below 4G if needed in switch_compat(), when the guest is set to run in 32bit PV mode. Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") Signed-off-by: Roger Pau Monné --- xen/arch/x86/domain.c | 7 ++++--- xen/arch/x86/pv/domain.c | 20 ++++++++++++++++++++ xen/common/domain.c | 2 +- xen/include/xen/domain.h | 2 ++ 4 files changed, 27 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index edb76366b596..3e701f2146c9 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -882,10 +882,11 @@ int arch_domain_create(struct domain *d, goto fail; /* - * The shared_info machine address must fit in a 32-bit field within a - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). + * For 32bit PV guests the shared_info machine address must fit in a 32-bit + * field within the guest's start_info structure. We might need to free + * and allocate later if the guest turns out to be a 32bit PV one. */ - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) + if ( (d->shared_info = alloc_xenheap_page()) == NULL ) goto fail; clear_page(d->shared_info); diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 01499582d2d6..8ced3d70a52f 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) d->arch.has_32bit_shinfo = 1; d->arch.pv.is_32bit = true; + /* Check whether the shared_info page needs to be moved below 4G. */ + if ( virt_to_maddr(d->shared_info) >> 32 ) + { + shared_info_t *prev = d->shared_info; + + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); + if ( !d->shared_info ) + { + d->shared_info = prev; + rc = -ENOMEM; + goto undo_and_fail; + } + put_page(virt_to_page(prev)); + clear_page(d->shared_info); + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); + /* Ensure all references to the old shared_info page are dropped. */ + for_each_vcpu( d, v ) + vcpu_info_reset(v); + } + for_each_vcpu( d, v ) { if ( (rc = setup_compat_arg_xlat(v)) || diff --git a/xen/common/domain.c b/xen/common/domain.c index 376351b528c9..11fed22455b9 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -305,7 +305,7 @@ static void vcpu_check_shutdown(struct vcpu *v) spin_unlock(&d->shutdown_lock); } -static void vcpu_info_reset(struct vcpu *v) +void vcpu_info_reset(struct vcpu *v) { struct domain *d = v->domain; diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 273717c31b3f..52cdf012c491 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -83,6 +83,8 @@ void cf_check free_pirq_struct(void *ptr); int arch_vcpu_create(struct vcpu *v); void arch_vcpu_destroy(struct vcpu *v); +void vcpu_info_reset(struct vcpu *v); + int map_guest_area(struct vcpu *v, paddr_t gaddr, unsigned int size, struct guest_area *area, void (*populate)(void *dst, struct vcpu *v)); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 12:42:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 12:42:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220468.1529150 (Exim 4.92) (envelope-from ) id 1vncDe-0005k8-2e; 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This causes an incorrect total size calculation leading to false panic. Move the tot_size calculation right after acquire_static_memory_bank(). Fixes: 487975df53b5 ("xen/arm: introduce allocate_static_memory") Signed-off-by: Michal Orzel --- xen/common/device-tree/static-memory.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/device-tree/static-memory.c b/xen/common/device-tree/static-memory.c index 0774d0680604..ffbc12aa24df 100644 --- a/xen/common/device-tree/static-memory.c +++ b/xen/common/device-tree/static-memory.c @@ -118,6 +118,8 @@ void __init allocate_static_memory(struct domain *d, struct kernel_info *kinfo, if ( mfn_eq(smfn, INVALID_MFN) ) goto fail; + tot_size += psize; + printk(XENLOG_INFO "%pd: STATIC BANK[%u] %#"PRIpaddr"-%#"PRIpaddr"\n", d, bank, pbase, pbase + psize); @@ -158,8 +160,6 @@ void __init allocate_static_memory(struct domain *d, struct kernel_info *kinfo, mem->bank[gbank].start = rambase[gbank]; } } - - tot_size += psize; } mem->nr_banks = ++gbank; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 12:55:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 12:55:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220478.1529159 (Exim 4.92) (envelope-from ) id 1vncPL-0007g1-2B; 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Wed, 04 Feb 2026 04:54:47 -0800 (PST) MIME-Version: 1.0 References: <20251119193120.1011448-1-grygorii_strashko@epam.com> <90ac9206-10ce-4c46-83e3-82ac8ef0d152@suse.com> In-Reply-To: <90ac9206-10ce-4c46-83e3-82ac8ef0d152@suse.com> From: Tamas K Lengyel Date: Wed, 4 Feb 2026 07:54:12 -0500 X-Gmail-Original-Message-ID: X-Gm-Features: AZwV_QhQudzW0WS1dzgSGtPjV6PsQSXMjUpapeeeWRwe2XEVU0TzgGUK2ERz5QI Message-ID: Subject: Re: Ping: [XEN][PATCH v4] xen: make VMTRACE support optional To: Jan Beulich Cc: Grygorii Strashko , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alexandru Isaila , Petre Pircalabu , Teddy Astie , Penny Zheng , "xen-devel@lists.xenproject.org" Content-Type: multipart/alternative; boundary="000000000000930e360649ff0f43" --000000000000930e360649ff0f43 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Dec 2, 2025 at 5:57=E2=80=AFAM Jan Beulich wrot= e: > On 19.11.2025 20:31, Grygorii Strashko wrote: > > From: Grygorii Strashko > > > > The VMTRACE feature is depends on Platform/Arch HW and code support and > now > > can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled. > > This makes VMTRACE support optional by introducing HVM Kconfig option: > > - CONFIG_VMTRACE to enable/disable the feature. > > > > Signed-off-by: Grygorii Strashko Acked-by: Tamas K Lengyel --000000000000930e360649ff0f43 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Tue, Dec 2, = 2025 at 5:57=E2=80=AFAM Jan Beulich <jbeulich@suse.com> wrote:
On 19.11.2025 20:31, Grygorii Strashko wrote:
> From: Grygorii Strashko <grygorii_strashko@epam.com>
>
> The VMTRACE feature is depends on Platform/Arch HW and code support an= d now
> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
> This makes VMTRACE support optional by introducing HVM Kconfig option:=
> - CONFIG_VMTRACE to enable/disable the feature.
>
> Signed-off-by: Grygorii Strashko <grygorii_strashko@epam.com>

Acked-by: Tamas K Lengyel <tamas@tklengyel.com>=C2=A0
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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5U5FMGfdAkaLqB0VuMscvakr/+o+Cryhw9LC8ALSLpninK4gkSKj9s1MTGBmUjTOhRpNu7Gb+nBA9sTRql9OlI2DhIW+et/AYe4bf/Li96UWHoS5QvxTaD7Yqq5hB1Pjo1OIZDl9Qjxr9WlSXRoKnH2Hao1AYmpu9LUrtSk/t6zMIWppmAyLHAO3xNzu11yyO5AfmQBjqfe2Ia6OpDTvQPC+Ltl1KEssmc4eVe3FdjZsnHI/r62mUhIgZdxxIPXocv/oUh7T6Sxdhrto/bDP1J5S+jkqep5VzsqMXpxVrxaWLK9MbhyeY3Ztjkuw/EEoMzFpm46bl2fUKQMIThfFLOwcXIYLiApkdyIOYEQ5l3Ra6ismWpbl9MkHkdxyrUYeD//T6FZbyTvZdkNTXa3RVd5KKnHp9Dq7tIyP0jOLBfYWCdsLg24KOlSEnUDnb1wv X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2026 13:07:13.0736 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 22d97994-5aee-43c8-ad25-08de63ee502b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8575 Hi Michal, > On 4 Feb 2026, at 13:42, Michal Orzel wrote: >=20 > When a physical memory bank spans multiple guest RAM banks, the variable > psize is modified inside the allocation loop, but the modified value > (instead of the original bank size) is added to tot_size. This causes an > incorrect total size calculation leading to false panic. Move the > tot_size calculation right after acquire_static_memory_bank(). Looks good to me. >=20 > Fixes: 487975df53b5 ("xen/arm: introduce allocate_static_memory") > Signed-off-by: Michal Orzel Reviewed-by: Bertrand Marquis Cheers Bertrand > --- > xen/common/device-tree/static-memory.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/xen/common/device-tree/static-memory.c b/xen/common/device-t= ree/static-memory.c > index 0774d0680604..ffbc12aa24df 100644 > --- a/xen/common/device-tree/static-memory.c > +++ b/xen/common/device-tree/static-memory.c > @@ -118,6 +118,8 @@ void __init allocate_static_memory(struct domain *d, = struct kernel_info *kinfo, > if ( mfn_eq(smfn, INVALID_MFN) ) > goto fail; >=20 > + tot_size +=3D psize; > + > printk(XENLOG_INFO "%pd: STATIC BANK[%u] %#"PRIpaddr"-%#"PRIpaddr= "\n", > d, bank, pbase, pbase + psize); >=20 > @@ -158,8 +160,6 @@ void __init allocate_static_memory(struct domain *d, = struct kernel_info *kinfo, > mem->bank[gbank].start =3D rambase[gbank]; > } > } > - > - tot_size +=3D psize; > } >=20 > mem->nr_banks =3D ++gbank; > --=20 > 2.43.0 >=20 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 13:15:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 13:15:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220524.1529200 (Exim 4.92) (envelope-from ) id 1vncj8-0004BA-E9; Wed, 04 Feb 2026 13:15:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220524.1529200; Wed, 04 Feb 2026 13:15:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vncj8-0004B2-AH; Wed, 04 Feb 2026 13:15:26 +0000 Received: by outflank-mailman (input) for mailman id 1220524; Wed, 04 Feb 2026 13:15:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vncj6-0004Aw-PV for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 13:15:24 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8faacc9d-01cb-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 14:15:22 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-42fed090e5fso508585f8f.1 for ; Wed, 04 Feb 2026 05:15:22 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit The counterpart in vcpu_context_saved() is smp_wmb(), and here we don't really need any more than a read barrier: The concern expressed in the comment is void, as updates to the context are necessarily observed ahead of ->is_running going false, by virtue of said barrier in vcpu_context_saved(). Fixes: f6790389613c ("xen/arm: sched: Ensure the vCPU context is seen before vcpu_pause() returns") Signed-off-by: Jan Beulich --- As to the tag, this is one of the cases where I'm on the edge between Amends: and Fixes:. Subsequently we may want to move the barrier into the sole common code caller, seeing that the other barrier also is in common code. Furthermore, seeing that for all but x86 the function is then entirely empty, we may want to allow it to be inline to avoid the unnecessary (tail) call. --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -342,11 +342,8 @@ void sync_vcpu_execstate(struct vcpu *v) * Per vcpu_context_saved(), the context can be observed when * v->is_running is false (the caller should check it before calling * this function). - * - * Note this is a full barrier to also prevent update of the context - * to happen before it was observed. */ - smp_mb(); + smp_rmb(); } #define NEXT_ARG(fmt, args) \ From xen-devel-bounces@lists.xenproject.org Wed Feb 04 13:17:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 13:17:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220534.1529209 (Exim 4.92) (envelope-from ) id 1vncke-0004fx-Mq; Wed, 04 Feb 2026 13:17:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220534.1529209; Wed, 04 Feb 2026 13:17:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vncke-0004fq-KK; Wed, 04 Feb 2026 13:17:00 +0000 Received: by outflank-mailman (input) for mailman id 1220534; Wed, 04 Feb 2026 13:17:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnckd-0004fi-VE for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 13:16:59 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id c7eaaade-01cb-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 14:16:57 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0067F339; Wed, 4 Feb 2026 05:16:50 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.132]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 188E33F778; Wed, 4 Feb 2026 05:16:54 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c7eaaade-01cb-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [RFC PATCH] xen: Add macOS hypervisor build support Date: Wed, 4 Feb 2026 14:16:30 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen does not currently document how to build the hypervisor on macOS, and there is no Darwin configuration for a Homebrew-based toolchain. In addition, the Makefile silent-mode detection can be tripped by -I paths that contain an "s", which hides build commands unexpectedly. Add a minimal Darwin configuration, document the Homebrew toolchain and PATH setup (including prefix differences and an out-of-tree example), and clarify that the guide is tested on arm64. Tighten silent-mode detection to only look at the short option word. Functional impact: The Xen hypervisor can be cross-built on macOS (arm64) with the documented Homebrew toolchain, and make output is no longer forced silent by --include-dir paths. Signed-off-by: Bertrand Marquis --- This patch does not intent to say that building on mac os is supported but it can be helpful for people developing on mac os (I have been using that for a while) and is solving a Makefile issue that could be hit by others in other environments. The doc file is quick attempt to document that for others, happy to get comments from others to find out if they think this is useful or not or if this should not be documented there. --- config/Darwin.mk | 4 +++ docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ xen/Makefile | 2 +- 3 files changed, 71 insertions(+), 1 deletion(-) create mode 100644 config/Darwin.mk create mode 100644 docs/misc/build-on-macos.md diff --git a/config/Darwin.mk b/config/Darwin.mk new file mode 100644 index 000000000000..64a1dfcb42ed --- /dev/null +++ b/config/Darwin.mk @@ -0,0 +1,4 @@ +include $(XEN_ROOT)/config/StdGNU.mk + +# We are always cross compiling so fake COMPILE_ARCH +XEN_COMPILE_ARCH = Darwin diff --git a/docs/misc/build-on-macos.md b/docs/misc/build-on-macos.md new file mode 100644 index 000000000000..6b56cd8eccab --- /dev/null +++ b/docs/misc/build-on-macos.md @@ -0,0 +1,66 @@ +# Building Xen Hypervisor on macOS + +This guide explains how to cross-compile the Xen hypervisor (xen +subdirectory only) on macOS. This does **not** build the tools. + +## Prerequisites + +Install the following packages using Homebrew: + +```bash +# Cross-compilation toolchain for ARM64 +brew install aarch64-elf-gcc + +# GNU tools (required for compatibility) +brew install make gnu-sed +``` + +Homebrew installs under `/opt/homebrew` on Apple Silicon and `/usr/local` on +Intel Macs. Adjust paths below accordingly. + +### Verification + +Verify your installation: + +```bash +# Check cross compiler +aarch64-elf-gcc --version + +# Check GNU make (adjust prefix if needed) +/opt/homebrew/opt/make/libexec/gnubin/make --version + +# Check GNU sed (adjust prefix if needed) +/opt/homebrew/opt/gnu-sed/libexec/gnubin/sed --version +``` + +## Building the Hypervisor + +Set up GNU tools in PATH and build: + +```bash +# Set up GNU tools in PATH (adjust prefix if needed) +export PATH="/opt/homebrew/opt/gnu-sed/libexec/gnubin:/opt/homebrew/opt/make/libexec/gnubin:$PATH" + +# Build Xen hypervisor only (in-tree) +cd xen/ +make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc + +# Optional: out-of-tree build directory +# make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc O=$PWD/build-mac +``` + +## Architecture Support + +Currently supported architectures: + +- **ARM64** (`arm64`) - Default, uses `aarch64-elf-gcc` + +Other targets may work if the corresponding cross toolchain is installed, +but this guide has only been tested on ARM64. + +## Limitations + +- **Hypervisor only**: This only builds the Xen hypervisor, not the tools +- **Cross-compilation only**: Native builds are not supported +- **macOS-specific**: Instructions optimized for macOS with Homebrew +- **GNU tools required**: Native BSD tools are not compatible diff --git a/xen/Makefile b/xen/Makefile index 13e336ba5484..adeb869f32ad 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -116,7 +116,7 @@ endif # If the user is running make -s (silent mode), suppress echoing of # commands -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) quiet := silent_ endif -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 14:07:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 14:07:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220552.1529219 (Exim 4.92) (envelope-from ) id 1vndX1-000428-Az; Wed, 04 Feb 2026 14:06:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220552.1529219; Wed, 04 Feb 2026 14:06:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vndX1-000421-8M; Wed, 04 Feb 2026 14:06:59 +0000 Received: by outflank-mailman (input) for mailman id 1220552; Wed, 04 Feb 2026 14:06:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vndX0-00041v-E4 for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 14:06:58 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c2e5c3d7-01d2-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 15:06:55 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-482f2599980so41315665e9.0 for ; Wed, 04 Feb 2026 06:06:55 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 06:06:54 -0800 (PST) Message-ID: <82540f88-ffcd-46a9-9813-ebe42ef0b0ec@suse.com> Date: Wed, 4 Feb 2026 15:06:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260204122553.75711-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260204122553.75711-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 13:25, Roger Pau Monne wrote: > The limitation of shared_info being allocated below 4G to fit in the > start_info field only applies to 32bit PV guests. On 64bit PV guests the > start_info field is 64bits wide. HVM guests don't use start_info at all. > > Drop the restriction in arch_domain_create() and instead free and > re-allocate the page from memory below 4G if needed in switch_compat(), > when the guest is set to run in 32bit PV mode. > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") The tag is here because there is the (largely theoretical?) possibility for a system to have no memory at all left below 4Gb, in which case creation of a PV64 or non-shadow HVM guest would needlessly fail? > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich with two nits: > --- a/xen/arch/x86/pv/domain.c > +++ b/xen/arch/x86/pv/domain.c > @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) > d->arch.has_32bit_shinfo = 1; > d->arch.pv.is_32bit = true; > > + /* Check whether the shared_info page needs to be moved below 4G. */ > + if ( virt_to_maddr(d->shared_info) >> 32 ) > + { > + shared_info_t *prev = d->shared_info; > + > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > + if ( !d->shared_info ) > + { > + d->shared_info = prev; > + rc = -ENOMEM; > + goto undo_and_fail; > + } > + put_page(virt_to_page(prev)); > + clear_page(d->shared_info); > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > + /* Ensure all references to the old shared_info page are dropped. */ "references to ... page are dropped" reads as if talk was of page references. vcpu_info_reset() writes out pointers only, though. May I suggest /* Ensure all pointers to the old shared_info page are replaced. */ ? > + for_each_vcpu( d, v ) A common oddity, where my personal take is that only one of two forms are possible (without ./CODING_STYLE saying anything explicit): Either such a for_each_... is deemed a (kind-of) keyword (like "for"), then it wants to be for_each_vcpu ( d, v ) or it is deemed not to be one, then it wants to be for_each_vcpu(d, v) Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 14:21:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 14:21:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220566.1529230 (Exim 4.92) (envelope-from ) id 1vndkO-0006yG-EZ; Wed, 04 Feb 2026 14:20:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220566.1529230; Wed, 04 Feb 2026 14:20:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vndkO-0006y8-Ap; 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On 64bit PV guests the > start_info field is 64bits wide. HVM guests don't use start_info at all. All shared info?  HVM does use it, but doesn't see the MFN. > > Drop the restriction in arch_domain_create() and instead free and > re-allocate the page from memory below 4G if needed in switch_compat(), > when the guest is set to run in 32bit PV mode. > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > Signed-off-by: Roger Pau Monné > --- > xen/arch/x86/domain.c | 7 ++++--- > xen/arch/x86/pv/domain.c | 20 ++++++++++++++++++++ > xen/common/domain.c | 2 +- > xen/include/xen/domain.h | 2 ++ > 4 files changed, 27 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index edb76366b596..3e701f2146c9 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -882,10 +882,11 @@ int arch_domain_create(struct domain *d, > goto fail; > > /* > - * The shared_info machine address must fit in a 32-bit field within a > - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > + * field within the guest's start_info structure. We might need to free > + * and allocate later if the guest turns out to be a 32bit PV one. > */ > - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) > + if ( (d->shared_info = alloc_xenheap_page()) == NULL ) > goto fail; > The comment is now out of place when the source is read naturally.  I'd suggest dropping the comment entirely, and ... > clear_page(d->shared_info); > diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c > index 01499582d2d6..8ced3d70a52f 100644 > --- a/xen/arch/x86/pv/domain.c > +++ b/xen/arch/x86/pv/domain.c > @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) > d->arch.has_32bit_shinfo = 1; > d->arch.pv.is_32bit = true; > > + /* Check whether the shared_info page needs to be moved below 4G. */ ... extending this one talking about the 32bit field. > + if ( virt_to_maddr(d->shared_info) >> 32 ) > + { > + shared_info_t *prev = d->shared_info; > + > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > + if ( !d->shared_info ) > + { > + d->shared_info = prev; > + rc = -ENOMEM; > + goto undo_and_fail; > + } > + put_page(virt_to_page(prev)); > + clear_page(d->shared_info); I think copy_page() would be more appropriate.  That way there are fewer implicit ordering dependencies. > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > + /* Ensure all references to the old shared_info page are dropped. */ > + for_each_vcpu( d, v ) > + vcpu_info_reset(v); switch_compat() can only occur on a domain with no memory.  How can we have outstanding references? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 04 14:21:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 14:21:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220575.1529239 (Exim 4.92) (envelope-from ) id 1vndlC-0007QZ-Ma; Wed, 04 Feb 2026 14:21:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220575.1529239; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yG4/w9oALkzs9I5EiHyOGswxiJuVzWZExG3tDT8Q2hWXfFSemez56z2SQmOcWS5b7LF+mbCFj2IjuLkkcUs77AqZzK2f0etJjy5k87RSgDFpg4ON64m6J48i+PmXrLtrPF1LxbpaPZg07/eAbtDxsW8Ny5YG3ZDp5WzZj0G94yfKTXNl0wPkqoe+oSN6IjDIjAEVsSdAGtWIiIk4M69C+Lkg56TtlQpDnNRCU4/e3o6uBebzBXw1kC/ZCvMV3QRA4bruh4+JRD2EaMThZOpb7vPuxkqqPH2j5pcqRcxXTSHXAcpPRG6opXROn2JePwq3nUWCnwUPlU7pFc6WI0MfCuR40+78F9sNKKXPsoKsMP71tSAMidvbuTZq0X+uhM4JKe8Jc/DRcbOBu/tRJaO11S+phavshjnf8bEy9KWrvRZCe1V1RmdjG3hVTPeQ4Yy2 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2026 14:21:25.5206 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d16263e-d0f3-4599-ee80-08de63f8ae0c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A61.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8805 Hi Mykyta. > On 13 Jan 2026, at 09:45, Mykyta Poturai wrote: >=20 > Move IRQs from dying CPU to the online ones when a CPU is getting > offlined. When onlining, rebalance all IRQs in a round-robin fashion. > Guest-bound IRQs are already handled by scheduler in the process of > moving vCPUs to active pCPUs, so we only need to handle IRQs used by Xen > itself. >=20 > Signed-off-by: Mykyta Poturai > --- > v4->v5: > * handle CPU onlining as well > * more comments > * fix crash when ESPI is disabled > * don't assume CPU 0 is a boot CPU > * use insigned int for irq number > * remove assumption that all irqs a bound to CPU 0 by default from the > commit message >=20 > v3->v4: > * patch introduced > --- > xen/arch/arm/include/asm/irq.h | 2 ++ > xen/arch/arm/irq.c | 54 ++++++++++++++++++++++++++++++++++ > xen/arch/arm/smpboot.c | 6 ++++ > 3 files changed, 62 insertions(+) >=20 > diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/ir= q.h > index 09788dbfeb..a0250bac85 100644 > --- a/xen/arch/arm/include/asm/irq.h > +++ b/xen/arch/arm/include/asm/irq.h > @@ -126,6 +126,8 @@ bool irq_type_set_by_domain(const struct domain *d); > void irq_end_none(struct irq_desc *irq); > #define irq_end_none irq_end_none >=20 > +void rebalance_irqs(unsigned int from, bool up); > + > #endif /* _ASM_HW_IRQ_H */ > /* > * Local variables: > diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c > index 7204bc2b68..a32dc729f8 100644 > --- a/xen/arch/arm/irq.c > +++ b/xen/arch/arm/irq.c > @@ -158,6 +158,58 @@ static int init_local_irq_data(unsigned int cpu) > return 0; > } >=20 > +static int cpu_next; > + > +static void balance_irq(int irq, unsigned int from, bool up) > +{ > + struct irq_desc *desc =3D irq_to_desc(irq); > + unsigned long flags; > + > + ASSERT(!cpumask_empty(&cpu_online_map)); > + > + spin_lock_irqsave(&desc->lock, flags); > + if ( likely(!desc->action) ) > + goto out; > + > + if ( likely(test_bit(_IRQ_GUEST, &desc->status) || > + test_bit(_IRQ_MOVE_PENDING, &desc->status)) ) > + goto out; > + > + /* > + * Setting affinity to a mask of multiple CPUs causes the GIC driver= s to > + * select one CPU from that mask. If the dying CPU was included in t= he IRQ's > + * affinity mask, we cannot determine exactly which CPU the interrup= t is > + * currently routed to, as GIC drivers lack a concrete get_affinity = API. So > + * to be safe we must reroute it to a new, definitely online, CPU. I= n the > + * case of CPU going down, we move only the interrupt that could res= ide on > + * it. Otherwise, we rearrange all interrupts in a round-robin fashi= on. > + */ > + if ( !up && !cpumask_test_cpu(from, desc->affinity) ) > + goto out; I am a bit lost here on what you are trying to do in the case where a cpu is coming up here, it feels like you are trying to change the affinity of all interrupts in this case to cycle everything. Is it really what is expected ? If affinity was set by a VM on its interrupts, I would not expect Xen to round-robin everything each time a cpu comes up. > + > + cpu_next =3D cpumask_cycle(cpu_next, &cpu_online_map); > + irq_set_affinity(desc, cpumask_of(cpu_next)); > + > +out: > + spin_unlock_irqrestore(&desc->lock, flags); > +} > + > +void rebalance_irqs(unsigned int from, bool up) > +{ > + int irq; > + > + if ( cpumask_empty(&cpu_online_map) ) > + return; > + > + for ( irq =3D NR_LOCAL_IRQS; irq < NR_IRQS; irq++ ) > + balance_irq(irq, from, up); > + > +#ifdef CONFIG_GICV3_ESPI > + for ( irq =3D ESPI_BASE_INTID; irq < ESPI_MAX_INTID; irq++ ) > + balance_irq(irq, from, up); > +#endif > +} > + > static int cpu_callback(struct notifier_block *nfb, unsigned long action, > void *hcpu) > { > @@ -172,6 +224,8 @@ static int cpu_callback(struct notifier_block *nfb, u= nsigned long action, > printk(XENLOG_ERR "Unable to allocate local IRQ for CPU%u\n", > cpu); > break; > + case CPU_ONLINE: > + rebalance_irqs(cpu, true); > } >=20 > return notifier_from_errno(rc); > diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c > index 7f3cfa812e..e1b9f94458 100644 > --- a/xen/arch/arm/smpboot.c > +++ b/xen/arch/arm/smpboot.c > @@ -425,6 +425,12 @@ void __cpu_disable(void) >=20 > smp_mb(); >=20 > + /* > + * Now that the interrupts are cleared and the CPU marked as offline= , > + * move interrupts out of it > + */ > + rebalance_irqs(cpu, false); > + I would expect this to only be useful when HOTPLUG is enabled, maybe we could have a static inline doing nothing when HOTPLUG is not on and only do something if HOTPLUG is enabled here ? Cheers Bertrand > /* Return to caller; eventually the IPI mechanism will unwind and the= =20 > * scheduler will drop to the idle loop, which will call stop_cpu(). = */ > } > --=20 > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 14:41:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 14:41:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220839.1529249 (Exim 4.92) (envelope-from ) id 1vne3r-0002W1-92; Wed, 04 Feb 2026 14:40:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220839.1529249; Wed, 04 Feb 2026 14:40:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vne3r-0002Vu-63; Wed, 04 Feb 2026 14:40:55 +0000 Received: by outflank-mailman (input) for mailman id 1220839; Wed, 04 Feb 2026 14:40:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vne3q-0002Vo-4u for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 14:40:54 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 80e6e649-01d7-11f1-9ccf-f158ae23cfc8; Wed, 04 Feb 2026 15:40:52 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-4358fb60802so556705f8f.1 for ; Wed, 04 Feb 2026 06:40:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 06:40:51 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 15:40:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260204122553.75711-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 15:20, Andrew Cooper wrote: > On 04/02/2026 12:25 pm, Roger Pau Monne wrote: >> The limitation of shared_info being allocated below 4G to fit in the >> start_info field only applies to 32bit PV guests. On 64bit PV guests the >> start_info field is 64bits wide. HVM guests don't use start_info at all. > > All shared info?  HVM does use it, but doesn't see the MFN. I think it's really start_info that is meant here, as that's where the restriction comes from. >> + if ( virt_to_maddr(d->shared_info) >> 32 ) >> + { >> + shared_info_t *prev = d->shared_info; >> + >> + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); >> + if ( !d->shared_info ) >> + { >> + d->shared_info = prev; >> + rc = -ENOMEM; >> + goto undo_and_fail; >> + } >> + put_page(virt_to_page(prev)); >> + clear_page(d->shared_info); > > I think copy_page() would be more appropriate.  That way there are fewer > implicit ordering dependencies. I'd strongly recommend against copy_page() here. If there was any data in there that would need copying, it would need to be done field-wise, using the compat xlat machinery. The layouts are different. It may be prudent to assert that the original page is still completely zeroed. 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On 64bit PV guests the > > start_info field is 64bits wide. HVM guests don't use start_info at all. > > > > Drop the restriction in arch_domain_create() and instead free and > > re-allocate the page from memory below 4G if needed in switch_compat(), > > when the guest is set to run in 32bit PV mode. > > > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > > The tag is here because there is the (largely theoretical?) possibility for > a system to have no memory at all left below 4Gb, in which case creation of > a PV64 or non-shadow HVM guest would needlessly fail? It's kid of an issue we discovered when using strict domain NUMA node placement. At that point the toolstack would exhaust all memory on node 0 and by doing that inadvertently consume all memory below 4G. > > Signed-off-by: Roger Pau Monné > > Reviewed-by: Jan Beulich > with two nits: > > > --- a/xen/arch/x86/pv/domain.c > > +++ b/xen/arch/x86/pv/domain.c > > @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) > > d->arch.has_32bit_shinfo = 1; > > d->arch.pv.is_32bit = true; > > > > + /* Check whether the shared_info page needs to be moved below 4G. */ > > + if ( virt_to_maddr(d->shared_info) >> 32 ) > > + { > > + shared_info_t *prev = d->shared_info; > > + > > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > > + if ( !d->shared_info ) > > + { > > + d->shared_info = prev; > > + rc = -ENOMEM; > > + goto undo_and_fail; > > + } > > + put_page(virt_to_page(prev)); > > + clear_page(d->shared_info); > > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > > + /* Ensure all references to the old shared_info page are dropped. */ > > "references to ... page are dropped" reads as if talk was of page references. > vcpu_info_reset() writes out pointers only, though. May I suggest > > /* Ensure all pointers to the old shared_info page are replaced. */ Fine with me. > ? > > > + for_each_vcpu( d, v ) > > A common oddity, where my personal take is that only one of two forms are > possible (without ./CODING_STYLE saying anything explicit): Either such a > for_each_... is deemed a (kind-of) keyword (like "for"), then it wants to be > > for_each_vcpu ( d, v ) Oh right, I copied it from the instance below and didn't notice the missing spaces. Thanks, Roger. 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On 64bit PV guests the > > start_info field is 64bits wide. HVM guests don't use start_info at all. > > All shared info?  HVM does use it, but doesn't see the MFN. HVM guest use shared_info, but not start_info. The issue is not with shared_info itself, but the size of the field used to store shared_info in start_info. HVM doesn't use start_info, and hence doesn't care about the position of shared_info in that regard. > > > > Drop the restriction in arch_domain_create() and instead free and > > re-allocate the page from memory below 4G if needed in switch_compat(), > > when the guest is set to run in 32bit PV mode. > > > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > > Signed-off-by: Roger Pau Monné > > --- > > xen/arch/x86/domain.c | 7 ++++--- > > xen/arch/x86/pv/domain.c | 20 ++++++++++++++++++++ > > xen/common/domain.c | 2 +- > > xen/include/xen/domain.h | 2 ++ > > 4 files changed, 27 insertions(+), 4 deletions(-) > > > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > > index edb76366b596..3e701f2146c9 100644 > > --- a/xen/arch/x86/domain.c > > +++ b/xen/arch/x86/domain.c > > @@ -882,10 +882,11 @@ int arch_domain_create(struct domain *d, > > goto fail; > > > > /* > > - * The shared_info machine address must fit in a 32-bit field within a > > - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). > > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > > + * field within the guest's start_info structure. We might need to free > > + * and allocate later if the guest turns out to be a 32bit PV one. > > */ > > - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) > > + if ( (d->shared_info = alloc_xenheap_page()) == NULL ) > > goto fail; > > > > The comment is now out of place when the source is read naturally.  I'd > suggest dropping the comment entirely, and ... > > > clear_page(d->shared_info); > > diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c > > index 01499582d2d6..8ced3d70a52f 100644 > > --- a/xen/arch/x86/pv/domain.c > > +++ b/xen/arch/x86/pv/domain.c > > @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) > > d->arch.has_32bit_shinfo = 1; > > d->arch.pv.is_32bit = true; > > > > + /* Check whether the shared_info page needs to be moved below 4G. */ > > ... extending this one talking about the 32bit field. Hm, yes, I've considered doing that. Unless Jan objects I will move the comment then, seeing as you also think it's best. > > + if ( virt_to_maddr(d->shared_info) >> 32 ) > > + { > > + shared_info_t *prev = d->shared_info; > > + > > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > > + if ( !d->shared_info ) > > + { > > + d->shared_info = prev; > > + rc = -ENOMEM; > > + goto undo_and_fail; > > + } > > + put_page(virt_to_page(prev)); > > + clear_page(d->shared_info); > > I think copy_page() would be more appropriate.  That way there are fewer > implicit ordering dependencies. Hm, I had a copy_page() initially, but I don't think it's appropriate because (most of?) the fields will need translation. I don't think translation is feasible, but I could at least call update_domain_wallclock_time() which is what hvm_latch_shinfo_size() does when changing bitness. > > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > > + /* Ensure all references to the old shared_info page are dropped. */ > > + for_each_vcpu( d, v ) > > + vcpu_info_reset(v); > > switch_compat() can only occur on a domain with no memory.  How can we > have outstanding references? As Jan pointed out, it's not references, but stashed pointers to the previous shared_info page. I've used the wrong wording here. Thanks, Roger. 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Wed, 04 Feb 2026 07:02:44 -0800 (PST) Message-ID: <0f0a7479-5f12-4803-9348-2c295a1939a4@suse.com> Date: Wed, 4 Feb 2026 16:02:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/3] xen/riscv: implement p2m_ctx_switch_{to,from}_state() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <2e4cd29f19945e90733ac85e023d53cecbe1d14d.1770036584.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2e4cd29f19945e90733ac85e023d53cecbe1d14d.1770036584.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.02.2026 13:57, Oleksii Kurochko wrote: > Introduce functions required to perform a p2m context switch during > a vCPU context switch. > > As no mechanism is provided to atomically change vsatp and hgatp > together. This sentence doesn't parse; imo you simply want to drop "As". > Hence, to prevent speculative execution causing one > guest’s VS-stage translations to be cached under another guest’s > VMID, world-switch code should zero vsatp in p2m_ctx_swith_from(), > then construct new hgatp and write the new vsatp value in > p2m_ctx_switch_to(). > > Signed-off-by: Oleksii Kurochko > --- > xen/arch/riscv/include/asm/p2m.h | 4 ++ > xen/arch/riscv/p2m.c | 81 ++++++++++++++++++++++++++++++++ > 2 files changed, 85 insertions(+) > > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) > struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > p2m_type_t *t); > > + As before: No double blank lines please. > +void p2m_ctx_switch_from(struct vcpu *p); > +void p2m_ctx_switch_to(struct vcpu *n); Like for the other functions, please consider s/ctx/ctxt/. > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1434,3 +1434,84 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > > return get_page(page, p2m->domain) ? page : NULL; > } > + > +void p2m_ctx_switch_from(struct vcpu *p) > +{ > + /* > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value. > + */ > + p->arch.vsatp = csr_read(CSR_VSATP); > + csr_write(CSR_VSATP, 0); Why two CSR accesses when one will do? RISC-V specifically has the CSRRW insn. > + /* > + * No need for VS-stage TLB flush here: > + * Changing satp.MODE from Bare to other modes and vice versa also > + * takes effect immediately, without the need to execute an > + * SFENCE.VMA instruction. > + * Note that VSATP is just VS-mode’s version of SATP, so the mentioned > + * above should be true for VSATP. > + */ > + > + /* > + * Nothing to do with HGATP as it is constructed each time when > + * p2m_ctx_switch_to() is called. > + */ > +} > + > +void p2m_ctx_switch_to(struct vcpu *n) > +{ > + struct vcpu_vmid *p_vmid = &n->arch.vmid; > + uint16_t old_vmid, new_vmid; > + bool need_flush; > + > + if ( is_idle_vcpu(n) ) > + return; Shouldn't the other function have such a check, too? > + old_vmid = p_vmid->vmid; > + need_flush = vmid_handle_vmenter(p_vmid); As you're re-using x86'es model, I'm not quite sure why this would be needed. I don't think we have such in x86; aiui this should be handled while actually doing the VM entry. > + new_vmid = p_vmid->vmid; > + > +#ifdef P2M_DEBUG > + printk(XENLOG_INFO, "%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", > + n, old_vmid, new_vmid, need_flush); > +#endif > + > + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), > + new_vmid)); > + > + if ( unlikely(need_flush) ) > + local_hfence_gvma_all(); > + > + /* > + * According to the RISC-V specification, speculation can happen > + * during an update of hgatp and vsatp: > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value. Similarly, if henvcfg.PBMTE > + * need be world-switched, it should be switched after zeroing vsatp > + * but before writing the new vsatp value, obviating the need to > + * execute an HFENCE.VVMA instruction. > + * So just flush TLBs for VS-Stage and G-stage after both of regs are > + * touched. > + */ > + flush_tlb_guest_local(); Which "both regs" does the comment talk about? Doesn't the flush want to come ... > + /* > + * The vsatp register is a VSXLEN-bit read/write register that is > + * VS-mode’s version of supervisor register satp, so the following is > + * true for VSATP registers: > + * Changing satp.MODE from Bare to other modes and vice versa also takes > + * effect immediately, without the need to execute an SFENCE.VMA > + * instruction. Likewise, changes to satp.ASID take effect immediately. > + * Considering the mentioned above and that VS-stage TLB flush has been > + * already done there is no need to flush VS-stage TLB after an update > + * of VSATP from Bare mode to what is written in `n->arch.vsatp`. > + */ > + csr_write(CSR_VSATP, n->arch.vsatp); ... after this? Then some of the commentary also doesn't look to be necessary. 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Wed, 04 Feb 2026 07:04:58 -0800 (PST) Message-ID: <87e824c4-0f24-4d3b-a261-7fe19d554f0c@suse.com> Date: Wed, 4 Feb 2026 16:04:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Andrew Cooper References: <20260204122553.75711-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 16:01, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 03:20:09PM +0100, Andrew Cooper wrote: >> On 04/02/2026 12:25 pm, Roger Pau Monne wrote: >>> --- a/xen/arch/x86/pv/domain.c >>> +++ b/xen/arch/x86/pv/domain.c >>> @@ -247,6 +247,26 @@ int switch_compat(struct domain *d) >>> d->arch.has_32bit_shinfo = 1; >>> d->arch.pv.is_32bit = true; >>> >>> + /* Check whether the shared_info page needs to be moved below 4G. */ >> >> ... extending this one talking about the 32bit field. > > Hm, yes, I've considered doing that. Unless Jan objects I will move > the comment then, seeing as you also think it's best. Definitely no objection from me. My R-b stands with that movement. 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Wed, 04 Feb 2026 07:08:23 -0800 (PST) Message-ID: <3f9b4337-3e0a-4693-b97f-46505bc1349a@suse.com> Date: Wed, 4 Feb 2026 16:08:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260204122553.75711-1-roger.pau@citrix.com> <82540f88-ffcd-46a9-9813-ebe42ef0b0ec@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 15:52, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 03:06:52PM +0100, Jan Beulich wrote: >> On 04.02.2026 13:25, Roger Pau Monne wrote: >>> The limitation of shared_info being allocated below 4G to fit in the >>> start_info field only applies to 32bit PV guests. On 64bit PV guests the >>> start_info field is 64bits wide. HVM guests don't use start_info at all. >>> >>> Drop the restriction in arch_domain_create() and instead free and >>> re-allocate the page from memory below 4G if needed in switch_compat(), >>> when the guest is set to run in 32bit PV mode. >>> >>> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") >> >> The tag is here because there is the (largely theoretical?) possibility for >> a system to have no memory at all left below 4Gb, in which case creation of >> a PV64 or non-shadow HVM guest would needlessly fail? > > It's kid of an issue we discovered when using strict domain NUMA node > placement. At that point the toolstack would exhaust all memory on > node 0 and by doing that inadvertently consume all memory below 4G. Right, and hence also my "memory: arrange to conserve on DMA reservation", where I'm still fighting with myself as to what to do with the comments you gave there. Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 15:11:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 15:11:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220898.1529308 (Exim 4.92) (envelope-from ) id 1vneX6-00015x-HT; Wed, 04 Feb 2026 15:11:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220898.1529308; Wed, 04 Feb 2026 15:11:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneX6-00015q-El; Wed, 04 Feb 2026 15:11:08 +0000 Received: by outflank-mailman (input) for mailman id 1220898; Wed, 04 Feb 2026 15:11:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneX5-00015h-Ld for xen-devel@lists.xenproject.org; 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>>> + >>> + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); >>> + if ( !d->shared_info ) >>> + { >>> + d->shared_info = prev; >>> + rc = -ENOMEM; >>> + goto undo_and_fail; >>> + } >>> + put_page(virt_to_page(prev)); >>> + clear_page(d->shared_info); >> I think copy_page() would be more appropriate.  That way there are fewer >> implicit ordering dependencies. > I'd strongly recommend against copy_page() here. If there was any data in > there that would need copying, it would need to be done field-wise, using > the compat xlat machinery. The layouts are different. It may be prudent to > assert that the original page is still completely zeroed. Oh, yes.  The layouts will be different.  Fine. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 04 15:13:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 15:13:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220908.1529318 (Exim 4.92) (envelope-from ) id 1vneZG-0001fL-Vo; Wed, 04 Feb 2026 15:13:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220908.1529318; Wed, 04 Feb 2026 15:13:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneZG-0001fE-TK; Wed, 04 Feb 2026 15:13:22 +0000 Received: by outflank-mailman (input) for mailman id 1220908; Wed, 04 Feb 2026 15:13:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneZF-0001f7-Fd for xen-devel@lists.xenproject.org; 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>>> + /* Ensure all references to the old shared_info page are dropped. */ >>> + for_each_vcpu( d, v ) >>> + vcpu_info_reset(v); >> switch_compat() can only occur on a domain with no memory.  How can we >> have outstanding references? > As Jan pointed out, it's not references, but stashed pointers to the > previous shared_info page. I've used the wrong wording here. Yes, I saw that thread, but my question still stands. How can there be any this early in the domain's lifecycle? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 04 15:31:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 15:31:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220921.1529328 (Exim 4.92) (envelope-from ) id 1vneqd-0004ng-CY; Wed, 04 Feb 2026 15:31:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220921.1529328; Wed, 04 Feb 2026 15:31:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneqd-0004nZ-9U; Wed, 04 Feb 2026 15:31:19 +0000 Received: by outflank-mailman (input) for mailman id 1220921; Wed, 04 Feb 2026 15:31:17 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vneqb-0004nT-Nu for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 15:31:17 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8af3f2af-01de-11f1-b161-2bf370ae4941; Wed, 04 Feb 2026 16:31:15 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-47ff94b46afso11326365e9.1 for ; Wed, 04 Feb 2026 07:31:15 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 04 Feb 2026 07:31:14 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 16:31:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 14:16, Bertrand Marquis wrote: > Xen does not currently document how to build the hypervisor on macOS, and > there is no Darwin configuration for a Homebrew-based toolchain. In > addition, the Makefile silent-mode detection can be tripped by -I paths > that contain an "s", which hides build commands unexpectedly. This wants submitting as a standalone fix, so it can be backported. But see also below. I don't, however, understand how -I could be useful here - our build system is self-contained, so any include directives used should be satisfiable without any -I. > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,4 @@ > +include $(XEN_ROOT)/config/StdGNU.mk Darwin isn't really a GNU environment, is it? The definitions in that file may be suitable, but perhaps a brief comment is warranted? > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -116,7 +116,7 @@ endif > # If the user is running make -s (silent mode), suppress echoing of > # commands > > -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) > +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) While probably this would do, assuming make isn't going to make drastic changes to how $(MAKEFLAGS) is set up, how about -ifneq ($(findstring s,$(filter-out -%,$(MAKEFLAGS))),) instead? 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Wed, 04 Feb 2026 07:32:28 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 16:32:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260204122553.75711-1-roger.pau@citrix.com> <764e6a9f-8def-4f6e-8311-ef91b6c3886e@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <764e6a9f-8def-4f6e-8311-ef91b6c3886e@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 16:12, Andrew Cooper wrote: > On 04/02/2026 3:01 pm, Roger Pau Monné wrote: >>>> + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); >>>> + /* Ensure all references to the old shared_info page are dropped. */ >>>> + for_each_vcpu( d, v ) >>>> + vcpu_info_reset(v); >>> switch_compat() can only occur on a domain with no memory.  How can we >>> have outstanding references? >> As Jan pointed out, it's not references, but stashed pointers to the >> previous shared_info page. I've used the wrong wording here. > > Yes, I saw that thread, but my question still stands. > > How can there be any this early in the domain's lifecycle? Can't (aren't) vCPU-s added ahead of adding memory? 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7wMlFuusfmV6EovOieHPWqM1QwTdHp0vZIn4sXp4RpKZ2C3oT6xRDpkNfR4kvucsjHFCSBpZqhZGbPPPDpk8FytrpoUWB0t/RNXj6BflR0ERnrMrVkBnR4PnIdSU9qS/Xxqa8BmIcTQf4kkfFpRQRuAg0Rlk+FNqL7wEaVTdNtoBZRtOZr39WSIr/NfXbcNXhSpkFmXZHrZin/0mAHIxFDew/B/01AUAhjbqsurKLAnLfczOyHbjtuBc68h1vH1e7+4+n/sIFREqmKq8IF9d2V5s2eqoNKxwr9vdckoyDeoGZmBepS5dBTEZGNvFZSTke/+ssBA9xc858eSWD05XWnStQqVW7XwMIabRjWQxuJ0GxBYZB8BQLBJ3MGMr1BWSOXwou8qkRa6fzZSSBn1dIITY89Z8yVqjiqiWJwBB6hFCVxUKsDgV+SPcpmRju22a X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2026 15:46:37.3810 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 323ac4c7-0487-4159-6db5-08de640494f4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509E8.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR08MB7926 Hi Jan, > On 4 Feb 2026, at 16:31, Jan Beulich wrote: >=20 > On 04.02.2026 14:16, Bertrand Marquis wrote: >> Xen does not currently document how to build the hypervisor on macOS, an= d >> there is no Darwin configuration for a Homebrew-based toolchain. In >> addition, the Makefile silent-mode detection can be tripped by -I paths >> that contain an "s", which hides build commands unexpectedly. >=20 > This wants submitting as a standalone fix, so it can be backported. But s= ee > also below. I don't, however, understand how -I could be useful here - ou= r > build system is self-contained, so any include directives used should be > satisfiable without any -I. This is added automatically inside our Makefile if you build out of tree: MAKEFLAGS +=3D --include-dir=3D$(abs_srctree) which ends up being -Ixxx when tested. I was not thinking as this being a candidate for backport as the only consequence is that if you have a s in the full path to the xen tree your build will be silent even if you pass V=3D1 or Q=3D to make but things will still build. But i will split that as a standalone patch. >=20 >> --- /dev/null >> +++ b/config/Darwin.mk >> @@ -0,0 +1,4 @@ >> +include $(XEN_ROOT)/config/StdGNU.mk >=20 > Darwin isn't really a GNU environment, is it? The definitions in that fil= e > may be suitable, but perhaps a brief comment is warranted? Yes this is only valid because we use brew in that case. I will add a comment. >=20 >> --- a/xen/Makefile >> +++ b/xen/Makefile >> @@ -116,7 +116,7 @@ endif >> # If the user is running make -s (silent mode), suppress echoing of >> # commands >>=20 >> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >> +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) >=20 > While probably this would do, assuming make isn't going to make drastic > changes to how $(MAKEFLAGS) is set up, how about >=20 > -ifneq ($(findstring s,$(filter-out -%,$(MAKEFLAGS))),) >=20 > instead? Yes this is a solution that should work to, making the assumption that shor= t arguments are kept at the beginning like they are now is possibly to strong= . I will test and check that and submit submit 2 independent patches. Cheers Bertrand >=20 > Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 04 16:09:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 16:09:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1220964.1529359 (Exim 4.92) (envelope-from ) id 1vnfRB-0002Vt-Hc; Wed, 04 Feb 2026 16:09:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1220964.1529359; Wed, 04 Feb 2026 16:09:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnfRB-0002Vm-Ey; Wed, 04 Feb 2026 16:09:05 +0000 Received: by outflank-mailman (input) for mailman id 1220964; Wed, 04 Feb 2026 16:09:04 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnfRA-0002Vg-2e for xen-devel@lists.xenproject.org; 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> > > > dirty_cnt++; > > + > > + /* > > + * Use SYS_STATE_smp_boot explicitly; ahead of that state > > + * interrupts are disabled. > > + */ > > + if ( system_state == SYS_STATE_smp_boot && > > + !(dirty_cnt & 0xff) ) > > + process_pending_softirqs(); > > } > > else > > check_one_page(&pg[i]); > > Coming back to this, I see two possible issues. One is that on x86 enabling > of IRQs happens a bit earlier than setting of SYS_STATE_smp_boot. Maybe this > isn't really a problem right now, but it could become one if the "wrong" > thing is inserted into that window in __start_xen(). Even if IRQs are enabled a bit earlier, the watchdog is only setup after SYS_STATE_smp_boot state is set. > The other is that only x86 actually ever sets that state. TBH we have never seen the watchdog triggering during initial domain creation, so the workaround added here was out of caution. There's a certain amount of contention required for the watchdog to trigger, and that scenario doesn't happen during boot, as domain creation is serialized. I could maybe gate the softirq processing as: if ( system_state < SYS_STATE_active && local_irq_enabled() && !(dirty_cnt & 0xff) ) process_pending_softirqs(); Or completely avoid softirq processing in alloc_heap_pages(). Thanks, Roger. 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Wed, 04 Feb 2026 08:10:21 -0800 (PST) Message-ID: <0e2ceca5-8ab8-4c52-8a8a-b7dbdca50820@suse.com> Date: Wed, 4 Feb 2026 17:10:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/boot: Handle better alignment for 32 bit code To: Frediano Ziglio Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250114115430.104084-1-frediano.ziglio@cloud.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250114115430.104084-1-frediano.ziglio@cloud.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 14.01.2025 12:54, Frediano Ziglio wrote: > Output file didn't have correct alignment. Coming back to this (as it's still in my "pending" folder), what does the above mean? In how far was which alignment not correct for what purpose? > --- a/xen/arch/x86/boot/Makefile > +++ b/xen/arch/x86/boot/Makefile > @@ -40,8 +40,12 @@ LD32 := $(LD) $(subst x86_64,i386,$(LDFLAGS_DIRECT)) > # are affected by both text_diff and text_gap. Ensure the sum of gap and diff > # is greater than 2^16 so that any 16bit relocations if present in the object > # file turns into a build-time error. > -text_gap := 0x010200 > -text_diff := 0x408020 > +# As gap will affect the output section size it should not be huge to avoid the > +# creation of huge files. > +# The sum of gap and diff will affect the possible alignment so should be a > +# multiple of the possible alignment. > +text_gap := 0x01c240 > +text_diff := 0x7e3dc0 It remains unclear what "possible alignment" here is. Maybe that's the "up to 2mb" that the description talks about, but when looking at the file later the description of this change will not be readily available. > @@ -80,6 +83,7 @@ cmd_combine = \ > --bin1 $(obj)/built-in-32.base.bin \ > --bin2 $(obj)/built-in-32.offset.bin \ > --map $(obj)/built-in-32.base.map \ > + --align $(shell $(OBJDUMP) -h $(obj)/built-in-32.base.o|sed '/text.*2\*\*/ {s/.*2\*\*//;p;}; d') \ I've tried this out manually on $(obj)/built-in-32.o, as $(obj)/built-in-32.base.o isn't there without applying this patch. I'm observing two matching sections there, i.e. I wonder whether the regex shouldn't be tightened. Not being fluent with sed commands, I also wonder whether passing -n to the tool in favor of the d command might not be better. > @@ -90,4 +94,4 @@ $(obj)/built-in-32.S: $(obj)/built-in-32.base.bin $(obj)/built-in-32.offset.bin > $(srctree)/tools/combine_two_binaries.py FORCE > $(call if_changed,combine) > > -clean-files := built-in-32.*.bin built-in-32.*.map build32.*.lds > +clean-files := built-in-32.*.bin built-in-32.*.map built-in-32.*.o build32.*.lds As before I think this is a separate bugfix anyway. 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Wed, 04 Feb 2026 08:15:04 -0800 (PST) Message-ID: Date: Wed, 4 Feb 2026 17:15:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.02.2026 16:45, Bertrand Marquis wrote: >> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >> On 04.02.2026 14:16, Bertrand Marquis wrote: >>> Xen does not currently document how to build the hypervisor on macOS, and >>> there is no Darwin configuration for a Homebrew-based toolchain. In >>> addition, the Makefile silent-mode detection can be tripped by -I paths >>> that contain an "s", which hides build commands unexpectedly. >> >> This wants submitting as a standalone fix, so it can be backported. But see >> also below. I don't, however, understand how -I could be useful here - our >> build system is self-contained, so any include directives used should be >> satisfiable without any -I. > > This is added automatically inside our Makefile if you build out of tree: > > MAKEFLAGS += --include-dir=$(abs_srctree) > > which ends up being -Ixxx when tested. Hmm, but I do have an 's' in my source path, yet I need to explicitly pass -s for the build to be silent. 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In > > addition, the Makefile silent-mode detection can be tripped by -I paths > > that contain an "s", which hides build commands unexpectedly. > > This wants submitting as a standalone fix, so it can be backported. But see > also below. I don't, however, understand how -I could be useful here - our > build system is self-contained, so any include directives used should be > satisfiable without any -I. > > > --- /dev/null > > +++ b/config/Darwin.mk > > @@ -0,0 +1,4 @@ > > +include $(XEN_ROOT)/config/StdGNU.mk > > Darwin isn't really a GNU environment, is it? The definitions in that file > may be suitable, but perhaps a brief comment is warranted? It's similar to FreeBSD in that regard, which is also not a GNU environment as the compiler and toolchain is LLVM. However the LLVM toolchain attempt to be command line and output compatible with the GNU one AFAIK. FreeBSD.mk also includes StdGNU.mk. Maybe we want to rename StdGNU.mk to generic.mk or common.mk? Thanks, Roger. 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The definitions in that file > > may be suitable, but perhaps a brief comment is warranted? > > Yes this is only valid because we use brew in that case. > I will add a comment. Oh, so you end up building using the GNU toolchain provided by homebrew and not the LLVM one? Sorry, I was assuming that you did use the native LLVM toolchain when possible. Thanks, Roger. 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On 64bit PV guests the > >>> start_info field is 64bits wide. HVM guests don't use start_info at all. > >>> > >>> Drop the restriction in arch_domain_create() and instead free and > >>> re-allocate the page from memory below 4G if needed in switch_compat(), > >>> when the guest is set to run in 32bit PV mode. > >>> > >>> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > >> > >> The tag is here because there is the (largely theoretical?) possibility for > >> a system to have no memory at all left below 4Gb, in which case creation of > >> a PV64 or non-shadow HVM guest would needlessly fail? > > > > It's kid of an issue we discovered when using strict domain NUMA node > > placement. At that point the toolstack would exhaust all memory on > > node 0 and by doing that inadvertently consume all memory below 4G. > > Right, and hence also my "memory: arrange to conserve on DMA reservation", > where I'm still fighting with myself as to what to do with the comments you > gave there. Better fighting with yourself rather than fighting with me I guess ;). That change would be controversial with what we currently do on XenServer, because we don't (yet) special case the memory below 4G to not account for it in the per node free amount of memory. What would happen when you append the MEMF_no_dma flag as proposed in your commit, but the caller is also passing MEMF_exact_node with target node 0? AFAICT the allocation would still refuse to use the low 4G pool. Also, your commit should also be expanded to avoid staking claims that would drain the DMA pool, as then populate_physmap() won't be able to allocate from there? It would be weird for the toolstack to have successfully made a claim, and then populate_physmap() returning -ENOMEM because (part of) the claim has been made against the DMA pool, which populate_physmap() would explicitly forbidden to allocate from. Thanks, Roger. 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> >>>> + /* Ensure all references to the old shared_info page are dropped. */ > >>>> + for_each_vcpu( d, v ) > >>>> + vcpu_info_reset(v); > >>> switch_compat() can only occur on a domain with no memory.  How can we > >>> have outstanding references? > >> As Jan pointed out, it's not references, but stashed pointers to the > >> previous shared_info page. I've used the wrong wording here. > > > > Yes, I saw that thread, but my question still stands. > > > > How can there be any this early in the domain's lifecycle? > > Can't (aren't) vCPU-s added ahead of adding memory? At least on x86 when using xl/libxl the call to XEN_DOMCTL_set_address_size happens after the call to XEN_DOMCTL_max_vcpus, and the later calls vcpu_create() which sets the pointer into the shared_info page for legacy (< 32) vCPUs. Even if we could invert those two calls, it's impossible to know what other toolstacks might do. I think we need to keep the vcpu_info_reset() call. Thanks, Roger. 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>>>>>> + /* Ensure all references to the old shared_info page are dropped. */ >>>>>> + for_each_vcpu( d, v ) >>>>>> + vcpu_info_reset(v); >>>>> switch_compat() can only occur on a domain with no memory.  How can we >>>>> have outstanding references? >>>> As Jan pointed out, it's not references, but stashed pointers to the >>>> previous shared_info page. I've used the wrong wording here. >>> Yes, I saw that thread, but my question still stands. >>> >>> How can there be any this early in the domain's lifecycle? >> Can't (aren't) vCPU-s added ahead of adding memory? > At least on x86 when using xl/libxl the call to > XEN_DOMCTL_set_address_size happens after the call to > XEN_DOMCTL_max_vcpus, and the later calls vcpu_create() which sets the > pointer into the shared_info page for legacy (< 32) vCPUs. Geez, that disaster of an interface still has spike traps we're falling foul of. Please extend the comment to note the first 32 vcpu compatibility case. But, combined with the format change (clear vs copy page), doesn't it mean there's an existing bug here? Even without moving the shared_info page, aren't the cached pointers made wrong by switch_compat() ? This is one area where we've got no XTF testing at all, and I probably ought to see about fixing that. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 04 17:37:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 17:37:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221086.1529449 (Exim 4.92) (envelope-from ) id 1vngoo-0000rx-Gg; Wed, 04 Feb 2026 17:37:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221086.1529449; Wed, 04 Feb 2026 17:37:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vngoo-0000rq-DV; Wed, 04 Feb 2026 17:37:34 +0000 Received: by outflank-mailman (input) for mailman id 1221086; Wed, 04 Feb 2026 17:37:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vngon-0000rk-FP for xen-devel@lists.xenproject.org; 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The definitions in that file > >>> may be suitable, but perhaps a brief comment is warranted? > >> > >> Yes this is only valid because we use brew in that case. > >> I will add a comment. > > > > Oh, so you end up building using the GNU toolchain provided by > > homebrew and not the LLVM one? Sorry, I was assuming that you did use > > the native LLVM toolchain when possible. > > I am using the GNU toolchain using brew. > > That would also work using LLVM i guess but the dependency on other GNU > tools like make and sed would still be there so you would need brew (or something > else providing gnu make and sed for our build to work). GNU make is provided by OSX Command Line tools, you shouldn't need to install it from homebrew. Same with sed, the one provided by OS X which is FreeBSD sed should work with the Xen build system (at least on x86 we attempt to not use GNU extensions to sed). However, I don't know whether the LLVM toolchain in OS X will be capable of producing ELF binaries - most likely not, it's likely limited to the OS X Mach-O format. > In any case you would require to include StdGNU.mk anyway. > > I am not sure if renaming it is a good idea as you need something GNU friendly > even if it is not a GNU thing so .... Hm, yes, it's a POSIX environment plus a GNU compatible toolchain. Thanks, Roger. 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> >>>>>> + /* Ensure all references to the old shared_info page are dropped. */ > >>>>>> + for_each_vcpu( d, v ) > >>>>>> + vcpu_info_reset(v); > >>>>> switch_compat() can only occur on a domain with no memory.  How can we > >>>>> have outstanding references? > >>>> As Jan pointed out, it's not references, but stashed pointers to the > >>>> previous shared_info page. I've used the wrong wording here. > >>> Yes, I saw that thread, but my question still stands. > >>> > >>> How can there be any this early in the domain's lifecycle? > >> Can't (aren't) vCPU-s added ahead of adding memory? > > At least on x86 when using xl/libxl the call to > > XEN_DOMCTL_set_address_size happens after the call to > > XEN_DOMCTL_max_vcpus, and the later calls vcpu_create() which sets the > > pointer into the shared_info page for legacy (< 32) vCPUs. > > Geez, that disaster of an interface still has spike traps we're falling > foul of. > > Please extend the comment to note the first 32 vcpu compatibility case. > > But, combined with the format change (clear vs copy page), doesn't it > mean there's an existing bug here? > > Even without moving the shared_info page, aren't the cached pointers > made wrong by switch_compat() ? No, they are not wrong because the vcpu_info array is at the start of shared_info, and it has the same size (64bytes) on both 32 and 64bits. Hence the offsets into the different vcpu_info array elements are the same regardless of bitness. > This is one area where we've got no XTF testing at all, and I probably > ought to see about fixing that. Yeah, it's not great. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Wed Feb 04 18:50:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 18:50:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221140.1529468 (Exim 4.92) (envelope-from ) id 1vnhx7-0002Wc-Sx; Wed, 04 Feb 2026 18:50:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221140.1529468; Wed, 04 Feb 2026 18:50:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnhx7-0002WV-Q4; Wed, 04 Feb 2026 18:50:13 +0000 Received: by outflank-mailman (input) for mailman id 1221140; Wed, 04 Feb 2026 18:50:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnhx6-0002WP-Ai for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 18:50:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnhx6-002hOQ-0g; Wed, 04 Feb 2026 18:50:11 +0000 Received: from [2a02:8012:3a1:0:9835:c5b7:50d0:e87] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vnhx5-00HAwQ-1p; Wed, 04 Feb 2026 18:50:11 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=Om5hu8pJnwuikPmpUAJ7cH++Vp8OmWEdLEekTPPVWPE=; b=n3o53PCTJI7hcCydC2bbiap057 x5Mj1o1uuL1DQSAjorAUufn8SRtJV7ezOaA7LzMJYB+d74P0ZTQ8wnKgxT3PjCJdwRRqIg/+VpfIO LfyEuNgzTdqwo+Tz9thqPjw6Pw6sx5OVNqjq/s1Ayp4BG2jzgfi/BZVeGWOL/LtFJK8U=; Message-ID: <6b7bc15c-e3de-44a1-bbce-92397ee438fc@xen.org> Date: Wed, 4 Feb 2026 18:50:08 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: relax barrier in sync_vcpu_execstate() To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko References: Content-Language: en-US From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Jan, On 04/02/2026 13:15, Jan Beulich wrote: > The counterpart in vcpu_context_saved() is smp_wmb(), and here we don't > really need any more than a read barrier: The concern expressed in the > comment is void, as updates to the context are necessarily observed ahead > of ->is_running going false, by virtue of said barrier in > vcpu_context_saved(). > > Fixes: f6790389613c ("xen/arm: sched: Ensure the vCPU context is seen before vcpu_pause() returns") > Signed-off-by: Jan Beulich Acked-by: Julien Grall > --- > As to the tag, this is one of the cases where I'm on the edge between > Amends: and Fixes:. Good question. I would not consider the patch as backport and it is border line a bug fix (the barrier is just too strong) so Amends may be better. I will leave it up to you when you commit. > > Subsequently we may want to move the barrier into the sole common code > caller, seeing that the other barrier also is in common code. Furthermore, > seeing that for all but x86 the function is then entirely empty, we may > want to allow it to be inline to avoid the unnecessary (tail) call. +1 for both proposal. > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -342,11 +342,8 @@ void sync_vcpu_execstate(struct vcpu *v) > * Per vcpu_context_saved(), the context can be observed when > * v->is_running is false (the caller should check it before calling > * this function). > - * > - * Note this is a full barrier to also prevent update of the context > - * to happen before it was observed. > */ > - smp_mb(); > + smp_rmb(); > } > > #define NEXT_ARG(fmt, args) \ Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Wed Feb 04 18:53:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 18:53:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221152.1529479 (Exim 4.92) (envelope-from ) id 1vni0a-00034M-C1; Wed, 04 Feb 2026 18:53:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221152.1529479; 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Srinivasan" , "Haiyang Zhang" , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , , , , , , , Rahul Bukte , Daniel Palmer , Tim Bird , References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> From: Sohil Mehta In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR03CA0064.namprd03.prod.outlook.com (2603:10b6:a03:331::9) To DS0PR11MB7997.namprd11.prod.outlook.com (2603:10b6:8:125::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7997:EE_|DS0PR11MB8163:EE_ X-MS-Office365-Filtering-Correlation-Id: 8057de85-c57d-46e6-3aab-08de641eb22b X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|7416014|376014; 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I meant the X86_FEATURE_X2APIC and not X86_FEATURE_APIC. But, thinking about it more, checking that the CPU is really in X2APIC mode by reading the MSR is good enough. > x2apic_enabled also does the same checks, > the only difference being, it uses rdmsrq_safe instead of just rdmsrq, > which is what __x2apic_disable uses. The safe version is because of > Boris' suggestion [1]. If that's applicable here as well, then rdmsrq in > __x2apic_disable should be changed to rdmsrq_safe. I don't know if there is a strong justification for changing to rdmsrq_safe() over here. Also, that would be beyond the scope of this patch. In general, it's better to avoid such changes unless an actual issue pops up. > >> I considered if an error message should be printed along with this. But, >> I am not sure if it can really be called a firmware issue. It's probably >> just that newer CPUs might have started defaulting to x2apic on. >> >> Can you specify what platform you are encountering this? > > > I'm not sure it's the CPU defaulting to x2apic on. As per Section > 12.12.5.1 of the Intel SDM: > > On coming out of reset, the local APIC unit is enabled and is in > the xAPIC mode: IA32_APIC_BASE[EN]=1 and IA32_APIC_BASE[EXTD]=0. > > So, the CPU should be turning on in xapic mode. In fact, when x2apic is > disabled in the firmware, this problem doesn't happen. > It's a bit odd then that the firmware chooses to enable x2apic without the OS requesting it. Linux maintains a concept of X2APIC_ON_LOCKED in x2apic_state which is based on the hardware preference to keep the apic in X2APIC mode. When you have x2apic enabled in firmware, but the system is in XAPIC mode, can you read the values in MSR_IA32_ARCH_CAPABILITIES and MSR_IA32_XAPIC_DISABLE_STATUS? XAPIC shouldn't be disabled because you are running in that mode. But, it would be good to confirm. > Either way, a pr_warn maybe helpful. How about "x2apic re-enabled by the > firmware during resume. Disabling\n"? I mainly want to make sure the firmware is really at fault before we add such a print. But it seems likely now that the firmware messed up. From xen-devel-bounces@lists.xenproject.org Wed Feb 04 23:30:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 23:30:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221237.1529499 (Exim 4.92) (envelope-from ) id 1vnmKA-0000pa-3Z; Wed, 04 Feb 2026 23:30:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221237.1529499; Wed, 04 Feb 2026 23:30:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnmK9-0000pS-V2; Wed, 04 Feb 2026 23:30:17 +0000 Received: by outflank-mailman (input) for mailman id 1221237; Wed, 04 Feb 2026 23:30:15 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnmK7-0000pM-Jb for xen-devel@lists.xenproject.org; Wed, 04 Feb 2026 23:30:15 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 71680c11-0221-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 00:30:09 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id AD23642A72; Wed, 4 Feb 2026 23:30:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F59EC4CEF7; Wed, 4 Feb 2026 23:30:06 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 71680c11-0221-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770247807; bh=K1XBJ+iPf0+mEXtlRmo6IsXFzXYMryUhBxLSvA+haUY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=OWXVcgk2Re679D7ZYNZEw3FS/uugHAWb5mzmRfwWVaDlSBqtoE95wt79Fw6ZjlfxA 3ymveDyhONgh5OXoA09GOHnqrWsH0tPNpvRysVA+bQC9W8x136QUFM9E1B3fquF1gT 1wCgfyv1a03VPqNUBwFLPZLrZ8OocyY2iubDHD8o7ql8Et7LjtHAM6a5eIwNhZGL8B QoZ+73pXfVQEAMohdPYjQb45crRqQq+LUxI9G2fRT/f8J50wBg1uh71S05adiPZTjM lGfGrQpPdVSJ/6LiCJ2XHaorNom3uZKMvFQL8DnzL2OzPLhfQw0pbb46jvfJkOT24s b1y0RIQEAuYiQ== Date: Wed, 4 Feb 2026 15:30:05 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v8 1/2] xen/console: handle multiple domains using console_io hypercalls In-Reply-To: <0a437580-a373-4aeb-a153-b3dca0cf2bb7@suse.com> Message-ID: References: <20260129220858.2371938-1-stefano.stabellini@amd.com> <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> <0a437580-a373-4aeb-a153-b3dca0cf2bb7@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 4 Feb 2026, Jan Beulich wrote: > On 04.02.2026 00:02, Stefano Stabellini wrote: > > On Tue, 3 Feb 2026, Jan Beulich wrote: > >> On 29.01.2026 23:08, Stefano Stabellini wrote: > >>> @@ -555,7 +566,10 @@ static void console_switch_input(void) > >>> > >>> if ( next_rx++ >= max_console_rx ) > >>> { > >>> + nrspin_lock_irq(&console_lock); > >> > >> As indicated earlier, you can't know IRQ state in anything down the call > >> tree from serial_rx(). > > > > I'll switch to the irqsave/restore versions in console_switch_input > > I've seen that you already sent v9, but seeing how getting the locking right > has proven to be difficult, I have two more remarks towards this. > > 1) Can the locking additions to existing code please be split out into a > separate patch? I did this > 2) As all of this is for dom0less only (for now at least), did you consider > to make all of these changes dependent upon a new Kconfig option, so to > avoid impacting other environments in case issues remain when this has > gone in? Effectively it is already the case because: #define max_console_rx (max_init_domid + 1) I could easily add an #ifdef around is_focus_domain() so that in case CONFIG_DOM0LESS_BOOT is disabled it defaults to is_hardware_domain() but that wouldn't really help because thanks to the definition of max_console_rx, effectively it works the same way when CONFIG_DOM0LESS_BOOT is disabled. I think what you are asking would be more about the locking changes in guest_console_write, but for those I cannot really use #ifdef to retain the current position of the locks. The resulting code would not be good. So I decided to not make any changes in this regard. However, I am happy to #ifdef is_focus_domain() although as I said I don't think it would bring much value. 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pr=C From: Stefano Stabellini To: CC: , , , , , , , , , , Stefano Stabellini Subject: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding Date: Wed, 4 Feb 2026 15:37:09 -0800 Message-ID: <20260204233712.3396752-2-stefano.stabellini@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CB:EE_|DS0PR12MB8813:EE_ X-MS-Office365-Filtering-Correlation-Id: 4d1a508a-bca5-4518-0af0-08de644654f1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?m6QZibMyGtulUGtjPx/hDDDVkTMQc1f+xz+z0NzpU50IystHdwbWOOy3sHWr?= =?us-ascii?Q?NZ/Y2VD/V1PLFX3NU2WpFSk1Vt5T3ZbrMq2nIb55ZwWXh3t9zSGMg8uaHjnd?= =?us-ascii?Q?hhZ7otTXKLzVVxgR8vBZJ2Y7dPJIt70b6K/0Iz5yStBWU38BoCL0vUmDTKsq?= =?us-ascii?Q?5pXwsiROJ3IBiQckEVdy/eTGPgNNfz/61IG8+FB2EyTPSe7hX4P9iTYA3Fzv?= =?us-ascii?Q?bUzMzx+yG/EHz/ymWzfmbj9WvDcPBpRXQwybkYBFv/PuX5A1fuuU5l9B5GMf?= =?us-ascii?Q?NuAgNZ+Dluej5wkT8k+052i5b/KIw+P2VnIiSOqieRADLCay/iZ9qhf1RBYG?= =?us-ascii?Q?tPF2/6T3x7CaEM2L+OWPCedxfGeb+ytLLH0IzOu+65Tv7pCVOAVY6Xkk9VKu?= =?us-ascii?Q?lFW4Zlft/1lxs+BSsNIK2UtI3nCCjmhSCvwMDRjuNafj2fvGmKoT+ctyY3D1?= =?us-ascii?Q?FeUSRandoAW7Hw5+FrpHrGmVhrROqDfLFrj7KRx2saf0IoUI4bVPTaUJncpj?= =?us-ascii?Q?GynO2LlmfGCKZ6ur/LfOlaC5mYUSDH4YcFnWYL6FMhGkx3rOEq82rj70hLdZ?= =?us-ascii?Q?t1OVnC596ZoD8ung4w4ZjVcNfWnzlt4UQnPHF2UAhJBqDHXQY6vheEOXiVzN?= =?us-ascii?Q?RflDE+z3CM0cVH2AF4zGdmWzMcXRafIkCgLGXMxx/5BlSsLJZbtw/xZlH/0d?= =?us-ascii?Q?jj+uj4aFmK69s1U8FTpcDE8a7kmwtSLmvnR88c7PbDHDS9jRZ/iHc5Ibkcum?= =?us-ascii?Q?q6KHHvaHw+90wSUH7onTeyEGBYSA78IESwCxsEwuL0T638N+Al+z6vIk3dQs?= =?us-ascii?Q?jJo4/9rAfrbHCKB6hkP94MME4+EyTK0R9n+/ouP4ch6CgdOa88Q4bnpz3cJl?= =?us-ascii?Q?ltkt+gPs3LgiQQA3QUEoPw11NXddI61xNmH6U/A7LSHjrimhJUwZA3/Ub2CA?= =?us-ascii?Q?+yFv/ZaK8ALvVO6LMGo7uOps/Bm4zqjSyVdIDbsAluiJxZwT8AlkQ6f0rSLF?= =?us-ascii?Q?D0gxHZ1iL+Bs0DX25Re0zylHbc2vTK+i2oEosqBRnDl+rXCOODJZGbx/xyaR?= =?us-ascii?Q?xw4waiUKf6yv83dPKmFEyBuDhEJCkJZmExqmA3ViUGRRfqb7iaYjCXVNu2xv?= =?us-ascii?Q?Ur+YWkbE5iJgd16slaIvTkOLpb4JC349bqXsKmDs9hdnQe0KNKZPsbDzwy0u?= =?us-ascii?Q?YIaNZg1yz05x2eOTxpe8QfF5FPIe8B33IaUp1FIwTNinPl/wOQYugSEiojqm?= =?us-ascii?Q?K8KztzM0D/kdTHCe9Py6LL5XC3Zw20BP+XFm1B5UpqfZ3TewMDfpFNG0f6aM?= =?us-ascii?Q?FAQvxq2fn+ze7SVWV6wPP6APAg5K/J+0jK8pjP3LGUI9Th5vU4M2X2XBt2I5?= =?us-ascii?Q?tYFa1E9Zo4F2dh4q2cZasR6XXyfTEXcsDQjrqyDyhw+/IR8LwrGKYoczSn3J?= =?us-ascii?Q?mhkvC174lL91GVnajbDKyegAu+dulrVKCzXoCt8XCS3CNBnOBdXx5Nd4DIEp?= =?us-ascii?Q?76wTcxZNOJ7L8iQcGtDPUDrPi4HK4Vrdk9jjDym8PetvTxVsxynODeVXMaT+?= =?us-ascii?Q?YW5ssXJq8K01/GgPuDuhy70tZ5Z03FyYO8SB8lD8rtPMlQ2vheP6ofHyqSU1?= =?us-ascii?Q?dH9QGN/UhNfL4nASOx/jf/oy/Z90nEzzODR3SuOXGlFnYlSELIHI8M3bq4NQ?= =?us-ascii?Q?xGUTTA=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);DIR:OUT;SFP:1101; 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This patch changes the virq from global to VIRQ_DOMAIN to allow other domains to bind to it. Note that Linux silently falls back to polling when binding fails, which masks the issue. Signed-off-by: Jason Andryuk Signed-off-by: Stefano Stabellini --- Changes in v10: - update comment in xen/include/public/xen.h --- xen/common/event_channel.c | 1 + xen/drivers/char/console.c | 2 +- xen/include/public/xen.h | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c index a3d18bc464..f9becb4ca5 100644 --- a/xen/common/event_channel.c +++ b/xen/common/event_channel.c @@ -138,6 +138,7 @@ static enum virq_type get_virq_type(unsigned int virq) return VIRQ_VCPU; case VIRQ_ARGO: + case VIRQ_CONSOLE: return VIRQ_DOMAIN; case VIRQ_ARCH_0 ... VIRQ_ARCH_7: diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 35f541ca8e..fbc89ca2a4 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -613,7 +613,7 @@ static void __serial_rx(char c) * Always notify the hardware domain: prevents receive path from * getting stuck. */ - send_global_virq(VIRQ_CONSOLE); + send_guest_domain_virq(d, VIRQ_CONSOLE); } #ifdef CONFIG_SBSA_VUART_CONSOLE else diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index b12fd10e63..b8146bd00a 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -176,7 +176,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); /* ` enum virq { */ #define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */ #define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */ -#define VIRQ_CONSOLE 2 /* G. Bytes received on emergency console. */ +#define VIRQ_CONSOLE 2 /* D. Bytes received on Xen console. */ #define VIRQ_DOM_EXC 3 /* G. Exceptional event for some domain. */ #define VIRQ_TBUF 4 /* G. Trace buffer has records available. */ #define VIRQ_DEBUGGER 6 /* G. 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pr=C From: Stefano Stabellini To: CC: , , , , , , , , , , Stefano Stabellini Subject: [PATCH v10 5/5] xen: enable dom0less guests to use console_io hypercalls Date: Wed, 4 Feb 2026 15:37:12 -0800 Message-ID: <20260204233712.3396752-5-stefano.stabellini@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CB:EE_|LV8PR12MB9081:EE_ X-MS-Office365-Filtering-Correlation-Id: 667219e7-6117-4efd-f2a6-08de644656d1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?6p1lYikMgf5hL9z7dgBMfC+myq5P4Sot3oLo6ykKNe+wYL5YB66Dc2X5WA0a?= =?us-ascii?Q?BSFOF58WVI4jTMWdfcztc2GeTqLfy7dt5DrbH7ZzzzNzBRqBN7dPEp/NFAUT?= =?us-ascii?Q?JrVOyUKBgvWb9D9i1ZjvH3XRRyYf7T7u9m8BgHpVwK9S0//1Y2dVlgtbhgP6?= =?us-ascii?Q?/2WOZX+lawy7rckBCaookGNv8nKAnfoJlZswAnipaU/mhdEZNgTuONThsP1d?= =?us-ascii?Q?Q9Um40g5S2uXiCqNlqrt3H2dUebopt2zbAnVUktUU6+JZgQFjvNuFh+3g+gy?= =?us-ascii?Q?qZDKaxAwZ98ilDcPbaFPV1JWfGtHrb/M6OyawCFIzTAHF6ArqtGIaQ2qZgk5?= =?us-ascii?Q?rV8B1YuKfLexJjWJi9axLtWdnx3WfKt2hUH+e5Vk17iKnNd2ftDMUNyY14a5?= =?us-ascii?Q?zdzth3cgVk+++HuadaAVZXPtMEQIzupAe++iznMoI0a73VkqCbiAb5PDsBqV?= =?us-ascii?Q?+86v83V2Kb1XSkestyW6uWz4VbxFJP4y4LVIn4dQzp8HSzME8HQuIFcMZurd?= =?us-ascii?Q?7yKH2hccFDx4bAs+ZIgvSBMmgaS8gH2yqEZDqWUDkVYRPttj/+Ew117W/EM9?= =?us-ascii?Q?R5+nv9ttJV9U0MMQ3cX0k1AtaoluaFowcg9cwMoQhlcRMFrj5rYipuxYacGQ?= =?us-ascii?Q?GGHsMFM1S+nem4PEwAA9I4WNlmL6gK2GvWrqe3HeUt502lIHAoHMbHu3REiX?= =?us-ascii?Q?nYCrWL1QxzFCoZOZpRYwWC21plXMGrzsK+JeWYyB+EHE9PkdzyFtYfmFjGcN?= =?us-ascii?Q?uS0Fgi3gDlD5QlxiWDm969RO0YHiNYd1wXynbUOAMrfxKnBZietafSYnuQyE?= =?us-ascii?Q?cLwMwgQWnRR3axGbRJU4shdLmiyJk8jnuD6x6icsuT+QEZKu+hSxBJgjQ94c?= =?us-ascii?Q?2li29e7ablxpL3jYRfuMwMUOymdabEQYusAEHXEK8SIIKENpiXJOjhdkBZ7z?= =?us-ascii?Q?IGNeTQtbNygSRnX/g22GQteXu0Q2VObJIV/FlbmoRZp7DFPlZkyQd7solmuO?= =?us-ascii?Q?/V5lIuuKlfZ2VDnd7r/9NHOD3Xz8RrP8/k0X6YOk6oC3uQLG+S/TXWSxPI+H?= =?us-ascii?Q?rFYVJSufDEmH9y9N7ZagX8UApc+6vRWpQg+qbP2jIik1nRFKvYeuWUdUdx9A?= =?us-ascii?Q?9MUvfQjGisdKsJUd9f7VyqWv9LAEwDKqAKyJUe8Z8XLjZLOMcmixYcK8tUWt?= =?us-ascii?Q?7NlI/wf+WE4eB4nxglPWA3eFMbC/KiRCB7bn/7XsHsdap7pyrPo+rUfvGSIF?= =?us-ascii?Q?4S4DmZ9emiwZMboQr3aXzx2zXLVLyyYWe1rC4tpNrO8xgKluftzJUi5cdlpd?= =?us-ascii?Q?Yc1Q3vVBncVk5VvUzvy88Jcs/AdDNr/HhyVoddGaYScG4y3mXrOn+giPVNNe?= =?us-ascii?Q?ZWpAd12jj8yZmtUQPOn7D57b3Mwrsm5yeFElbG7tc+WEJGZkHrbRaYyapVz/?= =?us-ascii?Q?7MhkJiOmp8vjnsKBTqoKtdZ5K/VWeRKrZdpLl69Y2CnpVNgQCcHtgkN3Q5bT?= =?us-ascii?Q?bvYRYWgiV06i3o/JUQiELWGoolAw09ppCL0oN8p+MSy1vzlN7UmbYyncrSFA?= =?us-ascii?Q?Hcld6riFhuLUaKnmsirTsDe9NEc/UjdpS4nqr1L52ytPTyOHXc3g7/ubdVBd?= =?us-ascii?Q?+v0ABE0EtqznOV0d7pPHsjg+JlU5qzWA29CiyjswKdvyqcDtjs5eX1ykrwqt?= =?us-ascii?Q?IGwiAw=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; 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+ d->console->input_allowed = true; + return rc; } diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index d3ce925131..7f0c3d8376 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -610,11 +610,20 @@ static void __serial_rx(char c) if ( ACCESS_ONCE(console_rx) == 0 ) return handle_keypress(c, false); + /* Includes an is_focus_domain() check. */ d = console_get_domain(); if ( !d ) return; - if ( is_hardware_domain(d) ) +#ifdef CONFIG_SBSA_VUART_CONSOLE + /* Prioritize vpl011 if enabled for this domain */ + if ( d->arch.vpl011.base_addr ) + { + /* Deliver input to the emulated UART. */ + rc = vpl011_rx_char_xen(d, c); + } + else +#endif { unsigned long flags; @@ -633,11 +642,6 @@ static void __serial_rx(char c) */ send_guest_domain_virq(d, VIRQ_CONSOLE); } -#ifdef CONFIG_SBSA_VUART_CONSOLE - else - /* Deliver input to the emulated UART. */ - rc = vpl011_rx_char_xen(d, c); -#endif if ( consoled_is_enabled() ) /* Deliver input to the PV shim console. */ -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 23:37:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 23:37:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221254.1529533 (Exim 4.92) (envelope-from ) id 1vnmR6-0002DJ-EL; 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Signed-off-by: Stefano Stabellini --- Changes in v10: - patch split into two halves, this is the first half --- xen/drivers/char/console.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index fbc89ca2a4..ad53073b99 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -553,10 +553,13 @@ static void console_switch_input(void) { domid_t domid; struct domain *d; + unsigned long flags; if ( next_rx++ >= max_console_rx ) { + nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = 0; + nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to Xen"); break; } @@ -576,7 +579,9 @@ static void console_switch_input(void) rcu_unlock_domain(d); + nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = next_rx; + nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to DOM%u", domid); break; } @@ -602,12 +607,16 @@ static void __serial_rx(char c) if ( is_hardware_domain(d) ) { + unsigned long flags; + /* * Deliver input to the hardware domain buffer, unless it is * already full. */ + nrspin_lock_irqsave(&console_lock, flags); if ( (serial_rx_prod - serial_rx_cons) != SERIAL_RX_SIZE ) serial_rx_ring[SERIAL_RX_MASK(serial_rx_prod++)] = c; + nrspin_unlock_irqrestore(&console_lock, flags); /* * Always notify the hardware domain: prevents receive path from @@ -796,6 +805,7 @@ long do_console_io( { long rc; unsigned int idx, len; + char kbuf[SERIAL_RX_SIZE]; rc = xsm_console_io(XSM_OTHER, current->domain, cmd); if ( rc ) @@ -817,6 +827,7 @@ long do_console_io( break; rc = 0; + nrspin_lock_irq(&console_lock); while ( (serial_rx_cons != serial_rx_prod) && (rc < count) ) { idx = SERIAL_RX_MASK(serial_rx_cons); @@ -825,14 +836,19 @@ long do_console_io( len = SERIAL_RX_SIZE - idx; if ( (rc + len) > count ) len = count - rc; - if ( copy_to_guest_offset(buffer, rc, &serial_rx_ring[idx], len) ) - { - rc = -EFAULT; - break; - } + memcpy(kbuf, &serial_rx_ring[idx], len); + + nrspin_unlock_irq(&console_lock); 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Signed-off-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/char/console.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 2bdb4d5fb4..35f541ca8e 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -518,11 +518,12 @@ static unsigned int __read_mostly console_rx = 0; struct domain *console_get_domain(void) { struct domain *d; + unsigned int rx = ACCESS_ONCE(console_rx); - if ( console_rx == 0 ) - return NULL; + if ( rx == 0 ) + return NULL; - d = rcu_lock_domain_by_id(console_rx - 1); + d = rcu_lock_domain_by_id(rx - 1); if ( !d ) return NULL; @@ -542,7 +543,7 @@ void console_put_domain(struct domain *d) static void console_switch_input(void) { - unsigned int next_rx = console_rx; + unsigned int next_rx = ACCESS_ONCE(console_rx); /* * Rotate among Xen, dom0 and boot-time created domUs while skipping @@ -555,7 +556,7 @@ static void console_switch_input(void) if ( next_rx++ >= max_console_rx ) { - console_rx = 0; + ACCESS_ONCE(console_rx) = 0; printk("*** Serial input to Xen"); break; } @@ -575,7 +576,7 @@ static void console_switch_input(void) rcu_unlock_domain(d); - console_rx = next_rx; + ACCESS_ONCE(console_rx) = next_rx; printk("*** Serial input to DOM%u", domid); break; } @@ -592,7 +593,7 @@ static void __serial_rx(char c) struct domain *d; int rc = 0; - if ( console_rx == 0 ) + if ( ACCESS_ONCE(console_rx) == 0 ) return handle_keypress(c, false); d = console_get_domain(); @@ -1193,7 +1194,7 @@ void __init console_endboot(void) * a useful 'how to switch' message. */ if ( opt_conswitch[1] == 'x' ) - console_rx = max_console_rx; + ACCESS_ONCE(console_rx) = max_console_rx; register_keyhandler('w', conring_dump_keyhandler, "synchronously dump console ring buffer (dmesg)", 0); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Feb 04 23:37:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 04 Feb 2026 23:37:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221256.1529559 (Exim 4.92) (envelope-from ) id 1vnmRA-0002vO-9V; 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Handle them in a similar way to vpl011: only the domain which has focus can read from the console. All domains can write to the console but the ones without focus have a prefix. In this case the prefix is applied by using guest_printk instead of printk or console_puts which is what the original code was already doing. When switching focus using Ctrl-AAA, discard any unread data in the input buffer. Input is read quickly and the user would be aware of it being slow or stuck as they use Ctrl-AAA to switch focus domain. In that situation, it is to be expected that the unread input is lost. The domain writes are buffered when the domain is not in focus. Push out the buffer after the domain enters focus on the first guest write. Locking updates: - Discard unread input under the lock when switching focus (including when returning to Xen) so that cross-domain reads can't see stale data - Require is_focus_domain() callers to hold console_lock, and re-check focus after each chunk in the CONSOLEIO_read loop so a focus change simply stops further copies without duplicating or leaking input - Hold cons->lock while flushing buffered writes in the focus path so the direct-write fast path does not race buffered guests or HVM debug output Signed-off-by: Stefano Stabellini --- Changes in v10: - patch split into two halves this is the second half --- xen/drivers/char/console.c | 52 ++++++++++++++++++++++++++++++++++---- 1 file changed, 47 insertions(+), 5 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index ad53073b99..d3ce925131 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -541,6 +541,12 @@ void console_put_domain(struct domain *d) rcu_unlock_domain(d); } +static bool is_focus_domain(const struct domain *d) +{ + ASSERT(rspin_is_locked(&console_lock)); + return d != NULL && d->domain_id == console_rx - 1; +} + static void console_switch_input(void) { unsigned int next_rx = ACCESS_ONCE(console_rx); @@ -559,6 +565,7 @@ static void console_switch_input(void) { nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = 0; + serial_rx_cons = serial_rx_prod; nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to Xen"); break; @@ -581,6 +588,8 @@ static void console_switch_input(void) nrspin_lock_irqsave(&console_lock, flags); ACCESS_ONCE(console_rx) = next_rx; + /* Don't let the next dom read the previous dom's unread data. */ + serial_rx_cons = serial_rx_prod; nrspin_unlock_irqrestore(&console_lock, flags); printk("*** Serial input to DOM%u", domid); break; @@ -610,7 +619,7 @@ static void __serial_rx(char c) unsigned long flags; /* - * Deliver input to the hardware domain buffer, unless it is + * Deliver input to the focus domain buffer, unless it is * already full. */ nrspin_lock_irqsave(&console_lock, flags); @@ -740,6 +749,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, unsigned int flags = opt_console_to_ring ? CONSOLE_ALL : CONSOLE_DEFAULT; struct domain *cd = current->domain; + struct domain_console *cons = cd->console; while ( count > 0 ) { @@ -752,17 +762,36 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, if ( copy_from_guest(kbuf, buffer, kcount) ) return -EFAULT; - if ( is_hardware_domain(cd) ) + /* + * Take both cons->lock and console_lock: + * - cons->lock protects cons->buf and cons->idx + * - console_lock protects console_send() and is_focus_domain() + * checks + * + * The order must be respected. guest_printk() takes the + * console_lock and it is called with cons->lock held. It is + * important that cons->lock is taken first. + */ + spin_lock(&cons->lock); + nrspin_lock_irq(&console_lock); + if ( is_focus_domain(cd) ) { + if ( cons->idx ) + { + console_send(cons->buf, cons->idx, flags); + cons->idx = 0; + } + spin_unlock(&cons->lock); + /* Use direct console output as it could be interactive */ - nrspin_lock_irq(&console_lock); console_send(kbuf, kcount, flags); nrspin_unlock_irq(&console_lock); } else { char *kin = kbuf, *kout = kbuf, c; - struct domain_console *cons = cd->console; + + nrspin_unlock_irq(&console_lock); /* Strip non-printable characters */ do @@ -775,7 +804,6 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, } while ( --kcount > 0 ); *kout = '\0'; - spin_lock(&cons->lock); kcount = kin - kbuf; if ( c != '\n' && (cons->idx + (kout - kbuf) < (ARRAY_SIZE(cons->buf) - 1)) ) @@ -828,6 +856,8 @@ long do_console_io( rc = 0; nrspin_lock_irq(&console_lock); + if ( !is_focus_domain(current->domain) ) + count = 0; while ( (serial_rx_cons != serial_rx_prod) && (rc < count) ) { idx = SERIAL_RX_MASK(serial_rx_cons); @@ -844,7 +874,19 @@ long do_console_io( return -EFAULT; rc += len; + /* + * First get console_lock again, then check is_focus_domain(). + * It is possible that we switched focus domain during + * copy_to_guest_offset(). In that case, serial_rx_cons and + * serial_rx_prod have been reset so it would be wrong to + * update serial_rx_cons here. Get out of the loop instead. + * + * rc is updated regardless to provide the correct return + * value to the VM as the data has been copied. + */ nrspin_lock_irq(&console_lock); + if ( !is_focus_domain(current->domain) ) + break; serial_rx_cons += len; } -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221350.1529608 (Exim 4.92) (envelope-from ) id 1vnoI3-0001ij-7B; Thu, 05 Feb 2026 01:36:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221350.1529608; Thu, 05 Feb 2026 01:36:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI3-0001ib-2s; Thu, 05 Feb 2026 01:36:15 +0000 Received: by outflank-mailman (input) for mailman id 1221350; Thu, 05 Feb 2026 01:36:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI2-0001iV-EZ for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI2-003wQ6-0f; Thu, 05 Feb 2026 01:36:13 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI1-00HVWq-1z; Thu, 05 Feb 2026 01:36:13 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:Message-ID:Date: Subject:Cc:To:From; bh=/gKg0E53LxUxIKjZV4BVNDkp/q7tuKx1vt5Xw35g7Hg=; b=EcMmvu bT+5dmIcIKh8n31KBOCNZhujQFSOoKkIVqTksFZLOXBtqM7lMar+v2uY61OCkAfPaDoJ80WPzgcJk Oa9qxd48RWqpdoB/t/gxdcCLkb7HAWRLK/T8IuT3wshOS3bNtDkaO3VyklnJpZOP5Oo6Y8YPZ0Xtt Cndusu7aXzQ=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 0/6] xen/console: configurable conring size Date: Wed, 4 Feb 2026 17:36:00 -0800 Message-ID: <20260205013606.3384798-1-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series originates from [1] which addresses feedback [2]. Sending this as v5 since [1] was posted as v4... Briefly, here is what the series covers: Patch 1 groups conring code together to better maintainability. There were conring bits all over the place in console.c. Patch 2 introduces CONRING_CONRING_SHIFT to select compile-time conring buffer size. Patch 3 updates conring{,_size} annotations to __ro_after_init as per [2]. Patch 4 optimizes switch from early conring to permanent conring. Patches 5-6 update the conring buffer allocation code and add some verbose logging around buffer size selection. [1] Link to v4: https://lore.kernel.org/xen-devel/20250311070912.730334-1-dmkhn@proton.me/ [2] https://lore.kernel.org/xen-devel/1a5ed8ad-0cc7-4e05-9b9c-cd6930d9b9ea@citrix.com [3] Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2306728453 Denis Mukhin (6): xen/console: group conring code together xen/console: make console buffer size configurable xen/console: promote conring{,_size} to __ro_after_init xen/console: use memcpy() in console_init_ring() xen/console: update conring memory allocation xen/console: add conring buffer size alignment setting docs/misc/xen-command-line.pandoc | 5 +- xen/drivers/char/Kconfig | 31 +++++ xen/drivers/char/console.c | 190 +++++++++++++++++------------- 3 files changed, 143 insertions(+), 83 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221352.1529627 (Exim 4.92) (envelope-from ) id 1vnoI5-00029b-Id; Thu, 05 Feb 2026 01:36:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221352.1529627; Thu, 05 Feb 2026 01:36:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI5-00029U-Fd; Thu, 05 Feb 2026 01:36:17 +0000 Received: by outflank-mailman (input) for mailman id 1221352; Thu, 05 Feb 2026 01:36:16 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI4-0001w6-CE for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:16 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI4-003wQK-0H; Thu, 05 Feb 2026 01:36:15 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI3-00HVXD-1m; Thu, 05 Feb 2026 01:36:15 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=OmHZuBlSWJtfYojCeHKDKiy+Jl/+TAljxD/KKQZ0HFU=; b=n5+kAtOKhadDbzsHZdN1u0lU/w fL/5Y0aJF/yxV9x7oEsewB/E2kjfDJmz533UFMuyzR68vvyrAkJjk6cGhlllJmo0ZJc+POQpt6i0i 3lZpNMAMoT2m1zOhMbRd//TxTejqBCm8KNUc9RWR2/MacQyBUx3ioxT1h3TI3tylGPKo=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, Jason Andryuk Subject: [PATCH v5 2/6] xen/console: make console buffer size configurable Date: Wed, 4 Feb 2026 17:36:02 -0800 Message-ID: <20260205013606.3384798-3-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin Add new CONRING_SHIFT Kconfig parameter to specify the boot console buffer size as a power of 2. The supported range is [14..27] -> [16KiB..128MiB]. Set default to 15 (32 KiB). Resolves: https://gitlab.com/xen-project/xen/-/issues/185 Signed-off-by: Denis Mukhin Reviewed-by: Jason Andryuk --- Changes since v4: - n/a --- docs/misc/xen-command-line.pandoc | 5 +++-- xen/drivers/char/Kconfig | 24 ++++++++++++++++++++++++ xen/drivers/char/console.c | 6 +++--- 3 files changed, 30 insertions(+), 5 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index c1f2def9f99c..87392142e8e9 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -425,10 +425,11 @@ The following are examples of correct specifications: ### conring_size > `= ` -> Default: `conring_size=16k` - Specify the size of the console ring buffer. +The default console ring buffer size is selected at build time via +CONFIG_CONRING_SHIFT setting. + ### console > `= List of [ vga | com1[H,L] | com2[H,L] | pv | dbgp | ehci | xhci | none ]` diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig index 8e49a52c735b..d083ba4c9cdf 100644 --- a/xen/drivers/char/Kconfig +++ b/xen/drivers/char/Kconfig @@ -95,6 +95,30 @@ config SERIAL_TX_BUFSIZE Default value is 32768 (32KiB). +config CONRING_SHIFT + int "Console ring buffer size (power of 2)" + range 14 27 + default 15 + help + Select the boot console ring buffer size as a power of 2. + Run-time console ring buffer size is the same as the boot console ring + buffer size, unless overridden via 'conring_size=' boot parameter. + + 27 => 128 MiB + 26 => 64 MiB + 25 => 32 MiB + 24 => 16 MiB + 23 => 8 MiB + 22 => 4 MiB + 21 => 2 MiB + 20 => 1 MiB + 19 => 512 KiB + 18 => 256 KiB + 17 => 128 KiB + 16 => 64 KiB + 15 => 32 KiB (default) + 14 => 16 KiB + config XHCI bool "XHCI DbC UART driver" depends on X86 diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 86319600e0af..522b2f489a53 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -339,12 +339,12 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) * ******************************************************** */ -/* conring_size: allows a large console ring than default (16kB). */ +/* conring_size: override build-time CONFIG_CONRING_SHIFT setting. */ static uint32_t __initdata opt_conring_size; size_param("conring_size", opt_conring_size); -#define _CONRING_SIZE 16384 -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) +#define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) +#define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; static char *__read_mostly conring = _conring; static uint32_t __read_mostly conring_size = _CONRING_SIZE; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221356.1529658 (Exim 4.92) (envelope-from ) id 1vnoI9-0002ng-NS; Thu, 05 Feb 2026 01:36:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221356.1529658; Thu, 05 Feb 2026 01:36:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI9-0002mM-Hu; Thu, 05 Feb 2026 01:36:21 +0000 Received: by outflank-mailman (input) for mailman id 1221356; Thu, 05 Feb 2026 01:36:20 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI8-0002cG-0K for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:20 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI7-003wRJ-33; Thu, 05 Feb 2026 01:36:19 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI7-00HVXb-1R; Thu, 05 Feb 2026 01:36:19 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=bNWaJuUXW1hcVfeutPblFaJxcDIyBZhI3ZQ6lYZGoTo=; b=SVkMCn+PN2IcPts2W9aqfA74Q/ 3LhLaJthRaMLGDt5IMwKF9TsHjQWxQA7RlLRpqGUdCnP2GOxwcTbPJLIrxLIc2VA31I/9bsnqXfwA UDaUW6Ov1D2RETN8r6ef+r+kBXyRGddOfvmkexjwjkzLLeuL5XAIz5uOpY/KdZMYKOn8=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 6/6] xen/console: add conring buffer size alignment setting Date: Wed, 4 Feb 2026 17:36:06 -0800 Message-ID: <20260205013606.3384798-7-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin Introduce CONFIG_CONRING_ALIGN_PAGE_SIZE to control rounding down of the user-defined conring buffer size. Also, update the logline reporting the final conring buffer size to report bytes instead of kilobytes, since the user-defined size may not necessarily be kilobyte-alined. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v4: - new patch --- xen/drivers/char/Kconfig | 7 +++++++ xen/drivers/char/console.c | 15 +++++++++------ 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig index d083ba4c9cdf..1b96fbc3ed7c 100644 --- a/xen/drivers/char/Kconfig +++ b/xen/drivers/char/Kconfig @@ -95,6 +95,13 @@ config SERIAL_TX_BUFSIZE Default value is 32768 (32KiB). +config CONRING_ALIGN_PAGE_SIZE + bool + default y + help + This selects the console ring buffer size alignment (rounding down) + to a multiple of PAGE_SIZE. + config CONRING_SHIFT int "Console ring buffer size (power of 2)" range 14 27 diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 9394ab2a89eb..c13818715a52 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -470,12 +470,15 @@ void __init console_init_ring(void) return; opt_conring_size = max(opt_conring_size, conring_size); - size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); - if ( size != opt_conring_size ) + if ( IS_ENABLED(CONFIG_CONRING_ALIGN_PAGE_SIZE) ) { - opt_conring_size = size; - printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", - PAGE_SIZE >> 10); + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); + if ( size != opt_conring_size ) + { + opt_conring_size = size; + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", + PAGE_SIZE >> 10); + } } if ( opt_conring_size >= GB(2) ) { @@ -512,7 +515,7 @@ void __init console_init_ring(void) nrspin_unlock_irqrestore(&console_lock, flags); - printk("Allocated console ring of %u KiB.\n", opt_conring_size >> 10); + printk("Allocated console ring of %u bytes.\n", opt_conring_size); } /* -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221355.1529654 (Exim 4.92) (envelope-from ) id 1vnoI9-0002g9-Ch; Thu, 05 Feb 2026 01:36:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221355.1529654; Thu, 05 Feb 2026 01:36:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI9-0002fQ-6G; Thu, 05 Feb 2026 01:36:21 +0000 Received: by outflank-mailman (input) for mailman id 1221355; Thu, 05 Feb 2026 01:36:19 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI7-0002TG-1r for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:19 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI6-003wR7-3B; Thu, 05 Feb 2026 01:36:18 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI6-00HVXX-1W; Thu, 05 Feb 2026 01:36:18 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=BMutOBe+27MwLrOuLnd1uuC/N9cHX1rSjncNYS0rwBk=; b=YfLCsDy85/YQXPUp+nhtR32ejQ sNRH1x0KloisX4lyHEJmPs0Te51ZWTdZWTWd4K7GeNECWxBny/uWMP4+bMudNtgCqPSJGJwuZ4ki6 8YIz55bbVEYQKEssoW8dLT1cAECE4ZzUyYzpn0AGeqgkwgIKtzS8L92YeDloOis1lc0Y=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 5/6] xen/console: update conring memory allocation Date: Wed, 4 Feb 2026 17:36:05 -0800 Message-ID: <20260205013606.3384798-6-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin conring buffer doesn't need to be aligned to it's size; it just needs to be contiguous. Use xmalloc_bytes() in console_init_preirq() for run-time conring buffer allocation. Warn user when the conring size is being changed behind the user's back during the console initialization. Also, limit the user-selectable conring buffer size to the maximum of 2GB and minimum of _CONRING_SIZE. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v4: - new patch --- xen/drivers/char/console.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 3ad86fd436e2..9394ab2a89eb 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -463,20 +463,34 @@ static void cf_check conring_dump_keyhandler(unsigned char key) void __init console_init_ring(void) { char *ring; - unsigned int start, size, chunk, order, memflags; + unsigned int start, size, chunk; unsigned long flags; if ( !opt_conring_size ) return; - order = get_order_from_bytes(max(opt_conring_size, conring_size)); - memflags = MEMF_bits(crashinfo_maxaddr_bits); - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) + opt_conring_size = max(opt_conring_size, conring_size); + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); + if ( size != opt_conring_size ) { - BUG_ON(order == 0); - order--; + opt_conring_size = size; + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", + PAGE_SIZE >> 10); } - opt_conring_size = PAGE_SIZE << order; + if ( opt_conring_size >= GB(2) ) + { + opt_conring_size = GB(2); + printk(XENLOG_WARNING "Limiting user-configured console ring size.\n"); + } + else if ( opt_conring_size < _CONRING_SIZE ) + { + opt_conring_size = _CONRING_SIZE; + printk(XENLOG_WARNING "Using compile-time console ring size.\n"); + } + + /* Contiguous buffer; does not need to be naturally aligned. */ + ring = xmalloc_bytes(opt_conring_size); + BUG_ON(ring == NULL); nrspin_lock_irqsave(&console_lock, flags); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221354.1529648 (Exim 4.92) (envelope-from ) id 1vnoI9-0002d4-0b; Thu, 05 Feb 2026 01:36:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221354.1529648; Thu, 05 Feb 2026 01:36:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI8-0002ct-Sj; Thu, 05 Feb 2026 01:36:20 +0000 Received: by outflank-mailman (input) for mailman id 1221354; Thu, 05 Feb 2026 01:36:19 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI6-0002Qc-Ul for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:18 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI6-003wQh-01; Thu, 05 Feb 2026 01:36:17 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI5-00HVXL-1b; Thu, 05 Feb 2026 01:36:17 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=uMEQbYnd5xAAaBu981UD1vQcoXX8eKP0LOT3hk6YJ3Q=; b=mam4JDzfk/p6OWqgGA5SomxTJ1 kfYr2LSIJttLdq4REByJY0418pIva21EdHEZQIO78b3QA0GPewW29bZ0QHloo0DXgouG4vk2mrXcv mviqLNow7s48GtjqYemVl4uDFo1wfUx6XF4hlmHTfx54LHwxzj9LP/4Aocal7ROGpHfk=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 4/6] xen/console: use memcpy() in console_init_ring() Date: Wed, 4 Feb 2026 17:36:04 -0800 Message-ID: <20260205013606.3384798-5-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin Make console_init_ring() more efficient by using memcpy()'s, rather than copying the ring a byte at a time. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v4: - new patch --- xen/drivers/char/console.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index ef9131439bba..3ad86fd436e2 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -463,7 +463,7 @@ static void cf_check conring_dump_keyhandler(unsigned char key) void __init console_init_ring(void) { char *ring; - unsigned int i, order, memflags; + unsigned int start, size, chunk, order, memflags; unsigned long flags; if ( !opt_conring_size ) @@ -479,11 +479,23 @@ void __init console_init_ring(void) opt_conring_size = PAGE_SIZE << order; nrspin_lock_irqsave(&console_lock, flags); - for ( i = conringc ; i != conringp; i++ ) - ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; + + start = conringc & (conring_size - 1); + size = min(conringp - conringc, conring_size); + chunk = min(size, conring_size - start); + + memcpy(&ring[0], &conring[start], chunk); + if ( size > chunk ) + memcpy(&ring[chunk], &conring[0], size - chunk); + + /* Data is moved to [0..size), re-position conring pointers. */ + conringc = 0; + conringp = size; + conring = ring; smp_wmb(); /* Allow users of console_force_unlock() to see larger buffer. */ conring_size = opt_conring_size; + nrspin_unlock_irqrestore(&console_lock, flags); printk("Allocated console ring of %u KiB.\n", opt_conring_size >> 10); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221353.1529638 (Exim 4.92) (envelope-from ) id 1vnoI6-0002NY-Pd; Thu, 05 Feb 2026 01:36:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221353.1529638; Thu, 05 Feb 2026 01:36:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI6-0002NR-Ml; Thu, 05 Feb 2026 01:36:18 +0000 Received: by outflank-mailman (input) for mailman id 1221353; Thu, 05 Feb 2026 01:36:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI5-00025u-1m for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI5-003wQU-06; Thu, 05 Feb 2026 01:36:16 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI4-00HVXH-1g; Thu, 05 Feb 2026 01:36:16 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=V01t8A+mJ7h/gTCjHOoEQ3pd7zM8Gkx0R6n2fTb3EgQ=; b=Vq17SajWMVN+UU0/U0os2P+SNq HODh3cO6Rpp7W/QCtNQePQiQdqqLD4Px4w0nnJMwibiTsww3OmeoQ+BF0ZauW2mHftLMYPOMGPj6J ecweXR72JxhTRg9FLRCSHjdvUrgnlbKbRjEkN6VgVNB+uV4mPZzwz3Byp1Gjm2ePIocs=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 3/6] xen/console: promote conring{,_size} to __ro_after_init Date: Wed, 4 Feb 2026 17:36:03 -0800 Message-ID: <20260205013606.3384798-4-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin Both conring{,_size} should be RO after initialization is completed. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v4: - new patch --- xen/drivers/char/console.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 522b2f489a53..ef9131439bba 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -346,8 +346,8 @@ size_param("conring_size", opt_conring_size); #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; -static char *__read_mostly conring = _conring; -static uint32_t __read_mostly conring_size = _CONRING_SIZE; +static char *__ro_after_init conring = _conring; +static uint32_t __ro_after_init conring_size = _CONRING_SIZE; static uint32_t conringc, conringp; static void cf_check conring_notify(void *unused) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 01:36:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 01:36:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221351.1529617 (Exim 4.92) (envelope-from ) id 1vnoI4-0001vS-Bz; Thu, 05 Feb 2026 01:36:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221351.1529617; Thu, 05 Feb 2026 01:36:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI4-0001uv-9R; Thu, 05 Feb 2026 01:36:16 +0000 Received: by outflank-mailman (input) for mailman id 1221351; Thu, 05 Feb 2026 01:36:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnoI3-0001iz-6Q for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 01:36:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnoI3-003wQC-0N; Thu, 05 Feb 2026 01:36:14 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnoI2-00HVX2-1u; Thu, 05 Feb 2026 01:36:14 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From; bh=2hWVAX5cInV9+JHNZ4ERQlXamvda79ZLFDIRyBNBnyg=; b=WxbR2H+NO/hx9lVr0ieB68MZO1 bdXxPrxCmpFVs8mf4ofpC35FMRpfjksgu01WDUKkJthpYm2MMtecQxX14e0A8s87rZ1PPnBuABYjP Sf88iq0ZzaRvu22v4l9Gv6AoVZeNhiutYr8GNdwIEziqNFonoF+wX7ThC5dXjiSEkLJQ=; From: dmukhin@xen.org To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v5 1/6] xen/console: group conring code together Date: Wed, 4 Feb 2026 17:36:01 -0800 Message-ID: <20260205013606.3384798-2-dmukhin@ford.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260205013606.3384798-1-dmukhin@ford.com> References: <20260205013606.3384798-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Denis Mukhin Groups conring buffer management code in the console driver for ease of maintaining this code. Not a functional change. Signed-off-by: Denis Mukhin --- Changes since v4: - new patch --- xen/drivers/char/console.c | 161 ++++++++++++++++++------------------- 1 file changed, 80 insertions(+), 81 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 2bdb4d5fb417..86319600e0af 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -126,17 +126,6 @@ static int cf_check parse_console_timestamps(const char *s); custom_runtime_param("console_timestamps", parse_console_timestamps, con_timestamp_mode_upd); -/* conring_size: allows a large console ring than default (16kB). */ -static uint32_t __initdata opt_conring_size; -size_param("conring_size", opt_conring_size); - -#define _CONRING_SIZE 16384 -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) -static char __initdata _conring[_CONRING_SIZE]; -static char *__read_mostly conring = _conring; -static uint32_t __read_mostly conring_size = _CONRING_SIZE; -static uint32_t conringc, conringp; - static int __read_mostly sercon_handle = -1; #ifdef CONFIG_X86 @@ -350,6 +339,17 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) * ******************************************************** */ +/* conring_size: allows a large console ring than default (16kB). */ +static uint32_t __initdata opt_conring_size; +size_param("conring_size", opt_conring_size); + +#define _CONRING_SIZE 16384 +#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) +static char __initdata _conring[_CONRING_SIZE]; +static char *__read_mostly conring = _conring; +static uint32_t __read_mostly conring_size = _CONRING_SIZE; +static uint32_t conringc, conringp; + static void cf_check conring_notify(void *unused) { send_global_virq(VIRQ_CON_RING); @@ -416,47 +416,6 @@ long read_console_ring(struct xen_sysctl_readconsole *op) } #endif /* CONFIG_SYSCTL */ - -/* - * ******************************************************* - * *************** ACCESS TO SERIAL LINE ***************** - * ******************************************************* - */ - -/* Characters received over the serial line are buffered for domain 0. */ -#define SERIAL_RX_SIZE 128 -#define SERIAL_RX_MASK(_i) ((_i)&(SERIAL_RX_SIZE-1)) -static char serial_rx_ring[SERIAL_RX_SIZE]; -static unsigned int serial_rx_cons, serial_rx_prod; - -static void (*serial_steal_fn)(const char *str, size_t nr) = early_puts; - -int console_steal(int handle, void (*fn)(const char *str, size_t nr)) -{ - if ( (handle == -1) || (handle != sercon_handle) ) - return 0; - - if ( serial_steal_fn != NULL ) - return -EBUSY; - - serial_steal_fn = fn; - return 1; -} - -void console_giveback(int id) -{ - if ( id == 1 ) - serial_steal_fn = NULL; -} - -void console_serial_puts(const char *s, size_t nr) -{ - if ( serial_steal_fn != NULL ) - serial_steal_fn(s, nr); - else - serial_puts(sercon_handle, s, nr); -} - /* * Flush contents of the conring to the selected console devices. */ @@ -501,6 +460,75 @@ static void cf_check conring_dump_keyhandler(unsigned char key) printk("failed to dump console ring buffer: %d\n", rc); } +void __init console_init_ring(void) +{ + char *ring; + unsigned int i, order, memflags; + unsigned long flags; + + if ( !opt_conring_size ) + return; + + order = get_order_from_bytes(max(opt_conring_size, conring_size)); + memflags = MEMF_bits(crashinfo_maxaddr_bits); + while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) + { + BUG_ON(order == 0); + order--; + } + opt_conring_size = PAGE_SIZE << order; + + nrspin_lock_irqsave(&console_lock, flags); + for ( i = conringc ; i != conringp; i++ ) + ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; + conring = ring; + smp_wmb(); /* Allow users of console_force_unlock() to see larger buffer. */ + conring_size = opt_conring_size; + nrspin_unlock_irqrestore(&console_lock, flags); + + printk("Allocated console ring of %u KiB.\n", opt_conring_size >> 10); +} + +/* + * ******************************************************* + * *************** ACCESS TO SERIAL LINE ***************** + * ******************************************************* + */ + +/* Characters received over the serial line are buffered for domain 0. */ +#define SERIAL_RX_SIZE 128 +#define SERIAL_RX_MASK(_i) ((_i)&(SERIAL_RX_SIZE-1)) +static char serial_rx_ring[SERIAL_RX_SIZE]; +static unsigned int serial_rx_cons, serial_rx_prod; + +static void (*serial_steal_fn)(const char *str, size_t nr) = early_puts; + +int console_steal(int handle, void (*fn)(const char *str, size_t nr)) +{ + if ( (handle == -1) || (handle != sercon_handle) ) + return 0; + + if ( serial_steal_fn != NULL ) + return -EBUSY; + + serial_steal_fn = fn; + return 1; +} + +void console_giveback(int id) +{ + if ( id == 1 ) + serial_steal_fn = NULL; +} + +void console_serial_puts(const char *s, size_t nr) +{ + if ( serial_steal_fn != NULL ) + serial_steal_fn(s, nr); + else + serial_puts(sercon_handle, s, nr); +} + /* * CTRL- changes input direction, rotating among Xen, Dom0, * and the DomUs started from Xen at boot. @@ -1125,35 +1153,6 @@ void __init console_init_preirq(void) } } -void __init console_init_ring(void) -{ - char *ring; - unsigned int i, order, memflags; - unsigned long flags; - - if ( !opt_conring_size ) - return; - - order = get_order_from_bytes(max(opt_conring_size, conring_size)); - memflags = MEMF_bits(crashinfo_maxaddr_bits); - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) - { - BUG_ON(order == 0); - order--; - } - opt_conring_size = PAGE_SIZE << order; - - nrspin_lock_irqsave(&console_lock, flags); - for ( i = conringc ; i != conringp; i++ ) - ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; - conring = ring; - smp_wmb(); /* Allow users of console_force_unlock() to see larger buffer. */ - conring_size = opt_conring_size; - nrspin_unlock_irqrestore(&console_lock, flags); - - printk("Allocated console ring of %u KiB.\n", opt_conring_size >> 10); -} - void __init console_init_irq(void) { serial_init_irq(); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 02:09:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 02:09:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221413.1529677 (Exim 4.92) (envelope-from ) id 1vnooW-0001hx-BZ; Thu, 05 Feb 2026 02:09:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221413.1529677; Thu, 05 Feb 2026 02:09:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnooW-0001hp-92; Thu, 05 Feb 2026 02:09:48 +0000 Received: by outflank-mailman (input) for mailman id 1221413; Thu, 05 Feb 2026 02:09:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnooU-0001hj-8Z for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 02:09:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnooU-003xaS-0I; Thu, 05 Feb 2026 02:09:45 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnooT-00HXSU-1c; Thu, 05 Feb 2026 02:09:45 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID :Subject:Cc:To:Date:From; bh=JZ0IqeUKiUvpVv+1LWGj3tiNHEiiBwZMVorXIjS40XI=; b= tXfpl84aIdmnOxa40xWzSwR+VIG4gGMx5WCItzxtZCu68VeKdFSYwbGhA3PpvW/eQh6MT7WFsu+RL a1UtFaI+gnGxyicIdnM8fYnaaIIxf15+JZxlf38hnIQrYIYd/3X2BUuGMAz6owjSF0YzaOy09u47N WN2A7phPz0CUOBWfU=; From: dmukhin@xen.org Date: Wed, 4 Feb 2026 18:09:44 -0800 To: Stefano Stabellini Cc: xen-devel@lists.xenproject.org, grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, jbeulich@suse.com, sstabellini@kernel.org Subject: Re: [PATCH v10 5/5] xen: enable dom0less guests to use console_io hypercalls Message-ID: References: <20260204233712.3396752-5-stefano.stabellini@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260204233712.3396752-5-stefano.stabellini@amd.com> On Wed, Feb 04, 2026 at 03:37:12PM -0800, Stefano Stabellini wrote: > Enable dom0less guests on ARM to use console_io hypercalls: > - set input_allow = true for dom0less domains > - update the in-code comment in console.c > - prioritize the VUART check to retain the same behavior as today > > Signed-off-by: Stefano Stabellini The code looks good, just one remark wrt prioritizing VUART check. > --- > xen/common/device-tree/dom0less-build.c | 2 ++ > xen/drivers/char/console.c | 16 ++++++++++------ > 2 files changed, 12 insertions(+), 6 deletions(-) > > diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c > index 840d14419d..cb7026fa7e 100644 > --- a/xen/common/device-tree/dom0less-build.c > +++ b/xen/common/device-tree/dom0less-build.c > @@ -829,6 +829,8 @@ static int __init construct_domU(struct kernel_info *kinfo, > > rangeset_destroy(kinfo->xen_reg_assigned); > > + d->console->input_allowed = true; > + > return rc; > } > > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > index d3ce925131..7f0c3d8376 100644 > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -610,11 +610,20 @@ static void __serial_rx(char c) > if ( ACCESS_ONCE(console_rx) == 0 ) > return handle_keypress(c, false); > > + /* Includes an is_focus_domain() check. */ > d = console_get_domain(); > if ( !d ) > return; > > - if ( is_hardware_domain(d) ) Hardware domain on x86 may have an emulated UART (not in upstream, through, I need to send v8 for NS16550 series...). The patch which illustrates the idea: https://lore.kernel.org/xen-devel/20250908211149.279143-2-dmukhin@ford.com/ So this code (hopefully soon) will need adjustment again. I would update the code to something like: if ( is_hardware_domain(d) && !domain_has_vuart(d) ) { // handle hardware domain } #ifdef CONFIG_SBSA_VUART_CONSOLE else if ( domain_has_vuart(d) ) /* Deliver input to the emulated UART. */ rc = vpl011_rx_char_xen(d, c); #endif But domain_has_vuart() needs to be defined for all architectures (currently it is hidden in arch/arm/vuart.c). Or perhaps it is possible to postpone the change? What do you think? > +#ifdef CONFIG_SBSA_VUART_CONSOLE > + /* Prioritize vpl011 if enabled for this domain */ > + if ( d->arch.vpl011.base_addr ) > + { > + /* Deliver input to the emulated UART. */ > + rc = vpl011_rx_char_xen(d, c); > + } > + else > +#endif > { > unsigned long flags; > > @@ -633,11 +642,6 @@ static void __serial_rx(char c) > */ > send_guest_domain_virq(d, VIRQ_CONSOLE); > } > -#ifdef CONFIG_SBSA_VUART_CONSOLE > - else > - /* Deliver input to the emulated UART. */ > - rc = vpl011_rx_char_xen(d, c); > -#endif > > if ( consoled_is_enabled() ) > /* Deliver input to the PV shim console. */ > -- > 2.25.1 > > From xen-devel-bounces@lists.xenproject.org Thu Feb 05 02:13:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 02:13:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221427.1529688 (Exim 4.92) (envelope-from ) id 1vnori-0003Bh-Q9; Thu, 05 Feb 2026 02:13:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221427.1529688; Thu, 05 Feb 2026 02:13:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnori-0003Ba-Mf; Thu, 05 Feb 2026 02:13:06 +0000 Received: by outflank-mailman (input) for mailman id 1221427; Thu, 05 Feb 2026 02:13:06 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnori-0003BU-5t for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 02:13:06 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vnori-003xg6-0B; Thu, 05 Feb 2026 02:13:05 +0000 Received: from [140.209.201.102] (helo=localhost) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnorh-00HXiz-1R; Thu, 05 Feb 2026 02:13:05 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID :Subject:Cc:To:Date:From; bh=lkmfRbS/QtnjJUx5SLebBDTlx29CMpQ2hnCYkU6OZOI=; b= mtZ+Giob9KpB9oBChRpl/thWOCLLcivyDBBK3e1cMPko18uMU1hykZ/OAKMe16ce5By1Y+YSYoohm ARk36TktoGN5lvRm5WR7Ugdjayzy7/o4UGnkqK2Ys1Q2QaKKi3S2bDA+yQN5QfXLjFe0sb7Dz8NE/ XpoXTkKOZKrLljshY=; From: dmukhin@xen.org Date: Wed, 4 Feb 2026 18:13:04 -0800 To: Stefano Stabellini Cc: xen-devel@lists.xenproject.org, grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, jbeulich@suse.com, sstabellini@kernel.org Subject: Re: [PATCH v10 1/5] xen/console: use ACCESS_ONCE for console_rx Message-ID: References: <20260204233712.3396752-1-stefano.stabellini@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260204233712.3396752-1-stefano.stabellini@amd.com> On Wed, Feb 04, 2026 at 03:37:08PM -0800, Stefano Stabellini wrote: > There can be concurrent reads and writes to the console_rx variable so > it is prudent to use ACCESS_ONCE. > > Signed-off-by: Stefano Stabellini > Acked-by: Jan Beulich Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Thu Feb 05 06:07:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 06:07:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221490.1529698 (Exim 4.92) (envelope-from ) id 1vnsWO-0005Ue-Kx; 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X-IronPort-AV: E=Sophos;i="6.21,274,1763391600"; d="scan'208";a="608419792" Date: Thu, 5 Feb 2026 15:07:01 +0900 From: Shashank Balaji To: Sohil Mehta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird , stable@vger.kernel.org Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> On Wed, Feb 04, 2026 at 10:53:28AM -0800, Sohil Mehta wrote: > On 2/4/2026 1:17 AM, Shashank Balaji wrote: > > > __x2apic_disable disables x2apic only if boot_cpu_has(X86_FEATURE_APIC) > > and x2apic is already enabled. > > I meant the X86_FEATURE_X2APIC and not X86_FEATURE_APIC. My bad, I got that wrong. __x2apic_disable checks for X86_FEATURE_APIC, while x2apic_enabled checks for X86_FEATURE_X2APIC. > But, thinking about it more, checking that the CPU is really in X2APIC mode > by reading the MSR is good enough. But yes, I agree. > > x2apic_enabled also does the same checks, > > the only difference being, it uses rdmsrq_safe instead of just rdmsrq, > > which is what __x2apic_disable uses. The safe version is because of > > Boris' suggestion [1]. If that's applicable here as well, then rdmsrq in > > __x2apic_disable should be changed to rdmsrq_safe. > > I don't know if there is a strong justification for changing to > rdmsrq_safe() over here. Also, that would be beyond the scope of this > patch. In general, it's better to avoid such changes unless an actual > issue pops up. Makes sense. > >> I considered if an error message should be printed along with this. But, > >> I am not sure if it can really be called a firmware issue. It's probably > >> just that newer CPUs might have started defaulting to x2apic on. > >> > >> Can you specify what platform you are encountering this? > > > > > > I'm not sure it's the CPU defaulting to x2apic on. As per Section > > 12.12.5.1 of the Intel SDM: > > > > On coming out of reset, the local APIC unit is enabled and is in > > the xAPIC mode: IA32_APIC_BASE[EN]=1 and IA32_APIC_BASE[EXTD]=0. > > > > So, the CPU should be turning on in xapic mode. In fact, when x2apic is > > disabled in the firmware, this problem doesn't happen. > > > > It's a bit odd then that the firmware chooses to enable x2apic without > the OS requesting it. Well, the firmware has a setting saying "Enable x2apic", which was enabled. So it did what the setting says > Linux maintains a concept of X2APIC_ON_LOCKED in x2apic_state which is > based on the hardware preference to keep the apic in X2APIC mode. > > When you have x2apic enabled in firmware, but the system is in XAPIC > mode, can you read the values in MSR_IA32_ARCH_CAPABILITIES and > MSR_IA32_XAPIC_DISABLE_STATUS? > > XAPIC shouldn't be disabled because you are running in that mode. But, > it would be good to confirm. With x2apic enabled by the firmware, and after kernel switches to xapic (because no interrupt remapping support), bit 21 (XAPIC_DISABLE_STATUS) of MSR_IA32_ARCH_CAPABILITIES is 0, and MSR_IA32_XAPIC_DISABLE_STATUS MSR is not available. > > Either way, a pr_warn maybe helpful. How about "x2apic re-enabled by the > > firmware during resume. Disabling\n"? > > I mainly want to make sure the firmware is really at fault before we add > such a print. But it seems likely now that the firmware messed up. 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Wed, 04 Feb 2026 23:17:12 -0800 (PST) Message-ID: <0a6d9ae8-ac1b-4287-9a42-1d91ad5d35a0@suse.com> Date: Thu, 5 Feb 2026 08:17:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 1/2] xen/console: handle multiple domains using console_io hypercalls To: Stefano Stabellini Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: <20260129220858.2371938-1-stefano.stabellini@amd.com> <0fc9a80a-8621-4ce4-b2f9-c102e975b05b@suse.com> <0a437580-a373-4aeb-a153-b3dca0cf2bb7@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 00:30, Stefano Stabellini wrote: > On Wed, 4 Feb 2026, Jan Beulich wrote: >> 2) As all of this is for dom0less only (for now at least), did you consider >> to make all of these changes dependent upon a new Kconfig option, so to >> avoid impacting other environments in case issues remain when this has >> gone in? > > Effectively it is already the case because: > > #define max_console_rx (max_init_domid + 1) > > I could easily add an #ifdef around is_focus_domain() so that in case > CONFIG_DOM0LESS_BOOT is disabled it defaults to is_hardware_domain() but > that wouldn't really help because thanks to the definition of > max_console_rx, effectively it works the same way when > CONFIG_DOM0LESS_BOOT is disabled. > > I think what you are asking would be more about the locking changes in > guest_console_write, but for those I cannot really use #ifdef to retain > the current position of the locks. The resulting code would not be good. Yes, the request was (primarily) about the locking changes (additions!), as these can affect non-dom0less as well. I may try to make suggestions when looking at the next version. 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Wed, 04 Feb 2026 23:25:09 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 08:25:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Bertrand Marquis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 17:22, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 04:31:12PM +0100, Jan Beulich wrote: >> On 04.02.2026 14:16, Bertrand Marquis wrote: >>> --- /dev/null >>> +++ b/config/Darwin.mk >>> @@ -0,0 +1,4 @@ >>> +include $(XEN_ROOT)/config/StdGNU.mk >> >> Darwin isn't really a GNU environment, is it? The definitions in that file >> may be suitable, but perhaps a brief comment is warranted? > > It's similar to FreeBSD in that regard, which is also not a GNU > environment as the compiler and toolchain is LLVM. However the LLVM > toolchain attempt to be command line and output compatible with the > GNU one AFAIK. Hmm, FreeBSD (unlike OpenBSD and NetBSD) may be somewhat complicated in this regard. First, I don't think the default compiler used matters. What does matter is behavior in certain (many?) respects. E.g. in GNU binutils ELFOSABI_FREEBSD is treated as equivalent to ELFOSABI_GNU in certain places. So it may be viewed as a "hybrid"? (Of course there are many(?) other things where GNU environments are expected to "behave" in certain ways.) > FreeBSD.mk also includes StdGNU.mk. Maybe we want to rename StdGNU.mk > to generic.mk or common.mk? Not sure here. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Pp1e1OAijDdyK03U68AxjViWi/jcuzM5uOq3o6Lhjmz/xN/SdJuM8KkVOj6HqFKpaY5SGqGH0C/5BYYt7GMqSgEQYp31ei2s0dS8GpUAQC5c4SHafoYoMCLFRjLFgsGIJk9reTni/xsKqCfa3l3Azy+KcDj0uX09JbUwI8V9GHi9YGL3Ck/7HiVDddavcgWMLUgSHRfDM1yxjYpNJqIXR+552PfB3kYxg5DSEj+WAn0td8VnkEeiEy7ftfkmEr5g6FvuyBY23d7wULae2ok+LOf0Xu7OeCwyELJtdHNr6akPeqIOj0LwpTkwOxhkLlaJYruDkdykuiPb5hGtmaqePtE/sC4ZblxqDx9NuH9YmpgUzsDCWcj05ho1cye1C5KK3LMCByZJq7UA+8k2TPbq//CweDyaDkURXBlh18FiF9ldNKyEI5SoisGUY612Hk5/ X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 07:45:21.2595 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73cbcee4-8306-43e1-7d0c-08de648a83d9 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000048.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB6532 Hi Jan, > On 4 Feb 2026, at 17:15, Jan Beulich wrote: >=20 > On 04.02.2026 16:45, Bertrand Marquis wrote: >>> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >>> On 04.02.2026 14:16, Bertrand Marquis wrote: >>>> Xen does not currently document how to build the hypervisor on macOS, = and >>>> there is no Darwin configuration for a Homebrew-based toolchain. In >>>> addition, the Makefile silent-mode detection can be tripped by -I path= s >>>> that contain an "s", which hides build commands unexpectedly. >>>=20 >>> This wants submitting as a standalone fix, so it can be backported. But= see >>> also below. I don't, however, understand how -I could be useful here - = our >>> build system is self-contained, so any include directives used should b= e >>> satisfiable without any -I. >>=20 >> This is added automatically inside our Makefile if you build out of tree= : >>=20 >> MAKEFLAGS +=3D --include-dir=3D$(abs_srctree) >>=20 >> which ends up being -Ixxx when tested. >=20 > Hmm, but I do have an 's' in my source path, yet I need to explicitly pas= s > -s for the build to be silent. I did further investigations and my previous assumptions where actually wrong because i looked tat MAKEFLAGS value once the whole Makefile was parsed and the include-dir flag is added after so it was not the reason of the issue. In fact the issue is coming from variables set on the command line (and in my case O=3D with a path containing a s). So you can easily reproduce the issue by just passing XX=3Ds to the make command line to do a test. As a consequence, your proposed solution filtering -% is not working and the only reliable solution is to actually use firstword to actually get the short options list. This is making an assumption on MAKEFLAGS having them first but my tests are showing that it is always the case. I would propose to put a comment to explain the assumptions on which the filtering is based on top: Something like this: diff --git a/xen/Makefile b/xen/Makefile index 13e336ba5484..a7924fcb7af5 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -113,10 +113,10 @@ else Q :=3D @ endif -# If the user is running make -s (silent mode), suppress echoing of -# commands - -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) +# If the user is running make -s (silent mode), suppress echoing of comman= ds. +# This relies on GNU make encoding short options in the first MAKEFLAGS wo= rd; +# if this changes in the future, this check may need revisiting. +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) quiet :=3D silent_ endif Also i can put a fixes tag if you think that is useful: Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") Please tell me if that sounds ok for you and I will resubmit this as 2 diff= erent patches instead of a single one. Cheers Bertrand >=20 > Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 05 08:03:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 08:03:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221555.1529746 (Exim 4.92) (envelope-from ) id 1vnuKk-0005Je-Kn; Thu, 05 Feb 2026 08:03:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221555.1529746; Thu, 05 Feb 2026 08:03:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuKk-0005JX-HE; Thu, 05 Feb 2026 08:03:26 +0000 Received: by outflank-mailman (input) for mailman id 1221555; Thu, 05 Feb 2026 08:03:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuKj-0005JR-3W for xen-devel@lists.xenproject.org; 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On 64bit PV guests the start_info field is 64bits wide. HVM guests don't use start_info at all. Drop the restriction in arch_domain_create() and instead free and re-allocate the page from memory below 4G if needed in switch_compat(), when the guest is set to run in 32bit PV mode. Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- Changes since v2: - Move/reword some comments. - Add spaces in for_each_vcpu call. --- xen/arch/x86/domain.c | 6 +----- xen/arch/x86/pv/domain.c | 28 ++++++++++++++++++++++++++++ xen/common/domain.c | 2 +- xen/include/xen/domain.h | 2 ++ 4 files changed, 32 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index edb76366b596..8b2f33f1a06c 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -881,11 +881,7 @@ int arch_domain_create(struct domain *d, if ( d->arch.ioport_caps == NULL ) goto fail; - /* - * The shared_info machine address must fit in a 32-bit field within a - * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32). - */ - if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL ) + if ( (d->shared_info = alloc_xenheap_page()) == NULL ) goto fail; clear_page(d->shared_info); diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 01499582d2d6..e3273b49269d 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -247,6 +247,34 @@ int switch_compat(struct domain *d) d->arch.has_32bit_shinfo = 1; d->arch.pv.is_32bit = true; + /* + * For 32bit PV guests the shared_info machine address must fit in a 32-bit + * field within the guest's start_info structure. We might need to free + * the current page and allocate a new one that fulfills this requirement. + */ + if ( virt_to_maddr(d->shared_info) >> 32 ) + { + shared_info_t *prev = d->shared_info; + + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); + if ( !d->shared_info ) + { + d->shared_info = prev; + rc = -ENOMEM; + goto undo_and_fail; + } + put_page(virt_to_page(prev)); + clear_page(d->shared_info); + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); + /* + * Ensure all pointers to the old shared_info page are replaced. vCPUs + * below XEN_LEGACY_MAX_VCPUS will stash a pointer to + * shared_info->vcpu_info[id]. + */ + for_each_vcpu ( d, v ) + vcpu_info_reset(v); + } + for_each_vcpu( d, v ) { if ( (rc = setup_compat_arg_xlat(v)) || diff --git a/xen/common/domain.c b/xen/common/domain.c index 163f7fc96658..4f6977c67aa7 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -305,7 +305,7 @@ static void vcpu_check_shutdown(struct vcpu *v) spin_unlock(&d->shutdown_lock); } -static void vcpu_info_reset(struct vcpu *v) +void vcpu_info_reset(struct vcpu *v) { struct domain *d = v->domain; diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 273717c31b3f..52cdf012c491 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -83,6 +83,8 @@ void cf_check free_pirq_struct(void *ptr); int arch_vcpu_create(struct vcpu *v); void arch_vcpu_destroy(struct vcpu *v); +void vcpu_info_reset(struct vcpu *v); + int map_guest_area(struct vcpu *v, paddr_t gaddr, unsigned int size, struct guest_area *area, void (*populate)(void *dst, struct vcpu *v)); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 08:04:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 08:04:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221562.1529756 (Exim 4.92) (envelope-from ) id 1vnuM5-0005sg-1J; Thu, 05 Feb 2026 08:04:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221562.1529756; Thu, 05 Feb 2026 08:04:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuM4-0005sZ-UA; Thu, 05 Feb 2026 08:04:48 +0000 Received: by outflank-mailman (input) for mailman id 1221562; Thu, 05 Feb 2026 08:04:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuM3-0005sO-4y for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 08:04:47 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 54fb87c3-0269-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 09:04:44 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-43626796202so41522f8f.3 for ; Thu, 05 Feb 2026 00:04:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 00:04:43 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 09:04:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 16:45, Bertrand Marquis wrote: >> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >> On 04.02.2026 14:16, Bertrand Marquis wrote: >>> --- a/xen/Makefile >>> +++ b/xen/Makefile >>> @@ -116,7 +116,7 @@ endif >>> # If the user is running make -s (silent mode), suppress echoing of >>> # commands >>> >>> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >>> +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) >> >> While probably this would do, assuming make isn't going to make drastic >> changes to how $(MAKEFLAGS) is set up, how about >> >> -ifneq ($(findstring s,$(filter-out -%,$(MAKEFLAGS))),) >> >> instead? > > Yes this is a solution that should work to, making the assumption that short > arguments are kept at the beginning like they are now is possibly to strong. As you indicated on Matrix, this wouldn't cover variable definitions, e.g. O=. Sticking to just $(firstword ...) also doesn't work, though: If there are no options needing handing on and having a short form representation, the "first word" may be empty, with $(MAKEFLAGS) then starting with a blank. Perhaps ifneq ($(findstring s,$(firstword .$(MAKEFLAGS))),) would be a way to overcome this. However, wording in the documentation [1], [2] is ambiguous as to whether we may rely on there being that leading blank (it seems likely that [1] is more reliable than [2], but still). However, [2] effectively suggests another alternative: ifneq ($(findstring s,$(filter-out --%,$(MFLAGS))),) While you meanwhile clarified (again on Matrix) that use of -I isn't the culprit, even with O= I still cannot observe the behavior you're describing. I.e. I still need to pass -s in order to silence the build, even if I use O=.../staging (i.e. an 's' clearly being present in the path). Jan [1] "If there are no single-letter options on the command line, then the value of MAKEFLAGS starts with a space." [2] "A similar variable MFLAGS exists also, for historical compatibility. It has the same value as MAKEFLAGS except that it does not contain the command line variable definitions, and it always begins with a hyphen unless it is empty (MAKEFLAGS begins with a hyphen only when it begins with an option that has no single-letter version, such as ‘--warn-undefined-variables’)." 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Thu, 05 Feb 2026 00:23:52 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 09:23:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> <65D4FEA7-DECD-4DDD-B119-4625F72ED585@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <65D4FEA7-DECD-4DDD-B119-4625F72ED585@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 08:44, Bertrand Marquis wrote: >> On 4 Feb 2026, at 17:15, Jan Beulich wrote: >> On 04.02.2026 16:45, Bertrand Marquis wrote: >>>> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >>>> On 04.02.2026 14:16, Bertrand Marquis wrote: >>>>> Xen does not currently document how to build the hypervisor on macOS, and >>>>> there is no Darwin configuration for a Homebrew-based toolchain. In >>>>> addition, the Makefile silent-mode detection can be tripped by -I paths >>>>> that contain an "s", which hides build commands unexpectedly. >>>> >>>> This wants submitting as a standalone fix, so it can be backported. But see >>>> also below. I don't, however, understand how -I could be useful here - our >>>> build system is self-contained, so any include directives used should be >>>> satisfiable without any -I. >>> >>> This is added automatically inside our Makefile if you build out of tree: >>> >>> MAKEFLAGS += --include-dir=$(abs_srctree) >>> >>> which ends up being -Ixxx when tested. >> >> Hmm, but I do have an 's' in my source path, yet I need to explicitly pass >> -s for the build to be silent. > > I did further investigations and my previous assumptions where actually > wrong because i looked tat MAKEFLAGS value once the whole Makefile > was parsed and the include-dir flag is added after so it was not the reason > of the issue. > > In fact the issue is coming from variables set on the command line (and > in my case O= with a path containing a s). > So you can easily reproduce the issue by just passing XX=s to the make > command line to do a test. > > As a consequence, your proposed solution filtering -% is not working and > the only reliable solution is to actually use firstword to actually get the > short options list. This is making an assumption on MAKEFLAGS having > them first but my tests are showing that it is always the case. > I would propose to put a comment to explain the assumptions on which > the filtering is based on top: > > Something like this: > diff --git a/xen/Makefile b/xen/Makefile > index 13e336ba5484..a7924fcb7af5 100644 > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -113,10 +113,10 @@ else > Q := @ > endif > > -# If the user is running make -s (silent mode), suppress echoing of > -# commands > - > -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) > +# If the user is running make -s (silent mode), suppress echoing of commands. > +# This relies on GNU make encoding short options in the first MAKEFLAGS word; > +# if this changes in the future, this check may need revisiting. > +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) > quiet := silent_ > endif > > Also i can put a fixes tag if you think that is useful: > Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") > > Please tell me if that sounds ok for you and I will resubmit this as 2 different patches > instead of a single one. Sadly no, see my other reply sent earlier today. Furthermore, as said there, even with O= I can't repro what you say. In fact with a Makefile containing just $(warning MAKEFLAGS="$(MAKEFLAGS)" ABC="$(ABC)" XYZ="$(XYZ)") all: @echo 'MFLAGS=$(MFLAGS)' @echo 'MAKEFLAGS=$(MAKEFLAGS)' I can observe (with both make 4.0 and make 4.2.1) $(MAKEFLAGS) expanding differently depending on where it's used (I'm passing ABC= and/or XYZ= to experiment): Only the use in the rule has the variables. What version of make are you using? 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Thu, 05 Feb 2026 00:29:56 -0800 (PST) Message-ID: <5bd55bef-f30c-475d-9831-382406f699fb@suse.com> Date: Thu, 5 Feb 2026 09:29:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260204122553.75711-1-roger.pau@citrix.com> <82540f88-ffcd-46a9-9813-ebe42ef0b0ec@suse.com> <3f9b4337-3e0a-4693-b97f-46505bc1349a@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 17:46, Roger Pau Monné wrote: > On Wed, Feb 04, 2026 at 04:08:21PM +0100, Jan Beulich wrote: >> On 04.02.2026 15:52, Roger Pau Monné wrote: >>> On Wed, Feb 04, 2026 at 03:06:52PM +0100, Jan Beulich wrote: >>>> On 04.02.2026 13:25, Roger Pau Monne wrote: >>>>> The limitation of shared_info being allocated below 4G to fit in the >>>>> start_info field only applies to 32bit PV guests. On 64bit PV guests the >>>>> start_info field is 64bits wide. HVM guests don't use start_info at all. >>>>> >>>>> Drop the restriction in arch_domain_create() and instead free and >>>>> re-allocate the page from memory below 4G if needed in switch_compat(), >>>>> when the guest is set to run in 32bit PV mode. >>>>> >>>>> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") >>>> >>>> The tag is here because there is the (largely theoretical?) possibility for >>>> a system to have no memory at all left below 4Gb, in which case creation of >>>> a PV64 or non-shadow HVM guest would needlessly fail? >>> >>> It's kid of an issue we discovered when using strict domain NUMA node >>> placement. At that point the toolstack would exhaust all memory on >>> node 0 and by doing that inadvertently consume all memory below 4G. >> >> Right, and hence also my "memory: arrange to conserve on DMA reservation", >> where I'm still fighting with myself as to what to do with the comments you >> gave there. > > Better fighting with yourself rather than fighting with me I guess ;). > > That change would be controversial with what we currently do on > XenServer, because we don't (yet) special case the memory below 4G to > not account for it in the per node free amount of memory. > > What would happen when you append the MEMF_no_dma flag as proposed in > your commit, but the caller is also passing MEMF_exact_node with > target node 0? AFAICT the allocation would still refuse to use the > low 4G pool. Yes, DMA-ability is intended to take higher priority than exact-node requests. Another node would then need choosing by the toolstack. > Also, your commit should also be expanded to avoid staking claims that > would drain the DMA pool, as then populate_physmap() won't be able to > allocate from there? Except that upstream claims aren't node-specific, yet, so could be fulfilled my taking memory from other nodes? Aiui the problem would only occur if that DAM-able memory was the only memory left in the system. Jan > It would be weird for the toolstack to have > successfully made a claim, and then populate_physmap() returning > -ENOMEM because (part of) the claim has been made against the DMA > pool, which populate_physmap() would explicitly forbidden to allocate > from. > > Thanks, Roger. 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Thu, 05 Feb 2026 00:36:28 -0800 (PST) Message-ID: <5aaee345-5ace-42b7-a436-ae6ce57cb9fc@suse.com> Date: Thu, 5 Feb 2026 09:36:26 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] x86/domain: adjust limitation on shared_info allocation below 4G To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260205080308.91057-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205080308.91057-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 09:03, Roger Pau Monne wrote: > --- a/xen/arch/x86/pv/domain.c > +++ b/xen/arch/x86/pv/domain.c > @@ -247,6 +247,34 @@ int switch_compat(struct domain *d) > d->arch.has_32bit_shinfo = 1; > d->arch.pv.is_32bit = true; > > + /* > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > + * field within the guest's start_info structure. We might need to free > + * the current page and allocate a new one that fulfills this requirement. > + */ > + if ( virt_to_maddr(d->shared_info) >> 32 ) > + { > + shared_info_t *prev = d->shared_info; > + > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > + if ( !d->shared_info ) > + { > + d->shared_info = prev; > + rc = -ENOMEM; > + goto undo_and_fail; > + } > + put_page(virt_to_page(prev)); > + clear_page(d->shared_info); > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > + /* > + * Ensure all pointers to the old shared_info page are replaced. vCPUs > + * below XEN_LEGACY_MAX_VCPUS will stash a pointer to > + * shared_info->vcpu_info[id]. > + */ To cope with the toolstack-dependent ordering of actions, may I suggest "... may have stashed ..." instead? Jan > + for_each_vcpu ( d, v ) > + vcpu_info_reset(v); > + } > + > for_each_vcpu( d, v ) > { > if ( (rc = setup_compat_arg_xlat(v)) || From xen-devel-bounces@lists.xenproject.org Thu Feb 05 08:43:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 08:43:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221620.1529796 (Exim 4.92) (envelope-from ) id 1vnuxk-0004Vk-Gb; Thu, 05 Feb 2026 08:43:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221620.1529796; Thu, 05 Feb 2026 08:43:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuxk-0004Vd-DN; Thu, 05 Feb 2026 08:43:44 +0000 Received: by outflank-mailman (input) for mailman id 1221620; Thu, 05 Feb 2026 08:43:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnuxj-0004VX-DH for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 08:43:43 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c208fbd9-026e-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 09:43:35 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4806fbc6bf3so7195985e9.2 for ; Thu, 05 Feb 2026 00:43:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 00:43:34 -0800 (PST) Message-ID: <09462166-a3c5-4527-840a-cd77499dc588@suse.com> Date: Thu, 5 Feb 2026 09:43:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/6] xen/console: make console buffer size configurable To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, Jason Andryuk , xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-3-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-3-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > --- a/xen/drivers/char/Kconfig > +++ b/xen/drivers/char/Kconfig > @@ -95,6 +95,30 @@ config SERIAL_TX_BUFSIZE > > Default value is 32768 (32KiB). > > +config CONRING_SHIFT > + int "Console ring buffer size (power of 2)" > + range 14 27 > + default 15 > + help > + Select the boot console ring buffer size as a power of 2. > + Run-time console ring buffer size is the same as the boot console ring > + buffer size, unless overridden via 'conring_size=' boot parameter. > + > + 27 => 128 MiB > + 26 => 64 MiB > + 25 => 32 MiB > + 24 => 16 MiB > + 23 => 8 MiB > + 22 => 4 MiB > + 21 => 2 MiB > + 20 => 1 MiB > + 19 => 512 KiB > + 18 => 256 KiB > + 17 => 128 KiB > + 16 => 64 KiB > + 15 => 32 KiB (default) > + 14 => 16 KiB As I think I had indicated before - imo an exhaustive table goes too far here. E.g. 27 => 128 MiB 26 => 64 MiB ... 15 => 32 KiB (default) 14 => 16 KiB would do (if such is needed / wanted at all). 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DQFPsxReXZsHk5ncn+StTmAg9zSRvexcbBVeksIqiRNDL1DvzeXlX0ekbLyiV36glkqWvdky43FkxwiY7t/BWwYoMxo3aheT9snJ4Yaf1qbCftL57X7EA2rT0ANQTxmXJcbZewJoBI/NmQsVEVeJA7PpKob3ujAMvX6J0G9YLvZ1jvbiSEF+P4gxip+IHQHiGsWPlA3eTHe0qbYnd7VNIjUP4qZzzPs8orONaskoDW/NH8VRRhT3W2Orh918HW89oSS/eSUtOKaESFvsNQdrmAy3KbnnnXDNvV7sZsmTECQfAcLSy25E93307koD5biBfVl6fJTWUE3Sb1gYvpamcE2dHp39RzWeqclxrSZmcqSBoEap+cGwCttN4Vyve+VvqV6THx3VJEux3flTfclLiFEhV4KDUyhAmAqjKrkk2qTISqaFr8PuaysfRHkrAHpw X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 08:46:00.8120 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 99ad0e5f-2571-4b28-49f6-08de6492fd31 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM1PEPF000252DD.eurprd07.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7638 Hi Jan, > On 5 Feb 2026, at 09:23, Jan Beulich wrote: >=20 > On 05.02.2026 08:44, Bertrand Marquis wrote: >>> On 4 Feb 2026, at 17:15, Jan Beulich wrote: >>> On 04.02.2026 16:45, Bertrand Marquis wrote: >>>>> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >>>>> On 04.02.2026 14:16, Bertrand Marquis wrote: >>>>>> Xen does not currently document how to build the hypervisor on macOS= , and >>>>>> there is no Darwin configuration for a Homebrew-based toolchain. In >>>>>> addition, the Makefile silent-mode detection can be tripped by -I pa= ths >>>>>> that contain an "s", which hides build commands unexpectedly. >>>>>=20 >>>>> This wants submitting as a standalone fix, so it can be backported. B= ut see >>>>> also below. I don't, however, understand how -I could be useful here = - our >>>>> build system is self-contained, so any include directives used should= be >>>>> satisfiable without any -I. >>>>=20 >>>> This is added automatically inside our Makefile if you build out of tr= ee: >>>>=20 >>>> MAKEFLAGS +=3D --include-dir=3D$(abs_srctree) >>>>=20 >>>> which ends up being -Ixxx when tested. >>>=20 >>> Hmm, but I do have an 's' in my source path, yet I need to explicitly p= ass >>> -s for the build to be silent. >>=20 >> I did further investigations and my previous assumptions where actually >> wrong because i looked tat MAKEFLAGS value once the whole Makefile >> was parsed and the include-dir flag is added after so it was not the rea= son >> of the issue. >>=20 >> In fact the issue is coming from variables set on the command line (and >> in my case O=3D with a path containing a s). >> So you can easily reproduce the issue by just passing XX=3Ds to the make >> command line to do a test. >>=20 >> As a consequence, your proposed solution filtering -% is not working and >> the only reliable solution is to actually use firstword to actually get = the >> short options list. This is making an assumption on MAKEFLAGS having >> them first but my tests are showing that it is always the case. >> I would propose to put a comment to explain the assumptions on which >> the filtering is based on top: >>=20 >> Something like this: >> diff --git a/xen/Makefile b/xen/Makefile >> index 13e336ba5484..a7924fcb7af5 100644 >> --- a/xen/Makefile >> +++ b/xen/Makefile >> @@ -113,10 +113,10 @@ else >> Q :=3D @ >> endif >>=20 >> -# If the user is running make -s (silent mode), suppress echoing of >> -# commands >> - >> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >> +# If the user is running make -s (silent mode), suppress echoing of com= mands. >> +# This relies on GNU make encoding short options in the first MAKEFLAGS= word; >> +# if this changes in the future, this check may need revisiting. >> +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) >> quiet :=3D silent_ >> endif >>=20 >> Also i can put a fixes tag if you think that is useful: >> Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rul= e") >>=20 >> Please tell me if that sounds ok for you and I will resubmit this as 2 d= ifferent patches >> instead of a single one. >=20 > Sadly no, see my other reply sent earlier today. Furthermore, as said the= re, even Sorry missed you reply when i wrote mine. > with O=3D I can't repro what you say. In fact with a Makefile containing = just interesting >=20 > $(warning MAKEFLAGS=3D"$(MAKEFLAGS)" ABC=3D"$(ABC)" XYZ=3D"$(XYZ)") >=20 > all: > @echo 'MFLAGS=3D$(MFLAGS)' > @echo 'MAKEFLAGS=3D$(MAKEFLAGS)' >=20 > I can observe (with both make 4.0 and make 4.2.1) $(MAKEFLAGS) expanding > differently depending on where it's used (I'm passing ABC=3D and/or XYZ= =3D to > experiment): Only the use in the rule has the variables. What version of = make are > you using? I am using make 4.4.1 on both my Linux and brew based builds which might ex= plain why i always see the same. I have an other linux system where i have make 4.3 and in this one, MAKEFLA= GS does not contain O=3D options when the test is done so the issue is not appearin= g there: adding: @@ -116,6 +116,7 @@ endif # If the user is running make -s (silent mode), suppress echoing of # commands +$(info MAKEFLAGS=3D$(MAKEFLAGS)) +$(info MFLAGS=3D$(MFLAGS)) ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) quiet :=3D silent_ endif ## On linux with make 4.3 i see: MAKEFLAGS=3D-rR MFLAGS=3D and the build is not silent with -s: MAKEFLAGS=3Ds -rR MFLAGS=3D-s with --warn-undefined-variables MAKEFLAGS=3D --warn-undefined-variables -rR MFLAGS=3D--warn-undefined-variables ## but on linux with 4.4.1 i see (same with brew make 4.4.4: MAKEFLAGS=3DrR -- XEN_TARGET_ARCH=3Darm64 O=3Dbuilddir-s-test MFLAGS=3D-rR and the build is silent with -s: MAKEFLAGS=3DrRs -- XEN_TARGET_ARCH=3Darm64 O=3D/home/bermar01/Work/xen/xen/= builddir MFLAGS=3D-rRs with --warn-undefined-variables MAKEFLAGS=3DrR --warn-undefined-variables -- XEN_TARGET_ARCH=3Darm64 O=3D/h= ome/bermar01/Work/xen/xen/builddir MFLAGS=3D-rR --warn-undefined-variables Giving --silent is giving the same MAKEFLAGS and MFLAGS on both versions. So i think the working solution would be to keep the current test but do it= on MFLAGS instead of MAKEFLAGS: ifneq ($(findstring s,$(filter-out --%,$(MFLAGS))),) quiet :=3D silent_ endif Could you quickly do the same test than me on make 4.0 and 4.2.1 to confirm= ? Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Thu Feb 05 08:56:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 08:56:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221636.1529816 (Exim 4.92) (envelope-from ) id 1vnvA4-0006oE-QB; Thu, 05 Feb 2026 08:56:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221636.1529816; Thu, 05 Feb 2026 08:56:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvA4-0006o7-M8; Thu, 05 Feb 2026 08:56:28 +0000 Received: by outflank-mailman (input) for mailman id 1221636; Thu, 05 Feb 2026 08:56:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvA2-0006o1-Sr for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 08:56:26 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8d35f34a-0270-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 09:56:25 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-47ee2715254so4059125e9.3 for ; Thu, 05 Feb 2026 00:56:25 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Even without "rJ" it is using x0 when argument 0 is passed. Just to be on a safe side I don't mind to add "J". ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 05 08:56:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 08:56:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221640.1529827 (Exim 4.92) (envelope-from ) id 1vnvAS-0007CW-5j; Thu, 05 Feb 2026 08:56:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221640.1529827; Thu, 05 Feb 2026 08:56:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvAS-0007CP-1i; Thu, 05 Feb 2026 08:56:52 +0000 Received: by outflank-mailman (input) for mailman id 1221640; Thu, 05 Feb 2026 08:56:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvAR-00073Q-HN for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 08:56:51 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9b7ef31e-0270-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 09:56:49 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-47edd6111b4so6919465e9.1 for ; Thu, 05 Feb 2026 00:56:49 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 00:56:48 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 09:56:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: Add macOS hypervisor build support To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <5062E1F2-D023-4BF9-A829-BB996686B04C@arm.com> <65D4FEA7-DECD-4DDD-B119-4625F72ED585@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 09:44, Bertrand Marquis wrote: > Hi Jan, > >> On 5 Feb 2026, at 09:23, Jan Beulich wrote: >> >> On 05.02.2026 08:44, Bertrand Marquis wrote: >>>> On 4 Feb 2026, at 17:15, Jan Beulich wrote: >>>> On 04.02.2026 16:45, Bertrand Marquis wrote: >>>>>> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >>>>>> On 04.02.2026 14:16, Bertrand Marquis wrote: >>>>>>> Xen does not currently document how to build the hypervisor on macOS, and >>>>>>> there is no Darwin configuration for a Homebrew-based toolchain. In >>>>>>> addition, the Makefile silent-mode detection can be tripped by -I paths >>>>>>> that contain an "s", which hides build commands unexpectedly. >>>>>> >>>>>> This wants submitting as a standalone fix, so it can be backported. But see >>>>>> also below. I don't, however, understand how -I could be useful here - our >>>>>> build system is self-contained, so any include directives used should be >>>>>> satisfiable without any -I. >>>>> >>>>> This is added automatically inside our Makefile if you build out of tree: >>>>> >>>>> MAKEFLAGS += --include-dir=$(abs_srctree) >>>>> >>>>> which ends up being -Ixxx when tested. >>>> >>>> Hmm, but I do have an 's' in my source path, yet I need to explicitly pass >>>> -s for the build to be silent. >>> >>> I did further investigations and my previous assumptions where actually >>> wrong because i looked tat MAKEFLAGS value once the whole Makefile >>> was parsed and the include-dir flag is added after so it was not the reason >>> of the issue. >>> >>> In fact the issue is coming from variables set on the command line (and >>> in my case O= with a path containing a s). >>> So you can easily reproduce the issue by just passing XX=s to the make >>> command line to do a test. >>> >>> As a consequence, your proposed solution filtering -% is not working and >>> the only reliable solution is to actually use firstword to actually get the >>> short options list. This is making an assumption on MAKEFLAGS having >>> them first but my tests are showing that it is always the case. >>> I would propose to put a comment to explain the assumptions on which >>> the filtering is based on top: >>> >>> Something like this: >>> diff --git a/xen/Makefile b/xen/Makefile >>> index 13e336ba5484..a7924fcb7af5 100644 >>> --- a/xen/Makefile >>> +++ b/xen/Makefile >>> @@ -113,10 +113,10 @@ else >>> Q := @ >>> endif >>> >>> -# If the user is running make -s (silent mode), suppress echoing of >>> -# commands >>> - >>> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >>> +# If the user is running make -s (silent mode), suppress echoing of commands. >>> +# This relies on GNU make encoding short options in the first MAKEFLAGS word; >>> +# if this changes in the future, this check may need revisiting. >>> +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) >>> quiet := silent_ >>> endif >>> >>> Also i can put a fixes tag if you think that is useful: >>> Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") >>> >>> Please tell me if that sounds ok for you and I will resubmit this as 2 different patches >>> instead of a single one. >> >> Sadly no, see my other reply sent earlier today. Furthermore, as said there, even > > Sorry missed you reply when i wrote mine. > >> with O= I can't repro what you say. In fact with a Makefile containing just > > interesting > >> >> $(warning MAKEFLAGS="$(MAKEFLAGS)" ABC="$(ABC)" XYZ="$(XYZ)") >> >> all: >> @echo 'MFLAGS=$(MFLAGS)' >> @echo 'MAKEFLAGS=$(MAKEFLAGS)' >> >> I can observe (with both make 4.0 and make 4.2.1) $(MAKEFLAGS) expanding >> differently depending on where it's used (I'm passing ABC= and/or XYZ= to >> experiment): Only the use in the rule has the variables. What version of make are >> you using? > > I am using make 4.4.1 on both my Linux and brew based builds which might explain > why i always see the same. > > I have an other linux system where i have make 4.3 and in this one, MAKEFLAGS does > not contain O= options when the test is done so the issue is not appearing there: > > adding: > @@ -116,6 +116,7 @@ endif > # If the user is running make -s (silent mode), suppress echoing of > # commands > > +$(info MAKEFLAGS=$(MAKEFLAGS)) > +$(info MFLAGS=$(MFLAGS)) > ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) > quiet := silent_ > endif > > ## On linux with make 4.3 i see: > MAKEFLAGS=-rR > MFLAGS= > and the build is not silent > > with -s: > MAKEFLAGS=s -rR > MFLAGS=-s > > with --warn-undefined-variables > MAKEFLAGS= --warn-undefined-variables -rR > MFLAGS=--warn-undefined-variables > > ## but on linux with 4.4.1 i see (same with brew make 4.4.4: > MAKEFLAGS=rR -- XEN_TARGET_ARCH=arm64 O=builddir-s-test > MFLAGS=-rR > and the build is silent > > with -s: > MAKEFLAGS=rRs -- XEN_TARGET_ARCH=arm64 O=/home/bermar01/Work/xen/xen/builddir > MFLAGS=-rRs > > with --warn-undefined-variables > MAKEFLAGS=rR --warn-undefined-variables -- XEN_TARGET_ARCH=arm64 O=/home/bermar01/Work/xen/xen/builddir > MFLAGS=-rR --warn-undefined-variables Ah yes, and here is a quote from make 4.4's NEWS: "* WARNING: Backward-incompatibility! Previously only simple (one-letter) options were added to the MAKEFLAGS variable that was visible while parsing makefiles. Now, all options are available in MAKEFLAGS. If you want to check MAKEFLAGS for a one-letter option, expanding "$(firstword -$(MAKEFLAGS))" is a reliable way to return the set of one-letter options which can be examined via findstring, etc." > So i think the working solution would be to keep the current test but do it on MFLAGS instead of MAKEFLAGS: > > ifneq ($(findstring s,$(filter-out --%,$(MFLAGS))),) > quiet := silent_ > endif > > Could you quickly do the same test than me on make 4.0 and 4.2.1 to confirm ? Well, I did confirm this already with my earlier experimenting. IOW either this or the $(firstword -$(MAKEFLAGS)) they suggest (effectively matching my earlier suggestion, prepending '.' instead of '-', as really any char other than 's' or a whitespace one will do here). Personally I'm slightly in favor of the MFLAGS variant. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0TXnHAKL8bwM+NkWJnpBlTN5Xoadz80hZ1CtGz9lOJzMYuOQTbFIkzWTRMYHtMvTSrnA5ED9qOMlZIqmSBEYU5KK3KfzK23widin7gXAFkFbsFNaLFIY2vLnlu547zVl42snED9LgTZBScP64c+CRxoJynOqnRr61vy4VsZAXtj01hf/PdfMaiB7zGRQ2l9lKy0iEQBzkaMTE8/L/aav5HDk4MMJWXLS5Bfb/p2OTiMV79B+XIyqJ1jy0Wiuh8b05dhYL0+z/GAf+GwuOspCeLyyj2VPpHLV6om1s/sN9A14AIfQHi1c/ACfCa2VQSDn1Mdt54Swz/j6lN8PW0RBVfBUsCz6S21id9Lnp8/y51gH9WpQXlhIuw9RZOAU6kohM3eZhIcDdGmtUU1sgWsFlWIpbxdeu4Z7mll4hMA1OSH2Hq1XJCi6hU1wu1LOGFOo X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 09:10:28.5367 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b44dbae-6a9a-4970-9054-08de64966807 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001AF.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MRWPR08MB11826 Hi Jan, > On 5 Feb 2026, at 09:56, Jan Beulich wrote: >=20 > On 05.02.2026 09:44, Bertrand Marquis wrote: >> Hi Jan, >>=20 >>> On 5 Feb 2026, at 09:23, Jan Beulich wrote: >>>=20 >>> On 05.02.2026 08:44, Bertrand Marquis wrote: >>>>> On 4 Feb 2026, at 17:15, Jan Beulich wrote: >>>>> On 04.02.2026 16:45, Bertrand Marquis wrote: >>>>>>> On 4 Feb 2026, at 16:31, Jan Beulich wrote: >>>>>>> On 04.02.2026 14:16, Bertrand Marquis wrote: >>>>>>>> Xen does not currently document how to build the hypervisor on mac= OS, and >>>>>>>> there is no Darwin configuration for a Homebrew-based toolchain. I= n >>>>>>>> addition, the Makefile silent-mode detection can be tripped by -I = paths >>>>>>>> that contain an "s", which hides build commands unexpectedly. >>>>>>>=20 >>>>>>> This wants submitting as a standalone fix, so it can be backported.= But see >>>>>>> also below. I don't, however, understand how -I could be useful her= e - our >>>>>>> build system is self-contained, so any include directives used shou= ld be >>>>>>> satisfiable without any -I. >>>>>>=20 >>>>>> This is added automatically inside our Makefile if you build out of = tree: >>>>>>=20 >>>>>> MAKEFLAGS +=3D --include-dir=3D$(abs_srctree) >>>>>>=20 >>>>>> which ends up being -Ixxx when tested. >>>>>=20 >>>>> Hmm, but I do have an 's' in my source path, yet I need to explicitly= pass >>>>> -s for the build to be silent. >>>>=20 >>>> I did further investigations and my previous assumptions where actuall= y >>>> wrong because i looked tat MAKEFLAGS value once the whole Makefile >>>> was parsed and the include-dir flag is added after so it was not the r= eason >>>> of the issue. >>>>=20 >>>> In fact the issue is coming from variables set on the command line (an= d >>>> in my case O=3D with a path containing a s). >>>> So you can easily reproduce the issue by just passing XX=3Ds to the ma= ke >>>> command line to do a test. >>>>=20 >>>> As a consequence, your proposed solution filtering -% is not working a= nd >>>> the only reliable solution is to actually use firstword to actually ge= t the >>>> short options list. This is making an assumption on MAKEFLAGS having >>>> them first but my tests are showing that it is always the case. >>>> I would propose to put a comment to explain the assumptions on which >>>> the filtering is based on top: >>>>=20 >>>> Something like this: >>>> diff --git a/xen/Makefile b/xen/Makefile >>>> index 13e336ba5484..a7924fcb7af5 100644 >>>> --- a/xen/Makefile >>>> +++ b/xen/Makefile >>>> @@ -113,10 +113,10 @@ else >>>> Q :=3D @ >>>> endif >>>>=20 >>>> -# If the user is running make -s (silent mode), suppress echoing of >>>> -# commands >>>> - >>>> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >>>> +# If the user is running make -s (silent mode), suppress echoing of c= ommands. >>>> +# This relies on GNU make encoding short options in the first MAKEFLA= GS word; >>>> +# if this changes in the future, this check may need revisiting. >>>> +ifneq ($(findstring s,$(firstword $(MAKEFLAGS))),) >>>> quiet :=3D silent_ >>>> endif >>>>=20 >>>> Also i can put a fixes tag if you think that is useful: >>>> Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_r= ule") >>>>=20 >>>> Please tell me if that sounds ok for you and I will resubmit this as 2= different patches >>>> instead of a single one. >>>=20 >>> Sadly no, see my other reply sent earlier today. Furthermore, as said t= here, even >>=20 >> Sorry missed you reply when i wrote mine. >>=20 >>> with O=3D I can't repro what you say. In fact with a Makefile containin= g just >>=20 >> interesting >>=20 >>>=20 >>> $(warning MAKEFLAGS=3D"$(MAKEFLAGS)" ABC=3D"$(ABC)" XYZ=3D"$(XYZ)") >>>=20 >>> all: >>> @echo 'MFLAGS=3D$(MFLAGS)' >>> @echo 'MAKEFLAGS=3D$(MAKEFLAGS)' >>>=20 >>> I can observe (with both make 4.0 and make 4.2.1) $(MAKEFLAGS) expandin= g >>> differently depending on where it's used (I'm passing ABC=3D and/or XYZ= =3D to >>> experiment): Only the use in the rule has the variables. What version o= f make are >>> you using? >>=20 >> I am using make 4.4.1 on both my Linux and brew based builds which might= explain >> why i always see the same. >>=20 >> I have an other linux system where i have make 4.3 and in this one, MAKE= FLAGS does >> not contain O=3D options when the test is done so the issue is not appea= ring there: >>=20 >> adding: >> @@ -116,6 +116,7 @@ endif >> # If the user is running make -s (silent mode), suppress echoing of >> # commands >>=20 >> +$(info MAKEFLAGS=3D$(MAKEFLAGS)) >> +$(info MFLAGS=3D$(MFLAGS)) >> ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >> quiet :=3D silent_ >> endif >>=20 >> ## On linux with make 4.3 i see: >> MAKEFLAGS=3D-rR >> MFLAGS=3D >> and the build is not silent >>=20 >> with -s: >> MAKEFLAGS=3Ds -rR >> MFLAGS=3D-s >>=20 >> with --warn-undefined-variables >> MAKEFLAGS=3D --warn-undefined-variables -rR >> MFLAGS=3D--warn-undefined-variables >>=20 >> ## but on linux with 4.4.1 i see (same with brew make 4.4.4: >> MAKEFLAGS=3DrR -- XEN_TARGET_ARCH=3Darm64 O=3Dbuilddir-s-test >> MFLAGS=3D-rR >> and the build is silent >>=20 >> with -s: >> MAKEFLAGS=3DrRs -- XEN_TARGET_ARCH=3Darm64 O=3D/home/bermar01/Work/xen/x= en/builddir >> MFLAGS=3D-rRs >>=20 >> with --warn-undefined-variables >> MAKEFLAGS=3DrR --warn-undefined-variables -- XEN_TARGET_ARCH=3Darm64 O= =3D/home/bermar01/Work/xen/xen/builddir >> MFLAGS=3D-rR --warn-undefined-variables >=20 > Ah yes, and here is a quote from make 4.4's NEWS: >=20 > "* WARNING: Backward-incompatibility! > Previously only simple (one-letter) options were added to the MAKEFLAGS > variable that was visible while parsing makefiles. Now, all options ar= e > available in MAKEFLAGS. If you want to check MAKEFLAGS for a one-lette= r > option, expanding "$(firstword -$(MAKEFLAGS))" is a reliable way to ret= urn > the set of one-letter options which can be examined via findstring, etc= ." Nice >=20 >> So i think the working solution would be to keep the current test but do= it on MFLAGS instead of MAKEFLAGS: >>=20 >> ifneq ($(findstring s,$(filter-out --%,$(MFLAGS))),) >> quiet :=3D silent_ >> endif >>=20 >> Could you quickly do the same test than me on make 4.0 and 4.2.1 to conf= irm ? >=20 > Well, I did confirm this already with my earlier experimenting. IOW eithe= r > this or the $(firstword -$(MAKEFLAGS)) they suggest (effectively matching= my > earlier suggestion, prepending '.' instead of '-', as really any char oth= er > than 's' or a whitespace one will do here). Personally I'm slightly in fa= vor > of the MFLAGS variant. Agree, i will use MFLAGS as this looks more reliable. Thanks i will submit this and the mac os build thing as independent patches= . Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Thu Feb 05 09:41:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 09:41:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221690.1529861 (Exim 4.92) (envelope-from ) id 1vnvqr-0006Vl-Nm; Thu, 05 Feb 2026 09:40:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221690.1529861; Thu, 05 Feb 2026 09:40:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvqr-0006Ve-L7; Thu, 05 Feb 2026 09:40:41 +0000 Received: by outflank-mailman (input) for mailman id 1221690; Thu, 05 Feb 2026 09:40:40 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnvqq-0006VY-NI for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 09:40:40 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bac970dd-0276-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 10:40:39 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4806f80cac9so4089525e9.1 for ; Thu, 05 Feb 2026 01:40:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 01:40:38 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 10:40:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/4] xen/mm: limit non-scrubbed allocations to a specific order To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260130145726.85907-1-roger.pau@citrix.com> <20260130145726.85907-5-roger.pau@citrix.com> <2c2b6189-9404-4378-a101-3a93cbadee43@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04.02.2026 17:08, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 04:00:09PM +0100, Jan Beulich wrote: >> On 30.01.2026 15:57, Roger Pau Monne wrote: >>> @@ -1117,6 +1130,14 @@ static struct page_info *alloc_heap_pages( >>> scrub_one_page(&pg[i], cold); >>> >>> dirty_cnt++; >>> + >>> + /* >>> + * Use SYS_STATE_smp_boot explicitly; ahead of that state >>> + * interrupts are disabled. >>> + */ >>> + if ( system_state == SYS_STATE_smp_boot && >>> + !(dirty_cnt & 0xff) ) >>> + process_pending_softirqs(); >>> } >>> else >>> check_one_page(&pg[i]); >> >> Coming back to this, I see two possible issues. One is that on x86 enabling >> of IRQs happens a bit earlier than setting of SYS_STATE_smp_boot. Maybe this >> isn't really a problem right now, but it could become one if the "wrong" >> thing is inserted into that window in __start_xen(). > > Even if IRQs are enabled a bit earlier, the watchdog is only setup > after SYS_STATE_smp_boot state is set. Hmm, yes. Adjustments like this, otoh, shouldn't primarily be to silence the watchdog, but to address overly long delays that might trigger it. I.e. they might (generally: would) be as relevant without the watchdog actually being active. >> The other is that only x86 actually ever sets that state. > > TBH we have never seen the watchdog triggering during initial domain > creation, so the workaround added here was out of caution. There's a > certain amount of contention required for the watchdog to trigger, and > that scenario doesn't happen during boot, as domain creation is > serialized. It is right now, but really both dom0less and hyperlaunch could benefit from parallelization. > I could maybe gate the softirq processing as: > > if ( system_state < SYS_STATE_active && local_irq_enabled() && > !(dirty_cnt & 0xff) ) > process_pending_softirqs(); Yes please. > Or completely avoid softirq processing in alloc_heap_pages(). Rather not, imo. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 05 10:32:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 10:32:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221721.1529871 (Exim 4.92) (envelope-from ) id 1vnweb-0004V6-Bg; Thu, 05 Feb 2026 10:32:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221721.1529871; Thu, 05 Feb 2026 10:32:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnweb-0004Uz-8h; Thu, 05 Feb 2026 10:32:05 +0000 Received: by outflank-mailman (input) for mailman id 1221721; Thu, 05 Feb 2026 10:32:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnweZ-0004UW-Ex for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 10:32:03 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e8be03ab-027d-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 11:32:02 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4805ef35864so6676805e9.0 for ; Thu, 05 Feb 2026 02:32:02 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Hence, to prevent speculative execution causing one >> + * guest’s VS-stage translations to be cached under another guest’s >> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >> + * finally write the new vsatp value. >> + */ >> + p->arch.vsatp = csr_read(CSR_VSATP); >> + csr_write(CSR_VSATP, 0); > Why two CSR accesses when one will do? RISC-V specifically has the CSRRW insn. csr_swap() could really be used here instead, thanks. > >> + /* >> + * No need for VS-stage TLB flush here: >> + * Changing satp.MODE from Bare to other modes and vice versa also >> + * takes effect immediately, without the need to execute an >> + * SFENCE.VMA instruction. >> + * Note that VSATP is just VS-mode’s version of SATP, so the mentioned >> + * above should be true for VSATP. >> + */ >> + >> + /* >> + * Nothing to do with HGATP as it is constructed each time when >> + * p2m_ctx_switch_to() is called. >> + */ >> +} >> + >> +void p2m_ctx_switch_to(struct vcpu *n) >> +{ >> + struct vcpu_vmid *p_vmid = &n->arch.vmid; >> + uint16_t old_vmid, new_vmid; >> + bool need_flush; >> + >> + if ( is_idle_vcpu(n) ) >> + return; > Shouldn't the other function have such a check, too? Yes, it should. I will add the check. > >> + old_vmid = p_vmid->vmid; >> + need_flush = vmid_handle_vmenter(p_vmid); > As you're re-using x86'es model, I'm not quite sure why this would be needed. > I don't think we have such in x86; aiui this should be handled while actually > doing the VM entry. I can move this to the end of do_trap(). However, isn’t this effectively the same? If a context switch to vCPU n happens, it means that once the trap is fully handled, we will enter vCPU n. The same will be if to put the changes at the end of do_trap() before control will be given to VM. > >> + new_vmid = p_vmid->vmid; >> + >> +#ifdef P2M_DEBUG >> + printk(XENLOG_INFO, "%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", >> + n, old_vmid, new_vmid, need_flush); >> +#endif >> + >> + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), >> + new_vmid)); >> + >> + if ( unlikely(need_flush) ) >> + local_hfence_gvma_all(); >> + >> + /* >> + * According to the RISC-V specification, speculation can happen >> + * during an update of hgatp and vsatp: >> + * No mechanism is provided to atomically change vsatp and hgatp >> + * together. Hence, to prevent speculative execution causing one >> + * guest’s VS-stage translations to be cached under another guest’s >> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >> + * finally write the new vsatp value. Similarly, if henvcfg.PBMTE >> + * need be world-switched, it should be switched after zeroing vsatp >> + * but before writing the new vsatp value, obviating the need to >> + * execute an HFENCE.VVMA instruction. >> + * So just flush TLBs for VS-Stage and G-stage after both of regs are >> + * touched. >> + */ >> + flush_tlb_guest_local(); > Which "both regs" does the comment talk about? Doesn't the flush want to come > ... > >> + /* >> + * The vsatp register is a VSXLEN-bit read/write register that is >> + * VS-mode’s version of supervisor register satp, so the following is >> + * true for VSATP registers: >> + * Changing satp.MODE from Bare to other modes and vice versa also takes >> + * effect immediately, without the need to execute an SFENCE.VMA >> + * instruction. Likewise, changes to satp.ASID take effect immediately. >> + * Considering the mentioned above and that VS-stage TLB flush has been >> + * already done there is no need to flush VS-stage TLB after an update >> + * of VSATP from Bare mode to what is written in `n->arch.vsatp`. >> + */ >> + csr_write(CSR_VSATP, n->arch.vsatp); > ... after this? Then some of the commentary also doesn't look to be necessary. I think there is no need for a guest TLB flush here or above (i.e. flush_tlb_guest_local()), because: - If CSR_VSATP is set to 0, or changed from 0 to a non-zero value, no speculation can occur. Therefore, the guest TLB cannot be polluted with unwanted entries, and no flush is required. - If need_flush is false, it means that no VMID wraparound has occurred. In that case, the VMID is still unique, so we are safe and no guest TLB flush is needed. Additionally, it seems that I do not need to introduce flush_tlb_guest_local() at all, since local_hfence_gvma_all() already provides the same functionality. Instead, it probably makes sense to introduce an HFENCE_VVMA() helper as a generic wrapper around the hfence.vvma instruction, and then reuse it inside local_hfence_gvma_all(). ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 05 11:33:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 11:33:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221768.1529906 (Exim 4.92) (envelope-from ) id 1vnxcF-0003fD-Vm; Thu, 05 Feb 2026 11:33:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221768.1529906; Thu, 05 Feb 2026 11:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcF-0003f6-S5; Thu, 05 Feb 2026 11:33:43 +0000 Received: by outflank-mailman (input) for mailman id 1221768; Thu, 05 Feb 2026 11:33:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcE-0003et-Cr for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 11:33:42 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 83fc179f-0286-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 12:33:39 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F322E339; Thu, 5 Feb 2026 03:33:31 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.248]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A11213F7D8; Thu, 5 Feb 2026 03:33:36 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 83fc179f-0286-11f1-b161-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1] xen: Use MFLAGS for silent-mode detection Date: Thu, 5 Feb 2026 12:33:12 +0100 Message-ID: <3ab39249c788fd0463e73df9464d482fefe8516b.1770290975.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GNU make 4.4+ exposes variable overrides in MAKEFLAGS after "--" (e.g. O=/path, FOO=bar). The silent-mode check searches for "s" and can match an override value, forcing silent output even without -s. Use MFLAGS for short options and filter out any long options before searching for "s". This preserves -s detection while avoiding false positives from overrides. Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") Signed-off-by: Bertrand Marquis --- xen/Makefile | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index 13e336ba5484..5fc725fb02db 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -113,10 +113,11 @@ else Q := @ endif -# If the user is running make -s (silent mode), suppress echoing of -# commands - -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) +# If the user is running make -s (silent mode), suppress echoing of commands. +# Use MFLAGS (short options only). MAKEFLAGS may include variable overrides +# after “--” (GNU make greater than 4.4), which can contain an “s” and falsely +# trigger silent mode. +ifneq ($(findstring s,$(filter-out --%,$(MFLAGS))),) quiet := silent_ endif -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 11:33:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 11:33:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221771.1529921 (Exim 4.92) (envelope-from ) id 1vnxcR-0003yL-8l; Thu, 05 Feb 2026 11:33:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221771.1529921; Thu, 05 Feb 2026 11:33:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcR-0003yE-4C; Thu, 05 Feb 2026 11:33:55 +0000 Received: by outflank-mailman (input) for mailman id 1221771; Thu, 05 Feb 2026 11:33:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcP-0003et-Kl for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 11:33:53 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8c466b48-0286-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 12:33:52 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-480706554beso8619235e9.1 for ; Thu, 05 Feb 2026 03:33:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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It isn't needed when we don't clear the flag. Furthermore, one side of the barrier being in common code, the other would better be, too. This way, all architectures are covered (beyond any specific needs they may have). Signed-off-by: Jan Beulich --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -333,17 +333,7 @@ void sync_local_execstate(void) void sync_vcpu_execstate(struct vcpu *v) { - /* - * We don't support lazy switching. - * - * However the context may have been saved from a remote pCPU so we - * need a barrier to ensure it is observed before continuing. - * - * Per vcpu_context_saved(), the context can be observed when - * v->is_running is false (the caller should check it before calling - * this function). - */ - smp_rmb(); + /* Nothing to do -- no lazy switching */ } #define NEXT_ARG(fmt, args) \ --- a/xen/common/sched/core.c +++ b/xen/common/sched/core.c @@ -956,6 +956,9 @@ void vcpu_sleep_sync(struct vcpu *v) while ( !vcpu_runnable(v) && v->is_running ) cpu_relax(); + /* Sync state /after/ observing the running flag clear. */ + smp_rmb(); + sync_vcpu_execstate(v); } @@ -2308,11 +2311,13 @@ static struct sched_unit *do_schedule(st static void vcpu_context_saved(struct vcpu *vprev, struct vcpu *vnext) { - /* Clear running flag /after/ writing context to memory. */ - smp_wmb(); - if ( vprev != vnext ) + { + /* Clear running flag /after/ writing context to memory. */ + smp_wmb(); + vprev->is_running = false; + } } static void unit_context_saved(struct sched_resource *sr) From xen-devel-bounces@lists.xenproject.org Thu Feb 05 11:34:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 11:34:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221775.1529929 (Exim 4.92) (envelope-from ) id 1vnxcd-0004MZ-Gt; Thu, 05 Feb 2026 11:34:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221775.1529929; Thu, 05 Feb 2026 11:34:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcd-0004MP-EO; Thu, 05 Feb 2026 11:34:07 +0000 Received: by outflank-mailman (input) for mailman id 1221775; Thu, 05 Feb 2026 11:34:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxcb-0003et-TY for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 11:34:05 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 938d62e2-0286-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 12:34:05 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1C3A1339; Thu, 5 Feb 2026 03:33:58 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.248]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B2E3A3F778; Thu, 5 Feb 2026 03:34:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 938d62e2-0286-11f1-b161-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2] xen: Add macOS hypervisor build configuration Date: Thu, 5 Feb 2026 12:33:54 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen does not currently document how to build the hypervisor on macOS, and there is no Darwin configuration for selecting a Homebrew-based GNU toolchain. Native builds are not supported; the hypervisor must be cross-built with a GNU toolchain and GNU make/sed. Add a minimal Darwin.mk which selects the GNU tool definitions used by the macOS workflow and point to the build guide for required tools and setup. Document the Homebrew cross toolchain and GNU tools needed to build the hypervisor on macOS. Signed-off-by: Bertrand Marquis --- config/Darwin.mk | 6 ++++ docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) create mode 100644 config/Darwin.mk create mode 100644 docs/misc/build-on-macos.md diff --git a/config/Darwin.mk b/config/Darwin.mk new file mode 100644 index 000000000000..a4e3efa81842 --- /dev/null +++ b/config/Darwin.mk @@ -0,0 +1,6 @@ +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU tools. +# See docs/misc/build-on-macos.md for required tools and setup. +include $(XEN_ROOT)/config/StdGNU.mk + +# We are always cross compiling so fake COMPILE_ARCH +XEN_COMPILE_ARCH = Darwin diff --git a/docs/misc/build-on-macos.md b/docs/misc/build-on-macos.md new file mode 100644 index 000000000000..6b56cd8eccab --- /dev/null +++ b/docs/misc/build-on-macos.md @@ -0,0 +1,66 @@ +# Building Xen Hypervisor on macOS + +This guide explains how to cross-compile the Xen hypervisor (xen +subdirectory only) on macOS. This does **not** build the tools. + +## Prerequisites + +Install the following packages using Homebrew: + +```bash +# Cross-compilation toolchain for ARM64 +brew install aarch64-elf-gcc + +# GNU tools (required for compatibility) +brew install make gnu-sed +``` + +Homebrew installs under `/opt/homebrew` on Apple Silicon and `/usr/local` on +Intel Macs. Adjust paths below accordingly. + +### Verification + +Verify your installation: + +```bash +# Check cross compiler +aarch64-elf-gcc --version + +# Check GNU make (adjust prefix if needed) +/opt/homebrew/opt/make/libexec/gnubin/make --version + +# Check GNU sed (adjust prefix if needed) +/opt/homebrew/opt/gnu-sed/libexec/gnubin/sed --version +``` + +## Building the Hypervisor + +Set up GNU tools in PATH and build: + +```bash +# Set up GNU tools in PATH (adjust prefix if needed) +export PATH="/opt/homebrew/opt/gnu-sed/libexec/gnubin:/opt/homebrew/opt/make/libexec/gnubin:$PATH" + +# Build Xen hypervisor only (in-tree) +cd xen/ +make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc + +# Optional: out-of-tree build directory +# make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc O=$PWD/build-mac +``` + +## Architecture Support + +Currently supported architectures: + +- **ARM64** (`arm64`) - Default, uses `aarch64-elf-gcc` + +Other targets may work if the corresponding cross toolchain is installed, +but this guide has only been tested on ARM64. + +## Limitations + +- **Hypervisor only**: This only builds the Xen hypervisor, not the tools +- **Cross-compilation only**: Native builds are not supported +- **macOS-specific**: Instructions optimized for macOS with Homebrew +- **GNU tools required**: Native BSD tools are not compatible -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 11:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 11:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221815.1529940 (Exim 4.92) (envelope-from ) id 1vnxnp-0006U3-HK; Thu, 05 Feb 2026 11:45:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221815.1529940; Thu, 05 Feb 2026 11:45:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxnp-0006Tw-EX; Thu, 05 Feb 2026 11:45:41 +0000 Received: by outflank-mailman (input) for mailman id 1221815; Thu, 05 Feb 2026 11:45:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnxnn-0006Tq-NS for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 11:45:39 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 300f4da9-0288-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 12:45:37 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4806f80cac9so5171675e9.1 for ; Thu, 05 Feb 2026 03:45:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 03:45:36 -0800 (PST) Message-ID: <1a0c5e48-5457-414e-89c8-0f12cfa55a96@suse.com> Date: Thu, 5 Feb 2026 12:45:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen: Use MFLAGS for silent-mode detection To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3ab39249c788fd0463e73df9464d482fefe8516b.1770290975.git.bertrand.marquis@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3ab39249c788fd0463e73df9464d482fefe8516b.1770290975.git.bertrand.marquis@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.02.2026 12:33, Bertrand Marquis wrote: > GNU make 4.4+ exposes variable overrides in MAKEFLAGS after "--" (e.g. > O=/path, FOO=bar). The silent-mode check searches for "s" and can match > an override value, forcing silent output even without -s. > > Use MFLAGS for short options and filter out any long options before > searching for "s". This preserves -s detection while avoiding false > positives from overrides. > > Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") I don't think this is quite right: make 4.4 post-dates that commit by about 2.5 years. > > Signed-off-by: Bertrand Marquis Nit: No blank lines between tags, please. > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -113,10 +113,11 @@ else > Q := @ > endif > > -# If the user is running make -s (silent mode), suppress echoing of > -# commands > - > -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) > +# If the user is running make -s (silent mode), suppress echoing of commands. > +# Use MFLAGS (short options only). MAKEFLAGS may include variable overrides Why "short options only"? It looks you mean to describe the macro here, not what's done in the ifeq(); at the very least it can be read both ways. > +# after “--” (GNU make greater than 4.4), which can contain an “s” and falsely 4.4 and newer really, as 4.4 itself is included in the affected range. I'm not quite sure anyway whether the comment really needs to go this far. This kind of detail can be had from the commit message of this change, if needed. Happy to make adjustments while committing, yet I'm not sure whether you agree in all regards. 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Thu, 05 Feb 2026 03:46:50 -0800 (PST) Message-ID: <9aee4ca8-d2ca-4792-8180-9818c669cf23@suse.com> Date: Thu, 5 Feb 2026 12:46:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] sched: move vCPU exec state barriers To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Dario Faggioli , George Dunlap References: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------1GnTZJUDpxpKDPvxzf6f9Dmp" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------1GnTZJUDpxpKDPvxzf6f9Dmp Content-Type: multipart/mixed; boundary="------------QPEXi87d0qBlSVnTXoNA9OMM"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Dario Faggioli , George Dunlap Message-ID: <9aee4ca8-d2ca-4792-8180-9818c669cf23@suse.com> Subject: Re: [PATCH] sched: move vCPU exec state barriers References: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> In-Reply-To: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------QPEXi87d0qBlSVnTXoNA9OMM Content-Type: multipart/mixed; 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On 64bit PV guests the > start_info field is 64bits wide. HVM guests don't use start_info at all. > > Drop the restriction in arch_domain_create() and instead free and > re-allocate the page from memory below 4G if needed in switch_compat(), > when the guest is set to run in 32bit PV mode. > > Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > Signed-off-by: Roger Pau Monné > Reviewed-by: Jan Beulich Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu Feb 05 12:21:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 12:21:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221870.1529979 (Exim 4.92) (envelope-from ) id 1vnyMW-00054w-Vc; Thu, 05 Feb 2026 12:21:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221870.1529979; Thu, 05 Feb 2026 12:21:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnyMW-00054p-Sl; Thu, 05 Feb 2026 12:21:32 +0000 Received: by outflank-mailman (input) for mailman id 1221870; Thu, 05 Feb 2026 12:21:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnyMU-00054j-RX for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 12:21:30 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 32e4e628-028d-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 13:21:29 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-47ee0291921so8524015e9.3 for ; Thu, 05 Feb 2026 04:21:29 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 04:21:28 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 13:21:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/3] xen/riscv: implement p2m_ctx_switch_{to,from}_state() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <2e4cd29f19945e90733ac85e023d53cecbe1d14d.1770036584.git.oleksii.kurochko@gmail.com> <0f0a7479-5f12-4803-9348-2c295a1939a4@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.02.2026 11:32, Oleksii Kurochko wrote: > On 2/4/26 4:02 PM, Jan Beulich wrote: >> On 02.02.2026 13:57, Oleksii Kurochko wrote: >>> +void p2m_ctx_switch_to(struct vcpu *n) >>> +{ >>> + struct vcpu_vmid *p_vmid = &n->arch.vmid; >>> + uint16_t old_vmid, new_vmid; >>> + bool need_flush; >>> + >>> + if ( is_idle_vcpu(n) ) >>> + return; >> Shouldn't the other function have such a check, too? > > Yes, it should. I will add the check. > >>> + old_vmid = p_vmid->vmid; >>> + need_flush = vmid_handle_vmenter(p_vmid); >> As you're re-using x86'es model, I'm not quite sure why this would be needed. >> I don't think we have such in x86; aiui this should be handled while actually >> doing the VM entry. > > I can move this to the end of do_trap(). > > However, isn’t this effectively the same? > If a context switch to vCPU n happens, it means that once the trap is fully handled, > we will enter vCPU n. > The same will be if to put the changes at the end of do_trap() before control > will be given to VM. Thing is - you will need it at the end of do_trap() (or wherever VM entry is going to be dealt with) anyway, to cover situation other than context switch as well. >>> + new_vmid = p_vmid->vmid; >>> + >>> +#ifdef P2M_DEBUG >>> + printk(XENLOG_INFO, "%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", >>> + n, old_vmid, new_vmid, need_flush); >>> +#endif >>> + >>> + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), >>> + new_vmid)); >>> + >>> + if ( unlikely(need_flush) ) >>> + local_hfence_gvma_all(); >>> + >>> + /* >>> + * According to the RISC-V specification, speculation can happen >>> + * during an update of hgatp and vsatp: >>> + * No mechanism is provided to atomically change vsatp and hgatp >>> + * together. Hence, to prevent speculative execution causing one >>> + * guest’s VS-stage translations to be cached under another guest’s >>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>> + * finally write the new vsatp value. Similarly, if henvcfg.PBMTE >>> + * need be world-switched, it should be switched after zeroing vsatp >>> + * but before writing the new vsatp value, obviating the need to >>> + * execute an HFENCE.VVMA instruction. >>> + * So just flush TLBs for VS-Stage and G-stage after both of regs are >>> + * touched. >>> + */ >>> + flush_tlb_guest_local(); >> Which "both regs" does the comment talk about? Doesn't the flush want to come >> ... >> >>> + /* >>> + * The vsatp register is a VSXLEN-bit read/write register that is >>> + * VS-mode’s version of supervisor register satp, so the following is >>> + * true for VSATP registers: >>> + * Changing satp.MODE from Bare to other modes and vice versa also takes >>> + * effect immediately, without the need to execute an SFENCE.VMA >>> + * instruction. Likewise, changes to satp.ASID take effect immediately. >>> + * Considering the mentioned above and that VS-stage TLB flush has been >>> + * already done there is no need to flush VS-stage TLB after an update >>> + * of VSATP from Bare mode to what is written in `n->arch.vsatp`. >>> + */ >>> + csr_write(CSR_VSATP, n->arch.vsatp); >> ... after this? Then some of the commentary also doesn't look to be necessary. > > I think there is no need for a guest TLB flush here or above > (i.e. flush_tlb_guest_local()), because: > - If CSR_VSATP is set to 0, or changed from 0 to a non-zero value, no speculation > can occur. Therefore, the guest TLB cannot be polluted with unwanted entries, > and no flush is required. > - If need_flush is false, it means that no VMID wraparound has occurred. > In that case, the VMID is still unique, so we are safe and no guest TLB flush is > needed. > > Additionally, it seems that I do not need to introduce flush_tlb_guest_local() at > all, since local_hfence_gvma_all() already provides the same functionality. > Instead, it probably makes sense to introduce an HFENCE_VVMA() helper as a generic > wrapper around the hfence.vvma instruction, and then reuse it inside > local_hfence_gvma_all(). Hmm, I fear I'm confused: hfence.gvma != hfence.vvma ? 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Thu, 05 Feb 2026 04:29:38 -0800 (PST) Message-ID: <7bf2ee2a-177f-4d7b-9dde-ee43bc4311b8@suse.com> Date: Thu, 5 Feb 2026 13:29:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 12:33, Bertrand Marquis wrote: > Xen does not currently document how to build the hypervisor on macOS, and > there is no Darwin configuration for selecting a Homebrew-based GNU > toolchain. Native builds are not supported; the hypervisor must be > cross-built with a GNU toolchain and GNU make/sed. > > Add a minimal Darwin.mk which selects the GNU tool definitions used by > the macOS workflow and point to the build guide for required tools and > setup. Document the Homebrew cross toolchain and GNU tools needed to > build the hypervisor on macOS. > > Signed-off-by: Bertrand Marquis > --- > config/Darwin.mk | 6 ++++ > docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 72 insertions(+) > create mode 100644 config/Darwin.mk > create mode 100644 docs/misc/build-on-macos.md I'm sorry, I should have paid attention already on the RFC, but: With all other Pandoc files in this directory being named *.pandoc, do we really want to have an outlier named *.md there? > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,6 @@ > +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU tools. > +# See docs/misc/build-on-macos.md for required tools and setup. > +include $(XEN_ROOT)/config/StdGNU.mk Given Roger's consideration towards possibly using a more MacOS-native build arrangement as an alternative, I'm actually not quite sure this should then be the default mode here. Roger, what are your thoughts? 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This affects all mapping spaces including XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain destruction. Add logic to remove the previously mapped page before creating the new mapping, matching the x86 implementation approach. Additionally, skip removal if the same MFN is being remapped. Signed-off-by: Michal Orzel --- I'm not sure where to point the Fixes tag to. --- xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6df8b616e464..b9f1a493dcd7 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( unsigned long idx, gfn_t gfn) { - mfn_t mfn = INVALID_MFN; + mfn_t mfn = INVALID_MFN, mfn_old; int rc; p2m_type_t t; struct page_info *page = NULL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); switch ( space ) { @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( return -ENOSYS; } + /* + * Remove previously mapped page if it was present, to avoid leaking + * memory. + */ + mfn_old = gfn_to_mfn(d, gfn); + + if ( mfn_valid(mfn_old) ) + { + if ( is_special_page(mfn_to_page(mfn_old)) ) + { + /* Just unmap, don't free */ + p2m_write_lock(p2m); + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, + p2m_invalid, p2m->default_access); + p2m_write_unlock(p2m); + if ( rc ) + return rc; + } + else if ( !mfn_eq(mfn, mfn_old) ) + { + /* Normal domain memory is freed, to avoid leaking memory */ + rc = guest_remove_page(d, gfn_x(gfn)); + if ( rc ) + return rc; + } + } + /* * Map at new location. Here we need to map xenheap RAM page differently * because we need to store the valid GFN and make sure that nothing was @@ -255,8 +283,6 @@ int xenmem_add_to_physmap_one( rc = guest_physmap_add_entry(d, gfn, mfn, 0, t); else { - struct p2m_domain *p2m = p2m_get_hostp2m(d); - p2m_write_lock(p2m); if ( gfn_eq(page_get_xenheap_gfn(mfn_to_page(mfn)), INVALID_GFN) ) { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 13:00:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 13:00:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221921.1530034 (Exim 4.92) (envelope-from ) id 1vnyxt-0003GS-Iq; Thu, 05 Feb 2026 13:00:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221921.1530034; Thu, 05 Feb 2026 13:00:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnyxt-0003GL-GD; Thu, 05 Feb 2026 13:00:09 +0000 Received: by outflank-mailman (input) for mailman id 1221921; Thu, 05 Feb 2026 13:00:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnyxr-0003GD-Fi for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 13:00:07 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 97cd3c88-0292-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 14:00:06 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4807068eacbso8253565e9.2 for ; Thu, 05 Feb 2026 05:00:06 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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I will add the check. >> >>>> + old_vmid = p_vmid->vmid; >>>> + need_flush = vmid_handle_vmenter(p_vmid); >>> As you're re-using x86'es model, I'm not quite sure why this would be needed. >>> I don't think we have such in x86; aiui this should be handled while actually >>> doing the VM entry. >> I can move this to the end of do_trap(). >> >> However, isn’t this effectively the same? >> If a context switch to vCPU n happens, it means that once the trap is fully handled, >> we will enter vCPU n. >> The same will be if to put the changes at the end of do_trap() before control >> will be given to VM. > Thing is - you will need it at the end of do_trap() (or wherever VM entry is > going to be dealt with) anyway, to cover situation other than context switch > as well. If there are such situation then it makes sense. > >>>> + new_vmid = p_vmid->vmid; >>>> + >>>> +#ifdef P2M_DEBUG >>>> + printk(XENLOG_INFO, "%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", >>>> + n, old_vmid, new_vmid, need_flush); >>>> +#endif >>>> + >>>> + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), >>>> + new_vmid)); >>>> + >>>> + if ( unlikely(need_flush) ) >>>> + local_hfence_gvma_all(); >>>> + >>>> + /* >>>> + * According to the RISC-V specification, speculation can happen >>>> + * during an update of hgatp and vsatp: >>>> + * No mechanism is provided to atomically change vsatp and hgatp >>>> + * together. Hence, to prevent speculative execution causing one >>>> + * guest’s VS-stage translations to be cached under another guest’s >>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>> + * finally write the new vsatp value. Similarly, if henvcfg.PBMTE >>>> + * need be world-switched, it should be switched after zeroing vsatp >>>> + * but before writing the new vsatp value, obviating the need to >>>> + * execute an HFENCE.VVMA instruction. >>>> + * So just flush TLBs for VS-Stage and G-stage after both of regs are >>>> + * touched. >>>> + */ >>>> + flush_tlb_guest_local(); >>> Which "both regs" does the comment talk about? Doesn't the flush want to come >>> ... >>> >>>> + /* >>>> + * The vsatp register is a VSXLEN-bit read/write register that is >>>> + * VS-mode’s version of supervisor register satp, so the following is >>>> + * true for VSATP registers: >>>> + * Changing satp.MODE from Bare to other modes and vice versa also takes >>>> + * effect immediately, without the need to execute an SFENCE.VMA >>>> + * instruction. Likewise, changes to satp.ASID take effect immediately. >>>> + * Considering the mentioned above and that VS-stage TLB flush has been >>>> + * already done there is no need to flush VS-stage TLB after an update >>>> + * of VSATP from Bare mode to what is written in `n->arch.vsatp`. >>>> + */ >>>> + csr_write(CSR_VSATP, n->arch.vsatp); >>> ... after this? Then some of the commentary also doesn't look to be necessary. >> I think there is no need for a guest TLB flush here or above >> (i.e. flush_tlb_guest_local()), because: >> - If CSR_VSATP is set to 0, or changed from 0 to a non-zero value, no speculation >> can occur. Therefore, the guest TLB cannot be polluted with unwanted entries, >> and no flush is required. >> - If need_flush is false, it means that no VMID wraparound has occurred. >> In that case, the VMID is still unique, so we are safe and no guest TLB flush is >> needed. >> >> Additionally, it seems that I do not need to introduce flush_tlb_guest_local() at >> all, since local_hfence_gvma_all() already provides the same functionality. >> Instead, it probably makes sense to introduce an HFENCE_VVMA() helper as a generic >> wrapper around the hfence.vvma instruction, and then reuse it inside >> local_hfence_gvma_all(). > Hmm, I fear I'm confused: hfence.gvma != hfence.vvma ? I overlooked that it Gvma in local_hfence_gvma_all(). Then it make sense for having both local_hfence_gvma_all() and flush_tlb_guest_local(). But it is still look like flush_tlb_guest_local() shouldn't be called in p2m context switch, because of what I mentioned in the first paragraph above what allow not to introduce flush_tlb_guest_local() now. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 05 13:23:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 13:23:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221941.1530044 (Exim 4.92) (envelope-from ) id 1vnzKU-0006CF-A0; Thu, 05 Feb 2026 13:23:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221941.1530044; Thu, 05 Feb 2026 13:23:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnzKU-0006C8-6U; Thu, 05 Feb 2026 13:23:30 +0000 Received: by outflank-mailman (input) for mailman id 1221941; Thu, 05 Feb 2026 13:23:29 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b=sw9yV+5YMAyIEUC+XOsunZ+N8S7VuLHgsefyqNtH4t+f49XKGpddBadN6txJKxEclsR5432W+CR2S6U+AZHkBADCNrFowCicBf6RjX1CItoWBHLiLNlq47mxkRW8mUhwuPeiIFaGt5XK/1dSysflDfE0FtDvbzN1pO6ey5o3Q4fCnjxUIkIKJ+BOJILcHXzAG3E0Ch0clcLyHiE+7SpLBEBKB4Ev/xaP9ncwZE6xUG/BvXK92HkjKBG5PstxASOZZ9e4ykC2bOkaoyn8EiA9wnCB/yKWnSknI3OFFj54eUmeGe/gCAOxodrzK8CmxAmUmIFTZSPL/Bee6M/EVW55KQ== From: Mykyta Poturai To: Bertrand Marquis CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Subject: Re: [PATCH v5 2/5] arm/irq: Migrate IRQs during CPU up/down operations Thread-Topic: [PATCH v5 2/5] arm/irq: Migrate IRQs during CPU up/down operations Thread-Index: AQHchGj73A4kTs3O/EWyR3N/eFmlXrVyue0AgAGCbQA= Date: Thu, 5 Feb 2026 13:23:18 +0000 Message-ID: <48a84d44-def9-4181-ac67-5aeb31ffb529@epam.com> References: <63892f56f227fae75d78e2ef2ee63887e74c523a.1768293759.git.mykyta_poturai@epam.com> <6080438F-DB60-4A50-8264-1CD04761B196@arm.com> In-Reply-To: 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Thu, 05 Feb 2026 05:49:11 -0800 (PST) Message-ID: <828feb7a-2a5b-4306-8da9-162df9ecfee3@suse.com> Date: Thu, 5 Feb 2026 14:49:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Fix memory leak in xenmem_add_to_physmap_one To: Michal Orzel Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Xenia Ragiadakou , xen-devel@lists.xenproject.org References: <20260205125820.116555-1-michal.orzel@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205125820.116555-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 13:58, Michal Orzel wrote: > When a guest maps pages via XENMEM_add_to_physmap to a GFN that already > has an existing mapping, the old page at that GFN was not being removed, > causing a memory leak. This affects all mapping spaces including > XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and > XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain > destruction. > > Add logic to remove the previously mapped page before creating the new > mapping, matching the x86 implementation approach. > > Additionally, skip removal if the same MFN is being remapped. > > Signed-off-by: Michal Orzel > --- > I'm not sure where to point the Fixes tag to. > --- > xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- > 1 file changed, 29 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index 6df8b616e464..b9f1a493dcd7 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( > unsigned long idx, > gfn_t gfn) > { > - mfn_t mfn = INVALID_MFN; > + mfn_t mfn = INVALID_MFN, mfn_old; > int rc; > p2m_type_t t; > struct page_info *page = NULL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > > switch ( space ) > { > @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( > return -ENOSYS; > } > > + /* > + * Remove previously mapped page if it was present, to avoid leaking > + * memory. > + */ > + mfn_old = gfn_to_mfn(d, gfn); > + > + if ( mfn_valid(mfn_old) ) > + { > + if ( is_special_page(mfn_to_page(mfn_old)) ) > + { > + /* Just unmap, don't free */ > + p2m_write_lock(p2m); > + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, > + p2m_invalid, p2m->default_access); > + p2m_write_unlock(p2m); > + if ( rc ) > + return rc; > + } > + else if ( !mfn_eq(mfn, mfn_old) ) > + { > + /* Normal domain memory is freed, to avoid leaking memory */ > + rc = guest_remove_page(d, gfn_x(gfn)); > + if ( rc ) > + return rc; > + } > + } This new code and what follows below it are not inside a single locked region, hence the cleanup done above may well have been "undone" again by the time the P2M lock is acquired below. That locking may not be apparent in the x86 variant when merely looking at functions used. There's a large comment, though, explaining how we actually (ab)use the simplified locking model (compared to what was once intended, but never carried out). Further, doesn't P2M entry type influence what needs doing here, including possibly rejecting the request? x86 refuses to replace p2m_mmio_direct entries by this means, but seeing that Arm has XENMAPSPACE_dev_mmio, this case may need handling, but the handling may need to be different from what you do above. (Just to mention: Presumably on Arm it's no different from x86: An MMIO page may or may not pass an mfn_valid() check.) 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=?utf-8?B?bklWNUh4VjVTVSszUHN2blo0YjlFbkFMdjNjMXJnZEdXNXlrT1pZSFJHb3lL?= =?utf-8?B?dVRzUFpxTGpreGc1ck0ybzJBbW52a0s0dFZPenBPbUxXdkFIcTFzYXVjUmt6?= =?utf-8?B?bmFpMit1Mm9wUTBhQ01UU0J2ZTdkbGhIZDhSdXFnbmRkc1R6ejVqQT09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 267c0a47-25f6-42a6-6c57-08de64c00b8c X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 14:08:32.5964 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Z5of4crkI9ht8DpVNYIat8H7NHNTTGURYl9O8BmaGdSdShL76eOOJWloMK0O/Fo6VsTCkZ12amzs/jd1+TrHbA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS1PR03MB7823 On Thu, Feb 05, 2026 at 09:29:53AM +0100, Jan Beulich wrote: > On 04.02.2026 17:46, Roger Pau Monné wrote: > > On Wed, Feb 04, 2026 at 04:08:21PM +0100, Jan Beulich wrote: > >> On 04.02.2026 15:52, Roger Pau Monné wrote: > >>> On Wed, Feb 04, 2026 at 03:06:52PM +0100, Jan Beulich wrote: > >>>> On 04.02.2026 13:25, Roger Pau Monne wrote: > >>>>> The limitation of shared_info being allocated below 4G to fit in the > >>>>> start_info field only applies to 32bit PV guests. On 64bit PV guests the > >>>>> start_info field is 64bits wide. HVM guests don't use start_info at all. > >>>>> > >>>>> Drop the restriction in arch_domain_create() and instead free and > >>>>> re-allocate the page from memory below 4G if needed in switch_compat(), > >>>>> when the guest is set to run in 32bit PV mode. > >>>>> > >>>>> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") > >>>> > >>>> The tag is here because there is the (largely theoretical?) possibility for > >>>> a system to have no memory at all left below 4Gb, in which case creation of > >>>> a PV64 or non-shadow HVM guest would needlessly fail? > >>> > >>> It's kid of an issue we discovered when using strict domain NUMA node > >>> placement. At that point the toolstack would exhaust all memory on > >>> node 0 and by doing that inadvertently consume all memory below 4G. > >> > >> Right, and hence also my "memory: arrange to conserve on DMA reservation", > >> where I'm still fighting with myself as to what to do with the comments you > >> gave there. > > > > Better fighting with yourself rather than fighting with me I guess ;). > > > > That change would be controversial with what we currently do on > > XenServer, because we don't (yet) special case the memory below 4G to > > not account for it in the per node free amount of memory. > > > > What would happen when you append the MEMF_no_dma flag as proposed in > > your commit, but the caller is also passing MEMF_exact_node with > > target node 0? AFAICT the allocation would still refuse to use the > > low 4G pool. > > Yes, DMA-ability is intended to take higher priority than exact-node > requests. Another node would then need choosing by the toolstack. > > > Also, your commit should also be expanded to avoid staking claims that > > would drain the DMA pool, as then populate_physmap() won't be able to > > allocate from there? > > Except that upstream claims aren't node-specific, yet, so could be > fulfilled my taking memory from other nodes? That's likely to change at some point, but yes, they are not node specific yet. > Aiui the problem would > only occur if that DAM-able memory was the only memory left in the > system. Indeed, in that scenario toolstack will be allowed to make claims that cover that DMA memory, yet populate physmap won't be able to consume those claims. I think there are two item that need to be done for us to append MEMF_no_dma to populate physmap allocations: * DMA memory is not reachable by claims. * DMA memory must be reported to the toolstack, so it can account for it separately from free memory. Last point could also be solved by subtracting the DMA memory from the `free_pages` value returned to the toolstack. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Thu Feb 05 14:12:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 14:12:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1221984.1530093 (Exim 4.92) (envelope-from ) id 1vo05t-0006BM-Jk; Thu, 05 Feb 2026 14:12:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1221984.1530093; Thu, 05 Feb 2026 14:12:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo05t-0006BE-Gj; Thu, 05 Feb 2026 14:12:29 +0000 Received: by outflank-mailman (input) for mailman id 1221984; Thu, 05 Feb 2026 13:56:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vnzqo-0002Lg-5i for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 13:56:54 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 838e417b-029a-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 14:56:48 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 45BCC4290347; Thu, 5 Feb 2026 08:56:37 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 838e417b-029a-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Christian Lindig , David Scott , Anthony PERARD Subject: [PATCH] Xenctrl.domain_setmaxmem: fix 32-bit truncation bug Date: Thu, 5 Feb 2026 13:56:45 +0000 Message-ID: <7f0c73c140b53cf0777437b46d0a0fda496b48b8.1770299489.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Observed when attempting to boot a >4TiB VM: After a call to domain_setmaxmem with 6370254848 (KiB), the domain's maxmem got set to 2075287552, which is exactly 2^32 smaller. xc_domain_setmaxmem takes an uint64_t as a parameter, and the OCaml value is 64-bit already, so fix the C variable to match the type and avoid the truncation. Signed-off-by: Edwin Török --- tools/ocaml/libs/xc/xenctrl_stubs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c index ac2a7537d6..c55f73b265 100644 --- a/tools/ocaml/libs/xc/xenctrl_stubs.c +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c @@ -947,7 +947,7 @@ CAMLprim value stub_xc_domain_setmaxmem(value xch_val, value domid, int retval; uint32_t c_domid = Int_val(domid); - unsigned int c_max_memkb = Int64_val(max_memkb); + uint64_t c_max_memkb = Int64_val(max_memkb); caml_enter_blocking_section(); retval = xc_domain_setmaxmem(xch, c_domid, c_max_memkb); caml_leave_blocking_section(); -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 14:12:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 14:12:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222037.1530105 (Exim 4.92) (envelope-from ) id 1vo06H-0006e5-Sz; Thu, 05 Feb 2026 14:12:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222037.1530105; Thu, 05 Feb 2026 14:12:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo06H-0006dt-Nb; Thu, 05 Feb 2026 14:12:53 +0000 Received: by outflank-mailman (input) for mailman id 1222037; Thu, 05 Feb 2026 14:12:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo06G-0006QL-Is for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 14:12:52 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c1921347-029c-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 15:12:51 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-43622089851so670904f8f.3 for ; Thu, 05 Feb 2026 06:12:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 06:12:50 -0800 (PST) Message-ID: <9274f071-88ec-4b95-b9b9-034920540505@suse.com> Date: Thu, 5 Feb 2026 15:12:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domain: adjust limitation on shared_info allocation below 4G To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260204122553.75711-1-roger.pau@citrix.com> <82540f88-ffcd-46a9-9813-ebe42ef0b0ec@suse.com> <3f9b4337-3e0a-4693-b97f-46505bc1349a@suse.com> <5bd55bef-f30c-475d-9831-382406f699fb@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.02.2026 15:08, Roger Pau Monné wrote: > On Thu, Feb 05, 2026 at 09:29:53AM +0100, Jan Beulich wrote: >> On 04.02.2026 17:46, Roger Pau Monné wrote: >>> On Wed, Feb 04, 2026 at 04:08:21PM +0100, Jan Beulich wrote: >>>> On 04.02.2026 15:52, Roger Pau Monné wrote: >>>>> On Wed, Feb 04, 2026 at 03:06:52PM +0100, Jan Beulich wrote: >>>>>> On 04.02.2026 13:25, Roger Pau Monne wrote: >>>>>>> The limitation of shared_info being allocated below 4G to fit in the >>>>>>> start_info field only applies to 32bit PV guests. On 64bit PV guests the >>>>>>> start_info field is 64bits wide. HVM guests don't use start_info at all. >>>>>>> >>>>>>> Drop the restriction in arch_domain_create() and instead free and >>>>>>> re-allocate the page from memory below 4G if needed in switch_compat(), >>>>>>> when the guest is set to run in 32bit PV mode. >>>>>>> >>>>>>> Fixes: 3cadc0469d5c ("x86_64: shared_info must be allocated below 4GB as it is advertised to 32-bit guests via a 32-bit machine address field in start_info.") >>>>>> >>>>>> The tag is here because there is the (largely theoretical?) possibility for >>>>>> a system to have no memory at all left below 4Gb, in which case creation of >>>>>> a PV64 or non-shadow HVM guest would needlessly fail? >>>>> >>>>> It's kid of an issue we discovered when using strict domain NUMA node >>>>> placement. At that point the toolstack would exhaust all memory on >>>>> node 0 and by doing that inadvertently consume all memory below 4G. >>>> >>>> Right, and hence also my "memory: arrange to conserve on DMA reservation", >>>> where I'm still fighting with myself as to what to do with the comments you >>>> gave there. >>> >>> Better fighting with yourself rather than fighting with me I guess ;). >>> >>> That change would be controversial with what we currently do on >>> XenServer, because we don't (yet) special case the memory below 4G to >>> not account for it in the per node free amount of memory. >>> >>> What would happen when you append the MEMF_no_dma flag as proposed in >>> your commit, but the caller is also passing MEMF_exact_node with >>> target node 0? AFAICT the allocation would still refuse to use the >>> low 4G pool. >> >> Yes, DMA-ability is intended to take higher priority than exact-node >> requests. Another node would then need choosing by the toolstack. >> >>> Also, your commit should also be expanded to avoid staking claims that >>> would drain the DMA pool, as then populate_physmap() won't be able to >>> allocate from there? >> >> Except that upstream claims aren't node-specific, yet, so could be >> fulfilled my taking memory from other nodes? > > That's likely to change at some point, but yes, they are not node > specific yet. > >> Aiui the problem would >> only occur if that DAM-able memory was the only memory left in the >> system. > > Indeed, in that scenario toolstack will be allowed to make claims that > cover that DMA memory, yet populate physmap won't be able to consume > those claims. It would be (following said patch of mine), but only in order-0 chunks. Which would make ... > I think there are two item that need to be done for us to append > MEMF_no_dma to populate physmap allocations: > > * DMA memory is not reachable by claims. > * DMA memory must be reported to the toolstack, so it can account for > it separately from free memory. > > Last point could also be solved by subtracting the DMA memory from the > `free_pages` value returned to the toolstack. ... any of this more difficult. We don't want to completely prevent its use, we only want to (heuristically) limit it. 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The usage of | alternations is not part of basic regexp support. Signed-off-by: Roger Pau Monné --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index 13e336ba5484..31352d4cd260 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -242,7 +242,7 @@ include $(XEN_ROOT)/Config.mk ARCH := $(XEN_TARGET_ARCH) SRCARCH := $(shell echo $(ARCH) | \ - sed -e 's/x86.*/x86/' -e 's/arm\(32\|64\)/arm/g' \ + sed -e 's/x86.*/x86/' -e 's/arm.*/arm/g' \ -e 's/riscv.*/riscv/g' -e 's/ppc.*/ppc/g') export ARCH SRCARCH -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 15:02:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 15:02:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222080.1530123 (Exim 4.92) (envelope-from ) id 1vo0sD-0005QV-LZ; Thu, 05 Feb 2026 15:02:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222080.1530123; Thu, 05 Feb 2026 15:02:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo0sD-0005QO-Iv; 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Thu, 05 Feb 2026 07:10:08 -0800 (PST) Message-ID: <2038c5c4-c542-4382-b89c-0082a51d6d2a@suse.com> Date: Thu, 5 Feb 2026 16:10:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: use BSD sed compatible regexp in SRCARCH To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260205145913.99032-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205145913.99032-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.02.2026 15:59, Roger Pau Monne wrote: > Convert the ARM SRCARCH variable setting to use the more common 'arm.*' > expression rather 'arm\(32\|64\)', as the later doesn't work with BSD sed > for not being a basic regular expression. The usage of | alternations is > not part of basic regexp support. > > Signed-off-by: Roger Pau Monné > --- > xen/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/Makefile b/xen/Makefile > index 13e336ba5484..31352d4cd260 100644 > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -242,7 +242,7 @@ include $(XEN_ROOT)/Config.mk > > ARCH := $(XEN_TARGET_ARCH) > SRCARCH := $(shell echo $(ARCH) | \ > - sed -e 's/x86.*/x86/' -e 's/arm\(32\|64\)/arm/g' \ > + sed -e 's/x86.*/x86/' -e 's/arm.*/arm/g' \ Perhaps to guard against something like armv7, use arm[36][24] ? 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Iqwlpw3u564WSSDcs7r8+2VSlfrVCnLp1FtRe8a36oZqZdl0Vdp6gwRNcJphmB0w/cCNqpSKdlBjBQYqiTfG3t5gD+EjU/9k+DFJsXzGKfSTJQDinCU1cgJldjF+pMn+KDtGGEPVWbs0L7669rDBIal8zEOlxMPKbX/aUZqxBKe0z5YwS7aKs2MhjkJCZd7H713hB85OSn7vvtISfX+wapLVElArLx+eI7WBWvZCGor+q83ogFUKkfyy/uZf1V0+IoUf7HqT76MHjH0Q9dmMNdY4bCLXtopljxuk5ZklcF1OHd8gupk7JKfQ9m5Y88z/8fmjcqjs1pDQMMcTdijSsRyYmAvUs9Je+GKpLe4oMH9Nddx+r5EjASo3iiOoZeH2RAHpO5Ct3+Uz2P9DUauYvW6KIYZJRzdH3sl2isWb6BH/le9q1OaDOLPduLqLZmbe X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 15:10:39.4154 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d99224f6-a869-4a09-4f47-08de64c8b91f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002310.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6775 On 05/02/2026 14:49, Jan Beulich wrote: > On 05.02.2026 13:58, Michal Orzel wrote: >> When a guest maps pages via XENMEM_add_to_physmap to a GFN that already >> has an existing mapping, the old page at that GFN was not being removed, >> causing a memory leak. This affects all mapping spaces including >> XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and >> XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain >> destruction. >> >> Add logic to remove the previously mapped page before creating the new >> mapping, matching the x86 implementation approach. >> >> Additionally, skip removal if the same MFN is being remapped. >> >> Signed-off-by: Michal Orzel >> --- >> I'm not sure where to point the Fixes tag to. >> --- >> xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- >> 1 file changed, 29 insertions(+), 3 deletions(-) >> >> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >> index 6df8b616e464..b9f1a493dcd7 100644 >> --- a/xen/arch/arm/mm.c >> +++ b/xen/arch/arm/mm.c >> @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( >> unsigned long idx, >> gfn_t gfn) >> { >> - mfn_t mfn = INVALID_MFN; >> + mfn_t mfn = INVALID_MFN, mfn_old; >> int rc; >> p2m_type_t t; >> struct page_info *page = NULL; >> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >> >> switch ( space ) >> { >> @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( >> return -ENOSYS; >> } >> >> + /* >> + * Remove previously mapped page if it was present, to avoid leaking >> + * memory. >> + */ >> + mfn_old = gfn_to_mfn(d, gfn); >> + >> + if ( mfn_valid(mfn_old) ) >> + { >> + if ( is_special_page(mfn_to_page(mfn_old)) ) >> + { >> + /* Just unmap, don't free */ >> + p2m_write_lock(p2m); >> + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, >> + p2m_invalid, p2m->default_access); >> + p2m_write_unlock(p2m); >> + if ( rc ) >> + return rc; >> + } >> + else if ( !mfn_eq(mfn, mfn_old) ) >> + { >> + /* Normal domain memory is freed, to avoid leaking memory */ >> + rc = guest_remove_page(d, gfn_x(gfn)); >> + if ( rc ) >> + return rc; >> + } >> + } > > This new code and what follows below it are not inside a single locked region, > hence the cleanup done above may well have been "undone" again by the time the > P2M lock is acquired below. That locking may not be apparent in the x86 > variant when merely looking at functions used. There's a large comment, > though, explaining how we actually (ab)use the simplified locking model > (compared to what was once intended, but never carried out). Do you suggest to put the new code and old code in a single locked region? > > Further, doesn't P2M entry type influence what needs doing here, including > possibly rejecting the request? x86 refuses to replace p2m_mmio_direct entries > by this means, but seeing that Arm has XENMAPSPACE_dev_mmio, this case may > need handling, but the handling may need to be different from what you do > above. (Just to mention: Presumably on Arm it's no different from x86: An MMIO > page may or may not pass an mfn_valid() check.) I actually had the following in my initial implementation: p2m_write_lock(p2m); mfn_old = p2m_get_entry(p2m, gfn, &p2mt_old, NULL, NULL, NULL); if ( p2mt_old == p2m_mmio_direct ) { p2m_write_unlock(p2m); return -EPERM; } but realized this is actually a different issue than the one I want to solve and I don't want to fix two in one go. ~Michal From xen-devel-bounces@lists.xenproject.org Thu Feb 05 15:22:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 15:22:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222123.1530155 (Exim 4.92) (envelope-from ) id 1vo1C0-00012y-Qq; Thu, 05 Feb 2026 15:22:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222123.1530155; Thu, 05 Feb 2026 15:22:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1C0-00012r-MS; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: EnPhuGwaiSVtPHOY360QTWZ4ugM+AMb6s5nER857J7pB655jct731RdvPtQDMrfNcQ2Y69d3cg9iw2XfUZcU8zfbQbcoOri9VGWgwqGFqHaLDyUhMPwl1GcV/FNljbFD1P6qXLGLBHPwSijHzltcI0KvATzwWW+oWW8TZ9CV1dY8zsinJOkwJW/kB8dCBch2hzVSVUcZJeRmse18GO+dEPvvxpIjZAHMAC0Zx7xRBj4Tv9LHzVkL3+dox491VHWOum7siCTJrkccGktJE2RjsXaicj5VdVqwVme5PYXC0c5vA5hFxMAz8zSYBgG2CCL73eDtypBtvT8umWOAvZhAMykJqjmK6mwZOJvTctBMO6a+l+2v+lM4Ut8Xk5cCDwvz1QRNbwcUg4Wrp/nkOEkjOCfh0BoNyDnzqkP2oSVozgOMbjtumRHz31auectPZcZE X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 15:31:46.8557 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b6c8dbb-4e7b-4b4e-ae1b-08de64cbac91 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B95.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB8610 Hi, With Roger's patch removing the need for GNU sed, it appears that compilation is also working with Mac OS make. > On 5 Feb 2026, at 13:29, Jan Beulich wrote: >=20 > On 05.02.2026 12:33, Bertrand Marquis wrote: >> Xen does not currently document how to build the hypervisor on macOS, an= d >> there is no Darwin configuration for selecting a Homebrew-based GNU >> toolchain. Native builds are not supported; the hypervisor must be >> cross-built with a GNU toolchain and GNU make/sed. >>=20 >> Add a minimal Darwin.mk which selects the GNU tool definitions used by >> the macOS workflow and point to the build guide for required tools and >> setup. Document the Homebrew cross toolchain and GNU tools needed to >> build the hypervisor on macOS. >>=20 >> Signed-off-by: Bertrand Marquis >> --- >> config/Darwin.mk | 6 ++++ >> docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ >> 2 files changed, 72 insertions(+) >> create mode 100644 config/Darwin.mk >> create mode 100644 docs/misc/build-on-macos.md >=20 > I'm sorry, I should have paid attention already on the RFC, but: With all > other Pandoc files in this directory being named *.pandoc, do we really w= ant > to have an outlier named *.md there? Right but this might not be needed anymore as the only thing needed after R= oger's patch is only a toolchain so brew is one solution but there are a lot of ot= hers. >=20 >> --- /dev/null >> +++ b/config/Darwin.mk >> @@ -0,0 +1,6 @@ >> +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU t= ools. >> +# See docs/misc/build-on-macos.md for required tools and setup. >> +include $(XEN_ROOT)/config/StdGNU.mk >=20 > Given Roger's consideration towards possibly using a more MacOS-native > build arrangement as an alternative, I'm actually not quite sure this sho= uld > then be the default mode here. Roger, what are your thoughts? Even with Mac OS sed and make working, something is still needed here to=20 compile on Mac OS. What would you suggest the default mode should be here ? Mac OS is not GNU but everything used correspond to what is defined by StdGNU.mk. I am only forcing cross compilation here to prevent using the host toolchai= n. What do you think i should put there instead ? I have been keeping that downstream for a while, it is kind of sad that peo= ple cannot compile on mac os just because of this file missing. Cheers Bertrand >=20 > Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 05 15:43:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 15:43:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222143.1530175 (Exim 4.92) (envelope-from ) id 1vo1WA-0004fq-Pq; Thu, 05 Feb 2026 15:43:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222143.1530175; Thu, 05 Feb 2026 15:43:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1WA-0004fj-Lf; Thu, 05 Feb 2026 15:43:42 +0000 Received: by outflank-mailman (input) for mailman id 1222143; Thu, 05 Feb 2026 15:43:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1W9-0004fN-GV for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 15:43:41 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6ec58ae9-02a9-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 16:43:35 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-47ee2715254so7205485e9.3 for ; Thu, 05 Feb 2026 07:43:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 07:43:35 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 16:43:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <7bf2ee2a-177f-4d7b-9dde-ee43bc4311b8@suse.com> <2B5080FA-A0F3-491C-954C-A458C6CA2E93@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2B5080FA-A0F3-491C-954C-A458C6CA2E93@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 16:30, Bertrand Marquis wrote: >> On 5 Feb 2026, at 13:29, Jan Beulich wrote: >> >> On 05.02.2026 12:33, Bertrand Marquis wrote: >>> Xen does not currently document how to build the hypervisor on macOS, and >>> there is no Darwin configuration for selecting a Homebrew-based GNU >>> toolchain. Native builds are not supported; the hypervisor must be >>> cross-built with a GNU toolchain and GNU make/sed. >>> >>> Add a minimal Darwin.mk which selects the GNU tool definitions used by >>> the macOS workflow and point to the build guide for required tools and >>> setup. Document the Homebrew cross toolchain and GNU tools needed to >>> build the hypervisor on macOS. >>> >>> Signed-off-by: Bertrand Marquis >>> --- >>> config/Darwin.mk | 6 ++++ >>> docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ >>> 2 files changed, 72 insertions(+) >>> create mode 100644 config/Darwin.mk >>> create mode 100644 docs/misc/build-on-macos.md >> >> I'm sorry, I should have paid attention already on the RFC, but: With all >> other Pandoc files in this directory being named *.pandoc, do we really want >> to have an outlier named *.md there? > > Right but this might not be needed anymore as the only thing needed after Roger's > patch is only a toolchain so brew is one solution but there are a lot of others. Even better. >>> --- /dev/null >>> +++ b/config/Darwin.mk >>> @@ -0,0 +1,6 @@ >>> +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU tools. >>> +# See docs/misc/build-on-macos.md for required tools and setup. >>> +include $(XEN_ROOT)/config/StdGNU.mk >> >> Given Roger's consideration towards possibly using a more MacOS-native >> build arrangement as an alternative, I'm actually not quite sure this should >> then be the default mode here. Roger, what are your thoughts? > > Even with Mac OS sed and make working, something is still needed here to > compile on Mac OS. > > What would you suggest the default mode should be here ? Mac OS is not GNU > but everything used correspond to what is defined by StdGNU.mk. > > I am only forcing cross compilation here to prevent using the host toolchain. That part is okay with me. > What do you think i should put there instead ? Using StdGNU.mk may still be okay, as long as the comment properly represents the overall situation. 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Thu, 05 Feb 2026 07:46:53 -0800 (PST) Message-ID: <15d344fc-4c12-4782-87a2-650ad0fc8650@suse.com> Date: Thu, 5 Feb 2026 16:46:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Fix memory leak in xenmem_add_to_physmap_one To: "Orzel, Michal" Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Xenia Ragiadakou , xen-devel@lists.xenproject.org References: <20260205125820.116555-1-michal.orzel@amd.com> <828feb7a-2a5b-4306-8da9-162df9ecfee3@suse.com> <0d91746d-2a58-4770-ac64-f974aa3563b1@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0d91746d-2a58-4770-ac64-f974aa3563b1@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 16:08, Orzel, Michal wrote: > > > On 05/02/2026 14:49, Jan Beulich wrote: >> On 05.02.2026 13:58, Michal Orzel wrote: >>> When a guest maps pages via XENMEM_add_to_physmap to a GFN that already >>> has an existing mapping, the old page at that GFN was not being removed, >>> causing a memory leak. This affects all mapping spaces including >>> XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and >>> XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain >>> destruction. >>> >>> Add logic to remove the previously mapped page before creating the new >>> mapping, matching the x86 implementation approach. >>> >>> Additionally, skip removal if the same MFN is being remapped. >>> >>> Signed-off-by: Michal Orzel >>> --- >>> I'm not sure where to point the Fixes tag to. >>> --- >>> xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- >>> 1 file changed, 29 insertions(+), 3 deletions(-) >>> >>> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >>> index 6df8b616e464..b9f1a493dcd7 100644 >>> --- a/xen/arch/arm/mm.c >>> +++ b/xen/arch/arm/mm.c >>> @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( >>> unsigned long idx, >>> gfn_t gfn) >>> { >>> - mfn_t mfn = INVALID_MFN; >>> + mfn_t mfn = INVALID_MFN, mfn_old; >>> int rc; >>> p2m_type_t t; >>> struct page_info *page = NULL; >>> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >>> >>> switch ( space ) >>> { >>> @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( >>> return -ENOSYS; >>> } >>> >>> + /* >>> + * Remove previously mapped page if it was present, to avoid leaking >>> + * memory. >>> + */ >>> + mfn_old = gfn_to_mfn(d, gfn); >>> + >>> + if ( mfn_valid(mfn_old) ) >>> + { >>> + if ( is_special_page(mfn_to_page(mfn_old)) ) >>> + { >>> + /* Just unmap, don't free */ >>> + p2m_write_lock(p2m); >>> + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, >>> + p2m_invalid, p2m->default_access); >>> + p2m_write_unlock(p2m); >>> + if ( rc ) >>> + return rc; >>> + } >>> + else if ( !mfn_eq(mfn, mfn_old) ) >>> + { >>> + /* Normal domain memory is freed, to avoid leaking memory */ >>> + rc = guest_remove_page(d, gfn_x(gfn)); >>> + if ( rc ) >>> + return rc; >>> + } >>> + } >> >> This new code and what follows below it are not inside a single locked region, >> hence the cleanup done above may well have been "undone" again by the time the >> P2M lock is acquired below. That locking may not be apparent in the x86 >> variant when merely looking at functions used. There's a large comment, >> though, explaining how we actually (ab)use the simplified locking model >> (compared to what was once intended, but never carried out). > Do you suggest to put the new code and old code in a single locked region? Yes. Which may be difficult on Arm, where the P2M lock isn't recursive. >> Further, doesn't P2M entry type influence what needs doing here, including >> possibly rejecting the request? x86 refuses to replace p2m_mmio_direct entries >> by this means, but seeing that Arm has XENMAPSPACE_dev_mmio, this case may >> need handling, but the handling may need to be different from what you do >> above. (Just to mention: Presumably on Arm it's no different from x86: An MMIO >> page may or may not pass an mfn_valid() check.) > I actually had the following in my initial implementation: > p2m_write_lock(p2m); > mfn_old = p2m_get_entry(p2m, gfn, &p2mt_old, NULL, NULL, NULL); > if ( p2mt_old == p2m_mmio_direct ) > { > p2m_write_unlock(p2m); > return -EPERM; > } > but realized this is actually a different issue than the one I want to solve and > I don't want to fix two in one go. Hmm. If you indeed want to separate both (and also not have both in a series), I'd then suggest to at least mention that this aspect (and whatever else there may be) is deliberately left out. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: r/CoR4VLX7srNsSGbBu81ZWwV7FL5HijvwMhPTbbhvF8xW7NXqSR+3T7gdWftxRwTsXBu7ZLQO0oX6EPTAejGYV0EW0miIdK+CdOkS8jU8yWgg+B3yuC0hP9K+b2iFoWXCsHGo1yF5k9NyzsUFbNHosFUmOBp2TKJ2dFMkoQByfSvlpcWBdbXvgyvMnGCjco/TytIXK7HRZg2Holk2vMkDe0mdciqShRDX7C3M8TlXnzcjVhrt0l7ozw5gZNtUCvLnYcM/zDAloti3vgvvilpderX6+bT5uf0f1zHGLWcfWa3wpAKOL/pebwf64+pOPDuB+yEfz73KuZFbMsI7Kwfi9VSyvS0t9s6PsFEICo9lkrznUh8mqnQFniIobdmcGLHa4qIGYdFQrfpC3drTqPMfB23ERNBdpT4P6K9sOLW/npyP17CmN9B0uM3ZPkRMzi X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 15:59:38.4259 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ba48aa57-cadb-4065-1c4b-08de64cf90e5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00025F9A.EURPRD83.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB6413 Hi Jan, > On 5 Feb 2026, at 16:43, Jan Beulich wrote: >=20 > On 05.02.2026 16:30, Bertrand Marquis wrote: >>> On 5 Feb 2026, at 13:29, Jan Beulich wrote: >>>=20 >>> On 05.02.2026 12:33, Bertrand Marquis wrote: >>>> Xen does not currently document how to build the hypervisor on macOS, = and >>>> there is no Darwin configuration for selecting a Homebrew-based GNU >>>> toolchain. Native builds are not supported; the hypervisor must be >>>> cross-built with a GNU toolchain and GNU make/sed. >>>>=20 >>>> Add a minimal Darwin.mk which selects the GNU tool definitions used by >>>> the macOS workflow and point to the build guide for required tools and >>>> setup. Document the Homebrew cross toolchain and GNU tools needed to >>>> build the hypervisor on macOS. >>>>=20 >>>> Signed-off-by: Bertrand Marquis >>>> --- >>>> config/Darwin.mk | 6 ++++ >>>> docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ >>>> 2 files changed, 72 insertions(+) >>>> create mode 100644 config/Darwin.mk >>>> create mode 100644 docs/misc/build-on-macos.md >>>=20 >>> I'm sorry, I should have paid attention already on the RFC, but: With a= ll >>> other Pandoc files in this directory being named *.pandoc, do we really= want >>> to have an outlier named *.md there? >>=20 >> Right but this might not be needed anymore as the only thing needed afte= r Roger's >> patch is only a toolchain so brew is one solution but there are a lot of= others. >=20 > Even better. >=20 >>>> --- /dev/null >>>> +++ b/config/Darwin.mk >>>> @@ -0,0 +1,6 @@ >>>> +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU= tools. >>>> +# See docs/misc/build-on-macos.md for required tools and setup. >>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>=20 >>> Given Roger's consideration towards possibly using a more MacOS-native >>> build arrangement as an alternative, I'm actually not quite sure this s= hould >>> then be the default mode here. Roger, what are your thoughts? >>=20 >> Even with Mac OS sed and make working, something is still needed here to= =20 >> compile on Mac OS. >>=20 >> What would you suggest the default mode should be here ? Mac OS is not G= NU >> but everything used correspond to what is defined by StdGNU.mk. >>=20 >> I am only forcing cross compilation here to prevent using the host toolc= hain. >=20 > That part is okay with me. >=20 >> What do you think i should put there instead ? >=20 > Using StdGNU.mk may still be okay, as long as the comment properly repres= ents > the overall situation. Agree. What do you think of the following: Use GNU tool definitions as the tools we are using are either GNU compatibl= e or we only use features which are supported on Mac OS. Bertrand From xen-devel-bounces@lists.xenproject.org Thu Feb 05 16:08:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 16:08:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222185.1530203 (Exim 4.92) (envelope-from ) id 1vo1tg-00016d-4G; Thu, 05 Feb 2026 16:08:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222185.1530203; Thu, 05 Feb 2026 16:08:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1tg-00016W-1G; Thu, 05 Feb 2026 16:08:00 +0000 Received: by outflank-mailman (input) for mailman id 1222185; Thu, 05 Feb 2026 16:07:58 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1te-00016Q-OP for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 16:07:58 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vo1te-004F9j-1c; Thu, 05 Feb 2026 16:07:58 +0000 Received: from [2a01:cb15:80df:da00:10d0:b82f:72a2:ac5] (helo=l14) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vo1td-000giS-2O; Thu, 05 Feb 2026 16:07:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date; bh=L7AlrDhtoiZcfuy+jhhS8IOW+H9z6FpyimOCakWieZk=; b=RaZP1+cn+70lYc2JMr9kqqVAC4 S4kHvMWOjr00afQJ5Y8TRpNmi8/KBPputVO5xX9pbWyi5Qs2TdA235iFunxvM8BhJ3/f98Y68UH0P 74ajQ2RSaR5QKFy9g7v2D7cQikfMmbif8sNctH+/BdTQ0qBKCsuLe1zaCsIZxYi6q6gM=; Date: Thu, 5 Feb 2026 17:07:55 +0100 From: Anthony PERARD To: Oleksii Moisieiev Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Bertrand Marquis , Jan Beulich , Juergen Gross , Julien Grall , Michal Orzel , Roger Pau =?iso-8859-1?Q?Monn=E9?= , Stefano Stabellini , Volodymyr Babchuk , Grygorii Strashko Subject: Re: [PATCH v9 4/5] xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver Message-ID: References: <3a5ff98b9c46c393e856c2e9a645b2cb1509d5c4.1769696107.git.oleksii_moisieiev@epam.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3a5ff98b9c46c393e856c2e9a645b2cb1509d5c4.1769696107.git.oleksii_moisieiev@epam.com> On Thu, Jan 29, 2026 at 02:16:55PM +0000, Oleksii Moisieiev wrote: > docs/man/xl.cfg.5.pod.in | 13 + > tools/libs/light/libxl_arm.c | 4 + > tools/libs/light/libxl_types.idl | 4 +- > tools/xl/xl_parse.c | 12 + Hi Oleksii, Could you put the toolstack part of the patch in a separated patch? Thank you. -- Anthony PERARD From xen-devel-bounces@lists.xenproject.org Thu Feb 05 16:10:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 16:10:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222191.1530214 (Exim 4.92) (envelope-from ) id 1vo1vy-0002a8-GK; Thu, 05 Feb 2026 16:10:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222191.1530214; Thu, 05 Feb 2026 16:10:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1vy-0002a1-De; Thu, 05 Feb 2026 16:10:22 +0000 Received: by outflank-mailman (input) for mailman id 1222191; Thu, 05 Feb 2026 16:10:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo1vw-0002Zr-AA for xen-devel@lists.xenproject.org; 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Fixes: f5b43e95facd ("libxl: fix "xl mem-set" regression from 0c029c4da2") > Signed-off-by: Edwin Török Reviewed-by: Andrew Cooper > --- > tools/ocaml/libs/xc/xenctrl_stubs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c > index ac2a7537d6..c55f73b265 100644 > --- a/tools/ocaml/libs/xc/xenctrl_stubs.c > +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c > @@ -947,7 +947,7 @@ CAMLprim value stub_xc_domain_setmaxmem(value xch_val, value domid, > int retval; > > uint32_t c_domid = Int_val(domid); > - unsigned int c_max_memkb = Int64_val(max_memkb); > + uint64_t c_max_memkb = Int64_val(max_memkb); > caml_enter_blocking_section(); > retval = xc_domain_setmaxmem(xch, c_domid, c_max_memkb); > caml_leave_blocking_section(); Interestingly, in 8b7ce06a2d341c1f when the Ocaml bindings where introduced, it was always an Int64 downcast into an unsigned int, so the binding was correct.  Later, xc_domain_setmaxmem() was upgraded from an unsigned int to a uint64_t. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Feb 05 16:26:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 16:26:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222203.1530224 (Exim 4.92) (envelope-from ) id 1vo2B4-0004NC-PL; Thu, 05 Feb 2026 16:25:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222203.1530224; Thu, 05 Feb 2026 16:25:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2B4-0004N5-M5; Thu, 05 Feb 2026 16:25:58 +0000 Received: by outflank-mailman (input) for mailman id 1222203; Thu, 05 Feb 2026 16:25:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2B3-0004Mt-VY for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 16:25:58 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5953ab60-02af-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 17:25:56 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4807068eacbso10633145e9.2 for ; Thu, 05 Feb 2026 08:25:56 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48317d7a99asm72216505e9.11.2026.02.05.08.25.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Feb 2026 08:25:55 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5953ab60-02af-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770308756; x=1770913556; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=MQnibJuvEXD4990OC7RL8/XAKNQan2ONKn0EEC28b5Q=; b=SRVG0E9w6Xa88vwFIi5g0IfPrB01ylIwreoJsir+fdbjK4IW5FRbriBN8AviHovMUY 9nTwBwWWppqilIbid5GF/APX7V5wUYHRZIKuQeNQCf2Xpphbw0c9d4Cm2507llFaqLtq mzqPtDAz4JcKGu+6ZUyHEEPQgC/CkIveqq3AoFjqNpjtQyTgGW9UOvg6GPvqsJa9RghH zYgDQQ/pGYwePTx/D+qVg7V4mGoKqOJS2bXM6oMotPw80HNpTtOKowqUC4Kc2QczrGA2 tA4ejeKqZR1si2ka5dDW66xUcYNPUOtHsc+zijhdrVv7Fy0tevG1HyPefCJ75EmtP//G QjyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770308756; x=1770913556; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=MQnibJuvEXD4990OC7RL8/XAKNQan2ONKn0EEC28b5Q=; b=RArbnal5mmuSt0ajilYocBE5YFoMtJCKPl/+dfpV0GU0XYzQ1s1VdSBSMKyisCiy47 Q7oITh0kDeZg1ugUKWG6P7CUiIeBC9im+7HCtMv54quEjoDTiaQPDctf2UTzl6NNLRSN chx9+kCzgwkQM+HUrheLoiD6Wou9zm8bmypJpHF3nneY0cA4txphOIIJBvz+0LZik0/6 GTtt+QffiLJ8WCQFknkX9F+CoIYu48jWgMwNoxeGLhuMff5tRlgfZ5JmebKS1yNTDG9N 0pCWxbEprhgNYacida5bl6u6hyGA9iTp85cYfilTDajk8DJTDpnymw/3El/qPFvl8RIb TvHg== X-Forwarded-Encrypted: i=1; AJvYcCWUi39cz9FzL51na3RuRKZqJ/9HYuCfLpPiCBnNazGPKAmTwxjP71ZrojRR1naMEq8a0pcJw/mzK+0=@lists.xenproject.org X-Gm-Message-State: AOJu0YzGiHaAg91OYQMeFpYZL8tYU2Lf5edPhiUF1miVPcToG4CInlqJ YqP4pJOJDpz6IT/8+s9n6/L7mOvbePQ0mHPNZT2JcLOTiZ0ECKNu5/DC X-Gm-Gg: AZuq6aJSRKIgm0WOoRx08+uSgl9mv3+nvy4ZSiiMuBE+P5bBsJu2AUu+MsYyHnd6N/7 B8EK4aTgmByavAahtdlnk4l40zXYCxt60/vn/yOdLF6OgTA+DYANM8xTJxFRgEimc7ADD9H58t5 xIo0Xx0I3Hzwnk+UuzGSSAqmf3lcorPRY0k+eFWxVee2lBMEmf93qD2SQLn8Xyx3AwaZLGihM2j uGcqPJOL0YWwPXmykzjUEMb3b3mlrpPBsDElxzF4Eton9ojhpWOQWNDatIIM9iEawabdBVkf1yO 0+V8ZWKWGClSdWetguTAoO+IT+7zdOJREoLEu/1NOAH94iFhSsIpXVzL3XT5P7grVZUpygQgJVm uD3alAs+r3ga5nhr+aWQDEczQxxEe+B5lWY0uMAAi9RYkT5kVrkiTM9d2zE0p98aSh0QX+HJmVj Y5VrB1p6tvVfCzPTbDInFGTvrspDLLYhWuLSsZV4Uh9k5aPzAJYIkTr+6/p4z4wPI= X-Received: by 2002:a05:600c:8b30:b0:480:3ad0:93c0 with SMTP id 5b1f17b1804b1-4830e96d513mr93132845e9.23.1770308755992; Thu, 05 Feb 2026 08:25:55 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 17:25:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 13/16] xen/riscv: implement reprogram_timer() via SBI To: Jan Beulich Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <732635f43fb80daec332f78d4442b56bf5dfda98.1769099885.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/4/26 11:39 AM, Jan Beulich wrote: > On 22.01.2026 17:47, Oleksii Kurochko wrote: >> @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) >> cpu_khz = rate / 1000; >> } >> >> +int reprogram_timer(s_time_t timeout) >> +{ >> + uint64_t deadline, now; >> + int rc; >> + >> + if ( timeout == 0 ) >> + { >> + /* Disable timers */ >> + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); > For here and below: Is it guaranteed that the SIE bit is writable? The privileged > spec looks to have provisions for the case that it isn't (together with the > corresponding SIP bit). My understanding is that yes if S-mode is present. > > As to the comment - why plural here, when ... > >> + return 1; >> + } >> + >> + deadline = ns_to_ticks(timeout) + boot_clock_cycles; >> + now = get_cycles(); >> + if ( deadline <= now ) >> + return 0; >> + >> + /* Enable timer */ >> + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); > ... it's singular here? Also in both cases, isn't it the timer interrupt you > enable, not the timer itself? It is timer interrupt. I will correct the comments. > >> + /* >> + * TODO: When the SSTC extension is supported, it would be preferable to >> + * use the supervisor timer registers directly here for better >> + * performance, since an SBI call and context switch would no longer >> + * be required. > I think you mean a mode switch here, not a context one? Right, mode switch is better. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 05 16:51:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 16:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222237.1530233 (Exim 4.92) (envelope-from ) id 1vo2a5-0008Ji-FB; Thu, 05 Feb 2026 16:51:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222237.1530233; Thu, 05 Feb 2026 16:51:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2a5-0008Jb-CC; Thu, 05 Feb 2026 16:51:49 +0000 Received: by outflank-mailman (input) for mailman id 1222237; Thu, 05 Feb 2026 16:51:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2a4-0008J5-S9 for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 16:51:48 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f608769e-02b2-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 17:51:48 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-47ee937ecf2so11628315e9.0 for ; Thu, 05 Feb 2026 08:51:48 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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As it is mentioned in the comment it is invcpu_context_saved(). ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 05 16:52:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 16:52:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222242.1530243 (Exim 4.92) (envelope-from ) id 1vo2aV-0000Et-Mf; Thu, 05 Feb 2026 16:52:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222242.1530243; Thu, 05 Feb 2026 16:52:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2aV-0000Ek-Jh; Thu, 05 Feb 2026 16:52:15 +0000 Received: by outflank-mailman (input) for mailman id 1222242; Thu, 05 Feb 2026 16:52:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo2aU-0008J5-B3 for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 16:52:14 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 04f6c617-02b3-11f1-b161-2bf370ae4941; Thu, 05 Feb 2026 17:52:13 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-42fb4eeb482so796796f8f.0 for ; Thu, 05 Feb 2026 08:52:13 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 05 Feb 2026 08:52:12 -0800 (PST) Message-ID: <4632759d-562a-4038-a78c-85e9ad0d2d6c@suse.com> Date: Thu, 5 Feb 2026 17:52:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <7bf2ee2a-177f-4d7b-9dde-ee43bc4311b8@suse.com> <2B5080FA-A0F3-491C-954C-A458C6CA2E93@arm.com> <6AED68E8-CCBE-46AB-AFF0-9C87AAB770C3@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6AED68E8-CCBE-46AB-AFF0-9C87AAB770C3@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 16:58, Bertrand Marquis wrote: >> On 5 Feb 2026, at 16:43, Jan Beulich wrote: >> On 05.02.2026 16:30, Bertrand Marquis wrote: >>>> On 5 Feb 2026, at 13:29, Jan Beulich wrote: >>>> On 05.02.2026 12:33, Bertrand Marquis wrote: >>>>> --- /dev/null >>>>> +++ b/config/Darwin.mk >>>>> @@ -0,0 +1,6 @@ >>>>> +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU tools. >>>>> +# See docs/misc/build-on-macos.md for required tools and setup. >>>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>> >>>> Given Roger's consideration towards possibly using a more MacOS-native >>>> build arrangement as an alternative, I'm actually not quite sure this should >>>> then be the default mode here. Roger, what are your thoughts? >>> >>> Even with Mac OS sed and make working, something is still needed here to >>> compile on Mac OS. >>> >>> What would you suggest the default mode should be here ? Mac OS is not GNU >>> but everything used correspond to what is defined by StdGNU.mk. >>> >>> I am only forcing cross compilation here to prevent using the host toolchain. >> >> That part is okay with me. >> >>> What do you think i should put there instead ? >> >> Using StdGNU.mk may still be okay, as long as the comment properly represents >> the overall situation. > > Agree. > > What do you think of the following: > > Use GNU tool definitions as the tools we are using are either GNU compatible > or we only use features which are supported on Mac OS. Sounds good. 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Thu, 05 Feb 2026 08:53:52 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 17:53:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 16/16] xen/riscv: implement sync_vcpu_execstate() To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <316accc5-2e6b-4571-98a7-5776a47a4ad7@suse.com> <135afbb9-8863-4a9c-b012-832575f04edb@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <135afbb9-8863-4a9c-b012-832575f04edb@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 17:51, Oleksii Kurochko wrote: > > On 2/4/26 11:49 AM, Jan Beulich wrote: >> On 22.01.2026 17:47, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/domain.c >>> +++ b/xen/arch/riscv/domain.c >>> @@ -259,3 +259,21 @@ void sync_local_execstate(void) >>> { >>> /* Nothing to do -- no lazy switching */ >>> } >>> + >>> +void sync_vcpu_execstate(struct vcpu *v) >>> +{ >>> + /* >>> + * We don't support lazy switching. >>> + * >>> + * However the context may have been saved from a remote pCPU so we >>> + * need a barrier to ensure it is observed before continuing. >>> + * >>> + * Per vcpu_context_saved(), the context can be observed when >>> + * v->is_running is false (the caller should check it before calling >>> + * this function). >>> + * >>> + * Note this is a full barrier to also prevent update of the context >>> + * to happen before it was observed. >>> + */ >>> + smp_mb(); >>> +} >> Where's the counterpart of this barrier (going to be)? > > As it is mentioned in the comment it is invcpu_context_saved(). ~ Oleksii You may have seen the Arm side changes to this, as I did Cc you. From that I think you should understand the background of the question. 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Native builds are not supported; the hypervisor must be > cross-built with a GNU toolchain and GNU make/sed. > > Add a minimal Darwin.mk which selects the GNU tool definitions used by > the macOS workflow and point to the build guide for required tools and > setup. Document the Homebrew cross toolchain and GNU tools needed to > build the hypervisor on macOS. > > Signed-off-by: Bertrand Marquis > --- > config/Darwin.mk | 6 ++++ > docs/misc/build-on-macos.md | 66 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 72 insertions(+) > create mode 100644 config/Darwin.mk > create mode 100644 docs/misc/build-on-macos.md > > diff --git a/config/Darwin.mk b/config/Darwin.mk > new file mode 100644 > index 000000000000..a4e3efa81842 > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,6 @@ > +# Use GNU tool definitions; the macOS workflow relies on Homebrew GNU tools. > +# See docs/misc/build-on-macos.md for required tools and setup. > +include $(XEN_ROOT)/config/StdGNU.mk > + > +# We are always cross compiling so fake COMPILE_ARCH > +XEN_COMPILE_ARCH = Darwin > diff --git a/docs/misc/build-on-macos.md b/docs/misc/build-on-macos.md > new file mode 100644 > index 000000000000..6b56cd8eccab > --- /dev/null > +++ b/docs/misc/build-on-macos.md > @@ -0,0 +1,66 @@ > +# Building Xen Hypervisor on macOS > + > +This guide explains how to cross-compile the Xen hypervisor (xen > +subdirectory only) on macOS. This does **not** build the tools. More on this below, I'm not sure I would call it a "cross-compile". Only when doing so from a x86 silicon Mac? > +## Prerequisites > + > +Install the following packages using Homebrew: > + > +```bash > +# Cross-compilation toolchain for ARM64 > +brew install aarch64-elf-gcc > + > +# GNU tools (required for compatibility) > +brew install make gnu-sed > +``` Installing make / sed are not strictly needed. > + > +Homebrew installs under `/opt/homebrew` on Apple Silicon and `/usr/local` on > +Intel Macs. Adjust paths below accordingly. > + > +### Verification > + > +Verify your installation: > + > +```bash > +# Check cross compiler > +aarch64-elf-gcc --version > + > +# Check GNU make (adjust prefix if needed) > +/opt/homebrew/opt/make/libexec/gnubin/make --version > + > +# Check GNU sed (adjust prefix if needed) > +/opt/homebrew/opt/gnu-sed/libexec/gnubin/sed --version > +``` Checking for make / sed can be removed. > + > +## Building the Hypervisor > + > +Set up GNU tools in PATH and build: > + > +```bash > +# Set up GNU tools in PATH (adjust prefix if needed) > +export PATH="/opt/homebrew/opt/gnu-sed/libexec/gnubin:/opt/homebrew/opt/make/libexec/gnubin:$PATH" Do you really need the gnubin? I think this was only for sed / make, which is not really needed. > + > +# Build Xen hypervisor only (in-tree) > +cd xen/ > +make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc > + > +# Optional: out-of-tree build directory > +# make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc O=$PWD/build-mac > +``` > + > +## Architecture Support > + > +Currently supported architectures: > + > +- **ARM64** (`arm64`) - Default, uses `aarch64-elf-gcc` It could possibly also use the llvm package from homebrew, but I can add later if I get some time to test. > + > +Other targets may work if the corresponding cross toolchain is installed, > +but this guide has only been tested on ARM64. > + > +## Limitations > + > +- **Hypervisor only**: This only builds the Xen hypervisor, not the tools > +- **Cross-compilation only**: Native builds are not supported Probably a more philosophical question, but is it really a cross compilation if I'm building an arm64 Xen on Apple arm64 silicon? Sure, it might use a different toolchain from native, but it's still a "native" build from an architectural perspective? > +- **macOS-specific**: Instructions optimized for macOS with Homebrew > +- **GNU tools required**: Native BSD tools are not compatible That last item can be removed. Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dO28t8M9V8E1CYc69p+Y+HlmOe+WF+tDfgPWPStXid/h9hRvDOgXE6GpGyzbo4TYKpeiEZdE1pkhvYFSllRKcluy1Lqgrb4H7QFKiUSJB2kbJX2XpH/h9BIj4Ga45GIgqG1/KKIp0YeB4l5nYvOafajMnIlemLN09JBJVAjHbcAQtS79Rei+cUY3SdDs1jk5i/dVs+edXOxliWeR2tfs3Ba7hc+tLqE1cf0CdZiD8pSwtgds88aGcYXDnp/SICbQ6ulGf3mqlRLPDx6n/agb5h34hSvxJyZhHieVGTnGYfJsRpyDdG9E/HGZVbaYNm6KwVqVSN7zyjVOV/PA3Czy5eCaD+2A8BEU1idLB6F8NOW7G4YIrEM4gvXh7fKOIdNOCXpRqs5m3H4IC3TEHwTwkuc03IO7P6OWvU8WMPBOrDJZbfnaKGUSZtTvDTBIihHN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 17:09:49.4431 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b9fff9e1-8052-415d-9835-08de64d95ed4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B372.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR12MB9741 Hi, I got rid of the HVM_FEP condition on the #UD handler. v1: https://lore.kernel.org/xen-devel/20260122164943.20691-1-alejandro.garciavallejo@amd.com/ pipeline: https://gitlab.com/xen-project/people/agvallejo/xen/-/pipelines/2308391515 Original cover letter: As discussed in a prior RFC (https://lore.kernel.org/xen-devel/dc68b9ce-38aa-4949-b3e7-a7c0a7ee9a25@citrix.com/) this series drops cross-vendor support. It includes the policy check that was there and adds this on top: * Eliminates #UD handler when HVM_FEP is disabled. * Removes the cross-vendor checks from MSR handlers. * Eliminate Intel-behaviour hacks for SYSENTER on AMD handlers and drop intercept for SYSENTER. Open question unrelated to the series: Does it make sense to conditionalise the MSR handlers for non intercepted MSRs on HVM_FEP? Cheers, Alejandro Alejandro Vallejo (4): x86: Reject CPU policies with vendors other than the host's x86/hvm: Disable cross-vendor handling in #UD handler x86/hvm: Remove cross-vendor checks from MSR handlers. x86/svm: Drop emulation of Intel's SYSENTER behaviour on AMD systems CHANGELOG.md | 5 ++ xen/arch/x86/hvm/hvm.c | 77 +++++++++--------------- xen/arch/x86/hvm/svm/svm.c | 45 ++++++-------- xen/arch/x86/hvm/svm/vmcb.c | 3 + xen/arch/x86/hvm/vmx/vmx.c | 3 +- xen/arch/x86/include/asm/hvm/svm-types.h | 10 --- xen/arch/x86/msr.c | 8 +-- xen/lib/x86/policy.c | 3 +- 8 files changed, 64 insertions(+), 90 deletions(-) base-commit: 3d11d55e19b749697ea7c3799c264b83f5a57a80 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 17:10:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 17:10:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222284.1530287 (Exim 4.92) (envelope-from ) id 1vo2rk-0003yt-FV; Thu, 05 Feb 2026 17:10:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222284.1530287; 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AMD CPUs ignore the top 32 bits of the SYSENTER/SYSEXIT MSRs, which is not how this emulation worked due to the need for cross-vendor support. Any AMD VMs storing state in the top 32bits of the SEP MSRs will lose it. It's very unlikely to affect any production VM because having 64bit width just isn't how real AMD CPUs behave. Signed-off-by: Alejandro Vallejo Reviewed-by: Teddy Astie --- v2: * Reworded commit message to mention the loss of the top dword for any VM stupid enough to use it. --- xen/arch/x86/hvm/svm/svm.c | 42 +++++++++++------------- xen/arch/x86/hvm/svm/vmcb.c | 3 ++ xen/arch/x86/include/asm/hvm/svm-types.h | 10 ------ 3 files changed, 22 insertions(+), 33 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 10d1bf350c..329c4446e9 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -401,10 +401,6 @@ static int svm_vmcb_save(struct vcpu *v, struct hvm_hw_cpu *c) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - c->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs; - c->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp; - c->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip; - if ( vmcb->event_inj.v && hvm_event_needs_reinjection(vmcb->event_inj.type, vmcb->event_inj.vector) ) @@ -468,11 +464,6 @@ static int svm_vmcb_restore(struct vcpu *v, struct hvm_hw_cpu *c) svm_update_guest_cr(v, 0, 0); svm_update_guest_cr(v, 4, 0); - /* Load sysenter MSRs into both VMCB save area and VCPU fields. */ - vmcb->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs = c->sysenter_cs; - vmcb->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp = c->sysenter_esp; - vmcb->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip = c->sysenter_eip; - if ( paging_mode_hap(v->domain) ) { vmcb_set_np(vmcb, true); @@ -501,6 +492,9 @@ static void svm_save_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; + data->sysenter_cs = vmcb->sysenter_cs; + data->sysenter_esp = vmcb->sysenter_esp; + data->sysenter_eip = vmcb->sysenter_eip; data->shadow_gs = vmcb->kerngsbase; data->msr_lstar = vmcb->lstar; data->msr_star = vmcb->star; @@ -512,11 +506,14 @@ static void svm_load_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - vmcb->kerngsbase = data->shadow_gs; - vmcb->lstar = data->msr_lstar; - vmcb->star = data->msr_star; - vmcb->cstar = data->msr_cstar; - vmcb->sfmask = data->msr_syscall_mask; + vmcb->sysenter_cs = data->sysenter_cs; + vmcb->sysenter_esp = data->sysenter_esp; + vmcb->sysenter_eip = data->sysenter_eip; + vmcb->kerngsbase = data->shadow_gs; + vmcb->lstar = data->msr_lstar; + vmcb->star = data->msr_star; + vmcb->cstar = data->msr_cstar; + vmcb->sfmask = data->msr_syscall_mask; v->arch.hvm.guest_efer = data->msr_efer; svm_update_guest_efer(v); } @@ -1720,12 +1717,9 @@ static int cf_check svm_msr_read_intercept( switch ( msr ) { - /* - * Sync not needed while the cross-vendor logic is in unilateral effect. case MSR_IA32_SYSENTER_CS: case MSR_IA32_SYSENTER_ESP: case MSR_IA32_SYSENTER_EIP: - */ case MSR_STAR: case MSR_LSTAR: case MSR_CSTAR: @@ -1740,13 +1734,15 @@ static int cf_check svm_msr_read_intercept( switch ( msr ) { case MSR_IA32_SYSENTER_CS: - *msr_content = v->arch.hvm.svm.guest_sysenter_cs; + *msr_content = vmcb->sysenter_cs; break; + case MSR_IA32_SYSENTER_ESP: - *msr_content = v->arch.hvm.svm.guest_sysenter_esp; + *msr_content = vmcb->sysenter_esp; break; + case MSR_IA32_SYSENTER_EIP: - *msr_content = v->arch.hvm.svm.guest_sysenter_eip; + *msr_content = vmcb->sysenter_eip; break; case MSR_STAR: @@ -1940,11 +1936,11 @@ static int cf_check svm_msr_write_intercept( switch ( msr ) { case MSR_IA32_SYSENTER_ESP: - vmcb->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp = msr_content; + vmcb->sysenter_esp = msr_content; break; case MSR_IA32_SYSENTER_EIP: - vmcb->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip = msr_content; + vmcb->sysenter_eip = msr_content; break; case MSR_LSTAR: @@ -1970,7 +1966,7 @@ static int cf_check svm_msr_write_intercept( break; case MSR_IA32_SYSENTER_CS: - vmcb->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs = msr_content; + vmcb->sysenter_cs = msr_content; break; case MSR_STAR: diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..76fcaf15c2 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -97,6 +97,9 @@ static int construct_vmcb(struct vcpu *v) svm_disable_intercept_for_msr(v, MSR_LSTAR); svm_disable_intercept_for_msr(v, MSR_STAR); svm_disable_intercept_for_msr(v, MSR_SYSCALL_MASK); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_ESP); vmcb->_msrpm_base_pa = virt_to_maddr(svm->msrpm); vmcb->_iopm_base_pa = __pa(v->domain->arch.hvm.io_bitmap); diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 051b235d8f..aaee91b4b6 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -27,16 +27,6 @@ struct svm_vcpu { /* VMCB has a cached instruction from #PF/#NPF Decode Assist? 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While at it, refactor the function to exit early and skip initialising the emulation context when FEP is not enabled. No functional change intended. Signed-off-by: Alejandro Vallejo --- The diff is annoying, but keeping prior logic is silly when it can be simplified and the emulation context initialisation removed on the overwhelming majority of cases. v2: * Fix bug introduced in v1: Don't emulate instructions when they shouldn't be emulated. * Refactor the function so it's simpler. --- xen/arch/x86/hvm/hvm.c | 77 +++++++++++++++----------------------- xen/arch/x86/hvm/svm/svm.c | 3 +- xen/arch/x86/hvm/vmx/vmx.c | 3 +- 3 files changed, 32 insertions(+), 51 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 4d37a93c57..8708af9425 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3832,69 +3832,47 @@ int hvm_descriptor_access_intercept(uint64_t exit_info, return X86EMUL_OKAY; } -static bool cf_check is_cross_vendor( - const struct x86_emulate_state *state, const struct x86_emulate_ctxt *ctxt) -{ - switch ( ctxt->opcode ) - { - case X86EMUL_OPC(0x0f, 0x05): /* syscall */ - case X86EMUL_OPC(0x0f, 0x34): /* sysenter */ - case X86EMUL_OPC(0x0f, 0x35): /* sysexit */ - return true; - } - - return false; -} - void hvm_ud_intercept(struct cpu_user_regs *regs) { struct vcpu *cur = current; - bool should_emulate = - cur->domain->arch.cpuid->x86_vendor != boot_cpu_data.x86_vendor; struct hvm_emulate_ctxt ctxt; + const struct segment_register *cs = &ctxt.seg_reg[x86_seg_cs]; + uint32_t walk = PFEC_insn_fetch; + unsigned long addr; + char sig[5]; /* ud2; .ascii "xen" */ - hvm_emulate_init_once(&ctxt, opt_hvm_fep ? NULL : is_cross_vendor, regs); + if ( !opt_hvm_fep ) + goto reinject; - if ( opt_hvm_fep ) - { - const struct segment_register *cs = &ctxt.seg_reg[x86_seg_cs]; - uint32_t walk = ((ctxt.seg_reg[x86_seg_ss].dpl == 3) - ? PFEC_user_mode : 0) | PFEC_insn_fetch; - unsigned long addr; - char sig[5]; /* ud2; .ascii "xen" */ - - if ( hvm_virtual_to_linear_addr(x86_seg_cs, cs, regs->rip, - sizeof(sig), hvm_access_insn_fetch, - cs, &addr) && - (hvm_copy_from_guest_linear(sig, addr, sizeof(sig), - walk, NULL) == HVMTRANS_okay) && - (memcmp(sig, "\xf\xb" "xen", sizeof(sig)) == 0) ) - { - regs->rip += sizeof(sig); - regs->eflags &= ~X86_EFLAGS_RF; + hvm_emulate_init_once(&ctxt, NULL, regs); - /* Zero the upper 32 bits of %rip if not in 64bit mode. */ - if ( !(hvm_long_mode_active(cur) && cs->l) ) - regs->rip = (uint32_t)regs->rip; + if ( ctxt.seg_reg[x86_seg_ss].dpl == 3 ) + walk |= PFEC_user_mode; - add_taint(TAINT_HVM_FEP); + if ( hvm_virtual_to_linear_addr(x86_seg_cs, cs, regs->rip, + sizeof(sig), hvm_access_insn_fetch, + cs, &addr) && + (hvm_copy_from_guest_linear(sig, addr, sizeof(sig), + walk, NULL) == HVMTRANS_okay) && + (memcmp(sig, "\xf\xb" "xen", sizeof(sig)) == 0) ) + { + regs->rip += sizeof(sig); + regs->eflags &= ~X86_EFLAGS_RF; - should_emulate = true; - } - } + /* Zero the upper 32 bits of %rip if not in 64bit mode. */ + if ( !(hvm_long_mode_active(cur) && cs->l) ) + regs->rip = (uint32_t)regs->rip; - if ( !should_emulate ) - { - hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); - return; + add_taint(TAINT_HVM_FEP); } + else + goto reinject; switch ( hvm_emulate_one(&ctxt, VIO_no_completion) ) { case X86EMUL_UNHANDLEABLE: case X86EMUL_UNIMPLEMENTED: - hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); - break; + goto reinject; case X86EMUL_EXCEPTION: hvm_inject_event(&ctxt.ctxt.event); /* fall through */ @@ -3902,6 +3880,11 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) hvm_emulate_writeback(&ctxt); break; } + + return; + + reinject: + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); } enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..10d1bf350c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -589,8 +589,7 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) const struct cpu_policy *cp = v->domain->arch.cpu_policy; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v2 3/4] x86/hvm: Remove cross-vendor checks from MSR handlers. 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Signed-off-by: Alejandro Vallejo Reviewed-by: Teddy Astie --- v2: * Use boot_cpu_data rather than policy vendor. --- xen/arch/x86/msr.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ad75a2e108..d10891dcfc 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -169,9 +169,9 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) break; case MSR_IA32_PLATFORM_ID: - if ( !(cp->x86_vendor & X86_VENDOR_INTEL) || - !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) ) + if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ) goto gp_fault; + rdmsrl(MSR_IA32_PLATFORM_ID, *val); break; @@ -189,9 +189,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * from Xen's last microcode load, which can be forwarded straight to * the guest. */ - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || - !(boot_cpu_data.x86_vendor & - (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || + if ( !(boot_cpu_data.vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || rdmsr_safe(MSR_AMD_PATCHLEVEL, val) ) goto gp_fault; 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Reject any CPU policy with vendors not matching the host's. Signed-off-by: Alejandro Vallejo --- v2: * Reversed polarity of leaf0 check in policy compatibility helper. * Reworded changelog entry in terms of LM + save/restore. --- CHANGELOG.md | 5 +++++ xen/lib/x86/policy.c | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20..426c0bce67 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -22,6 +22,11 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - Xenoprofile support. Oprofile themselves removed support for Xen in 2014 prior to the version 1.0 release, and there has been no development since before then in Xen. + - Domains can no longer run on a CPU vendor if they were initially launched + on a different CPU vendor. This affects live migrations and save/restore + workflows accross mixed-vendor hosts. Cross-vendor emulation has always + been unreliable, but since 2017 with the advent of speculation security it + became unsustainably so. - Removed xenpm tool on non-x86 platforms as it doesn't actually provide anything useful outside of x86. diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f033d22785..079c42a29b 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->basic.max_leaf > host->basic.max_leaf ) + if ( (guest->x86_vendor != host->x86_vendor) || + (guest->basic.max_leaf > host->basic.max_leaf) ) FAIL_CPUID(0, NA); if ( guest->feat.max_subleaf > host->feat.max_subleaf ) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 17:27:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 17:27:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222350.1530323 (Exim 4.92) (envelope-from ) id 1vo38p-0008Vp-IN; Thu, 05 Feb 2026 17:27:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222350.1530323; Thu, 05 Feb 2026 17:27:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo38p-0008Vi-Ft; Thu, 05 Feb 2026 17:27:43 +0000 Received: by outflank-mailman (input) for mailman id 1222350; Thu, 05 Feb 2026 17:27:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo38o-0008VM-1s for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 17:27:42 +0000 Received: from mail177-22.suw61.mandrillapp.com (mail177-22.suw61.mandrillapp.com [198.2.177.22]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f5dd2567-02b7-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 18:27:36 +0100 (CET) Received: from pmta14.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail177-22.suw61.mandrillapp.com (Mailchimp) with ESMTP id 4f6PLG3fNRzGlsp6v for ; Thu, 5 Feb 2026 17:27:34 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 7cfb7669aa814b809b31d35be6213a93; Thu, 05 Feb 2026 17:27:34 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f5dd2567-02b7-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770312454; x=1770582454; bh=5gJfGwa8o6GZ+PiMQ55z7D9ACCtS3gqDjblVe+fCVBA=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=MWMaFSb73wDOzC8isjdwjRcp/3W+PQduOiRpo9/tw2aSf48+Qi/KFJRy96F9jQvQK TyoQN/j+FdRzRsikN6SzHuoWzmp7ac6tQtIpTdu8GgJ0CIodeV5FDbE0NYWHFUag18 u0rAnGIMLpRSaGC435Otm/tEUYc27e89Rpsbo3WZNBFON5W3xqkqGH0FhTgqadPStG nqDy8ezobHMexNBV7D1EPfKwUoHW+PwZN1zpfq6OinJAXLMPfwQC2T9lBRCjeYBAuG e4NSdPbfk+wAzqBTf64NDfXaZU3n/u5aF+bzb6dSTULni23OxxOnmsEeBh2KoXNCTx xbphBVYIFhC0g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770312454; x=1770572954; i=teddy.astie@vates.tech; bh=5gJfGwa8o6GZ+PiMQ55z7D9ACCtS3gqDjblVe+fCVBA=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=l21pjyEdHcYVojj4hazmeGQyXw7PUJkg75zstX2vKZXndO61UMEJ6CpoQOVzucFzV waD8t55flxQfNU+ZiNy9HAxy3sfyXN6jZOmurNzi0qaofFdpI/Qjp0Vd5UxgIL5cxx 3uiwCt6OW4O4Mv/axffFgO9P42SYw1GbuT7buUMiMSzAIyD8AL61UpJ5flmBEeD5B9 8S9n2gTsp98dnp8EK1yEnYlFanfktw9R91ocS/ZSdCrYz4xFRjxZDKa2axkERmzGoS NADhziIDj2AlR+37NtDiPu0KU0ir9qVrgxckF6x3EY2OcmK31p3ePa9RCnI12sYRly fBo7B9dci9HtQ== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH]=20efi:=20Enable=20EFI=5FSET=5FVIRTUAL=5FADDRESS=5FMAP=20by=20default?= X-Mailer: git-send-email 2.52.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770312452868 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Daniel P. Smith" , "=?utf-8?Q?Marek=20Marczykowski-G=C3=B3recki?=" Message-Id: <82dfede43d81c2072f90b01d12fe5ef18c80fc24.1770312308.git.teddy.astie@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.7cfb7669aa814b809b31d35be6213a93?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260205:md Date: Thu, 05 Feb 2026 17:27:34 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Many machines fail to boot if this option is disabled, as there are no known drawback toggling this option, enable it by default. Signed-off-by: Teddy Astie --- CC: Daniel P. Smith CC: Marek Marczykowski-G=C3=B3recki xen/common/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index d7e79e752a..49dea2412d 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -363,13 +363,14 @@ config KEXEC config EFI_SET_VIRTUAL_ADDRESS_MAP bool "EFI: call SetVirtualAddressMap()" if EXPERT + default y help Call EFI SetVirtualAddressMap() runtime service to setup memory map = for further runtime services. According to UEFI spec, it isn't strictly necessary, but many UEFI implementations misbehave when this call is missing. - If unsure, say N. + If unsure, say Y. config XSM =09bool "Xen Security Modules support" -- 2.52.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 05 18:31:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 18:31:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222390.1530333 (Exim 4.92) (envelope-from ) id 1vo48Q-0000fI-Lt; Thu, 05 Feb 2026 18:31:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222390.1530333; Thu, 05 Feb 2026 18:31:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo48Q-0000fB-Ih; Thu, 05 Feb 2026 18:31:22 +0000 Received: by outflank-mailman (input) for mailman id 1222390; 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Message-ID: <5397aef0-2103-4775-af45-49a100be7ab6@citrix.com> Date: Thu, 5 Feb 2026 18:31:04 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: Re: [PATCH v3] x86/domain: adjust limitation on shared_info allocation below 4G To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260205080308.91057-1-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <20260205080308.91057-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P123CA0671.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:351::11) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|SA2PR03MB5916:EE_ X-MS-Office365-Filtering-Correlation-Id: 5b963a33-6f67-4269-1a5f-08de64e4ba7b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016; 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> d->arch.pv.is_32bit = true; > > + /* > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > + * field within the guest's start_info structure. We might need to free > + * the current page and allocate a new one that fulfills this requirement. > + */ > + if ( virt_to_maddr(d->shared_info) >> 32 ) > + { > + shared_info_t *prev = d->shared_info; > + > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > + if ( !d->shared_info ) > + { > + d->shared_info = prev; > + rc = -ENOMEM; > + goto undo_and_fail; > + } > + put_page(virt_to_page(prev)); > + clear_page(d->shared_info); > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > + /* > + * Ensure all pointers to the old shared_info page are replaced. vCPUs > + * below XEN_LEGACY_MAX_VCPUS will stash a pointer to > + * shared_info->vcpu_info[id]. > + */ > + for_each_vcpu ( d, v ) > + vcpu_info_reset(v); Sorry, I missed something.  Reading this in full, there's an obvious (risk of) UAF. put_page(virt_to_page(prev)) needs to be no earlier than here, or we've freed a page that we still have pointers pointing at. In practice, I expect that the global domctl lock protects us from anything actually going wrong. Nevertheless, for the sake of reordering the actions in this block, lets just fix it. ~Andrew > + } > + > for_each_vcpu( d, v ) > { > if ( (rc = setup_compat_arg_xlat(v)) || > From xen-devel-bounces@lists.xenproject.org Thu Feb 05 18:37:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 18:37:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222404.1530345 (Exim 4.92) (envelope-from ) id 1vo4Ei-0001KP-Fh; Thu, 05 Feb 2026 18:37:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222404.1530345; Thu, 05 Feb 2026 18:37:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo4Ei-0001KI-B4; Thu, 05 Feb 2026 18:37:52 +0000 Received: by outflank-mailman (input) for mailman id 1222404; Thu, 05 Feb 2026 18:37:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo4Eg-0001K8-VZ for xen-devel@lists.xenproject.org; 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> > d->arch.pv.is_32bit = true; > > > > + /* > > + * For 32bit PV guests the shared_info machine address must fit in a 32-bit > > + * field within the guest's start_info structure. We might need to free > > + * the current page and allocate a new one that fulfills this requirement. > > + */ > > + if ( virt_to_maddr(d->shared_info) >> 32 ) > > + { > > + shared_info_t *prev = d->shared_info; > > + > > + d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32)); > > + if ( !d->shared_info ) > > + { > > + d->shared_info = prev; > > + rc = -ENOMEM; > > + goto undo_and_fail; > > + } > > + put_page(virt_to_page(prev)); > > + clear_page(d->shared_info); > > + share_xen_page_with_guest(virt_to_page(d->shared_info), d, SHARE_rw); > > + /* > > + * Ensure all pointers to the old shared_info page are replaced. vCPUs > > + * below XEN_LEGACY_MAX_VCPUS will stash a pointer to > > + * shared_info->vcpu_info[id]. > > + */ > > + for_each_vcpu ( d, v ) > > + vcpu_info_reset(v); > > Sorry, I missed something.  Reading this in full, there's an obvious > (risk of) UAF. > > put_page(virt_to_page(prev)) needs to be no earlier than here, or we've > freed a page that we still have pointers pointing at. > > In practice, I expect that the global domctl lock protects us from > anything actually going wrong. > > Nevertheless, for the sake of reordering the actions in this block, lets > just fix it. Yeah, I've already made that change. At this point in the domain life cycle and with d->tot_pages == 0 and the domctl lock held, the vcpu info area shouldn't be updated in parallel to the bitnewss being changed, but better make this in the right order. Thanks for spotting, Roger. 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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH] xen/arm: fix unmapped access trapping on GICv2 hardware Date: Thu, 5 Feb 2026 14:01:27 -0500 Message-ID: <20260205190128.38716-1-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000055DB:EE_|IA1PR12MB8587:EE_ X-MS-Office365-Filtering-Correlation-Id: cb3923c0-f86b-4019-62d1-08de64ea39f5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?pBalMKYHX5a4Z1gkHiTkzuZsJuBxNUcqrISTEn3zW1nOeTOyacwLEAsrToQk?= =?us-ascii?Q?E6wmpNa/vWdQeCjG0QvwEpY6KeO0Xvtt6dKWCCOry0aY4HPyeVRaN+7r2LJg?= =?us-ascii?Q?X1DmPoNSISQeFPzqjNKeg9Mc3bRKkkxTYVEYlcFC8vlj0wJaqxZtBr94HhwB?= =?us-ascii?Q?vnpJzanR02KnscPkvvlCO5SC+bqZxr31hinXAKR8PYEDGxvZavd/ED1ot7QO?= =?us-ascii?Q?vMxqZ6IrjpHlZvYQj4vaDZfe2u+hxA7d+ixIa8AYuIxaV30ge5lCOpV7Ikjr?= =?us-ascii?Q?RnV35wKKU+wicpu3ulTcRt9OernLZcOV1cxYtBxIUCC/nEfFo17u7MHurJYF?= =?us-ascii?Q?Z+oLCPF731HamdiL5vR/8W290p3O4sStpP6usrLSwXcYeg4IQjVtUro9iaJd?= =?us-ascii?Q?NoYCXJbLNX2wIDwTuu+vc6TNojpSgj1Ov2mLcp00uSMSVh7G80ASuUtQtiSR?= =?us-ascii?Q?qTd+B6TQcZ25WVpZqDFFH/i74KYLq9mjqZabNdE+W7diggWRmSR9PPPLXcBP?= =?us-ascii?Q?Ckh+5FNBg/ptg3/UY6NHYDlxJRzameMbcr5Ua0QLJUvr6W5rBcjUfm1jsvML?= =?us-ascii?Q?2oJORH3PxDbtCpWa5TkNZLBRV80hKrOt0t1zM9Wd4ZLRr3xp+5zsZyh7kZaH?= =?us-ascii?Q?iVkF9IsjAch3s79M6oMjukA3f3TB+QErY1b1w9qT+7JG8I8osDVOFYTwg4hl?= =?us-ascii?Q?hWEqWekL4lYhrfJGiiLMYqGgpRrw3eMYoWnZ+6BI0RhqHguKQ0KbnQ2LhGza?= =?us-ascii?Q?63eu+/xlYWpUpu65eEPDztJmfU67+VlCVGUyvGxPCiXQ3SANacsd6aTVrwq2?= =?us-ascii?Q?3jftte8H45orvFM1KW3VI8GHxPk+nLeBWRajJVLW8UYlXsfjnpZg0ZDeIxON?= =?us-ascii?Q?d8IO67DQ9BsHJeGaz4kqJPr0qyqOjabSZNfxW6USWx+/nUyYfVEYJYxg6Nle?= =?us-ascii?Q?ppaZWoCpUZ3wQgRRwfauNtH/Vog6Ui6jHZ7eogzYGC3Oti73zw4v4xR1+ocK?= =?us-ascii?Q?pbjZiYWgRXhX0Iz0MfJnvvenHD6kHf+HMPhp02IPJpRDRfs8R0v0H4kfos/X?= =?us-ascii?Q?lZFW1cAVlNGGkafgnRacGao2Cjdn8p5MNCPWToKaritXChdgd75PLSTEo/36?= =?us-ascii?Q?iVdU/1FZ2+xTZisDd6k27i8P4ZsHyGSQblZaaawr/HzAMrDUgrw4MunCwf5M?= =?us-ascii?Q?6XvYvQk8E23FFca+32B43CXPqNwuxYIg6nyFiOHIDWvyhgvJbAss1oekS3Ds?= =?us-ascii?Q?NiqZdMXfBaWivXl8/i89vfSMz/H6e/tWPjVVB/URaW6DbZkvmH2nCcI+YU2G?= =?us-ascii?Q?PaafD7WNwlEPtauLCe0I8ecl58H8t59QgwwSbiwcOMfAKHqJ8wlNuDcc3OGT?= =?us-ascii?Q?UL7Ryl+FYItAi2fDaDfL+SG7HOhN/atkq9SS8Nr/xtl7fl/YPRChK1S7ofvk?= =?us-ascii?Q?QpSXi60g68fvy8lhdXaolQqhKZGFW8lGTcV9u7V1H/iktOMDbb2GNd6Y7lVG?= =?us-ascii?Q?kRqFeje6GKScq2tcQwBDvCP8KAg2cz9L9N2rbtE4otjcEiRwoDYzvIpBmy3p?= =?us-ascii?Q?a8L0RisjpeJPESOYdbhTalVLk7sl7Z8d7G2jiPpXyd1OybC+VeNRFD3PlE3x?= =?us-ascii?Q?lQk3kPXQs1hwSw87kVI1hr+W1zkIr505KBM8cNvQdfnK?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oZZpie3V3KMD0f0CVryaanGX7cHG58JPTYYYVb56to3KzcHp35Z0UILNlAUCkaxXaKYQWiwsUpVU25EQAU8rWlzTMvz+fKaGatQB4eG37GTn7ItBZZszpQlWbZolxtWPTExtXmfdrefY6no4Cw/XIHZdPIsDtmXE04Acz2gcDq2xyQTi2fIcr6GBgZWN/0DbC3G0D0eFOOIFIoxz2t0xCZ/LF4o7h6KWjGu4qM/yXXqv4G4AJqQkZDWLFQoE6LXQeRpPTcxVxJpG9txLMEGqJCZHhDrWdXyBRH21OTtFLt8/GoUSJfEL3TS5cFzv6zXNVRzBeVR0rpVYPIaCd+U1LpCN+tlzPeqEkeBZusl5cd/8S0eFU4tnFj9XwBJVw6dYaqsL31DM3aIA9aSjiT25ZK1/iTiSIEvimdDngHhsZxxwOsB257mXpOaZtBX+Z75q X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 19:10:29.0285 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb3923c0-f86b-4019-62d1-08de64ea39f5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000055DB.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8587 Since 4dbcb0653621, the vGICv2 CPU interface is mapped in a deferred manner. On domains with XEN_DOMCTL_CDF_trap_unmapped_accesses unset on GICv2 hardware, the vGICv2 CPU interface fails to be mapped. A visible symptom is that a domU gets stuck at: [ 0.177983] smp: Bringing up secondary CPUs ... Move the 2nd check_p2m earlier so it's prioritized over try_handle_mmio. Fixes: 980aff4e8fcd ("xen/arm: Add way to disable traps on accesses to unmapped addresses") Signed-off-by: Stewart Hildebrand --- This should be backported to 4.21. Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2010469665 --- xen/arch/arm/traps.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 040c0f2e0db1..0c01f37ad6b4 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1915,6 +1915,14 @@ static void do_trap_stage2_abort_guest(struct cpu_user_regs *regs, if ( info.dabt_instr.state == INSTR_ERROR ) goto inject_abt; + /* + * If the instruction syndrome was invalid, then we already checked if + * this was due to a P2M fault. So no point to check again as the result + * will be the same. + */ + if ( (info.dabt_instr.state == INSTR_VALID) && check_p2m(is_data, gpa) ) + return; + state = try_handle_mmio(regs, &info); switch ( state ) @@ -1939,14 +1947,6 @@ static void do_trap_stage2_abort_guest(struct cpu_user_regs *regs, break; } - /* - * If the instruction syndrome was invalid, then we already checked if - * this was due to a P2M fault. So no point to check again as the result - * will be the same. - */ - if ( (info.dabt_instr.state == INSTR_VALID) && check_p2m(is_data, gpa) ) - return; - break; } default: -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 05 22:09:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 22:09:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222540.1530363 (Exim 4.92) (envelope-from ) id 1vo7XO-0001BK-Oo; Thu, 05 Feb 2026 22:09:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222540.1530363; Thu, 05 Feb 2026 22:09:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo7XO-0001BD-MM; Thu, 05 Feb 2026 22:09:22 +0000 Received: by outflank-mailman (input) for mailman id 1222540; Thu, 05 Feb 2026 22:09:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vo7XN-0001B6-F8 for xen-devel@lists.xenproject.org; Thu, 05 Feb 2026 22:09:21 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [2600:3c04:e001:324:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4e7341f9-02df-11f1-9ccf-f158ae23cfc8; Thu, 05 Feb 2026 23:09:15 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id AFC6D60010; Thu, 5 Feb 2026 22:09:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0486EC4CEF7; Thu, 5 Feb 2026 22:09:10 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e7341f9-02df-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770329353; bh=V9dFLTZQkqWpJ3YszT3cuHPxhfkzSeZqTHI4J6BzA/w=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=chKqnAXC1YmgMSWLq9I7uASagoeYHlcrQaEuqMn7uPD5Xj4AX6WFiG3JBiwa34Hq+ 91xHgt5vjyYTDD0DCoDOA5a9dnZbQ96dteNWLq6XJUKWHc0BJr2BMFK90/MZVSpd2B PyJkkgfEQPkVk9npJKlw/SitrNGb9ao9ZEtyHOOxvWfXtMhQ1w95JD9Cp0nmTr1lfp RD6RycqR2CJCY1TF0+2dvsBMt3k0SmLM0Xj29HdFw5k4/emyPqsRzRczmm7u5XoPny SCWo5hE5NMGWEYF6dy2O0ugbRiBg9dKggTFKI0tcq3nh00U4/bjyyE4cOLLO1yUUqE 9Z93+3V6f8E1A== Date: Thu, 5 Feb 2026 14:09:07 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: dmukhin@xen.org cc: Stefano Stabellini , xen-devel@lists.xenproject.org, grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, jbeulich@suse.com, sstabellini@kernel.org Subject: Re: [PATCH v10 5/5] xen: enable dom0less guests to use console_io hypercalls In-Reply-To: Message-ID: References: <20260204233712.3396752-5-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 4 Feb 2026, dmukhin@xen.org wrote: > On Wed, Feb 04, 2026 at 03:37:12PM -0800, Stefano Stabellini wrote: > > Enable dom0less guests on ARM to use console_io hypercalls: > > - set input_allow = true for dom0less domains > > - update the in-code comment in console.c > > - prioritize the VUART check to retain the same behavior as today > > > > Signed-off-by: Stefano Stabellini > > The code looks good, just one remark wrt prioritizing VUART check. > > > --- > > xen/common/device-tree/dom0less-build.c | 2 ++ > > xen/drivers/char/console.c | 16 ++++++++++------ > > 2 files changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c > > index 840d14419d..cb7026fa7e 100644 > > --- a/xen/common/device-tree/dom0less-build.c > > +++ b/xen/common/device-tree/dom0less-build.c > > @@ -829,6 +829,8 @@ static int __init construct_domU(struct kernel_info *kinfo, > > > > rangeset_destroy(kinfo->xen_reg_assigned); > > > > + d->console->input_allowed = true; > > + > > return rc; > > } > > > > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > > index d3ce925131..7f0c3d8376 100644 > > --- a/xen/drivers/char/console.c > > +++ b/xen/drivers/char/console.c > > @@ -610,11 +610,20 @@ static void __serial_rx(char c) > > if ( ACCESS_ONCE(console_rx) == 0 ) > > return handle_keypress(c, false); > > > > + /* Includes an is_focus_domain() check. */ > > d = console_get_domain(); > > if ( !d ) > > return; > > > > - if ( is_hardware_domain(d) ) > > Hardware domain on x86 may have an emulated UART (not in upstream, through, > I need to send v8 for NS16550 series...). The patch which illustrates the > idea: > https://lore.kernel.org/xen-devel/20250908211149.279143-2-dmukhin@ford.com/ > > So this code (hopefully soon) will need adjustment again. > > I would update the code to something like: > > > > if ( is_hardware_domain(d) && !domain_has_vuart(d) ) > { > // handle hardware domain > } > #ifdef CONFIG_SBSA_VUART_CONSOLE > else if ( domain_has_vuart(d) ) > /* Deliver input to the emulated UART. */ > rc = vpl011_rx_char_xen(d, c); > #endif > > > > But domain_has_vuart() needs to be defined for all architectures > (currently it is hidden in arch/arm/vuart.c). > > Or perhaps it is possible to postpone the change? This change is needed to avoid regressions on ARM. However, while I wouldn't be surprised if we need a change here for your upcoming patch series, at the same time at the moment I don't see why this check wouldn't work as it is for you as well. On x86, CONFIG_SBSA_VUART_CONSOLE will never be set. It is OK to do this first: #ifdef CONFIG_SBSA_VUART_CONSOLE /* Prioritize vpl011 if enabled for this domain */ if ( d->arch.vpl011.base_addr ) { /* Deliver input to the emulated UART. */ rc = vpl011_rx_char_xen(d, c); } else #endif It shouldn't hurt. The is_hardware_domain() check is also not necessary anymore because any necessary check would be part of this check above: d = console_get_domain(); if ( !d ) return; So I am guessing that your series might actually leave this code unchanged and instead might modify console_get_domain() or max_console_rx. > > +#ifdef CONFIG_SBSA_VUART_CONSOLE > > + /* Prioritize vpl011 if enabled for this domain */ > > + if ( d->arch.vpl011.base_addr ) > > + { > > + /* Deliver input to the emulated UART. */ > > + rc = vpl011_rx_char_xen(d, c); > > + } > > + else > > +#endif > > { > > unsigned long flags; > > > > @@ -633,11 +642,6 @@ static void __serial_rx(char c) > > */ > > send_guest_domain_virq(d, VIRQ_CONSOLE); > > } > > -#ifdef CONFIG_SBSA_VUART_CONSOLE > > - else > > - /* Deliver input to the emulated UART. */ > > - rc = vpl011_rx_char_xen(d, c); > > -#endif > > > > if ( consoled_is_enabled() ) > > /* Deliver input to the PV shim console. */ > > -- > > 2.25.1 > > > > > From xen-devel-bounces@lists.xenproject.org Thu Feb 05 23:19:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 05 Feb 2026 23:19:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222567.1530375 (Exim 4.92) (envelope-from ) id 1vo8d9-00011B-T4; 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Srinivasan" , "Haiyang Zhang" , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , , , , , , , Rahul Bukte , Daniel Palmer , Tim Bird , References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> From: Sohil Mehta In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR03CA0355.namprd03.prod.outlook.com (2603:10b6:a03:39c::30) To DS0PR11MB7997.namprd11.prod.outlook.com (2603:10b6:8:125::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7997:EE_|DM3PPFFCD58DF03:EE_ X-MS-Office365-Filtering-Correlation-Id: e7f12305-7a9c-4a40-c694-08de650cf272 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|7416014; 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So it did what the setting says > The expectation would be that firmware would restore to the same state before lapic_suspend(). > >>> Either way, a pr_warn maybe helpful. How about "x2apic re-enabled by the >>> firmware during resume. Disabling\n"? >> >> I mainly want to make sure the firmware is really at fault before we add >> such a print. But it seems likely now that the firmware messed up. Maybe a warning would be useful to encourage firmware to fix this going forward. I don't have a strong preference on the wording, but how about? pr_warn_once("x2apic unexpectedly re-enabled by the firmware during resume.\n"); A few nits: For the code comments, you can use more of the line width. Generally, 72 (perhaps even 80) chars is okay for comments dependent on the code in the vicinity. The tip tree has slightly unique preferences, such as capitalizing the first word of the patch title. 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Update all relevant domid_alloc() call sites and harden the domid_alloc() input value check. Also, fix problem with passing invalid domain IDs in XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) uses 0xffff as domain ID. Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") Signed-off-by: Denis Mukhin --- Changes since v4: - dropped ifdefery for DOMID_ANY in public header since symbol is needed in toolstack and stubdom code - fixed commentary for DOMID_ANY - fixed check do_domctl() - fixed libxl__domain_make() is toolstack which can pass invalid domain ID - hardended domain ID check in domid_alloc() - CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2308917328 --- tools/libs/light/libxl_create.c | 9 ++++----- tools/tests/domid/harness.h | 1 + tools/tests/domid/test-domid.c | 12 ++++++------ xen/common/device-tree/dom0less-build.c | 2 +- xen/common/domctl.c | 3 +-- xen/common/domid.c | 5 ++++- xen/include/public/xen.h | 7 +++++++ 7 files changed, 24 insertions(+), 15 deletions(-) diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c index bfc9149096a3..714e71441498 100644 --- a/tools/libs/light/libxl_create.c +++ b/tools/libs/light/libxl_create.c @@ -676,15 +676,14 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config, if (ret < 0) break; - v &= DOMID_MASK; - if (!libxl_domid_valid_guest(v)) - continue; - - local_domid = v; + local_domid = v & DOMID_MASK; } else { local_domid = info->domid; /* May not be valid */ } + if (!libxl_domid_valid_guest(local_domid)) + local_domid = DOMID_ANY; + ret = xc_domain_create(ctx->xch, &local_domid, &create); if (ret < 0) { /* diff --git a/tools/tests/domid/harness.h b/tools/tests/domid/harness.h index 17eb22a9a854..65da0d075a2b 100644 --- a/tools/tests/domid/harness.h +++ b/tools/tests/domid/harness.h @@ -41,6 +41,7 @@ extern unsigned long find_next_zero_bit(const unsigned long *addr, #define DOMID_FIRST_RESERVED (100) #define DOMID_INVALID (101) +#define DOMID_ANY (102) #endif /* _TEST_HARNESS_ */ diff --git a/tools/tests/domid/test-domid.c b/tools/tests/domid/test-domid.c index 5915c4699a5c..71cc4e7fd86d 100644 --- a/tools/tests/domid/test-domid.c +++ b/tools/tests/domid/test-domid.c @@ -41,20 +41,20 @@ int main(int argc, char **argv) domid_free(expected); /* - * Test that that two consecutive calls of domid_alloc(DOMID_INVALID) + * Test that that two consecutive calls of domid_alloc(DOMID_ANY) * will never return the same ID. * NB: ID#0 is reserved and shall not be allocated by - * domid_alloc(DOMID_INVALID). + * domid_alloc(DOMID_ANY). */ for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 3: expected %u allocated %u\n", expected, allocated); } for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == DOMID_INVALID, "TEST 4: expected %u allocated %u\n", DOMID_INVALID, allocated); } @@ -64,7 +64,7 @@ int main(int argc, char **argv) domid_free(expected); for ( expected = 1; expected < DOMID_FIRST_RESERVED / 2; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 5: expected %u allocated %u\n", expected, allocated); } @@ -72,7 +72,7 @@ int main(int argc, char **argv) /* Re-allocate last ID from [1..DOMID_FIRST_RESERVED - 1]. */ expected = DOMID_FIRST_RESERVED - 1; domid_free(DOMID_FIRST_RESERVED - 1); - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 6: expected %u allocated %u\n", expected, allocated); diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 840d14419da2..3c18dae5e625 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -852,7 +852,7 @@ void __init create_domUs(void) if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) panic("No more domain IDs available\n"); - domid = domid_alloc(DOMID_INVALID); + domid = domid_alloc(DOMID_ANY); if ( domid == DOMID_INVALID ) panic("Error allocating ID for domain %s\n", dt_node_name(node)); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 29a7726d32d0..35fa60e74d74 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -409,8 +409,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) case XEN_DOMCTL_createdomain: { - /* NB: ID#0 is reserved, find the first suitable ID instead. */ - domid_t domid = domid_alloc(op->domain ?: DOMID_INVALID); + domid_t domid = domid_alloc(op->domain); if ( domid == DOMID_INVALID ) { diff --git a/xen/common/domid.c b/xen/common/domid.c index 2387ddb08300..b0258e477c1a 100644 --- a/xen/common/domid.c +++ b/xen/common/domid.c @@ -19,7 +19,7 @@ static DECLARE_BITMAP(domid_bitmap, DOMID_FIRST_RESERVED); * @param domid Domain ID hint: * - If an explicit domain ID is provided, verify its availability and use it * if ID is not used; - * - If DOMID_INVALID is provided, search [1..DOMID_FIRST_RESERVED-1] range, + * - If DOMID_ANY is provided, search [1..DOMID_FIRST_RESERVED-1] range, * starting from the last used ID. Implementation guarantees that two * consecutive calls will never return the same ID. ID#0 is reserved for * the first boot domain (currently, dom0) and excluded from the allocation @@ -31,6 +31,9 @@ domid_t domid_alloc(domid_t domid) { static domid_t domid_last; + if ( domid >= DOMID_FIRST_RESERVED && domid != DOMID_ANY ) + return DOMID_INVALID; + spin_lock(&domid_lock); /* Exact match. */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index b12fd10e6315..f35a6f21f063 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -608,6 +608,13 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); /* DOMID_INVALID is used to identify pages with unknown owner. */ #define DOMID_INVALID xen_mk_uint(0x7FF4) +/* + * DOMID_ANY is used to signal no specific domain ID requested. + * Handler should pick a valid ID, or handle it as a broadcast value + * depending on the context. + */ +#define DOMID_ANY xen_mk_uint(0x7FF5) + /* Idle domain. */ #define DOMID_IDLE xen_mk_uint(0x7FFF) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 00:11:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 00:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222609.1530394 (Exim 4.92) (envelope-from ) id 1vo9R7-0000vd-Np; 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But > the name x2apic_available doesn't reflect that usage. > I don't understand the premise of this patch. Shouldn't the variable name reflect what is stored rather than how it is used? > This is what x2apic_available is set to for various hypervisors: > > acrn boot_cpu_has(X86_FEATURE_X2APIC) > mshyperv boot_cpu_has(X86_FEATURE_X2APIC) > xen boot_cpu_has(X86_FEATURE_X2APIC) or false > vmware vmware_legacy_x2apic_available > kvm kvm_cpuid_base() != 0 > jailhouse x2apic_enabled() > bhyve true > default false > If both interrupt remapping and x2apic are enabled, what would the name x2apic_without_ir_available signify? A value of "true" would mean x2apic is available without IR. But that would be inaccurate for most hypervisors. A value of "false" could be interpreted as x2apic is not available, which is also inaccurate. To me, x2apic_available makes more sense than x2apic_without_ir_available based on the values being set by the hypervisors. > Bare metal and vmware correctly check if x2apic is available without interrupt > remapping. The rest of them check if x2apic is enabled/supported, and kvm just > checks if the kernel is running on kvm. The other hypervisors may have to have > their checks audited. > AFAIU, the value on bare metal is set to false because this is a hypervisor specific variable. Perhaps I have misunderstood something? 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> > > > > > + d->console->input_allowed = true; > > > + > > > return rc; > > > } > > > > > > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > > > index d3ce925131..7f0c3d8376 100644 > > > --- a/xen/drivers/char/console.c > > > +++ b/xen/drivers/char/console.c > > > @@ -610,11 +610,20 @@ static void __serial_rx(char c) > > > if ( ACCESS_ONCE(console_rx) == 0 ) > > > return handle_keypress(c, false); > > > > > > + /* Includes an is_focus_domain() check. */ > > > d = console_get_domain(); > > > if ( !d ) > > > return; > > > > > > - if ( is_hardware_domain(d) ) > > > > Hardware domain on x86 may have an emulated UART (not in upstream, through, > > I need to send v8 for NS16550 series...). The patch which illustrates the > > idea: > > https://lore.kernel.org/xen-devel/20250908211149.279143-2-dmukhin@ford.com/ > > > > So this code (hopefully soon) will need adjustment again. > > > > I would update the code to something like: > > > > > > > > if ( is_hardware_domain(d) && !domain_has_vuart(d) ) > > { > > // handle hardware domain > > } > > #ifdef CONFIG_SBSA_VUART_CONSOLE > > else if ( domain_has_vuart(d) ) > > /* Deliver input to the emulated UART. */ > > rc = vpl011_rx_char_xen(d, c); > > #endif > > > > > > > > But domain_has_vuart() needs to be defined for all architectures > > (currently it is hidden in arch/arm/vuart.c). > > > > Or perhaps it is possible to postpone the change? > > This change is needed to avoid regressions on ARM. Oh, I see. > > However, while I wouldn't be surprised if we need a change here for your > upcoming patch series, at the same time at the moment I don't see why > this check wouldn't work as it is for you as well. > > On x86, CONFIG_SBSA_VUART_CONSOLE will never be set. It is OK to do this > first: > > #ifdef CONFIG_SBSA_VUART_CONSOLE > /* Prioritize vpl011 if enabled for this domain */ > if ( d->arch.vpl011.base_addr ) > { > /* Deliver input to the emulated UART. */ > rc = vpl011_rx_char_xen(d, c); > } > else > #endif > > It shouldn't hurt. The is_hardware_domain() check is also not necessary > anymore because any necessary check would be part of this check above: > > d = console_get_domain(); > if ( !d ) > return; > > So I am guessing that your series might actually leave this code > unchanged and instead might modify console_get_domain() or > max_console_rx. I think I did experiment w/ processing vUART before hardware domain locally when debugging NS16550 emulator with dom0 PVH... Thanks for explanations! Please consider: Reviewed-by: Denis Mukhin > > > > > > +#ifdef CONFIG_SBSA_VUART_CONSOLE > > > + /* Prioritize vpl011 if enabled for this domain */ > > > + if ( d->arch.vpl011.base_addr ) > > > + { > > > + /* Deliver input to the emulated UART. */ > > > + rc = vpl011_rx_char_xen(d, c); > > > + } > > > + else > > > +#endif > > > { > > > unsigned long flags; > > > > > > @@ -633,11 +642,6 @@ static void __serial_rx(char c) > > > */ > > > send_guest_domain_virq(d, VIRQ_CONSOLE); > > > } > > > -#ifdef CONFIG_SBSA_VUART_CONSOLE > > > - else > > > - /* Deliver input to the emulated UART. */ > > > - rc = vpl011_rx_char_xen(d, c); > > > -#endif > > > > > > if ( consoled_is_enabled() ) > > > /* Deliver input to the PV shim console. */ > > > -- > > > 2.25.1 > > > > > > > > From xen-devel-bounces@lists.xenproject.org Fri Feb 06 00:51:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 00:51:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222630.1530415 (Exim 4.92) (envelope-from ) id 1voA3r-0006Vp-TS; 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This patch changes the virq from > global to VIRQ_DOMAIN to allow other domains to bind to it. > > Note that Linux silently falls back to polling when binding fails, which > masks the issue. > > Signed-off-by: Jason Andryuk > Signed-off-by: Stefano Stabellini Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Fri Feb 06 01:32:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 01:32:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222658.1530423 (Exim 4.92) (envelope-from ) id 1voAi6-0002gG-Sx; Fri, 06 Feb 2026 01:32:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222658.1530423; Fri, 06 Feb 2026 01:32:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voAi6-0002g9-Pr; Fri, 06 Feb 2026 01:32:38 +0000 Received: by outflank-mailman (input) for mailman id 1222658; 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When disabled, this removes cpufreq code from the build. Add stubs where necessary. Signed-off-by: Stefano Stabellini --- xen/arch/x86/acpi/Makefile | 2 +- xen/common/Kconfig | 4 ++-- xen/drivers/Makefile | 2 +- xen/drivers/cpufreq/Kconfig | 16 +++++++++++++++- xen/include/acpi/cpufreq/cpufreq.h | 5 +++++ xen/include/xen/acpi.h | 8 +++++++- xen/include/xen/pmstat.h | 15 ++++++++++++++- xen/include/xen/sched.h | 9 +++++++-- 8 files changed, 52 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/acpi/Makefile b/xen/arch/x86/acpi/Makefile index 041377e2bb..aa476f65d5 100644 --- a/xen/arch/x86/acpi/Makefile +++ b/xen/arch/x86/acpi/Makefile @@ -1,4 +1,4 @@ -obj-y += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-y += lib.o power.o cpu_idle.o cpuidle_menu.o obj-bin-y += boot.init.o wakeup_prot.o diff --git a/xen/common/Kconfig b/xen/common/Kconfig index d7e79e752a..cddd7337bb 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -652,7 +652,7 @@ endmenu config PM_OP bool "Enable Performance Management Operation" - depends on ACPI && HAS_CPUFREQ && SYSCTL + depends on ACPI && CPUFREQ && SYSCTL default y help This option shall enable userspace performance management control @@ -660,7 +660,7 @@ config PM_OP config PM_STATS bool "Enable Performance Management Statistics" - depends on ACPI && HAS_CPUFREQ && SYSCTL + depends on ACPI && CPUFREQ && SYSCTL default y help Enable collection of performance management statistics to aid in diff --git a/xen/drivers/Makefile b/xen/drivers/Makefile index 2a1ae8ad13..3d81b8dde4 100644 --- a/xen/drivers/Makefile +++ b/xen/drivers/Makefile @@ -1,5 +1,5 @@ obj-y += char/ -obj-$(CONFIG_HAS_CPUFREQ) += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-$(CONFIG_HAS_PCI) += pci/ obj-$(CONFIG_HAS_VPCI) += vpci/ obj-$(CONFIG_HAS_PASSTHROUGH) += passthrough/ diff --git a/xen/drivers/cpufreq/Kconfig b/xen/drivers/cpufreq/Kconfig index cce80f4aec..49631f92de 100644 --- a/xen/drivers/cpufreq/Kconfig +++ b/xen/drivers/cpufreq/Kconfig @@ -1,3 +1,17 @@ - config HAS_CPUFREQ bool + +config CPUFREQ + bool "CPU Frequency scaling" + default y + depends on HAS_CPUFREQ + help + Enable CPU frequency scaling and power management governors. + This allows Xen to dynamically adjust CPU P-states (performance + states) based on system load. + + Disabling this option removes all cpufreq governors and power + management interfaces. This is useful for real-time systems or + minimal hypervisor builds. + + If unsure, say Y. diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 0171ccf0ba..a97c642a50 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -381,8 +381,13 @@ int write_ondemand_up_threshold(unsigned int up_threshold); int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); +#ifdef CONFIG_CPUFREQ void cpufreq_dbs_timer_suspend(void); void cpufreq_dbs_timer_resume(void); +#else +static inline void cpufreq_dbs_timer_suspend(void) {} +static inline void cpufreq_dbs_timer_resume(void) {} +#endif void intel_feature_detect(struct cpufreq_policy *policy); diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 90635ba0f3..7077c27150 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -185,8 +185,14 @@ static inline unsigned int acpi_get_csubstate_limit(void) { return 0; } static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } #endif -#ifdef XEN_GUEST_HANDLE +#if defined(XEN_GUEST_HANDLE) && defined(CONFIG_CPUFREQ) int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); +#elif defined(XEN_GUEST_HANDLE) +static inline int acpi_set_pdc_bits(unsigned int acpi_id, + XEN_GUEST_HANDLE(uint32) pdc) +{ + return -ENOSYS; +} #endif int arch_acpi_set_pdc_bits(u32 acpi_id, u32 *, u32 mask); diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h index 6096560d3c..4efddad438 100644 --- a/xen/include/xen/pmstat.h +++ b/xen/include/xen/pmstat.h @@ -5,10 +5,23 @@ #include /* for struct xen_processor_power */ #include /* for struct pm_cx_stat */ +#ifdef CONFIG_CPUFREQ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); -long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); int set_cppc_pminfo(unsigned int acpi_id, const struct xen_processor_cppc *cppc_data); +#else +static inline int set_px_pminfo(uint32_t acpi_id, + struct xen_processor_performance *perf) +{ + return -ENOSYS; +} +static inline int set_cppc_pminfo(unsigned int acpi_id, + const struct xen_processor_cppc *cppc_data) +{ + return -ENOSYS; +} +#endif +long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); #ifdef CONFIG_COMPAT struct compat_processor_performance; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..1b431fc726 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1255,9 +1255,14 @@ static always_inline bool is_iommu_enabled(const struct domain *d) extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; -extern enum cpufreq_controller { +enum cpufreq_controller { FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen -} cpufreq_controller; +}; +#ifdef CONFIG_CPUFREQ +extern enum cpufreq_controller cpufreq_controller; +#else +#define cpufreq_controller FREQCTL_none +#endif static always_inline bool is_cpufreq_controller(const struct domain *d) { -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 01:42:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 01:42:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222672.1530433 (Exim 4.92) (envelope-from ) id 1voArW-0004RO-Q3; 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engine=8.19.0-2601150000 definitions=main-2602060011 On Fri, Jan 23, 2026 at 05:25:18PM -0800, Stefano Stabellini wrote: > On Sat, 10 Jan 2026, dmukhin@xen.org wrote: > > From: Denis Mukhin > > > > Use the new make fragment to generate test harness code for > > the vPCI unit test. > > > > Add new prepare-harness target to tests/Rules.mk as an optional step for > > setting up mocked environment for building a test. > > > > Fix hypervisor headers used to compile vpci.c against host environment > > where necessary. > > > > Fixup emul.h by adding missing mocks to account for new unit test infra. > > > > Update .gitignore to exclude generated test build-time dependencies. > > > > Not a functional change. > > > > Signed-off-by: Denis Mukhin > > --- > > Changes since v1: > > - new patch > > --- > > tools/tests/Rules.mk | 5 +++- > > tools/tests/vpci/.gitignore | 2 ++ > > tools/tests/vpci/Makefile | 52 ++++++++++++------------------------- > > tools/tests/vpci/emul.h | 50 +++++++++++++---------------------- > > tools/tests/vpci/main.c | 2 -- > > xen/include/xen/irq.h | 2 ++ > > xen/include/xen/list.h | 2 ++ > > xen/include/xen/numa.h | 2 ++ > > xen/include/xen/pci.h | 2 ++ > > xen/include/xen/pfn.h | 2 ++ > > xen/include/xen/spinlock.h | 2 ++ > > xen/include/xen/types.h | 4 +++ > > 12 files changed, 56 insertions(+), 71 deletions(-) > > create mode 100644 tools/tests/vpci/.gitignore > > > > diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk > > index daa9e69301e4..26f3d00b5fb9 100644 > > --- a/tools/tests/Rules.mk > > +++ b/tools/tests/Rules.mk > > @@ -11,13 +11,16 @@ $(shell sed -n \ > > 's/^[ \t]*# *include[ \t]*[<"]\([^">]*\)[">].*/\1/p' $(1) 2>/dev/null) > > endef > > > > +.PHONY: prepare-harness > > +prepare-harness: > > + > > # Generate mock environment by replicating header file hierarchy; > > # each header file will point to a harness header. > > # > > # $1 target > > # $2 list of test harnesses > > define emit-harness-nested-rule > > -$(1): $(2) > > +$(1): prepare-harness $(2) > > set -e; \ > > mkdir -p $$(@D); \ > > for i in $(2); do [ -e $$@ ] || ln -s $$$$i $$@; done > > diff --git a/tools/tests/vpci/.gitignore b/tools/tests/vpci/.gitignore > > new file mode 100644 > > index 000000000000..d66c2cd56be6 > > --- /dev/null > > +++ b/tools/tests/vpci/.gitignore > > @@ -0,0 +1,2 @@ > > +/generated > > +test-vpci > > diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile > > index 97359ff67f86..695a275675f8 100644 > > --- a/tools/tests/vpci/Makefile > > +++ b/tools/tests/vpci/Makefile > > @@ -1,43 +1,23 @@ > > -XEN_ROOT=$(CURDIR)/../../.. > > -include $(XEN_ROOT)/tools/Rules.mk > > +# SPDX-License-Identifier: GPL-2.0-only > > +# > > +# Unit tests for vPCI. > > +# > > > > -TARGET := test_vpci > > +TESTS := test-vpci > > > > -.PHONY: all > > -all: $(TARGET) > > +XEN_ROOT = $(CURDIR)/../../.. > > +CFLAGS += -DCONFIG_HAS_VPCI > > > > -.PHONY: run > > -run: $(TARGET) > > -ifeq ($(CC),$(HOSTCC)) > > - ./$(TARGET) > > -else > > - $(warning HOSTCC != CC, will not run test) > > -endif > > +include $(XEN_ROOT)/tools/tests/Rules.mk > > > > -$(TARGET): vpci.c vpci.h list.h main.c emul.h > > - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c > > +# Do not mock xen/vpci.h header for the test > > +prepare-harness: > > + set -e; mkdir -p $(CURDIR)/generated/xen; \ > > + ln -sf $(XEN_ROOT)/xen/include/xen/vpci.h $(CURDIR)/generated/xen > > > > -.PHONY: clean > > -clean: > > - rm -rf $(TARGET) *.o *~ vpci.h vpci.c list.h > > +CFLAGS += -I $(XEN_ROOT)/xen/include/ > > > > -.PHONY: distclean > > -distclean: clean > > +$(eval $(call vpath-with-harness-deps,vpci.c,$(XEN_ROOT)/xen/drivers/vpci/,emul.h)) > > > > -.PHONY: install > > -install: all > > - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests > > - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests > > - > > -.PHONY: uninstall > > -uninstall: > > - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) > > - > > -vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c > > - # Remove includes and add the test harness header > > - sed -e '/#include/d' -e '1s/^/#include "emul.h"/' <$< >$@ > > - > > -list.h: $(XEN_ROOT)/xen/include/xen/list.h > > -vpci.h: $(XEN_ROOT)/xen/include/xen/vpci.h > > -list.h vpci.h: > > - sed -e '/#include/d' <$< >$@ > > +test-vpci: vpci.o main.o > > + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ > > diff --git a/tools/tests/vpci/emul.h b/tools/tests/vpci/emul.h > > index dd048cffbf9d..979e86e2692e 100644 > > --- a/tools/tests/vpci/emul.h > > +++ b/tools/tests/vpci/emul.h > > @@ -34,8 +34,16 @@ > > #define ASSERT(x) assert(x) > > #define __must_check __attribute__((__warn_unused_result__)) > > #define cf_check > > +#define always_inline inline > > > > -#include "list.h" > > +typedef int64_t s_time_t; > > +typedef uint8_t nodeid_t; > > +typedef uint8_t u8; > > +typedef uint16_t u16; > > +typedef uint32_t u32; > > +typedef uint64_t u64; > > + > > +#include > > > > typedef bool rwlock_t; > > > > @@ -43,10 +51,6 @@ struct domain { > > rwlock_t pci_lock; > > }; > > > > -struct pci_dev { > > - struct vpci *vpci; > > -}; > > - > > struct vcpu > > { > > struct domain *domain; > > @@ -57,35 +61,17 @@ extern const struct pci_dev test_pdev; > > > > typedef bool spinlock_t; > > #define spin_lock_init(l) (*(l) = false) > > -#define spin_lock(l) (*(l) = true) > > -#define spin_unlock(l) (*(l) = false) > > -#define read_lock(l) (*(l) = true) > > -#define read_unlock(l) (*(l) = false) > > -#define write_lock(l) (*(l) = true) > > -#define write_unlock(l) (*(l) = false) > > +#define spin_lock(l) (assert(!*(l)), *(l) = true) > > +#define spin_unlock(l) (assert(*(l)), *(l) = false) > > +#define read_lock(l) (assert(!*(l)), *(l) = true) > > +#define read_unlock(l) (assert(*(l)), *(l) = false) > > +#define write_lock(l) (assert(!*(l)), *(l) = true) > > +#define write_unlock(l) (assert(*(l)), *(l) = false) > > > > -typedef union { > > - uint32_t sbdf; > > - struct { > > - union { > > - uint16_t bdf; > > - struct { > > - union { > > - struct { > > - uint8_t func : 3, > > - dev : 5; > > - }; > > - uint8_t extfunc; > > - }; > > - uint8_t bus; > > - }; > > - }; > > - uint16_t seg; > > - }; > > -} pci_sbdf_t; > > +#define lock_evaluate_nospec(l) (l) > > +#define block_lock_speculation() > > > > -#define CONFIG_HAS_VPCI > > -#include "vpci.h" > > +#include > > > > #define __hwdom_init > > > > diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c > > index 2ef8d4e03f1d..3753417e866d 100644 > > --- a/tools/tests/vpci/main.c > > +++ b/tools/tests/vpci/main.c > > @@ -189,8 +189,6 @@ main(int argc, char **argv) > > uint32_t r24 = 0; > > uint8_t r28, r30; > > struct mask_data r32; > > - unsigned int i; > > - int rc; > > > > INIT_LIST_HEAD(&vpci.handlers); > > spin_lock_init(&vpci.lock); > > The patch looks OK but I recommend to split the xen headers changes into > a separate patch Will do. > > > > diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h > > index 6071b00f621e..f7fa1d0fa29b 100644 > > --- a/xen/include/xen/irq.h > > +++ b/xen/include/xen/irq.h > > @@ -1,5 +1,6 @@ > > #ifndef __XEN_IRQ_H__ > > #define __XEN_IRQ_H__ > > +#ifdef __XEN__ > > > > #include > > #include > > @@ -208,4 +209,5 @@ unsigned int arch_hwdom_irqs(const struct domain *d); > > void arch_evtchn_bind_pirq(struct domain *d, int pirq); > > #endif > > > > +#endif /* __XEN__ */ > > #endif /* __XEN_IRQ_H__ */ > > diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h > > index 98d8482daba1..06d2fa3aed15 100644 > > --- a/xen/include/xen/list.h > > +++ b/xen/include/xen/list.h > > @@ -7,8 +7,10 @@ > > #ifndef __XEN_LIST_H__ > > #define __XEN_LIST_H__ > > > > +#ifdef __XEN__ > > #include > > #include > > +#endif > > > > /* > > * These are non-NULL pointers that will result in faults under normal > > diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h > > index f6c1f27ca105..80d60fd49178 100644 > > --- a/xen/include/xen/numa.h > > +++ b/xen/include/xen/numa.h > > @@ -1,5 +1,6 @@ > > #ifndef _XEN_NUMA_H > > #define _XEN_NUMA_H > > +#ifdef __XEN__ > > > > #include > > > > @@ -152,4 +153,5 @@ static inline nodeid_t mfn_to_nid(mfn_t mfn) > > > > #define page_to_nid(pg) mfn_to_nid(page_to_mfn(pg)) > > > > +#endif /* __XEN__ */ > > #endif /* _XEN_NUMA_H */ > > diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h > > index 130c2a8c1a65..f5965a68ae33 100644 > > --- a/xen/include/xen/pci.h > > +++ b/xen/include/xen/pci.h > > @@ -14,7 +14,9 @@ > > #include > > #include > > #include > > +#ifdef __XEN__ > > #include > > +#endif > > There seem to be other Xen internal declarations in this header. I am > not sure what the best policy should be: try to cover them all within > the #ifdef __XEN__ even thought we don't really have a specific build > test that needs it, or only fix the specific build issue in this patch. > > I am OK either way but I wanted to mention the possible choice in case > others have an opinion. I decided to modify the headers, because I hope is there will be more unit tests using these headers. > > > > /* > > * The PCI interface treats multi-function devices as independent > > diff --git a/xen/include/xen/pfn.h b/xen/include/xen/pfn.h > > index 1ca9b095e0df..98ff669d7def 100644 > > --- a/xen/include/xen/pfn.h > > +++ b/xen/include/xen/pfn.h > > @@ -1,7 +1,9 @@ > > #ifndef __XEN_PFN_H__ > > #define __XEN_PFN_H__ > > > > +#ifdef __XEN__ > > #include > > +#endif > > > > #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) > > #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) > > diff --git a/xen/include/xen/spinlock.h b/xen/include/xen/spinlock.h > > index ca9d8c7ec0a1..ad5094c4eb92 100644 > > --- a/xen/include/xen/spinlock.h > > +++ b/xen/include/xen/spinlock.h > > @@ -1,5 +1,6 @@ > > #ifndef __SPINLOCK_H__ > > #define __SPINLOCK_H__ > > +#ifdef __XEN__ > > > > #include > > #include > > @@ -360,4 +361,5 @@ static always_inline void nrspin_lock_irq(rspinlock_t *l) > > #define nrspin_unlock_irqrestore(l, f) _nrspin_unlock_irqrestore(l, f) > > #define nrspin_unlock_irq(l) _nrspin_unlock_irq(l) > > > > +#endif /* __XEN__ */ > > #endif /* __SPINLOCK_H__ */ > > diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h > > index 73ddccbbd5dc..e5d702b48ac0 100644 > > --- a/xen/include/xen/types.h > > +++ b/xen/include/xen/types.h > > @@ -4,6 +4,7 @@ > > #include > > #include > > > > +#ifdef __XEN__ > > /* Linux inherited types which are being phased out */ > > typedef uint8_t u8; > > typedef uint16_t u16; > > @@ -15,6 +16,7 @@ typedef uint64_t u64; > > typedef __SIZE_TYPE__ size_t; > > > > typedef signed long ssize_t; > > +#endif /* __XEN__ */ > > > > typedef __PTRDIFF_TYPE__ ptrdiff_t; > > typedef __UINTPTR_TYPE__ uintptr_t; > > @@ -33,6 +35,7 @@ typedef __UINTPTR_TYPE__ uintptr_t; > > #define NULL ((void*)0) > > #endif > > > > +#ifdef __XEN__ > > #define INT8_MIN (-127-1) > > #define INT16_MIN (-32767-1) > > #define INT32_MIN (-2147483647-1) > > @@ -52,6 +55,7 @@ typedef __UINTPTR_TYPE__ uintptr_t; > > #define LONG_MAX ((long)(~0UL>>1)) > > #define LONG_MIN (-LONG_MAX - 1) > > #define ULONG_MAX (~0UL) > > +#endif /* __XEN__ */ > > > > typedef uint16_t __le16; > > typedef uint16_t __be16; > > -- > > 2.52.0 > > From xen-devel-bounces@lists.xenproject.org Fri Feb 06 01:51:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 01:51:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222692.1530454 (Exim 4.92) (envelope-from ) id 1voAzj-0006gw-Rk; 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This is useful for embedded or safety-focused deployments where nested virtualization is not needed, reducing code size and attack surface. When CONFIG_NESTED_VIRT=n, the following source files are excluded: - arch/x86/hvm/nestedhvm.c - arch/x86/hvm/svm/nestedsvm.c - arch/x86/hvm/vmx/vvmx.c - arch/x86/mm/nested.c - arch/x86/mm/hap/nested_hap.c - arch/x86/mm/hap/nested_ept.c Add inline stubs where needed in headers. No functional change when CONFIG_NESTED_VIRT=y. Signed-off-by: Stefano Stabellini --- xen/arch/x86/hvm/Kconfig | 10 ++++++ xen/arch/x86/hvm/Makefile | 2 +- xen/arch/x86/hvm/svm/Makefile | 2 +- xen/arch/x86/hvm/svm/nestedhvm.h | 44 +++++++++++++++++++++--- xen/arch/x86/hvm/svm/svm.c | 6 ++++ xen/arch/x86/hvm/vmx/Makefile | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 10 ++++-- xen/arch/x86/include/asm/hvm/nestedhvm.h | 41 +++++++++++++++++----- xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 30 ++++++++++++++++ xen/arch/x86/mm/Makefile | 2 +- xen/arch/x86/mm/hap/Makefile | 4 +-- xen/arch/x86/mm/p2m.h | 6 ++++ 12 files changed, 137 insertions(+), 22 deletions(-) diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb7..12b5df4710 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -92,4 +92,14 @@ config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX +config NESTED_VIRT + bool "Nested virtualization support" if EXPERT + depends on AMD_SVM || INTEL_VMX + default y + help + Enable nested virtualization, allowing guests to run their own + hypervisors. This requires hardware support. + + If unsure, say Y. + endif diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile index f34fb03934..b8a0a68624 100644 --- a/xen/arch/x86/hvm/Makefile +++ b/xen/arch/x86/hvm/Makefile @@ -18,7 +18,7 @@ obj-y += irq.o obj-y += mmio.o obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mtrr.o -obj-y += nestedhvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o obj-y += pmtimer.o obj-y += quirks.o obj-y += rtc.o diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile index 8a072cafd5..92418e3444 100644 --- a/xen/arch/x86/hvm/svm/Makefile +++ b/xen/arch/x86/hvm/svm/Makefile @@ -2,6 +2,6 @@ obj-y += asid.o obj-y += emulate.o obj-bin-y += entry.o obj-y += intr.o -obj-y += nestedsvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o obj-y += svm.o obj-y += vmcb.o diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h index 9bfed5ffd7..a102c076ea 100644 --- a/xen/arch/x86/hvm/svm/nestedhvm.h +++ b/xen/arch/x86/hvm/svm/nestedhvm.h @@ -26,6 +26,13 @@ #define nsvm_efer_svm_enabled(v) \ (!!((v)->arch.hvm.guest_efer & EFER_SVME)) +#define NSVM_INTR_NOTHANDLED 3 +#define NSVM_INTR_NOTINTERCEPTED 2 +#define NSVM_INTR_FORCEVMEXIT 1 +#define NSVM_INTR_MASKED 0 + +#ifdef CONFIG_NESTED_VIRT + int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); void nestedsvm_vmexit_defer(struct vcpu *v, uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); @@ -57,13 +64,40 @@ int cf_check nsvm_hap_walk_L1_p2m( struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *page_order, uint8_t *p2m_acc, struct npfec npfec); -#define NSVM_INTR_NOTHANDLED 3 -#define NSVM_INTR_NOTINTERCEPTED 2 -#define NSVM_INTR_FORCEVMEXIT 1 -#define NSVM_INTR_MASKED 0 - int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack intack); +#else /* !CONFIG_NESTED_VIRT */ + +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) +{ + return 0; +} +static inline void nestedsvm_vmexit_defer(struct vcpu *v, + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) { } +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu *v, + struct cpu_user_regs *regs) +{ + return NESTEDHVM_VMEXIT_ERROR; +} +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct vcpu *v, + struct cpu_user_regs *regs, uint64_t exitcode) +{ + return NESTEDHVM_VMEXIT_ERROR; +} +static inline void svm_nested_features_on_efer_update(struct vcpu *v) { } +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, + struct vcpu *v) { } +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, + struct vcpu *v) { } +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; } +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, + const struct hvm_intack intack) +{ + return NSVM_INTR_NOTINTERCEPTED; +} + +#endif /* CONFIG_NESTED_VIRT */ + #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ /* diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..0234b57afb 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -46,6 +46,10 @@ void noreturn svm_asm_do_resume(void); +#ifndef CONFIG_NESTED_VIRT +void asmlinkage nsvm_vcpu_switch(void) { } +#endif + u32 svm_feature_flags; /* @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nsvm_vcpu_initialise, .nhvm_vcpu_destroy = nsvm_vcpu_destroy, .nhvm_vcpu_reset = nsvm_vcpu_reset, @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, .nhvm_intr_blocked = nsvm_intr_blocked, .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, +#endif .get_reg = svm_get_reg, .set_reg = svm_set_reg, diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile index 04a29ce59d..902564b3e2 100644 --- a/xen/arch/x86/hvm/vmx/Makefile +++ b/xen/arch/x86/hvm/vmx/Makefile @@ -3,4 +3,4 @@ obj-y += intr.o obj-y += realmode.o obj-y += vmcs.o obj-y += vmx.o -obj-y += vvmx.o +obj-$(CONFIG_NESTED_VIRT) += vvmx.o diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 82c55f49ae..252f27322b 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -55,6 +55,10 @@ #include #include +#ifndef CONFIG_NESTED_VIRT +void asmlinkage nvmx_switch_guest(void) { } +#endif + static bool __initdata opt_force_ept; boolean_param("force-ept", opt_force_ept); @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcpu *v, nvmx->intr.intr_info, nvmx->intr.error_code); } -static int cf_check nvmx_vmexit_event( +static int cf_check __maybe_unused nvmx_vmexit_event( struct vcpu *v, const struct x86_event *event) { nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .handle_cd = vmx_handle_cd, .set_info_guest = vmx_set_info_guest, .set_rdtsc_exiting = vmx_set_rdtsc_exiting, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nvmx_vcpu_initialise, .nhvm_vcpu_destroy = nvmx_vcpu_destroy, .nhvm_vcpu_reset = nvmx_vcpu_reset, @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, .nhvm_intr_blocked = nvmx_intr_blocked, .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, - .update_vlapic_mode = vmx_vlapic_msr_changed, .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, +#endif + .update_vlapic_mode = vmx_vlapic_msr_changed, #ifdef CONFIG_VM_EVENT .enable_msr_interception = vmx_enable_msr_interception, #endif diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h index ea2c1bc328..0372974b24 100644 --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { /* Nested HVM on/off per domain */ static inline bool nestedhvm_enabled(const struct domain *d) { - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); + return IS_ENABLED(CONFIG_NESTED_VIRT) && + (d->options & XEN_DOMCTL_CDF_nested_virt); } +/* Nested paging */ +#define NESTEDHVM_PAGEFAULT_DONE 0 +#define NESTEDHVM_PAGEFAULT_INJECT 1 +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 +#define NESTEDHVM_PAGEFAULT_MMIO 4 +#define NESTEDHVM_PAGEFAULT_RETRY 5 +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 + +#ifdef CONFIG_NESTED_VIRT + /* Nested VCPU */ int nestedhvm_vcpu_initialise(struct vcpu *v); void nestedhvm_vcpu_destroy(struct vcpu *v); @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); #define nestedhvm_vcpu_exit_guestmode(v) \ vcpu_nestedhvm(v).nv_guestmode = 0 -/* Nested paging */ -#define NESTEDHVM_PAGEFAULT_DONE 0 -#define NESTEDHVM_PAGEFAULT_INJECT 1 -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 -#define NESTEDHVM_PAGEFAULT_MMIO 4 -#define NESTEDHVM_PAGEFAULT_RETRY 5 -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, struct npfec npfec); @@ -59,6 +63,25 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); +#else /* !CONFIG_NESTED_VIRT */ + +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) { return 0; } +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } +static inline void nestedhvm_vcpu_reset(struct vcpu *v) { } +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, + struct npfec npfec) +{ + return NESTEDHVM_PAGEFAULT_L0_ERROR; +} +#define nestedhvm_vcpu_enter_guestmode(v) do { } while (0) +#define nestedhvm_vcpu_exit_guestmode(v) do { } while (0) +#define nestedhvm_paging_mode_hap(v) false +#define nestedhvm_vmswitch_in_progress(v) false +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) { } + +#endif /* CONFIG_NESTED_VIRT */ + static inline bool nestedhvm_is_n2(struct vcpu *v) { if ( !nestedhvm_enabled(v->domain) || diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h index da10d3fa96..8dc876a4c2 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h @@ -73,6 +73,8 @@ union vmx_inst_info { u32 word; }; +#ifdef CONFIG_NESTED_VIRT + int cf_check nvmx_vcpu_initialise(struct vcpu *v); void cf_check nvmx_vcpu_destroy(struct vcpu *v); int cf_check nvmx_vcpu_reset(struct vcpu *v); @@ -199,5 +201,33 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, uint64_t *exit_qual, uint32_t *exit_reason); int nvmx_cpu_up_prepare(unsigned int cpu); void nvmx_cpu_dead(unsigned int cpu); + +#else /* !CONFIG_NESTED_VIRT */ + +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) { } +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, + unsigned long value) { } +static inline void nvmx_update_exception_bitmap(struct vcpu *v, + unsigned long value) { } +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) { return 0; } +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) { } +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, + int error_code) { return false; } +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, + unsigned int exit_reason) { return 0; } +static inline void nvmx_idtv_handling(void) { } +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) +{ + return 0; +} +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, + unsigned int exit_reason) { return 0; } +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } +static inline void nvmx_cpu_dead(unsigned int cpu) { } + +#define get_vvmcs(vcpu, encoding) 0 + +#endif /* CONFIG_NESTED_VIRT */ + #endif /* __ASM_X86_HVM_VVMX_H__ */ diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e8409..aa15811c2e 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o obj-$(CONFIG_VM_EVENT) += mem_access.o obj-$(CONFIG_MEM_PAGING) += mem_paging.o obj-$(CONFIG_MEM_SHARING) += mem_sharing.o -obj-$(CONFIG_HVM) += nested.o +obj-$(CONFIG_NESTED_VIRT) += nested.o obj-$(CONFIG_HVM) += p2m.o obj-y += p2m-basic.o obj-$(CONFIG_INTEL_VMX) += p2m-ept.o diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile index 67c29b2162..de1bb3abde 100644 --- a/xen/arch/x86/mm/hap/Makefile +++ b/xen/arch/x86/mm/hap/Makefile @@ -2,5 +2,5 @@ obj-y += hap.o obj-y += guest_walk_2.o obj-y += guest_walk_3.o obj-y += guest_walk_4.o -obj-y += nested_hap.o -obj-$(CONFIG_INTEL_VMX) += nested_ept.o +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o +obj-$(CONFIG_NESTED_VIRT) += nested_ept.o diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h index 635f5a7f45..fa14e69fff 100644 --- a/xen/arch/x86/mm/p2m.h +++ b/xen/arch/x86/mm/p2m.h @@ -25,9 +25,15 @@ void p2m_teardown_altp2m(struct domain *d); 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OK, will adjust as suggested. Thanks! > > Jan From xen-devel-bounces@lists.xenproject.org Fri Feb 06 03:45:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 03:45:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222747.1530474 (Exim 4.92) (envelope-from ) id 1voCmQ-000426-Sm; Fri, 06 Feb 2026 03:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222747.1530474; Fri, 06 Feb 2026 03:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voCmQ-00041y-OU; Fri, 06 Feb 2026 03:45:14 +0000 Received: by outflank-mailman (input) for mailman id 1222747; Fri, 06 Feb 2026 03:45:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voCmP-00041D-G5 for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 03:45:13 +0000 Received: from jpms-ob02.noc.sony.co.jp (jpms-ob02.noc.sony.co.jp [2001:cf8:ace:41::5]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 37f34637-030e-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 04:45:06 +0100 (CET) Received: from unknown (HELO jpmta-ob02.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::7]) by jpms-ob02.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 12:45:01 +0900 Received: from unknown (HELO JPC00244420) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob02.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 12:45:01 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 37f34637-030e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770349507; x=1801885507; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=IuPnlqREwJB3pbqSqs+4wA7Rlfs308sbPiaPxE9gRow=; b=PGiM8c0k1NStI9Uo/jLqSLmCzGFdV4IgZ6HLyJNYcFFpfEPzBE5LTJdq 8b1+7QjtZUlx9cz0DmSlZBr3pCuiFatM6JGK4qaZ59O/dnhacwh0hGB9+ ooN06xSFhLpPgS9XRxn1oaC6hDeI/MwVXANGXKb1NTloxOCDY0F9RG39u Qo+SoP0bI7XaFJBXRkBP7D+S+HTArZskk3ueQ1Pu1/eVgxijx5RAwTSOU DUEjrOFCcwGwe20xS+Nxjzxam1W0QLVYhYFyQRQfAUNoXiUfQl3EYVSlR NvKRGmSvK9fHjthOiL7z0nuleTFeB/zntlBeaH+vDFwVWuknDS81YzzsG A==; X-IronPort-AV: E=Sophos;i="6.21,275,1763391600"; d="scan'208";a="578775205" Date: Fri, 6 Feb 2026 12:44:57 +0900 From: Shashank Balaji To: Sohil Mehta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird , stable@vger.kernel.org Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Feb 05, 2026 at 03:18:58PM -0800, Sohil Mehta wrote: > Maybe a warning would be useful to encourage firmware to fix this going > forward. I don't have a strong preference on the wording, but how about? > > pr_warn_once("x2apic unexpectedly re-enabled by the firmware during > resume.\n"); That works > A few nits: > > For the code comments, you can use more of the line width. Generally, 72 > (perhaps even 80) chars is okay for comments dependent on the code in > the vicinity. > > The tip tree has slightly unique preferences, such as capitalizing the > first word of the patch title. > > Please refer: > https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#patch-submission-notes Thanks! I noticed that I also didn't use '()' for function names in the commit message. I'll fix all these and add the pr_warn_once in v2. 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Thu, 05 Feb 2026 20:07:36 -0800 (PST) Message-ID: <8899d013-3be7-4ffa-835c-bc3575439322@gmail.com> Date: Thu, 5 Feb 2026 23:07:29 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: jbeulich@suse.com, andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260206015032.4159672-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260206015032.4159672-1-stefano.stabellini@amd.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------3hJUj1mq3NnE0FFYrRZNdcQK" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------3hJUj1mq3NnE0FFYrRZNdcQK Content-Type: multipart/mixed; boundary="------------v48DdQMR4cnFttR0UBVN0Ytc"; protected-headers="v1" Message-ID: <8899d013-3be7-4ffa-835c-bc3575439322@gmail.com> Date: Thu, 5 Feb 2026 23:07:29 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: jbeulich@suse.com, andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260206015032.4159672-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260206015032.4159672-1-stefano.stabellini@amd.com> --------------v48DdQMR4cnFttR0UBVN0Ytc Content-Type: multipart/mixed; boundary="------------KMH2SnAkdI0syJl1OX08h0VV" --------------KMH2SnAkdI0syJl1OX08h0VV Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/5/26 20:50, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > to allow nested virtualization support to be disabled at build time. > This is useful for embedded or safety-focused deployments where > nested virtualization is not needed, reducing code size and attack > surface. >=20 > When CONFIG_NESTED_VIRT=3Dn, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c >=20 > Add inline stubs where needed in headers. >=20 > No functional change when CONFIG_NESTED_VIRT=3Dy. >=20 > Signed-off-by: Stefano Stabellini > --- > xen/arch/x86/hvm/Kconfig | 10 ++++++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/nestedhvm.h | 44 +++++++++++++++++++++---= > xen/arch/x86/hvm/svm/svm.c | 6 ++++ > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/vmx.c | 10 ++++-- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 41 +++++++++++++++++----- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 30 ++++++++++++++++ > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 4 +-- > xen/arch/x86/mm/p2m.h | 6 ++++ > 12 files changed, 137 insertions(+), 22 deletions(-) >=20 > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..12b5df4710 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,14 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > =20 > +config NESTED_VIRT > + bool "Nested virtualization support" if EXPERT > + depends on AMD_SVM || INTEL_VMX > + default y Would it be possible to make this default n instead? If not, could the dependency on EXPERT be removed? > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. > + > + If unsure, say Y. I would go with: Xen's support is known to be buggy and insecure. If unsure, say N. > + > endif > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > index f34fb03934..b8a0a68624 100644 > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -18,7 +18,7 @@ obj-y +=3D irq.o > obj-y +=3D mmio.o > obj-$(CONFIG_VM_EVENT) +=3D monitor.o > obj-y +=3D mtrr.o > -obj-y +=3D nestedhvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedhvm.o > obj-y +=3D pmtimer.o > obj-y +=3D quirks.o > obj-y +=3D rtc.o > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makef= ile > index 8a072cafd5..92418e3444 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -2,6 +2,6 @@ obj-y +=3D asid.o > obj-y +=3D emulate.o > obj-bin-y +=3D entry.o > obj-y +=3D intr.o > -obj-y +=3D nestedsvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedsvm.o > obj-y +=3D svm.o > obj-y +=3D vmcb.o > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/ne= stedhvm.h > index 9bfed5ffd7..a102c076ea 100644 > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -26,6 +26,13 @@ > #define nsvm_efer_svm_enabled(v) \ > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > =20 > +#define NSVM_INTR_NOTHANDLED 3 > +#define NSVM_INTR_NOTINTERCEPTED 2 > +#define NSVM_INTR_FORCEVMEXIT 1 > +#define NSVM_INTR_MASKED 0 > + > +#ifdef CONFIG_NESTED_VIRT > + > int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); > void nestedsvm_vmexit_defer(struct vcpu *v, > uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); > @@ -57,13 +64,40 @@ int cf_check nsvm_hap_walk_L1_p2m( > struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *pag= e_order, > uint8_t *p2m_acc, struct npfec npfec); > =20 > -#define NSVM_INTR_NOTHANDLED 3 > -#define NSVM_INTR_NOTINTERCEPTED 2 > -#define NSVM_INTR_FORCEVMEXIT 1 > -#define NSVM_INTR_MASKED 0 > - > int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack i= ntack); > =20 > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr= ) > +{ > + return 0; > +} > +static inline void nestedsvm_vmexit_defer(struct vcpu *v, > + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) { } > +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu= *v, > + struct cpu_user_regs *regs) > +{ > + return NESTEDHVM_VMEXIT_ERROR; > +} > +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct= vcpu *v, > + struct cpu_user_regs *regs, uint64_t exitcode) > +{ > + return NESTEDHVM_VMEXIT_ERROR; > +} > +static inline void svm_nested_features_on_efer_update(struct vcpu *v) = { } > +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, > + struct vcpu *v) { } > +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, > + struct vcpu *v) { } > +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; = } > +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, > + const struct hvm_intack int= ack) > +{ > + return NSVM_INTR_NOTINTERCEPTED; > +} > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ > =20 > /* > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..0234b57afb 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -46,6 +46,10 @@ > =20 > void noreturn svm_asm_do_resume(void); > =20 > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nsvm_vcpu_switch(void) { } > +#endif > + > u32 svm_feature_flags; > =20 > /* > @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_cl= obber svm_function_table =3D { > .set_rdtsc_exiting =3D svm_set_rdtsc_exiting, > .get_insn_bytes =3D svm_get_insn_bytes, > =20 > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise =3D nsvm_vcpu_initialise, > .nhvm_vcpu_destroy =3D nsvm_vcpu_destroy, > .nhvm_vcpu_reset =3D nsvm_vcpu_reset, > @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_cl= obber svm_function_table =3D { > .nhvm_vmcx_hap_enabled =3D nsvm_vmcb_hap_enabled, > .nhvm_intr_blocked =3D nsvm_intr_blocked, > .nhvm_hap_walk_L1_p2m =3D nsvm_hap_walk_L1_p2m, > +#endif > =20 > .get_reg =3D svm_get_reg, > .set_reg =3D svm_set_reg, > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makef= ile > index 04a29ce59d..902564b3e2 100644 > --- a/xen/arch/x86/hvm/vmx/Makefile > +++ b/xen/arch/x86/hvm/vmx/Makefile > @@ -3,4 +3,4 @@ obj-y +=3D intr.o > obj-y +=3D realmode.o > obj-y +=3D vmcs.o > obj-y +=3D vmx.o > -obj-y +=3D vvmx.o > +obj-$(CONFIG_NESTED_VIRT) +=3D vvmx.o > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 82c55f49ae..252f27322b 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -55,6 +55,10 @@ > #include > #include > =20 > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nvmx_switch_guest(void) { } > +#endif > + > static bool __initdata opt_force_ept; > boolean_param("force-ept", opt_force_ept); > =20 > @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcp= u *v, > nvmx->intr.intr_info, nvmx->intr.error_code); > } > =20 > -static int cf_check nvmx_vmexit_event( > +static int cf_check __maybe_unused nvmx_vmexit_event( > struct vcpu *v, const struct x86_event *event) > { > nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_cl= obber vmx_function_table =3D { > .handle_cd =3D vmx_handle_cd, > .set_info_guest =3D vmx_set_info_guest, > .set_rdtsc_exiting =3D vmx_set_rdtsc_exiting, > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise =3D nvmx_vcpu_initialise, > .nhvm_vcpu_destroy =3D nvmx_vcpu_destroy, > .nhvm_vcpu_reset =3D nvmx_vcpu_reset, > @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_cl= obber vmx_function_table =3D { > .nhvm_vcpu_vmexit_event =3D nvmx_vmexit_event, > .nhvm_intr_blocked =3D nvmx_intr_blocked, > .nhvm_domain_relinquish_resources =3D nvmx_domain_relinquish_resou= rces, > - .update_vlapic_mode =3D vmx_vlapic_msr_changed, > .nhvm_hap_walk_L1_p2m =3D nvmx_hap_walk_L1_p2m, > +#endif > + .update_vlapic_mode =3D vmx_vlapic_msr_changed, > #ifdef CONFIG_VM_EVENT > .enable_msr_interception =3D vmx_enable_msr_interception, > #endif > diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/in= clude/asm/hvm/nestedhvm.h > index ea2c1bc328..0372974b24 100644 > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nest= ed_virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > =20 > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT > + > /* Nested VCPU */ > int nestedhvm_vcpu_initialise(struct vcpu *v); > void nestedhvm_vcpu_destroy(struct vcpu *v); > @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); > #define nestedhvm_vcpu_exit_guestmode(v) \ > vcpu_nestedhvm(v).nv_guestmode =3D 0 > =20 > -/* Nested paging */ > -#define NESTEDHVM_PAGEFAULT_DONE 0 > -#define NESTEDHVM_PAGEFAULT_INJECT 1 > -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > -#define NESTEDHVM_PAGEFAULT_MMIO 4 > -#define NESTEDHVM_PAGEFAULT_RETRY 5 > -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > struct npfec npfec); > =20 > @@ -59,6 +63,25 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_= 80, bool ioport_ed); > =20 > void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); > =20 > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) { return 0= ; } > +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } > +static inline void nestedhvm_vcpu_reset(struct vcpu *v) { } > +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { retur= n false; } > +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, padd= r_t *L2_gpa, > + struct npfec npfec) > +{ > + return NESTEDHVM_PAGEFAULT_L0_ERROR; > +} > +#define nestedhvm_vcpu_enter_guestmode(v) do { } while (0) > +#define nestedhvm_vcpu_exit_guestmode(v) do { } while (0) > +#define nestedhvm_paging_mode_hap(v) false > +#define nestedhvm_vmswitch_in_progress(v) false > +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) { }= > + > +#endif /* CONFIG_NESTED_VIRT */ > + > static inline bool nestedhvm_is_n2(struct vcpu *v) > { > if ( !nestedhvm_enabled(v->domain) || > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/inc= lude/asm/hvm/vmx/vvmx.h > index da10d3fa96..8dc876a4c2 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > @@ -73,6 +73,8 @@ union vmx_inst_info { > u32 word; > }; > =20 > +#ifdef CONFIG_NESTED_VIRT > + > int cf_check nvmx_vcpu_initialise(struct vcpu *v); > void cf_check nvmx_vcpu_destroy(struct vcpu *v); > int cf_check nvmx_vcpu_reset(struct vcpu *v); > @@ -199,5 +201,33 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2= ga, > uint64_t *exit_qual, uint32_t *exit_reason); > int nvmx_cpu_up_prepare(unsigned int cpu); > void nvmx_cpu_dead(unsigned int cpu); > + > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value)= { } > +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, > + unsigned long va= lue) { } > +static inline void nvmx_update_exception_bitmap(struct vcpu *v, > + unsigned long value) {= } > +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) { return 0; } > +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned in= t cr) { } > +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned = int vector, > + int error_code) { return = false; } > +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, > + unsigned int exit_reason) { r= eturn 0; } > +static inline void nvmx_idtv_handling(void) { } > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_c= ontent) > +{ > + return 0; > +} > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > + unsigned int exit_reason) { ret= urn 0; } > +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } > +static inline void nvmx_cpu_dead(unsigned int cpu) { } > + > +#define get_vvmcs(vcpu, encoding) 0 > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __ASM_X86_HVM_VVMX_H__ */ > =20 > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > index 960f6e8409..aa15811c2e 100644 > --- a/xen/arch/x86/mm/Makefile > +++ b/xen/arch/x86/mm/Makefile > @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) +=3D guest_walk_4.o > obj-$(CONFIG_VM_EVENT) +=3D mem_access.o > obj-$(CONFIG_MEM_PAGING) +=3D mem_paging.o > obj-$(CONFIG_MEM_SHARING) +=3D mem_sharing.o > -obj-$(CONFIG_HVM) +=3D nested.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nested.o > obj-$(CONFIG_HVM) +=3D p2m.o > obj-y +=3D p2m-basic.o > obj-$(CONFIG_INTEL_VMX) +=3D p2m-ept.o > diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefil= e > index 67c29b2162..de1bb3abde 100644 > --- a/xen/arch/x86/mm/hap/Makefile > +++ b/xen/arch/x86/mm/hap/Makefile > @@ -2,5 +2,5 @@ obj-y +=3D hap.o > obj-y +=3D guest_walk_2.o > obj-y +=3D guest_walk_3.o > obj-y +=3D guest_walk_4.o > -obj-y +=3D nested_hap.o > -obj-$(CONFIG_INTEL_VMX) +=3D nested_ept.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nested_hap.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nested_ept.o > diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h > index 635f5a7f45..fa14e69fff 100644 > --- a/xen/arch/x86/mm/p2m.h > +++ b/xen/arch/x86/mm/p2m.h > @@ -25,9 +25,15 @@ void p2m_teardown_altp2m(struct domain *d); > void p2m_flush_table_locked(struct p2m_domain *p2m); > int __must_check p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, m= fn_t mfn, > unsigned int page_order); > +#ifdef CONFIG_NESTED_VIRT > void p2m_nestedp2m_init(struct p2m_domain *p2m); > int p2m_init_nestedp2m(struct domain *d); > void p2m_teardown_nestedp2m(struct domain *d); > +#else > +static inline void p2m_nestedp2m_init(struct p2m_domain *p2m) {} > +static inline int p2m_init_nestedp2m(struct domain *d) { return 0; } > +static inline void p2m_teardown_nestedp2m(struct domain *d) {} > +#endif > =20 > int ept_p2m_init(struct p2m_domain *p2m); > void ept_p2m_uninit(struct p2m_domain *p2m); --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------KMH2SnAkdI0syJl1OX08h0VV Content-Type: application/pgp-keys; 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Thu, 05 Feb 2026 22:22:44 -0800 (PST) Message-ID: Date: Fri, 6 Feb 2026 07:22:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.02.2026 18:07, Roger Pau Monné wrote: > On Thu, Feb 05, 2026 at 12:33:54PM +0100, Bertrand Marquis wrote: >> +## Limitations >> + >> +- **Hypervisor only**: This only builds the Xen hypervisor, not the tools >> +- **Cross-compilation only**: Native builds are not supported > > Probably a more philosophical question, but is it really a cross > compilation if I'm building an arm64 Xen on Apple arm64 silicon? > > Sure, it might use a different toolchain from native, but it's still a > "native" build from an architectural perspective? "Cross" aiui covers both OS (i.e. ABI) and hardware. Building x86 Linux binaries on e.g. Windows is "cross", too. (Strictly speaking it's the target triplet that is commonly used in at least GNU - if any part differs, it's "cross". It just so happens that Xen uses Linux'es ABI, and hence its building is native on identical-arch Linux.) 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <82dfede43d81c2072f90b01d12fe5ef18c80fc24.1770312308.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <82dfede43d81c2072f90b01d12fe5ef18c80fc24.1770312308.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 18:27, Teddy Astie wrote: > Many machines fail to boot if this option is disabled, as > there are no known drawback toggling this option, enable it > by default. "no known drawback" ignores why it wasn't enabled originally. Imo this wants at least mentioning, if not discussing. > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -363,13 +363,14 @@ config KEXEC > > config EFI_SET_VIRTUAL_ADDRESS_MAP > bool "EFI: call SetVirtualAddressMap()" if EXPERT > + default y > help > Call EFI SetVirtualAddressMap() runtime service to setup memory map for > further runtime services. According to UEFI spec, it isn't strictly > necessary, but many UEFI implementations misbehave when this call is > missing. > > - If unsure, say N. > + If unsure, say Y. When this was added, it was actually hacked in with the aim of minimal intrusiveness. When we now default it to on, I wonder if other changes shouldn't be made (maybe not right in this patch, but perhaps in a single series). For example, identity mapping (with its implied restrictions) ought to be possible to do away with when the option is enabled. Whether the separate EFI page tables would still be needed also is questionable. I further wonder whether the EXPERT dependency of the prompt wouldn't better be dropped when flipping the default. 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Thu, 05 Feb 2026 23:58:19 -0800 (PST) Message-ID: <37e2fad1-ce06-465e-b56b-190bc0aaa379@suse.com> Date: Fri, 6 Feb 2026 08:58:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen: Use MFLAGS for silent-mode detection To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <3ab39249c788fd0463e73df9464d482fefe8516b.1770290975.git.bertrand.marquis@arm.com> <1a0c5e48-5457-414e-89c8-0f12cfa55a96@suse.com> <2E85263B-38BC-49CB-80CD-3C30F37EFE4F@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.02.2026 08:53, Bertrand Marquis wrote: > Hi Jan, > >> On 5 Feb 2026, at 12:59, Bertrand Marquis wrote: >> >> Hi Jan, >> >>> On 5 Feb 2026, at 12:45, Jan Beulich wrote: >>> >>> On 05.02.2026 12:33, Bertrand Marquis wrote: >>>> GNU make 4.4+ exposes variable overrides in MAKEFLAGS after "--" (e.g. >>>> O=/path, FOO=bar). The silent-mode check searches for "s" and can match >>>> an override value, forcing silent output even without -s. >>>> >>>> Use MFLAGS for short options and filter out any long options before >>>> searching for "s". This preserves -s detection while avoiding false >>>> positives from overrides. >>>> >>>> Fixes: 4fdb4b71b152 ("xen/build: introduce if_changed and if_changed_rule") >>> >>> I don't think this is quite right: make 4.4 post-dates that commit by about >>> 2.5 years. >> >> True, we can remove the fixes tag. >> >>> >>>> >>>> Signed-off-by: Bertrand Marquis >>> >>> Nit: No blank lines between tags, please. >> >> Ack >> >>> >>>> --- a/xen/Makefile >>>> +++ b/xen/Makefile >>>> @@ -113,10 +113,11 @@ else >>>> Q := @ >>>> endif >>>> >>>> -# If the user is running make -s (silent mode), suppress echoing of >>>> -# commands >>>> - >>>> -ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),) >>>> +# If the user is running make -s (silent mode), suppress echoing of commands. >>>> +# Use MFLAGS (short options only). MAKEFLAGS may include variable overrides >>> >>> Why "short options only"? It looks you mean to describe the macro here, not >>> what's done in the ifeq(); at the very least it can be read both ways. >> >> True should be. >> Filter short options from MFLAGS. >> >>> >>>> +# after “--” (GNU make greater than 4.4), which can contain an “s” and falsely >>> >>> 4.4 and newer really, as 4.4 itself is included in the affected range. I'm >>> not quite sure anyway whether the comment really needs to go this far. This >>> kind of detail can be had from the commit message of this change, if needed. >>> >>> Happy to make adjustments while committing, yet I'm not sure whether you >>> agree in all regards. >> >> Agree. >> >> If you agree and can do that on commit, i would just put: >> >> Filter short options from MFLAGS as MAKEFLAGS may include variable overrides. > > Are you ok to give a reviewed-by and do the changes on commit or do you want me to > push a v2 with those fixes ? I'm intending to make adjustments while committing. That will now be next week only, though. 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=?utf-8?B?L2VjeGxEdlVhUEpUcUVHZkg1VWNwSnEySTNzOS9qM0FjSHB6eHJoQT09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: eb819473-a3d2-4263-777c-08de6557d6e1 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2026 08:15:07.6455 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Gvj4eaQZWo5SEW5T1mhYOyR9RMhb7XfgtsBlvCUTL1xpkOrmS8lQYS9AYJ6NrzOW+g00cGhXKpZ5Ul2ssS+w2g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR03MB5402 On Thu, Feb 05, 2026 at 05:50:32PM -0800, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > to allow nested virtualization support to be disabled at build time. > This is useful for embedded or safety-focused deployments where > nested virtualization is not needed, reducing code size and attack > surface. > > When CONFIG_NESTED_VIRT=n, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c > > Add inline stubs where needed in headers. > > No functional change when CONFIG_NESTED_VIRT=y. You also need to adjust arch_sanitise_domain_config() so it refuses to create domains with the XEN_DOMCTL_CDF_nested_virt flag set when CONFIG_NESTED_VIRT=n. If you do that I think a bunch of the dummy helpers that you add when CONFIG_NESTED_VIRT=n should also gain an ASSERT_UNREACHABLE(). And IMO you will also need to add a new XEN_SYSCTL_PHYSCAP_nestedhvm (or alike) to signal the toolstack whether the nested HVM feature is available. Much like we do for HAP/Shadow/gnttab availability. > Signed-off-by: Stefano Stabellini > --- > xen/arch/x86/hvm/Kconfig | 10 ++++++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/nestedhvm.h | 44 +++++++++++++++++++++--- > xen/arch/x86/hvm/svm/svm.c | 6 ++++ > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/vmx.c | 10 ++++-- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 41 +++++++++++++++++----- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 30 ++++++++++++++++ > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 4 +-- > xen/arch/x86/mm/p2m.h | 6 ++++ > 12 files changed, 137 insertions(+), 22 deletions(-) > > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..12b5df4710 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,14 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > > +config NESTED_VIRT > + bool "Nested virtualization support" if EXPERT > + depends on AMD_SVM || INTEL_VMX > + default y > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. > + > + If unsure, say Y. If we go that route, I think nested virt should become off by default. It's not security supported, and known to be broken in many areas. I'm also unsure about whether this wants to be gated under EXPERT. But I'm not sure I'm any good at knowing whether something should be under EXPERT or not. > + > endif > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > index f34fb03934..b8a0a68624 100644 > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -18,7 +18,7 @@ obj-y += irq.o > obj-y += mmio.o > obj-$(CONFIG_VM_EVENT) += monitor.o > obj-y += mtrr.o > -obj-y += nestedhvm.o > +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o > obj-y += pmtimer.o > obj-y += quirks.o > obj-y += rtc.o > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile > index 8a072cafd5..92418e3444 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -2,6 +2,6 @@ obj-y += asid.o > obj-y += emulate.o > obj-bin-y += entry.o > obj-y += intr.o > -obj-y += nestedsvm.o > +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o > obj-y += svm.o > obj-y += vmcb.o > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h > index 9bfed5ffd7..a102c076ea 100644 > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -26,6 +26,13 @@ > #define nsvm_efer_svm_enabled(v) \ > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > > +#define NSVM_INTR_NOTHANDLED 3 > +#define NSVM_INTR_NOTINTERCEPTED 2 > +#define NSVM_INTR_FORCEVMEXIT 1 > +#define NSVM_INTR_MASKED 0 > + > +#ifdef CONFIG_NESTED_VIRT > + > int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); > void nestedsvm_vmexit_defer(struct vcpu *v, > uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); > @@ -57,13 +64,40 @@ int cf_check nsvm_hap_walk_L1_p2m( > struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *page_order, > uint8_t *p2m_acc, struct npfec npfec); > > -#define NSVM_INTR_NOTHANDLED 3 > -#define NSVM_INTR_NOTINTERCEPTED 2 > -#define NSVM_INTR_FORCEVMEXIT 1 > -#define NSVM_INTR_MASKED 0 > - > int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack intack); > > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) > +{ > + return 0; > +} > +static inline void nestedsvm_vmexit_defer(struct vcpu *v, > + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) { } > +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu *v, > + struct cpu_user_regs *regs) > +{ > + return NESTEDHVM_VMEXIT_ERROR; > +} > +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct vcpu *v, > + struct cpu_user_regs *regs, uint64_t exitcode) > +{ > + return NESTEDHVM_VMEXIT_ERROR; > +} > +static inline void svm_nested_features_on_efer_update(struct vcpu *v) { } > +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, > + struct vcpu *v) { } > +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, > + struct vcpu *v) { } > +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; } > +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, > + const struct hvm_intack intack) > +{ > + return NSVM_INTR_NOTINTERCEPTED; > +} > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ > > /* > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..0234b57afb 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -46,6 +46,10 @@ > > void noreturn svm_asm_do_resume(void); > > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nsvm_vcpu_switch(void) { } > +#endif > + > u32 svm_feature_flags; > > /* > @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > .set_rdtsc_exiting = svm_set_rdtsc_exiting, > .get_insn_bytes = svm_get_insn_bytes, > > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise = nsvm_vcpu_initialise, > .nhvm_vcpu_destroy = nsvm_vcpu_destroy, > .nhvm_vcpu_reset = nsvm_vcpu_reset, > @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, > .nhvm_intr_blocked = nsvm_intr_blocked, > .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, > +#endif > > .get_reg = svm_get_reg, > .set_reg = svm_set_reg, > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile > index 04a29ce59d..902564b3e2 100644 > --- a/xen/arch/x86/hvm/vmx/Makefile > +++ b/xen/arch/x86/hvm/vmx/Makefile > @@ -3,4 +3,4 @@ obj-y += intr.o > obj-y += realmode.o > obj-y += vmcs.o > obj-y += vmx.o > -obj-y += vvmx.o > +obj-$(CONFIG_NESTED_VIRT) += vvmx.o > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 82c55f49ae..252f27322b 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -55,6 +55,10 @@ > #include > #include > > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nvmx_switch_guest(void) { } > +#endif > + > static bool __initdata opt_force_ept; > boolean_param("force-ept", opt_force_ept); > > @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcpu *v, > nvmx->intr.intr_info, nvmx->intr.error_code); > } > > -static int cf_check nvmx_vmexit_event( > +static int cf_check __maybe_unused nvmx_vmexit_event( > struct vcpu *v, const struct x86_event *event) > { > nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .handle_cd = vmx_handle_cd, > .set_info_guest = vmx_set_info_guest, > .set_rdtsc_exiting = vmx_set_rdtsc_exiting, > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise = nvmx_vcpu_initialise, > .nhvm_vcpu_destroy = nvmx_vcpu_destroy, > .nhvm_vcpu_reset = nvmx_vcpu_reset, > @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, > .nhvm_intr_blocked = nvmx_intr_blocked, > .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, > - .update_vlapic_mode = vmx_vlapic_msr_changed, > .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, > +#endif > + .update_vlapic_mode = vmx_vlapic_msr_changed, > #ifdef CONFIG_VM_EVENT > .enable_msr_interception = vmx_enable_msr_interception, > #endif > diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h > index ea2c1bc328..0372974b24 100644 > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT > + > /* Nested VCPU */ > int nestedhvm_vcpu_initialise(struct vcpu *v); > void nestedhvm_vcpu_destroy(struct vcpu *v); > @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); > #define nestedhvm_vcpu_exit_guestmode(v) \ > vcpu_nestedhvm(v).nv_guestmode = 0 > > -/* Nested paging */ > -#define NESTEDHVM_PAGEFAULT_DONE 0 > -#define NESTEDHVM_PAGEFAULT_INJECT 1 > -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > -#define NESTEDHVM_PAGEFAULT_MMIO 4 > -#define NESTEDHVM_PAGEFAULT_RETRY 5 > -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > struct npfec npfec); > > @@ -59,6 +63,25 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); > > void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); > > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) { return 0; } > +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } > +static inline void nestedhvm_vcpu_reset(struct vcpu *v) { } > +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } > +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > + struct npfec npfec) > +{ > + return NESTEDHVM_PAGEFAULT_L0_ERROR; > +} > +#define nestedhvm_vcpu_enter_guestmode(v) do { } while (0) > +#define nestedhvm_vcpu_exit_guestmode(v) do { } while (0) > +#define nestedhvm_paging_mode_hap(v) false > +#define nestedhvm_vmswitch_in_progress(v) false > +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) { } > + > +#endif /* CONFIG_NESTED_VIRT */ > + > static inline bool nestedhvm_is_n2(struct vcpu *v) > { > if ( !nestedhvm_enabled(v->domain) || > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > index da10d3fa96..8dc876a4c2 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > @@ -73,6 +73,8 @@ union vmx_inst_info { > u32 word; > }; > > +#ifdef CONFIG_NESTED_VIRT > + > int cf_check nvmx_vcpu_initialise(struct vcpu *v); > void cf_check nvmx_vcpu_destroy(struct vcpu *v); > int cf_check nvmx_vcpu_reset(struct vcpu *v); > @@ -199,5 +201,33 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, > uint64_t *exit_qual, uint32_t *exit_reason); > int nvmx_cpu_up_prepare(unsigned int cpu); > void nvmx_cpu_dead(unsigned int cpu); > + > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) { } > +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, > + unsigned long value) { } > +static inline void nvmx_update_exception_bitmap(struct vcpu *v, > + unsigned long value) { } > +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) { return 0; } > +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) { } > +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, > + int error_code) { return false; } > +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, > + unsigned int exit_reason) { return 0; } > +static inline void nvmx_idtv_handling(void) { } > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) > +{ > + return 0; > +} > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > + unsigned int exit_reason) { return 0; } > +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } > +static inline void nvmx_cpu_dead(unsigned int cpu) { } > + > +#define get_vvmcs(vcpu, encoding) 0 > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __ASM_X86_HVM_VVMX_H__ */ > > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > index 960f6e8409..aa15811c2e 100644 > --- a/xen/arch/x86/mm/Makefile > +++ b/xen/arch/x86/mm/Makefile > @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o > obj-$(CONFIG_VM_EVENT) += mem_access.o > obj-$(CONFIG_MEM_PAGING) += mem_paging.o > obj-$(CONFIG_MEM_SHARING) += mem_sharing.o > -obj-$(CONFIG_HVM) += nested.o > +obj-$(CONFIG_NESTED_VIRT) += nested.o > obj-$(CONFIG_HVM) += p2m.o > obj-y += p2m-basic.o > obj-$(CONFIG_INTEL_VMX) += p2m-ept.o > diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile > index 67c29b2162..de1bb3abde 100644 > --- a/xen/arch/x86/mm/hap/Makefile > +++ b/xen/arch/x86/mm/hap/Makefile > @@ -2,5 +2,5 @@ obj-y += hap.o > obj-y += guest_walk_2.o > obj-y += guest_walk_3.o > obj-y += guest_walk_4.o > -obj-y += nested_hap.o > -obj-$(CONFIG_INTEL_VMX) += nested_ept.o > +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o > +obj-$(CONFIG_NESTED_VIRT) += nested_ept.o With this change nested_ept.o is no longer gated explicitly on CONFIG_INTEL_VMX, which could cause build issues if you have a Kconfig like: CONFIG_INTEL_VMX=n CONFIG_AMD_SVM=y CONFIG_NESTED_VIRT=y Does the code in nested_ept.o have dependencies on other files gated by CONFIG_INTEL_VMX, and hence would fail at the linking stage? And even if it builds, the code in nested_ept.o would be unreachable I expect. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Fri Feb 06 08:17:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 08:17:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222902.1530577 (Exim 4.92) (envelope-from ) id 1voH1v-00087P-TN; Fri, 06 Feb 2026 08:17:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222902.1530577; Fri, 06 Feb 2026 08:17:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voH1v-00087I-Qo; Fri, 06 Feb 2026 08:17:31 +0000 Received: by outflank-mailman (input) for mailman id 1222902; Fri, 06 Feb 2026 08:17:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voH1u-00084v-Rd for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 08:17:30 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 452dc470-0334-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 09:17:26 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2ED0B339; Fri, 6 Feb 2026 00:17:19 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.55.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F048F3F740; Fri, 6 Feb 2026 00:17:23 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 452dc470-0334-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3] xen: Add Darwin.mk for GNU toolchains Date: Fri, 6 Feb 2026 09:17:17 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen does not provide a Darwin build configuration for selecting GNU tool definitions. On macOS, the tools we use are either GNU compatible or we only rely on features supported by Mac OS, so using the GNU tool definitions is appropriate. Add config/Darwin.mk to include StdGNU.mk and force XEN_COMPILE_ARCH=Darwin, ensuring Darwin builds always follow the cross-compile path as we depend on the Linux ABI so compiling on Mac OS is always a cross compilation case. An example of how to build the hypervisor for arm64 on Mac OS (tools cannot be build for now) using a compiler from brew: - brew install aarch64-elf-gcc - cd xen - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc Signed-off-by: Bertrand Marquis --- Changes since v2: - Subject was "xen: Add macOS hypervisor build configuration" - Update Darwin.mk comments to more accurate versions (Jan) - Remove the build-on-macos help as we have no dependency on anything coming from brew anymore and the toolchain can be retrieved by lots of other solutions than brew on mac os. Switch to a simple doc in the commit message instead --- config/Darwin.mk | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 config/Darwin.mk diff --git a/config/Darwin.mk b/config/Darwin.mk new file mode 100644 index 000000000000..427588eaf899 --- /dev/null +++ b/config/Darwin.mk @@ -0,0 +1,7 @@ +# Use GNU tool definitions as the tools we are using are either GNU compatible +# or we only use features which are supported on Mac OS. +include $(XEN_ROOT)/config/StdGNU.mk + +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. +# Force COMPILE_ARCH to a fake value to make sure it is always the case. +XEN_COMPILE_ARCH = Darwin -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 08:58:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 08:58:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222971.1530628 (Exim 4.92) (envelope-from ) id 1voHev-0005Iu-75; Fri, 06 Feb 2026 08:57:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222971.1530628; Fri, 06 Feb 2026 08:57:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHev-0005In-3a; Fri, 06 Feb 2026 08:57:49 +0000 Received: by outflank-mailman (input) for mailman id 1222971; Fri, 06 Feb 2026 08:57:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHeu-0005Ih-L4 for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 08:57:48 +0000 Received: from jpms-ob01.noc.sony.co.jp (jpms-ob01.noc.sony.co.jp [2001:cf8:ace:41::4]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e3b88d49-0339-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 09:57:44 +0100 (CET) Received: from unknown (HELO jpmta-ob02.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::7]) by jpms-ob01.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 17:57:37 +0900 Received: from unknown (HELO JPC00244420) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob02.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 17:57:36 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e3b88d49-0339-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770368264; x=1801904264; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=pC/nHVWjvFbxMPwxtThf4k2nFuf59ielNHdSV23cY9U=; b=A2Lo627pG2vqp+4SHLFm5bAOIWjFteYDn42/glFbGGE7Q5B4bi15fK/2 rSFv2KpZYzyW+yYGrmhLXbW7T712+8ExOAKUYStMwx7zLe0w0ljM7gPsy WFEX0B+pYjs0XiLCNpep2XDvsMx5UJG3NXgJXVfiEumlfldR92vsbjovc +DZP0rFMq8CWaYoufarfJygRM0apL7unwcbOL1CnpJv9oFuOQxvLQEuY+ wy9u1oV/w1MNbEhcrNNngosiS0LTXx7iMvaVHKnqzj8+JSFdneHucpIp3 romHPmPS0ECqp59CiD8cPYfRwU4cuaIytOFVnZ6PAJ5kaSYMDzIBRCnLf A==; X-IronPort-AV: E=Sophos;i="6.21,276,1763391600"; d="scan'208";a="578880254" Date: Fri, 6 Feb 2026 17:57:31 +0900 From: Shashank Balaji To: Sohil Mehta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird , stable@vger.kernel.org Subject: Re: [PATCH 1/3] x86/x2apic: disable x2apic on resume if the kernel expects so Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Feb 05, 2026 at 03:18:58PM -0800, Sohil Mehta wrote: > On 2/4/2026 10:07 PM, Shashank Balaji wrote: > > On Wed, Feb 04, 2026 at 10:53:28AM -0800, Sohil Mehta wrote: > > >> It's a bit odd then that the firmware chooses to enable x2apic without > >> the OS requesting it. > > > > Well, the firmware has a setting saying "Enable x2apic", which was > > enabled. So it did what the setting says > > > > The expectation would be that firmware would restore to the same state > before lapic_suspend(). I'm a bit out of my depth here, but I went looking around, and this is from the latest ACPI spec (v6.6) [1]: When executing from the power-on reset vector as a result of waking from an S2 or S3 sleep state, the platform firmware performs only the hardware initialization required to restore the system to either the state the platform was in prior to the initial operating system boot, or to the pre-sleep configuration state. In multiprocessor systems, non-boot processors should be placed in the same state as prior to the initial operating system boot. (further ahead) If this is an S2 or S3 wake, then the platform runtime firmware restores minimum context of the system before jumping to the waking vector. This includes: CPU configuration. Platform runtime firmware restores the pre-sleep configuration or initial boot configuration of each CPU (MSR, MTRR, firmware update, SMBase, and so on). Interrupts must be disabled (for IA-32 processors, disabled by CLI instruction). (and other things) I suppose, in my case, the firmware is restoring initial boot configuration on S3 resume. And initial boot configuration of x2apic is set from the firmware's UI "Enable x2apic". > Maybe a warning would be useful to encourage firmware to fix this going > forward. I don't have a strong preference on the wording, but how about? > > pr_warn_once("x2apic unexpectedly re-enabled by the firmware during > resume.\n"); At least as per the spec, it's not something the firmware needs to fix, and it's not unexpected re-enablement. Am I missing something? But it _is_ surprising that this bug went unnoticed for so long :) [1] https://uefi.org/specs/ACPI/6.6/16_Waking_and_Sleeping.html#initialization From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:02:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:02:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222983.1530638 (Exim 4.92) (envelope-from ) id 1voHj6-0006r2-M8; Fri, 06 Feb 2026 09:02:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222983.1530638; Fri, 06 Feb 2026 09:02:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHj6-0006qv-JA; Fri, 06 Feb 2026 09:02:08 +0000 Received: by outflank-mailman (input) for mailman id 1222983; Fri, 06 Feb 2026 09:02:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHj5-0006qi-JX for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 09:02:07 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 82a9b045-033a-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 10:02:06 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2D0B6339; Fri, 6 Feb 2026 01:01:59 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 981723F778; Fri, 6 Feb 2026 01:02:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 82a9b045-033a-11f1-b161-2bf370ae4941 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH 0/3] Fifth MPU Series Date: Fri, 6 Feb 2026 09:01:52 +0000 Message-ID: <20260206090155.68466-1-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU system docs/misc/arm/device-tree/booting.txt | 11 ++++ xen/arch/arm/arm64/mpu/p2m.c | 67 +++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 25 +++++++++ xen/arch/arm/domain.c | 16 ++++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 ++++- xen/arch/arm/include/asm/domain.h | 9 +++ xen/arch/arm/include/asm/mpu.h | 5 ++ xen/arch/arm/include/asm/mpu/p2m.h | 12 ++++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 11 ++++ xen/arch/arm/mpu/p2m.c | 71 +++++++++++++++++++++++- xen/include/public/arch-arm.h | 4 ++ 15 files changed, 250 insertions(+), 7 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:02:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:02:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222984.1530648 (Exim 4.92) (envelope-from ) id 1voHj9-00075R-SY; Fri, 06 Feb 2026 09:02:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222984.1530648; Fri, 06 Feb 2026 09:02:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHj9-00075E-Pf; Fri, 06 Feb 2026 09:02:11 +0000 Received: by outflank-mailman (input) for mailman id 1222984; Fri, 06 Feb 2026 09:02:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHj8-0006qi-LM for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 09:02:10 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 84bf41e6-033a-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 10:02:09 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B81BF1516; Fri, 6 Feb 2026 01:02:02 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A5B333F778; Fri, 6 Feb 2026 01:02:07 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 84bf41e6-033a-11f1-b161-2bf370ae4941 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Luca Fancellu , Hari Limaye Subject: [PATCH 1/3] arm/mpu: implement setup_virt_paging for MPU system Date: Fri, 6 Feb 2026 09:01:53 +0000 Message-ID: <20260206090155.68466-2-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206090155.68466-1-harry.ramsey@arm.com> References: <20260206090155.68466-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Penny Zheng For MMU system, setup_virt_paging is used to configure stage 2 address translation regime, like IPA bits, VMID allocator set up, etc. Some could be inherited in MPU system, like VMID allocator set up, etc. For MPU system, we could have the following memory translation regime: - PMSAv8-64 at both EL1/EL0 and EL2 (default) - VMSAv8-64 at EL1/EL0 and PMSAv8-64 at EL2 (enabled with device tree proprty v8r_el1_msa) Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey --- xen/arch/arm/arm64/mpu/p2m.c | 67 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++-- xen/arch/arm/include/asm/mpu/p2m.h | 12 +++++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 11 ++++ 6 files changed, 108 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b..da8f0553c1 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,76 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + uint64_t vtcr_el2 = READ_SYSREG(VTCR_EL2), vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against "pabits". + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8r only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_NONE_SUPPORT ) + goto fault; + + /* + * cpuinfo sanitization makes sure we support 16bits VMID only if all cores + * are supporting it. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + max_vmid = MAX_VMID_16_BIT; + + /* Set the VS bit only if 16 bit VMID is supported. */ + if ( max_vmid == MAX_VMID_16_BIT ) + vtcr_el2 |= VTCR_VS; + + p2m_vmid_allocator_init(); + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb..a4b6eef181 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,UL)<<30) +#define VSTCR_EL2_SC (_AC(0x1,UL)<<20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1a..bf902a3970 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a..d165585d4e 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -5,6 +5,18 @@ struct p2m_domain; +/* + * The architecture allows at most 255 EL2 MPU memory regions. The size of the + * MPU structure entry (pr_t) is 32 Bytes on AArch64 (requiring two 4KB pages) + * and 16 bytes on AArch32 (requiring one 4KB page). + */ +#ifdef CONFIG_ARM_64 +#define P2M_ROOT_ORDER 1 +#else +#define P2M_ROOT_ORDER 0 +#endif + +/* Not used on MPU system */ static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9eb..ed1b6dd40f 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b..7344aa094b 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,10 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) +#define VTCR_NSA (_AC(0x1,UL)<<30) +#endif + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +468,13 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 +#endif + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:02:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:02:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222985.1530658 (Exim 4.92) (envelope-from ) id 1voHjF-0007MV-4p; Fri, 06 Feb 2026 09:02:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222985.1530658; Fri, 06 Feb 2026 09:02:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHjF-0007ML-13; Fri, 06 Feb 2026 09:02:17 +0000 Received: by outflank-mailman (input) for mailman id 1222985; Fri, 06 Feb 2026 09:02:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHjD-0006qi-RA for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 09:02:15 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 87e09567-033a-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 10:02:15 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 089881516; Fri, 6 Feb 2026 01:02:08 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 770163F778; Fri, 6 Feb 2026 01:02:13 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 87e09567-033a-11f1-b161-2bf370ae4941 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH 3/3] arm/mpu: Implement p2m tables Date: Fri, 6 Feb 2026 09:01:55 +0000 Message-ID: <20260206090155.68466-4-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206090155.68466-1-harry.ramsey@arm.com> References: <20260206090155.68466-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Additionally implement a helper function `generate_vsctlr` for p2m initalization. Signed-off-by: Harry Ramsey --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu.h | 5 ++ xen/arch/arm/mpu/p2m.c | 71 ++++++++++++++++++++++++++-- 4 files changed, 77 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbac..d565230f84 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8..8b86a03fee 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h index 72fa5b00b8..4ae583a7e9 100644 --- a/xen/arch/arm/include/asm/mpu.h +++ b/xen/arch/arm/include/asm/mpu.h @@ -87,6 +87,11 @@ static inline bool region_is_valid(const pr_t *pr) return pr->prlar.reg.en; } +static inline register_t generate_vsctlr(uint16_t vmid) +{ + return ((register_t)vmid << VSCTLR_VMID_SHIFT); +} + #endif /* __ASSEMBLER__ */ #endif /* __ARM_MPU_H__ */ diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6a..1598f9ab64 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,62 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int __init p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + pr_t* p2m_map; + + p2m_map = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + if ( !p2m_map ) + { + printk(XENLOG_G_ERR "DOM%pd: p2m: unable to allocate P2M MPU mapping table\n", d); + return -ENOMEM; + } + clear_page(p2m_map); + + p2m->root = virt_to_page((const void *)p2m_map); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported in MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + p2m->vsctlr = generate_vsctlr(p2m->vmid); + + rc = p2m_alloc_table(d); + if ( rc ) + return rc; + + return rc; } void p2m_save_state(struct vcpu *p) @@ -46,7 +98,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(p2m->root, P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:02:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:02:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1222988.1530668 (Exim 4.92) (envelope-from ) id 1voHjK-0007i1-Gm; Fri, 06 Feb 2026 09:02:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1222988.1530668; Fri, 06 Feb 2026 09:02:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHjK-0007hm-Dh; Fri, 06 Feb 2026 09:02:22 +0000 Received: by outflank-mailman (input) for mailman id 1222988; Fri, 06 Feb 2026 09:02:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHjJ-0007ev-Dg for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 09:02:21 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 86559266-033a-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 10:02:12 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6E9D8339; Fri, 6 Feb 2026 01:02:05 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC6DF3F778; Fri, 6 Feb 2026 01:02:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 86559266-033a-11f1-9ccf-f158ae23cfc8 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Fri, 6 Feb 2026 09:01:54 +0000 Message-ID: <20260206090155.68466-3-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206090155.68466-1-harry.ramsey@arm.com> References: <20260206090155.68466-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a new device tree property `v8r_el1_msa` to enable/disable the PMSAv8-64 translation regime at EL1. Signed-off-by: Harry Ramsey --- docs/misc/arm/device-tree/booting.txt | 11 +++++++++++ xen/arch/arm/dom0less-build.c | 25 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 16 ++++++++++++++++ xen/arch/arm/include/asm/domain.h | 9 +++++++++ xen/include/public/arch-arm.h | 4 ++++ 5 files changed, 65 insertions(+) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b428608..431d285b6e 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,17 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R aarch64 systems, a domain + should use PMSAv8-64 (MPU) at EL1 or VMSAv8-64 (MMU) at EL1. + + - "mmu" + Enables VMSAv8-64 at EL1. + + - "mpu" + Enables PMSAv8-64 at EL1. + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c10538..41f538fb50 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -315,6 +315,7 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, struct xen_domctl_createdomain *d_cfg = &bd->create_cfg; unsigned int flags = bd->create_flags; uint32_t val; + const char *v8r_el1_msa; d_cfg->arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE; d_cfg->flags |= XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap; @@ -322,6 +323,30 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if (!dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa)) + { +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) + if ( !strcmp(v8r_el1_msa, "mmu") ) + { + if ( system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT ) + panic("Platform does not support VMSA at EL1 (v8r_el1_msa)\n"); + d_cfg->arch.v8r_el1_msa = MPU_EL1_VMSA; + } + else if ( !strcmp(v8r_el1_msa, "mpu") ) + { + d_cfg->arch.v8r_el1_msa = MPU_EL1_PMSA; + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + panic("PMSA is not valid for domain without static allocation" + " and direct map (v8r_el1_msa)\n"); + } + else + panic("Invalid device tree option for v8r_el1_msa\n"); +#else + panic("'v8r_el1_msa' property requires CONFIG_MPU and CONFIG_ARM_64 to " + "be selected\n"); +#endif + } + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 2eca2b913d..fc4c7ae734 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -35,6 +35,18 @@ DEFINE_PER_CPU(struct vcpu *, curr_vcpu); +/* If this domain should use PMSAv8-64 translation regime (MPU) at EL1. */ +static inline bool is_mpu_domain(struct domain *d) +{ +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) + return d->arch.v8r_el1_msa == MPU_EL1_PMSA; +#elif defined(CONFIG_MPU) + return true; +#else + return false; +#endif +} + static void do_idle(void) { unsigned int cpu = smp_processor_id(); @@ -731,6 +743,10 @@ int arch_domain_create(struct domain *d, if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + return 0; fail: diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index 758ad807e4..1387adc0e9 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -29,6 +29,11 @@ enum domain_type { #define is_64bit_domain(d) (0) #endif +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) +#define MPU_EL1_PMSA 0 +#define MPU_EL1_VMSA 1 +#endif + /* * Is the domain using the host memory layout? * @@ -126,6 +131,10 @@ struct arch_domain void *sci_data; #endif +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) + uint8_t v8r_el1_msa; +#endif + } __cacheline_aligned; struct arch_vcpu diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf706..0ef445a273 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -355,6 +355,10 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) + /* IN */ + uint8_t v8r_el1_msa; +#endif }; #endif /* __XEN__ || __XEN_TOOLS__ */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:10:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:10:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223016.1530678 (Exim 4.92) (envelope-from ) id 1voHqm-0001FW-89; Fri, 06 Feb 2026 09:10:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223016.1530678; Fri, 06 Feb 2026 09:10:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHqm-0001F8-56; Fri, 06 Feb 2026 09:10:04 +0000 Received: by outflank-mailman (input) for mailman id 1223016; Fri, 06 Feb 2026 09:10:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voHql-00014k-KA for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 09:10:03 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 9cd71c38-033b-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 10:09:59 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A3201339 for ; Fri, 6 Feb 2026 01:09:52 -0800 (PST) Received: from [10.57.94.150] (unknown [10.57.94.150]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C17D13F778 for ; Fri, 6 Feb 2026 01:09:58 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9cd71c38-033b-11f1-9ccf-f158ae23cfc8 Message-ID: <93d53946-feea-4aaf-be5c-b64954894b7b@arm.com> Date: Fri, 6 Feb 2026 09:09:57 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] Fifth MPU Series Content-Language: en-GB To: xen-devel@lists.xenproject.org References: <20260206090155.68466-1-harry.ramsey@arm.com> From: Harry Ramsey In-Reply-To: <20260206090155.68466-1-harry.ramsey@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 06/02/2026 09:01, Harry Ramsey wrote: > This series continues to further the ongoing work to introduce support > for MPU systems in Xen. > > The patches in this series aim to implement MPU specific p2m functions. > > Harry Ramsey (2): > arm/mpu: Introduce `v8r_el1_msa` device tree property for domains > arm/mpu: Implement p2m tables > > Penny Zheng (1): > arm/mpu: implement setup_virt_paging for MPU system > > docs/misc/arm/device-tree/booting.txt | 11 ++++ > xen/arch/arm/arm64/mpu/p2m.c | 67 +++++++++++++++++++++- > xen/arch/arm/dom0less-build.c | 25 +++++++++ > xen/arch/arm/domain.c | 16 ++++++ > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ > xen/arch/arm/include/asm/cpufeature.h | 13 ++++- > xen/arch/arm/include/asm/domain.h | 9 +++ > xen/arch/arm/include/asm/mpu.h | 5 ++ > xen/arch/arm/include/asm/mpu/p2m.h | 12 ++++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/include/asm/processor.h | 11 ++++ > xen/arch/arm/mpu/p2m.c | 71 +++++++++++++++++++++++- > xen/include/public/arch-arm.h | 4 ++ > 15 files changed, 250 insertions(+), 7 deletions(-) > > -- > 2.43.0 > This is a complete rework of the previous patch: https://patchwork.kernel.org/project/xen-devel/patch/20260119105022.3616126-1-harry.ramsey@arm.com/ v2: - Split `implement setup_virt_paging for MPU system` into `arm/mpu: implement setup_virt_paging for MPU system` and `Implement p2m tables` - Rework register setup within `setup_virt_paging` to be more concise - Introduce v8r_el1_msa device tree parameter From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:17:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:17:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223035.1530688 (Exim 4.92) (envelope-from ) id 1voHxT-0002Ec-Sw; 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Fri, 06 Feb 2026 01:16:55 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Fri, 6 Feb 2026 10:16:44 +0100 X-Gm-Features: AZwV_QjXp9DRPui5uG1Nm-KlF1mnWZ8D9-0nik7Tczx6wq6kr7FZbgo1A9ENgkU Message-ID: Subject: Re: [PATCH 01/12] xen/arm: ffa: Add endpoint lookup helper To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > Direct messaging paths duplicate endpoint validation and RCU domain > lookup logic across multiple call sites, which makes the checks easy to > drift and complicates maintenance. > > Introduce ffa_endpoint_domain_lookup() to centralize this logic. The > helper validates the endpoint ID (rejecting ID 0 for the hypervisor), > performs RCU domain lookup, ensures the domain is live and has an > initialized FF-A context with a negotiated version, and returns the > domain locked via RCU. > > Switch ffa_msg_send2_vm() to use the helper, replacing its open-coded > validation sequence. This consolidates approximately 20 lines of > duplicated checks into a single call. > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa.c | 45 ++++++++++++++++++++++++++++++++++ > xen/arch/arm/tee/ffa_msg.c | 24 +++--------------- > xen/arch/arm/tee/ffa_private.h | 3 +++ > 3 files changed, 51 insertions(+), 21 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index ed18e76080d0..6de2b9f8ac8e 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -433,6 +433,51 @@ static bool ffa_handle_call(struct cpu_user_regs *re= gs) > return true; > } > > +/* > + * Look up a domain by its FF-A endpoint ID and validate it's ready for = FF-A. > + * Returns FFA_RET_OK on success with domain locked via RCU. > + * Caller must call rcu_unlock_domain() when done. > + * > + * Validates: > + * - endpoint_id is not 0 (the hypervisor) > + * - domain exists and is live > + * - domain has FF-A context initialized > + * - domain has negotiated an FF-A version > + */ > +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain *= *d_out, > + struct ffa_ctx **ctx_out) > +{ > + struct domain *d; > + struct ffa_ctx *ctx; > + int err; > + > + if ( endpoint_id =3D=3D 0 ) > + return FFA_RET_INVALID_PARAMETERS; > + > + err =3D rcu_lock_live_remote_domain_by_id(endpoint_id - 1, &d); > + if ( err ) > + return FFA_RET_INVALID_PARAMETERS; > + > + if ( !d->arch.tee ) > + { > + rcu_unlock_domain(d); > + return FFA_RET_INVALID_PARAMETERS; > + } > + > + ctx =3D d->arch.tee; > + if ( !ACCESS_ONCE(ctx->guest_vers) ) > + { > + rcu_unlock_domain(d); > + return FFA_RET_INVALID_PARAMETERS; > + } > + > + *d_out =3D d; > + if ( ctx_out ) > + *ctx_out =3D ctx; > + > + return FFA_RET_OK; > +} > + > static int ffa_domain_init(struct domain *d) > { > struct ffa_ctx *ctx; > diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c > index 4e26596461a9..10856fddcbc4 100644 > --- a/xen/arch/arm/tee/ffa_msg.c > +++ b/xen/arch/arm/tee/ffa_msg.c > @@ -161,30 +161,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, co= nst void *src_buf, > struct ffa_part_msg_rxtx_1_2 *dst_msg; > void *rx_buf; > size_t rx_size; > - int err; > int32_t ret; > > - if ( dst_id =3D=3D 0 ) > - /* FF-A ID 0 is the hypervisor, this is not valid */ > - return FFA_RET_INVALID_PARAMETERS; > - > /* This is also checking that dest is not src */ > - err =3D rcu_lock_live_remote_domain_by_id(dst_id - 1, &dst_d); > - if ( err ) > - return FFA_RET_INVALID_PARAMETERS; > - > - if ( dst_d->arch.tee =3D=3D NULL ) > - { > - ret =3D FFA_RET_INVALID_PARAMETERS; > - goto out_unlock; > - } > - > - dst_ctx =3D dst_d->arch.tee; > - if ( !ACCESS_ONCE(dst_ctx->guest_vers) ) > - { > - ret =3D FFA_RET_INVALID_PARAMETERS; > - goto out_unlock; > - } > + ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > + if ( ret ) > + return ret; > > /* This also checks that destination has set a Rx buffer */ > ret =3D ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 282c105f3bce..cd7ecabc7eff 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -437,6 +437,9 @@ int32_t ffa_partinfo_domain_init(struct domain *d); > bool ffa_partinfo_domain_destroy(struct domain *d); > void ffa_handle_partition_info_get(struct cpu_user_regs *regs); > > +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain *= *d_out, > + struct ffa_ctx **ctx_out); > + > bool ffa_rxtx_spmc_init(void); > void ffa_rxtx_spmc_destroy(void); > void *ffa_rxtx_spmc_rx_acquire(void); > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Fri Feb 06 09:24:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 09:24:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223043.1530699 (Exim 4.92) (envelope-from ) id 1voI4O-0003tZ-JW; Fri, 06 Feb 2026 09:24:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223043.1530699; Fri, 06 Feb 2026 09:24:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voI4O-0003tR-Fi; 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a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770369844; x=1801905844; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=wPZfRdP+k5tHXCWNK6Ygu9GCntNiGeUU6L8G+KPNkCQ=; b=RUt2QEnftwM1KiJrBNHRT2TK2Ivwb11iwqsRxog1/IBIeDcwSCYdpwFd HgqFbV1YJF7oC9RMe8s0HOYmw/xAbDNftAGXAQLfGqxduUHQJPNSk4D1l ovuZJplJ7DhqBYXXJN1RUZh0LRxncQ9zABFbWHOzttU0Z98oqweIqX1Vk v8mxFUv8Om1CE2axUC0023wveuJDzihyjUD1YMAuUEbeHsy7XgxTASoUF w/cZBCLntjJtnmEy0TY5/gJza5JcBoCtNrYLPw67xy0EPd2DVhltMgqbg 3MKesNGHaVjUs12HPnquyTFUOGQqPu9bfLcriDup5eYTdYoeF4U5WU+cH A==; X-IronPort-AV: E=Sophos;i="6.21,276,1763391600"; d="scan'208";a="578889420" Date: Fri, 6 Feb 2026 18:23:53 +0900 From: Shashank Balaji To: Sohil Mehta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird Subject: Re: [PATCH 3/3] x86/virt: rename x2apic_available to x2apic_without_ir_available Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-3-71c8f488a88b@sony.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Feb 05, 2026 at 04:10:37PM -0800, Sohil Mehta wrote: > On 2/2/2026 1:51 AM, Shashank Balaji wrote: > > No functional change. > > > > x86_init.hyper.x2apic_available is used only in try_to_enable_x2apic to check if > > x2apic needs to be disabled if interrupt remapping support isn't present. But > > the name x2apic_available doesn't reflect that usage. > > > > I don't understand the premise of this patch. Shouldn't the variable > name reflect what is stored rather than how it is used? Sorry about the confusion, I should have used '()'. x86_init.hyper.x2apic_available() is called only in try_to_enable_x2apic(). Here's the relevant snippet: static __init void try_to_enable_x2apic(int remap_mode) { if (x2apic_state == X2APIC_DISABLED) return; if (remap_mode != IRQ_REMAP_X2APIC_MODE) { u32 apic_limit = 255; /* * Using X2APIC without IR is not architecturally supported * on bare metal but may be supported in guests. */ if (!x86_init.hyper.x2apic_available()) { pr_info("x2apic: IRQ remapping doesn't support X2APIC mode\n"); x2apic_disable(); return; } So the question being asked is, "can x2apic be used without IR?", but the name "x2apic_available" signals "is x2apic available?". I found this confusing while going through the source. Most hypervisors set their x2apic_available() implementation to essentially return if the CPU supports x2apic or not, which is valid given the name "x2apic_available", but x2apic availability is not what's in question at the callsite. > > This is what x2apic_available is set to for various hypervisors: > > > > acrn boot_cpu_has(X86_FEATURE_X2APIC) > > mshyperv boot_cpu_has(X86_FEATURE_X2APIC) > > xen boot_cpu_has(X86_FEATURE_X2APIC) or false > > vmware vmware_legacy_x2apic_available > > kvm kvm_cpuid_base() != 0 > > jailhouse x2apic_enabled() > > bhyve true > > default false > > > > If both interrupt remapping and x2apic are enabled, what would the name > x2apic_without_ir_available signify? If IR is enabled, then the branch to call x2apic_available() wouldn't be taken :) So the meaning of x2apic_without_ir_available wouldn't be relevant anymore. > A value of "true" would mean x2apic is available without IR. But that > would be inaccurate for most hypervisors. A value of "false" could be > interpreted as x2apic is not available, which is also inaccurate. > > To me, x2apic_available makes more sense than > x2apic_without_ir_available based on the values being set by the > hypervisors. I agree with you, and I think therein lies the problem. Most hypervisors are answering the broader question "is x2apic available?", so the name "x2apic_available" makes sense. I think further work is required to check if various implementations of x2apic_available() also need to be changed to reflect the "x2apic without IR?" semantic, but I don't know enough to do that myself. Maybe I should have added TODOs above the implementations. I would like the feedback of the virt folks too on all this, maybe I'm misinterpreting what's going on here. > > Bare metal and vmware correctly check if x2apic is available without interrupt > > remapping. The rest of them check if x2apic is enabled/supported, and kvm just > > checks if the kernel is running on kvm. The other hypervisors may have to have > > their checks audited. > > > AFAIU, the value on bare metal is set to false because this is a > hypervisor specific variable. Perhaps I have misunderstood something? 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Fri, 06 Feb 2026 01:28:29 -0800 (PST) MIME-Version: 1.0 References: <9886df295f4c4365668576cc956299ee36f36c8b.1770115301.git.bertrand.marquis@arm.com> In-Reply-To: <9886df295f4c4365668576cc956299ee36f36c8b.1770115301.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Fri, 6 Feb 2026 10:28:18 +0100 X-Gm-Features: AZwV_Qj9QyssabLDHCzs3J98Sgr51l9lPVztXoTTsnmXQ_CWV0Vhp6RomyItEBE Message-ID: Subject: Re: [PATCH 02/12] xen/arm: ffa: Fix MEM_SHARE NS attribute handling To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > The FF-A memory attribute encoding is currently a literal value (0x2f), > which makes reviews and validation harder. In addition, MEM_SHARE > accepts the NS (non-secure) attribute bit even though the normal world > must not set it according to FF-A specification. > > Introduce named attribute bit masks and express FFA_NORMAL_MEM_REG_ATTR > in terms of them for clarity. > > Reject MEM_SHARE descriptors with the NS bit set, returning > INVALID_PARAMETERS to match FF-A v1.1 rules that prohibit normal world > from setting this bit. > > Functional impact: MEM_SHARE now rejects descriptors with NS bit set, > which were previously accepted but violate FF-A specification. To be fair, it was also rejected earlier, but with a different error code. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_private.h | 17 ++++++++++++++++- > xen/arch/arm/tee/ffa_shm.c | 6 ++++++ > 2 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index cd7ecabc7eff..b625f1c72914 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -129,11 +129,26 @@ > #define FFA_HANDLE_HYP_FLAG BIT(63, ULL) > #define FFA_HANDLE_INVALID 0xffffffffffffffffULL > > +/* NS attribute was introduced in v1.1 */ > +#define FFA_MEM_ATTR_NS BIT(6, U) > + > +#define FFA_MEM_ATTR_TYPE_DEV (1U << 3) > +#define FFA_MEM_ATTR_TYPE_MEM (2U << 4) > + > +#define FFA_MEM_ATTR_NC (1U << 2) > +#define FFA_MEM_ATTR_WB (3U << 2) > + > +#define FFA_MEM_ATTR_NON_SHARE (0U) > +#define FFA_MEM_ATTR_OUT_SHARE (2U) > +#define FFA_MEM_ATTR_INN_SHARE (3U) > + > /* > * Memory attributes: Normal memory, Write-Back cacheable, Inner shareab= le > * Defined in FF-A-1.1-REL0 Table 10.18 at page 175. > */ > -#define FFA_NORMAL_MEM_REG_ATTR 0x2fU > +#define FFA_NORMAL_MEM_REG_ATTR (FFA_MEM_ATTR_TYPE_MEM | \ > + FFA_MEM_ATTR_WB | \ > + FFA_MEM_ATTR_INN_SHARE) > /* > * Memory access permissions: Read-write > * Defined in FF-A-1.1-REL0 Table 10.15 at page 168. > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 8282bacf85d3..90800e44a86a 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -512,6 +512,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs= ) > if ( ret ) > goto out_unlock; > > + if ( trans.mem_reg_attr & FFA_MEM_ATTR_NS ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out_unlock; > + } > + > if ( trans.mem_reg_attr !=3D FFA_NORMAL_MEM_REG_ATTR ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > -- > 2.50.1 (Apple Git-155) > Looks good, but I think the commit message needs a small update or clarification. Cheers, Jens From xen-devel-bounces@lists.xenproject.org Fri Feb 06 10:38:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 10:38:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223101.1530738 (Exim 4.92) (envelope-from ) id 1voJDz-00059l-V8; Fri, 06 Feb 2026 10:38:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223101.1530738; Fri, 06 Feb 2026 10:38:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voJDz-00059e-Rh; Fri, 06 Feb 2026 10:38:07 +0000 Received: by outflank-mailman (input) for mailman id 1223101; Fri, 06 Feb 2026 10:38:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voJDz-00059Y-4w for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 10:38:07 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id eadc725a-0347-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 11:38:04 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4801eb2c0a5so18398135e9.3 for ; Fri, 06 Feb 2026 02:38:04 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 06 Feb 2026 02:38:03 -0800 (PST) Message-ID: <4bdcd7e0-ff9d-4bbd-8337-aa80d7d66ce9@suse.com> Date: Fri, 6 Feb 2026 11:38:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Add Darwin.mk for GNU toolchains To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 09:17, Bertrand Marquis wrote: > Xen does not provide a Darwin build configuration for selecting > GNU tool definitions. On macOS, the tools we use are either GNU > compatible or we only rely on features supported by Mac OS, so > using the GNU tool definitions is appropriate. > > Add config/Darwin.mk to include StdGNU.mk and force > XEN_COMPILE_ARCH=Darwin, ensuring Darwin builds always follow > the cross-compile path as we depend on the Linux ABI so compiling > on Mac OS is always a cross compilation case. > > An example of how to build the hypervisor for arm64 on Mac OS > (tools cannot be build for now) using a compiler from brew: > - brew install aarch64-elf-gcc > - cd xen > - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc > > Signed-off-by: Bertrand Marquis > --- > Changes since v2: > - Subject was "xen: Add macOS hypervisor build configuration" > - Update Darwin.mk comments to more accurate versions (Jan) > - Remove the build-on-macos help as we have no dependency on anything > coming from brew anymore and the toolchain can be retrieved by lots of > other solutions than brew on mac os. Switch to a simple doc in the > commit message instead Did you see Roger's notice on Matrix about objcopy? > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,7 @@ > +# Use GNU tool definitions as the tools we are using are either GNU compatible > +# or we only use features which are supported on Mac OS. > +include $(XEN_ROOT)/config/StdGNU.mk > + > +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. > +# Force COMPILE_ARCH to a fake value to make sure it is always the case. > +XEN_COMPILE_ARCH = Darwin I first wondered why you say "fake", seeing the file is named Darwin.mk. But in Config.mk's cross-compile check the build host OS doesn't even matter. So yes, it needs faking here for the time being. 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Smith" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] efi: Enable EFI_SET_VIRTUAL_ADDRESS_MAP by default Message-ID: References: <82dfede43d81c2072f90b01d12fe5ef18c80fc24.1770312308.git.teddy.astie@vates.tech> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="cPD7qH7Wc/gZxncq" Content-Disposition: inline In-Reply-To: --cPD7qH7Wc/gZxncq Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 6 Feb 2026 12:52:18 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Roger Pau =?utf-8?B?TW9ubsOp?= , Stefano Stabellini , "Daniel P. Smith" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] efi: Enable EFI_SET_VIRTUAL_ADDRESS_MAP by default On Fri, Feb 06, 2026 at 07:29:49AM +0100, Jan Beulich wrote: > On 05.02.2026 18:27, Teddy Astie wrote: > > Many machines fail to boot if this option is disabled, as > > there are no known drawback toggling this option, enable it > > by default. >=20 > "no known drawback" ignores why it wasn't enabled originally. Imo this > wants at least mentioning, if not discussing. Relevant discussion was at https://lore.kernel.org/xen-devel/4e46a667-da69-= 9f25-387e-4dd45db10cda@suse.com/ (previous attempt at switching the default) And also, (large) part of the reason for this being off by default initially was it being close to 4.13 release: https://lore.kernel.org/xen-devel/272a9354-bcb4-50a4-a251-6a453221d6e3@citr= ix.com/ Now it's substantially earlier in the 4.22 release cycle. But yes, some note in patch description would be nice. > > --- a/xen/common/Kconfig > > +++ b/xen/common/Kconfig > > @@ -363,13 +363,14 @@ config KEXEC > > =20 > > config EFI_SET_VIRTUAL_ADDRESS_MAP > > bool "EFI: call SetVirtualAddressMap()" if EXPERT > > + default y > > help > > Call EFI SetVirtualAddressMap() runtime service to setup memory = map for > > further runtime services. According to UEFI spec, it isn't stric= tly > > necessary, but many UEFI implementations misbehave when this cal= l is > > missing. > > =20 > > - If unsure, say N. > > + If unsure, say Y. >=20 > When this was added, it was actually hacked in with the aim of minimal > intrusiveness. When we now default it to on, I wonder if other changes > shouldn't be made (maybe not right in this patch, but perhaps in a > single series). For example, identity mapping (with its implied > restrictions) ought to be possible to do away with when the option is > enabled. Whether the separate EFI page tables would still be needed > also is questionable. This is an interesting question, but IMHO the current approach is safer (or rather: more reliable) - which is relevant given how many UEFI systems are not exactly spec compliant... One approach that could be tried is to mirror what Linux does, but I don't see it as necessary for flipping the default. And in fact I would rather prefer to not do that at the same time - the current approach is battle tested by several downstream projects on a large number of systems. > I further wonder whether the EXPERT dependency of the prompt wouldn't > better be dropped when flipping the default. IMO the EXPERT dependency is still relevant. This option is basically "break Xen on a large number of UEFI systems". --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --cPD7qH7Wc/gZxncq Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmF1fIACgkQ24/THMrX 1ywpaAf+IdQvew+Tmba3gd8DfFsbt/AqXwj2y9McV+0qoKjZ7VuLLj5Z3L5rY48Q nI/n/5w8Jbanh/uK4/o87ApPxnw4SRKftr3w308s3lQPE/qoxwy7BPpbULaguMV+ yUEO9cQTTPprSsY7qcu58HCWKgWF0jA1x2IA3uKU8WyDdxEdQ7dvJp3FX/xWSzaG W8j1TVAj1XIoisNe8q6aPB9+wtFaecCj9m7eRU0C873ax6y5V+ZbWah6z/GVX118 4QW0JligkgQY5Wb6kJyQ/0O5e8qC24E2nbtVAtx+bfMY4n+4PmUAKgRrcBqM5wst FWNkBl5ASrJR4AgrxPnY3Y32xTk8Hg== =rCxC -----END PGP SIGNATURE----- --cPD7qH7Wc/gZxncq-- From xen-devel-bounces@lists.xenproject.org Fri Feb 06 12:04:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 12:04:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223163.1530768 (Exim 4.92) (envelope-from ) id 1voKZu-00082q-7e; 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Smith" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] efi: Enable EFI_SET_VIRTUAL_ADDRESS_MAP by default Message-ID: References: <82dfede43d81c2072f90b01d12fe5ef18c80fc24.1770312308.git.teddy.astie@vates.tech> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6fIOSKi6fkyCQFPu" Content-Disposition: inline In-Reply-To: --6fIOSKi6fkyCQFPu Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 6 Feb 2026 13:04:38 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Roger Pau =?utf-8?B?TW9ubsOp?= , Stefano Stabellini , "Daniel P. Smith" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] efi: Enable EFI_SET_VIRTUAL_ADDRESS_MAP by default On Fri, Feb 06, 2026 at 12:52:18PM +0100, Marek Marczykowski-G=C3=B3recki w= rote: > On Fri, Feb 06, 2026 at 07:29:49AM +0100, Jan Beulich wrote: > > I further wonder whether the EXPERT dependency of the prompt wouldn't > > better be dropped when flipping the default. >=20 > IMO the EXPERT dependency is still relevant. This option is basically > "break Xen on a large number of UEFI systems". To be clear: I mean disabling the option (changing the new default) should be IMHO hidden behind EXPERT. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --6fIOSKi6fkyCQFPu Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmF2NYACgkQ24/THMrX 1yytngf/edaIsV+0DngPXnzmL9xsuPT3k0V7h4WSgth5ouF4gv02DFYC3p3FhLoU yqEACmeQ8D11URuS5Lyol4V2sztydtiIYbxNjr1/J/MQOocD4NMEWQziYljbdlNT nH+POiDeIfGXNiUKq+Jk8Vc6Lb0Glwumq5DbAjcQnIY9CgVEPgkXVZjY74kfzEQd vRSwhjStcPnnrNAqjtyeCHCD79qQf5ryE510oidv0pyQs4afh5pAr9W75JRwzwtB ztuVpvxZUiyXDmFdTtHWTYnvjh30/3uNDZMti85bdYEtNc5JUccxi6Z1olows3YQ LsiBiUb6UybCn+vMXSA3rKawFdZamA== =1uHT -----END PGP SIGNATURE----- --6fIOSKi6fkyCQFPu-- From xen-devel-bounces@lists.xenproject.org Fri Feb 06 12:58:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 12:58:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223189.1530778 (Exim 4.92) (envelope-from ) id 1voLPL-0006P6-Ub; Fri, 06 Feb 2026 12:57:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223189.1530778; Fri, 06 Feb 2026 12:57:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLPL-0006Oy-S4; Fri, 06 Feb 2026 12:57:59 +0000 Received: by outflank-mailman (input) for mailman id 1223189; Fri, 06 Feb 2026 12:57:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLPK-0006Os-GW for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 12:57:58 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 757dbe33-035b-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 13:57:57 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b8ea3d15580so87374466b.0 for ; Fri, 06 Feb 2026 04:57:57 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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It isn't needed when we don't clear the flag. > > Furthermore, one side of the barrier being in common code, the other would > better be, too. This way, all architectures are covered (beyond any > specific needs they may have). Don't we want then move ... > > Signed-off-by: Jan Beulich > > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -333,17 +333,7 @@ void sync_local_execstate(void) > > void sync_vcpu_execstate(struct vcpu *v) > { > - /* > - * We don't support lazy switching. > - * > - * However the context may have been saved from a remote pCPU so we > - * need a barrier to ensure it is observed before continuing. > - * > - * Per vcpu_context_saved(), the context can be observed when > - * v->is_running is false (the caller should check it before calling > - * this function). > - */ > - smp_rmb(); > + /* Nothing to do -- no lazy switching */ > } ... to common code with ability to re-define sync_vcpu_execstate() by arch as only x86 does something inside this function? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri Feb 06 13:13:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 13:13:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223201.1530798 (Exim 4.92) (envelope-from ) id 1voLe4-0000rN-Bc; Fri, 06 Feb 2026 13:13:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223201.1530798; Fri, 06 Feb 2026 13:13:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLe4-0000rG-8v; Fri, 06 Feb 2026 13:13:12 +0000 Received: by outflank-mailman (input) for mailman id 1223201; Fri, 06 Feb 2026 13:13:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLe2-0000do-OF for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 13:13:10 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 953eed7e-035d-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 14:13:09 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-48327b8350dso3915035e9.1 for ; Fri, 06 Feb 2026 05:13:09 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-436296c0f2esm5726244f8f.19.2026.02.06.05.13.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Feb 2026 05:13:08 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 953eed7e-035d-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1770383589; x=1770988389; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vW8VdQJGm+HJLfdiFyEYvmbpGb/n1ANvl9UX6UaPxlQ=; b=cAkDeF6g4wLikJvbUOO/yEghYdLfqF+bAa1fAf7YzhZ5k44mHB3zNc3WddNM/++G4O eyJAZ74JbTG9tJHF4qwLe+SnmvdNzdnlCcUVbwo9+YfyXCz57bk9bZO0E7u5qkzmvylk ApGldOc9UB1Jbrv8Fr+N6X5jDjm7j0z5Lss90= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770383589; x=1770988389; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=vW8VdQJGm+HJLfdiFyEYvmbpGb/n1ANvl9UX6UaPxlQ=; b=P3+1w3wrrmRoU5YslnOYXqMaBmAsV9kBricHaxvuFTo8i8QZM0nDvdEbin4LApOHNt mWILaAxFesncX77cxXbZ6uj9OgngbrciOYQwn7lgL2Tcaa+Ag36A0tQMPr5YoETu49iy NqUrsDk3sPPsCUPqmE2vlNLsNbfCKdb7GRNcv1YNgvq93iiI/Ti/xjVcvS1nuJjl7JFC QuUuEl1B99WP0kv9YLha7UVZtiHXKQdRvIYrmkO0KJXTJOVv9GRz01yonZ8KC9pgjJ2R byg8hxXYR/OATP+DjPjMuBjwAGB5AlLBFE53szRcpJr763D/2Dxyo5zf8LmQh/0qS9kn Gbrg== X-Gm-Message-State: AOJu0YxgRWrbC4ejO6PqMTpxlDizaGA4R2kfKzhTPLlnkdChkapbsyMZ Eu8Wr2tstSWicX1Q7tJixf/W/cqoBPPH7JnJQ8A2ABd0e5RsKb62124chBYJGnI3Wtx9rhuBCXy 1oIlurObPtA== X-Gm-Gg: AZuq6aJmuEwpEGXQcz3Lvgo7JaN2eT3Ygyjk2ihEITmiFzM97ILRxalMSDVjAl0YuvG QSxgh/Q5PEVvSAR4ib18jZCzlM8JhS8Z9H5F1jm9AVFarsVMS8RbqI8yboZLcCOUHrNqNBmq4hv pxM9PHQimnbtgA+frvORmoqy4//g2yk0FrbWpphYEi72HDIPW8qYX37dXph/aRsW3jKd1WltJND nQaD6f7H7s9AZi/GLg/iS5Uvj6k733l2/IE0uHURSxqK0KBgTNjaDUPmlsfgN2NGVEDjETCmW6t 7UcR/5PzuBK1gxODpIkbyn59lm1YUJ8J7t5rGeFrrPxnoiUNAoWrVvysBxdSiyMq99C4DMDGYat XfnYGK3nhX+zDWyDudb/feQRrcntHmmJGaJy/R6nKOwJzkhrQ6qk16XYExnVhxuX7fBQDCJ4eCb I/yvhQHj1ceoiZ5pwC99DGdrx2q9fxhVjVFAaZRD0EzUU5AlnVuCO9WYY4HSi/dn5w09jj6g== X-Received: by 2002:a05:600c:470c:b0:483:103c:b1ee with SMTP id 5b1f17b1804b1-483201da9bamr41523865e9.8.1770383588708; Fri, 06 Feb 2026 05:13:08 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 2/2] x86/memtype: Deduplicate rendering of X86_MT_* Date: Fri, 6 Feb 2026 13:13:05 +0000 Message-Id: <20260206131305.2675905-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260206131305.2675905-1-andrew.cooper3@citrix.com> References: <20260206131305.2675905-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MTRR infrastructure has two different copies of mtrr_attrib_to_str(), one in .init and one in regular .text. EPT has another variation. All 3 are incomplete; they encode only the non-reserved values for the task, but hiding reserved values with ?'s is detrimental to the diagnostic purpose of these existing in the first place. Implement a single function which covers all the architectural values. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné Yes I know EPT tries to render the reserved reserved encodings numerically. It's a cute trick, but does get foiled by the '[MTRR_NUM_TYPES] = "??";' row which breaks things. Putting this in traps.c isn't great, but there isn't an obviously better place either. --- xen/arch/x86/cpu/mtrr/generic.c | 21 ++++----------------- xen/arch/x86/cpu/mtrr/main.c | 21 +++------------------ xen/arch/x86/include/asm/traps.h | 1 + xen/arch/x86/mm/p2m-ept.c | 22 +++------------------- xen/arch/x86/traps.c | 16 ++++++++++++++++ 5 files changed, 27 insertions(+), 54 deletions(-) diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c index ad6a24f055ec..0b30689a0b99 100644 --- a/xen/arch/x86/cpu/mtrr/generic.c +++ b/xen/arch/x86/cpu/mtrr/generic.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "mtrr.h" @@ -125,20 +126,6 @@ void __init get_mtrr_state(void) static bool __initdata mtrr_show; boolean_param("mtrr.show", mtrr_show); -static const char *__init mtrr_attrib_to_str(mtrr_type x) -{ - static const char __initconst strings[MTRR_NUM_TYPES][16] = - { - [X86_MT_UC] = "uncachable", - [X86_MT_WC] = "write-combining", - [X86_MT_WT] = "write-through", - [X86_MT_WP] = "write-protect", - [X86_MT_WB] = "write-back", - }; - - return (x < ARRAY_SIZE(strings) && strings[x][0]) ? strings[x] : "?"; -} - static unsigned int __initdata last_fixed_start; static unsigned int __initdata last_fixed_end; static mtrr_type __initdata last_fixed_type; @@ -149,7 +136,7 @@ static void __init print_fixed_last(const char *level) return; printk("%s %05x-%05x %s\n", level, last_fixed_start, - last_fixed_end - 1, mtrr_attrib_to_str(last_fixed_type)); + last_fixed_end - 1, x86_mt_name(last_fixed_type)); last_fixed_end = 0; } @@ -188,7 +175,7 @@ static void __init print_mtrr_state(const char *level) int width; printk("%sMTRR default type: %s\n", level, - mtrr_attrib_to_str(mtrr_state.def_type)); + x86_mt_name(mtrr_state.def_type)); if (mtrr_state.have_fixed) { const mtrr_type *fr = mtrr_state.fixed_ranges; const struct fixed_range_block *block = fixed_range_blocks; @@ -214,7 +201,7 @@ static void __init print_mtrr_state(const char *level) level, i, width, mtrr_state.var_ranges[i].base >> 12, width, mtrr_state.var_ranges[i].mask >> 12, - mtrr_attrib_to_str(mtrr_state.var_ranges[i].base & + x86_mt_name(mtrr_state.var_ranges[i].base & MTRR_PHYSBASE_TYPE_MASK)); else printk("%s %u disabled\n", level, i); diff --git a/xen/arch/x86/cpu/mtrr/main.c b/xen/arch/x86/cpu/mtrr/main.c index eff0500f0d06..f11fbf1a223b 100644 --- a/xen/arch/x86/cpu/mtrr/main.c +++ b/xen/arch/x86/cpu/mtrr/main.c @@ -39,6 +39,7 @@ #include #include #include +#include #include "mtrr.h" @@ -63,22 +64,6 @@ static bool __ro_after_init mtrr_if; static void set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type type); -static const char *const mtrr_strings[MTRR_NUM_TYPES] = -{ - "uncachable", /* 0 */ - "write-combining", /* 1 */ - "?", /* 2 */ - "?", /* 3 */ - "write-through", /* 4 */ - "write-protect", /* 5 */ - "write-back", /* 6 */ -}; - -static const char *mtrr_attrib_to_str(int x) -{ - return (x <= 6) ? mtrr_strings[x] : "?"; -} - /* This function returns the number of variable MTRRs */ static void __init set_num_var_ranges(void) { @@ -364,8 +349,8 @@ int mtrr_add_page(unsigned long base, unsigned long size, if (types_compatible(type, ltype)) continue; printk (KERN_WARNING "mtrr: type mismatch for %lx000,%lx000 old: %s new: %s\n", - base, size, mtrr_attrib_to_str(ltype), - mtrr_attrib_to_str(type)); + base, size, x86_mt_name(ltype), + x86_mt_name(type)); goto out; } if (increment) diff --git a/xen/arch/x86/include/asm/traps.h b/xen/arch/x86/include/asm/traps.h index 73097e957d05..00dde631ea5b 100644 --- a/xen/arch/x86/include/asm/traps.h +++ b/xen/arch/x86/include/asm/traps.h @@ -19,6 +19,7 @@ void percpu_traps_init(void); extern unsigned int ler_msr; const char *vector_name(unsigned int vec); +const char *x86_mt_name(unsigned int mt); #endif /* ASM_TRAP_H */ diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index 204bdb054a89..1950beb745af 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -21,6 +21,7 @@ #include #include #include +#include #include @@ -1489,21 +1490,6 @@ void ept_p2m_uninit(struct p2m_domain *p2m) free_cpumask_var(ept->invalidate); } -static const char *memory_type_to_str(unsigned int x) -{ - static const char memory_types[8][3] = { - [X86_MT_UC] = "UC", - [X86_MT_WC] = "WC", - [X86_MT_WT] = "WT", - [X86_MT_WP] = "WP", - [X86_MT_WB] = "WB", - [MTRR_NUM_TYPES] = "??", - }; - - ASSERT(x < ARRAY_SIZE(memory_types)); - return memory_types[x][0] ? memory_types[x] : "?"; -} - static void cf_check ept_dump_p2m_table(unsigned char key) { struct domain *d; @@ -1551,14 +1537,12 @@ static void cf_check ept_dump_p2m_table(unsigned char key) if ( p2m_is_pod(ept_entry->sa_p2mt) ) printk("gfn: %13lx order: %2d PoD\n", gfn, order); else - printk("gfn: %13lx order: %2d mfn: %13lx %c%c%c %c%c%c\n", + printk("gfn: %13lx order: %2d mfn: %13lx %c%c%c %s%c\n", gfn, order, ept_entry->mfn + 0UL, ept_entry->r ? 'r' : ' ', ept_entry->w ? 'w' : ' ', ept_entry->x ? 'x' : ' ', - memory_type_to_str(ept_entry->emt)[0], - memory_type_to_str(ept_entry->emt)[1] - ?: ept_entry->emt + '0', + x86_mt_name(ept_entry->emt), c ?: ept_entry->ipat ? '!' : ' '); if ( !(record_counter++ % 100) ) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index f621b99a5fcc..0d951762bce2 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1044,6 +1044,22 @@ const char *vector_name(unsigned int vec) return (vec < ARRAY_SIZE(names) && names[vec][0]) ? names[vec] : "???"; } +const char *x86_mt_name(unsigned int mt) +{ + static const char names[8][4] = { + [X86_MT_UC] = "UC", + [X86_MT_WC] = "WC", + [X86_MT_RSVD_2] = "Rs2", + [X86_MT_RSVD_3] = "Rs3", + [X86_MT_WT] = "WT", + [X86_MT_WP] = "WP", + [X86_MT_WB] = "WB", + [X86_MT_UCM] = "UC-", + }; + + return mt < ARRAY_SIZE(names) ? names[mt] : "?"; +} + void asmlinkage do_double_fault(struct cpu_user_regs *regs) { unsigned int cpu; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 13:13:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 13:13:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223200.1530788 (Exim 4.92) (envelope-from ) id 1voLe3-0000e7-5C; Fri, 06 Feb 2026 13:13:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223200.1530788; Fri, 06 Feb 2026 13:13:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLe3-0000e0-2d; Fri, 06 Feb 2026 13:13:11 +0000 Received: by outflank-mailman (input) for mailman id 1223200; Fri, 06 Feb 2026 13:13:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voLe2-0000do-47 for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 13:13:10 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 94e30115-035d-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 14:13:09 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-47ee0291921so6887805e9.3 for ; Fri, 06 Feb 2026 05:13:09 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-436296c0f2esm5726244f8f.19.2026.02.06.05.13.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Feb 2026 05:13:07 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 953ecb26-035d-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1770383589; x=1770988389; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=l06N7W/IgJqsoeByf1/E1bvHwGy9JIi2puRVREdrwfk=; b=FooH+3NJtFPRBCtoIX9seKxIE9B8reXEYf9Iw55ux1lQ/c9arEBXrwa+Z5Q1WiRT3A UfuXO3HO1IIeWoysy0iaoP5DQvwfUmD549xAaZVWFn3QVQM1ZTB4kzD+3KeWGbdmyGPM 4cNHpznCnB+eGtNqMtXFk7J52Y+ZDE5Y+ZAK8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770383589; x=1770988389; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=l06N7W/IgJqsoeByf1/E1bvHwGy9JIi2puRVREdrwfk=; b=gLzqT77S0X0aSlyScJzH7SUesOM97w6MvNgBekt22TH1H8JJlIwGPxcCx94kwhBdTq enHHhgzPAjkqcLtA6zhsJx9vRCf6859Rzn5pUU84N6XFIPNt91MYXLkkzN4JG4tRuION Qu6b2Sj6TBbmSOWQhl2rSBXIJyIs/AfqqnQVTjOdpimbS6rH10qfFQshcXDJVtT75Dr5 SBbasY9FnjUdbl6SvjTcLyXQ2EpXYmJr1lFsJ+G9+5IDjUX5wvBpW//ZKBgA0THIbnl9 QnRrM2AsVbrA78btnm/ARgOkuauHtZoAGStnW+ttVDe9S+LhJY4AamQNocm4ZpTakQ2y lZuQ== X-Gm-Message-State: AOJu0YwhgW9IaWwEEhq2WCnQCy3DhpEpd7wg+ustbUBFSLpnHFlA5mpl mSCWe5npME8Wj4k+JvQpNNQGm0cu/0WDziDt8y1ytC86gRmkuBZD9wB//i4AeJ4tey/W2H+4ejs B9uF9 X-Gm-Gg: AZuq6aKNcvCBpoq6oXbCnU46yF3dIBvIzvrVnSDAvC6/q8ch8QckWsJ8w1+q7FWzDNX Hh/u1oQzkt5VcKMm6wFvCvZA9W3Xsm2W8t6rbWuJ/GeTyAFN0uncz5xTptIV2N2dIjQandGTGM8 +9fNrUb+JL41s3vHo8b1yFFDkZoHBTpBvWS9SgrGkEk3j/ET+XcUCSFlkPCLPsmLWpzSjmIijwY HdFTMZcuAmk67C1mIEBsr+Gv1GrJDWTpXH/tkFApZxPtlLOWAA2NFZKb/o8H1SuaZxzX9OpjkY8 PavDMzCk+Be/Ldppxv77/d8XCcfkUUvn9iLwHkIRJML+77HNpr01/kUYasOWhXpsgadQ9Emvt8P homV/8/eyPavi7wXqYR6F4o/goYADYMqrDB8Us9iA/6MxUws1+Ue5jLvL/0DXeGDWod/T4gzzNy lIgdFFjpKpxsGEfmst3UKGl5slExKs0lLrI0rsCnt0zW5LnBIvf31TDC7z9RMDpf8ndcWWLBpdF bB+aV7K6g== X-Received: by 2002:a05:6000:18a4:b0:431:c06:bc82 with SMTP id ffacd0b85a97d-436209967b3mr11293997f8f.12.1770383588085; Fri, 06 Feb 2026 05:13:08 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 1/2] x86: Sort headers Date: Fri, 6 Feb 2026 13:13:04 +0000 Message-Id: <20260206131305.2675905-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260206131305.2675905-1-andrew.cooper3@citrix.com> References: <20260206131305.2675905-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ... prior to making changes. mtrr/main.c absolutely does not need to include asm/uaccess.h No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné --- xen/arch/x86/cpu/mtrr/generic.c | 10 ++++++---- xen/arch/x86/cpu/mtrr/main.c | 5 +++-- xen/arch/x86/mm/p2m-ept.c | 22 ++++++++++++---------- 3 files changed, 21 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c index c587e9140e06..ad6a24f055ec 100644 --- a/xen/arch/x86/cpu/mtrr/generic.c +++ b/xen/arch/x86/cpu/mtrr/generic.c @@ -1,17 +1,19 @@ /* This only handles 32bit MTRR on 32bit hosts. This is strictly wrong because MTRRs can span upto 40 bits (36bits on most modern x86) */ -#include + #include +#include #include #include -#include + +#include #include #include #include -#include #include +#include #include -#include + #include "mtrr.h" static const struct fixed_range_block { diff --git a/xen/arch/x86/cpu/mtrr/main.c b/xen/arch/x86/cpu/mtrr/main.c index d4f549d92ee7..eff0500f0d06 100644 --- a/xen/arch/x86/cpu/mtrr/main.c +++ b/xen/arch/x86/cpu/mtrr/main.c @@ -34,11 +34,12 @@ #include #include #include + #include +#include #include -#include #include -#include + #include "mtrr.h" /* No blocking mutexes in Xen. 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On macOS, the tools we use are either GNU > > compatible or we only rely on features supported by Mac OS, so > > using the GNU tool definitions is appropriate. > > > > Add config/Darwin.mk to include StdGNU.mk and force > > XEN_COMPILE_ARCH=Darwin, ensuring Darwin builds always follow > > the cross-compile path as we depend on the Linux ABI so compiling > > on Mac OS is always a cross compilation case. > > > > An example of how to build the hypervisor for arm64 on Mac OS > > (tools cannot be build for now) using a compiler from brew: > > - brew install aarch64-elf-gcc > > - cd xen > > - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc > > > > Signed-off-by: Bertrand Marquis > > --- > > Changes since v2: > > - Subject was "xen: Add macOS hypervisor build configuration" > > - Update Darwin.mk comments to more accurate versions (Jan) > > - Remove the build-on-macos help as we have no dependency on anything > > coming from brew anymore and the toolchain can be retrieved by lots of > > other solutions than brew on mac os. Switch to a simple doc in the > > commit message instead > > Did you see Roger's notice on Matrix about objcopy? I think Bertrand considers objcopy to be part of the toolchain, hence "retrieving a toolchain" is meant to include objcopy (either the GNU, LLVM or elftoolchain one) > > --- /dev/null > > +++ b/config/Darwin.mk > > @@ -0,0 +1,7 @@ > > +# Use GNU tool definitions as the tools we are using are either GNU compatible > > +# or we only use features which are supported on Mac OS. > > +include $(XEN_ROOT)/config/StdGNU.mk > > + > > +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. > > +# Force COMPILE_ARCH to a fake value to make sure it is always the case. > > +XEN_COMPILE_ARCH = Darwin > > I first wondered why you say "fake", seeing the file is named Darwin.mk. But > in Config.mk's cross-compile check the build host OS doesn't even matter. So > yes, it needs faking here for the time being. Hm, setting it to "Darwin" seems weird to me. I understand the purpose of this is to force the user to set XEN_TARGET_ARCH explicitly. I however wouldn't see it as fully uncorrect to not set this. It will then execute `uname -m` and get `arm64` back for Apple silicon macs (which is kind of OK?). Other I suggest we use a non-OSX specific value here, so that if required we could distinguish this case where the user is expected to provide XEN_COMPILE_ARCH. Maybe XEN_COMPILE_ARCH = { unknown | undefined }? Thanks, Roger. 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(message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Fri, 6 Feb 2026 15:16:24 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Bertrand Marquis Cc: Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH v3] xen: Add Darwin.mk for GNU toolchains Message-ID: References: <4bdcd7e0-ff9d-4bbd-8337-aa80d7d66ce9@suse.com> <16ECC44C-5C56-47CF-8AB6-DED34990C5B1@arm.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <16ECC44C-5C56-47CF-8AB6-DED34990C5B1@arm.com> X-ClientProxiedBy: MA2P292CA0018.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|MW4PR03MB6540:EE_ X-MS-Office365-Filtering-Correlation-Id: 5cd4649e-9708-48c7-41eb-08de658a5119 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+0000, Bertrand Marquis wrote: > > > > On 6 Feb 2026, at 14:29, Roger Pau Monné wrote: > > > > On Fri, Feb 06, 2026 at 11:38:02AM +0100, Jan Beulich wrote: > >> On 06.02.2026 09:17, Bertrand Marquis wrote: > >>> Xen does not provide a Darwin build configuration for selecting > >>> GNU tool definitions. On macOS, the tools we use are either GNU > >>> compatible or we only rely on features supported by Mac OS, so > >>> using the GNU tool definitions is appropriate. > >>> > >>> Add config/Darwin.mk to include StdGNU.mk and force > >>> XEN_COMPILE_ARCH=Darwin, ensuring Darwin builds always follow > >>> the cross-compile path as we depend on the Linux ABI so compiling > >>> on Mac OS is always a cross compilation case. > >>> > >>> An example of how to build the hypervisor for arm64 on Mac OS > >>> (tools cannot be build for now) using a compiler from brew: > >>> - brew install aarch64-elf-gcc > >>> - cd xen > >>> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=gcc I've just noticed: it's a bit misleading to use HOSTCC=gcc here, as (under a normal OSX system) gcc is a plain wrapped around clang: % gcc -v Apple clang version 17.0.0 (clang-1700.6.3.2) Target: arm64-apple-darwin24.6.0 Thread model: posix You might as well use HOSTCC=clang and make it explicit the host compiler is clang and not gcc. > >>> > >>> Signed-off-by: Bertrand Marquis > >>> --- > >>> Changes since v2: > >>> - Subject was "xen: Add macOS hypervisor build configuration" > >>> - Update Darwin.mk comments to more accurate versions (Jan) > >>> - Remove the build-on-macos help as we have no dependency on anything > >>> coming from brew anymore and the toolchain can be retrieved by lots of > >>> other solutions than brew on mac os. Switch to a simple doc in the > >>> commit message instead > >> > >> Did you see Roger's notice on Matrix about objcopy? > > > > I think Bertrand considers objcopy to be part of the toolchain, hence > > "retrieving a toolchain" is meant to include objcopy (either the GNU, > > LLVM or elftoolchain one) > > Sorry i only saw your message in matrix. > > I checked and i installed both gcc and binutils in homebrew. > > So i think the commit message needs modifying to stay: > > brew install aarch64-elf-gcc aarch64-elf-binutils > > to be fully complete. Yes, I didn't notice that in the commit message you explicitly mentioned the brew install dependencies. There's also bison and flex needed for Kconfig, but AFAICT those are part of command line tools. I think python is also part of the command line tools, and not sure it's required for arm64, as it's required for x86 to generate the cpuid headers (but I don't know if arm64 has anything equivalent). > > > >>> --- /dev/null > >>> +++ b/config/Darwin.mk > >>> @@ -0,0 +1,7 @@ > >>> +# Use GNU tool definitions as the tools we are using are either GNU compatible > >>> +# or we only use features which are supported on Mac OS. > >>> +include $(XEN_ROOT)/config/StdGNU.mk > >>> + > >>> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. > >>> +# Force COMPILE_ARCH to a fake value to make sure it is always the case. > >>> +XEN_COMPILE_ARCH = Darwin > >> > >> I first wondered why you say "fake", seeing the file is named Darwin.mk. But > >> in Config.mk's cross-compile check the build host OS doesn't even matter. So > >> yes, it needs faking here for the time being. > > > > Hm, setting it to "Darwin" seems weird to me. I understand the > > purpose of this is to force the user to set XEN_TARGET_ARCH > > explicitly. I however wouldn't see it as fully uncorrect to not set > > this. It will then execute `uname -m` and get `arm64` back for Apple > > silicon macs (which is kind of OK?). Other I suggest we use a non-OSX > > specific value here, so that if required we could distinguish this > > case where the user is expected to provide XEN_COMPILE_ARCH. > > > > Maybe XEN_COMPILE_ARCH = { unknown | undefined }? > > I am ok to change this with either but maybe unsupported could be > a third choice? No strong opinion for either naming, as long as we don't explicitly use "Darwin". Thanks, Roger. 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Fri, 06 Feb 2026 07:00:17 -0800 (PST) Message-ID: <3c6fc5d9-dbb4-44f6-97fb-85095429c7d1@suse.com> Date: Fri, 6 Feb 2026 16:00:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Add Darwin.mk for GNU toolchains To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , "xen-devel@lists.xenproject.org" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4bdcd7e0-ff9d-4bbd-8337-aa80d7d66ce9@suse.com> <16ECC44C-5C56-47CF-8AB6-DED34990C5B1@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <16ECC44C-5C56-47CF-8AB6-DED34990C5B1@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.02.2026 14:34, Bertrand Marquis wrote: >> On 6 Feb 2026, at 14:29, Roger Pau Monné wrote: >> On Fri, Feb 06, 2026 at 11:38:02AM +0100, Jan Beulich wrote: >>> On 06.02.2026 09:17, Bertrand Marquis wrote: >>>> --- /dev/null >>>> +++ b/config/Darwin.mk >>>> @@ -0,0 +1,7 @@ >>>> +# Use GNU tool definitions as the tools we are using are either GNU compatible >>>> +# or we only use features which are supported on Mac OS. >>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>> + >>>> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. >>>> +# Force COMPILE_ARCH to a fake value to make sure it is always the case. >>>> +XEN_COMPILE_ARCH = Darwin >>> >>> I first wondered why you say "fake", seeing the file is named Darwin.mk. But >>> in Config.mk's cross-compile check the build host OS doesn't even matter. So >>> yes, it needs faking here for the time being. >> >> Hm, setting it to "Darwin" seems weird to me. I understand the >> purpose of this is to force the user to set XEN_TARGET_ARCH >> explicitly. I however wouldn't see it as fully uncorrect to not set >> this. It will then execute `uname -m` and get `arm64` back for Apple >> silicon macs (which is kind of OK?). Other I suggest we use a non-OSX >> specific value here, so that if required we could distinguish this >> case where the user is expected to provide XEN_COMPILE_ARCH. >> >> Maybe XEN_COMPILE_ARCH = { unknown | undefined }? > > I am ok to change this with either but maybe unsupported could be > a third choice? If I ran into "unsupported" there, I'd wonder if I even should trust any of this and try it out. I'd prefer either of Roger's suggestions, in the order given. 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Fri, 06 Feb 2026 07:02:09 -0800 (PST) Message-ID: <436bb64f-39d9-4b01-9f50-7a734f3e6764@suse.com> Date: Fri, 6 Feb 2026 16:02:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] sched: move vCPU exec state barriers To: Oleksii Kurochko Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Juergen Gross , Dario Faggioli , George Dunlap , "xen-devel@lists.xenproject.org" References: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> <1beb7c04-5c21-4ba2-a74e-467f659224e5@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1beb7c04-5c21-4ba2-a74e-467f659224e5@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.02.2026 13:57, Oleksii Kurochko wrote: > > On 2/5/26 12:33 PM, Jan Beulich wrote: >> The barrier in vcpu_context_saved() is specifically about the clearing of >> ->is_running. It isn't needed when we don't clear the flag. >> >> Furthermore, one side of the barrier being in common code, the other would >> better be, too. This way, all architectures are covered (beyond any >> specific needs they may have). > > Don't we want then move ... > >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -333,17 +333,7 @@ void sync_local_execstate(void) >> >> void sync_vcpu_execstate(struct vcpu *v) >> { >> - /* >> - * We don't support lazy switching. >> - * >> - * However the context may have been saved from a remote pCPU so we >> - * need a barrier to ensure it is observed before continuing. >> - * >> - * Per vcpu_context_saved(), the context can be observed when >> - * v->is_running is false (the caller should check it before calling >> - * this function). >> - */ >> - smp_rmb(); >> + /* Nothing to do -- no lazy switching */ >> } > > ... to common code with ability to re-define sync_vcpu_execstate() by arch > as only x86 does something inside this function? Indeed this was considered already, as a possible next step. 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Fri, 6 Feb 2026 10:56:06 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5f8e64f2-0374-11f1-9ccf-f158ae23cfc8 From: Abdelkareem@tibco.com, Abdelsaamad@tibco.com, abdelkareem.abdelsaamad@citrix.com To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH 0/3] Virtual NMI Date: Fri, 6 Feb 2026 15:53:14 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Abdelkareem Abdelsaamad Currently, the Xen hypervisor delivers NMIs to the guests using the Event Injection mechanism. The Event Injection mechanism does not block the delivery of subsequent NMIs. So the Xen Hypervisor tracks the NMI delivery and its completion (by intercepting the IRET instruction) before sending a new NMI. With the 4th generation AMD EPYC, a hardware NMI virtualization support, Virtual NMI (VNMI), is introduced. The vNMI allows the hypervisor to inject the NMI into the guest w/o using Event Injection mechanism. No need to track the guest NMI and intercepting the IRET instruction. NMI Virtualization support is indicated by CPUID Fn8000_000A_EDX[VNMI] = 1.[1] NMI Virtualization is enabled by setting V_NMI_ENABLE (bit 26 in offset 60h of the VMCB). Enabling NMI Virtualization requires the NMI intercept bit to be set. An attempt to run a guest with V_NMI_ENABLE without the NMI intercept bit set results in #VMEXIT(INVALID) [1] Three new bits are added to the VMCB field at offset 60h to provide NMI virtualization hardware support: V_NMI(11): Indicates whether a virtual NMI is pending in the guest. The processor will clear V_NMI once it takes the virtual NMI. V_NMI_MASK(12): Indicates whether virtual NMIs are masked. The processor will set V_NMI_MASK once it takes the virtual NMI. V_NMI_MASK is cleared when the guest successfully completes an IRET instruction or #VMEXIT occurs while delivering the virtual NMI. V_NMI_ENABLE(26): Enables NMI virtualization. [1] --Abdelkareem Abdelsaamad [1] https://docs.amd.com/v/u/en-US/24593_3.43 Abdelkareem Abdelsaamad (3): svm/vnmi: introduce the vnmi bit support in the cpuid feature set svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB svm/vnmi: Add support for the SVM Virtual NMI xen/arch/x86/hvm/hvm.c | 29 +++++++++++++++++++++-------- xen/arch/x86/hvm/svm/intr.c | 16 ++++++++++++++-- xen/arch/x86/hvm/svm/svm.c | 25 ++++++++++++++++++++++++- xen/arch/x86/hvm/svm/vmcb.c | 3 +++ xen/arch/x86/hvm/svm/vmcb.h | 12 ++++++++---- xen/arch/x86/include/asm/hvm/hvm.h | 12 +++++++++++- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 7 files changed, 83 insertions(+), 16 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 15:56:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 15:56:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223379.1530924 (Exim 4.92) (envelope-from ) id 1voOC7-0000qe-07; Fri, 06 Feb 2026 15:56:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223379.1530924; Fri, 06 Feb 2026 15:56:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOC6-0000qS-SU; Fri, 06 Feb 2026 15:56:30 +0000 Received: by outflank-mailman (input) for mailman id 1223379; Fri, 06 Feb 2026 15:56:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) id 1voOC4-0000ag-Sy for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 15:56:28 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6502e08c-0374-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 16:56:27 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id DA80842B9403; Fri, 6 Feb 2026 10:56:15 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6502e08c-0374-11f1-b161-2bf370ae4941 From: Abdelkareem@tibco.com, Abdelsaamad@tibco.com, abdelkareem.abdelsaamad@citrix.com To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH 2/3] svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB Date: Fri, 6 Feb 2026 15:53:16 +0000 Message-ID: <7ab87d357ef98a9e195294367b991790376cabd3.1770389605.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Abdelkareem Abdelsaamad Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the VMCB structure's vintr_t: vintr_t(11) - Virtual NMI is pending. vintr_t(12) - Virtual NMI is masked. vintr_t(26) - Enable NMI virtualization. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/vmcb.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 69f6047394..0ffb2fb8e1 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -336,15 +336,19 @@ typedef union u64 tpr: 8; u64 irq: 1; u64 vgif: 1; - u64 rsvd0: 6; + u64 rsvd0: 1; + u64 vnmi_pending: 1; + u64 vnmi_blocking:1; + u64 rsvd1: 3; u64 prio: 4; u64 ign_tpr: 1; - u64 rsvd1: 3; + u64 rsvd2: 3; u64 intr_masking: 1; u64 vgif_enable: 1; - u64 rsvd2: 6; + u64 vnmi_enable: 1; + u64 rsvd3: 5; u64 vector: 8; - u64 rsvd3: 24; + u64 rsvd4: 24; } fields; } vintr_t; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 15:56:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 15:56:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223378.1530914 (Exim 4.92) (envelope-from ) id 1voOC5-0000cS-Oh; Fri, 06 Feb 2026 15:56:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223378.1530914; Fri, 06 Feb 2026 15:56:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOC5-0000cL-M1; Fri, 06 Feb 2026 15:56:29 +0000 Received: by outflank-mailman (input) for mailman id 1223378; Fri, 06 Feb 2026 15:56:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) id 1voOC3-0000ag-Sl for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 15:56:27 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 648cf790-0374-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 16:56:27 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 1EAB842B8E1C; Fri, 6 Feb 2026 10:56:15 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 648cf790-0374-11f1-b161-2bf370ae4941 From: Abdelkareem@tibco.com, Abdelsaamad@tibco.com, abdelkareem.abdelsaamad@citrix.com To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH 1/3] svm/vnmi: introduce the vnmi bit support in the cpuid feature set Date: Fri, 6 Feb 2026 15:53:15 +0000 Message-ID: <2111928538087e6600cc89fd2d666e2be0007906.1770389605.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Abdelkareem Abdelsaamad Introduce the cpuid bit for SVM vNMI feature support in for the x86\AMD platforms. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/svm.c | 2 ++ xen/arch/x86/include/asm/hvm/hvm.h | 4 +++- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..e451937b04 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2524,6 +2524,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P @@ -2533,6 +2534,7 @@ const struct hvm_function_table * __init start_svm(void) svm_function_table.caps.hap = cpu_has_svm_npt; svm_function_table.caps.hap_superpage_2mb = true; svm_function_table.caps.hap_superpage_1gb = cpu_has_page1gb; + svm_function_table.caps.vNMI = cpu_has_svm_vnmi; return &svm_function_table; } diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..ad17ea73e9 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -115,7 +115,9 @@ struct hvm_function_table { virtual_intr_delivery:1, /* Nested virt capabilities */ - nested_virt:1; + nested_virt:1, + /* virtual NMI support */ + vNMI:1; } caps; /* diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 15f0268be7..a35a61273b 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ static inline bool cpu_has_svm_feature(unsigned int feat) @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) #define MSR_INTERCEPT_NONE 0 -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 15:56:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 15:56:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223381.1530930 (Exim 4.92) (envelope-from ) id 1voOC7-0000tw-99; Fri, 06 Feb 2026 15:56:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223381.1530930; Fri, 06 Feb 2026 15:56:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOC7-0000tD-3v; Fri, 06 Feb 2026 15:56:31 +0000 Received: by outflank-mailman (input) for mailman id 1223381; Fri, 06 Feb 2026 15:56:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) id 1voOC6-0000M4-5g for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 15:56:30 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6582475d-0374-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 16:56:28 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id A444942B940E; Fri, 6 Feb 2026 10:56:16 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6582475d-0374-11f1-9ccf-f158ae23cfc8 From: Abdelkareem@tibco.com, Abdelsaamad@tibco.com, abdelkareem.abdelsaamad@citrix.com To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH 3/3] svm/vnmi: Add support for the SVM Virtual NMI Date: Fri, 6 Feb 2026 15:53:17 +0000 Message-ID: <51fb085801706c082de4061181381d6cb9449d77.1770389605.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Abdelkareem Abdelsaamad With vNMI, the pending NMI is simply stuffed into the VMCB and handed off to the hardware. This means that Xen needs to be able to set a vNMI pending on-demand, and also query if a vNMI is pending, e.g. to honor the "at most one NMI pending" rule and to preserve all NMIs across save and restore. Introduce two new hvm_function_table callbacks to support the SVM's vNMI to allow the Xen hypervisor to query if a vNMI is pending and to set VMCB's _vintr pending flag so the NMIs are serviced by hardware if/when the virtual NMIs become unblocked. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/hvm.c | 29 +++++++++++++++++++++-------- xen/arch/x86/hvm/svm/intr.c | 16 ++++++++++++++-- xen/arch/x86/hvm/svm/svm.c | 23 ++++++++++++++++++++++- xen/arch/x86/hvm/svm/vmcb.c | 3 +++ xen/arch/x86/include/asm/hvm/hvm.h | 8 ++++++++ 5 files changed, 68 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 4d37a93c57..3117ef8f2f 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3904,10 +3904,29 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) } } -enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack) +static enum hvm_intblk hvm_nmi_blocked(struct vcpu *v) { unsigned long intr_shadow; + if (hvm_funcs.caps.vNMI) + { + if (!hvm_funcs.is_vnmi_pending(v)) + return hvm_intblk_none; + + return hvm_intblk_vnmi; + } + + intr_shadow = alternative_call(hvm_funcs.get_interrupt_shadow, v); + + if ( intr_shadow & (HVM_INTR_SHADOW_STI|HVM_INTR_SHADOW_MOV_SS) ) + return hvm_intblk_shadow; + + return ((intr_shadow & HVM_INTR_SHADOW_NMI) ? + hvm_intblk_nmi_iret : hvm_intblk_none); +} + +enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack) +{ ASSERT(v == current); if ( nestedhvm_enabled(v->domain) ) { @@ -3922,14 +3941,8 @@ enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack) !(guest_cpu_user_regs()->eflags & X86_EFLAGS_IF) ) return hvm_intblk_rflags_ie; - intr_shadow = alternative_call(hvm_funcs.get_interrupt_shadow, v); - - if ( intr_shadow & (HVM_INTR_SHADOW_STI|HVM_INTR_SHADOW_MOV_SS) ) - return hvm_intblk_shadow; - if ( intack.source == hvm_intsrc_nmi ) - return ((intr_shadow & HVM_INTR_SHADOW_NMI) ? - hvm_intblk_nmi_iret : hvm_intblk_none); + return hvm_nmi_blocked(v); if ( intack.source == hvm_intsrc_lapic ) { diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b85..c54298c402 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -29,10 +29,19 @@ static void svm_inject_nmi(struct vcpu *v) { - struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); + struct vmcb_struct *vmcb; + u32 general1_intercepts; intinfo_t event; + if (hvm_funcs.caps.vNMI) + { + hvm_funcs.set_vnmi_pending(v); + return; + } + + vmcb = v->arch.hvm.svm.vmcb; + general1_intercepts = vmcb_get_general1_intercepts(vmcb); + event.raw = 0; event.v = true; event.type = X86_ET_NMI; @@ -176,6 +185,9 @@ void asmlinkage svm_intr_assist(void) } } + // vNMI is currently serviced in progress. + if (unlikely(intblk == hvm_intblk_vnmi)) return; + /* * Pending IRQs must be delayed if: * 1. An event is already pending. This is despite the fact that SVM diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index e451937b04..f67869353b 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -297,6 +297,26 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags) __clear_bit(msr * 2 + 1, msr_bit); } +static bool cf_check svm_is_vnmi_pending(struct vcpu *vcpu) +{ + if (!hvm_funcs.caps.vNMI) + return false; + + return (vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_blocking); +} + +static bool cf_check svm_set_vnmi_pending(struct vcpu *vcpu) +{ + if (!hvm_funcs.caps.vNMI) + return false; + + if (vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_pending) + return false; + + vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_pending = 1; + return true; +} + #ifdef CONFIG_VM_EVENT static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr) { @@ -2464,7 +2484,8 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { #endif .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, - + .is_vnmi_pending = svm_is_vnmi_pending, + .set_vnmi_pending = svm_set_vnmi_pending, .nhvm_vcpu_initialise = nsvm_vcpu_initialise, .nhvm_vcpu_destroy = nsvm_vcpu_destroy, .nhvm_vcpu_reset = nsvm_vcpu_reset, diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..5069789f6c 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -184,6 +184,9 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; + if (hvm_funcs.caps.vNMI) + vmcb->_vintr.fields.vnmi_enable = 1; + return 0; } diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index ad17ea73e9..d7f439d41b 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -67,6 +67,7 @@ enum hvm_intblk { hvm_intblk_rflags_ie, /* RFLAGS.IE == 0 */ hvm_intblk_tpr, /* LAPIC TPR too high */ hvm_intblk_nmi_iret, /* NMI blocked until IRET */ + hvm_intblk_vnmi, /* vNMI is currently blocked*/ hvm_intblk_arch, /* SVM/VMX specific reason */ }; @@ -224,6 +225,13 @@ struct hvm_function_table { int (*pi_update_irte)(const struct vcpu *v, const struct pirq *pirq, uint8_t gvec); void (*update_vlapic_mode)(struct vcpu *v); + /* Whether or not a virtual NMI is pending in hardware. */ + bool (*is_vnmi_pending)(struct vcpu *vcpu); + /* + * Attempt to pend a virtual NMI in harware. + * Returns %true on success + */ + bool (*set_vnmi_pending)(struct vcpu *vcpu); /*Walk nested p2m */ int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223509.1530954 (Exim 4.92) (envelope-from ) id 1voOVA-0005WK-0o; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 00/12] const-ify vendor checks Date: Fri, 6 Feb 2026 17:15:22 +0100 Message-ID: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3D:EE_|DM6PR12MB4339:EE_ X-MS-Office365-Filtering-Correlation-Id: 44900149-0c10-4207-2c21-08de659b031f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?mpmiKR4S748JUR1dMnVXaxrKfL1xTE/B0HT9VLtRLZz8nEvhyQ1/3AXv24B7?= =?us-ascii?Q?+M3r3hojdrNnnWKNXoXuUmkEnzWQbotrgpavMVNP4OU7Rkbbspybl004bDnQ?= =?us-ascii?Q?WuS6Y0zIQCqOopPK8nLCv9MsthYtbocUqEqAO0Ge7qmAndfV8Enmno4eUXDe?= =?us-ascii?Q?iXPVWiK+6QZ96C/CAPqvksJYx6en7KnFMPIfmrKuyDADxYqS+SHEVsCH3utH?= =?us-ascii?Q?1z6NqozGlCnYOi+o7LJqSCCYEF3ELL9Fb9FlofQxhqhkeQziH6Fi79vq72fD?= =?us-ascii?Q?yR6D0xeEDRYyCr0OqipRHjxt99xOSwGCyxD+lHk6FCeUfEPydJjwRyzHss69?= =?us-ascii?Q?p1JDMqUUVTF2qxPEcdcalHRTSOtdXKiz3AhRl1aXD4qkqfz2kPUTbDU3AwbO?= =?us-ascii?Q?c5kqfvPAfE9IZ0bXGaLjJtn+FlAzKURIILztbgxmbVarj5yYHlJdN+Y4SQvW?= =?us-ascii?Q?lxgJFvU34Ut1uNGHxrDw4aFYmMEQdoGbCUFV2ArbCd+4PMWrtydj4ViyLuAG?= =?us-ascii?Q?bNfd7VnWcPiLck+q9UNJ+j0gHPXChJY7qz1rtHzVQltaBnUrrpmcPCsHNuZk?= =?us-ascii?Q?txwSH1bHQCzKNl+bEebvN/ME4C58AXjXm+Uadsle03IXYNCHx4jfcQIUawbE?= =?us-ascii?Q?1AelDomMNwJ6O71tqkOCAPWHtJmTjBjDjb7SlrVF2TVnT6sw0DeOsxCxsaEB?= =?us-ascii?Q?KmE51uUGpkNFlHqUGMJAl7E7dHVtZ6Rb0xU+1ZwiMEXR5n5FFUVJyrXruAqw?= =?us-ascii?Q?dZVe0LQHu+46CP/etNnIvlHLjoGb0niC1N7gJvRtXYAcV+d6isGf3jjNGGP4?= =?us-ascii?Q?39VbzSJFX1Z6M6grHo0ZGFpGkcsdduIq5a/qFsGPkh7mIyRWeBLAbbNt45r7?= =?us-ascii?Q?zbzlNiQqJX5wO99bQ1dra0yxms4Qi8N2LCYD8qJz2ZkBwmzXWtDhDahY+lfH?= =?us-ascii?Q?n5I0ITD0NNCXEqQ1OA5l6GmdBevxV6uloR7dsH6AB1VEH0c/v1lbhkxqF9DY?= =?us-ascii?Q?26sAK6aJRoSE6jMI1Srpteo8Bt/a1MAOG71YIOnp4TxmU8XeWTXYy0mJ8ENT?= =?us-ascii?Q?l64I849PInWpyHgeqFwUMU5Fmrjx3w5uCW9P+X7W1cWTfhzb96yr+A07MIkP?= =?us-ascii?Q?xcmtjuDIZe2V7KBlUbWek97picOhzISNFuLuALKYtS9GVi0jLXBYOLfaEoJR?= =?us-ascii?Q?ZeAK04e94IsLjCUsXiyqWJTLiqa5KYj738PSQ8U7PRMdUW4oGZvb/nBENPRn?= =?us-ascii?Q?rpKE+4uQkiA8TCvmZXgqPKJ7FPtCGUspxg5waF10WeSCcIVVsCkO1PtZXXvy?= =?us-ascii?Q?trRGaFlrEkOHAHVTSlNeBzf1O6w2CIG/XjCTfI9Slx52ggwaP5mM39Y7woJw?= =?us-ascii?Q?7qiThfkavy+JHmgNbNiP6R+fe0tVeMY1nR/XQcFrJy8DWJY3fFTO3u4jWfp2?= =?us-ascii?Q?9Pb5LIGBa8oANizLUzAdMCQoEJLOIXcsecN6LMfOXMveuotpOsvFdK56f9ZC?= =?us-ascii?Q?R/+fp8R/Aatb1DrJUQIRLy1smWLirSlzC3YrDHkBA48wDrFR9K+QVBgRkky8?= =?us-ascii?Q?SxNIOAEZcZEj6J9T+uZTcgbCfHWd5Bmy/MywjQ2bsb5OFyYmDdtMhHKRSuSE?= =?us-ascii?Q?M8zoIfR3QVIU60f5dOpiPtR2FIB3xIpk959Jr7MXz2XDUhO2kOMJZGAW8BE+?= =?us-ascii?Q?ftdtCg=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /o6CVO9Zbcy5WFlq3iZz948GbFOPS0Ys2Ko8kSrBLki2C4BHdwUfU2pT0p98rJVxYvvL1Q6ZvZ7R9QpErhT8qoyHlY1g5IBtOo40cYlwI0cArW62XveqKaOp4cHhFAxDkxgnQml8CfS3b/lJdhDm/YLjs+Z+Rqv9Q+LfxID3xjt0zAqAVdxCREFtpGw5M8dVpX25RO5jLysFL07on0FSJwW6iCxwSltsY++H8/6dqLZdylt5ZWnXcanGzVKWTCvjQtIzV09pKINW+xncJZNLbPeTUNOocUokxHFiPPc+CsW3KgD4XRtADPb93gEvEXTbrvMVKT83x05S8VkBqE6Q79He4lFrSZJ52nw3lF+s9HiSThXa1sqcoiXpo9uKi4TpT5sX1grGF/CYsRnX7nKzDLPUMLoIAgZVEmtdyO7DV8Mz2fqoh18w19X9HKkMGi48 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2026 16:15:57.9248 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44900149-0c10-4207-2c21-08de659b031f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4339 Hi, This series is a big revamp of vendor-checking to enable it to perform DCE. It improves all configurations useful in practice at minimal cost in the full build, and at a massive advantage for the single-vendor case. Many ifdefs can go away as a side effect of the series. This series depends on cross-vendor removal: https://lore.kernel.org/xen-devel/20260205170923.38425-1-alejandro.garciavallejo@amd.com/T/#m4c3d318f37e4f24d0f8c62b104221aa5d428cebc Patch 1 in this series matches that of cross-vendor removal. It's logically required, but that's the single requirement. High level description ====================== When compared to the RFC this makes a different approach The series introduces cpu_vendor() which maps to a constant in the single vendor case and to (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDORS is a mask of the compile-time chosen vendors. This enables the compiler to detect dead-code at the uses and remove all unreachable branches, including in switches. When compared to the x86_vendor_is() macro introduced in the RFC, this is simpler. It achieves MOST of what the older macro did without touching the switches, with a few caveats: 1. Compiled-out vendors cause a panic, they don't fallback onto the unknown vendor case. In retrospect, this is a much saner thing to do. 2. equalities and inequalities have been replaced by equivalent (cpu_vendor() & ...) forms. This isn't stylistic preference. This form allows the compiler to merge the compared-against constant with X86_ENABLED_VENDORS, yielding much better codegen throughout the tree. The effect of (2) triples the delta in the full build below. Some differences might be attributable to the change from policy vendor checks to boot_cpu_data. In the case of the emulator it caused a 400 bytes increase due to the way it checks using LOTS of macro invocations, so I left that one piece using the policy vendor except for the single vendor case. And finally, some bloat-o-meters to better grasp the effects 1. AMD + wo/ unknown (compared against prior AMD-only build) add/remove: 0/12 grow/shrink: 4/66 up/down: 108/-11595 (-11487) 2. AMD + Intel + wo/ unknown (compared against prior full build) (excludes Hygon, Shanghai, Centaur and any other unknown CPU vendors) add/remove: 1/6 grow/shrink: 27/31 up/down: 356/-1552 (-1196) 3. All vendors + w/ unknown (compared against prior full build) add/remove: 0/0 grow/shrink: 33/19 up/down: 398/-273 (125) 1. AMD + wo/ unknown (compared against prior AMD-only build) ============================================================ add/remove: 0/12 grow/shrink: 4/66 up/down: 108/-11595 (-11487) Function old new delta x86_cpu_policies_are_compatible 157 194 +37 xen_config_data 1476 1509 +33 amd_check_entrysign 807 827 +20 init_guest_cpu_policies 1364 1382 +18 opt_gds_mit 1 - -1 nmi_p6_event_width 4 - -4 nmi_p4_cccr_val 4 - -4 init_e820 1037 1033 -4 x86_mcinfo_dump 477 471 -6 pci_cfg_ok 307 301 -6 get_hw_residencies 213 205 -8 recalculate_cpuid_policy 909 900 -9 dom0_setup_permissions 3809 3800 -9 arch_ioreq_server_get_type_addr 250 241 -9 cpu_has_amd_erratum 230 219 -11 init_amd 2449 2437 -12 parse_spec_ctrl 2321 2307 -14 amd_nonfatal_mcheck_init 192 177 -15 shanghai_cpu_dev 16 - -16 hygon_cpu_dev 16 - -16 centaur_cpu_dev 16 - -16 x86emul_0fae 2758 2741 -17 vmce_init_vcpu 153 136 -17 pge_init 60 42 -18 cpufreq_cpu_init 34 15 -19 nmi_watchdog_tick 534 514 -20 vmce_restore_vcpu 160 139 -21 init_nonfatal_mce_checker 142 120 -22 ucode_update_hcall_cont 888 865 -23 vpmu_arch_initialise 195 168 -27 mce_firstbank 37 10 -27 init_shanghai 29 - -29 validate_gl4e 617 587 -30 l4e_propagate_from_guest 451 421 -30 guest_walk_tables_4_levels 3411 3381 -30 clear_msr_range 30 - -30 acpi_dead_idle 430 398 -32 print_mtrr_state 719 684 -35 amd_mcheck_init 451 416 -35 hvm_vcpu_virtual_to_linear 631 595 -36 do_IRQ 1783 1747 -36 init_bsp_APIC 193 149 -44 symbols_offsets 30800 30752 -48 cpu_callback 4650 4600 -50 mc_memerr_dhandler 903 851 -52 vpmu_init 309 248 -61 mcheck_init 1187 1122 -65 microcode_nmi_callback 205 139 -66 init_IRQ 477 407 -70 disable_lapic_nmi_watchdog 119 49 -70 __start_xen 9448 9378 -70 alternative_instructions 154 82 -72 traps_init 543 468 -75 protmode_load_seg 1904 1829 -75 set_cx_pminfo 1691 1614 -77 init_intel_cacheinfo 1191 1111 -80 is_cpu_primary 93 - -93 symbols_sorted_offsets 60760 60664 -96 do_mca 3181 3085 -96 guest_cpuid 2395 2292 -103 guest_common_max_feature_adjustments 110 - -110 read_msr 1471 1346 -125 x86emul_decode 12729 12597 -132 guest_common_default_feature_adjustments 232 62 -170 do_microcode_update 793 608 -185 cpufreq_driver_init 453 263 -190 vmce_wrmsr 967 768 -199 symbols_names 108114 107914 -200 recalculate_misc 898 689 -209 vmce_rdmsr 1083 872 -211 early_cpu_init 948 721 -227 guest_wrmsr 2853 2622 -231 init_centaur 238 - -238 domain_cpu_policy_changed 677 408 -269 write_msr 1752 1455 -297 x86_emulate 222203 221896 -307 init_hygon 402 - -402 guest_rdmsr 2308 1881 -427 start_vmx 1607 1105 -502 setup_apic_nmi_watchdog 977 276 -701 do_get_hw_residencies 1289 9 -1280 init_speculation_mitigations 9714 6788 -2926 Total: Before=3878514, After=3867027, chg -0.30% 2. AMD + Intel + wo/ unknown (compared against prior full build) ================================================================ add/remove: 1/6 grow/shrink: 27/31 up/down: 356/-1552 (-1196) Function old new delta start_vmx 1607 1686 +79 vcpu_info_reset - 38 +38 xen_config_data 1483 1520 +37 x86_cpu_policies_are_compatible 157 194 +37 amd_check_entrysign 807 838 +31 init_speculation_mitigations 9836 9862 +26 set_cx_pminfo 1691 1709 +18 read_msr 1471 1486 +15 guest_cpuid 2395 2405 +10 vmce_restore_vcpu 160 167 +7 recalculate_cpuid_policy 909 916 +7 vmce_init_vcpu 153 159 +6 do_mc_get_cpu_info 584 590 +6 init_e820 1037 1042 +5 x86_mcinfo_dump 477 480 +3 setup_apic_nmi_watchdog 977 980 +3 guest_common_max_feature_adjustments 110 113 +3 guest_common_default_feature_adjustments 257 260 +3 disable_lapic_nmi_watchdog 119 122 +3 cpu_has_amd_erratum 230 233 +3 amd_nonfatal_mcheck_init 192 195 +3 alternative_instructions 154 157 +3 pge_init 60 62 +2 mce_firstbank 37 39 +2 init_bsp_APIC 193 195 +2 do_get_hw_residencies 1289 1291 +2 mcheck_init 1227 1228 +1 intel_mcheck_init 2398 2399 +1 pci_cfg_ok 307 306 -1 init_nonfatal_mce_checker 160 159 -1 mc_memerr_dhandler 903 901 -2 recalculate_misc 898 890 -8 acpi_cpufreq_cpu_init 823 815 -8 cpufreq_driver_init 468 459 -9 vmce_intel_rdmsr 161 150 -11 validate_gl4e 617 605 -12 guest_walk_tables_4_levels 3411 3399 -12 traps_init 543 528 -15 l4e_propagate_from_guest 451 436 -15 shanghai_cpu_dev 16 - -16 hygon_cpu_dev 16 - -16 centaur_cpu_dev 16 - -16 write_msr 1752 1735 -17 cpu_callback 5100 5080 -20 amd_mcheck_init 451 431 -20 hvm_vcpu_virtual_to_linear 631 610 -21 domain_cpu_policy_changed 677 656 -21 vpmu_arch_initialise 195 173 -22 acpi_dead_idle 430 407 -23 symbols_offsets 31800 31776 -24 print_mtrr_state 719 693 -26 guest_rdmsr 2308 2282 -26 do_mca 3181 3153 -28 vpmu_init 320 291 -29 vcpu_create 864 835 -29 unmap_guest_area 198 169 -29 init_shanghai 29 - -29 symbols_sorted_offsets 62760 62720 -40 vmce_wrmsr 993 936 -57 vmce_rdmsr 1134 1073 -61 symbols_names 112215 112141 -74 init_intel_cacheinfo 1191 1111 -80 early_cpu_init 948 854 -94 init_centaur 238 - -238 init_hygon 402 - -402 Total: Before=3932243, After=3931047, chg -0.03% 3. All vendors + w/ unknown (compared against prior full build) =============================================================== add/remove: 0/0 grow/shrink: 33/19 up/down: 398/-273 (125) Function old new delta start_vmx 1607 1686 +79 early_cpu_init 948 986 +38 x86_cpu_policies_are_compatible 157 194 +37 xen_config_data 1483 1515 +32 amd_check_entrysign 807 838 +31 init_speculation_mitigations 9836 9862 +26 set_cx_pminfo 1691 1709 +18 read_msr 1471 1486 +15 vmce_wrmsr 993 1005 +12 init_nonfatal_mce_checker 160 170 +10 guest_cpuid 2395 2405 +10 mcheck_init 1227 1235 +8 vmce_restore_vcpu 160 167 +7 recalculate_cpuid_policy 909 916 +7 vmce_init_vcpu 153 159 +6 init_intel_cacheinfo 1191 1197 +6 do_mc_get_cpu_info 584 590 +6 cpufreq_driver_init 468 474 +6 init_e820 1037 1042 +5 amd_mcheck_init 451 456 +5 x86_mcinfo_dump 477 480 +3 setup_apic_nmi_watchdog 977 980 +3 guest_common_max_feature_adjustments 110 113 +3 guest_common_default_feature_adjustments 257 260 +3 disable_lapic_nmi_watchdog 119 122 +3 cpu_has_amd_erratum 230 233 +3 cpu_callback 5100 5103 +3 amd_nonfatal_mcheck_init 192 195 +3 alternative_instructions 154 157 +3 mce_firstbank 37 39 +2 init_bsp_APIC 193 195 +2 do_get_hw_residencies 1289 1291 +2 intel_mcheck_init 2398 2399 +1 recalculate_misc 898 897 -1 pci_cfg_ok 307 306 -1 mc_memerr_dhandler 903 901 -2 vmce_rdmsr 1134 1127 -7 traps_init 543 535 -8 acpi_cpufreq_cpu_init 823 815 -8 vmce_intel_rdmsr 161 150 -11 validate_gl4e 617 605 -12 guest_walk_tables_4_levels 3411 3399 -12 l4e_propagate_from_guest 451 437 -14 write_msr 1752 1735 -17 vpmu_init 320 302 -18 print_mtrr_state 719 698 -21 hvm_vcpu_virtual_to_linear 631 610 -21 domain_cpu_policy_changed 677 656 -21 vpmu_arch_initialise 195 173 -22 acpi_dead_idle 430 407 -23 guest_rdmsr 2308 2282 -26 do_mca 3181 3153 -28 Total: Before=3932245, After=3932370, chg +0.00% Alejandro Vallejo (12): x86: Reject CPU policies with vendors other than the host's x86: Add more granularity to the vendors in Kconfig x86: Add cpu_vendor() as a wrapper for the host's CPU vendor x86: Migrate MSR handler vendor checks to cpu_vendor() x86: Migrate spec_ctrl vendor checks to cpu_vendor() x86: Migrate switch vendor checks to cpu_vendor() x86: Have x86_emulate/ implement the single-vendor optimisation x86/acpi: Migrate vendor checks to cpu_vendor() x86/pv: Migrate vendor checks to cpu_vendor() x86/mcheck: Migrate vendor checks to use cpu_vendor() x86/cpu: Migrate vendor checks to use cpu_vendor() x86: Migrate every remaining raw vendor check to cpu_vendor() xen/arch/x86/Kconfig.cpu | 43 ++++++++++++++++++++++++++ xen/arch/x86/acpi/cpu_idle.c | 16 +++++----- xen/arch/x86/acpi/cpufreq/acpi.c | 2 +- xen/arch/x86/acpi/cpufreq/cpufreq.c | 15 +++------ xen/arch/x86/alternative.c | 2 +- xen/arch/x86/apic.c | 2 +- xen/arch/x86/cpu-policy.c | 14 ++++----- xen/arch/x86/cpu/Makefile | 6 ++-- xen/arch/x86/cpu/amd.c | 6 ++-- xen/arch/x86/cpu/common.c | 8 +++-- xen/arch/x86/cpu/intel_cacheinfo.c | 5 ++- xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 2 +- xen/arch/x86/cpu/mcheck/mcaction.c | 2 +- xen/arch/x86/cpu/mcheck/mce.c | 23 ++++++-------- xen/arch/x86/cpu/mcheck/mce.h | 2 +- xen/arch/x86/cpu/mcheck/mce_amd.c | 7 ++--- xen/arch/x86/cpu/mcheck/mce_intel.c | 7 ++--- xen/arch/x86/cpu/mcheck/non-fatal.c | 6 +--- xen/arch/x86/cpu/mcheck/vmce.c | 16 +++------- xen/arch/x86/cpu/microcode/amd.c | 2 +- xen/arch/x86/cpu/microcode/core.c | 2 +- xen/arch/x86/cpu/mtrr/generic.c | 5 ++- xen/arch/x86/cpu/mwait-idle.c | 5 ++- xen/arch/x86/cpu/vpmu.c | 9 ++---- xen/arch/x86/cpuid.c | 5 ++- xen/arch/x86/dom0_build.c | 2 +- xen/arch/x86/domain.c | 16 +++++----- xen/arch/x86/e820.c | 2 +- xen/arch/x86/guest/xen/xen.c | 6 +++- xen/arch/x86/hvm/hvm.c | 3 +- xen/arch/x86/hvm/ioreq.c | 3 +- xen/arch/x86/hvm/vmx/vmx.c | 8 ++--- xen/arch/x86/i8259.c | 5 ++- xen/arch/x86/include/asm/cpufeature.h | 27 ++++++++++++++++ xen/arch/x86/include/asm/guest_pt.h | 3 +- xen/arch/x86/irq.c | 3 +- xen/arch/x86/msr.c | 35 +++++++++------------ xen/arch/x86/nmi.c | 4 +-- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 27 +++++++--------- xen/arch/x86/setup.c | 7 ++--- xen/arch/x86/spec_ctrl.c | 42 ++++++++++--------------- xen/arch/x86/traps-setup.c | 2 +- xen/arch/x86/x86_emulate/private.h | 10 +++++- xen/arch/x86/x86_emulate/x86_emulate.c | 2 +- xen/lib/x86/policy.c | 3 +- 46 files changed, 224 insertions(+), 200 deletions(-) base-commit: 381b4ff16f7ff83a2dc44f16b8dd0208f3255ec7 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223510.1530959 (Exim 4.92) (envelope-from ) id 1voOVA-0005YI-Be; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 05/12] x86: Migrate spec_ctrl vendor checks to cpu_vendor() Date: Fri, 6 Feb 2026 17:15:27 +0100 Message-ID: <20260206161539.209922-6-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3E:EE_|DS0PR12MB7726:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c72a1d6-961c-4d98-fe78-08de659b06c5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013; 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On an AMD-only build: add/remove: 0/1 grow/shrink: 0/5 up/down: 0/-2968 (-2968) Function old new delta opt_gds_mit 1 - -1 symbols_offsets 30776 30772 -4 symbols_sorted_offsets 60712 60704 -8 parse_spec_ctrl 2321 2307 -14 symbols_names 108031 108016 -15 init_speculation_mitigations 9714 6788 -2926 Total: Before=3876849, After=3873881, chg -0.08% Signed-off-by: Alejandro Vallejo --- xen/arch/x86/spec_ctrl.c | 42 ++++++++++++++++------------------------ 1 file changed, 17 insertions(+), 25 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index dd0413e1fc..246d8895f1 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -388,7 +388,7 @@ int8_t __ro_after_init opt_xpti_domu = -1; static __init void xpti_init_default(void) { - if ( (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + if ( (cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || cpu_has_rdcl_no ) { if ( opt_xpti_hwdom < 0 ) @@ -712,7 +712,7 @@ static bool __init check_smt_enabled(void) * At the time of writing, it is almost completely undocumented, so isn't * virtualised reliably. */ - if ( boot_cpu_data.vendor == X86_VENDOR_INTEL && + if ( (cpu_vendor() & X86_VENDOR_INTEL) && boot_cpu_data.family != 0xf && !cpu_has_hypervisor && !rdmsr_safe(MSR_INTEL_CORE_THREAD_COUNT, &val) ) return (MASK_EXTR(val, MSR_CTC_CORE_MASK) != @@ -738,11 +738,10 @@ static bool __init retpoline_calculations(void) unsigned int ucode_rev = this_cpu(cpu_sig).rev; bool safe = false; - if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return false; /* @@ -938,8 +937,7 @@ static bool __init retpoline_calculations(void) */ static bool __init rsb_is_full_width(void) { - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return true; switch ( boot_cpu_data.model ) @@ -966,8 +964,7 @@ static bool __init should_use_eager_fpu(void) * Assume all unrecognised processors are ok. This is only known to * affect Intel Family 6 processors. */ - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return false; switch ( boot_cpu_data.model ) @@ -1033,7 +1030,7 @@ static bool __init should_use_eager_fpu(void) */ static void __init srso_calculations(bool hw_smt_enabled) { - if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) return; /* @@ -1099,7 +1096,7 @@ static void __init srso_calculations(bool hw_smt_enabled) */ static bool __init has_div_vuln(void) { - if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) return false; if ( boot_cpu_data.family != 0x17 && boot_cpu_data.family != 0x18 ) @@ -1137,7 +1134,7 @@ static void __init ibpb_calculations(void) return; } - if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) { /* * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future @@ -1222,8 +1219,7 @@ static __init void l1tf_calculations(void) l1d_maxphysaddr = paddr_bits; /* L1TF is only known to affect Intel Family 6 processors at this time. */ - if ( boot_cpu_data.vendor == X86_VENDOR_INTEL && - boot_cpu_data.family == 6 ) + if ( (cpu_vendor() & X86_VENDOR_INTEL) && boot_cpu_data.family == 6 ) { switch ( boot_cpu_data.model ) { @@ -1358,8 +1354,7 @@ static __init void l1tf_calculations(void) static __init void mds_calculations(void) { /* MDS is only known to affect Intel Family 6 processors at this time. */ - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return; /* Any processor advertising MDS_NO should be not vulnerable to MDS. */ @@ -1469,8 +1464,7 @@ static __init void mds_calculations(void) static void __init rfds_calculations(void) { /* RFDS is only known to affect Intel Family 6 processors at this time. */ - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return; /* @@ -1535,7 +1529,7 @@ static void __init tsa_calculations(void) unsigned int curr_rev, min_rev; /* TSA is only known to affect AMD processors at this time. */ - if ( boot_cpu_data.vendor != X86_VENDOR_AMD ) + if ( !(cpu_vendor() & X86_VENDOR_AMD) ) return; /* If we're virtualised, don't attempt to synthesise anything. */ @@ -1659,8 +1653,7 @@ static void __init gds_calculations(void) bool cpu_has_bug_gds, mitigated = false; /* GDS is only known to affect Intel Family 6 processors at this time. */ - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return; cpu_has_bug_gds = cpu_has_gds(); @@ -1754,8 +1747,7 @@ static void __init gds_calculations(void) static bool __init cpu_has_bug_bhi(void) { /* BHI is only known to affect Intel Family 6 processors at this time. */ - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || - boot_cpu_data.family != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) return false; 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Thus, it's better for codegen to AND its result with the desired compared-against vendor, rather than using (in)equality operators. That way the comparison is always against zero. "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + cmp with zero). Whereas this... "cpu_vendor() == X86_VENDOR_AMD" forces cpu_vendor() to be ANDed and then compared to a non-zero value. Later patches take the opportunity and make this refactor as cpu_vendor() is introduced throughout the tree. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/common.c | 6 +++++- xen/arch/x86/guest/xen/xen.c | 4 ++++ xen/arch/x86/include/asm/cpufeature.h | 27 +++++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index ebe2baf8b9..6f4e723172 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) *(u32 *)&c->x86_vendor_id[4] = edx; c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); - switch (c->x86_vendor) { + if ( c->x86_vendor != cpu_vendor() ) + panic("CPU vendor not compiled-in: %s", + x86_cpuid_vendor_to_str(c->x86_vendor)); + + switch (cpu_vendor()) { case X86_VENDOR_INTEL: intel_unlock_cpuid_leaves(c); actual_cpu = intel_cpu_dev; break; case X86_VENDOR_AMD: actual_cpu = amd_cpu_dev; break; diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index 77a3a8742a..ec558bcbdb 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -57,6 +57,10 @@ void asmlinkage __init early_hypercall_setup(void) cpuid(0, &eax, &ebx, &ecx, &edx); boot_cpu_data.x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); + + if ( cpu_vendor() != boot_cpu_data.x86_vendor ) + panic("CPU vendor not compiled-in: %s", + x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); } switch ( boot_cpu_data.x86_vendor ) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index dcd223d84f..10309e40b6 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -14,6 +14,7 @@ #include #include #include +#include #else #include #endif @@ -116,6 +117,32 @@ static inline bool boot_cpu_has(unsigned int feat) #define CPUID_PM_LEAF 6 +#define X86_ENABLED_VENDORS \ + ((IS_ENABLED(CONFIG_INTEL) ? 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It enhances DCE by eliminating impossible vendors. + */ + return vendor & X86_ENABLED_VENDORS; +} + /* CPUID level 0x00000001.edx */ #define cpu_has_fpu 1 #define cpu_has_de 1 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223512.1530978 (Exim 4.92) (envelope-from ) id 1voOVB-00060j-Ug; Fri, 06 Feb 2026 16:16:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223512.1530978; Fri, 06 Feb 2026 16:16:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOVB-0005zu-PF; Fri, 06 Feb 2026 16:16:13 +0000 Received: by outflank-mailman (input) for mailman id 1223512; Fri, 06 Feb 2026 16:16:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOVA-0005HU-7H for xen-devel@lists.xenproject.org; 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bh=bOhbQwb+qNaHaDSvXmZVl68QN/9CpRrOxtwZQK4VBCk=; b=jjnKdtnQBlmdtBvARc8qjHmCU0NGlTHjB4sU3Y+6OuFppZkSIF9qSQr80QRy3bBkMgMYrZHsttpgbfLZrcpwJmqOo0dvJCvYCsaU+7TmGg1hGFsIhiCxLptAuZPpFc6k0PaFJOjXXAEBKsfGRr8nBJOvuWNvA2//F+N5AaIu86k= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 02/12] x86: Add more granularity to the vendors in Kconfig Date: Fri, 6 Feb 2026 17:15:24 +0100 Message-ID: <20260206161539.209922-3-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3E:EE_|BL1PR12MB5804:EE_ X-MS-Office365-Filtering-Correlation-Id: 19df79fb-40a1-4c05-7243-08de659b0489 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|376014; 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A lot of statics go away and a lot more inlining will be allowed. A prerequisite for such optimisation is to expand Kconfig to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the unknown-vendor path. Have Hygon select AMD, and Centaur|Shanghai select Intel. Not a functional change. Signed-off-by: Alejandro Vallejo --- rfc -> v1: * s/depends on/select/ * s/UNKNOWN_CPU/UNKNOWN_CPU_VENDOR/ * Removed "if unsure, say Y" --- xen/arch/x86/Kconfig.cpu | 43 +++++++++++++++++++++++++++++++++++++++ xen/arch/x86/cpu/Makefile | 6 +++--- 2 files changed, 46 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu index 5fb18db1aa..f895cfe97a 100644 --- a/xen/arch/x86/Kconfig.cpu +++ b/xen/arch/x86/Kconfig.cpu @@ -19,4 +19,47 @@ config INTEL May be turned off in builds targetting other vendors. Otherwise, must be enabled for Xen to work suitably on Intel platforms. +config HYGON + bool "Support Hygon CPUs" + select AMD + default y + help + Detection, tunings and quirks for Hygon platforms. + + May be turned off in builds targetting other vendors. Otherwise, + must be enabled for Xen to work suitably on Hygon platforms. + + +config CENTAUR + bool "Support Centaur CPUs" + select INTEL + default y + help + Detection, tunings and quirks for Centaur platforms. + + May be turned off in builds targetting other vendors. Otherwise, + must be enabled for Xen to work suitably on Centaur platforms. + +config SHANGHAI + bool "Support Shanghai CPUs" + select INTEL + default y + help + Detection, tunings and quirks for Shanghai platforms. + + May be turned off in builds targetting other vendors. Otherwise, + must be enabled for Xen to work suitably on Shanghai platforms. + +config UNKNOWN_CPU_VENDOR + bool "Support unknown CPU vendors" + default y + help + This option prevents a panic on boot when the host CPU vendor isn't + supported by going into a legacy compatibility mode and not applying + any relevant tunings or quirks. + + Not selecting this options while selecting multiple vendors doesn't have + any major effect on code size, but selecting a single vendor with this + option cleared produces a much smaller build. + endmenu diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile index 7cfe28b7ec..84b060aa41 100644 --- a/xen/arch/x86/cpu/Makefile +++ b/xen/arch/x86/cpu/Makefile @@ -3,13 +3,13 @@ obj-y += microcode/ obj-y += mtrr/ obj-y += amd.o -obj-y += centaur.o +obj-$(CONFIG_CENTAUR) += centaur.o obj-y += common.o -obj-y += hygon.o obj-y += intel.o +obj-$(CONFIG_HYGON) += hygon.o obj-y += intel_cacheinfo.o obj-$(CONFIG_INTEL) += mwait-idle.o -obj-y += shanghai.o +obj-$(CONFIG_SHANGHAI) += shanghai.o obj-y += vpmu.o obj-$(CONFIG_AMD) += vpmu_amd.o obj-$(CONFIG_INTEL) += vpmu_intel.o -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223508.1530945 (Exim 4.92) (envelope-from ) id 1voOV7-0005IF-LG; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 01/12] x86: Reject CPU policies with vendors other than the host's Date: Fri, 6 Feb 2026 17:15:23 +0100 Message-ID: <20260206161539.209922-2-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3D:EE_|SA1PR12MB6971:EE_ X-MS-Office365-Filtering-Correlation-Id: f2a0cb51-ff81-4503-abbd-08de659b03b6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; 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Not doing so enables certain optimisations with regards to vendor checks in later patches. Signed-off-by: Alejandro Vallejo --- Patch 1 from the cross-vendor series. Do not merge here. It's simply for consistency. --- xen/lib/x86/policy.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f033d22785..079c42a29b 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->basic.max_leaf > host->basic.max_leaf ) + if ( (guest->x86_vendor != host->x86_vendor) || + (guest->basic.max_leaf > host->basic.max_leaf) ) FAIL_CPUID(0, NA); if ( guest->feat.max_subleaf > host->feat.max_subleaf ) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223513.1530993 (Exim 4.92) (envelope-from ) id 1voOVD-0006Mw-90; Fri, 06 Feb 2026 16:16:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223513.1530993; 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If we migrate those to cpu_vendor() they will effectively cause the ellision of handling code for CPU vendors not compiled in. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/msr.c | 35 +++++++++++++++-------------------- 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ad75a2e108..34033c1982 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -157,8 +157,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * The MSR has existed on all Intel parts since before the 64bit days, * and is implemented by other vendors. */ - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR | - X86_VENDOR_SHANGHAI)) ) + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR | + X86_VENDOR_SHANGHAI)) ) goto gp_fault; *val = IA32_FEATURE_CONTROL_LOCK; @@ -169,8 +169,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) break; case MSR_IA32_PLATFORM_ID: - if ( !(cp->x86_vendor & X86_VENDOR_INTEL) || - !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) ) goto gp_fault; rdmsrl(MSR_IA32_PLATFORM_ID, *val); break; @@ -189,9 +188,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * from Xen's last microcode load, which can be forwarded straight to * the guest. */ - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || - !(boot_cpu_data.x86_vendor & - (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || rdmsr_safe(MSR_AMD_PATCHLEVEL, val) ) goto gp_fault; break; @@ -236,7 +233,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) */ case MSR_IA32_PERF_STATUS: case MSR_IA32_PERF_CTL: - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) ) + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) ) goto gp_fault; *val = 0; @@ -245,7 +242,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto gp_fault; case MSR_IA32_THERM_STATUS: - if ( cp->x86_vendor != X86_VENDOR_INTEL ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) ) goto gp_fault; *val = 0; break; @@ -302,7 +299,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) case MSR_K8_IORR_MASK1: case MSR_K8_TSEG_BASE: case MSR_K8_TSEG_MASK: - if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; if ( !is_hardware_domain(d) ) return X86EMUL_UNHANDLEABLE; @@ -314,14 +311,14 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) break; case MSR_K8_HWCR: - if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; *val = 0; break; case MSR_FAM10H_MMIO_CONF_BASE: if ( !is_hardware_domain(d) || - !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || rdmsr_safe(msr, val) ) goto gp_fault; @@ -338,7 +335,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) break; case MSR_AMD64_DE_CFG: - if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; *val = AMD64_DE_CFG_LFENCE_SERIALISE; break; @@ -461,7 +458,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || val != 0 ) goto gp_fault; break; @@ -470,8 +467,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * See note on MSR_IA32_UCODE_WRITE below, which may or may not apply * to AMD CPUs as well (at least the architectural/CPUID part does). */ - if ( is_pv_domain(d) || - cp->x86_vendor != X86_VENDOR_AMD ) + if ( is_pv_domain(d) || !(cpu_vendor() & X86_VENDOR_AMD) ) goto gp_fault; break; @@ -482,8 +478,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for such attempts. Also the MSR is architectural and not qualified * by any CPUID bit. */ - if ( is_pv_domain(d) || - cp->x86_vendor != X86_VENDOR_INTEL ) + if ( is_pv_domain(d) || !(cpu_vendor() & X86_VENDOR_INTEL) ) goto gp_fault; break; @@ -553,7 +548,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * a cpufreq controller dom0 which has full access. */ case MSR_IA32_PERF_CTL: - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) ) + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) ) goto gp_fault; if ( likely(!is_cpufreq_controller(d)) || wrmsr_safe(msr, val) == 0 ) @@ -663,7 +658,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * OpenBSD 6.7 will panic if writing to DE_CFG triggers a #GP: * https://www.illumos.org/issues/12998 - drop writes. */ - if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; break; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223514.1531000 (Exim 4.92) (envelope-from ) id 1voOVE-0006Ya-0V; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 07/12] x86: Have x86_emulate/ implement the single-vendor optimisation Date: Fri, 6 Feb 2026 17:15:29 +0100 Message-ID: <20260206161539.209922-8-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F42:EE_|CH1PR12MB9719:EE_ X-MS-Office365-Filtering-Correlation-Id: 721a540a-067c-4a0b-55e5-08de659b0913 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; 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The emulator embeds amd_like() in macros and is called in MANY places. Using a local variable (cp->x86_vendor) makes it a lot smaller (300-400 bytes smaller). So treat this as the exception it is and let it use the policy rather than boot_cpu_data. Also keep the current behaviour of using the policy vendor when compiled for userspace, where cross-vendor configurations are expected. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/x86_emulate/private.h | 10 +++++++++- xen/arch/x86/x86_emulate/x86_emulate.c | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 24c79c4e8f..95f2015c44 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -15,6 +15,7 @@ # include # include +# include # include # include # include @@ -30,8 +31,15 @@ void BUG(void); # define X86EMUL_NO_SIMD # endif +/* intentionally avoid cpu_vendor(), as it produces much worse codegen */ +# define x86emul_cpu(cp) ((X86_ENABLED_VENDORS == \ + ISOLATE_LSB(X86_ENABLED_VENDORS)) \ + ? X86_ENABLED_VENDORS \ + : ((cp)->x86_vendor & X86_ENABLED_VENDORS)) + #else /* !__XEN__ */ # include "x86-emulate.h" +# define x86emul_cpu(cp) ((cp)->x86_vendor) #endif #ifdef __i386__ @@ -520,7 +528,7 @@ in_protmode( static inline bool _amd_like(const struct cpu_policy *cp) { - return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); + return x86emul_cpu(cp) & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } static inline bool diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 7751a67130..308ec3579f 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -3104,7 +3104,7 @@ x86_emulate( * in fact risking to make guest OSes vulnerable to the equivalent of * XSA-7 (CVE-2012-0217). */ - generate_exception_if(cp->x86_vendor == X86_VENDOR_INTEL && + generate_exception_if((x86emul_cpu(cp) & X86_VENDOR_INTEL) && op_bytes == 8 && !is_canonical_address(_regs.rcx), X86_EXC_GP, 0); #endif -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223515.1531008 (Exim 4.92) (envelope-from ) id 1voOVE-0006f0-Hc; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk Subject: [PATCH 06/12] x86: Migrate switch vendor checks to cpu_vendor() Date: Fri, 6 Feb 2026 17:15:28 +0100 Message-ID: <20260206161539.209922-7-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3E:EE_|CY5PR12MB6573:EE_ X-MS-Office365-Filtering-Correlation-Id: f402acba-e5db-45f7-3695-08de659b07e9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ryNnJ5bzsI1mM7TOh5hOHAQ0JkLwDZIfFPxULwfsPKwkr8/JJxt4fk8so6/tR0kKMx9GLgOYLLrqpu5CQcjay8P2firrBt0FkZIGL8Lk7mNK2erNQ3sJVSm7rZG5y2LYLtaqdojShpTowypZfMVm39YOOX9pMos3ieynlIbRJ6ykAkliwZ7Zd9Y2yijD6ozzq5BDduGLMkjY3z3YfdjuV0C2QZSFx0HCJe/STvEoAUwi/ZrXn7W/9N2hWkvhzrlYQGvGYS20r6XzSkbZgNKQPseeIUdhWwclxkZMXZBKlSwfmjjMF8zOnpJBu3c8WlloY/CzpCksXojxEt1mrM1iE4Cl5iHVO2RfZWarAYSvGYNMZZF2C5/ex0+GLrwcRK8w1DQ1p0ddjpk+r3ClZyXYme99AULK7d67yK7Rxlpzuk6qbJKpc0gOVjDNWKiGPp2Y X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2026 16:16:05.9530 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f402acba-e5db-45f7-3695-08de659b07e9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6573 In the single-vendor case (with no unknown vendor) all switches turn to a branchless straight line through the single compiled-in case. In the multivendor case where some vendors are disabled the VRP pass ensures those branches are eliminated. It's hard to tell the VRP pass zero is also unreachable when CONFIG_UNKNOWN_CPU_VENDORS is disabled, so default cases tend to remain. Signed-off-by: Alejandro Vallejo --- The removals of ifdefs are proof of VRP doing the work of DCE. --- xen/arch/x86/acpi/cpufreq/cpufreq.c | 12 +++--------- xen/arch/x86/alternative.c | 2 +- xen/arch/x86/cpu-policy.c | 6 +++--- xen/arch/x86/cpu/mcheck/mce.c | 6 +----- xen/arch/x86/cpu/mcheck/mce.h | 2 +- xen/arch/x86/cpu/mcheck/non-fatal.c | 6 +----- xen/arch/x86/cpu/mcheck/vmce.c | 12 ++---------- xen/arch/x86/cpu/vpmu.c | 6 +----- xen/arch/x86/domain.c | 4 ++-- xen/arch/x86/guest/xen/xen.c | 2 +- xen/arch/x86/nmi.c | 4 ++-- xen/arch/x86/traps-setup.c | 2 +- 12 files changed, 19 insertions(+), 45 deletions(-) diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c index 5740c0d438..4ee03ecc65 100644 --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -133,7 +133,7 @@ static int __init cf_check cpufreq_driver_init(void) ret = -ENOENT; - switch ( boot_cpu_data.x86_vendor ) + switch( cpu_vendor() ) { case X86_VENDOR_INTEL: for ( i = 0; i < cpufreq_xen_cnt; i++ ) @@ -141,12 +141,10 @@ static int __init cf_check cpufreq_driver_init(void) switch ( cpufreq_xen_opts[i] ) { case CPUFREQ_xen: - ret = IS_ENABLED(CONFIG_INTEL) ? - acpi_cpufreq_register() : -ENODEV; + ret = acpi_cpufreq_register(); break; case CPUFREQ_hwp: - ret = IS_ENABLED(CONFIG_INTEL) ? - hwp_register_driver() : -ENODEV; + ret = hwp_register_driver(); break; case CPUFREQ_none: ret = 0; @@ -165,7 +163,6 @@ static int __init cf_check cpufreq_driver_init(void) case X86_VENDOR_AMD: case X86_VENDOR_HYGON: -#ifdef CONFIG_AMD for ( i = 0; i < cpufreq_xen_cnt; i++ ) { switch ( cpufreq_xen_opts[i] ) @@ -191,9 +188,6 @@ static int __init cf_check cpufreq_driver_init(void) if ( !ret || ret == -EBUSY ) break; } -#else - ret = -ENODEV; -#endif /* CONFIG_AMD */ break; default: diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 9f844241bc..c723417807 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -89,7 +89,7 @@ static bool init_or_livepatch_read_mostly toolchain_nops_are_ideal; static void __init arch_init_ideal_nops(void) { - switch ( boot_cpu_data.x86_vendor ) + switch ( cpu_vendor() ) { case X86_VENDOR_INTEL: /* diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 5273fe0ae4..62aff61d8c 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -279,7 +279,7 @@ static void recalculate_misc(struct cpu_policy *p) p->extd.raw[0x8].d = 0; - switch ( p->x86_vendor ) + switch ( cpu_vendor() ) { case X86_VENDOR_INTEL: p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ @@ -420,7 +420,7 @@ static void __init guest_common_default_leaves(struct cpu_policy *p) static void __init guest_common_max_feature_adjustments(uint32_t *fs) { - switch ( boot_cpu_data.vendor ) + switch ( cpu_vendor() ) { case X86_VENDOR_INTEL: /* @@ -514,7 +514,7 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) static void __init guest_common_default_feature_adjustments(uint32_t *fs) { - switch ( boot_cpu_data.vendor ) + switch ( cpu_vendor() ) { case X86_VENDOR_INTEL: /* diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 9277781bff..4b295aeeb5 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -766,16 +766,13 @@ void mcheck_init(struct cpuinfo_x86 *c, bool bsp) else if ( cpu_bank_alloc(cpu) ) panic("Insufficient memory for MCE bank allocations\n"); - switch ( c->x86_vendor ) + switch ( cpu_vendor() ) { -#ifdef CONFIG_AMD case X86_VENDOR_AMD: case X86_VENDOR_HYGON: inited = amd_mcheck_init(c, bsp); break; -#endif -#ifdef CONFIG_INTEL case X86_VENDOR_INTEL: switch ( c->x86 ) { @@ -785,7 +782,6 @@ void mcheck_init(struct cpuinfo_x86 *c, bool bsp) break; } break; -#endif default: break; diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h index 920b075355..4828c74d47 100644 --- a/xen/arch/x86/cpu/mcheck/mce.h +++ b/xen/arch/x86/cpu/mcheck/mce.h @@ -137,7 +137,7 @@ void x86_mcinfo_dump(struct mc_info *mi); static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr) { - switch (boot_cpu_data.x86_vendor) { + switch (cpu_vendor()) { case X86_VENDOR_INTEL: if (msr >= MSR_IA32_MC0_CTL2 && msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) ) diff --git a/xen/arch/x86/cpu/mcheck/non-fatal.c b/xen/arch/x86/cpu/mcheck/non-fatal.c index a9ee9bb94f..3a0399c121 100644 --- a/xen/arch/x86/cpu/mcheck/non-fatal.c +++ b/xen/arch/x86/cpu/mcheck/non-fatal.c @@ -23,20 +23,16 @@ static int __init cf_check init_nonfatal_mce_checker(void) /* * Check for non-fatal errors every MCE_RATE s */ - switch (c->x86_vendor) { -#ifdef CONFIG_AMD + switch (cpu_vendor()) { case X86_VENDOR_AMD: case X86_VENDOR_HYGON: /* Assume we are on K8 or newer AMD or Hygon CPU here */ amd_nonfatal_mcheck_init(c); break; -#endif -#ifdef CONFIG_INTEL case X86_VENDOR_INTEL: intel_nonfatal_mcheck_init(c); break; -#endif default: /* unhandled vendor isn't really an error */ diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 1a7e92506a..0c1bfb691b 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -136,22 +136,18 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) break; default: - switch ( boot_cpu_data.x86_vendor ) + switch ( cpu_vendor() ) { -#ifdef CONFIG_INTEL case X86_VENDOR_CENTAUR: case X86_VENDOR_SHANGHAI: case X86_VENDOR_INTEL: ret = vmce_intel_rdmsr(v, msr, val); break; -#endif -#ifdef CONFIG_AMD case X86_VENDOR_AMD: case X86_VENDOR_HYGON: ret = vmce_amd_rdmsr(v, msr, val); break; -#endif default: ret = 0; @@ -273,20 +269,16 @@ static int bank_mce_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) break; default: - switch ( boot_cpu_data.x86_vendor ) + switch ( cpu_vendor() ) { -#ifdef CONFIG_INTEL case X86_VENDOR_INTEL: ret = vmce_intel_wrmsr(v, msr, val); break; -#endif -#ifdef CONFIG_AMD case X86_VENDOR_AMD: case X86_VENDOR_HYGON: ret = vmce_amd_wrmsr(v, msr, val); break; -#endif default: ret = 0; diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index c28192ea26..b1ad4ebcf6 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -815,7 +815,7 @@ static struct notifier_block cpu_nfb = { static int __init cf_check vpmu_init(void) { - int vendor = current_cpu_data.x86_vendor; + int vendor = cpu_vendor(); const struct arch_vpmu_ops *ops = NULL; if ( !opt_vpmu_enabled ) @@ -832,7 +832,6 @@ static int __init cf_check vpmu_init(void) switch ( vendor ) { -#ifdef CONFIG_AMD case X86_VENDOR_AMD: ops = amd_vpmu_init(); break; @@ -840,13 +839,10 @@ static int __init cf_check vpmu_init(void) case X86_VENDOR_HYGON: ops = hygon_vpmu_init(); break; -#endif -#ifdef CONFIG_INTEL case X86_VENDOR_INTEL: ops = core2_vpmu_init(); break; -#endif default: printk(XENLOG_WARNING "VPMU: Unknown CPU vendor: %d. " diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 8b2f33f1a0..10a558e515 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -319,7 +319,7 @@ void domain_cpu_policy_changed(struct domain *d) if ( cpu_has_htt ) edx |= cpufeat_mask(X86_FEATURE_HTT); - switch ( boot_cpu_data.x86_vendor ) + switch( cpu_vendor() ) { case X86_VENDOR_INTEL: /* @@ -427,7 +427,7 @@ void domain_cpu_policy_changed(struct domain *d) if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) edx &= ~CPUID_COMMON_1D_FEATURES; - switch ( boot_cpu_data.x86_vendor ) + switch( cpu_vendor() ) { case X86_VENDOR_INTEL: mask &= ((uint64_t)edx << 32) | ecx; diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index ec558bcbdb..590a4bad82 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -63,7 +63,7 @@ void asmlinkage __init early_hypercall_setup(void) x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); } - switch ( boot_cpu_data.x86_vendor ) + switch ( cpu_vendor() ) { case X86_VENDOR_INTEL: case X86_VENDOR_CENTAUR: diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index a0c9194ff0..a3ba59ce0b 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -216,7 +216,7 @@ void disable_lapic_nmi_watchdog(void) { if (nmi_active <= 0) return; - switch (boot_cpu_data.x86_vendor) { + switch(cpu_vendor()) { case X86_VENDOR_AMD: wrmsrns(MSR_K7_EVNTSEL0, 0); break; @@ -387,7 +387,7 @@ void setup_apic_nmi_watchdog(void) if ( nmi_watchdog == NMI_NONE ) return; - switch ( boot_cpu_data.x86_vendor ) + switch( cpu_vendor() ) { case X86_VENDOR_AMD: setup_k7_watchdog(); diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c index d77be8f839..7d7554a7ba 100644 --- a/xen/arch/x86/traps-setup.c +++ b/xen/arch/x86/traps-setup.c @@ -243,7 +243,7 @@ static void __init init_ler(void) * Intel Pentium 4 is the only known CPU to not use the architectural MSR * indicies. */ - switch ( boot_cpu_data.x86_vendor ) + switch( cpu_vendor() ) { case X86_VENDOR_INTEL: if ( boot_cpu_data.x86 == 0xf ) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:16:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:16:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223517.1531024 (Exim 4.92) (envelope-from ) id 1voOVJ-0007MB-3b; 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Signed-off-by: Alejandro Vallejo --- xen/arch/x86/acpi/cpu_idle.c | 16 +++++++--------- xen/arch/x86/acpi/cpufreq/acpi.c | 2 +- xen/arch/x86/acpi/cpufreq/cpufreq.c | 3 +-- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c index 0b3d0631dd..0a49b2730b 100644 --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -178,7 +178,7 @@ static void cf_check do_get_hw_residencies(void *arg) struct cpuinfo_x86 *c = ¤t_cpu_data; struct hw_residencies *hw_res = arg; - if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || c->x86 != 6 ) return; switch ( c->x86_model ) @@ -915,8 +915,7 @@ void cf_check acpi_dead_idle(void) mwait(cx->address, 0); } } - else if ( (current_cpu_data.x86_vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + else if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) && cx->entry_method == ACPI_CSTATE_EM_SYSIO ) { /* Intel prefers not to use SYSIO */ @@ -1042,8 +1041,8 @@ static void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flag flags->bm_check = 0; if ( num_online_cpus() == 1 ) flags->bm_check = 1; - else if ( (c->x86_vendor == X86_VENDOR_INTEL) || - ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 0x15)) ) + else if ( (cpu_vendor() & X86_VENDOR_INTEL) || + ((cpu_vendor() & X86_VENDOR_AMD) && c->x86 == 0x15) ) { /* * Today all MP CPUs that support C3 share cache. @@ -1059,7 +1058,7 @@ static void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flag * is not required while entering C3 type state on * P4, Core and beyond CPUs */ - if ( c->x86_vendor == X86_VENDOR_INTEL && + if ( (cpu_vendor() & X86_VENDOR_INTEL) && (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 14)) ) flags->bm_control = 0; } @@ -1421,7 +1420,7 @@ static void amd_cpuidle_init(struct acpi_processor_power *power) case 0x1a: case 0x19: case 0x18: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_HYGON ) + if ( !(cpu_vendor() & X86_VENDOR_HYGON) ) { default: vendor_override = -1; @@ -1648,8 +1647,7 @@ static int cf_check cpu_callback( break; case CPU_ONLINE: - if ( (boot_cpu_data.x86_vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) && processor_powers[cpu] ) amd_cpuidle_init(processor_powers[cpu]); break; diff --git a/xen/arch/x86/acpi/cpufreq/acpi.c b/xen/arch/x86/acpi/cpufreq/acpi.c index d0ca660db1..a5e5c223b3 100644 --- a/xen/arch/x86/acpi/cpufreq/acpi.c +++ b/xen/arch/x86/acpi/cpufreq/acpi.c @@ -454,7 +454,7 @@ static int cf_check acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) /* Check for APERF/MPERF support in hardware * also check for boost support */ - if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) + if ((cpu_vendor() & X86_VENDOR_INTEL) && c->cpuid_level >= 6) on_selected_cpus(cpumask_of(cpu), feature_detect, policy, 1); /* diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c index 4ee03ecc65..d731a21644 100644 --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -246,8 +246,7 @@ __initcall(cpufreq_driver_late_init); int cpufreq_cpu_init(unsigned int cpu) { /* Currently we only handle Intel, AMD and Hygon processor */ - if ( boot_cpu_data.x86_vendor & - (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return cpufreq_add_cpu(cpu); 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Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/x86_emulate/private.h | 6 +++++- xen/arch/x86/x86_emulate/x86_emulate.c | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 24c79c4e8f..1b6fc48ab6 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -15,6 +15,7 @@ # include # include +# include # include # include # include @@ -30,8 +31,11 @@ void BUG(void); # define X86EMUL_NO_SIMD # endif +# define x86emul_cpu(cp) ({ (void)(cp); cpu_vendor(); }) + #else /* !__XEN__ */ # include "x86-emulate.h" +# define x86emul_cpu(cp) ((cp)->x86_vendor) #endif #ifdef __i386__ @@ -520,7 +524,7 @@ in_protmode( static inline bool _amd_like(const struct cpu_policy *cp) { - return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); + return x86emul_cpu(cp) & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } static inline bool diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 7751a67130..fcd8cbccc9 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -3104,7 +3104,7 @@ x86_emulate( * in fact risking to make guest OSes vulnerable to the equivalent of * XSA-7 (CVE-2012-0217). */ - generate_exception_if(cp->x86_vendor == X86_VENDOR_INTEL && + generate_exception_if((x86emul_cpu(cp) == X86_VENDOR_INTEL) && op_bytes == 8 && !is_canonical_address(_regs.rcx), X86_EXC_GP, 0); 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Signed-off-by: Alejandro Vallejo --- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 27 ++++++++++++--------------- 2 files changed, 13 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index d16583a745..7084274dff 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -174,7 +174,7 @@ static int __init cf_check pge_init(void) { if ( opt_global_pages == -1 ) opt_global_pages = !cpu_has_hypervisor || - !(boot_cpu_data.x86_vendor & + !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)); return 0; diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 1d9e57ad27..02b6e8f01f 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -243,8 +243,7 @@ static bool pci_cfg_ok(struct domain *currd, unsigned int start, } start |= CF8_ADDR_LO(currd->arch.pci_cf8); /* AMD extended configuration space access? */ - if ( CF8_ADDR_HI(currd->arch.pci_cf8) && - boot_cpu_data.x86_vendor == X86_VENDOR_AMD && + if ( CF8_ADDR_HI(currd->arch.pci_cf8) && (cpu_vendor() & X86_VENDOR_AMD) && boot_cpu_data.x86 >= 0x10 && boot_cpu_data.x86 < 0x17 ) { uint64_t msr_val; @@ -869,8 +868,7 @@ static uint64_t guest_efer(const struct domain *d) */ if ( is_pv_32bit_domain(d) ) val &= ~(EFER_LME | EFER_LMA | - (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL - ? EFER_SCE : 0)); + ((cpu_vendor() & X86_VENDOR_INTEL) ? EFER_SCE : 0)); return val; } @@ -958,7 +956,7 @@ static int cf_check read_msr( case MSR_K8_PSTATE5: case MSR_K8_PSTATE6: case MSR_K8_PSTATE7: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) + if ( !(cpu_vendor() & X86_VENDOR_AMD) ) break; if ( unlikely(is_cpufreq_controller(currd)) ) goto normal; @@ -966,7 +964,7 @@ static int cf_check read_msr( return X86EMUL_OKAY; case MSR_FAM10H_MMIO_CONF_BASE: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || + if ( !(cpu_vendor() & X86_VENDOR_AMD) || boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 ) break; /* fall through */ @@ -991,13 +989,13 @@ static int cf_check read_msr( case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3): case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) { vpmu_msr = true; /* fall through */ case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.x86_vendor & + if ( vpmu_msr || (cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) { if ( vpmu_do_rdmsr(reg, val) ) @@ -1100,8 +1098,7 @@ static int cf_check write_msr( case MSR_K8_PSTATE6: case MSR_K8_PSTATE7: case MSR_K8_HWCR: - if ( !(boot_cpu_data.x86_vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) break; if ( likely(!is_cpufreq_controller(currd)) || wrmsr_safe(reg, val) == 0 ) @@ -1119,7 +1116,7 @@ static int cf_check write_msr( break; case MSR_FAM10H_MMIO_CONF_BASE: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || + if ( !(cpu_vendor() & X86_VENDOR_AMD) || boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 ) break; if ( !is_hwdom_pinned_vcpu(curr) ) @@ -1148,7 +1145,7 @@ static int cf_check write_msr( case MSR_IA32_MPERF: case MSR_IA32_APERF: - if ( !(boot_cpu_data.x86_vendor & + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) break; if ( likely(!is_cpufreq_controller(currd)) || @@ -1158,7 +1155,7 @@ static int cf_check write_msr( case MSR_IA32_THERM_CONTROL: case MSR_IA32_ENERGY_PERF_BIAS: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) ) break; if ( !is_hwdom_pinned_vcpu(curr) || wrmsr_safe(reg, val) == 0 ) return X86EMUL_OKAY; @@ -1168,12 +1165,12 @@ static int cf_check write_msr( case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3): case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) { vpmu_msr = true; case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... 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Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 2 +- xen/arch/x86/cpu/mcheck/mcaction.c | 2 +- xen/arch/x86/cpu/mcheck/mce.c | 17 ++++++++--------- xen/arch/x86/cpu/mcheck/mce_amd.c | 7 +++---- xen/arch/x86/cpu/mcheck/mce_intel.c | 7 +++---- xen/arch/x86/cpu/mcheck/vmce.c | 4 ++-- 6 files changed, 18 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c index 7d48c9ab5f..ebe13911ba 100644 --- a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c +++ b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c @@ -191,7 +191,7 @@ static void cf_check mce_amd_work_fn(void *data) void __init amd_nonfatal_mcheck_init(struct cpuinfo_x86 *c) { - if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) + if (!(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) return; /* Assume we are on K8 or newer AMD or Hygon CPU here */ diff --git a/xen/arch/x86/cpu/mcheck/mcaction.c b/xen/arch/x86/cpu/mcheck/mcaction.c index bf7a0de965..b7fc5056d8 100644 --- a/xen/arch/x86/cpu/mcheck/mcaction.c +++ b/xen/arch/x86/cpu/mcheck/mcaction.c @@ -101,7 +101,7 @@ mc_memerr_dhandler(struct mca_binfo *binfo, * not always precise. In that case, fallback to broadcast. */ global->mc_domid != bank->mc_domid || - (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + ((cpu_vendor() & X86_VENDOR_INTEL) && (!(global->mc_gstatus & MCG_STATUS_LMCE) || !(d->vcpu[mc_vcpuid]->arch.vmce.mcg_ext_ctl & MCG_EXT_CTL_LMCE_EN))) ) diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 4b295aeeb5..91c5033edb 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -333,8 +333,7 @@ mcheck_mca_logout(enum mca_source who, struct mca_banks *bankmask, ASSERT(mig); mca_init_global(mc_flags, mig); /* A hook here to get global extended msrs */ - if ( IS_ENABLED(CONFIG_INTEL) && - boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) intel_get_extended_msrs(mig, mci); } } @@ -564,8 +563,8 @@ bool mce_available(const struct cpuinfo_x86 *c) */ unsigned int mce_firstbank(struct cpuinfo_x86 *c) { - return c->x86 == 6 && - c->x86_vendor == X86_VENDOR_INTEL && c->x86_model < 0x1a; + return (cpu_vendor() & X86_VENDOR_INTEL) && + c->x86 == 6 && c->x86_model < 0x1a; } static int show_mca_info(int inited, struct cpuinfo_x86 *c) @@ -862,7 +861,7 @@ static void x86_mcinfo_apei_save( memset(&m, 0, sizeof(struct mce)); m.cpu = mc_global->mc_coreid; - m.cpuvendor = boot_cpu_data.x86_vendor; + m.cpuvendor = cpu_vendor(); m.cpuid = cpuid_eax(1); m.socketid = mc_global->mc_socketid; m.apicid = mc_global->mc_apicid; @@ -964,7 +963,7 @@ static void cf_check __maybe_unused do_mc_get_cpu_info(void *v) &xcp->mc_ncores_active, &xcp->mc_nthreads); xcp->mc_cpuid_level = c->cpuid_level; xcp->mc_family = c->x86; - xcp->mc_vendor = c->x86_vendor; + xcp->mc_vendor = cpu_vendor(); xcp->mc_model = c->x86_model; xcp->mc_step = c->x86_mask; xcp->mc_cache_size = c->x86_cache_size; @@ -1122,7 +1121,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci) if ( IS_MCA_BANKREG(reg, mci->mcinj_cpunr) ) { - if ( c->x86_vendor == X86_VENDOR_AMD ) + if ( (cpu_vendor() & X86_VENDOR_AMD) ) { /* * On AMD we can set MCi_STATUS_WREN in the @@ -1157,7 +1156,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci) case MSR_F10_MC4_MISC1: case MSR_F10_MC4_MISC2: case MSR_F10_MC4_MISC3: - if ( c->x86_vendor != X86_VENDOR_AMD ) + if ( !(cpu_vendor() & X86_VENDOR_AMD) ) reason = "only supported on AMD"; else if ( c->x86 < 0x10 ) reason = "only supported on AMD Fam10h+"; @@ -1165,7 +1164,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci) /* MSRs that the HV will take care of */ case MSR_K8_HWCR: - if ( c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) reason = "HV will operate HWCR"; else reason = "only supported on AMD or Hygon"; diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c index 25c29eb3d2..b4d09fd6c1 100644 --- a/xen/arch/x86/cpu/mcheck/mce_amd.c +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c @@ -160,7 +160,7 @@ mcequirk_lookup_amd_quirkdata(const struct cpuinfo_x86 *c) { unsigned int i; - BUG_ON(c->x86_vendor != X86_VENDOR_AMD); + BUG_ON(!(cpu_vendor() & X86_VENDOR_AMD)); for ( i = 0; i < ARRAY_SIZE(mce_amd_quirks); i++ ) { @@ -291,7 +291,7 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp) uint32_t i; enum mcequirk_amd_flags quirkflag = 0; - if ( c->x86_vendor != X86_VENDOR_HYGON ) + if ( !(cpu_vendor() & X86_VENDOR_HYGON) ) quirkflag = mcequirk_lookup_amd_quirkdata(c); /* Assume that machine check support is available. @@ -337,6 +337,5 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp) ppin_msr = MSR_AMD_PPIN; } - return c->x86_vendor == X86_VENDOR_HYGON ? - mcheck_hygon : mcheck_amd_famXX; + return (cpu_vendor() & X86_VENDOR_HYGON) ? mcheck_hygon : mcheck_amd_famXX; } diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 839a0e5ba9..90dbb60236 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -711,8 +711,8 @@ static bool mce_is_broadcast(struct cpuinfo_x86 *c) * DisplayFamily_DisplayModel encoding of 06H_EH and above, * a MCA signal is broadcast to all logical processors in the system */ - if ( c->x86_vendor == X86_VENDOR_INTEL && c->x86 == 6 && - c->x86_model >= 0xe ) + if ( (cpu_vendor() & X86_VENDOR_INTEL) && + c->x86 == 6 && c->x86_model >= 0xe ) return true; return false; } @@ -1018,7 +1018,6 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) @@ -1036,7 +1035,7 @@ int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) return 1; } - if ( !(cp->x86_vendor & X86_VENDOR_INTEL) ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) ) return 0; if ( bank < GUEST_MC_BANK_NUM ) diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 0c1bfb691b..393bf8c787 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -45,7 +45,7 @@ void vmce_init_vcpu(struct vcpu *v) int i; /* global MCA MSRs init */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) v->arch.vmce.mcg_cap = INTEL_GUEST_MCG_CAP; else v->arch.vmce.mcg_cap = AMD_GUEST_MCG_CAP; @@ -63,7 +63,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt) { unsigned long guest_mcg_cap; - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) guest_mcg_cap = INTEL_GUEST_MCG_CAP | MCG_LMCE_P; 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Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/amd.c | 6 +++--- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/cpu/intel_cacheinfo.c | 5 ++--- xen/arch/x86/cpu/microcode/amd.c | 2 +- xen/arch/x86/cpu/microcode/core.c | 2 +- xen/arch/x86/cpu/mtrr/generic.c | 5 ++--- xen/arch/x86/cpu/mwait-idle.c | 5 ++--- xen/arch/x86/cpu/vpmu.c | 3 +-- 8 files changed, 13 insertions(+), 17 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index fc496dc43e..422d81472e 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -327,7 +327,7 @@ int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, ...) u32 range; u32 ms; - if (cpu->x86_vendor != X86_VENDOR_AMD) + if (!(cpu_vendor() & X86_VENDOR_AMD)) return 0; if (osvw_id >= 0 && cpu_has(cpu, X86_FEATURE_OSVW)) { @@ -418,8 +418,8 @@ static void check_syscfg_dram_mod_en(void) { uint64_t syscfg; - if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && - (boot_cpu_data.x86 >= 0x0f))) + if (!((cpu_vendor() & X86_VENDOR_AMD) && + (boot_cpu_data.x86 >= 0x0f))) return; rdmsrl(MSR_K8_SYSCFG, syscfg); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 6f4e723172..9a6fb90fec 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -436,7 +436,7 @@ void __init early_cpu_init(bool verbose) paddr_bits -= (ebx >> 6) & 0x3f; } - if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) + if (!(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) park_offline_cpus = opt_mce; initialize_cpu_data(0); diff --git a/xen/arch/x86/cpu/intel_cacheinfo.c b/xen/arch/x86/cpu/intel_cacheinfo.c index e88faa7545..f95ed90809 100644 --- a/xen/arch/x86/cpu/intel_cacheinfo.c +++ b/xen/arch/x86/cpu/intel_cacheinfo.c @@ -168,9 +168,8 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for * trace cache */ - if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1 && - c->x86_vendor != X86_VENDOR_SHANGHAI) - { + if (((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) && + (!(cpu_vendor() & X86_VENDOR_SHANGHAI))) { /* supports eax=2 call */ unsigned int i, j, n, regs[4]; unsigned char *dp = (unsigned char *)regs; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 90f10ac8be..b4c8264e27 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -616,7 +616,7 @@ void __init amd_check_entrysign(void) uint8_t fixed_rev; if ( !IS_ENABLED(CONFIG_MICROCODE_LOADING) || - boot_cpu_data.vendor != X86_VENDOR_AMD || + !(cpu_vendor() & X86_VENDOR_AMD) || boot_cpu_data.family < 0x17 || boot_cpu_data.family > 0x1a ) return; diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index ea0b35c499..ebe4d21026 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -216,7 +216,7 @@ static struct patch_with_flags nmi_patch = /* Returns true if ucode should be loaded on a given cpu */ static bool is_cpu_primary(unsigned int cpu) { - if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) /* Load ucode on every logical thread/core */ return true; diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c index c587e9140e..eab72dc103 100644 --- a/xen/arch/x86/cpu/mtrr/generic.c +++ b/xen/arch/x86/cpu/mtrr/generic.c @@ -218,9 +218,8 @@ static void __init print_mtrr_state(const char *level) printk("%s %u disabled\n", level, i); } - if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD && - boot_cpu_data.x86 >= 0xf) || - boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { + if (((cpu_vendor() & X86_VENDOR_AMD) && boot_cpu_data.x86 >= 0xf) || + (cpu_vendor() & X86_VENDOR_HYGON)) { uint64_t syscfg, tom2; rdmsrl(MSR_K8_SYSCFG, syscfg); diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c index 5962ec1db9..8536bc97f6 100644 --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1598,7 +1598,7 @@ static int __init mwait_idle_probe(void) const struct x86_cpu_id *id; const char *str; - if (boot_cpu_data.vendor != X86_VENDOR_INTEL) + if (!(cpu_vendor() & X86_VENDOR_INTEL)) return -ENODEV; id = x86_match_cpu(intel_idle_ids); @@ -1816,8 +1816,7 @@ bool __init mwait_pc10_supported(void) { unsigned int ecx, edx, dummy; - if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || - !cpu_has_monitor || + if (!(cpu_vendor() & X86_VENDOR_INTEL) || !cpu_has_monitor || boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) return false; diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index b1ad4ebcf6..b79d57d0ec 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -398,7 +398,6 @@ int vpmu_load(struct vcpu *v, bool from_guest) static int vpmu_arch_initialise(struct vcpu *v) { struct vpmu_struct *vpmu = vcpu_vpmu(v); - uint8_t vendor = current_cpu_data.x86_vendor; int ret; BUILD_BUG_ON(sizeof(struct xen_pmu_intel_ctxt) > XENPMU_CTXT_PAD_SZ); @@ -418,7 +417,7 @@ static int vpmu_arch_initialise(struct vcpu *v) if ( vpmu_mode != XENPMU_MODE_OFF ) { printk(XENLOG_G_WARNING "VPMU: Unknown CPU vendor %d. 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Signed-off-by: Alejandro Vallejo --- xen/arch/x86/apic.c | 2 +- xen/arch/x86/cpu-policy.c | 8 ++++---- xen/arch/x86/cpuid.c | 5 ++--- xen/arch/x86/dom0_build.c | 2 +- xen/arch/x86/domain.c | 12 +++++------- xen/arch/x86/e820.c | 2 +- xen/arch/x86/hvm/hvm.c | 3 +-- xen/arch/x86/hvm/ioreq.c | 3 +-- xen/arch/x86/hvm/vmx/vmx.c | 8 +++----- xen/arch/x86/i8259.c | 5 ++--- xen/arch/x86/include/asm/guest_pt.h | 3 +-- xen/arch/x86/irq.c | 3 +-- xen/arch/x86/setup.c | 7 +++---- 13 files changed, 26 insertions(+), 37 deletions(-) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index fb38be7ec3..fd3ac07aeb 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -406,7 +406,7 @@ void __init init_bsp_APIC(void) value |= APIC_SPIV_APIC_ENABLED; /* This bit is reserved on P4/Xeon and should be cleared */ - if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 15)) + if ((cpu_vendor() & X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 15)) value &= ~APIC_SPIV_FOCUS_DISABLED; else value |= APIC_SPIV_FOCUS_DISABLED; diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 62aff61d8c..055862b0b2 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -770,7 +770,7 @@ static void __init calculate_hvm_max_policy(void) * long mode (and init_amd() has cleared it out of host capabilities), but * HVM guests are able if running in protected mode. */ - if ( (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + if ( (cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, fs); @@ -963,8 +963,8 @@ void recalculate_cpuid_policy(struct domain *d) p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); p->extd.max_leaf = 0x80000000U | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) + ((cpu_vendor() & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); @@ -998,7 +998,7 @@ void recalculate_cpuid_policy(struct domain *d) if ( is_pv_32bit_domain(d) ) { __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) __clear_bit(X86_FEATURE_SYSCALL, max_fs); } diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 5decfad8cd..d64030bc09 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -437,8 +437,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, case 0xa: /* TODO: Rework vPMU control in terms of toolstack choices. */ - if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || - !vpmu_available(v) ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || !vpmu_available(v) ) *res = EMPTY_LEAF; else { @@ -483,7 +482,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, case 0x80000001U: /* SYSCALL is hidden outside of long mode on Intel. */ - if ( p->x86_vendor == X86_VENDOR_INTEL && + if ( (cpu_vendor() & X86_VENDOR_INTEL) && is_hvm_domain(d) && !hvm_long_mode_active(v) ) res->d &= ~cpufeat_mask(X86_FEATURE_SYSCALL); diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 0b467fd4a4..4b7f1bf034 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -572,7 +572,7 @@ int __init dom0_setup_permissions(struct domain *d) rc |= iomem_deny_access(d, mfn, mfn); } /* HyperTransport range. */ - if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) { mfn = paddr_to_pfn(1UL << (boot_cpu_data.x86 < 0x17 ? 40 : paddr_bits)); diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 10a558e515..fd9c7f0be5 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -372,7 +372,7 @@ void domain_cpu_policy_changed(struct domain *d) { uint64_t mask = cpuidmask_defaults._6c; - if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + if ( cpu_vendor() & X86_VENDOR_AMD ) mask &= (~0ULL << 32) | p->basic.raw[6].c; d->arch.pv.cpuidmasks->_6c = mask; @@ -387,8 +387,7 @@ void domain_cpu_policy_changed(struct domain *d) * wholesale from the policy, but clamp the features in 7[0].ebx * per usual. */ - if ( boot_cpu_data.x86_vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) mask = (((uint64_t)p->feat.max_subleaf << 32) | ((uint32_t)mask & p->feat._7b0)); @@ -400,7 +399,7 @@ void domain_cpu_policy_changed(struct domain *d) uint64_t mask = cpuidmask_defaults.Da1; uint32_t eax = p->xstate.Da1; - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( cpu_vendor() & X86_VENDOR_INTEL ) mask &= (~0ULL << 32) | eax; d->arch.pv.cpuidmasks->Da1 = mask; @@ -424,7 +423,7 @@ void domain_cpu_policy_changed(struct domain *d) * If not emulating AMD or Hygon, clear the duplicated features * in e1d. */ - if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + if ( cpu_vendor() & ~(X86_VENDOR_AMD | X86_VENDOR_HYGON) ) edx &= ~CPUID_COMMON_1D_FEATURES; switch( cpu_vendor() ) @@ -457,8 +456,7 @@ void domain_cpu_policy_changed(struct domain *d) cpu_policy_updated(v); /* If PMU version is zero then the guest doesn't have VPMU */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - p->basic.pmu_version == 0 ) + if ( (cpu_vendor() & X86_VENDOR_INTEL) && p->basic.pmu_version == 0 ) vpmu_destroy(v); } } diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c index ca577c0bde..0bf90f2283 100644 --- a/xen/arch/x86/e820.c +++ b/xen/arch/x86/e820.c @@ -426,7 +426,7 @@ static uint64_t __init mtrr_top_of_ram(void) /* By default we check only Intel systems. */ if ( e820_mtrr_clip == -1 ) - e820_mtrr_clip = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL; + e820_mtrr_clip = cpu_vendor() == X86_VENDOR_INTEL; if ( !e820_mtrr_clip ) return 0; diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 4d37a93c57..52a6cc69e5 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2681,8 +2681,7 @@ bool hvm_vcpu_virtual_to_linear( } else if ( last_byte > reg->limit ) goto out; /* last byte is beyond limit */ - else if ( last_byte < offset && - v->domain->arch.cpuid->x86_vendor == X86_VENDOR_AMD ) + else if ( (cpu_vendor() & X86_VENDOR_AMD) && last_byte < offset ) goto out; /* access wraps */ } diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index a5fa97e149..7a55b14f55 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -285,8 +285,7 @@ bool arch_ioreq_server_get_type_addr(const struct domain *d, *type = XEN_DMOP_IO_RANGE_PCI; *addr = ((uint64_t)sbdf.sbdf << 32) | reg; /* AMD extended configuration space access? */ - if ( CF8_ADDR_HI(cf8) && - d->arch.cpuid->x86_vendor == X86_VENDOR_AMD && + if ( CF8_ADDR_HI(cf8) && (cpu_vendor() & X86_VENDOR_AMD) && (x86_fam = get_cpu_family( d->arch.cpuid->basic.raw_fms, NULL, NULL)) >= 0x10 && x86_fam < 0x17 ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 82c55f49ae..5637ee15e7 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3073,8 +3073,7 @@ static bool __init has_if_pschange_mc(void) * IF_PSCHANGE_MC is only known to affect Intel Family 6 processors at * this time. */ - if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || - boot_cpu_data.x86 != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.x86 != 6 ) return false; switch ( boot_cpu_data.x86_model ) @@ -3431,7 +3430,7 @@ static void __init lbr_tsx_fixup_check(void) * fixed up as well. */ if ( cpu_has_hle || cpu_has_rtm || - boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.x86 != 6 ) return; @@ -3476,8 +3475,7 @@ static void __init ler_to_fixup_check(void) * that are not equal to bit[47]. Attempting to context switch this value * may cause a #GP. Software should sign extend the MSR. */ - if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || - boot_cpu_data.x86 != 6 ) + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.x86 != 6 ) return; switch ( boot_cpu_data.x86_model ) diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c index 5c7e21a751..c19d2fe7b4 100644 --- a/xen/arch/x86/i8259.c +++ b/xen/arch/x86/i8259.c @@ -419,9 +419,8 @@ void __init init_IRQ(void) * the interrupt. */ cpumask_copy(desc->arch.cpu_mask, - (boot_cpu_data.x86_vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all - : cpumask_of(cpu))); + ((cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) + ? &cpumask_all : cpumask_of(cpu))); desc->arch.vector = LEGACY_VECTOR(irq); } diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h index 21473f9bbc..cc3e9b504c 100644 --- a/xen/arch/x86/include/asm/guest_pt.h +++ b/xen/arch/x86/include/asm/guest_pt.h @@ -314,8 +314,7 @@ static always_inline bool guest_l4e_rsvd_bits(const struct vcpu *v, guest_l4e_t l4e) { return l4e.l4 & (guest_rsvd_bits(v) | GUEST_L4_PAGETABLE_RSVD | - ((v->domain->arch.cpuid->x86_vendor == X86_VENDOR_AMD) - ? _PAGE_GLOBAL : 0)); + ((cpu_vendor() & X86_VENDOR_AMD) ? _PAGE_GLOBAL : 0)); } #endif /* GUEST_PAGING_LEVELS >= 4 */ #endif /* GUEST_PAGING_LEVELS >= 3 */ diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index cc2934bfca..8e3706fb98 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -2011,8 +2011,7 @@ void do_IRQ(struct cpu_user_regs *regs) * interrupts have been delivered to CPUs * different than the BSP. */ - (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON))) && + cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && bogus_8259A_irq(vector - FIRST_LEGACY_VECTOR)) ) { printk("CPU%u: No irq handler for vector %02x (IRQ %d%s)\n", diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 27c63d1d97..26b17aab8f 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1406,8 +1406,7 @@ void asmlinkage __init noreturn __start_xen(void) * CPUs with this addressed enumerate CET-SSS to indicate that * supervisor shadow stacks are now safe to use. */ - bool cpu_has_bug_shstk_fracture = - boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + bool cpu_has_bug_shstk_fracture = (cpu_vendor() & X86_VENDOR_INTEL) && !boot_cpu_has(X86_FEATURE_CET_SSS); /* @@ -2038,10 +2037,10 @@ void asmlinkage __init noreturn __start_xen(void) /* Do not enable SMEP/SMAP in PV shim on AMD and Hygon by default */ if ( opt_smep == -1 ) - opt_smep = !pv_shim || !(boot_cpu_data.x86_vendor & + opt_smep = !pv_shim || !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)); if ( opt_smap == -1 ) - opt_smap = !pv_shim || !(boot_cpu_data.x86_vendor & + opt_smap = !pv_shim || !(cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)); if ( !opt_smep ) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:18:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: 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Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223624.1531094; Fri, 06 Feb 2026 16:21:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOag-0006AN-3o; Fri, 06 Feb 2026 16:21:54 +0000 Received: by outflank-mailman (input) for mailman id 1223624; Fri, 06 Feb 2026 16:21:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOaf-0006AB-4w for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 16:21:53 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id f1e6e323-0377-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 17:21:52 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 316EC339; Fri, 6 Feb 2026 08:21:45 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.55.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CBD193F632; Fri, 6 Feb 2026 08:21:49 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f1e6e323-0377-11f1-b161-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4] xen: Add Darwin.mk for GNU toolchains Date: Fri, 6 Feb 2026 17:21:44 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen does not provide a Darwin build configuration for selecting GNU tool definitions. On macOS, the tools we use are either GNU compatible or we only rely on features supported by Mac OS, so using the GNU tool definitions is appropriate. Add config/Darwin.mk to include StdGNU.mk and force XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow the cross-compile path as we depend on the Linux ABI so compiling on Mac OS is always a cross compilation case. An example of how to build the hypervisor for arm64 on Mac OS (tools cannot be build for now) using a toolchain from brew: - brew install aarch64-elf-gcc aarch64-elf-binutils - cd xen - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang Signed-off-by: Bertrand Marquis --- Changes since v3: - set XEN_COMPILE_ARCH to unknown instead of Darwin - list binutils as a dependency to install in brew in commit message Changes since v2: - Subject was "xen: Add macOS hypervisor build configuration" - Update Darwin.mk comments to more accurate versions (Jan) - Remove the build-on-macos help as we have no dependency on anything coming from brew anymore and the toolchain can be retrieved by lots of other solutions than brew on mac os. Switch to a simple doc in the commit message instead --- config/Darwin.mk | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 config/Darwin.mk diff --git a/config/Darwin.mk b/config/Darwin.mk new file mode 100644 index 000000000000..176b27eac676 --- /dev/null +++ b/config/Darwin.mk @@ -0,0 +1,7 @@ +# Use GNU tool definitions as the tools we are using are either GNU compatible +# or we only use features which are supported on Mac OS. +include $(XEN_ROOT)/config/StdGNU.mk + +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. +# Force COMPILE_ARCH to a fake value to make sure it is always the case. +XEN_COMPILE_ARCH = unknown -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:37:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:37:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223644.1531104 (Exim 4.92) (envelope-from ) id 1voOpE-0000At-By; Fri, 06 Feb 2026 16:36:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223644.1531104; Fri, 06 Feb 2026 16:36:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOpE-0000Am-9P; Fri, 06 Feb 2026 16:36:56 +0000 Received: by outflank-mailman (input) for mailman id 1223644; Fri, 06 Feb 2026 16:36:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voOpC-0000Ag-E5 for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 16:36:54 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0a7f5404-037a-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 17:36:52 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso21047305e9.0 for ; Fri, 06 Feb 2026 08:36:52 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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This mirrors the behavior of Arm and enables proper vCPU > wakeup handling on RISC-V. > > Remove the stub implementation from stubs.c, as it is now provided by > arch/riscv/domain.c. > > Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > --- > Changes in v2: > - Add Acked-by: Jan Beulich . > --- > xen/arch/riscv/domain.c | 14 ++++++++++++++ > xen/arch/riscv/stubs.c | 5 ----- > 2 files changed, 14 insertions(+), 5 deletions(-) > > diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c > index e38c0db62cac..13ac384c4b76 100644 > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -1,8 +1,10 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > #include > #include > #include > +#include > #include > > #include > @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) > # error "Update vsieh" > #endif > } > + > +void vcpu_kick(struct vcpu *v) > +{ > + bool running = v->is_running; > + > + vcpu_unblock(v); > + if ( running && v != current ) > + { > + perfc_incr(vcpu_kick); Because of this it is needed to introduce: PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have it in arch specific perfc_defn.h? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:51:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:51:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223660.1531114 (Exim 4.92) (envelope-from ) id 1voP30-0003lr-Gt; Fri, 06 Feb 2026 16:51:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223660.1531114; Fri, 06 Feb 2026 16:51:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voP30-0003lk-E1; Fri, 06 Feb 2026 16:51:10 +0000 Received: by outflank-mailman (input) for mailman id 1223660; Fri, 06 Feb 2026 16:51:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voP2y-0003lb-Cr for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pf0sRNTSFjUA0GAQSx2vTiAlDJrHzN+t+X6miI+pAzQeW8EWEU3DmHfu/sGbSC9um6l/Qhog5F7ltRETevKqSznedCtlY3KJxlZdHA9fsq8lTRr9R+uySBeLl4ftlMde3O4A+PfUkCJXiCls+YkNwVkNWVWZDEnjLNiszPa2v089Y2uw7YAxRdppvLGTTIwTkUtxZQ50tjpzlK0LzvRCI+Pf8p5tBfPki8axH8PfGcmF4WjHYa2/CZUBTr953PadLD/7ds8ORPPkouoNtrBOmQRzKKmuo79EhUeEtonlMkk2rALlxeeMZkdCUyhE3VUfGHCoUCbRheKFQgr93O/v/24qxrag1PZSEMRb6ztf7irm4xQuRfoCl88LXzyEcrswj3MMb6VyofIrLLUoJrJrZaiSOQr0dGwzHZ4w1Oxt84AF/hKKaVwt90MQJ5n2WmZ7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2026 16:50:58.0772 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a85afc23-718b-43b6-8557-08de659fe6e4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7675 On 2026-02-05 20:32, Stefano Stabellini wrote: > Add CONFIG_CPUFREQ to allow CPU frequency scaling support to be > disabled at build time. When disabled, this removes cpufreq code > from the build. > > Add stubs where necessary. > > Signed-off-by: Stefano Stabellini Reviewed-by: Jason Andryuk From xen-devel-bounces@lists.xenproject.org Fri Feb 06 16:58:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 16:58:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223670.1531123 (Exim 4.92) (envelope-from ) id 1voP9O-0004dn-6J; Fri, 06 Feb 2026 16:57:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223670.1531123; Fri, 06 Feb 2026 16:57:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voP9O-0004dg-3k; Fri, 06 Feb 2026 16:57:46 +0000 Received: by outflank-mailman (input) for mailman id 1223670; Fri, 06 Feb 2026 16:57:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voP9N-0004da-E0 for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="RiDRDFZVGyD/fnDn" Content-Disposition: inline In-Reply-To: --RiDRDFZVGyD/fnDn Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 6 Feb 2026 17:57:37 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= Cc: linux-kernel@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Peng Jiang , Qiu-ji Chen , Jason Andryuk , "moderated list:XEN HYPERVISOR INTERFACE" Subject: Re: [PATCH] xen/xenbus: better handle backend crash On Thu, Jan 29, 2026 at 08:02:35AM +0100, J=C3=BCrgen Gro=C3=9F wrote: > On 26.01.26 08:08, J=C3=BCrgen Gro=C3=9F wrote: > > On 17.11.25 12:06, J=C3=BCrgen Gro=C3=9F wrote: > > > On 02.11.25 04:20, Marek Marczykowski-G=C3=B3recki wrote: > > > > When the backend domain crashes, coordinated device cleanup is not > > > > possible (as it involves waiting for the backend state change). In = that > > > > case, toolstack forcefully removes frontend xenstore entries. > > > > xenbus_dev_changed() handles this case, and triggers device cleanup. > > > > It's possible that toolstack manages to connect new device in that > > > > place, before xenbus_dev_changed() notices the old one is missing. = If > > > > that happens, new one won't be probed and will forever remain in > > > > XenbusStateInitialising. > > > >=20 > > > > Fix this by checking backend-id and if it changes, consider it > > > > unplug+plug operation. It's important that cleanup on such unplug > > > > doesn't modify xenstore entries (especially the "state" key) as it > > > > belong to the new device to be probed - changing it would derail > > > > establishing connection to the new backend (most likely, closing the > > > > device before it was even connected). Handle this case by setting n= ew > > > > xenbus_device->vanished flag to true, and check it before changing = state > > > > entry. > > > >=20 > > > > And even if xenbus_dev_changed() correctly detects the device was > > > > forcefully removed, the cleanup handling is still racy. Since this = whole > > > > handling doesn't happend in a single xenstore transaction, it's pos= sible > > > > that toolstack might put a new device there already. Avoid re-creat= ing > > > > the state key (which in the case of loosing the race would actually > > > > close newly attached device). > > > >=20 > > > > The problem does not apply to frontend domain crash, as this case > > > > involves coordinated cleanup. > > > >=20 > > > > Problem originally reported at > > > > https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#t, > > > > including reproduction steps. > > > >=20 > > > > Signed-off-by: Marek Marczykowski-G=C3=B3recki > > >=20 > > > Sorry I didn't get earlier to this. > > >=20 > > > My main problem with this patch is that it is basically just papering= over > > > a more general problem. > > >=20 > > > You are just making the problem much more improbable, but not impossi= ble to > > > occur again. In case the new driver domain has the same domid as the = old one > > > you can still have the same race. > > >=20 > > > The clean way to handle that would be to add a unique Id in Xenstore = to each > > > device on the backend side, which can be tested on the frontend side = to > > > match. In case it doesn't match, an old device with the same kind and= devid > > > can be cleaned up. > > >=20 > > > The unique Id would obviously need to be set by the Xen tools inside = the > > > transaction writing the initial backend Xenstore nodes, as doing that= from > > > the backend would add another potential ambiguity by the driver domain > > > choosing the same unique id as the previous one did. > > >=20 > > > The question is whether something like your patch should be used as a > > > fallback in case there is no unique Id on the backend side of the dev= ice > > > due to a too old Xen version. > >=20 > > I think I have found a solution which is much more simple, as it doesn't > > need any change of the protocol or any addition of new identifiers. > >=20 > > When creating a new PV device, Xen tools will always write all generic > > frontend- and backend-nodes. This includes the frontend state, which is > > initialized as XenbusStateInitialising. > >=20 > > The Linux kernel's xenbus driver is already storing the last known state > > of a xenbus device in struct xenbus_device. When changing the state, the > > xenbus driver is even reading the state from Xenstore (even if only for > > making sure the path is still existing). So all what is needed is to ch= eck, > > whether the read current state is matching the locally saved state. If = it > > is not matching AND the read state is XenbusStateInitialising, you can = be > > sure that the backend has been replaced. > >=20 > > Handling this will need to check the return value of xenbus_switch_stat= e() > > in all related drivers, but this is just a more or less mechanical chan= ge. > >=20 > > I'll prepare a patch series for that. >=20 > In the end the result is more like your patch, avoiding the need to modify > all drivers. >=20 > I just added my idea to your patch and modified some of your code to be m= ore > simple. I _think_ I have covered all possible scenarios now, resulting in > the need to keep the backend id check in case the backend died during the > early init phase of the device. >=20 > Could you please verify the attached patch is working for you? Thanks for the patch! I ran it through relevant tests, and I got inconsistent results. Specifically, sometimes, the domU hangs (actually, just one vCPU spins inside xenwatch thread). Last console messages are: systemd[626]: Starting dconf.service - User preferences database... gnome-keyring-daemon[975]: =E2=90=9B[0;1;39mcouldn't access control soc= ket: /run/user/1000/keyring/control: No such file or directory=E2=90=9B[0m gnome-keyring-daemon[975]: =E2=90=9B[0;1;38:5:185mdiscover_other_daemon= : 0=E2=90=9B[0m xen vif-0: xenbus: state reset occurred, reconnecting gnome-keyring-daemon[974]: =E2=90=9B[0;1;39mcouldn't access control soc= ket: /run/user/1000/keyring/control: No such file or directory=E2=90=9B[0m gnome-keyring-daemon[976]: =E2=90=9B[0;1;39mcouldn't access control soc= ket: /run/user/1000/keyring/control: No such file or directory=E2=90=9B[0m gnome-keyring-daemon[976]: =E2=90=9B[0;1;38:5:185mdiscover_other_daemon= : 0=E2=90=9B[0m gnome-keyring-daemon[974]: =E2=90=9B[0;1;38:5:185mdiscover_other_daemon= : 0=E2=90=9B[0m xen vif-0: xenbus: state reset occurred, reconnecting systemd[626]: Started dconf.service - User preferences database. xen_netfront: Initialising Xen virtual ethernet driver vif vif-0: xenbus: state reset occurred, reconnecting And the call trace of the spinning xenwatch thread is: task:xenwatch state:D stack:0 pid:64 tgid:64 ppid:2 = task_flags:0x288040 flags:0x00080000 Call Trace: __schedule+0x2f3/0x780 schedule+0x27/0x80 xs_wait_for_reply+0xab/0x1f0 ? __pfx_autoremove_wake_function+0x10/0x10 xs_talkv+0xec/0x200 xs_single+0x4a/0x70 xenbus_gather+0xe4/0x1a0 xenbus_read_driver_state+0x42/0x70 xennet_bus_close+0x113/0x2c0 [xen_netfront] ? __pfx_autoremove_wake_function+0x10/0x10 xennet_remove+0x16/0x80 [xen_netfront] xenbus_dev_remove+0x71/0xf0 device_release_driver_internal+0x19c/0x200 bus_remove_device+0xc6/0x130 device_del+0x160/0x3e0 device_unregister+0x17/0x60 xenbus_dev_changed.cold+0x5e/0x6b ? __pfx_xenwatch_thread+0x10/0x10 xenwatch_thread+0x92/0x1c0 ? __pfx_autoremove_wake_function+0x10/0x10 kthread+0xfc/0x240 ? __pfx_kthread+0x10/0x10 ret_from_fork+0xf5/0x110 ? __pfx_kthread+0x10/0x10 ret_from_fork_asm+0x1a/0x30 task:xenbus state:S stack:0 pid:63 tgid:63 ppid:2 = task_flags:0x208040 flags:0x00080000 Call Trace: __schedule+0x2f3/0x780 ? __pfx_xenbus_thread+0x10/0x10 schedule+0x27/0x80 xenbus_thread+0x1a8/0x200 ? __pfx_autoremove_wake_function+0x10/0x10 kthread+0xfc/0x240 ? __pfx_kthread+0x10/0x10 ret_from_fork+0xf5/0x110 ? __pfx_kthread+0x10/0x10 ret_from_fork_asm+0x1a/0x30 (technically, `top` says it's the xenbus thread spinning, but it looks like the actual issue is in xenwatch one) Note that other xenwatch actions in this domU are not executed, for example `xl sysrq` does nothing. Not surprising, given xenwatch thread is busy... Fortunately, it blocks only a single vCPU, so I'm able to interact with the domU over console (to get the above traces). It isn't a reliable failure, in this test run it failed once, out of 4 related tests. The specific test is: https://github.com/QubesOS/qubes-core-admin/blob/main= /qubes/tests/integ/network.py#L234 In short: 1. Start a domU 2. Pause it 3. Attach network (backend is !=3D dom0) 4. Unpause TBH, I'm not sure why the "state reset occurred" message is triggered at all, I think it shouldn't be in this case... --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --RiDRDFZVGyD/fnDn Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmGHYEACgkQ24/THMrX 1yzAmQf+NRGy8QTLgD4KZEUEwmKcOoJt0GuZ7D6tvKQSWciyTrBlUf68vuVPyZLq JIq18vc7BjqyecbfsOxID/vULrP0Gk6s4dQzC4vjZo3Cq3eNkTNgrJsNqVOU/dQV vweIA/Xochl8VdUB4q1gpKBvuwzXFjbOZ3Ec4R3ynnBdJBHNGI1IYJ7UMdftNi6Y lPqKfyKL8E0s8f814lfGemyS1y27K5iYqq5TdqoOtZvy4Qa1/3KXe61QYwgwjmZ7 VpvGKIxSHB1hh8KK1jI7RQTLhpZHC3qWhvd3SXKFfopMt2b+XROe1ZX1UmmYWsGY kB28LvL2H2Wg0NtuT/5uC+j6RwdFtA== =Jub0 -----END PGP SIGNATURE----- --RiDRDFZVGyD/fnDn-- From xen-devel-bounces@lists.xenproject.org Fri Feb 06 17:25:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 17:25:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223692.1531141 (Exim 4.92) (envelope-from ) id 1voPaL-0000p8-Fv; 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On macOS, the tools we use are either GNU > compatible or we only rely on features supported by Mac OS, so > using the GNU tool definitions is appropriate. > > Add config/Darwin.mk to include StdGNU.mk and force > XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow > the cross-compile path as we depend on the Linux ABI so compiling > on Mac OS is always a cross compilation case. > > An example of how to build the hypervisor for arm64 on Mac OS > (tools cannot be build for now) using a toolchain from brew: > - brew install aarch64-elf-gcc aarch64-elf-binutils > - cd xen > - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang Instead of `cd xen` I would use `make xen ...`. > > Signed-off-by: Bertrand Marquis Acked-by: Roger Pau Monné One comment below. > --- > Changes since v3: > - set XEN_COMPILE_ARCH to unknown instead of Darwin > - list binutils as a dependency to install in brew in commit message > > Changes since v2: > - Subject was "xen: Add macOS hypervisor build configuration" > - Update Darwin.mk comments to more accurate versions (Jan) > - Remove the build-on-macos help as we have no dependency on anything > coming from brew anymore and the toolchain can be retrieved by lots of > other solutions than brew on mac os. Switch to a simple doc in the > commit message instead > --- > config/Darwin.mk | 7 +++++++ > 1 file changed, 7 insertions(+) > create mode 100644 config/Darwin.mk > > diff --git a/config/Darwin.mk b/config/Darwin.mk > new file mode 100644 > index 000000000000..176b27eac676 > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,7 @@ > +# Use GNU tool definitions as the tools we are using are either GNU compatible > +# or we only use features which are supported on Mac OS. > +include $(XEN_ROOT)/config/StdGNU.mk > + > +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. Hm, is this actually fully true? What's the Linux ABI exactly here? FreeBSD builds Xen natively, and it's not using the Linux ABI. FreeBSD uses no specific -target to the compiler invocations, and the linker emulation is set to elf_x86_64_fbsd. I think the point here is that the toolchain must support building ELF objects / images, because that's the binary format supported by Xen. Whether it's Linux ELF or FreeBSD ELF doesn't make a difference for standalone environments like the Xen kernel. Thanks, Roger. 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When disabled, this removes cpufreq code > from the build. > > Add stubs where necessary. > > Signed-off-by: Stefano Stabellini Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Fri Feb 06 18:31:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 18:31:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223764.1531164 (Exim 4.92) (envelope-from ) id 1voQbr-0001eH-7V; Fri, 06 Feb 2026 18:31:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223764.1531164; Fri, 06 Feb 2026 18:31:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQbr-0001eA-4S; Fri, 06 Feb 2026 18:31:15 +0000 Received: by outflank-mailman (input) for mailman id 1223764; Fri, 06 Feb 2026 18:31:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQbq-0001e4-2y for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 18:31:14 +0000 Received: from SA9PR02CU001.outbound.protection.outlook.com (mail-southcentralusazlp170130001.outbound.protection.outlook.com [2a01:111:f403:c10c::1]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 00946907-038a-11f1-9ccf-f158ae23cfc8; Fri, 06 Feb 2026 19:31:08 +0100 (CET) Received: from CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) by PH0PR03MB6678.namprd03.prod.outlook.com (2603:10b6:510:b3::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.13; Fri, 6 Feb 2026 18:31:04 +0000 Received: from CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343]) by CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343%4]) with mapi id 15.20.9587.013; Fri, 6 Feb 2026 18:31:04 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 00946907-038a-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=S0ZUQZwStRCM7t78/44ASC442OIW3uCYcHZtDJaORgqzNmynoQ5Yv+/l8La/cZJo58jygiL45W2eJu+3CigJy9wtyrtPCbARJLO8ZjpoWwW6af+jXbVrB9dlz0wsuWs60gZu/d06mk7/xXhe6nv/ZAhPXbc98Z+VjJE5xBpwRwTFNq7Ze5emeQN2oQ/vrCAWSddi9EinYhkEbKpskcRM7JRYiTbaXHh7cG95uADmAl978ewCnCcM+ZLLkYYt2DT9jIjBDJD5aUqQMxYYybwe4FORNSAdS0zfs+KDTuByH3aZASlQBtzdSMchCAhWrJ7D6vfb4KHmtRg1Og21xzsXzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PU9mKuGzTDeoc44ezZO8dk6jHbXJ98spQcPpWZLAc04=; b=RMRafY8rA/lvMcaDjtqkT51BdoZSwXYeZuyLrMw+OFUcFlB1U9Y7I6IH8yribWjt3YNY4/Cq1biN3ohKbV43TzoXHz4sjd76wagEP6DK5aLOxbxnSLGjVxltv53pzN1Ces4LtrJ9b7MflRgjX9/z2xXko4o5L4dSAWyn6zV4MU3ep8y2yvv0NI63Q+RknBMLjRoOOeBhhbsCXVZg1SdYIsrrFeJ6ioUkuMhXxHyNCkn7JVfWRZZJP44aOyQFnkM2KiOncgeAm1ocPtNNXY5vTNJ5TBllqFlvM2ujjXEOYpKje4/Cjf+nkipSjbGbSs7FK87N55h1z+zFKY3QKpAF6g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PU9mKuGzTDeoc44ezZO8dk6jHbXJ98spQcPpWZLAc04=; b=uGJpGwAq+1735ITUiSaLLxIRYx3gxR4y68iPJJPUNrZYgiwf5eSe/AvFcGyIoXjkfsh/fX+0sc7l50/5W12oKiJiATvybK/s5FpNN5ej86MboLvkzX0OFbYoniiYhUiFGSotv6xfGEGAAJ63wkJMgXHOGWPyVK53/brGQXwWC5E= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Andrew Cooper , "Daniel P. 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Fix this by returning -EOPNOTSUPP instead. Fixes: d046f361dc93 ("Xen Security Modules: XSM") Reported-by: Andrew Cooper Signed-off-by: Roger Pau Monné --- Arguably the error code for unsupported kexec hypercalls was already wonky before the XSM addiiton, as it would return -EINVAL. It's however way worse after the XSM addition, as it returns 0. --- xen/common/kexec.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/common/kexec.c b/xen/common/kexec.c index 84fe8c35976e..8f52c5506d4a 100644 --- a/xen/common/kexec.c +++ b/xen/common/kexec.c @@ -1217,9 +1217,8 @@ static int do_kexec_op_internal(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) uarg, bool compat) { - int ret = -EINVAL; + int ret = xsm_kexec(XSM_PRIV); - ret = xsm_kexec(XSM_PRIV); if ( ret ) return ret; @@ -1258,6 +1257,10 @@ static int do_kexec_op_internal(unsigned long op, case KEXEC_CMD_kexec_status: ret = kexec_status(uarg); break; + + default: + ret = -EOPNOTSUPP; + break; } clear_bit(KEXEC_FLAG_IN_HYPERCALL, &kexec_flags); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 18:35:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 18:35:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223776.1531174 (Exim 4.92) (envelope-from ) id 1voQgA-0002KZ-R8; Fri, 06 Feb 2026 18:35:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223776.1531174; Fri, 06 Feb 2026 18:35:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQgA-0002KS-ON; Fri, 06 Feb 2026 18:35:42 +0000 Received: by outflank-mailman (input) for mailman id 1223776; Fri, 06 Feb 2026 18:35:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQg9-0002KM-Mu for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 18:35:41 +0000 Received: from BYAPR05CU005.outbound.protection.outlook.com (mail-westusazlp170100001.outbound.protection.outlook.com [2a01:111:f403:c000::1]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a299ccd3-038a-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 19:35:40 +0100 (CET) Received: from CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) by PH8PR03MB7307.namprd03.prod.outlook.com (2603:10b6:510:253::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.15; Fri, 6 Feb 2026 18:35:36 +0000 Received: from CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37]) by CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37%6]) with mapi id 15.20.9564.016; Fri, 6 Feb 2026 18:35:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a299ccd3-038a-11f1-b161-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=c6g6XfyxkWrsqVAYrwI0ApQGL1U2OX1QTOZQSKdnZgf3XWpWpqlxtTGkUfNr0wHdz+oKA6AtGS39I/aUBgek5toQMVNYTQqzfZUy2F6KMUCMHDXRPZwBLZzRH95hzl5hnt57ngfERvvA9tKUAXNBADzOUeZ7OSxHJRuhAApYZJZjtrs79f4r3g9gDa2hAURKoaufZC6G4hY2875yDqYMMdXDYroWr96RezZhLNGWtR1QYzjgt7xwzx3kSAdJ+eZbrKa0J45SNJj1FpSEX2PyIMV+lwlgl7HEpUlW6qPmkrrZPZ89rgfoyFHi5q3Xr22ElyI+6aW2fPqpcFrgnuGETQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vEYlH1SHa7WJYszZwkbqaLMCrD31e4e2YYLmFr7tt48=; b=GK789rFxV+OtFASdi4EK+F7jx05/XAakbH3hgT4mJUuwQzU0+VYZMXjkr3Jd1EZmM74JUk4c0A8jgaKzLIbQTqQbH3nVm5+VH1o1wCcDoC/SclyqiQJGYZOs7PFQVfhY65/3eNpe2ZIAAmVV07Ye9KvEeBMDwi6wC2NJTVSQbBMWPHjiNfBOZp5jfzLXzZoYT2/K8IDFROrX+QjOpmSTbZnPczeIjOw8aQbrJyXRyZDBkgdmR6MhTsb06bqE59jMQmpc0wzywY12N3+ocwxTnm1eZiOachdw/X9vrFygrvZ1hAb322hKSadlaV4Q5qdshRADwXq3ReP5rqj4rLV4pw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vEYlH1SHa7WJYszZwkbqaLMCrD31e4e2YYLmFr7tt48=; b=jJsW4nNAxnm806k40VVE9N6Y+JtzbjvA2G+3vS1fwRzaSgu2XSof2LwzPrsApWakF2ISG+RU98Jt62VJ5oQ8mfrFSM8Qg9uU9kC+xPfvhPMsqRdLFULwEwFSxyGEBllQn5O/o/fSnFhiidefIPMOHA4r9NYjdwGLrqtUFeMmUZM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: Date: Fri, 6 Feb 2026 18:35:32 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , "Daniel P. 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Fix > this by returning -EOPNOTSUPP instead. > > Fixes: d046f361dc93 ("Xen Security Modules: XSM") > Reported-by: Andrew Cooper > Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper > --- > Arguably the error code for unsupported kexec hypercalls was already wonky > before the XSM addiiton, as it would return -EINVAL. It's however way > worse after the XSM addition, as it returns 0. > --- > xen/common/kexec.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/xen/common/kexec.c b/xen/common/kexec.c > index 84fe8c35976e..8f52c5506d4a 100644 > --- a/xen/common/kexec.c > +++ b/xen/common/kexec.c > @@ -1217,9 +1217,8 @@ static int do_kexec_op_internal(unsigned long op, > XEN_GUEST_HANDLE_PARAM(void) uarg, > bool compat) > { > - int ret = -EINVAL; > + int ret = xsm_kexec(XSM_PRIV); > > - ret = xsm_kexec(XSM_PRIV); > if ( ret ) > return ret; Personally, I'd just have `int ret;` and leave the xsm_kexec() call as it was.  That leaves the slightly more normal pattern intact. > > @@ -1258,6 +1257,10 @@ static int do_kexec_op_internal(unsigned long op, > case KEXEC_CMD_kexec_status: > ret = kexec_status(uarg); > break; > + > + default: > + ret = -EOPNOTSUPP; > + break; > } > > clear_bit(KEXEC_FLAG_IN_HYPERCALL, &kexec_flags); From xen-devel-bounces@lists.xenproject.org Fri Feb 06 18:40:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 18:40:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223787.1531184 (Exim 4.92) (envelope-from ) id 1voQkW-0003yj-BZ; Fri, 06 Feb 2026 18:40:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223787.1531184; Fri, 06 Feb 2026 18:40:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQkW-0003yc-8W; Fri, 06 Feb 2026 18:40:12 +0000 Received: by outflank-mailman (input) for mailman id 1223787; Fri, 06 Feb 2026 18:40:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voQkU-0003yW-TB for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 18:40:10 +0000 Received: from BL0PR03CU003.outbound.protection.outlook.com (mail-eastusazlp170120007.outbound.protection.outlook.com [2a01:111:f403:c101::7]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 42cedb65-038b-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 19:40:09 +0100 (CET) Received: from CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) by SJ0PR03MB5454.namprd03.prod.outlook.com (2603:10b6:a03:284::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.15; Fri, 6 Feb 2026 18:39:53 +0000 Received: from CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343]) by CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343%4]) with mapi id 15.20.9587.013; Fri, 6 Feb 2026 18:39:53 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 42cedb65-038b-11f1-b161-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=qhmMGxBKeuYUrQtD5jXTWrhTOfqkyZ75VKSEYlHupi8sDtUy07tMQpN0DAYykPgqXBaqtqU5k/Ebb7jc6UcFmpVQFg+y/XjQu2OKFFra4aNMRdNLZpJlXiwzwBXPYzPcwBHKP2kf3C7/uM+11zFxyeeiYRsrV5L1HvE+G7TJZtmzeNvK3KroZ6QbnRtwYpfqulibDuCI73Hj2C32U07vNaFneKuxRhGpSZ4pYURgJ6RGz0Uv8LdFyrjyn7MWqIwci73uyOdacxPYfrqaSo4bXtogY3q33ZpvWTI6KpqiAM9Ug/kGqODpfH/cFc4Y0sxhei7zd2Nzqt5xgZYq7KpmcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=syBf/RLorpv/i9yzElRI4iOU5fZxH4MOYfIBjXEPObA=; b=oEJNWtgSxQJHxOJoYovtq44L3eJTpQL3kANvmmsSrNGUp0C27cZET/d1yIgAATVP0fbRqtOAcW/aC1uMFZRx0W8YJ1g00+rJp/WOsiKXvN9e5/LAAprnXyfeSN93bpZc2BZkei9/WHPkd+ErB7HG3FIMIYZHdHkWB8agMfYlUyIiBEXY0KqEN02Bb/IXjuL15V72R5tCwHot25VQtzWQXeoFnqzJFD6sCgObU4Qzpx6z1gcIgr11I6XuO04YBjpJfiUs8J89/sogSItDHkdZktWf0YQT8+YSnTV9nDQNPF8yXc2o7AvLbj+S9eqgBeQEAayDTFQtN3LnnQHJYf3i7g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=syBf/RLorpv/i9yzElRI4iOU5fZxH4MOYfIBjXEPObA=; b=PPldD3CIECFuOzbHeZNucVXdaQWTqHoNNQoAJG6ruGcIL+duJPHCCjpStSKup1HkT6GI5+k/heRfVPMYRfmwu1l/XuiL4Hp3RXdL27DZZ2y56FSRa8tmJwHOmFR/D6KOZOp9+D0gtvxCv2dBqzIhQRYx4ptQxRzVNaADXMXlfjw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Fri, 6 Feb 2026 19:39:50 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, "Daniel P. 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Fix > > this by returning -EOPNOTSUPP instead. > > > > Fixes: d046f361dc93 ("Xen Security Modules: XSM") > > Reported-by: Andrew Cooper > > Signed-off-by: Roger Pau Monné > > Reviewed-by: Andrew Cooper > > > --- > > Arguably the error code for unsupported kexec hypercalls was already wonky > > before the XSM addiiton, as it would return -EINVAL. It's however way > > worse after the XSM addition, as it returns 0. > > --- > > xen/common/kexec.c | 7 +++++-- > > 1 file changed, 5 insertions(+), 2 deletions(-) > > > > diff --git a/xen/common/kexec.c b/xen/common/kexec.c > > index 84fe8c35976e..8f52c5506d4a 100644 > > --- a/xen/common/kexec.c > > +++ b/xen/common/kexec.c > > @@ -1217,9 +1217,8 @@ static int do_kexec_op_internal(unsigned long op, > > XEN_GUEST_HANDLE_PARAM(void) uarg, > > bool compat) > > { > > - int ret = -EINVAL; > > + int ret = xsm_kexec(XSM_PRIV); > > > > - ret = xsm_kexec(XSM_PRIV); > > if ( ret ) > > return ret; > > Personally, I'd just have `int ret;` and leave the xsm_kexec() call as > it was.  That leaves the slightly more normal pattern intact. I'm fine with that as it also drops the dead -EINVAL initialization. Thanks, Roger. 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Drop `const` and add `__read_mostly` for both global parameters printk_ratelimit_{ms,burst}. Update command line documentation. Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- docs/misc/xen-command-line.pandoc | 27 +++++++++++++++++++++++++++ xen/drivers/char/console.c | 22 ++++++++++++++-------- 2 files changed, 41 insertions(+), 8 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index c1f2def9f99c..5505644d1c0f 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2077,6 +2077,33 @@ compression is selected at build time from Kconfig. This is a mask of C-states which are to be used preferably. This option is applicable only on hardware were certain C-states are exclusive of one another. +### printk_ratelimit_ms +> `= ` + +> Default: `CONFIG_PRINTK_RATELIMIT_MS` + +Specifies the time window, in milliseconds, for rate-limited printk messages. +No more than `CONFIG_PRINTK_RATELIMIT_BURST` messages will be printed within +this window. + +Setting this value to 0 disables rate-limiting entirely. + +Rate-limited messages are those controlled by the `loglvl` and `guest_loglvl` +command-line parameters. + +### printk_ratelimit_burst +> `= ` + +> Default: `CONFIG_PRINTK_RATELIMIT_BURST` + +Defines the maximum number of rate-limited printk messages that may be printed +within each `CONFIG_PRINTK_RATELIMIT_MS` time window. + +Setting this value to 0 disables rate-limiting entirely. + +Rate-limited messages are those controlled by the `loglvl` and `guest_loglvl` +command-line parameters. + ### probe-port-aliases (x86) > `= ` diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index ec87ecb3e5a0..f607e8f84d7a 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -344,6 +344,20 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) do_adj_thresh(key); } +/* + * Global rate-limiting controls for printk(). + */ + +/* Minimum time in ms between messages */ +static unsigned int __read_mostly printk_ratelimit_ms = + CONFIG_PRINTK_RATELIMIT_MS; +integer_param("printk_ratelimit_ms", printk_ratelimit_ms); + +/* Number of messages we send before ratelimiting */ +static unsigned int __read_mostly printk_ratelimit_burst = + CONFIG_PRINTK_RATELIMIT_BURST; +integer_param("printk_ratelimit_burst", printk_ratelimit_burst); + /* * ******************************************************** * *************** ACCESS TO CONSOLE RING ***************** @@ -1320,14 +1334,6 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, return false; } -/* Minimum time in ms between messages */ -static const unsigned int printk_ratelimit_ms = - CONFIG_PRINTK_RATELIMIT_MS; - -/* Number of messages we send before ratelimiting */ -static const unsigned int printk_ratelimit_burst = - CONFIG_PRINTK_RATELIMIT_BURST; - bool printk_ratelimit(void) { return do_printk_ratelimit(printk_ratelimit_ms, printk_ratelimit_burst); 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Make that pronounced by updating the return value to boolean. Not a functional change. Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/drivers/char/console.c | 10 +++++----- xen/include/xen/lib.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index af9ed38da553..c4c92e3efa39 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -1273,8 +1273,8 @@ void console_end_sync(void) * This enforces a rate limit: not more than one kernel message * every printk_ratelimit_ms (millisecs). */ -static int do_printk_ratelimit(unsigned int ratelimit_ms, - unsigned int ratelimit_burst) +static bool do_printk_ratelimit(unsigned int ratelimit_ms, + unsigned int ratelimit_burst) { static DEFINE_SPINLOCK(ratelimit_lock); static unsigned long toks = 10 * 5 * 1000; @@ -1313,11 +1313,11 @@ static int do_printk_ratelimit(unsigned int ratelimit_ms, rspin_unlock(&console_lock); } local_irq_restore(flags); - return 1; + return true; } missed++; spin_unlock_irqrestore(&ratelimit_lock, flags); - return 0; + return false; } /* Minimum time in ms between messages */ @@ -1326,7 +1326,7 @@ static const unsigned int printk_ratelimit_ms = 5 * 1000; /* Number of messages we send before ratelimiting */ static const unsigned int printk_ratelimit_burst = 10; -int printk_ratelimit(void) +bool printk_ratelimit(void) { return do_printk_ratelimit(printk_ratelimit_ms, printk_ratelimit_burst); } diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index f516215ca8e4..e39fa9200c82 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -82,7 +82,7 @@ extern void guest_printk(const struct domain *d, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); extern void noreturn panic(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); -extern int printk_ratelimit(void); +extern bool printk_ratelimit(void); #define gprintk(lvl, fmt, args...) \ printk(XENLOG_GUEST lvl "%pv " fmt, current, ## args) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 20:24:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 20:24:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223851.1531223 (Exim 4.92) (envelope-from ) id 1voSNl-0008B3-9A; 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Ensure rate limiter is disabled if either printk_ratelimit_ms or printk_ratelimit_burst is 0. Make sure no unnecessary initialization is done in the corner case. Also, simplify the limiter code by using min(). Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/drivers/char/console.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index f607e8f84d7a..e3962512d282 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -1291,21 +1291,27 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, unsigned int ratelimit_burst) { static DEFINE_SPINLOCK(ratelimit_lock); - static unsigned long toks = 10 * 5 * 1000; + static unsigned long toks; static unsigned long last_msg; static unsigned int missed; unsigned long flags; - unsigned long long now = NOW(); /* ns */ + unsigned long long now; unsigned long ms; + if ( !printk_ratelimit_burst || !printk_ratelimit_burst ) + return true; + + if ( !toks ) + toks = printk_ratelimit_burst * printk_ratelimit_ms; + + now = NOW(); /* ns */ do_div(now, 1000000); ms = (unsigned long)now; spin_lock_irqsave(&ratelimit_lock, flags); toks += ms - last_msg; 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Use symbols for global rate-limiting initialization in the console driver. Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/drivers/char/Kconfig | 25 +++++++++++++++++++++++++ xen/drivers/char/console.c | 6 ++++-- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig index 8e49a52c735b..98b117762a0c 100644 --- a/xen/drivers/char/Kconfig +++ b/xen/drivers/char/Kconfig @@ -103,3 +103,28 @@ config XHCI Enabling this option makes Xen use extra ~230KiB memory, even if XHCI UART is not selected. If you have an x86 based system with USB3, say Y. + +config PRINTK_RATELIMIT_MS + int "printk rate-limiting time window (milliseconds)" + default 5000 + help + Specifies the time window, in milliseconds, for rate-limited printk + messages. No more than `CONFIG_PRINTK_RATELIMIT_BURST` messages will be + printed within this window. + + Setting this value to 0 disables rate-limiting entirely. + + Rate-limited messages are those controlled by the `loglvl` and + `guest_loglvl` command-line parameters. + +config PRINTK_RATELIMIT_BURST + int "printk rate-limited message burst size" + default 10 + help + Defines the maximum number of rate-limited printk messages that may be + printed within each `CONFIG_PRINTK_RATELIMIT_MS` time window. + + Setting this value to 0 disables rate-limiting entirely. + + Rate-limited messages are those controlled by the `loglvl` and + `guest_loglvl` command-line parameters. diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index c4c92e3efa39..ec87ecb3e5a0 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -1321,10 +1321,12 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, } /* Minimum time in ms between messages */ -static const unsigned int printk_ratelimit_ms = 5 * 1000; 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Remove the declaration from lib.h header and make the function local to console driver. While doing it, drop double underscores to satisfy MISRA; rename function to do_printk_ratelimit(). Not a functional change. Signed-off-by: Denis Mukhin --- Changes since v1: - made __printk_ratelimit() static to console driver --- xen/drivers/char/console.c | 7 ++++--- xen/include/xen/lib.h | 2 -- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 2bdb4d5fb417..af9ed38da553 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -981,7 +981,7 @@ vprintk_common(const char *fmt, va_list args, const char *prefix) char *p, *q; unsigned long flags; - /* console_lock can be acquired recursively from __printk_ratelimit(). */ + /* console_lock can be acquired recursively from do_printk_ratelimit(). */ local_irq_save(flags); rspin_lock(&console_lock); state = &this_cpu(state); @@ -1273,7 +1273,8 @@ void console_end_sync(void) * This enforces a rate limit: not more than one kernel message * every printk_ratelimit_ms (millisecs). */ -int __printk_ratelimit(unsigned int ratelimit_ms, unsigned int ratelimit_burst) +static int do_printk_ratelimit(unsigned int ratelimit_ms, + unsigned int ratelimit_burst) { static DEFINE_SPINLOCK(ratelimit_lock); static unsigned long toks = 10 * 5 * 1000; @@ -1327,7 +1328,7 @@ static const unsigned int printk_ratelimit_burst = 10; int printk_ratelimit(void) { - return __printk_ratelimit(printk_ratelimit_ms, printk_ratelimit_burst); + return do_printk_ratelimit(printk_ratelimit_ms, printk_ratelimit_burst); } /* diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index bb0fd446b484..f516215ca8e4 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -82,8 +82,6 @@ extern void guest_printk(const struct domain *d, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); extern void noreturn panic(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); -extern int __printk_ratelimit(unsigned int ratelimit_ms, - unsigned int ratelimit_burst); extern int printk_ratelimit(void); #define gprintk(lvl, fmt, args...) \ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 20:24:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 20:24:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223852.1531244 (Exim 4.92) (envelope-from ) id 1voSNm-0000K6-Pn; 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Patches 1-2, 6-7 are tiny cleanups. Patch 3 introduces build-time rate-limiting controls. Patch 4 introduces run-time rate-limiting controls. Patch 5 is a fixup for the rate-limiter to adjust to new user-defined rate-limiting parameters. [1] Link to v1: https://lore.kernel.org/xen-devel/20250725212235.753363-1-dmukhin@ford.com/ [2] CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2311064179 Denis Mukhin (7): xen/console: remove __printk_ratelimit() from lib.h xen/console: use bool as return value from printk_ratelimit() xen/console: add build-time rate-limiting controls xen/console: add run-time rate-limiting controls xen/console: correct leaky-bucket rate limiter xen/console: use s_time_t for time accounting in do_printk_ratelimit() xen/console: simplify printouts in do_printk_ratelimit() docs/misc/xen-command-line.pandoc | 27 ++++++++++++++ xen/drivers/char/Kconfig | 25 +++++++++++++ xen/drivers/char/console.c | 62 ++++++++++++++++++------------- xen/include/xen/lib.h | 4 +- 4 files changed, 90 insertions(+), 28 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 20:24:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 20:24:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223854.1531263 (Exim 4.92) (envelope-from ) id 1voSNs-0000vR-Ir; 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Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/drivers/char/console.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index e3962512d282..536b883d5dcf 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -1291,12 +1291,10 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, unsigned int ratelimit_burst) { static DEFINE_SPINLOCK(ratelimit_lock); - static unsigned long toks; - static unsigned long last_msg; + static s_time_t toks, last_msg; + s_time_t now, ms; static unsigned int missed; unsigned long flags; - unsigned long long now; - unsigned long ms; if ( !printk_ratelimit_burst || !printk_ratelimit_burst ) return true; @@ -1305,13 +1303,12 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, toks = printk_ratelimit_burst * printk_ratelimit_ms; now = NOW(); /* ns */ - do_div(now, 1000000); - ms = (unsigned long)now; + ms = do_div(now, MILLISECS(1)); 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Not a functional change. Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/drivers/char/console.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 536b883d5dcf..a60a7c213555 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -1318,15 +1318,15 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, spin_unlock(&ratelimit_lock); if ( lost ) { - char lost_str[10]; + char msg[40]; + + snprintf(msg, sizeof(msg), + "printk: %u messages suppressed\n", lost); - snprintf(lost_str, sizeof(lost_str), "%u", lost); /* console_lock may already be acquired by printk(). */ rspin_lock(&console_lock); printk_start_of_line(CONSOLE_PREFIX); - __putstr("printk: "); - __putstr(lost_str); - __putstr(" messages suppressed.\n"); + __putstr(msg); rspin_unlock(&console_lock); } local_irq_restore(flags); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 20:52:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 20:52:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1223929.1531284 (Exim 4.92) (envelope-from ) id 1voSoX-0008N0-6C; Fri, 06 Feb 2026 20:52:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1223929.1531284; Fri, 06 Feb 2026 20:52:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voSoX-0008Mt-3X; Fri, 06 Feb 2026 20:52:29 +0000 Received: by outflank-mailman (input) for mailman id 1223929; Fri, 06 Feb 2026 20:52:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voSoV-0008Hz-ID for xen-devel@lists.xenproject.org; Fri, 06 Feb 2026 20:52:27 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bd7845b0-039d-11f1-b161-2bf370ae4941; Fri, 06 Feb 2026 21:52:26 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 245A643910; Fri, 6 Feb 2026 20:52:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13D8BC116C6; Fri, 6 Feb 2026 20:52:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bd7845b0-039d-11f1-b161-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770411144; bh=uo8ze5SVM4HHEzRgguecAUZD/G9nCX+zUnK5PcRTjZs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=tBhc9u81VkaMbZnuFknF8cq09oEyuF9T2+lkaOpUdsd5QLojBXtqmf4FcEnLRRkbv szGJaYptOpCYeo0/rkrPjAMjN8N01Qs18rrU5sCKbg16JVjtkyi32hROfjK4suE+tL 17SvfOlEnvoKS0LUXQVk84MnOC2NJQruWk4M7yRhjY0J+wzHytE7yosHSbDbDPhPpg q70f95fnjjF4OC+xb+PZQPt23xEq0W0zUDwugN2qLRxRn143NYv1YIySn9Lx6KWy/E s9vfQ7+u+Rr/Xy2JPppRy3smg8gSF9sv2Hrk2oqCVLULT6my5gG6eeKtLOSQSGiYgU 0Vkh8xWSjGudg== Date: Fri, 6 Feb 2026 12:52:19 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= cc: Stefano Stabellini , xen-devel@lists.xenproject.org, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization In-Reply-To: Message-ID: References: <20260206015032.4159672-1-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-1050394070-1770411124=:3668128" Content-ID: This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1050394070-1770411124=:3668128 Content-Type: text/plain; CHARSET=UTF-8 Content-Transfer-Encoding: 8BIT Content-ID: On Fri, 5 Feb 2026, Roger Pau Monné wrote: > On Thu, Feb 05, 2026 at 05:50:32PM -0800, Stefano Stabellini wrote: > > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > > to allow nested virtualization support to be disabled at build time. > > This is useful for embedded or safety-focused deployments where > > nested virtualization is not needed, reducing code size and attack > > surface. > > > > When CONFIG_NESTED_VIRT=n, the following source files are excluded: > > - arch/x86/hvm/nestedhvm.c > > - arch/x86/hvm/svm/nestedsvm.c > > - arch/x86/hvm/vmx/vvmx.c > > - arch/x86/mm/nested.c > > - arch/x86/mm/hap/nested_hap.c > > - arch/x86/mm/hap/nested_ept.c > > > > Add inline stubs where needed in headers. > > > > No functional change when CONFIG_NESTED_VIRT=y. > > You also need to adjust arch_sanitise_domain_config() so it refuses to > create domains with the XEN_DOMCTL_CDF_nested_virt flag set when > CONFIG_NESTED_VIRT=n. Sounds good > If you do that I think a bunch of the dummy > helpers that you add when CONFIG_NESTED_VIRT=n should also gain an > ASSERT_UNREACHABLE(). OK > And IMO you will also need to add a new XEN_SYSCTL_PHYSCAP_nestedhvm > (or alike) to signal the toolstack whether the nested HVM feature is > available. Much like we do for HAP/Shadow/gnttab availability. yeah good point > > Signed-off-by: Stefano Stabellini > > --- > > xen/arch/x86/hvm/Kconfig | 10 ++++++ > > xen/arch/x86/hvm/Makefile | 2 +- > > xen/arch/x86/hvm/svm/Makefile | 2 +- > > xen/arch/x86/hvm/svm/nestedhvm.h | 44 +++++++++++++++++++++--- > > xen/arch/x86/hvm/svm/svm.c | 6 ++++ > > xen/arch/x86/hvm/vmx/Makefile | 2 +- > > xen/arch/x86/hvm/vmx/vmx.c | 10 ++++-- > > xen/arch/x86/include/asm/hvm/nestedhvm.h | 41 +++++++++++++++++----- > > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 30 ++++++++++++++++ > > xen/arch/x86/mm/Makefile | 2 +- > > xen/arch/x86/mm/hap/Makefile | 4 +-- > > xen/arch/x86/mm/p2m.h | 6 ++++ > > 12 files changed, 137 insertions(+), 22 deletions(-) > > > > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > > index f32bf5cbb7..12b5df4710 100644 > > --- a/xen/arch/x86/hvm/Kconfig > > +++ b/xen/arch/x86/hvm/Kconfig > > @@ -92,4 +92,14 @@ config MEM_SHARING > > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > > depends on INTEL_VMX > > > > +config NESTED_VIRT > > + bool "Nested virtualization support" if EXPERT > > + depends on AMD_SVM || INTEL_VMX > > + default y > > + help > > + Enable nested virtualization, allowing guests to run their own > > + hypervisors. This requires hardware support. > > + > > + If unsure, say Y. > > If we go that route, I think nested virt should become off by default. > It's not security supported, and known to be broken in many areas. > > I'm also unsure about whether this wants to be gated under EXPERT. > But I'm not sure I'm any good at knowing whether something should be > under EXPERT or not. I am happy either way and I'll others decide on the default. I did it this way to avoid changes over the current baseline. In case there is disagreement, I am also happy if it gets changed on commit based on the latest preference. > > + > > endif > > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > > index f34fb03934..b8a0a68624 100644 > > --- a/xen/arch/x86/hvm/Makefile > > +++ b/xen/arch/x86/hvm/Makefile > > @@ -18,7 +18,7 @@ obj-y += irq.o > > obj-y += mmio.o > > obj-$(CONFIG_VM_EVENT) += monitor.o > > obj-y += mtrr.o > > -obj-y += nestedhvm.o > > +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o > > obj-y += pmtimer.o > > obj-y += quirks.o > > obj-y += rtc.o > > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile > > index 8a072cafd5..92418e3444 100644 > > --- a/xen/arch/x86/hvm/svm/Makefile > > +++ b/xen/arch/x86/hvm/svm/Makefile > > @@ -2,6 +2,6 @@ obj-y += asid.o > > obj-y += emulate.o > > obj-bin-y += entry.o > > obj-y += intr.o > > -obj-y += nestedsvm.o > > +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o > > obj-y += svm.o > > obj-y += vmcb.o > > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h > > index 9bfed5ffd7..a102c076ea 100644 > > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > > @@ -26,6 +26,13 @@ > > #define nsvm_efer_svm_enabled(v) \ > > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > > > > +#define NSVM_INTR_NOTHANDLED 3 > > +#define NSVM_INTR_NOTINTERCEPTED 2 > > +#define NSVM_INTR_FORCEVMEXIT 1 > > +#define NSVM_INTR_MASKED 0 > > + > > +#ifdef CONFIG_NESTED_VIRT > > + > > int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); > > void nestedsvm_vmexit_defer(struct vcpu *v, > > uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); > > @@ -57,13 +64,40 @@ int cf_check nsvm_hap_walk_L1_p2m( > > struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *page_order, > > uint8_t *p2m_acc, struct npfec npfec); > > > > -#define NSVM_INTR_NOTHANDLED 3 > > -#define NSVM_INTR_NOTINTERCEPTED 2 > > -#define NSVM_INTR_FORCEVMEXIT 1 > > -#define NSVM_INTR_MASKED 0 > > - > > int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack intack); > > > > +#else /* !CONFIG_NESTED_VIRT */ > > + > > +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) > > +{ > > + return 0; > > +} > > +static inline void nestedsvm_vmexit_defer(struct vcpu *v, > > + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) { } > > +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu *v, > > + struct cpu_user_regs *regs) > > +{ > > + return NESTEDHVM_VMEXIT_ERROR; > > +} > > +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct vcpu *v, > > + struct cpu_user_regs *regs, uint64_t exitcode) > > +{ > > + return NESTEDHVM_VMEXIT_ERROR; > > +} > > +static inline void svm_nested_features_on_efer_update(struct vcpu *v) { } > > +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, > > + struct vcpu *v) { } > > +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, > > + struct vcpu *v) { } > > +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; } > > +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, > > + const struct hvm_intack intack) > > +{ > > + return NSVM_INTR_NOTINTERCEPTED; > > +} > > + > > +#endif /* CONFIG_NESTED_VIRT */ > > + > > #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ > > > > /* > > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > > index 18ba837738..0234b57afb 100644 > > --- a/xen/arch/x86/hvm/svm/svm.c > > +++ b/xen/arch/x86/hvm/svm/svm.c > > @@ -46,6 +46,10 @@ > > > > void noreturn svm_asm_do_resume(void); > > > > +#ifndef CONFIG_NESTED_VIRT > > +void asmlinkage nsvm_vcpu_switch(void) { } > > +#endif > > + > > u32 svm_feature_flags; > > > > /* > > @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > > .set_rdtsc_exiting = svm_set_rdtsc_exiting, > > .get_insn_bytes = svm_get_insn_bytes, > > > > +#ifdef CONFIG_NESTED_VIRT > > .nhvm_vcpu_initialise = nsvm_vcpu_initialise, > > .nhvm_vcpu_destroy = nsvm_vcpu_destroy, > > .nhvm_vcpu_reset = nsvm_vcpu_reset, > > @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > > .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, > > .nhvm_intr_blocked = nsvm_intr_blocked, > > .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, > > +#endif > > > > .get_reg = svm_get_reg, > > .set_reg = svm_set_reg, > > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile > > index 04a29ce59d..902564b3e2 100644 > > --- a/xen/arch/x86/hvm/vmx/Makefile > > +++ b/xen/arch/x86/hvm/vmx/Makefile > > @@ -3,4 +3,4 @@ obj-y += intr.o > > obj-y += realmode.o > > obj-y += vmcs.o > > obj-y += vmx.o > > -obj-y += vvmx.o > > +obj-$(CONFIG_NESTED_VIRT) += vvmx.o > > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > > index 82c55f49ae..252f27322b 100644 > > --- a/xen/arch/x86/hvm/vmx/vmx.c > > +++ b/xen/arch/x86/hvm/vmx/vmx.c > > @@ -55,6 +55,10 @@ > > #include > > #include > > > > +#ifndef CONFIG_NESTED_VIRT > > +void asmlinkage nvmx_switch_guest(void) { } > > +#endif > > + > > static bool __initdata opt_force_ept; > > boolean_param("force-ept", opt_force_ept); > > > > @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcpu *v, > > nvmx->intr.intr_info, nvmx->intr.error_code); > > } > > > > -static int cf_check nvmx_vmexit_event( > > +static int cf_check __maybe_unused nvmx_vmexit_event( > > struct vcpu *v, const struct x86_event *event) > > { > > nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > > @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > > .handle_cd = vmx_handle_cd, > > .set_info_guest = vmx_set_info_guest, > > .set_rdtsc_exiting = vmx_set_rdtsc_exiting, > > +#ifdef CONFIG_NESTED_VIRT > > .nhvm_vcpu_initialise = nvmx_vcpu_initialise, > > .nhvm_vcpu_destroy = nvmx_vcpu_destroy, > > .nhvm_vcpu_reset = nvmx_vcpu_reset, > > @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > > .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, > > .nhvm_intr_blocked = nvmx_intr_blocked, > > .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, > > - .update_vlapic_mode = vmx_vlapic_msr_changed, > > .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, > > +#endif > > + .update_vlapic_mode = vmx_vlapic_msr_changed, > > #ifdef CONFIG_VM_EVENT > > .enable_msr_interception = vmx_enable_msr_interception, > > #endif > > diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h > > index ea2c1bc328..0372974b24 100644 > > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > > /* Nested HVM on/off per domain */ > > static inline bool nestedhvm_enabled(const struct domain *d) > > { > > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > > + (d->options & XEN_DOMCTL_CDF_nested_virt); > > } > > > > +/* Nested paging */ > > +#define NESTEDHVM_PAGEFAULT_DONE 0 > > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > > + > > +#ifdef CONFIG_NESTED_VIRT > > + > > /* Nested VCPU */ > > int nestedhvm_vcpu_initialise(struct vcpu *v); > > void nestedhvm_vcpu_destroy(struct vcpu *v); > > @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); > > #define nestedhvm_vcpu_exit_guestmode(v) \ > > vcpu_nestedhvm(v).nv_guestmode = 0 > > > > -/* Nested paging */ > > -#define NESTEDHVM_PAGEFAULT_DONE 0 > > -#define NESTEDHVM_PAGEFAULT_INJECT 1 > > -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > > -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > > -#define NESTEDHVM_PAGEFAULT_MMIO 4 > > -#define NESTEDHVM_PAGEFAULT_RETRY 5 > > -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > > int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > > struct npfec npfec); > > > > @@ -59,6 +63,25 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); > > > > void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); > > > > +#else /* !CONFIG_NESTED_VIRT */ > > + > > +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) { return 0; } > > +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } > > +static inline void nestedhvm_vcpu_reset(struct vcpu *v) { } > > +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } > > +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > > + struct npfec npfec) > > +{ > > + return NESTEDHVM_PAGEFAULT_L0_ERROR; > > +} > > +#define nestedhvm_vcpu_enter_guestmode(v) do { } while (0) > > +#define nestedhvm_vcpu_exit_guestmode(v) do { } while (0) > > +#define nestedhvm_paging_mode_hap(v) false > > +#define nestedhvm_vmswitch_in_progress(v) false > > +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) { } > > + > > +#endif /* CONFIG_NESTED_VIRT */ > > + > > static inline bool nestedhvm_is_n2(struct vcpu *v) > > { > > if ( !nestedhvm_enabled(v->domain) || > > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > > index da10d3fa96..8dc876a4c2 100644 > > --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > > +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > > @@ -73,6 +73,8 @@ union vmx_inst_info { > > u32 word; > > }; > > > > +#ifdef CONFIG_NESTED_VIRT > > + > > int cf_check nvmx_vcpu_initialise(struct vcpu *v); > > void cf_check nvmx_vcpu_destroy(struct vcpu *v); > > int cf_check nvmx_vcpu_reset(struct vcpu *v); > > @@ -199,5 +201,33 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, > > uint64_t *exit_qual, uint32_t *exit_reason); > > int nvmx_cpu_up_prepare(unsigned int cpu); > > void nvmx_cpu_dead(unsigned int cpu); > > + > > +#else /* !CONFIG_NESTED_VIRT */ > > + > > +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) { } > > +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, > > + unsigned long value) { } > > +static inline void nvmx_update_exception_bitmap(struct vcpu *v, > > + unsigned long value) { } > > +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) { return 0; } > > +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) { } > > +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, > > + int error_code) { return false; } > > +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, > > + unsigned int exit_reason) { return 0; } > > +static inline void nvmx_idtv_handling(void) { } > > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) > > +{ > > + return 0; > > +} > > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > > + unsigned int exit_reason) { return 0; } > > +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } > > +static inline void nvmx_cpu_dead(unsigned int cpu) { } > > + > > +#define get_vvmcs(vcpu, encoding) 0 > > + > > +#endif /* CONFIG_NESTED_VIRT */ > > + > > #endif /* __ASM_X86_HVM_VVMX_H__ */ > > > > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > > index 960f6e8409..aa15811c2e 100644 > > --- a/xen/arch/x86/mm/Makefile > > +++ b/xen/arch/x86/mm/Makefile > > @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o > > obj-$(CONFIG_VM_EVENT) += mem_access.o > > obj-$(CONFIG_MEM_PAGING) += mem_paging.o > > obj-$(CONFIG_MEM_SHARING) += mem_sharing.o > > -obj-$(CONFIG_HVM) += nested.o > > +obj-$(CONFIG_NESTED_VIRT) += nested.o > > obj-$(CONFIG_HVM) += p2m.o > > obj-y += p2m-basic.o > > obj-$(CONFIG_INTEL_VMX) += p2m-ept.o > > diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile > > index 67c29b2162..de1bb3abde 100644 > > --- a/xen/arch/x86/mm/hap/Makefile > > +++ b/xen/arch/x86/mm/hap/Makefile > > @@ -2,5 +2,5 @@ obj-y += hap.o > > obj-y += guest_walk_2.o > > obj-y += guest_walk_3.o > > obj-y += guest_walk_4.o > > -obj-y += nested_hap.o > > -obj-$(CONFIG_INTEL_VMX) += nested_ept.o > > +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o > > +obj-$(CONFIG_NESTED_VIRT) += nested_ept.o > > With this change nested_ept.o is no longer gated explicitly on > CONFIG_INTEL_VMX, which could cause build issues if you have a Kconfig > like: > > CONFIG_INTEL_VMX=n > CONFIG_AMD_SVM=y > CONFIG_NESTED_VIRT=y > > Does the code in nested_ept.o have dependencies on other files gated > by CONFIG_INTEL_VMX, and hence would fail at the linking stage? And > even if it builds, the code in nested_ept.o would be unreachable I > expect. It does build, but you are right. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: sMhv5Jumpt9QIMcgUf3bBp5A4vTDTwevJcRnm027tPQBui0Wos02ePcD8ruvyrdg0p7kA/GZKMSdUiWMutXGuTEtLpHrsBd8zYDJ8YIkptb3Kas1rgHBoRr+RBuo6dhWjt4U/NpBfMncMlfYTDrnrIn1AfU2vE7ANQ+webY7bzRv1bjZuPdtMClh881GarAhsFCAtvBExeSlfraJLz3Sstuvc+DuT24NpAY79Qs7Cos6dL1JM9W9dKSuOZGUJcKv6Pi2DBjdIwzvf+dozo4COEUNqSpz59zUAknf+ugTAOv5Dt98J1hy7FPXG6/WhcAU5nqWkk2hVQHTOoRurhKpfeL9p4dOU3YSXxXNj/6281c2rc6mYdv13a0p5JqDVq3Yup+XnBShdIZ4Qh1pQyL+CjN4H3pNMKVJ0XH4eUeCBNYQBvQ+JlEqn1xlL+efe1Va X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2026 21:05:56.3113 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cea37211-1d07-446a-64c4-08de65c3855b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECDB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7693 Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) to allow nested virtualization support to be disabled at build time. This is useful for embedded or safety-focused deployments where nested virtualization is not needed, reducing code size and attack surface. When CONFIG_NESTED_VIRT=n, the following source files are excluded: - arch/x86/hvm/nestedhvm.c - arch/x86/hvm/svm/nestedsvm.c - arch/x86/hvm/vmx/vvmx.c - arch/x86/mm/nested.c - arch/x86/mm/hap/nested_hap.c - arch/x86/mm/hap/nested_ept.c Add inline stubs where needed in headers. No functional change when CONFIG_NESTED_VIRT=y. Signed-off-by: Stefano Stabellini --- Changes in v2: - add ASSERT_UNREACHABLE - change default to N and remove EXPERT - don't compile nested_hap if not VMX - add XEN_SYSCTL_PHYSCAP_nestedhvm - add IS_ENABLED check in hvm_nested_virt_supported --- xen/arch/x86/hvm/Kconfig | 10 ++++ xen/arch/x86/hvm/Makefile | 2 +- xen/arch/x86/hvm/svm/Makefile | 2 +- xen/arch/x86/hvm/svm/nestedhvm.h | 60 +++++++++++++++++++++-- xen/arch/x86/hvm/svm/svm.c | 6 +++ xen/arch/x86/hvm/vmx/Makefile | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 10 +++- xen/arch/x86/include/asm/hvm/hvm.h | 2 +- xen/arch/x86/include/asm/hvm/nestedhvm.h | 52 ++++++++++++++++---- xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 62 ++++++++++++++++++++++++ xen/arch/x86/mm/Makefile | 2 +- xen/arch/x86/mm/hap/Makefile | 4 +- xen/arch/x86/mm/p2m.h | 6 +++ xen/arch/x86/sysctl.c | 2 + xen/include/public/sysctl.h | 4 +- 15 files changed, 202 insertions(+), 24 deletions(-) diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb7..133f19a063 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -92,4 +92,14 @@ config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX +config NESTED_VIRT + bool "Nested virtualization support" + depends on AMD_SVM || INTEL_VMX + default n + help + Enable nested virtualization, allowing guests to run their own + hypervisors. This requires hardware support. + + If unsure, say N. + endif diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile index f34fb03934..b8a0a68624 100644 --- a/xen/arch/x86/hvm/Makefile +++ b/xen/arch/x86/hvm/Makefile @@ -18,7 +18,7 @@ obj-y += irq.o obj-y += mmio.o obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mtrr.o -obj-y += nestedhvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o obj-y += pmtimer.o obj-y += quirks.o obj-y += rtc.o diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile index 8a072cafd5..92418e3444 100644 --- a/xen/arch/x86/hvm/svm/Makefile +++ b/xen/arch/x86/hvm/svm/Makefile @@ -2,6 +2,6 @@ obj-y += asid.o obj-y += emulate.o obj-bin-y += entry.o obj-y += intr.o -obj-y += nestedsvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o obj-y += svm.o obj-y += vmcb.o diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h index 9bfed5ffd7..ed1aa847e5 100644 --- a/xen/arch/x86/hvm/svm/nestedhvm.h +++ b/xen/arch/x86/hvm/svm/nestedhvm.h @@ -26,6 +26,13 @@ #define nsvm_efer_svm_enabled(v) \ (!!((v)->arch.hvm.guest_efer & EFER_SVME)) +#define NSVM_INTR_NOTHANDLED 3 +#define NSVM_INTR_NOTINTERCEPTED 2 +#define NSVM_INTR_FORCEVMEXIT 1 +#define NSVM_INTR_MASKED 0 + +#ifdef CONFIG_NESTED_VIRT + int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); void nestedsvm_vmexit_defer(struct vcpu *v, uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); @@ -57,13 +64,56 @@ int cf_check nsvm_hap_walk_L1_p2m( struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *page_order, uint8_t *p2m_acc, struct npfec npfec); -#define NSVM_INTR_NOTHANDLED 3 -#define NSVM_INTR_NOTINTERCEPTED 2 -#define NSVM_INTR_FORCEVMEXIT 1 -#define NSVM_INTR_MASKED 0 - int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack intack); +#else /* !CONFIG_NESTED_VIRT */ + +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) +{ + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; +} +static inline void nestedsvm_vmexit_defer(struct vcpu *v, + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) +{ + ASSERT_UNREACHABLE(); +} +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu *v, + struct cpu_user_regs *regs) +{ + ASSERT_UNREACHABLE(); + return NESTEDHVM_VMEXIT_ERROR; +} +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct vcpu *v, + struct cpu_user_regs *regs, uint64_t exitcode) +{ + ASSERT_UNREACHABLE(); + return NESTEDHVM_VMEXIT_ERROR; +} +static inline void svm_nested_features_on_efer_update(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, + struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, + struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; } +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, + const struct hvm_intack intack) +{ + ASSERT_UNREACHABLE(); + return NSVM_INTR_NOTINTERCEPTED; +} + +#endif /* CONFIG_NESTED_VIRT */ + #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ /* diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..0234b57afb 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -46,6 +46,10 @@ void noreturn svm_asm_do_resume(void); +#ifndef CONFIG_NESTED_VIRT +void asmlinkage nsvm_vcpu_switch(void) { } +#endif + u32 svm_feature_flags; /* @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nsvm_vcpu_initialise, .nhvm_vcpu_destroy = nsvm_vcpu_destroy, .nhvm_vcpu_reset = nsvm_vcpu_reset, @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, .nhvm_intr_blocked = nsvm_intr_blocked, .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, +#endif .get_reg = svm_get_reg, .set_reg = svm_set_reg, diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile index 04a29ce59d..902564b3e2 100644 --- a/xen/arch/x86/hvm/vmx/Makefile +++ b/xen/arch/x86/hvm/vmx/Makefile @@ -3,4 +3,4 @@ obj-y += intr.o obj-y += realmode.o obj-y += vmcs.o obj-y += vmx.o -obj-y += vvmx.o +obj-$(CONFIG_NESTED_VIRT) += vvmx.o diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 82c55f49ae..252f27322b 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -55,6 +55,10 @@ #include #include +#ifndef CONFIG_NESTED_VIRT +void asmlinkage nvmx_switch_guest(void) { } +#endif + static bool __initdata opt_force_ept; boolean_param("force-ept", opt_force_ept); @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcpu *v, nvmx->intr.intr_info, nvmx->intr.error_code); } -static int cf_check nvmx_vmexit_event( +static int cf_check __maybe_unused nvmx_vmexit_event( struct vcpu *v, const struct x86_event *event) { nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .handle_cd = vmx_handle_cd, .set_info_guest = vmx_set_info_guest, .set_rdtsc_exiting = vmx_set_rdtsc_exiting, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nvmx_vcpu_initialise, .nhvm_vcpu_destroy = nvmx_vcpu_destroy, .nhvm_vcpu_reset = nvmx_vcpu_reset, @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, .nhvm_intr_blocked = nvmx_intr_blocked, .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, - .update_vlapic_mode = vmx_vlapic_msr_changed, .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, +#endif + .update_vlapic_mode = vmx_vlapic_msr_changed, #ifdef CONFIG_VM_EVENT .enable_msr_interception = vmx_enable_msr_interception, #endif diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..536a38b450 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -711,7 +711,7 @@ static inline bool hvm_altp2m_supported(void) /* Returns true if we have the minimum hardware requirements for nested virt */ static inline bool hvm_nested_virt_supported(void) { - return hvm_funcs.caps.nested_virt; + return IS_ENABLED(CONFIG_NESTED_VIRT) && hvm_funcs.caps.nested_virt; } #ifdef CONFIG_ALTP2M diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h index ea2c1bc328..e18d59e0eb 100644 --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { /* Nested HVM on/off per domain */ static inline bool nestedhvm_enabled(const struct domain *d) { - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); + return IS_ENABLED(CONFIG_NESTED_VIRT) && + (d->options & XEN_DOMCTL_CDF_nested_virt); } +/* Nested paging */ +#define NESTEDHVM_PAGEFAULT_DONE 0 +#define NESTEDHVM_PAGEFAULT_INJECT 1 +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 +#define NESTEDHVM_PAGEFAULT_MMIO 4 +#define NESTEDHVM_PAGEFAULT_RETRY 5 +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 + +#ifdef CONFIG_NESTED_VIRT + /* Nested VCPU */ int nestedhvm_vcpu_initialise(struct vcpu *v); void nestedhvm_vcpu_destroy(struct vcpu *v); @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); #define nestedhvm_vcpu_exit_guestmode(v) \ vcpu_nestedhvm(v).nv_guestmode = 0 -/* Nested paging */ -#define NESTEDHVM_PAGEFAULT_DONE 0 -#define NESTEDHVM_PAGEFAULT_INJECT 1 -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 -#define NESTEDHVM_PAGEFAULT_MMIO 4 -#define NESTEDHVM_PAGEFAULT_RETRY 5 -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, struct npfec npfec); @@ -59,6 +63,36 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); +#else /* !CONFIG_NESTED_VIRT */ + +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; +} +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } +static inline void nestedhvm_vcpu_reset(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, + struct npfec npfec) +{ + ASSERT_UNREACHABLE(); + return NESTEDHVM_PAGEFAULT_L0_ERROR; +} +#define nestedhvm_vcpu_enter_guestmode(v) do { ASSERT_UNREACHABLE(); } while (0) +#define nestedhvm_vcpu_exit_guestmode(v) do { ASSERT_UNREACHABLE(); } while (0) +#define nestedhvm_paging_mode_hap(v) false +#define nestedhvm_vmswitch_in_progress(v) false +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) +{ + ASSERT_UNREACHABLE(); +} + +#endif /* CONFIG_NESTED_VIRT */ + static inline bool nestedhvm_is_n2(struct vcpu *v) { if ( !nestedhvm_enabled(v->domain) || diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h index da10d3fa96..ad56cdf01e 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h @@ -73,6 +73,8 @@ union vmx_inst_info { u32 word; }; +#ifdef CONFIG_NESTED_VIRT + int cf_check nvmx_vcpu_initialise(struct vcpu *v); void cf_check nvmx_vcpu_destroy(struct vcpu *v); int cf_check nvmx_vcpu_reset(struct vcpu *v); @@ -199,5 +201,65 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, uint64_t *exit_qual, uint32_t *exit_reason); int nvmx_cpu_up_prepare(unsigned int cpu); void nvmx_cpu_dead(unsigned int cpu); + +#else /* !CONFIG_NESTED_VIRT */ + +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) +{ + ASSERT_UNREACHABLE(); +} +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, + unsigned long value) +{ + ASSERT_UNREACHABLE(); +} +static inline void nvmx_update_exception_bitmap(struct vcpu *v, + unsigned long value) +{ + ASSERT_UNREACHABLE(); +} +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, + int error_code) +{ + ASSERT_UNREACHABLE(); + return false; +} +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, + unsigned int exit_reason) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline void nvmx_idtv_handling(void) +{ + ASSERT_UNREACHABLE(); +} +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, + unsigned int exit_reason) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } +static inline void nvmx_cpu_dead(unsigned int cpu) { } + +#define get_vvmcs(vcpu, encoding) 0 + +#endif /* CONFIG_NESTED_VIRT */ + #endif /* __ASM_X86_HVM_VVMX_H__ */ diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e8409..aa15811c2e 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o obj-$(CONFIG_VM_EVENT) += mem_access.o obj-$(CONFIG_MEM_PAGING) += mem_paging.o obj-$(CONFIG_MEM_SHARING) += mem_sharing.o -obj-$(CONFIG_HVM) += nested.o +obj-$(CONFIG_NESTED_VIRT) += nested.o obj-$(CONFIG_HVM) += p2m.o obj-y += p2m-basic.o obj-$(CONFIG_INTEL_VMX) += p2m-ept.o diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile index 67c29b2162..2082dfee2d 100644 --- a/xen/arch/x86/mm/hap/Makefile +++ b/xen/arch/x86/mm/hap/Makefile @@ -2,5 +2,5 @@ obj-y += hap.o obj-y += guest_walk_2.o obj-y += guest_walk_3.o obj-y += guest_walk_4.o -obj-y += nested_hap.o -obj-$(CONFIG_INTEL_VMX) += nested_ept.o +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) += nested_ept.o diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h index 635f5a7f45..63808dddcc 100644 --- a/xen/arch/x86/mm/p2m.h +++ b/xen/arch/x86/mm/p2m.h @@ -25,9 +25,15 @@ void p2m_teardown_altp2m(struct domain *d); void p2m_flush_table_locked(struct p2m_domain *p2m); int __must_check p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, unsigned int page_order); +#ifdef CONFIG_NESTED_VIRT void p2m_nestedp2m_init(struct p2m_domain *p2m); int p2m_init_nestedp2m(struct domain *d); void p2m_teardown_nestedp2m(struct domain *d); +#else +static inline void p2m_nestedp2m_init(struct p2m_domain *p2m) { } +static inline int p2m_init_nestedp2m(struct domain *d) { return 0; } +static inline void p2m_teardown_nestedp2m(struct domain *d) { } +#endif int ept_p2m_init(struct p2m_domain *p2m); void ept_p2m_uninit(struct p2m_domain *p2m); diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 1b04947516..b1d865e1c8 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) pi->capabilities |= XEN_SYSCTL_PHYSCAP_hap; if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow; + if ( hvm_nested_virt_supported() ) + pi->capabilities |= XEN_SYSCTL_PHYSCAP_nestedhvm; } long arch_do_sysctl( diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 66c9b65465..b4bd1dd7b2 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { /* Xen supports the Grant v1 and/or v2 ABIs. */ #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) +/* The platform supports nested HVM. */ +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) /* Max XEN_SYSCTL_PHYSCAP_* constant. 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Handle them in a similar way to vpl011: only the > domain which has focus can read from the console. All domains can write > to the console but the ones without focus have a prefix. In this case > the prefix is applied by using guest_printk instead of printk or > console_puts which is what the original code was already doing. > > When switching focus using Ctrl-AAA, discard any unread data in the > input buffer. Input is read quickly and the user would be aware of it > being slow or stuck as they use Ctrl-AAA to switch focus domain. > In that situation, it is to be expected that the unread input is lost. > > The domain writes are buffered when the domain is not in focus. Push out > the buffer after the domain enters focus on the first guest write. > > Locking updates: > > - Discard unread input under the lock when switching focus (including > when returning to Xen) so that cross-domain reads can't see stale data > > - Require is_focus_domain() callers to hold console_lock, and re-check > focus after each chunk in the CONSOLEIO_read loop so a focus change > simply stops further copies without duplicating or leaking input > > - Hold cons->lock while flushing buffered writes in the focus path so > the direct-write fast path does not race buffered guests or HVM debug > output > > Signed-off-by: Stefano Stabellini Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Fri Feb 06 23:30:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 23:30:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224014.1531328 (Exim 4.92) (envelope-from ) id 1voVHL-00078H-TH; Fri, 06 Feb 2026 23:30:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1224014.1531328; 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When disabled, this removes cpufreq code from the build. Add stubs where necessary. Signed-off-by: Stefano Stabellini --- Changes in v2: - add stubs for cpufreq_add/del_cpu - also gate hwp_active --- xen/arch/x86/acpi/Makefile | 2 +- xen/common/Kconfig | 4 ++-- xen/drivers/Makefile | 2 +- xen/drivers/cpufreq/Kconfig | 16 +++++++++++++++- xen/include/acpi/cpufreq/cpufreq.h | 13 ++++++++++++- xen/include/acpi/cpufreq/processor_perf.h | 3 --- xen/include/xen/acpi.h | 8 +++++++- xen/include/xen/pmstat.h | 15 ++++++++++++++- xen/include/xen/sched.h | 9 +++++++-- 9 files changed, 59 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/acpi/Makefile b/xen/arch/x86/acpi/Makefile index 041377e2bb..aa476f65d5 100644 --- a/xen/arch/x86/acpi/Makefile +++ b/xen/arch/x86/acpi/Makefile @@ -1,4 +1,4 @@ -obj-y += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-y += lib.o power.o cpu_idle.o cpuidle_menu.o obj-bin-y += boot.init.o wakeup_prot.o diff --git a/xen/common/Kconfig b/xen/common/Kconfig index d7e79e752a..cddd7337bb 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -652,7 +652,7 @@ endmenu config PM_OP bool "Enable Performance Management Operation" - depends on ACPI && HAS_CPUFREQ && SYSCTL + depends on ACPI && CPUFREQ && SYSCTL default y help This option shall enable userspace performance management control @@ -660,7 +660,7 @@ config PM_OP config PM_STATS bool "Enable Performance Management Statistics" - depends on ACPI && HAS_CPUFREQ && SYSCTL + depends on ACPI && CPUFREQ && SYSCTL default y help Enable collection of performance management statistics to aid in diff --git a/xen/drivers/Makefile b/xen/drivers/Makefile index 2a1ae8ad13..3d81b8dde4 100644 --- a/xen/drivers/Makefile +++ b/xen/drivers/Makefile @@ -1,5 +1,5 @@ obj-y += char/ -obj-$(CONFIG_HAS_CPUFREQ) += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-$(CONFIG_HAS_PCI) += pci/ obj-$(CONFIG_HAS_VPCI) += vpci/ obj-$(CONFIG_HAS_PASSTHROUGH) += passthrough/ diff --git a/xen/drivers/cpufreq/Kconfig b/xen/drivers/cpufreq/Kconfig index cce80f4aec..49631f92de 100644 --- a/xen/drivers/cpufreq/Kconfig +++ b/xen/drivers/cpufreq/Kconfig @@ -1,3 +1,17 @@ - config HAS_CPUFREQ bool + +config CPUFREQ + bool "CPU Frequency scaling" + default y + depends on HAS_CPUFREQ + help + Enable CPU frequency scaling and power management governors. + This allows Xen to dynamically adjust CPU P-states (performance + states) based on system load. + + Disabling this option removes all cpufreq governors and power + management interfaces. This is useful for real-time systems or + minimal hypervisor builds. + + If unsure, say Y. diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 0171ccf0ba..9529730d9c 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); +#ifdef CONFIG_CPUFREQ +int cpufreq_add_cpu(unsigned int cpu); +int cpufreq_del_cpu(unsigned int cpu); + void cpufreq_dbs_timer_suspend(void); void cpufreq_dbs_timer_resume(void); +#else +static inline int cpufreq_add_cpu(unsigned int cpu) { return -ENOSYS; } +static inline int cpufreq_del_cpu(unsigned int cpu) { return -ENOSYS; } + +static inline void cpufreq_dbs_timer_suspend(void) {} +static inline void cpufreq_dbs_timer_resume(void) {} +#endif void intel_feature_detect(struct cpufreq_policy *policy); @@ -398,7 +409,7 @@ void intel_feature_detect(struct cpufreq_policy *policy); int hwp_cmdline_parse(const char *s, const char *e); int hwp_register_driver(void); -#ifdef CONFIG_INTEL +#if defined(CONFIG_INTEL) && defined(CONFIG_CPUFREQ) bool hwp_active(void); #else static inline bool hwp_active(void) { return false; } diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index 0a87bc0384..bad9d94865 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -36,9 +36,6 @@ static inline void cpufreq_statistic_exit(unsigned int cpu) {} int cpufreq_limit_change(unsigned int cpu); -int cpufreq_add_cpu(unsigned int cpu); -int cpufreq_del_cpu(unsigned int cpu); - struct processor_performance { uint32_t state; uint32_t platform_limit; diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 90635ba0f3..7077c27150 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -185,8 +185,14 @@ static inline unsigned int acpi_get_csubstate_limit(void) { return 0; } static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } #endif -#ifdef XEN_GUEST_HANDLE +#if defined(XEN_GUEST_HANDLE) && defined(CONFIG_CPUFREQ) int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); +#elif defined(XEN_GUEST_HANDLE) +static inline int acpi_set_pdc_bits(unsigned int acpi_id, + XEN_GUEST_HANDLE(uint32) pdc) +{ + return -ENOSYS; +} #endif int arch_acpi_set_pdc_bits(u32 acpi_id, u32 *, u32 mask); diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h index 6096560d3c..4efddad438 100644 --- a/xen/include/xen/pmstat.h +++ b/xen/include/xen/pmstat.h @@ -5,10 +5,23 @@ #include /* for struct xen_processor_power */ #include /* for struct pm_cx_stat */ +#ifdef CONFIG_CPUFREQ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); -long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); int set_cppc_pminfo(unsigned int acpi_id, const struct xen_processor_cppc *cppc_data); +#else +static inline int set_px_pminfo(uint32_t acpi_id, + struct xen_processor_performance *perf) +{ + return -ENOSYS; +} +static inline int set_cppc_pminfo(unsigned int acpi_id, + const struct xen_processor_cppc *cppc_data) +{ + return -ENOSYS; +} +#endif +long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); #ifdef CONFIG_COMPAT struct compat_processor_performance; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..1b431fc726 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1255,9 +1255,14 @@ static always_inline bool is_iommu_enabled(const struct domain *d) extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; -extern enum cpufreq_controller { +enum cpufreq_controller { FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen -} cpufreq_controller; +}; +#ifdef CONFIG_CPUFREQ +extern enum cpufreq_controller cpufreq_controller; +#else +#define cpufreq_controller FREQCTL_none +#endif static always_inline bool is_cpufreq_controller(const struct domain *d) { -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 06 23:30:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 06 Feb 2026 23:30:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224016.1531337 (Exim 4.92) (envelope-from ) id 1voVHf-0007Rz-83; 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When disabled, this removes cpufreq code > > from the build. > > > > Add stubs where necessary. > > > > Signed-off-by: Stefano Stabellini > Reviewed-by: Jason Andryuk Actually I missed a couple of stubs, I had to send a v2 From xen-devel-bounces@lists.xenproject.org Sat Feb 07 00:38:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 07 Feb 2026 00:38:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224049.1531347 (Exim 4.92) (envelope-from ) id 1voWKa-0007nt-NS; Sat, 07 Feb 2026 00:37:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1224049.1531347; Sat, 07 Feb 2026 00:37:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voWKa-0007nm-Kn; Sat, 07 Feb 2026 00:37:48 +0000 Received: by outflank-mailman (input) for mailman id 1224049; Sat, 07 Feb 2026 00:37:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1voWKU-0007ng-Rh for xen-devel@lists.xenproject.org; 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Srinivasan" , "Haiyang Zhang" , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Ingo Molnar , , , , , , , Rahul Bukte , Daniel Palmer , Tim Bird , References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-1-71c8f488a88b@sony.com> <0149c37d-7065-4c72-ab56-4cea1a6c15d0@intel.com> <722b53a7-7560-4a1b-ab26-73eeed3dffa5@intel.com> From: Sohil Mehta In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR05CA0060.namprd05.prod.outlook.com (2603:10b6:a03:33f::35) To DS0PR11MB7997.namprd11.prod.outlook.com (2603:10b6:8:125::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR11MB7997:EE_|IA3PR11MB9376:EE_ X-MS-Office365-Filtering-Correlation-Id: 102c622a-490f-4cd8-9e31-08de65e112ec X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|7416014|376014; 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So it did what the setting says >>> >> I still think the firmware behavior is flawed. Some confusion originates from the option "Enable x2apic". Based on just these two words, the behavior seems highly ambiguous. I interpret it to mean "Make the x2apic feature available to the kernel". Then it is up to the kernel whether it decides to use it. If the intention of the BIOS option is to automatically/always enable x2apic then there is an architectural way to do it. It can set the bits that track to x2apic_hw_locked(). But, doing it this way during resume (behind OS's back) is unexpected. >> >> pr_warn_once("x2apic unexpectedly re-enabled by the firmware during >> resume.\n"); > > At least as per the spec, it's not something the firmware needs to fix, > and it's not unexpected re-enablement. > > Am I missing something? > > But it _is_ surprising that this bug went unnoticed for so long :) Maybe this BIOS option isn't typically found in a production firmware. I think it would be preferable to have the pr_warn_once() but I won't push super hard for it due to the unclear information. Whatever you choose for v2, can you please briefly describe the ambiguity in the commit message? It would help other reviewers provide better insight and be handy if we ever need to come back to this. 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Sat, 07 Feb 2026 18:31:24 -0800 (PST) Message-ID: Date: Sat, 7 Feb 2026 21:31:18 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------ff2IswLqbcPfzIXGl0xJh30R" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------ff2IswLqbcPfzIXGl0xJh30R Content-Type: multipart/mixed; boundary="------------wqWINVx790Rm0KUkoXtv0Ghb"; protected-headers="v1" Message-ID: Date: Sat, 7 Feb 2026 21:31:18 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260206210554.126443-1-stefano.stabellini@amd.com> --------------wqWINVx790Rm0KUkoXtv0Ghb Content-Type: multipart/mixed; boundary="------------ri2vDAwU4hWXBxbozr8xIOrE" --------------ri2vDAwU4hWXBxbozr8xIOrE Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/6/26 16:05, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > to allow nested virtualization support to be disabled at build time. > This is useful for embedded or safety-focused deployments where > nested virtualization is not needed, reducing code size and attack > surface. >=20 > When CONFIG_NESTED_VIRT=3Dn, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c >=20 > Add inline stubs where needed in headers. >=20 > No functional change when CONFIG_NESTED_VIRT=3Dy. >=20 > Signed-off-by: Stefano Stabellini Commit message is stale: the default is now N and the dependency on EXPERT was removed. Personally, I would add a dependency on UNSUPPORTED, since it is known to not work well and should not be used. --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------ri2vDAwU4hWXBxbozr8xIOrE Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 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Sat, 07 Feb 2026 18:36:40 -0800 (PST) Message-ID: <13bee33c-43f7-490a-b1be-85e8cc5e0fdd@gmail.com> Date: Sat, 7 Feb 2026 21:36:36 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------dR2BCafI04aJLLaFXzM9KCdg" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------dR2BCafI04aJLLaFXzM9KCdg Content-Type: multipart/mixed; boundary="------------0cHNH2D3q4dpkolbvC5sZr5c"; protected-headers="v1" Message-ID: <13bee33c-43f7-490a-b1be-85e8cc5e0fdd@gmail.com> Date: Sat, 7 Feb 2026 21:36:36 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: --------------0cHNH2D3q4dpkolbvC5sZr5c Content-Type: multipart/mixed; boundary="------------65NyWMNLE3h0WBhRmHfseTsz" --------------65NyWMNLE3h0WBhRmHfseTsz Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/5/26 06:33, Bertrand Marquis wrote: > Xen does not currently document how to build the hypervisor on macOS, a= nd > there is no Darwin configuration for selecting a Homebrew-based GNU > toolchain. Native builds are not supported; the hypervisor must be > cross-built with a GNU toolchain and GNU make/sed. >=20 > Add a minimal Darwin.mk which selects the GNU tool definitions used by > the macOS workflow and point to the build guide for required tools and > setup. Document the Homebrew cross toolchain and GNU tools needed to > build the hypervisor on macOS. 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xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 99f29c04-0583-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770619820; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=uxIup0MaVzd1A8EqzNcp+SXDu4RkLA1hB0nzbwvx01A=; b=Vae7kyOzMMBmqRJ8+bFsYYRnjjluA3VVsQNrETg9JIHbO5MsN5Xe8vGGiMOHsWK+eibsED ErUJ9Rwvk+DoePkxFQz3I4SySwIAK6sEDA5IN7d13KRCVJgYN8lJsAmD7Mh/lDI72t2T+5 t8keCk/I5ZssUWOEwsi5iMQgCCuWr6c= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770619819; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=uxIup0MaVzd1A8EqzNcp+SXDu4RkLA1hB0nzbwvx01A=; b=j7KdINpScrRloY8LTUoYyTW0M3hzzZIUbd2xdFpmLNN/zaeAY51PrYTpF3iGFw83uLQ56s /DkD23FKVYK/9w28CV3wa8WQnVKBTrupLCz4W42JCaARhmSO3BTLw8zFtIj8O5XaPopEty hQXnx2MRJtS5rQ9QSO0GkhVve9ORwjc= From: Juergen Gross To: torvalds@linux-foundation.org Cc: linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org Subject: [GIT PULL] xen: branch for v7.0-rc1 Date: Mon, 9 Feb 2026 07:50:18 +0100 Message-ID: <20260209065018.74473-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,imap1.dmz-prg2.suse.org:helo]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TO_DN_NONE(0.00)[]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -2.80 X-Spam-Level: Linus, Please git pull the following tag: git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1-tag xen: branch for v7.0-rc1 It contains the following patches: - a simple fix for running as Xen PVH guest in 32-bit mode without PAE - a small series fixing PV device handling for suspend/resume when running as a Xen guest - a small series cleaning up workqueue usage - a small series fixing the Xen balloon driver for PVH dom0 - a patch introducing the possibility to use hypercalls for console messages in unprivileged guests - a patch enabling a Xen dom0 to use virtio devices in nested virtualization setups - a simplification of the xen-mcelog driver Thanks. Juergen Documentation/admin-guide/kernel-parameters.txt | 5 +++++ arch/x86/platform/pvh/head.S | 2 ++ arch/x86/xen/enlighten.c | 2 +- drivers/tty/hvc/hvc_xen.c | 29 ++++++++++++++++++++----- drivers/xen/balloon.c | 26 ++++++++++++++++++---- drivers/xen/events/events_base.c | 6 ++--- drivers/xen/grant-dma-ops.c | 3 ++- drivers/xen/mcelog.c | 4 +--- drivers/xen/privcmd.c | 3 ++- drivers/xen/unpopulated-alloc.c | 3 +++ drivers/xen/xenbus/xenbus.h | 6 ++--- drivers/xen/xenbus/xenbus_probe.c | 22 +++++++++---------- drivers/xen/xenbus/xenbus_probe_frontend.c | 18 +++++++-------- include/xen/xen.h | 2 ++ 14 files changed, 89 insertions(+), 42 deletions(-) Hou Wenlong (1): x86/xen/pvh: Enable PAE mode for 32-bit guest only when CONFIG_X86_PAE is set Jason Andryuk (2): xenbus: Use .freeze/.thaw to handle xenbus devices xenbus: Rename helpers to freeze/thaw/restore Marco Crivellari (2): xen/events: replace use of system_wq with system_percpu_wq xen: privcmd: WQ_PERCPU added to alloc_workqueue users Roger Pau Monne (2): Partial revert "x86/xen: fix balloon target initialization for PVH dom0" xen/balloon: improve accuracy of initial balloon target for dom0 Stefano Stabellini (1): xen: introduce xen_console_io option Teddy Astie (1): xen/virtio: Don't use grant-dma-ops when running as Dom0 Uros Bizjak (1): xen/mcelog: simplify MCE_GETCLEAR_FLAGS using xchg() From xen-devel-bounces@lists.xenproject.org Mon Feb 09 07:27:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 07:27:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224947.1531387 (Exim 4.92) (envelope-from ) id 1vpLg5-0000DD-Ek; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: HkKWNhIeJL8LNwihEIq42c5eQbjhfjLZPjp7n7zFnSR+Wu26M6XVIMqm9+VnDeMHfs7sbmwe4OR2C6KnuFQwxXhz2lsDus2m8L2Z7Ycejyp48708szMTN83uaWe2iIvbdXmvJADx6Z//Xi38PPNO67pNAMrLd9fGNVGdy5w+uSdTiNb0SL5nwRXJjS+9JzWaEbhFI34GCrK8LvMZId8RfNAUNdU0o1KT8/5lxmkHa95WskxMGHKYH/HAnNJTvhN9ZftWF9OMaiTb3TpHjAQQqeMSMET8z2UvURUVNj3y8tpTWLxVtR9YnNYQmOxHRKQTnfR9tUzDYi8tf3GAO9u5hnPXka7s6i4NcR6sqJc3qOqaG0eY/HG0KXux3MIKtKV9PjM6mHhBwXgrvHhjHGBdV9m/WhkADYG5mPkGVFwjJJwLIsDuI1EjaHG7WU7sisaf X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 07:27:13.4164 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c24d4632-7bcd-419e-85b9-08de67aca517 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF00009BA0.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR08MB9136 Hi Demi, > On 8 Feb 2026, at 03:36, Demi Marie Obenour wrote= : >=20 > On 2/5/26 06:33, Bertrand Marquis wrote: >> Xen does not currently document how to build the hypervisor on macOS, an= d >> there is no Darwin configuration for selecting a Homebrew-based GNU >> toolchain. Native builds are not supported; the hypervisor must be >> cross-built with a GNU toolchain and GNU make/sed. >>=20 >> Add a minimal Darwin.mk which selects the GNU tool definitions used by >> the macOS workflow and point to the build guide for required tools and >> setup. Document the Homebrew cross toolchain and GNU tools needed to >> build the hypervisor on macOS. > What is the use-case? My main use case is development and testing on MacOS. I can do a lot of stuff by only recompiling and testing the hypervisor with= out changing the rest of my test environment and being able to do it directly on my mac is making things a lot faster and simpler. I have been using this for a long time and someone asked me some weeks ago if that was possible so i figured it would be a good idea to share. Cheers Bertrand > --=20 > Sincerely, > Demi Marie Obenour (she/her/hers) From xen-devel-bounces@lists.xenproject.org Mon Feb 09 07:28:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 07:28:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224951.1531398 (Exim 4.92) (envelope-from ) id 1vpLhR-0000j3-Ph; Mon, 09 Feb 2026 07:28:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1224951.1531398; Mon, 09 Feb 2026 07:28:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpLhR-0000iw-Mh; Mon, 09 Feb 2026 07:28:49 +0000 Received: by outflank-mailman (input) for mailman id 1224951; Mon, 09 Feb 2026 07:28:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpLhP-0000hw-Vz for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 07:28:48 +0000 Received: from mail-yx1-xb12f.google.com (mail-yx1-xb12f.google.com [2607:f8b0:4864:20::b12f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f7667119-0588-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 08:28:45 +0100 (CET) Received: by mail-yx1-xb12f.google.com with SMTP id 956f58d0204a3-64ae222d87dso569011d50.2 for ; Sun, 08 Feb 2026 23:28:45 -0800 (PST) Received: from [10.138.34.110] (h69-131-216-128.cncrtn.broadband.dynamic.tds.net. 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Sun, 08 Feb 2026 23:28:44 -0800 (PST) Message-ID: <44ecfc7b-a8dc-4e5f-a084-a63caabf9e91@gmail.com> Date: Mon, 9 Feb 2026 02:28:31 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <13bee33c-43f7-490a-b1be-85e8cc5e0fdd@gmail.com> <6285DC05-0CE7-49B7-B394-34D0872FE551@arm.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <6285DC05-0CE7-49B7-B394-34D0872FE551@arm.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------PJtPByOG0wKwf9vlwUyCpFhH" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------PJtPByOG0wKwf9vlwUyCpFhH Content-Type: multipart/mixed; boundary="------------SMuuU5IrXHXB1NGdSNtpcUQ1"; protected-headers="v1" Message-ID: <44ecfc7b-a8dc-4e5f-a084-a63caabf9e91@gmail.com> Date: Mon, 9 Feb 2026 02:28:31 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen: Add macOS hypervisor build configuration To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <13bee33c-43f7-490a-b1be-85e8cc5e0fdd@gmail.com> <6285DC05-0CE7-49B7-B394-34D0872FE551@arm.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <6285DC05-0CE7-49B7-B394-34D0872FE551@arm.com> --------------SMuuU5IrXHXB1NGdSNtpcUQ1 Content-Type: multipart/mixed; boundary="------------ZNa6ElHYwb6P1HD0Rov3pdDG" --------------ZNa6ElHYwb6P1HD0Rov3pdDG Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/9/26 02:26, Bertrand Marquis wrote: > Hi Demi, >=20 >> On 8 Feb 2026, at 03:36, Demi Marie Obenour wr= ote: >> >> On 2/5/26 06:33, Bertrand Marquis wrote: >>> Xen does not currently document how to build the hypervisor on macOS,= and >>> there is no Darwin configuration for selecting a Homebrew-based GNU >>> toolchain. Native builds are not supported; the hypervisor must be >>> cross-built with a GNU toolchain and GNU make/sed. >>> >>> Add a minimal Darwin.mk which selects the GNU tool definitions used b= y >>> the macOS workflow and point to the build guide for required tools an= d >>> setup. Document the Homebrew cross toolchain and GNU tools needed to >>> build the hypervisor on macOS. >> What is the use-case? >=20 > My main use case is development and testing on MacOS. > I can do a lot of stuff by only recompiling and testing the hypervisor = without > changing the rest of my test environment and being able to do it direct= ly > on my mac is making things a lot faster and simpler. >=20 > I have been using this for a long time and someone asked me some weeks > ago if that was possible so i figured it would be a good idea to share.= >=20 > Cheers > Bertrand How are you testing? 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Mon, 9 Feb 2026 08:30:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/xenbus: better handle backend crash To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: linux-kernel@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Peng Jiang , Qiu-ji Chen , Jason Andryuk , "moderated list:XEN HYPERVISOR INTERFACE" References: <20251102032105.772670-1-marmarek@invisiblethingslab.com> <261c3ced-7f40-4c2f-93da-0e020f9bcf3a@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB 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2026 07:33:54.8317 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b95caecd-d533-46b0-3c6c-08de67ad945d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509E9.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR08MB10021 Hi Demi, > On 9 Feb 2026, at 08:28, Demi Marie Obenour wrote= : >=20 > On 2/9/26 02:26, Bertrand Marquis wrote: >> Hi Demi, >>=20 >>> On 8 Feb 2026, at 03:36, Demi Marie Obenour wro= te: >>>=20 >>> On 2/5/26 06:33, Bertrand Marquis wrote: >>>> Xen does not currently document how to build the hypervisor on macOS, = and >>>> there is no Darwin configuration for selecting a Homebrew-based GNU >>>> toolchain. Native builds are not supported; the hypervisor must be >>>> cross-built with a GNU toolchain and GNU make/sed. >>>>=20 >>>> Add a minimal Darwin.mk which selects the GNU tool definitions used by >>>> the macOS workflow and point to the build guide for required tools and >>>> setup. Document the Homebrew cross toolchain and GNU tools needed to >>>> build the hypervisor on macOS. >>> What is the use-case? >>=20 >> My main use case is development and testing on MacOS. >> I can do a lot of stuff by only recompiling and testing the hypervisor w= ithout >> changing the rest of my test environment and being able to do it directl= y >> on my mac is making things a lot faster and simpler. >>=20 >> I have been using this for a long time and someone asked me some weeks >> ago if that was possible so i figured it would be a good idea to share. >>=20 >> Cheers >> Bertrand >=20 > How are you testing? QEMU TCG? FVP that i trigger remotely, qemu locally or remotely, real targets depends= on what i have available. But while on the go, developing and testing compilation locally without eve= n testing on target so that i can later trigger on target is definitely very useful. Want some tips on how to develop while on Mac OS ? Cheers Bertrand > --=20 > Sincerely, > Demi Marie Obenour (she/her/hers) From xen-devel-bounces@lists.xenproject.org Mon Feb 09 09:02:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 09:02:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1224998.1531439 (Exim 4.92) (envelope-from ) id 1vpNAA-0006mB-KP; Mon, 09 Feb 2026 09:02:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1224998.1531439; Mon, 09 Feb 2026 09:02:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNAA-0006m4-F4; Mon, 09 Feb 2026 09:02:34 +0000 Received: by outflank-mailman (input) for mailman id 1224998; Mon, 09 Feb 2026 09:02:33 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNA9-0006ly-40 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 09:02:33 +0000 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [2a00:1450:4864:20::634]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1045eedb-0596-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 10:02:30 +0100 (CET) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-b872f1c31f1so495585666b.0 for ; Mon, 09 Feb 2026 01:02:30 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5b:2f01:4042:c03:ce4d:a5a1? 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Message-ID: Date: Mon, 9 Feb 2026 10:02:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/xenbus: better handle backend crash To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: linux-kernel@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Peng Jiang , Qiu-ji Chen , Jason Andryuk , "moderated list:XEN HYPERVISOR INTERFACE" References: <20251102032105.772670-1-marmarek@invisiblethingslab.com> <261c3ced-7f40-4c2f-93da-0e020f9bcf3a@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB 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Mon, 09 Feb 2026 01:07:28 -0800 (PST) Message-ID: <4a12e652-5b53-40d0-b701-d1f5b749dfa7@suse.com> Date: Mon, 9 Feb 2026 10:07:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/16] xen/riscv: introduce vcpu_kick() implementation To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <0335a7db0343d81ce4256482a464e7ba5df1c204.1769099885.git.oleksii.kurochko@gmail.com> <14d19350-0de8-4496-99e5-0ba76e421684@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <14d19350-0de8-4496-99e5-0ba76e421684@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:36, Oleksii Kurochko wrote: > > On 1/22/26 5:47 PM, Oleksii Kurochko wrote: >> Add a RISC-V implementation of vcpu_kick(), which unblocks the target >> vCPU and sends an event check IPI if the vCPU was running on another >> processor. This mirrors the behavior of Arm and enables proper vCPU >> wakeup handling on RISC-V. >> >> Remove the stub implementation from stubs.c, as it is now provided by >> arch/riscv/domain.c. >> >> Signed-off-by: Oleksii Kurochko >> Acked-by: Jan Beulich >> --- >> Changes in v2: >> - Add Acked-by: Jan Beulich . >> --- >> xen/arch/riscv/domain.c | 14 ++++++++++++++ >> xen/arch/riscv/stubs.c | 5 ----- >> 2 files changed, 14 insertions(+), 5 deletions(-) >> >> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >> index e38c0db62cac..13ac384c4b76 100644 >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -1,8 +1,10 @@ >> /* SPDX-License-Identifier: GPL-2.0-only */ >> >> +#include >> #include >> #include >> #include >> +#include >> #include >> >> #include >> @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) >> # error "Update vsieh" >> #endif >> } >> + >> +void vcpu_kick(struct vcpu *v) >> +{ >> + bool running = v->is_running; >> + >> + vcpu_unblock(v); >> + if ( running && v != current ) >> + { >> + perfc_incr(vcpu_kick); > > Because of this it is needed to introduce: > PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") > Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. > > I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h > just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have > it in arch specific perfc_defn.h? Arch-specific please - it's not used by x86 nor ppc. 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Mon, 09 Feb 2026 01:10:33 -0800 (PST) MIME-Version: 1.0 References: <9886df295f4c4365668576cc956299ee36f36c8b.1770115301.git.bertrand.marquis@arm.com> <24BD5FEB-06D2-40C0-A928-376A104B9E55@arm.com> In-Reply-To: <24BD5FEB-06D2-40C0-A928-376A104B9E55@arm.com> From: Jens Wiklander Date: Mon, 9 Feb 2026 10:10:21 +0100 X-Gm-Features: AZwV_QjTAhuTcnRM2PUZAl1grLFxtY5I1I4fFXNDa5F0J_pp5X_NMDZi6zzHWNM Message-ID: Subject: Re: [PATCH 02/12] xen/arm: ffa: Fix MEM_SHARE NS attribute handling To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Feb 6, 2026 at 5:18=E2=80=AFPM Bertrand Marquis wrote: > > > > > On 6 Feb 2026, at 10:28, Jens Wiklander wro= te: > > > > Hi Bertrand, > > > > On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis > > wrote: > >> > >> The FF-A memory attribute encoding is currently a literal value (0x2f)= , > >> which makes reviews and validation harder. In addition, MEM_SHARE > >> accepts the NS (non-secure) attribute bit even though the normal world > >> must not set it according to FF-A specification. > >> > >> Introduce named attribute bit masks and express FFA_NORMAL_MEM_REG_ATT= R > >> in terms of them for clarity. > >> > >> Reject MEM_SHARE descriptors with the NS bit set, returning > >> INVALID_PARAMETERS to match FF-A v1.1 rules that prohibit normal world > >> from setting this bit. > >> > >> Functional impact: MEM_SHARE now rejects descriptors with NS bit set, > >> which were previously accepted but violate FF-A specification. > > > > To be fair, it was also rejected earlier, but with a different error co= de. > > True, will adapt the impact comment to say: > > Functional impact: MEM_SHARE now rejects descriptors with NS bit set > with the right error code, INVALID_PARAMETER. > > Tell me if that would be ok for you and if it could be fixed on commit wi= th > your R-b if it is the case. Sounds good. With that, please add: Reviewed-by: Jens Wiklander Cheers, Jens > > > > >> > >> Signed-off-by: Bertrand Marquis > >> --- > >> xen/arch/arm/tee/ffa_private.h | 17 ++++++++++++++++- > >> xen/arch/arm/tee/ffa_shm.c | 6 ++++++ > >> 2 files changed, 22 insertions(+), 1 deletion(-) > >> > >> diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_pri= vate.h > >> index cd7ecabc7eff..b625f1c72914 100644 > >> --- a/xen/arch/arm/tee/ffa_private.h > >> +++ b/xen/arch/arm/tee/ffa_private.h > >> @@ -129,11 +129,26 @@ > >> #define FFA_HANDLE_HYP_FLAG BIT(63, ULL) > >> #define FFA_HANDLE_INVALID 0xffffffffffffffffULL > >> > >> +/* NS attribute was introduced in v1.1 */ > >> +#define FFA_MEM_ATTR_NS BIT(6, U) > >> + > >> +#define FFA_MEM_ATTR_TYPE_DEV (1U << 3) > >> +#define FFA_MEM_ATTR_TYPE_MEM (2U << 4) > >> + > >> +#define FFA_MEM_ATTR_NC (1U << 2) > >> +#define FFA_MEM_ATTR_WB (3U << 2) > >> + > >> +#define FFA_MEM_ATTR_NON_SHARE (0U) > >> +#define FFA_MEM_ATTR_OUT_SHARE (2U) > >> +#define FFA_MEM_ATTR_INN_SHARE (3U) > >> + > >> /* > >> * Memory attributes: Normal memory, Write-Back cacheable, Inner share= able > >> * Defined in FF-A-1.1-REL0 Table 10.18 at page 175. > >> */ > >> -#define FFA_NORMAL_MEM_REG_ATTR 0x2fU > >> +#define FFA_NORMAL_MEM_REG_ATTR (FFA_MEM_ATTR_TYPE_MEM | \ > >> + FFA_MEM_ATTR_WB | \ > >> + FFA_MEM_ATTR_INN_SHARE) > >> /* > >> * Memory access permissions: Read-write > >> * Defined in FF-A-1.1-REL0 Table 10.15 at page 168. > >> diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > >> index 8282bacf85d3..90800e44a86a 100644 > >> --- a/xen/arch/arm/tee/ffa_shm.c > >> +++ b/xen/arch/arm/tee/ffa_shm.c > >> @@ -512,6 +512,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *r= egs) > >> if ( ret ) > >> goto out_unlock; > >> > >> + if ( trans.mem_reg_attr & FFA_MEM_ATTR_NS ) > >> + { > >> + ret =3D FFA_RET_INVALID_PARAMETERS; > >> + goto out_unlock; > >> + } > >> + > >> if ( trans.mem_reg_attr !=3D FFA_NORMAL_MEM_REG_ATTR ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> -- > >> 2.50.1 (Apple Git-155) > >> > > > > Looks good, but I think the commit message needs a small update or > > clarification. > > Thanks. > > Cheers > Bertrand > > > > > Cheers, > > Jens > > From xen-devel-bounces@lists.xenproject.org Mon Feb 09 09:11:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 09:11:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225022.1531467 (Exim 4.92) (envelope-from ) id 1vpNIk-0000x4-VC; Mon, 09 Feb 2026 09:11:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225022.1531467; Mon, 09 Feb 2026 09:11:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNIk-0000wx-SK; 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On macOS, the tools we use are either GNU > >> compatible or we only rely on features supported by Mac OS, so > >> using the GNU tool definitions is appropriate. > >> > >> Add config/Darwin.mk to include StdGNU.mk and force > >> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow > >> the cross-compile path as we depend on the Linux ABI so compiling > >> on Mac OS is always a cross compilation case. > >> > >> An example of how to build the hypervisor for arm64 on Mac OS > >> (tools cannot be build for now) using a toolchain from brew: > >> - brew install aarch64-elf-gcc aarch64-elf-binutils > >> - cd xen > >> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang > > > > Instead of `cd xen` I would use `make xen ...`. > > Ack the 'cd xen' line is useless and should be removed. > > > > >> > >> Signed-off-by: Bertrand Marquis > > > > Acked-by: Roger Pau Monné > > > > One comment below. > > > >> --- > >> Changes since v3: > >> - set XEN_COMPILE_ARCH to unknown instead of Darwin > >> - list binutils as a dependency to install in brew in commit message > >> > >> Changes since v2: > >> - Subject was "xen: Add macOS hypervisor build configuration" > >> - Update Darwin.mk comments to more accurate versions (Jan) > >> - Remove the build-on-macos help as we have no dependency on anything > >> coming from brew anymore and the toolchain can be retrieved by lots of > >> other solutions than brew on mac os. Switch to a simple doc in the > >> commit message instead > >> --- > >> config/Darwin.mk | 7 +++++++ > >> 1 file changed, 7 insertions(+) > >> create mode 100644 config/Darwin.mk > >> > >> diff --git a/config/Darwin.mk b/config/Darwin.mk > >> new file mode 100644 > >> index 000000000000..176b27eac676 > >> --- /dev/null > >> +++ b/config/Darwin.mk > >> @@ -0,0 +1,7 @@ > >> +# Use GNU tool definitions as the tools we are using are either GNU compatible > >> +# or we only use features which are supported on Mac OS. > >> +include $(XEN_ROOT)/config/StdGNU.mk > >> + > >> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. > > > > Hm, is this actually fully true? What's the Linux ABI exactly here? > > > > FreeBSD builds Xen natively, and it's not using the Linux ABI. > > FreeBSD uses no specific -target to the compiler invocations, and the > > linker emulation is set to elf_x86_64_fbsd. > > > > I think the point here is that the toolchain must support building ELF > > objects / images, because that's the binary format supported by Xen. > > Whether it's Linux ELF or FreeBSD ELF doesn't make a difference for > > standalone environments like the Xen kernel. > > This file is also use while compiling the tools and for those you definitely > to cross compile as they depend on Linux ABI. I'm not an expert on this at all, but IMO the tools don't depend on the Linux ABI at all. Anyone can add the minimal OS-specific bindings required for the tools to work on environments different than Linux. We currently have {Net,Free}BSD and Linux. In the past we also had Solaris, but that has bit rotten. > Maybe that works on BSD > but i doubt this would be the case on mac os. I doubt we would ever have any need to build an OSX native toolchain, as it's unlikely (?) that we will ever get Xen support in the Darwin kernel. > Maybe we could simplify the sentence to not say anything we are unsure: > > # Cross compile on Mac OS > > Tell me if that works for you and i can submit a v5 or this might be possible to > fix on commit. I'm fine with it, I would like to hear Jan's opinion. Thanks, Roger. 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Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Denis Efremov , Jens Axboe References: <20260119182632.596369-1-jgross@suse.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260119182632.596369-1-jgross@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------CRkOi8Dd1YqtQXNyzdN5KBGQ" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------CRkOi8Dd1YqtQXNyzdN5KBGQ Content-Type: multipart/mixed; boundary="------------34IehBIppGcxVnrgQ2weG0lj"; protected-headers="v1" From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-block@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Denis Efremov , Jens Axboe Message-ID: <6ee93510-1f43-4cd2-952e-8ed3ce7ba0e5@suse.com> Subject: Re: [PATCH v4 0/6] x86: Cleanups around slow_down_io() References: <20260119182632.596369-1-jgross@suse.com> In-Reply-To: <20260119182632.596369-1-jgross@suse.com> --------------34IehBIppGcxVnrgQ2weG0lj Content-Type: multipart/mixed; boundary="------------gSU4Siyeh4zHWGT3RiPM5v62" --------------gSU4Siyeh4zHWGT3RiPM5v62 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 UElORz8NCg0KTm93IDMgd2Vla3Mgd2l0aG91dCBhbnkgcmVhY3Rpb24uLi4NCg0KT24gMTku MDEuMjYgMTk6MjYsIEp1ZXJnZW4gR3Jvc3Mgd3JvdGU6DQo+IFdoaWxlIGxvb2tpbmcgYXQg cGFyYXZpcnQgY2xlYW51cHMgSSBzdHVtYmxlZCBvdmVyIHNsb3dfZG93bl9pbygpIGFuZA0K PiB0aGUgcmVsYXRlZCBSRUFMTFlfU0xPV19JTyBkZWZpbmUuDQo+IA0KPiBEbyBzZXZlcmFs IGNsZWFudXBzLCByZXN1bHRpbmcgaW4gYSBkZWxldGlvbiBvZiBSRUFMTFlfU0xPV19JTyBh bmQgdGhlDQo+IGlvX2RlbGF5KCkgcGFyYXZpcnQgZnVuY3Rpb24gaG9vay4NCj4gDQo+IFBh dGNoIDQgaXMgcmVtb3ZpbmcgdGhlIGNvbmZpZyBvcHRpb25zIGZvciBzZWxlY3RpbmcgdGhl IGRlZmF1bHQgZGVsYXkNCj4gbWVjaGFuaXNtIGFuZCBzZXRzIHRoZSBkZWZhdWx0IHRvICJu byBkZWxheSIuIFRoaXMgaXMgaW4gcHJlcGFyYXRpb24gb2YNCj4gcmVtb3ZpbmcgdGhlIGlv X2RlbGF5KCkgZnVuY3Rpb25hbGl0eSBjb21wbGV0ZWx5LCBhcyBzdWdnZXN0ZWQgYnkgSW5n bw0KPiBNb2xuYXIuDQo+IA0KPiBQYXRjaCA1IGlzIGFkZGluZyBhbiBhZGRpdGlvbmFsIGNv bmZpZyBvcHRpb24gYWxsb3dpbmcgdG8gYXZvaWQNCj4gYnVpbGRpbmcgaW9fZGVsYXkuYyAo ZGVmYXVsdCBpcyBzdGlsbCB0byBidWlsZCBpdCkuDQo+IA0KPiBDaGFuZ2VzIGluIFYyOg0K PiAtIHBhdGNoZXMgMiBhbmQgMyBvZiBWMSBoYXZlIGJlZW4gYXBwbGllZA0KPiAtIG5ldyBw YXRjaGVzIDQgYW5kIDUNCj4gDQo+IENoYW5nZXMgaW4gVjM6DQo+IC0gcmViYXNlIHRvIHRp cC9tYXN0ZXIga2VybmVsIGJyYW5jaA0KPiANCj4gQ2hhbmdlcyBpbiBWNDoNCj4gLSBhZGQg cGF0Y2ggMSBhcyBwcmVyZXEgcGF0Y2ggdG8gdGhlIHNlcmllcw0KPiANCj4gSnVlcmdlbiBH cm9zcyAoNik6DQo+ICAgIHg4Ni9pcnFmbGFnczogRml4IGJ1aWxkIGZhaWx1cmUNCj4gICAg eDg2L3BhcmF2aXJ0OiBSZXBsYWNlIGlvX2RlbGF5KCkgaG9vayB3aXRoIGEgYm9vbA0KPiAg ICBibG9jay9mbG9wcHk6IERvbid0IHVzZSBSRUFMTFlfU0xPV19JTyBmb3IgZGVsYXlzDQo+ ICAgIHg4Ni9pbzogUmVtb3ZlIFJFQUxMWV9TTE9XX0lPIGhhbmRsaW5nDQo+ICAgIHg4Ni9p b19kZWxheTogU3dpdGNoIGlvX2RlbGF5KCkgZGVmYXVsdCBtZWNoYW5pc20gdG8gIm5vbmUi DQo+ICAgIHg4Ni9pb19kZWxheTogQWRkIGNvbmZpZyBvcHRpb24gZm9yIGNvbnRyb2xsaW5n IGJ1aWxkIG9mIGlvX2RlbGF5Lg0KPiANCj4gICBhcmNoL3g4Ni9LY29uZmlnICAgICAgICAg ICAgICAgICAgICAgIHwgIDggKysrDQo+ICAgYXJjaC94ODYvS2NvbmZpZy5kZWJ1ZyAgICAg ICAgICAgICAgICB8IDMwIC0tLS0tLS0tLS0NCj4gICBhcmNoL3g4Ni9pbmNsdWRlL2FzbS9m bG9wcHkuaCAgICAgICAgIHwgMzEgKysrKysrKystLQ0KPiAgIGFyY2gveDg2L2luY2x1ZGUv YXNtL2lvLmggICAgICAgICAgICAgfCAxOSArKysrLS0tDQo+ICAgYXJjaC94ODYvaW5jbHVk ZS9hc20vaXJxZmxhZ3MuaCAgICAgICB8ICA2ICstDQo+ICAgYXJjaC94ODYvaW5jbHVkZS9h c20vcGFyYXZpcnQtYmFzZS5oICB8ICA2ICsrDQo+ICAgYXJjaC94ODYvaW5jbHVkZS9hc20v cGFyYXZpcnQuaCAgICAgICB8IDExIC0tLS0NCj4gICBhcmNoL3g4Ni9pbmNsdWRlL2FzbS9w YXJhdmlydF90eXBlcy5oIHwgIDIgLQ0KPiAgIGFyY2gveDg2L2tlcm5lbC9NYWtlZmlsZSAg ICAgICAgICAgICAgfCAgMyArLQ0KPiAgIGFyY2gveDg2L2tlcm5lbC9jcHUvdm13YXJlLmMg ICAgICAgICAgfCAgMiArLQ0KPiAgIGFyY2gveDg2L2tlcm5lbC9pb19kZWxheS5jICAgICAg ICAgICAgfCA4MSArLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0NCj4gICBhcmNoL3g4Ni9r ZXJuZWwva3ZtLmMgICAgICAgICAgICAgICAgIHwgIDggKy0tDQo+ICAgYXJjaC94ODYva2Vy bmVsL3BhcmF2aXJ0LmMgICAgICAgICAgICB8ICAzICstDQo+ICAgYXJjaC94ODYva2VybmVs L3NldHVwLmMgICAgICAgICAgICAgICB8ICA0ICstDQo+ICAgYXJjaC94ODYveGVuL2VubGln aHRlbl9wdi5jICAgICAgICAgICB8ICA2ICstDQo+ICAgZHJpdmVycy9ibG9jay9mbG9wcHku YyAgICAgICAgICAgICAgICB8ICAyIC0NCj4gICAxNiBmaWxlcyBjaGFuZ2VkLCA2MyBpbnNl cnRpb25zKCspLCAxNTkgZGVsZXRpb25zKC0pDQo+IA0KDQo= --------------gSU4Siyeh4zHWGT3RiPM5v62 Content-Type: application/pgp-keys; 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Mon, 09 Feb 2026 01:13:22 -0800 (PST) Message-ID: <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> Date: Mon, 9 Feb 2026 10:13:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260204233712.3396752-2-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260204233712.3396752-2-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 00:37, Stefano Stabellini wrote: > Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from > global to VIRQ_DOMAIN to allow other domains to bind to it. > > Note that Linux silently falls back to polling when binding fails, which > masks the issue. > > Signed-off-by: Jason Andryuk > Signed-off-by: Stefano Stabellini Technically this is an ABI change, and hence I'm uncertain it can go without that aspect being at least mentioned, perhaps even its implications properly discussed. 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Mon, 09 Feb 2026 01:21:22 -0800 (PST) Message-ID: <608472d0-517c-4bc5-b5c1-c278c4f6620b@suse.com> Date: Mon, 9 Feb 2026 10:21:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/12] const-ify vendor checks To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > Hi, > > This series is a big revamp of vendor-checking to enable it to perform DCE. > It improves all configurations useful in practice at minimal cost in the full > build, and at a massive advantage for the single-vendor case. Many ifdefs can > go away as a side effect of the series. > > This series depends on cross-vendor removal: > https://lore.kernel.org/xen-devel/20260205170923.38425-1-alejandro.garciavallejo@amd.com/T/#m4c3d318f37e4f24d0f8c62b104221aa5d428cebc > > Patch 1 in this series matches that of cross-vendor removal. It's logically > required, but that's the single requirement. > > High level description > ====================== > > When compared to the RFC this makes a different approach The series introduces > cpu_vendor() which maps to a constant in the single vendor case and to > (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDORS is a > mask of the compile-time chosen vendors. This enables the compiler to detect > dead-code at the uses and remove all unreachable branches, including in > switches. > > When compared to the x86_vendor_is() macro introduced in the RFC, this is > simpler. It achieves MOST of what the older macro did without touching the > switches, with a few caveats: > > 1. Compiled-out vendors cause a panic, they don't fallback onto the unknown > vendor case. In retrospect, this is a much saner thing to do. I'm unconvinced here. Especially our Centaur and Shanghai support is at best rudimentary. Treating those worse when configured-out than when configured-in feels questionable. > 2. equalities and inequalities have been replaced by equivalent (cpu_vendor() & ...) > forms. This isn't stylistic preference. This form allows the compiler > to merge the compared-against constant with X86_ENABLED_VENDORS, yielding > much better codegen throughout the tree. > > The effect of (2) triples the delta in the full build below. > > Some differences might be attributable to the change from policy vendor checks > to boot_cpu_data. In the case of the emulator it caused a 400 bytes increase > due to the way it checks using LOTS of macro invocations, so I left that one > piece using the policy vendor except for the single vendor case. For the emulator I'd like to point out this question that I raised in the AVX10 series: "Since it'll be reducing code size, we may want to further convert host_and_vcpu_must_have() to just vcpu_must_have() where appropriate (should be [almost?] everywhere)." Sadly there was no feedback an that (or really on almost all of that work) at all so far. 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Mon, 09 Feb 2026 01:31:26 -0800 (PST) MIME-Version: 1.0 References: <97a064c81ee5ea26774c189538f9f1e37dd3eebc.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <97a064c81ee5ea26774c189538f9f1e37dd3eebc.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Mon, 9 Feb 2026 10:31:15 +0100 X-Gm-Features: AZwV_Qh3Ing8UIqZBqcXWB5tfalsZrcsBW9TLoWWNf-WEJ9ogJ8KgZPu6NeBnrg Message-ID: Subject: Re: [PATCH 03/12] xen/arm: ffa: Harden shm page parsing To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > get_shm_pages() uses unchecked address arithmetic and does not enforce > alignment, so malformed descriptors can cause overflow or slip through > validation. The reclaim path also repeats handle-to-shm-mem conversion > in multiple places, duplicating error handling. > > Harden page parsing and reclaim handling: > - add ffa_safe_addr_add() and use it to detect address overflows > - enforce alignment checks in get_shm_pages() and return FF-A errors > - introduce ffa_secure_reclaim() and use it for MEM_RECLAIM and teardown > - simplify ffa_mem_share() argument handling and allow max page count > > Functional impact: invalid or misaligned memory ranges now fail earlier > with proper error codes; behavior for valid descriptors is unchanged. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_private.h | 11 +++++++ > xen/arch/arm/tee/ffa_shm.c | 57 +++++++++++++++++----------------- > 2 files changed, 40 insertions(+), 28 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index b625f1c72914..58562d8e733c 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -632,4 +632,15 @@ static inline void ffa_uuid_set(struct ffa_uuid *id,= uint32_t val0, > id->val[1] =3D ((uint64_t)val3 << 32U) | val2; > } > > +/* > + * Common overflow-safe helper to verify that adding a number of pages t= o an > + * address will not wrap around. > + */ > +static inline bool ffa_safe_addr_add(uint64_t addr, uint64_t pages) > +{ > + uint64_t off =3D pages * FFA_PAGE_SIZE; > + > + return (off / FFA_PAGE_SIZE) =3D=3D pages && addr <=3D UINT64_MAX - = off; > +} > + > #endif /*__FFA_PRIVATE_H__*/ > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 90800e44a86a..4c0b45cde6ee 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -96,16 +96,14 @@ struct ffa_shm_mem { > struct page_info *pages[]; > }; > > -static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, > - register_t addr, uint32_t pg_count, > - uint64_t *handle) > +static int32_t ffa_mem_share(uint32_t tot_len, uint64_t *handle) > { > struct arm_smccc_1_2_regs arg =3D { > .a0 =3D FFA_MEM_SHARE_64, > .a1 =3D tot_len, > - .a2 =3D frag_len, > - .a3 =3D addr, > - .a4 =3D pg_count, > + .a2 =3D tot_len, > + .a3 =3D 0, > + .a4 =3D 0, > }; > struct arm_smccc_1_2_regs resp; > > @@ -131,12 +129,16 @@ static int32_t ffa_mem_share(uint32_t tot_len, uint= 32_t frag_len, > } > } > > -static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, > - uint32_t flags) > +static int32_t ffa_secure_reclaim(struct ffa_shm_mem *shm, uint32_t flag= s) I agree with moving the uint64_to_regpair() call into this function, but I'm puzzled by the new name. What's secure? > { > + register_t handle_hi; > + register_t handle_lo; > + > if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) > return FFA_RET_NOT_SUPPORTED; > > + uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); > + > return ffa_simple_call(FFA_MEM_RECLAIM, handle_lo, handle_hi, flags,= 0); > } > > @@ -145,7 +147,7 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, ui= nt32_t handle_hi, > * this function fails then the caller is still expected to call > * put_shm_pages() as a cleanup. > */ > -static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, > +static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, > const struct ffa_address_range *range, > uint32_t range_count) > { > @@ -156,17 +158,26 @@ static int get_shm_pages(struct domain *d, struct f= fa_shm_mem *shm, > p2m_type_t t; > uint64_t addr; > uint64_t page_count; > + uint64_t gaddr; > > for ( n =3D 0; n < range_count; n++ ) > { > page_count =3D ACCESS_ONCE(range[n].page_count); > addr =3D ACCESS_ONCE(range[n].address); > + > + if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) > + return FFA_RET_INVALID_PARAMETERS; > + > for ( m =3D 0; m < page_count; m++ ) > { > if ( pg_idx >=3D shm->page_count ) > return FFA_RET_INVALID_PARAMETERS; > > - gfn =3D gaddr_to_gfn(addr + m * FFA_PAGE_SIZE); > + if ( !ffa_safe_addr_add(addr, m) ) > + return FFA_RET_INVALID_PARAMETERS; > + > + gaddr =3D addr + m * FFA_PAGE_SIZE; > + gfn =3D gaddr_to_gfn(gaddr); > shm->pages[pg_idx] =3D get_page_from_gfn(d, gfn_x(gfn), &t, > P2M_ALLOC); > if ( !shm->pages[pg_idx] ) > @@ -180,7 +191,7 @@ static int get_shm_pages(struct domain *d, struct ffa= _shm_mem *shm, > > /* The ranges must add up */ > if ( pg_idx < shm->page_count ) > - return FFA_RET_INVALID_PARAMETERS; > + return FFA_RET_INVALID_PARAMETERS; > > return FFA_RET_OK; > } > @@ -198,15 +209,11 @@ static void put_shm_pages(struct ffa_shm_mem *shm) > > static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) > { > - bool ret =3D true; > + bool ret =3D false; > > spin_lock(&ctx->lock); > > - if ( ctx->shm_count >=3D FFA_MAX_SHM_COUNT ) > - { > - ret =3D false; > - } > - else > + if ( ctx->shm_count < FFA_MAX_SHM_COUNT ) > { > /* > * If this is the first shm added, increase the domain reference > @@ -217,6 +224,7 @@ static bool inc_ctx_shm_count(struct domain *d, struc= t ffa_ctx *ctx) > get_knownalive_domain(d); > > ctx->shm_count++; > + ret =3D true; > } > > spin_unlock(&ctx->lock); > @@ -251,7 +259,7 @@ static struct ffa_shm_mem *alloc_ffa_shm_mem(struct d= omain *d, > struct ffa_ctx *ctx =3D d->arch.tee; > struct ffa_shm_mem *shm; > > - if ( page_count >=3D FFA_MAX_SHM_PAGE_COUNT ) > + if ( page_count > FFA_MAX_SHM_PAGE_COUNT ) > return NULL; > if ( !inc_ctx_shm_count(d, ctx) ) > return NULL; > @@ -367,7 +375,7 @@ static int share_shm(struct ffa_shm_mem *shm) > init_range(addr_range, pa); > } > > - ret =3D ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle); Please remove frag_len from share_shm() since it's not needed any longer. Cheers, Jens > + ret =3D ffa_mem_share(tot_len, &shm->handle); > > out: > ffa_rxtx_spmc_tx_release(); > @@ -637,8 +645,6 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint3= 2_t flags) > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > struct ffa_shm_mem *shm; > - register_t handle_hi; > - register_t handle_lo; > int32_t ret; > > if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) > @@ -652,8 +658,7 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint3= 2_t flags) > if ( !shm ) > return FFA_RET_INVALID_PARAMETERS; > > - uint64_to_regpair(&handle_hi, &handle_lo, handle); > - ret =3D ffa_mem_reclaim(handle_lo, handle_hi, flags); > + ret =3D ffa_secure_reclaim(shm, flags); > > if ( ret ) > { > @@ -677,11 +682,7 @@ bool ffa_shm_domain_destroy(struct domain *d) > > list_for_each_entry_safe(shm, tmp, &ctx->shm_list, list) > { > - register_t handle_hi; > - register_t handle_lo; > - > - uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); > - res =3D ffa_mem_reclaim(handle_lo, handle_hi, 0); > + res =3D ffa_secure_reclaim(shm, 0); > switch ( res ) { > case FFA_RET_OK: > printk(XENLOG_G_DEBUG "%pd: ffa: Reclaimed handle %#lx\n", > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Mon Feb 09 09:35:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 09:35:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225067.1531518 (Exim 4.92) (envelope-from ) id 1vpNfh-0006Hr-Rs; Mon, 09 Feb 2026 09:35:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225067.1531518; Mon, 09 Feb 2026 09:35:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNfh-0006Hk-Ou; Mon, 09 Feb 2026 09:35:09 +0000 Received: by outflank-mailman (input) for mailman id 1225067; Mon, 09 Feb 2026 09:35:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNfg-0006He-ED for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 09:35:08 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9db011c1-059a-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 10:35:05 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-4376c0bffc1so686698f8f.0 for ; Mon, 09 Feb 2026 01:35:05 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 01:35:04 -0800 (PST) Message-ID: <7180e7a5-3075-4237-b23f-ddc0e370f692@suse.com> Date: Mon, 9 Feb 2026 10:35:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Add Darwin.mk for GNU toolchains To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.02.2026 18:25, Roger Pau Monné wrote: > On Fri, Feb 06, 2026 at 05:21:44PM +0100, Bertrand Marquis wrote: >> Xen does not provide a Darwin build configuration for selecting >> GNU tool definitions. On macOS, the tools we use are either GNU >> compatible or we only rely on features supported by Mac OS, so >> using the GNU tool definitions is appropriate. >> >> Add config/Darwin.mk to include StdGNU.mk and force >> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow >> the cross-compile path as we depend on the Linux ABI so compiling >> on Mac OS is always a cross compilation case. >> >> An example of how to build the hypervisor for arm64 on Mac OS >> (tools cannot be build for now) using a toolchain from brew: >> - brew install aarch64-elf-gcc aarch64-elf-binutils >> - cd xen >> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang > > Instead of `cd xen` I would use `make xen ...`. There are subtle differences, though. (Really I first wondered whether you omitted -C ...) >> --- /dev/null >> +++ b/config/Darwin.mk >> @@ -0,0 +1,7 @@ >> +# Use GNU tool definitions as the tools we are using are either GNU compatible >> +# or we only use features which are supported on Mac OS. >> +include $(XEN_ROOT)/config/StdGNU.mk >> + >> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. > > Hm, is this actually fully true? What's the Linux ABI exactly here? > > FreeBSD builds Xen natively, and it's not using the Linux ABI. > FreeBSD uses no specific -target to the compiler invocations, and the > linker emulation is set to elf_x86_64_fbsd. > > I think the point here is that the toolchain must support building ELF > objects / images, because that's the binary format supported by Xen. > Whether it's Linux ELF or FreeBSD ELF doesn't make a difference for > standalone environments like the Xen kernel. It's the ELF SVR4 psABI that we're after. This is more than just building ELF objects: It's also about calling convention, for example. Which would not matter much if Xen code was all written in C, as the ABI Xen surfaces to guests is entirely different anyway. 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This mirrors the behavior of Arm and enables proper vCPU >>> wakeup handling on RISC-V. >>> >>> Remove the stub implementation from stubs.c, as it is now provided by >>> arch/riscv/domain.c. >>> >>> Signed-off-by: Oleksii Kurochko >>> Acked-by: Jan Beulich >>> --- >>> Changes in v2: >>> - Add Acked-by: Jan Beulich . >>> --- >>> xen/arch/riscv/domain.c | 14 ++++++++++++++ >>> xen/arch/riscv/stubs.c | 5 ----- >>> 2 files changed, 14 insertions(+), 5 deletions(-) >>> >>> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >>> index e38c0db62cac..13ac384c4b76 100644 >>> --- a/xen/arch/riscv/domain.c >>> +++ b/xen/arch/riscv/domain.c >>> @@ -1,8 +1,10 @@ >>> /* SPDX-License-Identifier: GPL-2.0-only */ >>> >>> +#include >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> #include >>> @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) >>> # error "Update vsieh" >>> #endif >>> } >>> + >>> +void vcpu_kick(struct vcpu *v) >>> +{ >>> + bool running = v->is_running; >>> + >>> + vcpu_unblock(v); >>> + if ( running && v != current ) >>> + { >>> + perfc_incr(vcpu_kick); >> Because of this it is needed to introduce: >> PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >> Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. >> >> I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h >> just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have >> it in arch specific perfc_defn.h? > Arch-specific please - it's not used by x86 nor ppc. Then I will do the following changes: diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index 3824f31c395c..86c56251d5d7 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -7,7 +7,6 @@ generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h generic-y += percpu.h -generic-y += perfc_defn.h generic-y += random.h generic-y += softirq.h generic-y += vm_event.h diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h new file mode 100644 index 000000000000..4fc161f1abad --- /dev/null +++ b/xen/arch/riscv/include/asm/perfc_defn.h @@ -0,0 +1,7 @@ +/* This file is intended to be included multiple times. */ +/*#ifndef __XEN_PERFC_DEFN_H__*/ +/*#define __XEN_PERFC_DEFN_H__*/ + +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") + +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */ and add the following to commit message: Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, for example, by randconfig what will lead to CI build issues. Note that I keep __XEN_PERFC_DEFN_H__ as other archictectures use the same, not something like ASM____PERFC_DEFN_H. Let me know if these changes are okay for you and if I can keep your Acked-by for this patch. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 09 09:45:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 09:45:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225084.1531538 (Exim 4.92) (envelope-from ) id 1vpNpp-0000Gd-3r; Mon, 09 Feb 2026 09:45:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225084.1531538; Mon, 09 Feb 2026 09:45:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNpp-0000GW-0F; Mon, 09 Feb 2026 09:45:37 +0000 Received: by outflank-mailman (input) for mailman id 1225084; Mon, 09 Feb 2026 09:45:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpNpo-0000GN-1F for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 09:45:36 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 148d1fc3-059c-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 10:45:34 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-480142406b3so32077595e9.1 for ; Mon, 09 Feb 2026 01:45:34 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 01:45:33 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 10:45:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Add Darwin.mk for GNU toolchains To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <28DF7F1E-BAA3-49AC-8A53-75100BAE74B5@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 10:11, Roger Pau Monné wrote: > On Mon, Feb 09, 2026 at 07:30:30AM +0000, Bertrand Marquis wrote: >> Hi Roger, >> >>> On 6 Feb 2026, at 18:25, Roger Pau Monné wrote: >>> >>> On Fri, Feb 06, 2026 at 05:21:44PM +0100, Bertrand Marquis wrote: >>>> Xen does not provide a Darwin build configuration for selecting >>>> GNU tool definitions. On macOS, the tools we use are either GNU >>>> compatible or we only rely on features supported by Mac OS, so >>>> using the GNU tool definitions is appropriate. >>>> >>>> Add config/Darwin.mk to include StdGNU.mk and force >>>> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow >>>> the cross-compile path as we depend on the Linux ABI so compiling >>>> on Mac OS is always a cross compilation case. >>>> >>>> An example of how to build the hypervisor for arm64 on Mac OS >>>> (tools cannot be build for now) using a toolchain from brew: >>>> - brew install aarch64-elf-gcc aarch64-elf-binutils >>>> - cd xen >>>> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang >>> >>> Instead of `cd xen` I would use `make xen ...`. >> >> Ack the 'cd xen' line is useless and should be removed. >> >>> >>>> >>>> Signed-off-by: Bertrand Marquis >>> >>> Acked-by: Roger Pau Monné >>> >>> One comment below. >>> >>>> --- >>>> Changes since v3: >>>> - set XEN_COMPILE_ARCH to unknown instead of Darwin >>>> - list binutils as a dependency to install in brew in commit message >>>> >>>> Changes since v2: >>>> - Subject was "xen: Add macOS hypervisor build configuration" >>>> - Update Darwin.mk comments to more accurate versions (Jan) >>>> - Remove the build-on-macos help as we have no dependency on anything >>>> coming from brew anymore and the toolchain can be retrieved by lots of >>>> other solutions than brew on mac os. Switch to a simple doc in the >>>> commit message instead >>>> --- >>>> config/Darwin.mk | 7 +++++++ >>>> 1 file changed, 7 insertions(+) >>>> create mode 100644 config/Darwin.mk >>>> >>>> diff --git a/config/Darwin.mk b/config/Darwin.mk >>>> new file mode 100644 >>>> index 000000000000..176b27eac676 >>>> --- /dev/null >>>> +++ b/config/Darwin.mk >>>> @@ -0,0 +1,7 @@ >>>> +# Use GNU tool definitions as the tools we are using are either GNU compatible >>>> +# or we only use features which are supported on Mac OS. >>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>> + >>>> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. >>> >>> Hm, is this actually fully true? What's the Linux ABI exactly here? >>> >>> FreeBSD builds Xen natively, and it's not using the Linux ABI. >>> FreeBSD uses no specific -target to the compiler invocations, and the >>> linker emulation is set to elf_x86_64_fbsd. >>> >>> I think the point here is that the toolchain must support building ELF >>> objects / images, because that's the binary format supported by Xen. >>> Whether it's Linux ELF or FreeBSD ELF doesn't make a difference for >>> standalone environments like the Xen kernel. >> >> This file is also use while compiling the tools and for those you definitely >> to cross compile as they depend on Linux ABI. > > I'm not an expert on this at all, but IMO the tools don't depend on > the Linux ABI at all. Anyone can add the minimal OS-specific bindings > required for the tools to work on environments different than Linux. > We currently have {Net,Free}BSD and Linux. In the past we also had > Solaris, but that has bit rotten. > >> Maybe that works on BSD >> but i doubt this would be the case on mac os. > > I doubt we would ever have any need to build an OSX native toolchain, > as it's unlikely (?) that we will ever get Xen support in the Darwin > kernel. If Darwin has some way to load "modules" (e.g. drivers) into the kernel, it may in principle be possible to run OSX as a HVM-Dom0, with a Xen driver loaded separately. That's far fetched, I know. >> Maybe we could simplify the sentence to not say anything we are unsure: >> >> # Cross compile on Mac OS >> >> Tell me if that works for you and i can submit a v5 or this might be possible to >> fix on commit. > > I'm fine with it, I would like to hear Jan's opinion. As long as it's clear that all of this is only about building the hypervisor (which doesn't look to be the case right now beyond the example given in the commit message, which may be taken as really only an example), that's okay [1]. I'd still prefer to mention the SVR4 ABI here, though, to at least somewhat explain the "always cross" aspect. I can make edits while committing, but I'm unsure whether that's wanted in this case. Jan [1] Yet better might be if we refused to build other than the hypervisor. I'm unsure though how easy it would be to achieve that in an at least halfway tidy manner. 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Mon, 09 Feb 2026 01:51:58 -0800 (PST) Message-ID: <87533cdf-c8cc-4a86-9946-a999e8d31b82@suse.com> Date: Mon, 9 Feb 2026 10:51:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/16] xen/riscv: introduce vcpu_kick() implementation To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <0335a7db0343d81ce4256482a464e7ba5df1c204.1769099885.git.oleksii.kurochko@gmail.com> <14d19350-0de8-4496-99e5-0ba76e421684@gmail.com> <4a12e652-5b53-40d0-b701-d1f5b749dfa7@suse.com> <29006d8a-e003-4451-99af-0eef8f7d1c08@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <29006d8a-e003-4451-99af-0eef8f7d1c08@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 10:40, Oleksii Kurochko wrote: > > On 2/9/26 10:07 AM, Jan Beulich wrote: >> On 06.02.2026 17:36, Oleksii Kurochko wrote: >>> On 1/22/26 5:47 PM, Oleksii Kurochko wrote: >>>> Add a RISC-V implementation of vcpu_kick(), which unblocks the target >>>> vCPU and sends an event check IPI if the vCPU was running on another >>>> processor. This mirrors the behavior of Arm and enables proper vCPU >>>> wakeup handling on RISC-V. >>>> >>>> Remove the stub implementation from stubs.c, as it is now provided by >>>> arch/riscv/domain.c. >>>> >>>> Signed-off-by: Oleksii Kurochko >>>> Acked-by: Jan Beulich >>>> --- >>>> Changes in v2: >>>> - Add Acked-by: Jan Beulich . >>>> --- >>>> xen/arch/riscv/domain.c | 14 ++++++++++++++ >>>> xen/arch/riscv/stubs.c | 5 ----- >>>> 2 files changed, 14 insertions(+), 5 deletions(-) >>>> >>>> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >>>> index e38c0db62cac..13ac384c4b76 100644 >>>> --- a/xen/arch/riscv/domain.c >>>> +++ b/xen/arch/riscv/domain.c >>>> @@ -1,8 +1,10 @@ >>>> /* SPDX-License-Identifier: GPL-2.0-only */ >>>> >>>> +#include >>>> #include >>>> #include >>>> #include >>>> +#include >>>> #include >>>> >>>> #include >>>> @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) >>>> # error "Update vsieh" >>>> #endif >>>> } >>>> + >>>> +void vcpu_kick(struct vcpu *v) >>>> +{ >>>> + bool running = v->is_running; >>>> + >>>> + vcpu_unblock(v); >>>> + if ( running && v != current ) >>>> + { >>>> + perfc_incr(vcpu_kick); >>> Because of this it is needed to introduce: >>> PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >>> Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. >>> >>> I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h >>> just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have >>> it in arch specific perfc_defn.h? >> Arch-specific please - it's not used by x86 nor ppc. > > Then I will do the following changes: > > diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile > index 3824f31c395c..86c56251d5d7 100644 > --- a/xen/arch/riscv/include/asm/Makefile > +++ b/xen/arch/riscv/include/asm/Makefile > @@ -7,7 +7,6 @@ generic-y += hypercall.h > generic-y += iocap.h > generic-y += irq-dt.h > generic-y += percpu.h > -generic-y += perfc_defn.h > generic-y += random.h > generic-y += softirq.h > generic-y += vm_event.h > diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h > new file mode 100644 > index 000000000000..4fc161f1abad > --- /dev/null > +++ b/xen/arch/riscv/include/asm/perfc_defn.h > @@ -0,0 +1,7 @@ > +/* This file is intended to be included multiple times. */ > +/*#ifndef __XEN_PERFC_DEFN_H__*/ > +/*#define __XEN_PERFC_DEFN_H__*/ > + > +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") > + > +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */ > > and add the following to commit message: > Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for > vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although > CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, > for example, by randconfig what will lead to CI build issues. > > Note that I keep __XEN_PERFC_DEFN_H__ as other archictectures use the same, > not something like ASM____PERFC_DEFN_H. Please don't copy this mistake. I actually question the commented-out pre- processor directives altogether: Misra also has a rule against commented- out code (directive 4.4, which we didn't accept [yet], but which exists nevertheless). Yet at the very least what's commented out should not be obviously wrong. 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<63031607-4b36-403b-8135-c5b271332b3a@suse.com> Date: Mon, 9 Feb 2026 10:54:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] x86: Sort headers To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20260206131305.2675905-1-andrew.cooper3@citrix.com> <20260206131305.2675905-2-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 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"xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: Re: [PATCH v4] xen: Add Darwin.mk for GNU toolchains Thread-Topic: [PATCH v4] xen: Add Darwin.mk for GNU toolchains Thread-Index: AQHcl4TDvkxax6jik0exjnZrMlGqw7V17BsAgAQQvwCAABwvgIAACZqAgAAEx4A= Date: Mon, 9 Feb 2026 10:02:52 +0000 Message-ID: References: <28DF7F1E-BAA3-49AC-8A53-75100BAE74B5@arm.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3864.300.41.1.7) Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: PR3PR08MB5593:EE_|VI0PR08MB11408:EE_|AMS1EPF0000003F:EE_|PA4PR08MB6221:EE_ X-MS-Office365-Filtering-Correlation-Id: d16b6253-ea6b-45dd-74a7-08de67c2898c x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8803 On Mon Feb 9, 2026 at 10:21 AM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> Hi, >>=20 >> This series is a big revamp of vendor-checking to enable it to perform D= CE. >> It improves all configurations useful in practice at minimal cost in the= full >> build, and at a massive advantage for the single-vendor case. Many ifdef= s can >> go away as a side effect of the series. >>=20 >> This series depends on cross-vendor removal: >> https://lore.kernel.org/xen-devel/20260205170923.38425-1-alejandro.gar= ciavallejo@amd.com/T/#m4c3d318f37e4f24d0f8c62b104221aa5d428cebc >>=20 >> Patch 1 in this series matches that of cross-vendor removal. It's logica= lly >> required, but that's the single requirement. >>=20 >> High level description >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >>=20 >> When compared to the RFC this makes a different approach The series intr= oduces >> cpu_vendor() which maps to a constant in the single vendor case and to >> (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDORS = is a >> mask of the compile-time chosen vendors. This enables the compiler to de= tect >> dead-code at the uses and remove all unreachable branches, including in >> switches. >>=20 >> When compared to the x86_vendor_is() macro introduced in the RFC, this i= s >> simpler. It achieves MOST of what the older macro did without touching t= he >> switches, with a few caveats: >>=20 >> 1. Compiled-out vendors cause a panic, they don't fallback onto the un= known >> vendor case. In retrospect, this is a much saner thing to do. > > I'm unconvinced here. Especially our Centaur and Shanghai support is at b= est > rudimentary. Treating those worse when configured-out than when configure= d-in > feels questionable. Isn't that the point of configuring out? Besides the philosophical matter of whether or not a compiled-out vendor should be allowed to run there's the more practical matter of what to do with the x86_vendor field of boot_cpu_data. Because at that point our take that cross-vendor support is forbidden is a lot weaker. If I can run an AMD-hypervisor on an Intel host, what then? What policies would be allowed?= If I wipe x86_vendor then policies with some unknown vendor would be fine. Shoul= d the leaves match too? If I do not wipe the field, should I do black magic to en= sure the behaviour is different depending on whether the vendor is compiled in o= r not? What if I want to migrate a VM currently running in this hypothetical hypervisor? The rules becomes seriously complex. It's just a lot cleaner to take the stance that compiled out vendors can't = run. Then everything else is crystal clear and we avoid a universe's worth of co= rner cases. I expect upstream Xen to support all cases (I'm skeptical about the utility of the unknown vendor path, but oh well), but many downstreams migh= t benefit from killing off support for vendors they really will never touch. > >> 2. equalities and inequalities have been replaced by equivalent (cpu_v= endor() & ...) >> forms. This isn't stylistic preference. This form allows the compil= er >> to merge the compared-against constant with X86_ENABLED_VENDORS, yi= elding >> much better codegen throughout the tree. >>=20 >> The effect of (2) triples the delta in the full build below. >>=20 >> Some differences might be attributable to the change from policy vendor = checks >> to boot_cpu_data. In the case of the emulator it caused a 400 bytes incr= ease >> due to the way it checks using LOTS of macro invocations, so I left that= one >> piece using the policy vendor except for the single vendor case. > > For the emulator I'd like to point out this question that I raised in the > AVX10 series: There's no optimisation shortage for the emulator. For that patch I just ensure I didn't make a tricky situation worse. It is much better in the sin= gle-vendor case. > > "Since it'll be reducing code size, we may want to further convert > host_and_vcpu_must_have() to just vcpu_must_have() where appropriate > (should be [almost?] everywhere)." > > Sadly there was no feedback an that (or really on almost all of that work= ) at > all so far. It sounds fairly orthogonal to this, unless I'm missing the point. In principle that would be fine. the vCPU features whose emulation requires special instructions are most definitely a subset of those of the host anyw= ay. I agree many cases could be simplified as you describe. I do see a worrying danger of XSA should the max policy ever exceed the capabilities of the host on a feature required for emulating some instructi= on for that very feature. Then the guest could abuse the emulator to trigger #= UD inside the hypervisor's emulation path. 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Mon, 09 Feb 2026 02:09:36 -0800 (PST) Message-ID: <210d133e-fa60-4116-b65f-039e46e31738@suse.com> Date: Mon, 9 Feb 2026 11:09:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] x86/memtype: Deduplicate rendering of X86_MT_* To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20260206131305.2675905-1-andrew.cooper3@citrix.com> <20260206131305.2675905-3-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206131305.2675905-3-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.02.2026 14:13, Andrew Cooper wrote: > The MTRR infrastructure has two different copies of mtrr_attrib_to_str(), one > in .init and one in regular .text. EPT has another variation. > > All 3 are incomplete; they encode only the non-reserved values for the task, > but hiding reserved values with ?'s is detrimental to the diagnostic purpose > of these existing in the first place. > > Implement a single function which covers all the architectural values. > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > > Yes I know EPT tries to render the reserved reserved encodings numerically. > It's a cute trick, but does get foiled by the '[MTRR_NUM_TYPES] = "??";' row > which breaks things. Does it? 7 isn't UC- there, but is instead reserved, which we leverage to get EPT-misconfig exits. 7 also isn't UC- when used in MTRRs; that's a PAT-only type. I think we better wouldn't mix those. Therefore I'm also not really happy with x86_mt_name() as a name - it should be clear from the name whether this is about MTRR (and EPT memory type) or PAT. > Putting this in traps.c isn't great, but there isn't an obviously better place > either. Any reason not to put them in one of the two mtrr/*.c files? Are we entertaining the idea of allowing to compile out mtrr/? > @@ -214,7 +201,7 @@ static void __init print_mtrr_state(const char *level) > level, i, > width, mtrr_state.var_ranges[i].base >> 12, > width, mtrr_state.var_ranges[i].mask >> 12, > - mtrr_attrib_to_str(mtrr_state.var_ranges[i].base & > + x86_mt_name(mtrr_state.var_ranges[i].base & > MTRR_PHYSBASE_TYPE_MASK)); Nit: Indentation of this line then wants changing, too. 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Mon, 09 Feb 2026 02:15:20 -0800 (PST) Message-ID: <836c1ef7-4ec3-4c4a-b527-17066327ff19@suse.com> Date: Mon, 9 Feb 2026 11:15:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/12] const-ify vendor checks To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <608472d0-517c-4bc5-b5c1-c278c4f6620b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:05, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 10:21 AM CET, Jan Beulich wrote: >> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>> High level description >>> ====================== >>> >>> When compared to the RFC this makes a different approach The series introduces >>> cpu_vendor() which maps to a constant in the single vendor case and to >>> (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDORS is a >>> mask of the compile-time chosen vendors. This enables the compiler to detect >>> dead-code at the uses and remove all unreachable branches, including in >>> switches. >>> >>> When compared to the x86_vendor_is() macro introduced in the RFC, this is >>> simpler. It achieves MOST of what the older macro did without touching the >>> switches, with a few caveats: >>> >>> 1. Compiled-out vendors cause a panic, they don't fallback onto the unknown >>> vendor case. In retrospect, this is a much saner thing to do. >> >> I'm unconvinced here. Especially our Centaur and Shanghai support is at best >> rudimentary. Treating those worse when configured-out than when configured-in >> feels questionable. > > Isn't that the point of configuring out? That's what I'm unsure about. > Besides the philosophical matter of whether or not a compiled-out vendor > should be allowed to run there's the more practical matter of what to do > with the x86_vendor field of boot_cpu_data. Because at that point our take > that cross-vendor support is forbidden is a lot weaker. If I can run an > AMD-hypervisor on an Intel host, what then? What policies would be allowed? If I > wipe x86_vendor then policies with some unknown vendor would be fine. Should the > leaves match too? If I do not wipe the field, should I do black magic to ensure > the behaviour is different depending on whether the vendor is compiled in or > not? What if I want to migrate a VM currently running in this hypothetical > hypervisor? The rules becomes seriously complex. > > It's just a lot cleaner to take the stance that compiled out vendors can't run. > Then everything else is crystal clear and we avoid a universe's worth of corner > cases. I expect upstream Xen to support all cases (I'm skeptical about the > utility of the unknown vendor path, but oh well), but many downstreams might > benefit from killing off support for vendors they really will never touch. To them, will panic()ing (or not) make a difference? >>> 2. equalities and inequalities have been replaced by equivalent (cpu_vendor() & ...) >>> forms. This isn't stylistic preference. This form allows the compiler >>> to merge the compared-against constant with X86_ENABLED_VENDORS, yielding >>> much better codegen throughout the tree. >>> >>> The effect of (2) triples the delta in the full build below. >>> >>> Some differences might be attributable to the change from policy vendor checks >>> to boot_cpu_data. In the case of the emulator it caused a 400 bytes increase >>> due to the way it checks using LOTS of macro invocations, so I left that one >>> piece using the policy vendor except for the single vendor case. >> >> For the emulator I'd like to point out this question that I raised in the >> AVX10 series: > > There's no optimisation shortage for the emulator. For that patch I just > ensure I didn't make a tricky situation worse. It is much better in the single-vendor case. > >> "Since it'll be reducing code size, we may want to further convert >> host_and_vcpu_must_have() to just vcpu_must_have() where appropriate >> (should be [almost?] everywhere)." >> >> Sadly there was no feedback an that (or really on almost all of that work) at >> all so far. > > It sounds fairly orthogonal to this, unless I'm missing the point. It's largely orthogonal, except that if we had gone that route already, your codegen diff might look somewhat different. > In principle that would be fine. the vCPU features whose emulation requires > special instructions are most definitely a subset of those of the host anyway. > > I agree many cases could be simplified as you describe. > > I do see a worrying danger of XSA should the max policy ever exceed the > capabilities of the host on a feature required for emulating some instruction > for that very feature. Then the guest could abuse the emulator to trigger #UD > inside the hypervisor's emulation path. Well, that max-policy related question is why I've raised the point, rather than making (more) patches right away. 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Mon, 09 Feb 2026 02:17:39 -0800 (PST) Message-ID: <51a91133-13d0-413a-b8fb-58b9d3018499@suse.com> Date: Mon, 9 Feb 2026 11:17:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Add Darwin.mk for GNU toolchains To: Bertrand Marquis Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <28DF7F1E-BAA3-49AC-8A53-75100BAE74B5@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 11:02, Bertrand Marquis wrote: > Hi Jan, > >> On 9 Feb 2026, at 10:45, Jan Beulich wrote: >> >> On 09.02.2026 10:11, Roger Pau Monné wrote: >>> On Mon, Feb 09, 2026 at 07:30:30AM +0000, Bertrand Marquis wrote: >>>> Hi Roger, >>>> >>>>> On 6 Feb 2026, at 18:25, Roger Pau Monné wrote: >>>>> >>>>> On Fri, Feb 06, 2026 at 05:21:44PM +0100, Bertrand Marquis wrote: >>>>>> Xen does not provide a Darwin build configuration for selecting >>>>>> GNU tool definitions. On macOS, the tools we use are either GNU >>>>>> compatible or we only rely on features supported by Mac OS, so >>>>>> using the GNU tool definitions is appropriate. >>>>>> >>>>>> Add config/Darwin.mk to include StdGNU.mk and force >>>>>> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow >>>>>> the cross-compile path as we depend on the Linux ABI so compiling >>>>>> on Mac OS is always a cross compilation case. >>>>>> >>>>>> An example of how to build the hypervisor for arm64 on Mac OS >>>>>> (tools cannot be build for now) using a toolchain from brew: >>>>>> - brew install aarch64-elf-gcc aarch64-elf-binutils >>>>>> - cd xen >>>>>> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang >>>>> >>>>> Instead of `cd xen` I would use `make xen ...`. >>>> >>>> Ack the 'cd xen' line is useless and should be removed. >>>> >>>>> >>>>>> >>>>>> Signed-off-by: Bertrand Marquis >>>>> >>>>> Acked-by: Roger Pau Monné >>>>> >>>>> One comment below. >>>>> >>>>>> --- >>>>>> Changes since v3: >>>>>> - set XEN_COMPILE_ARCH to unknown instead of Darwin >>>>>> - list binutils as a dependency to install in brew in commit message >>>>>> >>>>>> Changes since v2: >>>>>> - Subject was "xen: Add macOS hypervisor build configuration" >>>>>> - Update Darwin.mk comments to more accurate versions (Jan) >>>>>> - Remove the build-on-macos help as we have no dependency on anything >>>>>> coming from brew anymore and the toolchain can be retrieved by lots of >>>>>> other solutions than brew on mac os. Switch to a simple doc in the >>>>>> commit message instead >>>>>> --- >>>>>> config/Darwin.mk | 7 +++++++ >>>>>> 1 file changed, 7 insertions(+) >>>>>> create mode 100644 config/Darwin.mk >>>>>> >>>>>> diff --git a/config/Darwin.mk b/config/Darwin.mk >>>>>> new file mode 100644 >>>>>> index 000000000000..176b27eac676 >>>>>> --- /dev/null >>>>>> +++ b/config/Darwin.mk >>>>>> @@ -0,0 +1,7 @@ >>>>>> +# Use GNU tool definitions as the tools we are using are either GNU compatible >>>>>> +# or we only use features which are supported on Mac OS. >>>>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>>>> + >>>>>> +# Xen uses Linux'es ABI so we are cross compiling on Mac OS. >>>>> >>>>> Hm, is this actually fully true? What's the Linux ABI exactly here? >>>>> >>>>> FreeBSD builds Xen natively, and it's not using the Linux ABI. >>>>> FreeBSD uses no specific -target to the compiler invocations, and the >>>>> linker emulation is set to elf_x86_64_fbsd. >>>>> >>>>> I think the point here is that the toolchain must support building ELF >>>>> objects / images, because that's the binary format supported by Xen. >>>>> Whether it's Linux ELF or FreeBSD ELF doesn't make a difference for >>>>> standalone environments like the Xen kernel. >>>> >>>> This file is also use while compiling the tools and for those you definitely >>>> to cross compile as they depend on Linux ABI. >>> >>> I'm not an expert on this at all, but IMO the tools don't depend on >>> the Linux ABI at all. Anyone can add the minimal OS-specific bindings >>> required for the tools to work on environments different than Linux. >>> We currently have {Net,Free}BSD and Linux. In the past we also had >>> Solaris, but that has bit rotten. >>> >>>> Maybe that works on BSD >>>> but i doubt this would be the case on mac os. >>> >>> I doubt we would ever have any need to build an OSX native toolchain, >>> as it's unlikely (?) that we will ever get Xen support in the Darwin >>> kernel. >> >> If Darwin has some way to load "modules" (e.g. drivers) into the kernel, it >> may in principle be possible to run OSX as a HVM-Dom0, with a Xen driver >> loaded separately. That's far fetched, I know. >> >>>> Maybe we could simplify the sentence to not say anything we are unsure: >>>> >>>> # Cross compile on Mac OS >>>> >>>> Tell me if that works for you and i can submit a v5 or this might be possible to >>>> fix on commit. >>> >>> I'm fine with it, I would like to hear Jan's opinion. >> >> As long as it's clear that all of this is only about building the hypervisor >> (which doesn't look to be the case right now beyond the example given in the >> commit message, which may be taken as really only an example), that's okay >> [1]. I'd still prefer to mention the SVR4 ABI here, though, to at least >> somewhat explain the "always cross" aspect. >> >> I can make edits while committing, but I'm unsure whether that's wanted in >> this case. > > I would suggest: > > Cross compile on Mac OS, only hypervisor build has been tested, no tools > > Please do the following edits on commit if that's ok for you : > - remove 'cd xen' from commit message > - use previous comment in Darwin.mk There have been several "previous" comments there, so I think in this case it may indeed be better ... > Othewise happy to submit a v5 ... if you do this. I'm sorry, it's quite a bit of bike-shedding on "merely" commentary, yet I think we want to avoid misleading people. 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Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Denis Efremov , Jens Axboe Subject: Re: [PATCH v4 0/6] x86: Cleanups around slow_down_io() Message-ID: <20260209101918.GAaYm0plbeXIBr8p9a@fat_crate.local> References: <20260119182632.596369-1-jgross@suse.com> <6ee93510-1f43-4cd2-952e-8ed3ce7ba0e5@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <6ee93510-1f43-4cd2-952e-8ed3ce7ba0e5@suse.com> Content-Transfer-Encoding: quoted-printable On Mon, Feb 09, 2026 at 10:11:49AM +0100, Juergen Gross wrote: > PING? >=20 > Now 3 weeks without any reaction... J=C3=BCrgen, there are other patchsets that need review too. And we have = merge window right now so no reviewing anyway. And you know all that damn well! How about you help us out and you start reviewing x86 patches instead of pinging every week? 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Just to be > on a > safe side I don't mind to add "J". When "J" is used compiler is trying to use integer 0 (what I misread when read about J) but hfence.vvma expects two registers (zero register in this case), so "J" can't be really used here. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:29:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:29:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225162.1531638 (Exim 4.92) (envelope-from ) id 1vpOWa-0002eE-Cz; Mon, 09 Feb 2026 10:29:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225162.1531638; Mon, 09 Feb 2026 10:29:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOWa-0002e7-9F; Mon, 09 Feb 2026 10:29:48 +0000 Received: by outflank-mailman (input) for mailman id 1225162; Mon, 09 Feb 2026 10:29:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOWZ-0002e1-8P for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 10:29:47 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 409cf749-05a2-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 11:29:45 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-47edd6111b4so60996225e9.1 for ; Mon, 09 Feb 2026 02:29:45 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 02:29:44 -0800 (PST) Message-ID: <5c66e79d-1455-4038-ae07-5f73756e0008@suse.com> Date: Mon, 9 Feb 2026 11:29:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <89f50ab2c1a1c79abea4db3a53393f974bb9a473.1770036584.git.oleksii.kurochko@gmail.com> <309e4e0d-c2a3-4f56-ab6f-f648da313bb6@suse.com> <060f4338-d6ac-41a1-8036-ab506cd54bf4@gmail.com> <0574673e-0ca8-4a65-bb5e-89d475676631@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0574673e-0ca8-4a65-bb5e-89d475676631@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 11:21, Oleksii Kurochko wrote: > > On 2/5/26 9:56 AM, Oleksii Kurochko wrote: >> >> On 2/4/26 12:09 PM, Jan Beulich wrote: >>> On 02.02.2026 13:57, Oleksii Kurochko wrote: >>>> @@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void) >>>>       asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); >>>>   } >>>>   +/* Flush VS-stage TLB for current hart. */ >>>> +static inline void flush_tlb_guest_local(void) >>>> +{ >>>> +    HFENCE_VVMA(0, 0); >>> For this use, ... >>> >>>> --- /dev/null >>>> +++ b/xen/arch/riscv/include/asm/insn-defs.h >>>> @@ -0,0 +1,10 @@ >>>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>>> + >>>> +#ifndef ASM_RISCV_INSN_DEFS_H >>>> +#define ASM_RISCV_INSN_DEFS_H >>>> + >>>> +#define HFENCE_VVMA(vaddr, asid) \ >>>> +    asm volatile ("hfence.vvma %0, %1" \ >>>> +                  :: "r"(vaddr), "r"(asid) : "memory") >>> ... don't you want to use "rJ" as the constraints here? >> >> Even without "rJ" it is using x0 when argument 0 is passed. Just to be >> on a >> safe side I don't mind to add "J". > > When "J" is used compiler is trying to use integer 0 (what I misread when read > about J) but hfence.vvma expects two registers (zero register in this case), so > "J" can't be really used here. Hmm, I see. Besides the option of using just "r" as you did originally, another looks to be to use the 'z' operand modifier along with "rJ". That's what gcc's riscv.md looks to be doing, and I assume there is a reason for this. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:31:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:31:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225171.1531647 (Exim 4.92) (envelope-from ) id 1vpOYU-0004AV-QL; Mon, 09 Feb 2026 10:31:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225171.1531647; Mon, 09 Feb 2026 10:31:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOYU-0004AO-N0; Mon, 09 Feb 2026 10:31:46 +0000 Received: by outflank-mailman (input) for mailman id 1225171; Mon, 09 Feb 2026 10:31:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOYU-0004AI-06 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 10:31:46 +0000 Received: from mail177-22.suw61.mandrillapp.com (unknown [198.2.177.22]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8639f82c-05a2-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 11:31:44 +0100 (CET) Received: from pmta14.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail177-22.suw61.mandrillapp.com (Mailchimp) with ESMTP id 4f8gwY23ylzGlspCH for ; Mon, 9 Feb 2026 10:31:41 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 7a9873fa657341e6a0418bb5867dd057; Mon, 09 Feb 2026 10:31:41 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8639f82c-05a2-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770633101; x=1770903101; bh=Q+QF0oPxFfiCTygOaUN36BYB9qNIhQFyHxEA4lBnZXc=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=wUJC4LKKllCm00wyWejCRzbBv0sT8de/rMxXNSsne1jhBl7qMqInwrybrjA7P5V/R pShxCqPP9/QsA0/C9ESHpBZ9i1DQzA1gcrS13MntZXzvO7goS3mEPaNP75fmC720jc XGpWHCLGuMxAERC0Ya8XgG0KI88ffzQ4h4G/DQih83IozMK71ZuYRUGf6T26hTeq5F N7fLTs3sfX0hluBILcKBqwPR0JZjyEgUIPo0ENQCbhj6QBAsElo4wPoB4SJOagbfjz Ztyv8P9Tol4VnknTR0h/2XQK0uXoowlh0hXhZFflCu3FVUWZD9WKU/8BOqE1iKlsX5 9uPZ02zCZr8ww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770633101; x=1770893601; i=teddy.astie@vates.tech; bh=Q+QF0oPxFfiCTygOaUN36BYB9qNIhQFyHxEA4lBnZXc=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=MjTV6GNEzHQNdPYEp5U2pI+bV5n5dNcXbCfbK6SO0le3a5nbTuMe5I6uRZO37xhlz LOZwexF38MZT5YGwm5jJJ0GuuS2JnPBU3pqsg1qeqA6wuEJ/Gh7nraDkd/JPe+iLQK 9/Wh1acN96X4u8hEsWQDfwcpNOoe9ev/lte6DD4pOZmOwfKC+b2MEMxWVH9DyuHfP/ 30QxMjTo9oGh0EOnZpOQzl9Aj8Su/PKytywq9eJQmqEFcSx2irR+kGCzt9+dXZMrhr QPbk176OYb6r+GXP+V3toAY+VLrqhfmcjQWQYW586VCNcWKWJL2nwWY+p+ORTDtjRn 3H4EPEwnCLTlQ== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=20v6]=20xenpm:=20Add=20get-intel-temp=20subcommand?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770633100428 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Oleksii Kurochko" , "Community Manager" , "Anthony PERARD" , "Jan Beulich" Message-Id: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.7a9873fa657341e6a0418bb5867dd057?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260209:md Date: Mon, 09 Feb 2026 10:31:41 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable get-intel-temp allows querying the per-core CPU temperature and per-package one on Intel processors (as usual Dom0 drivers cannot work due to misalignment between Dom0 vCPU and pCPUs). Signed-off-by: Teddy Astie --- CC: Jan Beulich v4: https://lore.kernel.org/xen-devel/cover.1766158766.git.teddy.astie@vate= s.tech/ v5: Removed trailing whitespace. v6: Report errors through errno and use strerror() to display them --- CHANGELOG.md | 2 + tools/misc/xenpm.c | 131 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 132 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20..d7fac4a8d0 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,8 @@ The format is based on [Keep a Changelog](https://keepach= angelog.com/en/1.0.0/) - Support for Bus Lock Threshold on AMD Zen5 and later CPUs, used by Xe= n to mitigate (by rate-limiting) the system wide impact of an HVM guest misusing atomic instructions. + - Introduce get-intel-temp to xenpm to query CPU temperatures on Intel + platforms. ### Removed - On x86: diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index 682d092479..de490b6507 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -32,11 +32,14 @@ #include +#include + #define MAX_PKG_RESIDENCIES 12 #define MAX_CORE_RESIDENCIES 8 static xc_interface *xc_handle; static unsigned int max_cpu_nr; +static xc_physinfo_t physinfo; /* help message */ void show_help(void) @@ -93,6 +96,7 @@ void show_help(void) " units default to \= "us\" if unspecified.\n" " truncates un-repre= sentable values.\n" " 0 lets the hardwar= e decide.\n" + " get-intel-temp [cpuid] get Intel CPU temperatur= e of or all\n" " start [seconds] start collect Cx/Px stat= istics,\n" " output after CTRL-C or S= IGINT or several seconds.\n" " enable-turbo-mode [cpuid] enable Turbo Mode for pr= ocessors that support it.\n" @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) errno, strerror(errno)); } +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, i= nt *temp) +{ + xc_resource_entry_t entries[] =3D { + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STA= TUS }, + { .idx =3D MSR_TEMPERATURE_TARGET }, + }; + struct xc_resource_op ops =3D { + .cpu =3D cpu, + .entries =3D entries, + .nr_entries =3D ARRAY_SIZE(entries), + }; + int tjmax; + + int ret =3D xc_resource_op(xch, 1, &ops); + + switch ( ret ) + { + case -1: + /* xc_resource_op returns -1 in out of memory scenarios */ + errno =3D -ENOMEM; + return -1; + + case 0: + /* This CPU isn't online or can't query this MSR */ + errno =3D -ENODATA; + return -1; + + case 1: + { + /* + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's = 100 + * which is correct aside a few selected Atom CPUs. Check Linux + * kernel's coretemp.c for more information. + */ + static bool has_reported_once =3D false; + + if ( !has_reported_once ) + { + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assu= me " + "tjmax =3D 100, readings may be incorrect.\n")= ; + has_reported_once =3D true; + } + + tjmax =3D 100; + break; + } + + case 2: + tjmax =3D (entries[1].val >> 16) & 0xff; + break; + + default: + if ( ret > 0 ) + { + fprintf(stderr, "Got unexpected xc_resource_op return value: %= d", ret); + errno =3D -EINVAL; + } + else + errno =3D ret; + return -1; + } + + *temp =3D tjmax - ((entries[0].val >> 16) & 0xff); + return 0; +} + +static void get_intel_temp(int argc, char *argv[]) +{ + int temp =3D -1, cpu =3D -1; + unsigned int socket; + bool has_data =3D false; + + if ( argc > 0 ) + parse_cpuid(argv[0], &cpu); + + if ( cpu !=3D -1 ) + { + if ( !fetch_dts_temp(xc_handle, cpu, false, &temp) ) + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + else + { + fprintf(stderr, "Unable to fetch temperature (%d - %s)\n", + errno, strerror(errno)); + printf("No data\n"); + } + return; + } + + /* Per socket measurement */ + for ( socket =3D 0, cpu =3D 0; cpu < max_cpu_nr; + socket++, cpu +=3D physinfo.cores_per_socket * physinfo.threads_= per_core ) + { + if ( fetch_dts_temp(xc_handle, cpu, true, &temp) ) + { + fprintf(stderr, + "[Package%u] Unable to fetch temperature (%d - %s)\n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("Package%u: %d=C2=B0C\n", socket, temp); + } + + if ( has_data ) + /* Avoid inserting a trailing line if we have nothing */ + printf("\n"); + + for ( cpu =3D 0; cpu < max_cpu_nr; cpu +=3D physinfo.threads_per_core = ) + { + if ( fetch_dts_temp(xc_handle, cpu, false, &temp) ) + { + fprintf(stderr, "[CPU%d] Unable to fetch temperature (%d - %s)= \n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + } + + if ( !has_data ) + printf("No data\n"); +} + void disable_turbo_mode(int argc, char *argv[]) { int cpuid =3D -1; @@ -1618,12 +1747,12 @@ struct { { "set-max-cstate", set_max_cstate_func}, { "enable-turbo-mode", enable_turbo_mode }, { "disable-turbo-mode", disable_turbo_mode }, + { "get-intel-temp", get_intel_temp }, }; int main(int argc, char *argv[]) { int i, ret =3D 0; - xc_physinfo_t physinfo; int nr_matches =3D 0; int matches_main_options[ARRAY_SIZE(main_options)]; -- 2.53.0 -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:31:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:31:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225172.1531657 (Exim 4.92) (envelope-from ) id 1vpOYc-0004QK-1z; Mon, 09 Feb 2026 10:31:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225172.1531657; Mon, 09 Feb 2026 10:31:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOYb-0004QD-VJ; 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And compiles out all log-dirty tracking infra. Signed-off-by: Alejandro Vallejo --- RFC for the Kconfig help message. --- xen/arch/x86/Kconfig | 9 +++++++++ xen/arch/x86/domctl.c | 8 ++++---- xen/arch/x86/hvm/dm.c | 3 +++ xen/arch/x86/include/asm/domain.h | 2 ++ xen/arch/x86/include/asm/p2m.h | 2 ++ xen/arch/x86/include/asm/paging.h | 8 +++----- xen/arch/x86/mm/hap/hap.c | 22 +++++++++++++--------- xen/arch/x86/mm/p2m.c | 2 ++ xen/arch/x86/mm/paging.c | 2 ++ xen/include/hypercall-defs.c | 4 ++-- 10 files changed, 42 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 61f58aa829..fbf044aa4d 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -146,6 +146,7 @@ config XEN_IBT config SHADOW_PAGING bool "Shadow Paging" default !PV_SHIM_EXCLUSIVE + select LOG_DIRTY depends on PV || HVM help @@ -166,6 +167,14 @@ config SHADOW_PAGING config PAGING def_bool HVM || SHADOW_PAGING +config LOG_DIRTY + bool "Log-dirty page tracking" if EXPERT + depends on PAGING + default !PV_SHIM_EXCLUSIVE + help + Enable log-dirty infrastructure so Xen can track domain memory writes and + the dirty state of VRAM for device models and live migrations. + config BIGMEM bool "big memory support" default n diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index d9521808dc..61d43a21d0 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -220,15 +220,15 @@ long arch_do_domctl( { case XEN_DOMCTL_shadow_op: -#ifdef CONFIG_PAGING + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) + break; + ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); if ( ret == -ERESTART ) return hypercall_create_continuation( __HYPERVISOR_paging_domctl_cont, "h", u_domctl); copyback = true; -#else - ret = -EOPNOTSUPP; -#endif break; case XEN_DOMCTL_ioport_permission: diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index 3b53471af0..94216aecc2 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -48,6 +48,9 @@ static int track_dirty_vram(struct domain *d, xen_pfn_t first_pfn, unsigned int nr_frames, const struct xen_dm_op_buf *buf) { + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) + return -EOPNOTSUPP; + if ( nr_frames > (GB(1) >> PAGE_SHIFT) ) return -EINVAL; diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 94b0cf7f1d..f09c13909f 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -226,7 +226,9 @@ struct paging_domain { unsigned int p2m_pages; /* number of pages allocated to p2m */ /* log dirty support */ +#ifdef CONFIG_LOG_DIRTY struct log_dirty_domain log_dirty; +#endif /* CONFIG_LOG_DIRTY */ /* preemption handling */ struct { diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index 9016e88411..3c2dcacfa5 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -253,9 +253,11 @@ struct p2m_domain { bool *sve); int (*recalc)(struct p2m_domain *p2m, unsigned long gfn); +#ifdef CONFIG_LOG_DIRTY void (*enable_hardware_log_dirty)(struct p2m_domain *p2m); void (*disable_hardware_log_dirty)(struct p2m_domain *p2m); void (*flush_hardware_cached_dirty)(struct p2m_domain *p2m); +#endif /* CONFIG_LOG_DIRTY */ void (*change_entry_type_global)(struct p2m_domain *p2m, p2m_type_t ot, p2m_type_t nt); diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 291ab386e8..980cdfa455 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -55,12 +55,9 @@ #define PG_translate 0 #define PG_external 0 #endif -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) /* Enable log dirty mode */ -#define PG_log_dirty (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) -#else -#define PG_log_dirty 0 -#endif +#define PG_log_dirty IS_ENABLED(CONFIG_LOG_DIRTY) * \ + (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) /* All paging modes. */ #define PG_MASK (PG_refcounts | PG_log_dirty | PG_translate | PG_external) @@ -174,6 +171,7 @@ static inline void paging_log_dirty_init(struct domain *d, const struct log_dirty_ops *ops) {} static inline void paging_mark_dirty(struct domain *d, mfn_t gmfn) {} static inline void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) {} +static inline void paging_mark_pfn_clean(struct domain *d, pfn_t pfn) {} static inline bool paging_mfn_is_dirty(struct domain *d, mfn_t gmfn) { return false; } #endif /* PG_log_dirty */ diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c index a337752bf4..21672db011 100644 --- a/xen/arch/x86/mm/hap/hap.c +++ b/xen/arch/x86/mm/hap/hap.c @@ -50,7 +50,7 @@ struct hap_dirty_vram { * calling p2m_log_dirty_range(), which interrogates each vram * page's p2m type looking for pages that have been made writable. */ - +#ifdef CONFIG_LOG_DIRTY int hap_track_dirty_vram(struct domain *d, unsigned long begin_pfn, unsigned int nr_frames, @@ -161,6 +161,7 @@ out: return rc; } +#endif /* CONFIG_LOG_DIRTY */ /************************************************/ /* HAP LOG DIRTY SUPPORT */ @@ -440,14 +441,17 @@ static bool cf_check flush_tlb(const unsigned long *vcpu_bitmap); void hap_domain_init(struct domain *d) { - static const struct log_dirty_ops hap_ops = { - .enable = hap_enable_log_dirty, - .disable = hap_disable_log_dirty, - .clean = hap_clean_dirty_bitmap, - }; - - /* Use HAP logdirty mechanism. */ - paging_log_dirty_init(d, &hap_ops); + if ( IS_ENABLED(CONFIG_LOG_DIRTY) ) + { + static const struct log_dirty_ops hap_ops = { + .enable = hap_enable_log_dirty, + .disable = hap_disable_log_dirty, + .clean = hap_clean_dirty_bitmap, + }; + + /* Use HAP logdirty mechanism. */ + paging_log_dirty_init(d, &hap_ops); + } d->arch.paging.update_paging_modes = hap_update_paging_modes; d->arch.paging.flush_tlb = flush_tlb; diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index e915da26a8..373382c28c 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -236,6 +236,7 @@ struct ioreq_server *p2m_get_ioreq_server(struct domain *d, return s; } +#ifdef CONFIG_LOG_DIRTY void p2m_enable_hardware_log_dirty(struct domain *d) { struct p2m_domain *p2m = p2m_get_hostp2m(d); @@ -263,6 +264,7 @@ void p2m_flush_hardware_cached_dirty(struct domain *d) p2m_unlock(p2m); } } +#endif /* CONFIG_LOG_DIRTY */ /* * Force a synchronous P2M TLB flush if a deferred flush is pending. diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index 2396f81ad5..13ee137db9 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -623,10 +623,12 @@ int paging_domain_init(struct domain *d) INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist); mm_lock_init(&d->arch.paging.lock); +#ifdef CONFIG_LOG_DIRTY /* This must be initialized separately from the rest of the * log-dirty init code as that can be called more than once and we * don't want to leak any active log-dirty bitmaps */ d->arch.paging.log_dirty.top = INVALID_MFN; +#endif /* CONFIG_LOG_DIRTY */ /* * Shadow pagetables are the default, but we will use diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c index 63755bb8df..be7ed832be 100644 --- a/xen/include/hypercall-defs.c +++ b/xen/include/hypercall-defs.c @@ -194,7 +194,7 @@ dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs) #ifdef CONFIG_SYSCTL sysctl(xen_sysctl_t *u_sysctl) #endif -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) +#if defined(CONFIG_LOG_DIRTY) paging_domctl_cont(xen_domctl_t *u_domctl) #endif #ifndef CONFIG_PV_SHIM_EXCLUSIVE @@ -292,7 +292,7 @@ dm_op compat do compat do do hypfs_op do do do do do #endif mca do do - - - -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) +#if defined(CONFIG_LOG_DIRTY) paging_domctl_cont do do do do - #endif base-commit: 1ee8b11c1106dca6b8fe0d54c0e79146bb6545f0 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:34:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:34:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225184.1531669 (Exim 4.92) (envelope-from ) id 1vpOag-0005BJ-Ek; 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Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/Kconfig | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 61f58aa829..2ce4747f6e 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -148,20 +148,17 @@ config SHADOW_PAGING default !PV_SHIM_EXCLUSIVE depends on PV || HVM help + Shadow paging is a software alternative to hardware paging support + (Intel EPT, AMD NPT). - Shadow paging is a software alternative to hardware paging support - (Intel EPT, AMD NPT). + It is required for: + * Running HVM guests on hardware lacking hardware paging support + (First-generation Intel VT-x or AMD SVM). + * Live migration of PV guests. + * L1TF sidechannel mitigation for PV guests. - It is required for: - * Running HVM guests on hardware lacking hardware paging support - (First-generation Intel VT-x or AMD SVM). - * Live migration of PV guests. - * L1TF sidechannel mitigation for PV guests. - - Under a small number of specific workloads, shadow paging may be - deliberately used as a performance optimisation. - - If unsure, say Y. + Under a small number of specific workloads, shadow paging may be + deliberately used as a performance optimisation. config PAGING def_bool HVM || SHADOW_PAGING base-commit: 1ee8b11c1106dca6b8fe0d54c0e79146bb6545f0 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:37:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:37:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225197.1531678 (Exim 4.92) (envelope-from ) id 1vpOeE-00061p-2j; Mon, 09 Feb 2026 10:37:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225197.1531678; Mon, 09 Feb 2026 10:37:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 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CH3PEPF00000009.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6233 It only has 2 callers, both of which can be conditionally removed. Signed-off-by: Alejandro Vallejo --- I'd be ok conditionalising the else branch on... IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com ... to avoid the danger of stale pointers, with required changes elsewhere so none.c is only compiled out in that case. I'm not sure how much it matters seeing how they are all unreachable. --- xen/arch/x86/mm/Makefile | 2 +- xen/arch/x86/mm/paging.c | 4 +- xen/arch/x86/mm/shadow/Makefile | 4 -- xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- 4 files changed, 3 insertions(+), 84 deletions(-) delete mode 100644 xen/arch/x86/mm/shadow/none.c diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e8409..066c4caff3 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -1,4 +1,4 @@ -obj-y += shadow/ +obj-$(CONFIG_SHADOW_PAGING) += shadow/ obj-$(CONFIG_HVM) += hap/ obj-$(CONFIG_ALTP2M) += altp2m.o diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index 2396f81ad5..5f70254cec 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) */ if ( hap_enabled(d) ) hap_domain_init(d); - else + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) rc = shadow_domain_init(d); return rc; @@ -645,7 +645,7 @@ void paging_vcpu_init(struct vcpu *v) { if ( hap_enabled(v->domain) ) hap_vcpu_init(v); - else + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) shadow_vcpu_init(v); } diff --git a/xen/arch/x86/mm/shadow/Makefile b/xen/arch/x86/mm/shadow/Makefile index 3012fa127d..119989ca4d 100644 --- a/xen/arch/x86/mm/shadow/Makefile +++ b/xen/arch/x86/mm/shadow/Makefile @@ -1,7 +1,3 @@ -ifeq ($(CONFIG_SHADOW_PAGING),y) obj-y += common.o set.o obj-$(CONFIG_HVM) += hvm.o guest_2.o guest_3.o guest_4.o oos.o obj-$(CONFIG_PV) += pv.o guest_4.o -else -obj-y += none.o -endif diff --git a/xen/arch/x86/mm/shadow/none.c b/xen/arch/x86/mm/shadow/none.c deleted file mode 100644 index 2a4005a795..0000000000 --- a/xen/arch/x86/mm/shadow/none.c +++ /dev/null @@ -1,77 +0,0 @@ -#include -#include - -static int cf_check _toggle_log_dirty(struct domain *d) -{ - ASSERT(is_pv_domain(d)); - return -EOPNOTSUPP; -} - -static void cf_check _clean_dirty_bitmap(struct domain *d) -{ - ASSERT(is_pv_domain(d)); -} - -static void cf_check _update_paging_modes(struct vcpu *v) -{ - ASSERT_UNREACHABLE(); -} - -int shadow_domain_init(struct domain *d) -{ - /* For HVM set up pointers for safety, then fail. */ - static const struct log_dirty_ops sh_none_ops = { - .enable = _toggle_log_dirty, - .disable = _toggle_log_dirty, - .clean = _clean_dirty_bitmap, - }; - - paging_log_dirty_init(d, &sh_none_ops); - - d->arch.paging.update_paging_modes = _update_paging_modes; - - return is_hvm_domain(d) ? -EOPNOTSUPP : 0; -} - -static int cf_check _page_fault( - struct vcpu *v, unsigned long va, struct cpu_user_regs *regs) -{ - ASSERT_UNREACHABLE(); - return 0; -} - -static bool cf_check _invlpg(struct vcpu *v, unsigned long linear) -{ - ASSERT_UNREACHABLE(); - return true; -} - -#ifdef CONFIG_HVM -static unsigned long cf_check _gva_to_gfn( - struct vcpu *v, struct p2m_domain *p2m, unsigned long va, uint32_t *pfec) -{ - ASSERT_UNREACHABLE(); - return gfn_x(INVALID_GFN); -} -#endif - -static pagetable_t cf_check _update_cr3(struct vcpu *v, bool noflush) -{ - ASSERT_UNREACHABLE(); - return pagetable_null(); -} - -static const struct paging_mode sh_paging_none = { - .page_fault = _page_fault, - .invlpg = _invlpg, -#ifdef CONFIG_HVM - .gva_to_gfn = _gva_to_gfn, -#endif - .update_cr3 = _update_cr3, -}; - -void shadow_vcpu_init(struct vcpu *v) -{ - ASSERT(is_pv_vcpu(v)); - v->arch.paging.mode = &sh_paging_none; -} base-commit: 1ee8b11c1106dca6b8fe0d54c0e79146bb6545f0 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:46:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:46:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225215.1531698 (Exim 4.92) (envelope-from ) id 1vpOn9-0008GW-8E; Mon, 09 Feb 2026 10:46:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225215.1531698; Mon, 09 Feb 2026 10:46:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOn9-0008GP-4W; Mon, 09 Feb 2026 10:46:55 +0000 Received: by outflank-mailman (input) for mailman id 1225215; Mon, 09 Feb 2026 10:46:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpOn8-0008GA-9V for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 10:46:54 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id a414413b-05a4-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 11:46:51 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 46E7D339; Mon, 9 Feb 2026 02:46:44 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.56]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA2123F63F; Mon, 9 Feb 2026 02:46:48 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a414413b-05a4-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5] xen: Add Darwin.mk Date: Mon, 9 Feb 2026 11:46:44 +0100 Message-ID: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen does not provide a Darwin build configuration useable on Mac OS. It is possible to build Xen Hypervisor (tools are not supported) with a toolchain able to produce ELF binaries (GCC or others). Add config/Darwin.mk to include StdGNU.mk and force XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow the cross-compile path so compiling on Mac OS is always handled as a cross compilation case. Only compiling the hypervisor has been tested ! An example of how to build the hypervisor for arm64 on Mac OS (tools cannot be build for now) using a compiler from brew: - brew install aarch64-elf-gcc aarch64-elf-binutils - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang Signed-off-by: Bertrand Marquis Change-Id: Iba91634afbaab58767bb8744b4b722ce5732a6dd --- Changes since v4: - Subect was "xen: Add Darwin.mk for GNU toolchains" but remove the GNU toolchains part as this could also work with Clang - remove 'cd xen' from commit message - simplify comment in Darwin.mk and rework commit message. Changes since v3: - set XEN_COMPILE_ARCH to unknown instead of Darwin - list binutils as a dependency to install in brew in commit message Changes since v2: - Subject was "xen: Add macOS hypervisor build configuration" - Update Darwin.mk comments to more accurate versions (Jan) - Remove the build-on-macos help as we have no dependency on anything coming from brew anymore and the toolchain can be retrieved by lots of other solutions than brew on mac os. Switch to a simple doc in the commit message instead --- config/Darwin.mk | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 config/Darwin.mk diff --git a/config/Darwin.mk b/config/Darwin.mk new file mode 100644 index 000000000000..b1fc9ca859b0 --- /dev/null +++ b/config/Darwin.mk @@ -0,0 +1,6 @@ +# Use GNU tool definitions as the tools we are using are either GNU compatible +# or we only use features which are supported on Mac OS. +include $(XEN_ROOT)/config/StdGNU.mk + +# Cross compile on Mac OS, only hypervisor build has been tested, no tools +XEN_COMPILE_ARCH = unknow -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 10:57:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 10:57:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225239.1531708 (Exim 4.92) (envelope-from ) id 1vpOxa-0001pU-HT; Mon, 09 Feb 2026 10:57:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225239.1531708; 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Mon, 09 Feb 2026 02:57:30 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Mon, 9 Feb 2026 11:57:19 +0100 X-Gm-Features: AZwV_QjEYjLK80seHVWR5O0YxU8u9Nr5dBKcu5-KmRV-e-2B8jb8rhN2P1YLyAk Message-ID: Subject: Re: [PATCH 04/12] xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > FF-A 1.2 extends the endpoint memory access descriptor (EMAD) from > 16 to 32 bytes, adding implementation-defined (IMPDEF) fields and > reserved space. The MEM_SHARE path currently assumes the 1.1 EMAD > size and rejects the 1.2 layout. > > Add FF-A 1.2 EMAD support to MEM_SHARE: > - define ffa_mem_access_1_2 and store IMPDEF payload in ffa_shm_mem > - emit 1.2 EMADs to the SPMC for FF-A 1.2 guests, forwarding IMPDEF > - refactor header parsing into read_mem_transaction() for 1.0/1.1+ > - detect EMAD format by mem_access_size to allow 1.1 on 1.2 guests > > Functional impact: MEM_SHARE supports FF-A 1.2 EMADs. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_shm.c | 108 +++++++++++++++++++++++++++++-------- > 1 file changed, 86 insertions(+), 22 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 4c0b45cde6ee..905a64e3db01 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -30,6 +30,14 @@ struct ffa_mem_access { > uint64_t reserved; > }; > > +/* Endpoint memory access descriptor (FF-A 1.2) */ > +struct ffa_mem_access_1_2 { > + struct ffa_mem_access_perm access_perm; > + uint32_t region_offs; > + uint8_t impdef[16]; > + uint8_t reserved[8]; > +}; > + > /* Lend, donate or share memory transaction descriptor */ > struct ffa_mem_transaction_1_0 { > uint16_t sender_id; > @@ -73,7 +81,7 @@ struct ffa_mem_transaction_1_1 { > /* > * The parts needed from struct ffa_mem_transaction_1_0 or struct > * ffa_mem_transaction_1_1, used to provide an abstraction of difference= in > - * data structures between version 1.0 and 1.1. This is just an internal > + * data structures between version 1.0 and 1.2. This is just an internal > * interface and can be changed without changing any ABI. > */ > struct ffa_mem_transaction_int { > @@ -92,6 +100,8 @@ struct ffa_shm_mem { > uint16_t sender_id; > uint16_t ep_id; /* endpoint, the one lending */ > uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ > + /* Endpoint memory access descriptor IMPDEF value (FF-A 1.2). */ > + uint64_t impdef[2]; > unsigned int page_count; > struct page_info *pages[]; > }; > @@ -297,17 +307,21 @@ static void init_range(struct ffa_address_range *ad= dr_range, > * This function uses the ffa_spmc tx buffer to transmit the memory tran= saction > * descriptor. > */ > -static int share_shm(struct ffa_shm_mem *shm) > +static int share_shm(struct ffa_shm_mem *shm, uint32_t ffa_vers) > { > const uint32_t max_frag_len =3D FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE; > struct ffa_mem_access *mem_access_array; > + struct ffa_mem_access_1_2 *mem_access_array_1_2; > struct ffa_mem_transaction_1_1 *descr; > struct ffa_address_range *addr_range; > struct ffa_mem_region *region_descr; > - const unsigned int region_count =3D 1; > uint32_t frag_len; > uint32_t tot_len; > + uint32_t mem_access_size; > + uint32_t mem_access_offs; > + uint32_t region_offs; > paddr_t last_pa; > + uint32_t range_count; > unsigned int n; > paddr_t pa; > int32_t ret; > @@ -326,16 +340,35 @@ static int share_shm(struct ffa_shm_mem *shm) > descr->handle =3D shm->handle; > descr->mem_reg_attr =3D FFA_NORMAL_MEM_REG_ATTR; > descr->mem_access_count =3D 1; > - descr->mem_access_size =3D sizeof(*mem_access_array); > - descr->mem_access_offs =3D MEM_ACCESS_OFFSET(0); > + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > + mem_access_size =3D sizeof(struct ffa_mem_access_1_2); > + else > + mem_access_size =3D sizeof(struct ffa_mem_access); > + mem_access_offs =3D sizeof(struct ffa_mem_transaction_1_1); > + region_offs =3D mem_access_offs + mem_access_size; > + descr->mem_access_size =3D mem_access_size; > + descr->mem_access_offs =3D mem_access_offs; > > - mem_access_array =3D buf + descr->mem_access_offs; > - memset(mem_access_array, 0, sizeof(*mem_access_array)); > - mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > - mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > - mem_access_array[0].region_offs =3D REGION_OFFSET(descr->mem_access_= count, 0); > + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > + { > + mem_access_array_1_2 =3D buf + mem_access_offs; > + memset(mem_access_array_1_2, 0, sizeof(*mem_access_array_1_2)); > + mem_access_array_1_2[0].access_perm.endpoint_id =3D shm->ep_id; > + mem_access_array_1_2[0].access_perm.perm =3D FFA_MEM_ACC_RW; > + mem_access_array_1_2[0].region_offs =3D region_offs; > + memcpy(mem_access_array_1_2[0].impdef, shm->impdef, > + sizeof(mem_access_array_1_2[0].impdef)); > + } > + else > + { > + mem_access_array =3D buf + mem_access_offs; > + memset(mem_access_array, 0, sizeof(*mem_access_array)); > + mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > + mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > + mem_access_array[0].region_offs =3D region_offs; > + } > > - region_descr =3D buf + mem_access_array[0].region_offs; > + region_descr =3D buf + region_offs; > memset(region_descr, 0, sizeof(*region_descr)); > region_descr->total_page_count =3D shm->page_count; > > @@ -349,8 +382,9 @@ static int share_shm(struct ffa_shm_mem *shm) > region_descr->address_range_count++; > } > > - tot_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, > - region_descr->address_range_count); Please remove the unused ADDR_RANGE_OFFSET() macro and friends, as they're no longer accurate. > + range_count =3D region_descr->address_range_count; > + tot_len =3D region_offs + sizeof(*region_descr) + > + range_count * sizeof(struct ffa_address_range); > if ( tot_len > max_frag_len ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > @@ -358,7 +392,7 @@ static int share_shm(struct ffa_shm_mem *shm) > } > > addr_range =3D region_descr->address_range_array; > - frag_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_count= , 1); > + frag_len =3D region_offs + sizeof(*region_descr) + sizeof(*addr_rang= e); > last_pa =3D page_to_maddr(shm->pages[0]); > init_range(addr_range, last_pa); > for ( n =3D 1; n < shm->page_count; last_pa =3D pa, n++ ) > @@ -448,6 +482,12 @@ static int read_mem_transaction(uint32_t ffa_vers, c= onst void *buf, size_t blen, > if ( size * count + offs > blen ) > return FFA_RET_INVALID_PARAMETERS; > > + if ( size < sizeof(struct ffa_mem_access) ) > + return FFA_RET_INVALID_PARAMETERS; Implicitly, size should also be a multiple of 16. Don't you agree? > + > + if ( offs & 0xF ) > + return FFA_RET_INVALID_PARAMETERS; > + > trans->mem_reg_attr =3D mem_reg_attr; > trans->flags =3D flags; > trans->mem_access_size =3D size; > @@ -464,7 +504,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > uint64_t addr =3D get_user_reg(regs, 3); > uint32_t page_count =3D get_user_reg(regs, 4); > const struct ffa_mem_region *region_descr; > - const struct ffa_mem_access *mem_access; > + const struct ffa_mem_access_1_2 *mem_access; > struct ffa_mem_transaction_int trans; > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > @@ -474,9 +514,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs= ) > register_t handle_hi =3D 0; > register_t handle_lo =3D 0; > int ret =3D FFA_RET_DENIED; > + uint32_t ffa_vers; > uint32_t range_count; > uint32_t region_offs; > uint16_t dst_id; > + uint8_t perm; > + uint64_t impdef[2]; > > if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) > { > @@ -515,8 +558,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > if ( frag_len > tx_size ) > goto out_unlock; > > - ret =3D read_mem_transaction(ACCESS_ONCE(ctx->guest_vers), tx_buf, > - frag_len, &trans); > + ffa_vers =3D ACCESS_ONCE(ctx->guest_vers); > + ret =3D read_mem_transaction(ffa_vers, tx_buf, frag_len, &trans); > if ( ret ) > goto out_unlock; > > @@ -545,13 +588,35 @@ void ffa_handle_mem_share(struct cpu_user_regs *reg= s) > goto out_unlock; > } > > + if ( trans.mem_access_size < sizeof(struct ffa_mem_access) ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out_unlock; > + } > + > /* Check that it fits in the supplied data */ > if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) > goto out_unlock; > > mem_access =3D tx_buf + trans.mem_access_offs; > - > dst_id =3D ACCESS_ONCE(mem_access->access_perm.endpoint_id); > + perm =3D ACCESS_ONCE(mem_access->access_perm.perm); > + region_offs =3D ACCESS_ONCE(mem_access->region_offs); > + > + /* > + * FF-A 1.2 introduced an extended mem_access descriptor with impdef > + * fields, but guests can still use the 1.1 format if they don't nee= d > + * implementation-defined data. Detect which format is used based on > + * the mem_access_size field rather than the negotiated FF-A version= . > + */ > + if ( trans.mem_access_size >=3D sizeof(struct ffa_mem_access_1_2) ) > + memcpy(impdef, mem_access->impdef, sizeof(impdef)); > + else > + { > + impdef[0] =3D 0; > + impdef[1] =3D 0; > + } > + > if ( !FFA_ID_IS_SECURE(dst_id) ) > { > /* we do not support sharing with VMs */ > @@ -559,13 +624,11 @@ void ffa_handle_mem_share(struct cpu_user_regs *reg= s) > goto out_unlock; > } > > - if ( ACCESS_ONCE(mem_access->access_perm.perm) !=3D FFA_MEM_ACC_RW ) > + if ( perm !=3D FFA_MEM_ACC_RW ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > goto out_unlock; > } > - > - region_offs =3D ACCESS_ONCE(mem_access->region_offs); > if ( sizeof(*region_descr) + region_offs > frag_len ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > @@ -590,6 +653,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > } > shm->sender_id =3D trans.sender_id; > shm->ep_id =3D dst_id; > + memcpy(shm->impdef, impdef, sizeof(shm->impdef)); > > /* > * Check that the Composite memory region descriptor fits. > @@ -605,7 +669,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > if ( ret ) > goto out; > > - ret =3D share_shm(shm); > + ret =3D share_shm(shm, ffa_vers); Shouldn't we rather use ffa_fw_version? Cheers, Jens > if ( ret ) > goto out; > > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Mon Feb 09 11:08:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 11:08:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225253.1531718 (Exim 4.92) (envelope-from ) id 1vpP7s-0003p1-KA; Mon, 09 Feb 2026 11:08:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225253.1531718; Mon, 09 Feb 2026 11:08:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpP7s-0003ou-Fn; Mon, 09 Feb 2026 11:08:20 +0000 Received: by outflank-mailman (input) for mailman id 1225253; Mon, 09 Feb 2026 11:08:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) 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=?utf-8?B?ZzRDdFJha2Nxb29MblA0VFdWMFdHTms0OGlqM3RwdmIvNUppejNWUT09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 00b51107-3276-482a-418d-08de67cb8470 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 11:08:13.3399 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5yPeX60Egh0wpGjM3Ing73MPa9HvbgAQfITAFv6CEgAP8C3aTRXvdBl78+mFeMNiOfT62wUh+ldMAxYXxtAAMA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR03MB7090 On Fri, Feb 06, 2026 at 01:05:54PM -0800, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > to allow nested virtualization support to be disabled at build time. > This is useful for embedded or safety-focused deployments where > nested virtualization is not needed, reducing code size and attack > surface. > > When CONFIG_NESTED_VIRT=n, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c > > Add inline stubs where needed in headers. > > No functional change when CONFIG_NESTED_VIRT=y. > > Signed-off-by: Stefano Stabellini > --- > Changes in v2: > - add ASSERT_UNREACHABLE > - change default to N and remove EXPERT > - don't compile nested_hap if not VMX > - add XEN_SYSCTL_PHYSCAP_nestedhvm > - add IS_ENABLED check in hvm_nested_virt_supported > --- > xen/arch/x86/hvm/Kconfig | 10 ++++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/nestedhvm.h | 60 +++++++++++++++++++++-- > xen/arch/x86/hvm/svm/svm.c | 6 +++ > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/vmx.c | 10 +++- > xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 52 ++++++++++++++++---- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 62 ++++++++++++++++++++++++ > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 4 +- > xen/arch/x86/mm/p2m.h | 6 +++ > xen/arch/x86/sysctl.c | 2 + > xen/include/public/sysctl.h | 4 +- > 15 files changed, 202 insertions(+), 24 deletions(-) > > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..133f19a063 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,14 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > > +config NESTED_VIRT > + bool "Nested virtualization support" > + depends on AMD_SVM || INTEL_VMX > + default n > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. > + > + If unsure, say N. > + > endif > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > index f34fb03934..b8a0a68624 100644 > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -18,7 +18,7 @@ obj-y += irq.o > obj-y += mmio.o > obj-$(CONFIG_VM_EVENT) += monitor.o > obj-y += mtrr.o > -obj-y += nestedhvm.o > +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o > obj-y += pmtimer.o > obj-y += quirks.o > obj-y += rtc.o > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile > index 8a072cafd5..92418e3444 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -2,6 +2,6 @@ obj-y += asid.o > obj-y += emulate.o > obj-bin-y += entry.o > obj-y += intr.o > -obj-y += nestedsvm.o > +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o > obj-y += svm.o > obj-y += vmcb.o > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h > index 9bfed5ffd7..ed1aa847e5 100644 > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -26,6 +26,13 @@ > #define nsvm_efer_svm_enabled(v) \ > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) I wonder whether you also want to force this one to return false if NETSED_VIRT is disabled. That would likely lead to more DCE by the compiler: #define nsvm_efer_svm_enabled(v) \ (IS_ENABLED(CONFIG_NESTED_VIRT) && !!((v)->arch.hvm.guest_efer & EFER_SVME)) > > +#define NSVM_INTR_NOTHANDLED 3 > +#define NSVM_INTR_NOTINTERCEPTED 2 > +#define NSVM_INTR_FORCEVMEXIT 1 > +#define NSVM_INTR_MASKED 0 > + > +#ifdef CONFIG_NESTED_VIRT > + > int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); > void nestedsvm_vmexit_defer(struct vcpu *v, > uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2); > @@ -57,13 +64,56 @@ int cf_check nsvm_hap_walk_L1_p2m( > struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa, unsigned int *page_order, > uint8_t *p2m_acc, struct npfec npfec); > > -#define NSVM_INTR_NOTHANDLED 3 > -#define NSVM_INTR_NOTINTERCEPTED 2 > -#define NSVM_INTR_FORCEVMEXIT 1 > -#define NSVM_INTR_MASKED 0 > - > int nestedsvm_vcpu_interrupt(struct vcpu *v, const struct hvm_intack intack); > > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) > +{ > + ASSERT_UNREACHABLE(); > + return -EOPNOTSUPP; I think this is guest-reachable code even when nested virt is build time disabled: VMEXIT_VMRUN -> svm_vmexit_do_vmrun() -> nestedsvm_vmcb_map(). I think you rely on nsvm_efer_svm_enabled() always returning false, as all calls to nestedsvm_vmcb_map() are gated on nsvm_efer_svm_enabled() returning true. > +} > +static inline void nestedsvm_vmexit_defer(struct vcpu *v, > + uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline enum nestedhvm_vmexits nestedsvm_vmexit_n2n1(struct vcpu *v, > + struct cpu_user_regs *regs) > +{ > + ASSERT_UNREACHABLE(); > + return NESTEDHVM_VMEXIT_ERROR; > +} > +static inline enum nestedhvm_vmexits nestedsvm_check_intercepts(struct vcpu *v, > + struct cpu_user_regs *regs, uint64_t exitcode) > +{ > + ASSERT_UNREACHABLE(); > + return NESTEDHVM_VMEXIT_ERROR; For the above two you possibly want to return NESTEDHVM_VMEXIT_FATALERROR so that the L1 guest is killed. This should be unreachable code when nested virt is build disabled, and hence it's safer to kill the guest, rather than attempting to report an error to L1. > +} > +static inline void svm_nested_features_on_efer_update(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void svm_vmexit_do_clgi(struct cpu_user_regs *regs, > + struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void svm_vmexit_do_stgi(struct cpu_user_regs *regs, > + struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} Aren't those last two guest reachable if it tries to execute an STGI or CLGI instruction? I see the svm exit handler calling straight into svm_vmexit_do_{st,cl}gi() as a result of VMEXIT_{ST,CL}GI vmexit. > +static inline bool nestedsvm_gif_isset(struct vcpu *v) { return true; } I think this one above is really unreachable when `nestedsvm.c` is not build, and hence you could even remove the handler here. > +static inline int nestedsvm_vcpu_interrupt(struct vcpu *v, > + const struct hvm_intack intack) > +{ > + ASSERT_UNREACHABLE(); > + return NSVM_INTR_NOTINTERCEPTED; > +} > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __X86_HVM_SVM_NESTEDHVM_PRIV_H__ */ > > /* > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..0234b57afb 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -46,6 +46,10 @@ > > void noreturn svm_asm_do_resume(void); > > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nsvm_vcpu_switch(void) { } > +#endif Instead of adding the ifdefs here, you could maybe add them to svm/entry.S and elide the call to nsvm_vcpu_switch() altogether? > + > u32 svm_feature_flags; > > /* > @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > .set_rdtsc_exiting = svm_set_rdtsc_exiting, > .get_insn_bytes = svm_get_insn_bytes, > > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise = nsvm_vcpu_initialise, > .nhvm_vcpu_destroy = nsvm_vcpu_destroy, > .nhvm_vcpu_reset = nsvm_vcpu_reset, > @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { > .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, > .nhvm_intr_blocked = nsvm_intr_blocked, > .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, > +#endif > > .get_reg = svm_get_reg, > .set_reg = svm_set_reg, > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile > index 04a29ce59d..902564b3e2 100644 > --- a/xen/arch/x86/hvm/vmx/Makefile > +++ b/xen/arch/x86/hvm/vmx/Makefile > @@ -3,4 +3,4 @@ obj-y += intr.o > obj-y += realmode.o > obj-y += vmcs.o > obj-y += vmx.o > -obj-y += vvmx.o > +obj-$(CONFIG_NESTED_VIRT) += vvmx.o > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 82c55f49ae..252f27322b 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -55,6 +55,10 @@ > #include > #include > > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nvmx_switch_guest(void) { } > +#endif Similar to my remark above, you could likely move the ifdef to the assembly call site. > static bool __initdata opt_force_ept; > boolean_param("force-ept", opt_force_ept); > > @@ -2033,7 +2037,7 @@ static void nvmx_enqueue_n2_exceptions(struct vcpu *v, > nvmx->intr.intr_info, nvmx->intr.error_code); > } > > -static int cf_check nvmx_vmexit_event( > +static int cf_check __maybe_unused nvmx_vmexit_event( Maybe you can move this one to the vvmx.c file? It seems like an odd one to have defined in vmx.c. > struct vcpu *v, const struct x86_event *event) > { > nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > @@ -2933,6 +2937,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .handle_cd = vmx_handle_cd, > .set_info_guest = vmx_set_info_guest, > .set_rdtsc_exiting = vmx_set_rdtsc_exiting, > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise = nvmx_vcpu_initialise, > .nhvm_vcpu_destroy = nvmx_vcpu_destroy, > .nhvm_vcpu_reset = nvmx_vcpu_reset, > @@ -2942,8 +2947,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, > .nhvm_intr_blocked = nvmx_intr_blocked, > .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, > - .update_vlapic_mode = vmx_vlapic_msr_changed, > .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, > +#endif > + .update_vlapic_mode = vmx_vlapic_msr_changed, > #ifdef CONFIG_VM_EVENT > .enable_msr_interception = vmx_enable_msr_interception, > #endif > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h > index 7d9774df59..536a38b450 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -711,7 +711,7 @@ static inline bool hvm_altp2m_supported(void) > /* Returns true if we have the minimum hardware requirements for nested virt */ > static inline bool hvm_nested_virt_supported(void) > { > - return hvm_funcs.caps.nested_virt; > + return IS_ENABLED(CONFIG_NESTED_VIRT) && hvm_funcs.caps.nested_virt; > } > > #ifdef CONFIG_ALTP2M > diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h > index ea2c1bc328..e18d59e0eb 100644 > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT > + > /* Nested VCPU */ > int nestedhvm_vcpu_initialise(struct vcpu *v); > void nestedhvm_vcpu_destroy(struct vcpu *v); > @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); > #define nestedhvm_vcpu_exit_guestmode(v) \ > vcpu_nestedhvm(v).nv_guestmode = 0 > > -/* Nested paging */ > -#define NESTEDHVM_PAGEFAULT_DONE 0 > -#define NESTEDHVM_PAGEFAULT_INJECT 1 > -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > -#define NESTEDHVM_PAGEFAULT_MMIO 4 > -#define NESTEDHVM_PAGEFAULT_RETRY 5 > -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > struct npfec npfec); > > @@ -59,6 +63,36 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); > > void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); > > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > + return -EOPNOTSUPP; > +} > +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } > +static inline void nestedhvm_vcpu_reset(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } > +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > + struct npfec npfec) > +{ > + ASSERT_UNREACHABLE(); > + return NESTEDHVM_PAGEFAULT_L0_ERROR; > +} > +#define nestedhvm_vcpu_enter_guestmode(v) do { ASSERT_UNREACHABLE(); } while (0) > +#define nestedhvm_vcpu_exit_guestmode(v) do { ASSERT_UNREACHABLE(); } while (0) > +#define nestedhvm_paging_mode_hap(v) false > +#define nestedhvm_vmswitch_in_progress(v) false Why are those defines instead of static inlines? > +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) > +{ > + ASSERT_UNREACHABLE(); > +} > + > +#endif /* CONFIG_NESTED_VIRT */ > + > static inline bool nestedhvm_is_n2(struct vcpu *v) > { > if ( !nestedhvm_enabled(v->domain) || > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > index da10d3fa96..ad56cdf01e 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > @@ -73,6 +73,8 @@ union vmx_inst_info { > u32 word; > }; > > +#ifdef CONFIG_NESTED_VIRT > + > int cf_check nvmx_vcpu_initialise(struct vcpu *v); > void cf_check nvmx_vcpu_destroy(struct vcpu *v); > int cf_check nvmx_vcpu_reset(struct vcpu *v); > @@ -199,5 +201,65 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, > uint64_t *exit_qual, uint32_t *exit_reason); > int nvmx_cpu_up_prepare(unsigned int cpu); > void nvmx_cpu_dead(unsigned int cpu); > + > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, > + unsigned long value) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void nvmx_update_exception_bitmap(struct vcpu *v, > + unsigned long value) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} > +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, > + int error_code) > +{ > + ASSERT_UNREACHABLE(); > + return false; > +} > +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, > + unsigned int exit_reason) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} > +static inline void nvmx_idtv_handling(void) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} I think this function is reachable even when nested virt is not enabled: vmx_msr_read_intercept() -> case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC -> nvmx_msr_read_intercept() I'm also confused about why the function returns 0 instead of an error when !nestedhvm_enabled(). We should probably make it return -ENODEV when nested virt is not available or enabled. > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > + unsigned int exit_reason) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} Same here, I think this is likely reachable from vmx_vmexit_handler(), and shouldn't assert? It should also do something like: hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return X86EMUL_EXCEPTION; So it mimics what the function itself does when !nestedhvm_enabled(). > +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } > +static inline void nvmx_cpu_dead(unsigned int cpu) { } > + > +#define get_vvmcs(vcpu, encoding) 0 This likely wants to be a static inline and have an ASSERT_UNREACHABLE()? From a quick look it seems like call sites do check that the vpcu is in guest mode before attempting to fetch a field from the nested VMCS. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon Feb 09 11:34:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 11:34:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225264.1531728 (Exim 4.92) (envelope-from ) id 1vpPX9-0007nq-Ic; Mon, 09 Feb 2026 11:34:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225264.1531728; Mon, 09 Feb 2026 11:34:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPX9-0007nj-FM; Mon, 09 Feb 2026 11:34:27 +0000 Received: by outflank-mailman (input) for mailman id 1225264; Mon, 09 Feb 2026 11:34:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPX7-0007nc-P7 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 11:34:25 +0000 Received: from mail177-22.suw61.mandrillapp.com (mail177-22.suw61.mandrillapp.com [198.2.177.22]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4592c962-05ab-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 12:34:19 +0100 (CET) Received: from pmta14.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail177-22.suw61.mandrillapp.com (Mailchimp) with ESMTP id 4f8jJp3Y8czGlspFT for ; Mon, 9 Feb 2026 11:34:18 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id bdcf0703707f407d99f9ec1d35fae8ed; Mon, 09 Feb 2026 11:34:18 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4592c962-05ab-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770636858; x=1770906858; bh=z+5bID8B4TwdHcS855x2tQYEC5yCWNBE+4Tk0xW2DB0=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=GsUGkxNoEbItShzNz3FNY3wdo3I3QGhdDrVe7uIxiPkydzK/5cQIMWYR3UJMYYnQN dJtd2GN1SQaN0h2HuMZNqYKvqUTHgjwRLGrLduznCJruqgCzfkcRQCxbA2HPMY/h3w +5mcoA7cCxaIa9zJvbB4tww/r05lLFNFP6AN4Av3sdL+1bCWrgDRZplmW2CvBqQaXH dyBm49VCBBNJlrJs+/Aa96chqZoczbVlz2NSwsxj5ZJEhl3LQdQCt+iIh5QsWBeGPZ IwajwqP+7KIaXlZkVfs6Nbyj4BoLmZUF2Fn4ykgxJ6YfxxF5cTshFsUp6d/uTabG9j dYzhwhtjpKK+g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770636858; x=1770897358; i=julian.vetter@vates.tech; bh=z+5bID8B4TwdHcS855x2tQYEC5yCWNBE+4Tk0xW2DB0=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=tckZcawuk7VX8DLCwfV0lS8GkXe5JThP7mb5BI9tWb3r8L2KuZhcxRB9gfF5ywbmz 41q2vCmg+qznch+DGOIGa1qChf6ncvbJCJjq5KHRW07egICynDOUdfsvcQQHzYSqoz vmULI/QAoydiw5gMMW9aU32R+K1LIEajaZ8TUMZg9B7vcR1RCCGio96mSL2IzmSJw8 Lq7UADMWzIEw0L7jFB2kAJsixe731KkwudU4iCIga6AEy4UrwI3ywVkGdzOGecV3qP ssTNgfEozCmv9niAYtlFJq2AsUNlG1IWl4qMMMJ0kjxhdEJEhU+A75kDcCdhB8dWJx qTct4eWf17zfg== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770636857446 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Julian Vetter" Message-Id: <20260209113412.2603088-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.bdcf0703707f407d99f9ec1d35fae8ed?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260209:md Date: Mon, 09 Feb 2026 11:34:18 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI addresses and IO-APIC RTEs only provide an 8-bit destination field. Without extended destination ID support, Linux limits the maximum usable APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, signalling that guests may use MSI address bits 11:5 and IO-APIC RTE bits 55:49 as additional high destination ID bits. This expands the destination ID from 8 to 15 bits. Signed-off-by: Julian Vetter --- xen/arch/x86/cpuid.c | 9 +++++++++ xen/arch/x86/hvm/irq.c | 11 ++++++++++- xen/arch/x86/hvm/vioapic.c | 2 +- xen/arch/x86/hvm/vmsi.c | 4 ++-- xen/arch/x86/include/asm/hvm/hvm.h | 4 ++-- xen/arch/x86/include/asm/hvm/vioapic.h | 13 +++++++++++++ xen/arch/x86/include/asm/msi.h | 3 +++ 7 files changed, 40 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index d85be20d86..fb17c71d74 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, res->a |= XEN_HVM_CPUID_DOMID_PRESENT; res->c = d->domain_id; + /* + * Advertise extended destination ID support. This allows guests to use + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC RTE for + * additional destination ID bits, expanding the addressable APIC ID + * range from 8 to 15 bits. This is required for x2APIC guests with + * APIC IDs > 255. + */ + res->a |= XEN_HVM_CPUID_EXT_DEST_ID; + /* * Per-vCPU event channel upcalls are implemented and work * correctly with PIRQs routed over event channels. diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 5f64361113..2cc14d37d4 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -374,7 +374,16 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) { uint32_t tmp = (uint32_t) addr; - uint8_t dest = (tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; + /* + * Standard MSI destination: address bits 19:12 (8 bits). + * Extended MSI destination: address bits 11:5 (7 more bits). + * When XEN_HVM_CPUID_EXT_DEST_ID is advertised, the guest may use + * bits 11:5 for high destination ID bits, expanding to 15 bits total. + * For legacy guests these bits are 0, so this is backwards-compatible. + */ + uint32_t dest = + (((tmp & MSI_ADDR_EXT_DEST_ID_MASK) >> MSI_ADDR_EXT_DEST_ID_SHIFT) << 8) | + ((tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT); uint8_t dest_mode = !!(tmp & MSI_ADDR_DESTMODE_MASK); uint8_t delivery_mode = (data & MSI_DATA_DELIVERY_MODE_MASK) >> MSI_DATA_DELIVERY_MODE_SHIFT; diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 7c725f9e47..263b1bd5cb 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -411,7 +411,7 @@ static void ioapic_inj_irq( static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) { - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; + uint32_t dest = VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); uint8_t dest_mode = vioapic->redirtbl[pin].fields.dest_mode; uint8_t delivery_mode = vioapic->redirtbl[pin].fields.delivery_mode; uint8_t vector = vioapic->redirtbl[pin].fields.vector; diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 27b1f089e2..dca191b4f1 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -66,7 +66,7 @@ static void vmsi_inj_irq( int vmsi_deliver( struct domain *d, int vector, - uint8_t dest, uint8_t dest_mode, + uint32_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t trig_mode) { struct vlapic *target; @@ -125,7 +125,7 @@ void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci) } /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id */ -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest_mode) +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t dest_mode) { int dest_vcpu_id = -1, w = 0; struct vcpu *v; diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..11256d5e67 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -295,11 +295,11 @@ uint64_t hvm_get_guest_time_fixed(const struct vcpu *v, uint64_t at_tsc); int vmsi_deliver( struct domain *d, int vector, - uint8_t dest, uint8_t dest_mode, + uint32_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t trig_mode); struct hvm_pirq_dpci; void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci); -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest_mode); +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t dest_mode); enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack); diff --git a/xen/arch/x86/include/asm/hvm/vioapic.h b/xen/arch/x86/include/asm/hvm/vioapic.h index 68af6dce79..b49eb348d5 100644 --- a/xen/arch/x86/include/asm/hvm/vioapic.h +++ b/xen/arch/x86/include/asm/hvm/vioapic.h @@ -32,6 +32,19 @@ #define VIOAPIC_EDGE_TRIG 0 #define VIOAPIC_LEVEL_TRIG 1 +/* + * Extract the destination ID from a 64-bit IO-APIC RTE, including the + * extended bits (55:49) used when XEN_HVM_CPUID_EXT_DEST_ID is advertised. + */ +#define IO_APIC_REDIR_DEST_SHIFT 56 +#define IO_APIC_REDIR_DEST_MASK 0xffULL +#define IO_APIC_REDIR_EXT_DEST_SHIFT 49 +#define IO_APIC_REDIR_EXT_DEST_MASK 0x7fULL + +#define VIOAPIC_RTE_DEST(rte) \ + ((((rte) >> IO_APIC_REDIR_DEST_SHIFT) & IO_APIC_REDIR_DEST_MASK) | \ + (((rte) >> IO_APIC_REDIR_EXT_DEST_SHIFT) & IO_APIC_REDIR_EXT_DEST_MASK) << 8) + #define VIOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000U #define VIOAPIC_MEM_LENGTH 0x100 diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h index 00059d4a3a..b7a132e5b5 100644 --- a/xen/arch/x86/include/asm/msi.h +++ b/xen/arch/x86/include/asm/msi.h @@ -54,6 +54,9 @@ #define MSI_ADDR_DEST_ID_MASK 0x00ff000 #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) +#define MSI_ADDR_EXT_DEST_ID_SHIFT 5 +#define MSI_ADDR_EXT_DEST_ID_MASK 0x0000fe0 + /* MAX fixed pages reserved for mapping MSIX tables. */ #define FIX_MSIX_MAX_PAGES 512 -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 09 11:37:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 11:37:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225271.1531737 (Exim 4.92) (envelope-from ) id 1vpPa8-0008PZ-V6; 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charset=utf-8 Content-Transfer-Encoding: 7bit HVM guests with more than 128 vCPUs require APIC IDs above 255 (since APIC ID = vcpu_id * 2), which exceeds the 8-bit xAPIC limit. Currently, CPUID leaf 0xB returns EBX=0, making firmware (OVMF/EDK2) fall back to CPUID leaf 1 for APIC ID discovery, which is limited to 8 bits and cannot distinguish vCPUs with APIC IDs greater than 256. To address this, implement proper CPUID leaf 0xB x2APIC topology enumeration. Present all vCPUs as cores in a single package with correct shift values based on the maximum APIC ID, and non-zero EBX so that firmware uses the 32-bit x2APIC ID from EDX. Moreover, set CPUID leaf 1 EBX[23:16] (max addressable logical processor IDs) to the appropriate power-of-2 value, but capped at 255. Signed-off-by: Julian Vetter --- xen/arch/x86/cpuid.c | 54 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index ceac37b3ae..fb17c71d74 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -284,10 +284,26 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, const struct cpu_user_regs *regs; case 0x1: - /* TODO: Rework topology logic. */ res->b &= 0x00ffffffu; if ( is_hvm_domain(d) ) - res->b |= (v->vcpu_id * 2) << 24; + { + unsigned int max_apic_id, max_lp; + + /* + * EBX[23:16] = Maximum number of addressable IDs for logical + * processors in a physical package. Must be large enough to + * accommodate all vCPU APIC IDs. Round up to next power of 2. + * + * With APIC ID = vcpu_id * 2, max APIC ID = (max_vcpus - 1) * 2. + * We need max_lp to be greater than max_apic_id for proper + * enumeration. + */ + max_apic_id = (d->max_vcpus - 1) * 2; + max_lp = min(1u << fls(max_apic_id), 255u); + + res->b = (res->b & 0xff00ffffu) | (max_lp << 16); + res->b |= (uint8_t)(v->vcpu_id * 2) << 24; + } /* TODO: Rework vPMU control in terms of toolstack choices. */ if ( vpmu_available(v) && @@ -463,11 +479,41 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, * coupled with x2apic, and we offer an x2apic-capable APIC emulation * to guests on AMD hardware as well. * - * TODO: Rework topology logic. + * Provide a simple topology where all vCPUs are cores in a single + * package (no SMT). This ensures EBX is non-zero so that software + * (like EDK2/OVMF) uses the 32-bit x2APIC ID from EDX. */ if ( p->basic.x2apic ) { - *(uint8_t *)&res->c = subleaf; + unsigned int max_vcpus = d->max_vcpus; + unsigned int max_apic_id = (max_vcpus - 1) * 2; + unsigned int shift; + + /* Calculate shift value for Core level topology. */ + shift = fls(max_apic_id); + + switch ( subleaf ) + { + /* SMT level - no hyperthreading, 1 thread per core */ + case 0x0: + res->a = 0; /* No shift (1 thread per core) */ + res->b = 1; /* 1 logical processor at this level */ + res->c = 0x100 | 0; /* Level type 1 (SMT), level number 0 */ + break; + + /* Core level - all vCPUs are cores in one package */ + case 0x1: + res->a = shift; /* Bits to shift to get package ID */ + res->b = max_vcpus; /* Number of logical processors */ + res->c = 0x200 | 1; /* Level type 2 (Core), level number 1 */ + break; + + default: /* Invalid level */ + res->a = 0; + res->b = 0; + res->c = subleaf; /* Level number only, type 0 (invalid) */ + break; + } /* Fix the x2APIC identifier. */ res->d = v->vcpu_id * 2; -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 09 11:57:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 11:57:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225279.1531748 (Exim 4.92) (envelope-from ) id 1vpPtA-0002nD-F4; Mon, 09 Feb 2026 11:57:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225279.1531748; Mon, 09 Feb 2026 11:57:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPtA-0002n6-BO; Mon, 09 Feb 2026 11:57:12 +0000 Received: by outflank-mailman (input) for mailman id 1225279; Mon, 09 Feb 2026 11:57:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPt8-0002n0-Bd for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: geAKpG2khK4y8t7d4qI6PLJ5YBbsvT5Cv/KyTBev5SV9/5LmWsBCYka5t3vtYVmiQ51lfkYfyA71bf5a5T2k+7bLmGau27XoAMZeI4/YF2SHLI7sFU43iwX+L61LvVomQm6kiRhb5XIc9Tm1/NQkTrTPHG4P74HUBJadE0TlXyX2v917N9mtB2XW4HlfmncuRCiTAju3eaKhcYUuyKy7fKl/RL/ncXBTpGjQwhlKMAFnthdBaKtGBRAMD6B2GSrDwuaq8kmaweklQpY0PeCVCkvRU2XjUFV5oEVCPkQUhXZ2NbZnIGGbgbNQIR0QKqerp4ANMIVhcUKC1foS9KRZADkt9hHm/iInMBjDQN9gSTn1FUfW/+eg+o4k3oRvA6hZevBT7zKylxFntYHiVuMmWzlbYeBaOs9opOqvgx7ImwGY6YoxmG5F1WzeV6N1wDmK X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 11:56:58.0797 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 79e06539-bed9-4e17-9cf6-08de67d253ee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023CF.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8085 On Mon Feb 9, 2026 at 11:15 AM CET, Jan Beulich wrote: > On 09.02.2026 11:05, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 10:21 AM CET, Jan Beulich wrote: >>> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>>> High level description >>>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >>>> >>>> When compared to the RFC this makes a different approach The series in= troduces >>>> cpu_vendor() which maps to a constant in the single vendor case and to >>>> (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDOR= S is a >>>> mask of the compile-time chosen vendors. This enables the compiler to = detect >>>> dead-code at the uses and remove all unreachable branches, including i= n >>>> switches. >>>> >>>> When compared to the x86_vendor_is() macro introduced in the RFC, this= is >>>> simpler. It achieves MOST of what the older macro did without touching= the >>>> switches, with a few caveats: >>>> >>>> 1. Compiled-out vendors cause a panic, they don't fallback onto the = unknown >>>> vendor case. In retrospect, this is a much saner thing to do. >>> >>> I'm unconvinced here. Especially our Centaur and Shanghai support is at= best >>> rudimentary. Treating those worse when configured-out than when configu= red-in >>> feels questionable. >>=20 >> Isn't that the point of configuring out? > > That's what I'm unsure about. I'm really missing what you're trying to make, sorry. How, if at all, is it helpful for a hypervisor with a compiled out vendor to be bootable on a mac= hine of that vendor? > >> Besides the philosophical matter of whether or not a compiled-out vendor >> should be allowed to run there's the more practical matter of what to do >> with the x86_vendor field of boot_cpu_data. Because at that point our ta= ke >> that cross-vendor support is forbidden is a lot weaker. If I can run an >> AMD-hypervisor on an Intel host, what then? What policies would be allow= ed? If I >> wipe x86_vendor then policies with some unknown vendor would be fine. Sh= ould the >> leaves match too? If I do not wipe the field, should I do black magic to= ensure >> the behaviour is different depending on whether the vendor is compiled i= n or >> not? What if I want to migrate a VM currently running in this hypothetic= al >> hypervisor? The rules becomes seriously complex. >>=20 >> It's just a lot cleaner to take the stance that compiled out vendors can= 't run. >> Then everything else is crystal clear and we avoid a universe's worth of= corner >> cases. I expect upstream Xen to support all cases (I'm skeptical about t= he >> utility of the unknown vendor path, but oh well), but many downstreams m= ight >> benefit from killing off support for vendors they really will never touc= h. > > To them, will panic()ing (or not) make a difference? One would hope not because the're compiling them out for a reason. But for upstream, not panicking brings a sea of corner cases. The ones I mentioned above is not the whole list. Turning the question around. Who benefits from not panicking? > >>>> 2. equalities and inequalities have been replaced by equivalent (cpu= _vendor() & ...) >>>> forms. This isn't stylistic preference. This form allows the comp= iler >>>> to merge the compared-against constant with X86_ENABLED_VENDORS, = yielding >>>> much better codegen throughout the tree. >>>> >>>> The effect of (2) triples the delta in the full build below. >>>> >>>> Some differences might be attributable to the change from policy vendo= r checks >>>> to boot_cpu_data. In the case of the emulator it caused a 400 bytes in= crease >>>> due to the way it checks using LOTS of macro invocations, so I left th= at one >>>> piece using the policy vendor except for the single vendor case. >>> >>> For the emulator I'd like to point out this question that I raised in t= he >>> AVX10 series: >>=20 >> There's no optimisation shortage for the emulator. For that patch I just >> ensure I didn't make a tricky situation worse. It is much better in the = single-vendor case. >>=20 >>> "Since it'll be reducing code size, we may want to further convert >>> host_and_vcpu_must_have() to just vcpu_must_have() where appropriate >>> (should be [almost?] everywhere)." >>> >>> Sadly there was no feedback an that (or really on almost all of that wo= rk) at >>> all so far. >>=20 >> It sounds fairly orthogonal to this, unless I'm missing the point. > > It's largely orthogonal, except that if we had gone that route already, y= our > codegen diff might look somewhat different. > >> In principle that would be fine. the vCPU features whose emulation requi= res >> special instructions are most definitely a subset of those of the host a= nyway. >>=20 >> I agree many cases could be simplified as you describe. >>=20 >> I do see a worrying danger of XSA should the max policy ever exceed the >> capabilities of the host on a feature required for emulating some instru= ction >> for that very feature. Then the guest could abuse the emulator to trigge= r #UD >> inside the hypervisor's emulation path. > > Well, that max-policy related question is why I've raised the point, rath= er > than making (more) patches right away. All jmp_rel() macros have amd_like() inside, and other checks are open-code= d in many places. The problem is that offsets into the policy pointer (which is stored in a register) end up being global accesses to an offset from a non-register-cached 64bit address. And that adds up. having an amd_like boo= lean in the ctxt would've helped, but I went for the least intrusive solution. I'm not sure how what you brought up would've helped for this particular co= degen matter. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 11:58:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 11:58:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225285.1531757 (Exim 4.92) (envelope-from ) id 1vpPun-0003RW-TZ; Mon, 09 Feb 2026 11:58:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225285.1531757; Mon, 09 Feb 2026 11:58:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPun-0003RP-Qh; Mon, 09 Feb 2026 11:58:53 +0000 Received: by outflank-mailman (input) for mailman id 1225285; Mon, 09 Feb 2026 11:58:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpPum-0003RJ-Im for xen-devel@lists.xenproject.org; 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Currently, > CPUID leaf 0xB returns EBX=0, making firmware (OVMF/EDK2) fall back to > CPUID leaf 1 for APIC ID discovery, which is limited to 8 bits and > cannot distinguish vCPUs with APIC IDs greater than 256. > To address this, implement proper CPUID leaf 0xB x2APIC topology > enumeration. Present all vCPUs as cores in a single package with correct > shift values based on the maximum APIC ID, and non-zero EBX so that > firmware uses the 32-bit x2APIC ID from EDX. Moreover, set CPUID leaf 1 > EBX[23:16] (max addressable logical processor IDs) to the appropriate > power-of-2 value, but capped at 255. > > Signed-off-by: Julian Vetter This may work for cleanly booted VMs, but it's unsafe and will cause VMs to crash on migrate. The toolstack needs to choose the APIC IDs and topology.  Alejandro had a series working on this problem, which needs picking back up.  https://lore.kernel.org/xen-devel/20241021154600.11745-1-alejandro.vallejo@cloud.com ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 09 12:30:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 12:30:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225300.1531769 (Exim 4.92) (envelope-from ) id 1vpQPW-0000FX-Bi; Mon, 09 Feb 2026 12:30:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225300.1531769; Mon, 09 Feb 2026 12:30:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpQPW-0000FQ-7b; Mon, 09 Feb 2026 12:30:38 +0000 Received: by outflank-mailman (input) for mailman id 1225300; Mon, 09 Feb 2026 12:30:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpQPV-0000FK-16 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 12:30:37 +0000 Received: from mail177-22.suw61.mandrillapp.com (mail177-22.suw61.mandrillapp.com [198.2.177.22]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2142db85-05b3-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 13:30:34 +0100 (CET) Received: from pmta14.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail177-22.suw61.mandrillapp.com (Mailchimp) with ESMTP id 4f8kYj3m7NzGlspS5 for ; Mon, 9 Feb 2026 12:30:33 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 83dfc58c492b4955aa7410bdef83aa34; Mon, 09 Feb 2026 12:30:33 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2142db85-05b3-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770640233; x=1770910233; bh=TfENv7311CbqQTHZdmTk5osd0PeqUAge6A03sADL0to=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=jnNTh1wQUB0i+0aCdmjW+TEhpJC3RBmA/UHU3pZ312mixmiH6IYIyxlqYf3/itEvW ZAg7MNQ1m2I4x2hjWoKmRnB0mx0kwkhDI+SgA15f675VZOmY0OkQ9qWHeuLR5rRLlH X32opi53i+lIF48pNIu3CZjgNnIFbZz2zrrKYPFla1+au6uSZsYliKyIgasm595kn4 ThjXiJq1dcg4GJvLQVeD5uDtqMlVCj6ixDbO8pLWmRta+Me1fJc0RXRT4yK8stsed/ lH3OR6mJY7rB9HWx1HvhDQFK19HBP7JDnWqVQLQgBVkWJzpZYpmt8axsvkmO8bR7En 3AET6lBvDS0qw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770640233; x=1770900733; i=julian.vetter@vates.tech; bh=TfENv7311CbqQTHZdmTk5osd0PeqUAge6A03sADL0to=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=vYaceytzXnH1/JB/7kZpZj3Hm2fNaW3/zb/ZyqjcJytATRWDC4XSphZVin267oI6I gCOkIxr0wfMtn/l/htNzX5o7z8UB4kxkop1hWuInTBvAeZKYECdB4CL5QZE+j65kEF i7HV8PUAI8ppStJsWADuZX2UjkOkvdf1VU95Iv0IfwckglSSPkUYSYUtd2Ot8So2fS ha1jt7vwyNSiDmKT0VfThLOidhXRNLBsy0UbCIuaSD5lVxnqGdmZZT+m04hAJuhOsO nVTzKZc1x0aIlPdhADT9HsAyYUkdhfWT1cgMWq1OTD7Ec1ALUA25wJs9qdH/iVBmOI 4oLSPApkFyKNA== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH]=20x86/ioreq:=20Extend=20ioreq=20server=20to=20support=20multiple=20ioreq=20pages?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770640232140 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Julian Vetter" Message-Id: <20260209123025.2628513-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.83dfc58c492b4955aa7410bdef83aa34?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260209:md Date: Mon, 09 Feb 2026 12:30:33 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit A single shared ioreq page provides PAGE_SIZE/sizeof(struct ioreq) = 128 slots, limiting HVM guests to 128 vCPUs. To support more vCPUs, extend the ioreq server to allocate multiple contiguous ioreq pages based on the max number of vCPUs. This patch replaces the single ioreq_page with an array of pages (ioreq_pages). It also extends the GFN allocation to find contiguous free GFNs for multi-page mappings. All existing single-page paths (bufioreq, legacy clients) remain unchanged. Signed-off-by: Julian Vetter --- xen/arch/x86/hvm/ioreq.c | 160 ++++++++++++++++++++++++++++++--------- xen/common/ioreq.c | 145 +++++++++++++++++++++++------------ xen/include/xen/ioreq.h | 13 +++- 3 files changed, 230 insertions(+), 88 deletions(-) diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index a5fa97e149..a5c2a4baca 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -71,6 +71,38 @@ static gfn_t hvm_alloc_legacy_ioreq_gfn(struct ioreq_server *s) return INVALID_GFN; } +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, + unsigned int nr_pages) +{ + struct domain *d = s->target; + unsigned long mask = d->arch.hvm.ioreq_gfn.mask; + unsigned int i, run; + + /* Find nr_pages consecutive set bits */ + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) + { + if ( test_bit(i, &mask) ) + { + if ( ++run == nr_pages ) + { + /* Found a run - clear all bits and return base GFN */ + unsigned int start = i - nr_pages + 1; + for ( unsigned int j = start; j <= i; j++ ) + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); + return _gfn(d->arch.hvm.ioreq_gfn.base + start); + } + } + else + run = 0; + } + + /* Fall back to legacy for single page only */ + if ( nr_pages == 1 ) + return hvm_alloc_legacy_ioreq_gfn(s); + + return INVALID_GFN; +} + static gfn_t hvm_alloc_ioreq_gfn(struct ioreq_server *s) { struct domain *d = s->target; @@ -121,52 +153,95 @@ static void hvm_free_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) } } +static void hvm_free_ioreq_gfns(struct ioreq_server *s, gfn_t gfn, + unsigned int nr_pages) +{ + unsigned int i; + + for ( i = 0; i < nr_pages; i++ ) + hvm_free_ioreq_gfn(s, _gfn(gfn_x(gfn) + i)); +} + static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + for ( i = 0; i < nr_pages; i++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; + + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + continue; - destroy_ring_for_helper(&iorp->va, iorp->page); - iorp->page = NULL; + destroy_ring_for_helper(&iorp->va, iorp->page); + iorp->page = NULL; - hvm_free_ioreq_gfn(s, iorp->gfn); - iorp->gfn = INVALID_GFN; + hvm_free_ioreq_gfn(s, iorp->gfn); + iorp->gfn = INVALID_GFN; + } } static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; + gfn_t base_gfn; int rc; - if ( iorp->page ) + /* Check if already mapped */ + for ( i = 0; i < nr_pages; i++ ) { - /* - * If a page has already been allocated (which will happen on - * demand if ioreq_server_get_frame() is called), then - * mapping a guest frame is not permitted. - */ - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return -EPERM; + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; - return 0; + if ( iorp->page ) + { + /* + * If a page has already been allocated (which will happen on + * demand if ioreq_server_get_frame() is called), then + * mapping a guest frame is not permitted. + */ + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return -EPERM; + + return 0; + } } if ( d->is_dying ) return -EINVAL; - iorp->gfn = hvm_alloc_ioreq_gfn(s); + /* Allocate contiguous GFNs for all pages */ + base_gfn = buf ? hvm_alloc_ioreq_gfn(s) : hvm_alloc_ioreq_gfns(s, nr_pages); - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + if ( gfn_eq(base_gfn, INVALID_GFN) ) return -ENOMEM; - rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, - &iorp->va); + /* Map each page */ + for ( i = 0; i < nr_pages; i++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; + + iorp->gfn = _gfn(gfn_x(base_gfn) + i); - if ( rc ) - hvm_unmap_ioreq_gfn(s, buf); + rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, + &iorp->va); + if ( rc ) + goto fail; + } + + return 0; + +fail: + /* Unmap any pages we successfully mapped */ + while ( i-- > 0 ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; + + destroy_ring_for_helper(&iorp->va, iorp->page); + iorp->page = NULL; + iorp->gfn = INVALID_GFN; + } + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); return rc; } @@ -174,32 +249,43 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + for ( i = 0; i < nr_pages; i++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; + + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + continue; - if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) - domain_crash(d); - clear_page(iorp->va); + if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) + domain_crash(d); + clear_page(iorp->va); + } } static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; int rc; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return 0; + for ( i = 0; i < nr_pages; i++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; - clear_page(iorp->va); + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + continue; - rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); - if ( rc == 0 ) - paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); + clear_page(iorp->va); - return rc; + rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); + if ( rc ) + return rc; + + paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); + } + return 0; } int arch_ioreq_server_map_pages(struct ioreq_server *s) diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c index f5fd30ce12..13c638db53 100644 --- a/xen/common/ioreq.c +++ b/xen/common/ioreq.c @@ -95,12 +95,15 @@ static struct ioreq_server *get_ioreq_server(const struct domain *d, static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v) { - shared_iopage_t *p = s->ioreq.va; + unsigned int vcpu_id = v->vcpu_id; + unsigned int page_idx = vcpu_id / IOREQS_PER_PAGE; + unsigned int slot_idx = vcpu_id % IOREQS_PER_PAGE; + shared_iopage_t *p = s->ioreqs.page[page_idx].va; ASSERT((v == current) || !vcpu_runnable(v)); ASSERT(p != NULL); - return &p->vcpu_ioreq[v->vcpu_id]; + return &p->vcpu_ioreq[slot_idx]; } /* @@ -260,84 +263,120 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; struct page_info *page; + unsigned int i, j, nr_pages = buf ? 1 : NR_IOREQ_PAGES; - if ( iorp->page ) + for ( i = 0; i < nr_pages; i++ ) { - /* - * If a guest frame has already been mapped (which may happen - * on demand if ioreq_server_get_info() is called), then - * allocating a page is not permitted. - */ - if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) - return -EPERM; + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; - return 0; - } + if ( iorp->page ) + { + /* + * If a guest frame has already been mapped (which may happen + * on demand if ioreq_server_get_info() is called), then + * allocating a page is not permitted. + */ + if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) + return -EPERM; + continue; /* Already allocated */ + } - page = alloc_domheap_page(s->target, MEMF_no_refcount); + page = alloc_domheap_page(s->target, MEMF_no_refcount); + if ( !page ) + goto fail; - if ( !page ) - return -ENOMEM; + if ( !get_page_and_type(page, s->target, PGT_writable_page) ) + { + /* + * The domain can't possibly know about this page yet, so failure + * here is a clear indication of something fishy going on. + */ + put_page_alloc_ref(page); + domain_crash(s->emulator); + return -ENODATA; + } - if ( !get_page_and_type(page, s->target, PGT_writable_page) ) - { - /* - * The domain can't possibly know about this page yet, so failure - * here is a clear indication of something fishy going on. - */ - domain_crash(s->emulator); - return -ENODATA; - } + /* Assign early so cleanup can find it */ + iorp->page = page; - iorp->va = __map_domain_page_global(page); - if ( !iorp->va ) - goto fail; + iorp->va = __map_domain_page_global(page); + if ( !iorp->va ) + goto fail; + + clear_page(iorp->va); + } - iorp->page = page; - clear_page(iorp->va); return 0; - fail: - put_page_alloc_ref(page); - put_page_and_type(page); +fail: + /* Free all previously allocated pages */ + for ( j = 0; j <= i; j++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[j]; + if ( iorp->page ) + { + if ( iorp->va ) + unmap_domain_page_global(iorp->va); + iorp->va = NULL; + put_page_alloc_ref(iorp->page); + put_page_and_type(iorp->page); + iorp->page = NULL; + } + } return -ENOMEM; } static void ioreq_server_free_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - struct page_info *page = iorp->page; + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; - if ( !page ) - return; + for ( i = 0; i < nr_pages; i++ ) + { + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; + struct page_info *page = iorp->page; - iorp->page = NULL; + if ( !page ) + continue; + + iorp->page = NULL; - unmap_domain_page_global(iorp->va); - iorp->va = NULL; + unmap_domain_page_global(iorp->va); + iorp->va = NULL; - put_page_alloc_ref(page); - put_page_and_type(page); + put_page_alloc_ref(page); + put_page_and_type(page); + } } bool is_ioreq_server_page(struct domain *d, const struct page_info *page) { const struct ioreq_server *s; - unsigned int id; + unsigned int id, i; bool found = false; rspin_lock(&d->ioreq_server.lock); FOR_EACH_IOREQ_SERVER(d, id, s) { - if ( (s->ioreq.page == page) || (s->bufioreq.page == page) ) + if ( s->bufioreq.page == page ) { found = true; break; } + + for ( i = 0; i < NR_IOREQ_PAGES; i++ ) + { + if ( s->ioreqs.page[i].page == page ) + { + found = true; + break; + } + } + + if ( found ) + break; } rspin_unlock(&d->ioreq_server.lock); @@ -348,9 +387,11 @@ bool is_ioreq_server_page(struct domain *d, const struct page_info *page) static void ioreq_server_update_evtchn(struct ioreq_server *s, struct ioreq_vcpu *sv) { + unsigned int page_idx = sv->vcpu->vcpu_id / IOREQS_PER_PAGE; + ASSERT(spin_is_locked(&s->lock)); - if ( s->ioreq.va != NULL ) + if ( s->ioreqs.page[page_idx].va != NULL ) { ioreq_t *p = get_ioreq(s, sv->vcpu); @@ -579,6 +620,7 @@ static int ioreq_server_init(struct ioreq_server *s, { struct domain *currd = current->domain; struct vcpu *v; + unsigned int i; int rc; s->target = d; @@ -590,7 +632,8 @@ static int ioreq_server_init(struct ioreq_server *s, INIT_LIST_HEAD(&s->ioreq_vcpu_list); spin_lock_init(&s->bufioreq_lock); - s->ioreq.gfn = INVALID_GFN; + for ( i = 0; i < NR_IOREQ_PAGES; i++ ) + s->ioreqs.page[i].gfn = INVALID_GFN; s->bufioreq.gfn = INVALID_GFN; rc = ioreq_server_alloc_rangesets(s, id); @@ -768,8 +811,9 @@ static int ioreq_server_get_info(struct domain *d, ioservid_t id, goto out; } + /* Just return the first ireq page because the region is contigeous */ if ( ioreq_gfn ) - *ioreq_gfn = gfn_x(s->ioreq.gfn); + *ioreq_gfn = gfn_x(s->ioreqs.page[0].gfn); if ( HANDLE_BUFIOREQ(s) ) { @@ -822,12 +866,13 @@ int ioreq_server_get_frame(struct domain *d, ioservid_t id, *mfn = page_to_mfn(s->bufioreq.page); rc = 0; break; + case XENMEM_resource_ioreq_server_frame_ioreq(0) ... + XENMEM_resource_ioreq_server_frame_ioreq(NR_IOREQ_PAGES - 1): + unsigned int page_idx = idx - XENMEM_resource_ioreq_server_frame_ioreq(0); - case XENMEM_resource_ioreq_server_frame_ioreq(0): - *mfn = page_to_mfn(s->ioreq.page); + *mfn = page_to_mfn(s->ioreqs.page[page_idx].page); rc = 0; break; - default: rc = -EINVAL; break; diff --git a/xen/include/xen/ioreq.h b/xen/include/xen/ioreq.h index e86f0869fa..8604311cb4 100644 --- a/xen/include/xen/ioreq.h +++ b/xen/include/xen/ioreq.h @@ -19,9 +19,16 @@ #ifndef __XEN_IOREQ_H__ #define __XEN_IOREQ_H__ +#include #include #include +#include +#include + +/* 4096 / 32 = 128 ioreq slots per page */ +#define IOREQS_PER_PAGE (PAGE_SIZE / sizeof(struct ioreq)) +#define NR_IOREQ_PAGES DIV_ROUND_UP(HVM_MAX_VCPUS, IOREQS_PER_PAGE) struct ioreq_page { gfn_t gfn; @@ -29,6 +36,10 @@ struct ioreq_page { void *va; }; +struct ioreq_pages { + struct ioreq_page page[NR_IOREQ_PAGES]; +}; + struct ioreq_vcpu { struct list_head list_entry; struct vcpu *vcpu; @@ -45,7 +56,7 @@ struct ioreq_server { /* Lock to serialize toolstack modifications */ spinlock_t lock; - struct ioreq_page ioreq; + struct ioreq_pages ioreqs; struct list_head ioreq_vcpu_list; struct ioreq_page bufioreq; -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 09 12:35:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 12:35:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225307.1531779 (Exim 4.92) (envelope-from ) id 1vpQU7-0000oz-SD; Mon, 09 Feb 2026 12:35:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225307.1531779; Mon, 09 Feb 2026 12:35:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpQU7-0000os-OI; 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This mirrors the behavior of Arm and enables proper vCPU >>>>> wakeup handling on RISC-V. >>>>> >>>>> Remove the stub implementation from stubs.c, as it is now provided by >>>>> arch/riscv/domain.c. >>>>> >>>>> Signed-off-by: Oleksii Kurochko >>>>> Acked-by: Jan Beulich >>>>> --- >>>>> Changes in v2: >>>>> - Add Acked-by: Jan Beulich . >>>>> --- >>>>> xen/arch/riscv/domain.c | 14 ++++++++++++++ >>>>> xen/arch/riscv/stubs.c | 5 ----- >>>>> 2 files changed, 14 insertions(+), 5 deletions(-) >>>>> >>>>> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >>>>> index e38c0db62cac..13ac384c4b76 100644 >>>>> --- a/xen/arch/riscv/domain.c >>>>> +++ b/xen/arch/riscv/domain.c >>>>> @@ -1,8 +1,10 @@ >>>>> /* SPDX-License-Identifier: GPL-2.0-only */ >>>>> >>>>> +#include >>>>> #include >>>>> #include >>>>> #include >>>>> +#include >>>>> #include >>>>> >>>>> #include >>>>> @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) >>>>> # error "Update vsieh" >>>>> #endif >>>>> } >>>>> + >>>>> +void vcpu_kick(struct vcpu *v) >>>>> +{ >>>>> + bool running = v->is_running; >>>>> + >>>>> + vcpu_unblock(v); >>>>> + if ( running && v != current ) >>>>> + { >>>>> + perfc_incr(vcpu_kick); >>>> Because of this it is needed to introduce: >>>> PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >>>> Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. >>>> >>>> I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h >>>> just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have >>>> it in arch specific perfc_defn.h? >>> Arch-specific please - it's not used by x86 nor ppc. >> Then I will do the following changes: >> >> diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile >> index 3824f31c395c..86c56251d5d7 100644 >> --- a/xen/arch/riscv/include/asm/Makefile >> +++ b/xen/arch/riscv/include/asm/Makefile >> @@ -7,7 +7,6 @@ generic-y += hypercall.h >> generic-y += iocap.h >> generic-y += irq-dt.h >> generic-y += percpu.h >> -generic-y += perfc_defn.h >> generic-y += random.h >> generic-y += softirq.h >> generic-y += vm_event.h >> diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h >> new file mode 100644 >> index 000000000000..4fc161f1abad >> --- /dev/null >> +++ b/xen/arch/riscv/include/asm/perfc_defn.h >> @@ -0,0 +1,7 @@ >> +/* This file is intended to be included multiple times. */ >> +/*#ifndef __XEN_PERFC_DEFN_H__*/ >> +/*#define __XEN_PERFC_DEFN_H__*/ >> + >> +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >> + >> +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */ >> >> and add the following to commit message: >> Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for >> vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although >> CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, >> for example, by randconfig what will lead to CI build issues. >> >> Note that I keep __XEN_PERFC_DEFN_H__ as other archictectures use the same, >> not something like ASM____PERFC_DEFN_H. > Please don't copy this mistake. I actually question the commented-out pre- > processor directives altogether: Misra also has a rule against commented- > out code (directive 4.4, which we didn't accept [yet], but which exists > nevertheless). Yet at the very least what's commented out should not be > obviously wrong. Do I understand correctly that it would be acceptable to simply drop the commented-out preprocessor directives and keep only /* This file is intended to be included multiple times. */ ? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 09 12:52:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 12:52:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225317.1531789 (Exim 4.92) (envelope-from ) id 1vpQkT-0003hP-4w; Mon, 09 Feb 2026 12:52:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225317.1531789; Mon, 09 Feb 2026 12:52:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpQkT-0003hI-0M; Mon, 09 Feb 2026 12:52:17 +0000 Received: by outflank-mailman (input) for mailman id 1225317; Mon, 09 Feb 2026 12:52:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpQkR-0003hC-9D for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 12:52:15 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 27d989ff-05b6-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 13:52:13 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-43284ed32a0so2958031f8f.3 for ; Mon, 09 Feb 2026 04:52:13 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 04:52:13 -0800 (PST) Message-ID: <57c4d4d5-5588-40cf-919c-1e337328858f@suse.com> Date: Mon, 9 Feb 2026 13:52:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/12] const-ify vendor checks To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <608472d0-517c-4bc5-b5c1-c278c4f6620b@suse.com> <836c1ef7-4ec3-4c4a-b527-17066327ff19@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 12:56, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 11:15 AM CET, Jan Beulich wrote: >> On 09.02.2026 11:05, Alejandro Vallejo wrote: >>> On Mon Feb 9, 2026 at 10:21 AM CET, Jan Beulich wrote: >>>> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>>>> High level description >>>>> ====================== >>>>> >>>>> When compared to the RFC this makes a different approach The series introduces >>>>> cpu_vendor() which maps to a constant in the single vendor case and to >>>>> (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VENDORS is a >>>>> mask of the compile-time chosen vendors. This enables the compiler to detect >>>>> dead-code at the uses and remove all unreachable branches, including in >>>>> switches. >>>>> >>>>> When compared to the x86_vendor_is() macro introduced in the RFC, this is >>>>> simpler. It achieves MOST of what the older macro did without touching the >>>>> switches, with a few caveats: >>>>> >>>>> 1. Compiled-out vendors cause a panic, they don't fallback onto the unknown >>>>> vendor case. In retrospect, this is a much saner thing to do. >>>> >>>> I'm unconvinced here. Especially our Centaur and Shanghai support is at best >>>> rudimentary. Treating those worse when configured-out than when configured-in >>>> feels questionable. >>> >>> Isn't that the point of configuring out? >> >> That's what I'm unsure about. > > I'm really missing what you're trying to make, sorry. How, if at all, is it > helpful for a hypervisor with a compiled out vendor to be bootable on a machine > of that vendor? No more and no less than for a system with CPUs from a vendor we don't have support for at all. Let's assume someone wants to start adding support for a new vendor. They may first try Xen as-is. This wouldn't panic. Depending on how exactly they would start adding stuff, Xen might suddenly panic, despite functionally nothing having changed. >>> Besides the philosophical matter of whether or not a compiled-out vendor >>> should be allowed to run there's the more practical matter of what to do >>> with the x86_vendor field of boot_cpu_data. Because at that point our take >>> that cross-vendor support is forbidden is a lot weaker. If I can run an >>> AMD-hypervisor on an Intel host, what then? What policies would be allowed? If I >>> wipe x86_vendor then policies with some unknown vendor would be fine. Should the >>> leaves match too? If I do not wipe the field, should I do black magic to ensure >>> the behaviour is different depending on whether the vendor is compiled in or >>> not? What if I want to migrate a VM currently running in this hypothetical >>> hypervisor? The rules becomes seriously complex. >>> >>> It's just a lot cleaner to take the stance that compiled out vendors can't run. >>> Then everything else is crystal clear and we avoid a universe's worth of corner >>> cases. I expect upstream Xen to support all cases (I'm skeptical about the >>> utility of the unknown vendor path, but oh well), but many downstreams might >>> benefit from killing off support for vendors they really will never touch. >> >> To them, will panic()ing (or not) make a difference? > > One would hope not because the're compiling them out for a reason. > But for upstream, not panicking brings a sea of corner cases. The ones I > mentioned above is not the whole list. > > Turning the question around. Who benefits from not panicking? Certain things may work. But more generally - see above. Turning this question around also isn't quite appropriate imo: You want to introduce the panic(), so it's on you to justify doing so (which includes making clear why omitting that small piece of code would be a bad idea). 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Mon, 09 Feb 2026 04:54:22 -0800 (PST) Message-ID: <089aeecb-4e58-407d-aa4d-e09f88f861a0@suse.com> Date: Mon, 9 Feb 2026 13:54:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/16] xen/riscv: introduce vcpu_kick() implementation To: Oleksii Kurochko Cc: Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Romain Caritey , xen-devel@lists.xenproject.org References: <0335a7db0343d81ce4256482a464e7ba5df1c204.1769099885.git.oleksii.kurochko@gmail.com> <14d19350-0de8-4496-99e5-0ba76e421684@gmail.com> <4a12e652-5b53-40d0-b701-d1f5b749dfa7@suse.com> <29006d8a-e003-4451-99af-0eef8f7d1c08@gmail.com> <87533cdf-c8cc-4a86-9946-a999e8d31b82@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 13:35, Oleksii Kurochko wrote: > On 2/9/26 10:51 AM, Jan Beulich wrote: >> On 09.02.2026 10:40, Oleksii Kurochko wrote: >>> On 2/9/26 10:07 AM, Jan Beulich wrote: >>>> On 06.02.2026 17:36, Oleksii Kurochko wrote: >>>>> On 1/22/26 5:47 PM, Oleksii Kurochko wrote: >>>>>> Add a RISC-V implementation of vcpu_kick(), which unblocks the target >>>>>> vCPU and sends an event check IPI if the vCPU was running on another >>>>>> processor. This mirrors the behavior of Arm and enables proper vCPU >>>>>> wakeup handling on RISC-V. >>>>>> >>>>>> Remove the stub implementation from stubs.c, as it is now provided by >>>>>> arch/riscv/domain.c. >>>>>> >>>>>> Signed-off-by: Oleksii Kurochko >>>>>> Acked-by: Jan Beulich >>>>>> --- >>>>>> Changes in v2: >>>>>> - Add Acked-by: Jan Beulich . >>>>>> --- >>>>>> xen/arch/riscv/domain.c | 14 ++++++++++++++ >>>>>> xen/arch/riscv/stubs.c | 5 ----- >>>>>> 2 files changed, 14 insertions(+), 5 deletions(-) >>>>>> >>>>>> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >>>>>> index e38c0db62cac..13ac384c4b76 100644 >>>>>> --- a/xen/arch/riscv/domain.c >>>>>> +++ b/xen/arch/riscv/domain.c >>>>>> @@ -1,8 +1,10 @@ >>>>>> /* SPDX-License-Identifier: GPL-2.0-only */ >>>>>> >>>>>> +#include >>>>>> #include >>>>>> #include >>>>>> #include >>>>>> +#include >>>>>> #include >>>>>> >>>>>> #include >>>>>> @@ -240,3 +242,15 @@ void vcpu_sync_interrupts(struct vcpu *v) >>>>>> # error "Update vsieh" >>>>>> #endif >>>>>> } >>>>>> + >>>>>> +void vcpu_kick(struct vcpu *v) >>>>>> +{ >>>>>> + bool running = v->is_running; >>>>>> + >>>>>> + vcpu_unblock(v); >>>>>> + if ( running && v != current ) >>>>>> + { >>>>>> + perfc_incr(vcpu_kick); >>>>> Because of this it is needed to introduce: >>>>> PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >>>>> Otherwise randconfig build will fail when CONFIG_PERF_COUNTERS=y. >>>>> >>>>> I would like to ask if it would be okay to add it xen/include/xen/perfc_defn.h >>>>> just after PERFCOUNTER(need_flush_tlb_flush,...) or would it be better to have >>>>> it in arch specific perfc_defn.h? >>>> Arch-specific please - it's not used by x86 nor ppc. >>> Then I will do the following changes: >>> >>> diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile >>> index 3824f31c395c..86c56251d5d7 100644 >>> --- a/xen/arch/riscv/include/asm/Makefile >>> +++ b/xen/arch/riscv/include/asm/Makefile >>> @@ -7,7 +7,6 @@ generic-y += hypercall.h >>> generic-y += iocap.h >>> generic-y += irq-dt.h >>> generic-y += percpu.h >>> -generic-y += perfc_defn.h >>> generic-y += random.h >>> generic-y += softirq.h >>> generic-y += vm_event.h >>> diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h >>> new file mode 100644 >>> index 000000000000..4fc161f1abad >>> --- /dev/null >>> +++ b/xen/arch/riscv/include/asm/perfc_defn.h >>> @@ -0,0 +1,7 @@ >>> +/* This file is intended to be included multiple times. */ >>> +/*#ifndef __XEN_PERFC_DEFN_H__*/ >>> +/*#define __XEN_PERFC_DEFN_H__*/ >>> + >>> +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") >>> + >>> +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */ >>> >>> and add the following to commit message: >>> Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for >>> vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although >>> CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, >>> for example, by randconfig what will lead to CI build issues. >>> >>> Note that I keep __XEN_PERFC_DEFN_H__ as other archictectures use the same, >>> not something like ASM____PERFC_DEFN_H. >> Please don't copy this mistake. I actually question the commented-out pre- >> processor directives altogether: Misra also has a rule against commented- >> out code (directive 4.4, which we didn't accept [yet], but which exists >> nevertheless). Yet at the very least what's commented out should not be >> obviously wrong. > > Do I understand correctly that it would be acceptable to simply drop the > commented-out preprocessor directives and keep only /* This file is intended > to be included multiple times. */ ? I think so, yes. You could simply check how the same situation is covered for elsewhere. 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Mon, 09 Feb 2026 05:01:38 -0800 (PST) Message-ID: <15680dd6-e554-4503-8964-e8801aa31e79@suse.com> Date: Mon, 9 Feb 2026 14:01:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Add Darwin.mk To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:46, Bertrand Marquis wrote: > Xen does not provide a Darwin build configuration useable on Mac OS. > It is possible to build Xen Hypervisor (tools are not supported) with a > toolchain able to produce ELF binaries (GCC or others). > > Add config/Darwin.mk to include StdGNU.mk and force > XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow > the cross-compile path so compiling on Mac OS is always handled as a > cross compilation case. > > Only compiling the hypervisor has been tested ! > > An example of how to build the hypervisor for arm64 on Mac OS > (tools cannot be build for now) using a compiler from brew: > - brew install aarch64-elf-gcc aarch64-elf-binutils > - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang > > Signed-off-by: Bertrand Marquis Acked-by: Jan Beulich > Change-Id: Iba91634afbaab58767bb8744b4b722ce5732a6dd This wants removing, I suppose. > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,6 @@ > +# Use GNU tool definitions as the tools we are using are either GNU compatible > +# or we only use features which are supported on Mac OS. > +include $(XEN_ROOT)/config/StdGNU.mk > + > +# Cross compile on Mac OS, only hypervisor build has been tested, no tools > +XEN_COMPILE_ARCH = unknow There was an 'n' lost, as the reason for forcing cross-compilation also isn't stated. I'll take the liberty to add both back in. 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So, > advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, > signalling that guests may use MSI address bits 11:5 and IO-APIC RTE > bits 55:49 as additional high destination ID bits. This expands the > destination ID from 8 to 15 bits. > > Signed-off-by: Julian Vetter > --- > xen/arch/x86/cpuid.c | 9 +++++++++ > xen/arch/x86/hvm/irq.c | 11 ++++++++++- > xen/arch/x86/hvm/vioapic.c | 2 +- > xen/arch/x86/hvm/vmsi.c | 4 ++-- > xen/arch/x86/include/asm/hvm/hvm.h | 4 ++-- > xen/arch/x86/include/asm/hvm/vioapic.h | 13 +++++++++++++ > xen/arch/x86/include/asm/msi.h | 3 +++ > 7 files changed, 40 insertions(+), 6 deletions(-) > > diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c > index d85be20d86..fb17c71d74 100644 > --- a/xen/arch/x86/cpuid.c > +++ b/xen/arch/x86/cpuid.c > @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, > res->a |= XEN_HVM_CPUID_DOMID_PRESENT; > res->c = d->domain_id; > > + /* > + * Advertise extended destination ID support. This allows guests to use > + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC RTE for > + * additional destination ID bits, expanding the addressable APIC ID > + * range from 8 to 15 bits. This is required for x2APIC guests with > + * APIC IDs > 255. > + */ > + res->a |= XEN_HVM_CPUID_EXT_DEST_ID; This cannot be unilaterally advertised: you need a QEMU (or in general any device model that manages PCI passthrough) to understand the extended destination mode. This requires the introduction of a new XEN_DOMCTL_bind_pt_irq equivalent hypercall, that can take an extended destination ID not limited to 256 values: struct xen_domctl_bind_pt_irq { [...] uint32_t gflags; #define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff When doing PCI passthrough it's QEMU the entity that decodes the MSI address and data fields, and hence would need expanding (and negotiation with Xen) about whether the Extended ID feature can be advertised. It would be good to introduce a new XEN_DMOP_* set of hypercalls that support Extended ID to do the PCI passthrough interrupt binding. Thanks, Roger. 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b=I7LM1RgFd57opK4XRBzS0nQTGplk5ELyniSeG4t0XMDwkOqRutkuVb7KJJo4Jc9xGAvPfE4jYp20+1V+qPTxdFTRCh5kx3Ho5XBT0Z0cUUoyArcKIaMySQLxGimFJJEbuzQGlqXgSQJh6yB4NNNXurOKTiMk6GWf46AX99aXaFg= From: Bertrand Marquis To: Jan Beulich CC: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH v5] xen: Add Darwin.mk Thread-Topic: [PATCH v5] xen: Add Darwin.mk Thread-Index: AQHcmbF131JHt0VrQEG2yzDmCYz1i7V6VRMAgAAE5AA= Date: Mon, 9 Feb 2026 13:19:21 +0000 Message-ID: References: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> <15680dd6-e554-4503-8964-e8801aa31e79@suse.com> In-Reply-To: <15680dd6-e554-4503-8964-e8801aa31e79@suse.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3864.300.41.1.7) Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oczgqVtXH9KjkY9qNDKe1ga9v3XlOHgkqkLkdPEBCM8QN/icKGmpTfI9qVxh5T2qI5Xuj4dG+o7/y0z75mfTyd9geDczbwqW3AjdWylfFbQmrMMrOTu5Zy3218YITO9jiW+cFWHcnJ0GZHMeKKqVyHneeAk1NGAEK/KetYSIgGn7ZHmsi4f2gnrkIOhzhYnZY4RE/OgXLC/oF+pCN3Hu6Fyp78vLsdNFT92IG8vBmME47lZqHDYQyxWZPygbFn4jfIopk8jJaMrFz+Erwtf3eC0phZXcWyQqjs0KjmmTtP8ut4T3oO3NqfPOaYjYgBl4YlXEYUPwDQtCUFOtr9RWqMyKgfUp+zrq4L239lyCDhH162qWYVGH6p9El9vwDhj5+Xiu6w333Q74E42I3GoC0H0mS/coWhr/5J0Mo1FcfzfRbvGLh7i7GfgWYu3R5o9/ X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 13:20:24.9722 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ab5bb532-702a-47e0-9085-08de67ddfc3f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A799.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9473 > On 9 Feb 2026, at 14:01, Jan Beulich wrote: >=20 > On 09.02.2026 11:46, Bertrand Marquis wrote: >> Xen does not provide a Darwin build configuration useable on Mac OS. >> It is possible to build Xen Hypervisor (tools are not supported) with a >> toolchain able to produce ELF binaries (GCC or others). >>=20 >> Add config/Darwin.mk to include StdGNU.mk and force >> XEN_COMPILE_ARCH=3Dunknown, ensuring Darwin builds always follow >> the cross-compile path so compiling on Mac OS is always handled as a >> cross compilation case. >>=20 >> Only compiling the hypervisor has been tested ! >>=20 >> An example of how to build the hypervisor for arm64 on Mac OS >> (tools cannot be build for now) using a compiler from brew: >> - brew install aarch64-elf-gcc aarch64-elf-binutils >> - make XEN_TARGET_ARCH=3Darm64 CROSS_COMPILE=3Daarch64-elf- HOSTCC=3Dcla= ng >>=20 >> Signed-off-by: Bertrand Marquis >=20 > Acked-by: Jan Beulich >=20 >> Change-Id: Iba91634afbaab58767bb8744b4b722ce5732a6dd >=20 > This wants removing, I suppose. oh yes sorry for that >=20 >> --- /dev/null >> +++ b/config/Darwin.mk >> @@ -0,0 +1,6 @@ >> +# Use GNU tool definitions as the tools we are using are either GNU com= patible >> +# or we only use features which are supported on Mac OS. >> +include $(XEN_ROOT)/config/StdGNU.mk >> + >> +# Cross compile on Mac OS, only hypervisor build has been tested, no to= ols >> +XEN_COMPILE_ARCH =3D unknow >=20 > There was an 'n' lost, as the reason for forcing cross-compilation also > isn't stated. I'll take the liberty to add both back in. ok with me. Cheers Bertrand >=20 > Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 13:24:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 13:24:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225357.1531837 (Exim 4.92) (envelope-from ) id 1vpRG0-0001ln-JY; Mon, 09 Feb 2026 13:24:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225357.1531837; Mon, 09 Feb 2026 13:24:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpRG0-0001lg-Gu; Mon, 09 Feb 2026 13:24:52 +0000 Received: by outflank-mailman (input) for mailman id 1225357; Mon, 09 Feb 2026 13:24:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpRG0-0001la-0Q for xen-devel@lists.xenproject.org; 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Currently, > CPUID leaf 0xB returns EBX=0, making firmware (OVMF/EDK2) fall back to > CPUID leaf 1 for APIC ID discovery, which is limited to 8 bits and > cannot distinguish vCPUs with APIC IDs greater than 256. > To address this, implement proper CPUID leaf 0xB x2APIC topology > enumeration. Present all vCPUs as cores in a single package with correct > shift values based on the maximum APIC ID, and non-zero EBX so that > firmware uses the 32-bit x2APIC ID from EDX. Moreover, set CPUID leaf 1 > EBX[23:16] (max addressable logical processor IDs) to the appropriate > power-of-2 value, but capped at 255. Additionally to what Andrew has mentioned, you also need to report any vCPU with ACPI ID >= 255 to use the x2APIC MADT ACPI structure, as the local APIC MADT structure can only hold 8bit ACPI IDs. Thanks, Roger. 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Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon Feb 09 13:40:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 13:40:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225389.1531877 (Exim 4.92) (envelope-from ) id 1vpRV7-0006PP-IJ; Mon, 09 Feb 2026 13:40:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225389.1531877; Mon, 09 Feb 2026 13:40:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpRV7-0006PI-Ff; Mon, 09 Feb 2026 13:40:29 +0000 Received: by outflank-mailman (input) for mailman id 1225389; Mon, 09 Feb 2026 13:40:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpRV5-0006P2-T9 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 13:40:27 +0000 Received: from mail177-22.suw61.mandrillapp.com (mail177-22.suw61.mandrillapp.com [198.2.177.22]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e3998e7a-05bc-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 14:40:26 +0100 (CET) Received: from pmta14.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail177-22.suw61.mandrillapp.com (Mailchimp) with ESMTP id 4f8m6J5wcZzGlsp2q for ; Mon, 9 Feb 2026 13:40:24 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 67754961e148408b9a870d67effcb503; Mon, 09 Feb 2026 13:40:24 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e3998e7a-05bc-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770644424; x=1770914424; bh=E+Nh1SkPaXDN/5wTRsrC5L53Z2u3HS0QQ13Rh8scEGI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=i8iZpYn5RezKnFDM5OwNvgrNkWOjclQs/DHDv0t7TJFSLoRsDebMWwgwVvX4QkxW0 jKGs3j8Py8Js3+7sNRAzbPYpskWnpPYhEEerI1u+wjmB+xNGkuBk4R9+aQR1eJU7Sq jG616jc2UiWolF2XWw3tZQmab3mq2v2wCiDYA2re7r8UsJ5C0hCMsrjuHOtAGErTQf +5Uds1I0J4Ptp2i5cTcOZtCCkfSGB/2YaWGTznnywlDLUnqsP30tecNtGL7LDXcR6B NYXt6qwzLlZKXVR9pwu1lxOh8YCxjlhKJd6JVZfaD3xQa5g1e1YWIepUqMNbelzxAp gXqdDExjvzNrA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770644424; x=1770904924; i=teddy.astie@vates.tech; bh=E+Nh1SkPaXDN/5wTRsrC5L53Z2u3HS0QQ13Rh8scEGI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=cFP/Iy9IvgmE97nyxeS64QbdUGGo0DEq9qbVN1rdNnO5uctzp7wHlRerYEV+YS7NN F6XOE0TQKxcO+vA2VGK7R7iPZTajfqvbrjmhpCgWbE9aW1/OEtpI5ZCYtlVIPNZN8X XzBdK01eswIuhQmdkUAuHIXdeYJXbkm6XFqXf6dFvs7Y+kOWw72q4Lm43Y9DbgpHrK dxUi7zrxWbnzPm6QCwtvHsILscvWnzavuCO7J6U2h+uig5MoL5wbJEfLUsyYj3lB+I 1Q9LLAhEdAcqCx5J8/hUMkV8HfdXhRlWFxUaKmloy6EuR2brchaqb48eAqOBhLm0tD yZhC3u09djklA== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770644423667 Message-Id: <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> To: "Julian Vetter" , xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" References: <20260209113412.2603088-1-julian.vetter@vates.tech> In-Reply-To: <20260209113412.2603088-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.67754961e148408b9a870d67effcb503?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260209:md Date: Mon, 09 Feb 2026 13:40:24 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hello, Some comments, mostly code style, nothing functionnal. Le 09/02/2026 =C3=A0 12:36, Julian Vetter a =C3=A9crit=C2=A0: > x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI > addresses and IO-APIC RTEs only provide an 8-bit destination field. > Without extended destination ID support, Linux limits the maximum usable > APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, > advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, > signalling that guests may use MSI address bits 11:5 and IO-APIC RTE > bits 55:49 as additional high destination ID bits. This expands the > destination ID from 8 to 15 bits. > > Signed-off-by: Julian Vetter > --- > xen/arch/x86/cpuid.c | 9 +++++++++ > xen/arch/x86/hvm/irq.c | 11 ++++++++++- > xen/arch/x86/hvm/vioapic.c | 2 +- > xen/arch/x86/hvm/vmsi.c | 4 ++-- > xen/arch/x86/include/asm/hvm/hvm.h | 4 ++-- > xen/arch/x86/include/asm/hvm/vioapic.h | 13 +++++++++++++ > xen/arch/x86/include/asm/msi.h | 3 +++ > 7 files changed, 40 insertions(+), 6 deletions(-) > > diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c > index d85be20d86..fb17c71d74 100644 > --- a/xen/arch/x86/cpuid.c > +++ b/xen/arch/x86/cpuid.c > @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vcp= u *v, uint32_t leaf, > res->a |=3D XEN_HVM_CPUID_DOMID_PRESENT; > res->c =3D d->domain_id; > > + /* > + * Advertise extended destination ID support. This allows guests= to use > + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC RT= E for > + * additional destination ID bits, expanding the addressable API= C ID > + * range from 8 to 15 bits. This is required for x2APIC guests w= ith > + * APIC IDs > 255. > + */ > + res->a |=3D XEN_HVM_CPUID_EXT_DEST_ID; > + > /* > * Per-vCPU event channel upcalls are implemented and work > * correctly with PIRQs routed over event channels. > diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c > index 5f64361113..2cc14d37d4 100644 > --- a/xen/arch/x86/hvm/irq.c > +++ b/xen/arch/x86/hvm/irq.c > @@ -374,7 +374,16 @@ int hvm_set_pci_link_route(struct domain *d, u8 link= , u8 isa_irq) > int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) > { > uint32_t tmp =3D (uint32_t) addr; > - uint8_t dest =3D (tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_= SHIFT; > + /* > + * Standard MSI destination: address bits 19:12 (8 bits). > + * Extended MSI destination: address bits 11:5 (7 more bits). > + * When XEN_HVM_CPUID_EXT_DEST_ID is advertised, the guest may use > + * bits 11:5 for high destination ID bits, expanding to 15 bits tota= l. As we always advertise XEN_HVM_CPUID_EXT_DEST_ID, I would rather say > As XEN_HVM_CPUID_EXT_DEST_ID is advertised, ... > + * For legacy guests these bits are 0, so this is backwards-compatib= le. "Guests unaware of this feature set these bits to 0, ..." > + */ > + uint32_t dest =3D > + (((tmp & MSI_ADDR_EXT_DEST_ID_MASK) >> MSI_ADDR_EXT_DEST_ID_SHIF= T) << 8) | > + ((tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT); I wonder if we should introduce a macro like you did for IO-APIC (VIOAPIC_RTE_DEST). > uint8_t dest_mode =3D !!(tmp & MSI_ADDR_DESTMODE_MASK); > uint8_t delivery_mode =3D (data & MSI_DATA_DELIVERY_MODE_MASK) > >> MSI_DATA_DELIVERY_MODE_SHIFT; > diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c > index 7c725f9e47..263b1bd5cb 100644 > --- a/xen/arch/x86/hvm/vioapic.c > +++ b/xen/arch/x86/hvm/vioapic.c > @@ -411,7 +411,7 @@ static void ioapic_inj_irq( > > static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int p= in) > { > - uint16_t dest =3D vioapic->redirtbl[pin].fields.dest_id; > + uint32_t dest =3D VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); I would rather introduce a new field in vioapic_redir_entry for the extended dest part; and compute dest from that and dest_id. > uint8_t dest_mode =3D vioapic->redirtbl[pin].fields.dest_mode; > uint8_t delivery_mode =3D vioapic->redirtbl[pin].fields.delivery_mo= de; > uint8_t vector =3D vioapic->redirtbl[pin].fields.vector; > diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c > index 27b1f089e2..dca191b4f1 100644 > --- a/xen/arch/x86/hvm/vmsi.c > +++ b/xen/arch/x86/hvm/vmsi.c > @@ -66,7 +66,7 @@ static void vmsi_inj_irq( > > int vmsi_deliver( > struct domain *d, int vector, > - uint8_t dest, uint8_t dest_mode, > + uint32_t dest, uint8_t dest_mode, > uint8_t delivery_mode, uint8_t trig_mode) > { > struct vlapic *target; > @@ -125,7 +125,7 @@ void vmsi_deliver_pirq(struct domain *d, const struct= hvm_pirq_dpci *pirq_dpci) > } > > /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id */ > -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest= _mode) > +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t des= t_mode) > { > int dest_vcpu_id =3D -1, w =3D 0; > struct vcpu *v; > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/as= m/hvm/hvm.h > index 7d9774df59..11256d5e67 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -295,11 +295,11 @@ uint64_t hvm_get_guest_time_fixed(const struct vcpu= *v, uint64_t at_tsc); > > int vmsi_deliver( > struct domain *d, int vector, > - uint8_t dest, uint8_t dest_mode, > + uint32_t dest, uint8_t dest_mode, > uint8_t delivery_mode, uint8_t trig_mode); > struct hvm_pirq_dpci; > void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pi= rq_dpci); > -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest= _mode); > +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t des= t_mode); > > enum hvm_intblk > hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack); > diff --git a/xen/arch/x86/include/asm/hvm/vioapic.h b/xen/arch/x86/includ= e/asm/hvm/vioapic.h > index 68af6dce79..b49eb348d5 100644 > --- a/xen/arch/x86/include/asm/hvm/vioapic.h > +++ b/xen/arch/x86/include/asm/hvm/vioapic.h > @@ -32,6 +32,19 @@ > #define VIOAPIC_EDGE_TRIG 0 > #define VIOAPIC_LEVEL_TRIG 1 > > +/* > + * Extract the destination ID from a 64-bit IO-APIC RTE, including the > + * extended bits (55:49) used when XEN_HVM_CPUID_EXT_DEST_ID is advertis= ed. > + */ > +#define IO_APIC_REDIR_DEST_SHIFT 56 > +#define IO_APIC_REDIR_DEST_MASK 0xffULL > +#define IO_APIC_REDIR_EXT_DEST_SHIFT 49 > +#define IO_APIC_REDIR_EXT_DEST_MASK 0x7fULL > + > +#define VIOAPIC_RTE_DEST(rte) \ > + ((((rte) >> IO_APIC_REDIR_DEST_SHIFT) & IO_APIC_REDIR_DEST_MASK) | \ > + (((rte) >> IO_APIC_REDIR_EXT_DEST_SHIFT) & IO_APIC_REDIR_EXT_DEST_M= ASK) << 8) > + > #define VIOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000U > #define VIOAPIC_MEM_LENGTH 0x100 > > diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/ms= i.h > index 00059d4a3a..b7a132e5b5 100644 > --- a/xen/arch/x86/include/asm/msi.h > +++ b/xen/arch/x86/include/asm/msi.h > @@ -54,6 +54,9 @@ > #define=09 MSI_ADDR_DEST_ID_MASK=09=090x00ff000 > #define MSI_ADDR_DEST_ID(dest)=09=09(((dest) << MSI_ADDR_DEST_ID_SHIFT= ) & MSI_ADDR_DEST_ID_MASK) > > +#define MSI_ADDR_EXT_DEST_ID_SHIFT=095 > +#define MSI_ADDR_EXT_DEST_ID_MASK=090x0000fe0 > + > /* MAX fixed pages reserved for mapping MSIX tables. */ > #define FIX_MSIX_MAX_PAGES 512 > -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 09 13:43:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 13:43:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225400.1531887 (Exim 4.92) (envelope-from ) id 1vpRXw-00071P-5E; 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Mon, 09 Feb 2026 06:10:03 -0800 (PST) Message-ID: <491d4d54-243d-48bd-ae9c-10567d0de1a6@suse.com> Date: Mon, 9 Feb 2026 15:10:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Advertise and support extended destination IDs for MSI/IO-APIC To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260209113412.2603088-1-julian.vetter@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209113412.2603088-1-julian.vetter@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 12:34, Julian Vetter wrote: > --- a/xen/arch/x86/include/asm/hvm/vioapic.h > +++ b/xen/arch/x86/include/asm/hvm/vioapic.h > @@ -32,6 +32,19 @@ > #define VIOAPIC_EDGE_TRIG 0 > #define VIOAPIC_LEVEL_TRIG 1 > > +/* > + * Extract the destination ID from a 64-bit IO-APIC RTE, including the > + * extended bits (55:49) used when XEN_HVM_CPUID_EXT_DEST_ID is advertised. > + */ > +#define IO_APIC_REDIR_DEST_SHIFT 56 > +#define IO_APIC_REDIR_DEST_MASK 0xffULL > +#define IO_APIC_REDIR_EXT_DEST_SHIFT 49 > +#define IO_APIC_REDIR_EXT_DEST_MASK 0x7fULL Can we please stop introducing pairs of mask and shift values? Already these versus ... > --- a/xen/arch/x86/include/asm/msi.h > +++ b/xen/arch/x86/include/asm/msi.h > @@ -54,6 +54,9 @@ > #define MSI_ADDR_DEST_ID_MASK 0x00ff000 > #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) > > +#define MSI_ADDR_EXT_DEST_ID_SHIFT 5 > +#define MSI_ADDR_EXT_DEST_ID_MASK 0x0000fe0 ... this shows one of the problems: It's never clear whether the mask is intended to be applied to the shifted or un-shifted value. Like you have it down here, the mask constant alone is enough. You use it with MASK_EXTR() and MASK_INSR(). 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Mon, 09 Feb 2026 06:13:16 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 15:13:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Add Darwin.mk To: Bertrand Marquis , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> <28A169D0-4454-4D60-B811-72FE377A4318@arm.com> <6B8E025C-3235-4289-948A-B26992D0C4C2@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6B8E025C-3235-4289-948A-B26992D0C4C2@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 14:42, Bertrand Marquis wrote: >> On 9 Feb 2026, at 14:39, Roger Pau Monné wrote: >> On Mon, Feb 09, 2026 at 01:33:13PM +0000, Bertrand Marquis wrote: >>>> On 9 Feb 2026, at 14:26, Roger Pau Monné wrote: >>>> On Mon, Feb 09, 2026 at 11:46:44AM +0100, Bertrand Marquis wrote: >>>>> Xen does not provide a Darwin build configuration useable on Mac OS. >>>>> It is possible to build Xen Hypervisor (tools are not supported) with a >>>>> toolchain able to produce ELF binaries (GCC or others). >>>>> >>>>> Add config/Darwin.mk to include StdGNU.mk and force >>>>> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow >>>>> the cross-compile path so compiling on Mac OS is always handled as a >>>>> cross compilation case. >>>>> >>>>> Only compiling the hypervisor has been tested ! >>>>> >>>>> An example of how to build the hypervisor for arm64 on Mac OS >>>>> (tools cannot be build for now) using a compiler from brew: >>>>> - brew install aarch64-elf-gcc aarch64-elf-binutils >>>>> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang >>>> >>>> This needs 'xen' target passed. >>> >>> Without any target, xen is built by default so i kept the simplest possible command >>> But I am ok with adding xen >> >> With the `cd xen` omitted, won't that also attempt to build the tools >> then? > > This is supposed to be called in the xen sub-directory not in the main directory. > > Now i get why you wanted the xen (and hence why there was the cd xen before) > > Maybe having -C xen would be a better idea, building from main Makefile could > bring other side effects i guess. Happy to add "-C xen" while committing, if that's what we now have settled upon? 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Mon, 09 Feb 2026 06:19:19 -0800 (PST) Message-ID: <7064136b-38f1-4bbe-9ff4-14774c88f016@suse.com> Date: Mon, 9 Feb 2026 15:19:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6] xenpm: Add get-intel-temp subcommand To: Teddy Astie Cc: Oleksii Kurochko , Community Manager , Anthony PERARD , xen-devel@lists.xenproject.org References: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:31, Teddy Astie wrote: > @@ -93,6 +96,7 @@ void show_help(void) > " units default to \"us\" if unspecified.\n" > " truncates un-representable values.\n" > " 0 lets the hardware decide.\n" > + " get-intel-temp [cpuid] get Intel CPU temperature of or all\n" Sorry, thinking about it only now: Do we really want to build in the vendor name to a command? "get-temp" would allow for adding an AMD implementation later on? > @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) > errno, strerror(errno)); > } > > +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, int *temp) > +{ > + xc_resource_entry_t entries[] = { > + { .idx = package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS }, > + { .idx = MSR_TEMPERATURE_TARGET }, > + }; > + struct xc_resource_op ops = { > + .cpu = cpu, > + .entries = entries, > + .nr_entries = ARRAY_SIZE(entries), > + }; > + int tjmax; > + > + int ret = xc_resource_op(xch, 1, &ops); > + > + switch ( ret ) > + { > + case -1: > + /* xc_resource_op returns -1 in out of memory scenarios */ > + errno = -ENOMEM; And xc_resource_op() doesn't itself set / inherit a properly set errno? We don't want to override what the C library may have set. > + return -1; > + > + case 0: > + /* This CPU isn't online or can't query this MSR */ > + errno = -ENODATA; > + return -1; Here we "synthesize" an error, so errno indeed needs setting. However, doesn't errno want setting to positive E... values? > + case 1: > + { > + /* > + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's 100 > + * which is correct aside a few selected Atom CPUs. Check Linux > + * kernel's coretemp.c for more information. > + */ > + static bool has_reported_once = false; > + > + if ( !has_reported_once ) > + { > + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assume " > + "tjmax = 100, readings may be incorrect.\n"); > + has_reported_once = true; > + } > + > + tjmax = 100; > + break; > + } > + > + case 2: > + tjmax = (entries[1].val >> 16) & 0xff; > + break; > + > + default: > + if ( ret > 0 ) > + { > + fprintf(stderr, "Got unexpected xc_resource_op return value: %d", ret); > + errno = -EINVAL; > + } > + else > + errno = ret; Why would this be? How do you know "ret" holds a value suitable for putting in errno? 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Mon, 09 Feb 2026 06:19:20 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 15:19:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6] xenpm: Add get-intel-temp subcommand To: Teddy Astie Cc: Oleksii Kurochko , Community Manager , Anthony PERARD , xen-devel@lists.xenproject.org References: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:31, Teddy Astie wrote: > @@ -93,6 +96,7 @@ void show_help(void) > " units default to \"us\" if unspecified.\n" > " truncates un-representable values.\n" > " 0 lets the hardware decide.\n" > + " get-intel-temp [cpuid] get Intel CPU temperature of or all\n" Sorry, thinking about it only now: Do we really want to build in the vendor name to a command? "get-temp" would allow for adding an AMD implementation later on? > @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) > errno, strerror(errno)); > } > > +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, int *temp) > +{ > + xc_resource_entry_t entries[] = { > + { .idx = package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS }, > + { .idx = MSR_TEMPERATURE_TARGET }, > + }; > + struct xc_resource_op ops = { > + .cpu = cpu, > + .entries = entries, > + .nr_entries = ARRAY_SIZE(entries), > + }; > + int tjmax; > + > + int ret = xc_resource_op(xch, 1, &ops); > + > + switch ( ret ) > + { > + case -1: > + /* xc_resource_op returns -1 in out of memory scenarios */ > + errno = -ENOMEM; And xc_resource_op() doesn't itself set / inherit a properly set errno? We don't want to override what the C library may have set. > + return -1; > + > + case 0: > + /* This CPU isn't online or can't query this MSR */ > + errno = -ENODATA; > + return -1; Here we "synthesize" an error, so errno indeed needs setting. However, doesn't errno want setting to positive E... values? > + case 1: > + { > + /* > + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's 100 > + * which is correct aside a few selected Atom CPUs. Check Linux > + * kernel's coretemp.c for more information. > + */ > + static bool has_reported_once = false; > + > + if ( !has_reported_once ) > + { > + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assume " > + "tjmax = 100, readings may be incorrect.\n"); > + has_reported_once = true; > + } > + > + tjmax = 100; > + break; > + } > + > + case 2: > + tjmax = (entries[1].val >> 16) & 0xff; > + break; > + > + default: > + if ( ret > 0 ) > + { > + fprintf(stderr, "Got unexpected xc_resource_op return value: %d", ret); > + errno = -EINVAL; > + } > + else > + errno = ret; Why would this be? How do you know "ret" holds a value suitable for putting in errno? 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Monné wrote: > > > > On Mon, Feb 09, 2026 at 01:33:13PM +0000, Bertrand Marquis wrote: > >> Hi Roger > >> > >>> On 9 Feb 2026, at 14:26, Roger Pau Monné wrote: > >>> > >>> On Mon, Feb 09, 2026 at 11:46:44AM +0100, Bertrand Marquis wrote: > >>>> Xen does not provide a Darwin build configuration useable on Mac OS. > >>>> It is possible to build Xen Hypervisor (tools are not supported) with a > >>>> toolchain able to produce ELF binaries (GCC or others). > >>>> > >>>> Add config/Darwin.mk to include StdGNU.mk and force > >>>> XEN_COMPILE_ARCH=unknown, ensuring Darwin builds always follow > >>>> the cross-compile path so compiling on Mac OS is always handled as a > >>>> cross compilation case. > >>>> > >>>> Only compiling the hypervisor has been tested ! > >>>> > >>>> An example of how to build the hypervisor for arm64 on Mac OS > >>>> (tools cannot be build for now) using a compiler from brew: > >>>> - brew install aarch64-elf-gcc aarch64-elf-binutils > >>>> - make XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-elf- HOSTCC=clang > >>> > >>> This needs 'xen' target passed. > >> > >> Without any target, xen is built by default so i kept the simplest possible command > >> But I am ok with adding xen > > > > With the `cd xen` omitted, won't that also attempt to build the tools > > then? > > This is supposed to be called in the xen sub-directory not in the main directory. > > Now i get why you wanted the xen (and hence why there was the cd xen before) > > Maybe having -C xen would be a better idea, building from main Makefile could > bring other side effects i guess. I don't have a strong opinion, both -C xen or xen seem to work for me. Thanks, Roger. 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Mon, 09 Feb 2026 06:24:51 -0800 (PST) MIME-Version: 1.0 References: <2cb24d49d7c72bf15a101cc3be62b3cccbfce3d5.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <2cb24d49d7c72bf15a101cc3be62b3cccbfce3d5.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Mon, 9 Feb 2026 15:24:39 +0100 X-Gm-Features: AZwV_Qiyots_TwQKHnPPMI96XR5-4WDBnP74SYNudQ9AyNmV8hCzP66RP8dg1fM Message-ID: Subject: Re: [PATCH 05/12] xen/arm: ffa: Fix PARTINFO RX release errors To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > On PARTITION_INFO_GET error paths, Xen unconditionally called > FFA_RX_RELEASE for the SPMC RX buffer. If the SPMC didn't grant RX > ownership (i.e., the call failed early), this issues a spurious release > that returns DENIED and produces warnings. > > Modify ffa_rxtx_spmc_rx_release() to return the release status and let > callers choose whether to log it. Only issue FFA_RX_RELEASE after a > successful PARTINFO SMC, while always releasing the local RX lock to > avoid deadlocks. > > Update handle_partition_info_get() to only release the SPMC RX buffer > after successful fw_ret checks, and ignore release errors during the > error path. > > Functional impact: eliminates spurious FFA_RX_RELEASE calls and > associated DENIED warnings when PARTITION_INFO_GET fails before > obtaining SPMC RX buffer ownership. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_partinfo.c | 14 ++++++++++++-- > xen/arch/arm/tee/ffa_private.h | 2 +- > xen/arch/arm/tee/ffa_rxtx.c | 14 +++++++++----- > 3 files changed, 22 insertions(+), 8 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_parti= nfo.c > index bf906ed0c88f..6b01c4abe915 100644 > --- a/xen/arch/arm/tee/ffa_partinfo.c > +++ b/xen/arch/arm/tee/ffa_partinfo.c > @@ -92,9 +92,11 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uui= d, uint32_t *sp_count, > uint32_t dst_size) > { > int32_t ret; > + int32_t release_ret; > uint32_t src_size, real_sp_count; > void *src_buf; > uint32_t count =3D 0; > + bool spmc_ok =3D false; Wouldn't notify_fw be clearer, and the same in ffa_partinfo_init()? Either way, please add: Reviewed-by: Jens Wiklander Cheers, Jens > > /* We need to use the RX buffer to receive the list */ > src_buf =3D ffa_rxtx_spmc_rx_acquire(); > @@ -104,6 +106,7 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uu= id, uint32_t *sp_count, > ret =3D ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size); > if ( ret ) > goto out; > + spmc_ok =3D true; > > /* Validate the src_size we got */ > if ( src_size < sizeof(struct ffa_partition_info_1_0) || > @@ -157,7 +160,10 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid u= uid, uint32_t *sp_count, > *sp_count =3D count; > > out: > - ffa_rxtx_spmc_rx_release(); > + release_ret =3D ffa_rxtx_spmc_rx_release(spmc_ok); > + if ( release_ret ) > + gprintk(XENLOG_WARNING, > + "ffa: Error releasing SPMC RX buffer: %d\n", release_ret= ); > return ret; > } > > @@ -507,6 +513,7 @@ bool ffa_partinfo_init(void) > int32_t e; > void *spmc_rx; > struct ffa_uuid nil_uuid =3D { .val =3D { 0ULL, 0ULL } }; > + bool spmc_ok =3D false; > > if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) || > !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32)) > @@ -522,6 +529,7 @@ bool ffa_partinfo_init(void) > printk(XENLOG_ERR "ffa: Failed to get list of SPs: %d\n", e); > goto out; > } > + spmc_ok =3D true; > > if ( count >=3D FFA_MAX_NUM_SP ) > { > @@ -533,7 +541,9 @@ bool ffa_partinfo_init(void) > ret =3D init_subscribers(spmc_rx, count, fpi_size); > > out: > - ffa_rxtx_spmc_rx_release(); > + e =3D ffa_rxtx_spmc_rx_release(spmc_ok); > + if ( e ) > + printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n= ", e); > return ret; > } > > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 58562d8e733c..461e87f6f9c4 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -458,7 +458,7 @@ int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_= id, struct domain **d_out, > bool ffa_rxtx_spmc_init(void); > void ffa_rxtx_spmc_destroy(void); > void *ffa_rxtx_spmc_rx_acquire(void); > -void ffa_rxtx_spmc_rx_release(void); > +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw); > void *ffa_rxtx_spmc_tx_acquire(void); > void ffa_rxtx_spmc_tx_release(void); > > diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c > index 7d8bb4f4d031..50758fb57cdf 100644 > --- a/xen/arch/arm/tee/ffa_rxtx.c > +++ b/xen/arch/arm/tee/ffa_rxtx.c > @@ -375,18 +375,22 @@ void *ffa_rxtx_spmc_rx_acquire(void) > return NULL; > } > > -void ffa_rxtx_spmc_rx_release(void) > +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw) > { > int32_t ret; > > ASSERT(spin_is_locked(&ffa_spmc_rx_lock)); > > - /* Inform the SPMC that we are done with our RX buffer */ > - ret =3D ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); > - if ( ret !=3D FFA_RET_OK ) > - printk(XENLOG_DEBUG "Error releasing SPMC RX buffer: %d\n", ret)= ; > + if ( notify_fw ) > + { > + /* Inform the SPMC that we are done with our RX buffer */ > + ret =3D ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); > + } > + else > + ret =3D FFA_RET_OK; > > spin_unlock(&ffa_spmc_rx_lock); > + return ret; > } > > void *ffa_rxtx_spmc_tx_acquire(void) > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Mon Feb 09 14:26:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 14:26:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225468.1531976 (Exim 4.92) (envelope-from ) id 1vpSDn-00084M-6W; Mon, 09 Feb 2026 14:26:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225468.1531976; Mon, 09 Feb 2026 14:26:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSDn-00084F-3Y; Mon, 09 Feb 2026 14:26:39 +0000 Received: by outflank-mailman (input) for mailman id 1225468; Mon, 09 Feb 2026 14:26:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSDl-000843-ML for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 14:26:37 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 570ef9d5-05c3-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 15:26:36 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-435f177a8f7so3105426f8f.1 for ; Mon, 09 Feb 2026 06:26:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 06:26:35 -0800 (PST) Message-ID: <6779b2e3-c324-481b-ae20-20a40fb1eac4@suse.com> Date: Mon, 9 Feb 2026 15:26:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/kconfig: Reflow the SHADOW help message To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260209103339.6466-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209103339.6466-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:33, Alejandro Vallejo wrote: > Wasn't following the tab+2 spaces convention throughout the rest of the file. > > Not a functional change. > > Signed-off-by: Alejandro Vallejo Largely: Acked-by: Jan Beulich > --- a/xen/arch/x86/Kconfig > +++ b/xen/arch/x86/Kconfig > @@ -148,20 +148,17 @@ config SHADOW_PAGING > default !PV_SHIM_EXCLUSIVE > depends on PV || HVM > help > + Shadow paging is a software alternative to hardware paging support > + (Intel EPT, AMD NPT). > > - Shadow paging is a software alternative to hardware paging support > - (Intel EPT, AMD NPT). > + It is required for: > + * Running HVM guests on hardware lacking hardware paging support > + (First-generation Intel VT-x or AMD SVM). > + * Live migration of PV guests. > + * L1TF sidechannel mitigation for PV guests. > > - It is required for: > - * Running HVM guests on hardware lacking hardware paging support > - (First-generation Intel VT-x or AMD SVM). > - * Live migration of PV guests. > - * L1TF sidechannel mitigation for PV guests. > - > - Under a small number of specific workloads, shadow paging may be > - deliberately used as a performance optimisation. > - > - If unsure, say Y. I'm trying to establish (among the committers) whether we're indeed meaning to drop this sentence from Kconfig help texts that we touch. If I wouldn't get conclusive feedback, I'd likely put it back in. Jan > + Under a small number of specific workloads, shadow paging may be > + deliberately used as a performance optimisation. > > config PAGING > def_bool HVM || SHADOW_PAGING > > base-commit: 1ee8b11c1106dca6b8fe0d54c0e79146bb6545f0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 14:27:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 14:27:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225478.1531986 (Exim 4.92) (envelope-from ) id 1vpSEm-0000H0-L6; Mon, 09 Feb 2026 14:27:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225478.1531986; Mon, 09 Feb 2026 14:27:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSEm-0000Gt-H4; Mon, 09 Feb 2026 14:27:40 +0000 Received: by outflank-mailman (input) for mailman id 1225478; Mon, 09 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Mon, 09 Feb 2026 06:36:04 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 15:36:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: Delete the none.c dummy file To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , xen-devel@lists.xenproject.org References: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:41, Alejandro Vallejo wrote: > It only has 2 callers, both of which can be conditionally removed. > > Signed-off-by: Alejandro Vallejo > --- > I'd be ok conditionalising the else branch on... > > IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) > > logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com > > ... to avoid the danger of stale pointers, with required changes elsewhere so > none.c is only compiled out in that case. I'm not sure I understand this remark. Is this about something in the other patch (which I haven't looked at yet), or ... > --- a/xen/arch/x86/mm/paging.c > +++ b/xen/arch/x86/mm/paging.c > @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) > */ > if ( hap_enabled(d) ) > hap_domain_init(d); > - else > + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > rc = shadow_domain_init(d); > > return rc; > @@ -645,7 +645,7 @@ void paging_vcpu_init(struct vcpu *v) > { > if ( hap_enabled(v->domain) ) > hap_vcpu_init(v); > - else > + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > shadow_vcpu_init(v); > } ... these two hunks? In this latter case, I don't think the bigger conditional would be correct. > --- a/xen/arch/x86/mm/shadow/none.c > +++ /dev/null > @@ -1,77 +0,0 @@ > -#include > -#include > - > -static int cf_check _toggle_log_dirty(struct domain *d) > -{ > - ASSERT(is_pv_domain(d)); > - return -EOPNOTSUPP; > -} > - > -static void cf_check _clean_dirty_bitmap(struct domain *d) > -{ > - ASSERT(is_pv_domain(d)); > -} > - > -static void cf_check _update_paging_modes(struct vcpu *v) > -{ > - ASSERT_UNREACHABLE(); > -} > - > -int shadow_domain_init(struct domain *d) > -{ > - /* For HVM set up pointers for safety, then fail. */ > - static const struct log_dirty_ops sh_none_ops = { > - .enable = _toggle_log_dirty, > - .disable = _toggle_log_dirty, > - .clean = _clean_dirty_bitmap, > - }; > - > - paging_log_dirty_init(d, &sh_none_ops); How do you avoid d->arch.paging.log_dirty.ops remaining NULL with this removed? > - d->arch.paging.update_paging_modes = _update_paging_modes; Same question for this function pointer. > - return is_hvm_domain(d) ? -EOPNOTSUPP : 0; > -} > - > -static int cf_check _page_fault( > - struct vcpu *v, unsigned long va, struct cpu_user_regs *regs) > -{ > - ASSERT_UNREACHABLE(); > - return 0; > -} > - > -static bool cf_check _invlpg(struct vcpu *v, unsigned long linear) > -{ > - ASSERT_UNREACHABLE(); > - return true; > -} > - > -#ifdef CONFIG_HVM > -static unsigned long cf_check _gva_to_gfn( > - struct vcpu *v, struct p2m_domain *p2m, unsigned long va, uint32_t *pfec) > -{ > - ASSERT_UNREACHABLE(); > - return gfn_x(INVALID_GFN); > -} > -#endif > - > -static pagetable_t cf_check _update_cr3(struct vcpu *v, bool noflush) > -{ > - ASSERT_UNREACHABLE(); > - return pagetable_null(); > -} > - > -static const struct paging_mode sh_paging_none = { > - .page_fault = _page_fault, > - .invlpg = _invlpg, > -#ifdef CONFIG_HVM > - .gva_to_gfn = _gva_to_gfn, > -#endif > - .update_cr3 = _update_cr3, > -}; > - > -void shadow_vcpu_init(struct vcpu *v) > -{ > - ASSERT(is_pv_vcpu(v)); > - v->arch.paging.mode = &sh_paging_none; And the same question yet again for this pointer. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yDQGe2OWld8ffx5IOw5+5wIx+SrHv2pc2vQW0agl06lZPlrOrWlAbNW3vKVACQcTVJFG9qMpbc69IFPK47+NG5JVkTxQ1U31Qhpbv1sK5BLa9O4y05ugDK+jiQEb55LAjzL2tXixlKgsdq7ZHIaMzfFHa14Hgra2hMHragSXzUlnAedQIeLFF0VudOpevzrHfTr/FySezwwWVoxgfSHGdwQkFYKA/RBtE7MJ2zUJEfHFBR/O6tE5DLFk6S7kx7NpSpRZRgxwcRQ/iwGK5mI/D17IHNU6d7huyRlDekvh5tkj9Nn9tMMWMUlH6NRA7RwVqovgiVZSfdJ8Jy+bTMEJPuAnAOqrrO53aj7hguF9XQmyZ8nt8PgX4ANh78UD8/HVkWZwZo4nhUfJEiP7CIxSRVFEnPYE7Pf8J1sirEaEChUv67t2pEZluDbDGfB69Tf7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 14:38:06.5065 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0f289284-3833-453e-ca17-08de67e8d6b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A8.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7450 On Mon Feb 9, 2026 at 1:52 PM CET, Jan Beulich wrote: > On 09.02.2026 12:56, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 11:15 AM CET, Jan Beulich wrote: >>> On 09.02.2026 11:05, Alejandro Vallejo wrote: >>>> On Mon Feb 9, 2026 at 10:21 AM CET, Jan Beulich wrote: >>>>> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>>>>> High level description >>>>>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >>>>>> >>>>>> When compared to the RFC this makes a different approach The series = introduces >>>>>> cpu_vendor() which maps to a constant in the single vendor case and = to >>>>>> (boot_cpu_data.vendor & X86_ENABLED_VENDORS), where X86_ENABLED_VEND= ORS is a >>>>>> mask of the compile-time chosen vendors. This enables the compiler t= o detect >>>>>> dead-code at the uses and remove all unreachable branches, including= in >>>>>> switches. >>>>>> >>>>>> When compared to the x86_vendor_is() macro introduced in the RFC, th= is is >>>>>> simpler. It achieves MOST of what the older macro did without touchi= ng the >>>>>> switches, with a few caveats: >>>>>> >>>>>> 1. Compiled-out vendors cause a panic, they don't fallback onto th= e unknown >>>>>> vendor case. In retrospect, this is a much saner thing to do. >>>>> >>>>> I'm unconvinced here. Especially our Centaur and Shanghai support is = at best >>>>> rudimentary. Treating those worse when configured-out than when confi= gured-in >>>>> feels questionable. >>>> >>>> Isn't that the point of configuring out? >>> >>> That's what I'm unsure about. >>=20 >> I'm really missing what you're trying to make, sorry. How, if at all, is= it >> helpful for a hypervisor with a compiled out vendor to be bootable on a = machine >> of that vendor? > > No more and no less than for a system with CPUs from a vendor we don't ha= ve > support for at all. Let's assume someone wants to start adding support fo= r > a new vendor. They may first try Xen as-is. This wouldn't panic. > on how exactly they would start adding stuff, Xen might suddenly panic, > despite functionally nothing having changed. There's an "unknown CPU vendor" option for that. With that option enabled unknown vendor keep working as intended. If it booted in the first place it= 's because the unknown vendor option was enabled. The panic would happen iff t= hey add their own vendor to the code, hook it up on the lookup function and mis= s the X86_ENABLED_VENDORS addition. Which, incidentally, would notify them ri= ght away through a panic rather than having them waste time trying to trigger c= ode DCE is intentionally removing. > >>>> Besides the philosophical matter of whether or not a compiled-out vend= or >>>> should be allowed to run there's the more practical matter of what to = do >>>> with the x86_vendor field of boot_cpu_data. Because at that point our = take >>>> that cross-vendor support is forbidden is a lot weaker. If I can run a= n >>>> AMD-hypervisor on an Intel host, what then? What policies would be all= owed? If I >>>> wipe x86_vendor then policies with some unknown vendor would be fine. = Should the >>>> leaves match too? If I do not wipe the field, should I do black magic = to ensure >>>> the behaviour is different depending on whether the vendor is compiled= in or >>>> not? What if I want to migrate a VM currently running in this hypothet= ical >>>> hypervisor? The rules becomes seriously complex. >>>> >>>> It's just a lot cleaner to take the stance that compiled out vendors c= an't run. >>>> Then everything else is crystal clear and we avoid a universe's worth = of corner >>>> cases. I expect upstream Xen to support all cases (I'm skeptical about= the >>>> utility of the unknown vendor path, but oh well), but many downstreams= might >>>> benefit from killing off support for vendors they really will never to= uch. >>> >>> To them, will panic()ing (or not) make a difference? >>=20 >> One would hope not because the're compiling them out for a reason. >> But for upstream, not panicking brings a sea of corner cases. The ones I >> mentioned above is not the whole list. >>=20 >> Turning the question around. Who benefits from not panicking? > > Certain things may work. But more generally - see above. Turning this > question around also isn't quite appropriate imo: You want to introduce > the panic(), so it's on you to justify doing so (which includes making > clear why omitting that small piece of code would be a bad idea). The justification is twofold. To aleviate complexity in Xen, and fullful a security invariant in the presence of misuse. Letting a guest run is easy (= not quite a oneliner, but not much more). However it raises a number of questio= ns with complicated answers: Save/restore | Live migration =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D The biggest hurdle, as I mentioned, is live-migrations/save-restore. If I xl restore a Hygon VM on a host running in "unknown" mode (being an AMD-only hypervisor with the unknown vendor cfg enabled on an Centaur host)= : What should the vendor policy check say when I restore? a. They are incompatible: Because Hygon is compiled out. b. They are incompatible: Because Hygon doesn't match the vendor bytes = of the host. b. They are compatible: Because they are both "unknown". c. What if the host _was_ Hygon, but Hygon was disabled? It's just a mess. And the fact that the unknown vendor path has even less testing than that of Centaur we can probably count on it being extremely bu= ggy. And on the topic of the consequences of bugs, there's the other argument... Security argument =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D If an AMD-only hypervisor runs on Intel hardware it just wouldn't be safe. = We can make statements that this configuration being unsupported and known uns= afe, and everything along those lines but mistakes happen. A mistake in producti= on where a vendor-trimmed hypervisor lands on the very trimmed vendor means a security hole. And saying "that's a 'you' problem" doesn't cut it, because = I can make the same statement to users and developers of new vendors. I can only see very theoretical use cases for the lack of a panic and a ver= y clear danger of misuse. early_cpu_init() runs after COM ports are configure= d so it's not like we'd reboot without stating why. =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D If it's a hard requirement, I can change it so the panic behaves as it did on the RFC, but IMO it creates real problems for the benefit of imaginary u= se cases. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 14:41:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 14:41:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225501.1532017 (Exim 4.92) (envelope-from ) id 1vpSRj-0004cV-9D; Mon, 09 Feb 2026 14:41:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225501.1532017; Mon, 09 Feb 2026 14:41:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSRj-0004cN-4q; Mon, 09 Feb 2026 14:41:03 +0000 Received: by outflank-mailman (input) for mailman id 1225501; Mon, 09 Feb 2026 14:41:01 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSRh-0004cH-Lr for xen-devel@lists.xenproject.org; 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There's no need to further build the domain when creation is doomed to fail later on. Signed-off-by: Roger Pau Monné --- xen/arch/x86/domain.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 8b2f33f1a06c..8eb1509782ef 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -627,6 +627,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) + { + dprintk(XENLOG_INFO, "Shadow paging requested but not available\n"); + return -EINVAL; + } + if ( !hvm ) /* * It is only meaningful for XEN_DOMCTL_CDF_oos_off to be clear -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 14:42:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 14:42:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225507.1532026 (Exim 4.92) (envelope-from ) id 1vpSTU-00057V-Im; Mon, 09 Feb 2026 14:42:52 +0000 X-Outflank-Mailman: Message body and most headers restored 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X-MS-Exchange-CrossTenant-Network-Message-Id: e221efd0-eac8-41af-b135-08de67e97d7d X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 14:42:46.6393 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UoEuyWqW6NUMoELmz6j4olf0arIM8gqyxP2bk/BJ+qQ6rk5+jzMdQewjegVfRApiIsKDJu1nEDlMe9hHDOZlOw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB6641 On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: > It only has 2 callers, both of which can be conditionally removed. > > Signed-off-by: Alejandro Vallejo > --- > I'd be ok conditionalising the else branch on... > > IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) > > logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com > > ... to avoid the danger of stale pointers, with required changes elsewhere so > none.c is only compiled out in that case. > > I'm not sure how much it matters seeing how they are all unreachable. > --- > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/paging.c | 4 +- > xen/arch/x86/mm/shadow/Makefile | 4 -- > xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- > 4 files changed, 3 insertions(+), 84 deletions(-) > delete mode 100644 xen/arch/x86/mm/shadow/none.c > > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > index 960f6e8409..066c4caff3 100644 > --- a/xen/arch/x86/mm/Makefile > +++ b/xen/arch/x86/mm/Makefile > @@ -1,4 +1,4 @@ > -obj-y += shadow/ > +obj-$(CONFIG_SHADOW_PAGING) += shadow/ > obj-$(CONFIG_HVM) += hap/ > > obj-$(CONFIG_ALTP2M) += altp2m.o > diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c > index 2396f81ad5..5f70254cec 100644 > --- a/xen/arch/x86/mm/paging.c > +++ b/xen/arch/x86/mm/paging.c > @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) > */ > if ( hap_enabled(d) ) > hap_domain_init(d); > - else > + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > rc = shadow_domain_init(d); If you want to go this route you will need to set rc = -EOPNOTSUPP; prior to the `if ... else if` on the HVM case. Otherwise when shadow is compiled out, and the toolstack has not specified the HAP flag at domain creation you will end up with a domain that doesn't have the paging operations initialized as paging_domain_init() would return 0 with neither HAP nor shadow having been setup. That's likely to trigger NULL pointer dereferences inside of Xen. Also, seeing the code in arch_sanitise_domain_config() we possibly want to return an error at that point if toolstack attempts to create an HVM guest without HAP enabled, and shadow is build time disabled. I've sent a patch to that end. Thanks, Roger. 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Mon, 09 Feb 2026 06:48:08 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 15:48:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: Add Kconfig option for log-dirty tracking To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260209103118.5885-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209103118.5885-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:31, Alejandro Vallejo wrote: > --- a/xen/arch/x86/Kconfig > +++ b/xen/arch/x86/Kconfig > @@ -146,6 +146,7 @@ config XEN_IBT > config SHADOW_PAGING > bool "Shadow Paging" > default !PV_SHIM_EXCLUSIVE > + select LOG_DIRTY > depends on PV || HVM > help Why would this be? IOW why would shadow imply log-dirty, but HAP wouldn't? > @@ -166,6 +167,14 @@ config SHADOW_PAGING > config PAGING > def_bool HVM || SHADOW_PAGING > > +config LOG_DIRTY PAGING_LOG_DIRTY? > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c > @@ -220,15 +220,15 @@ long arch_do_domctl( > { > > case XEN_DOMCTL_shadow_op: > -#ifdef CONFIG_PAGING > + ret = -EOPNOTSUPP; > + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) > + break; > + > ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); > if ( ret == -ERESTART ) > return hypercall_create_continuation( > __HYPERVISOR_paging_domctl_cont, "h", u_domctl); > copyback = true; > -#else > - ret = -EOPNOTSUPP; > -#endif > break; Can a HVM-only hypervisor create any guests with this? I simply fail to see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it through to hap_domctl(). > --- a/xen/arch/x86/include/asm/domain.h > +++ b/xen/arch/x86/include/asm/domain.h > @@ -226,7 +226,9 @@ struct paging_domain { > unsigned int p2m_pages; /* number of pages allocated to p2m */ > > /* log dirty support */ > +#ifdef CONFIG_LOG_DIRTY > struct log_dirty_domain log_dirty; > +#endif /* CONFIG_LOG_DIRTY */ Such an #ifdef can likely replace the comment? Or else the comment would better also live inside the #ifdef? > --- a/xen/arch/x86/include/asm/paging.h > +++ b/xen/arch/x86/include/asm/paging.h > @@ -55,12 +55,9 @@ > #define PG_translate 0 > #define PG_external 0 > #endif > -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) > /* Enable log dirty mode */ > -#define PG_log_dirty (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) > -#else > -#define PG_log_dirty 0 > -#endif > +#define PG_log_dirty IS_ENABLED(CONFIG_LOG_DIRTY) * \ > + (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) Need wrapping in parentheses then. > --- a/xen/arch/x86/mm/hap/hap.c > +++ b/xen/arch/x86/mm/hap/hap.c > @@ -50,7 +50,7 @@ struct hap_dirty_vram { > * calling p2m_log_dirty_range(), which interrogates each vram > * page's p2m type looking for pages that have been made writable. > */ > - > +#ifdef CONFIG_LOG_DIRTY This wants to move further up. > --- a/xen/include/hypercall-defs.c > +++ b/xen/include/hypercall-defs.c > @@ -194,7 +194,7 @@ dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs) > #ifdef CONFIG_SYSCTL > sysctl(xen_sysctl_t *u_sysctl) > #endif > -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) > +#if defined(CONFIG_LOG_DIRTY) > paging_domctl_cont(xen_domctl_t *u_domctl) > #endif > #ifndef CONFIG_PV_SHIM_EXCLUSIVE > @@ -292,7 +292,7 @@ dm_op compat do compat do do > hypfs_op do do do do do > #endif > mca do do - - - > -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) > +#if defined(CONFIG_LOG_DIRTY) > paging_domctl_cont do do do do - > #endif The CONFIG_X86 part of the checking wants to remain: Another port may also gain a setting of this name, without necessarily having this auxiliary hypercall. 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6561 On Fri Feb 6, 2026 at 10:05 PM CET, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default y, requires EXPERT to disable) > to allow nested virtualization support to be disabled at build time. > This is useful for embedded or safety-focused deployments where > nested virtualization is not needed, reducing code size and attack > surface. > > When CONFIG_NESTED_VIRT=3Dn, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c Good riddance. > > Add inline stubs where needed in headers. I'm fairly sure we can get rid much of this diff by curring off earlier. > > No functional change when CONFIG_NESTED_VIRT=3Dy. > > Signed-off-by: Stefano Stabellini > --- > Changes in v2: > - add ASSERT_UNREACHABLE > - change default to N and remove EXPERT > - don't compile nested_hap if not VMX > - add XEN_SYSCTL_PHYSCAP_nestedhvm > - add IS_ENABLED check in hvm_nested_virt_supported=20 > --- > xen/arch/x86/hvm/Kconfig | 10 ++++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/nestedhvm.h | 60 +++++++++++++++++++++-- > xen/arch/x86/hvm/svm/svm.c | 6 +++ > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/vmx.c | 10 +++- > xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 52 ++++++++++++++++---- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 62 ++++++++++++++++++++++++ > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 4 +- > xen/arch/x86/mm/p2m.h | 6 +++ > xen/arch/x86/sysctl.c | 2 + > xen/include/public/sysctl.h | 4 +- > 15 files changed, 202 insertions(+), 24 deletions(-) > > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..133f19a063 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,14 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > =20 > +config NESTED_VIRT > + bool "Nested virtualization support" > + depends on AMD_SVM || INTEL_VMX > + default n > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. > + > + If unsure, say N. > + > endif > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > index f34fb03934..b8a0a68624 100644 > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -18,7 +18,7 @@ obj-y +=3D irq.o > obj-y +=3D mmio.o > obj-$(CONFIG_VM_EVENT) +=3D monitor.o > obj-y +=3D mtrr.o > -obj-y +=3D nestedhvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedhvm.o > obj-y +=3D pmtimer.o > obj-y +=3D quirks.o > obj-y +=3D rtc.o > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefil= e > index 8a072cafd5..92418e3444 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -2,6 +2,6 @@ obj-y +=3D asid.o > obj-y +=3D emulate.o > obj-bin-y +=3D entry.o > obj-y +=3D intr.o > -obj-y +=3D nestedsvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedsvm.o > obj-y +=3D svm.o > obj-y +=3D vmcb.o > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nest= edhvm.h > index 9bfed5ffd7..ed1aa847e5 100644 > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -26,6 +26,13 @@ > #define nsvm_efer_svm_enabled(v) \ > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) This should be IS_ENABLED(CONFIG_NESTED_VIRT) && (!!((v)->arch.hvm.guest_ef= er & EFER_SVME)) Then DCE removes all calls to the stubs you had to add, making the stubs redundant. the stgi and clgi handlers need new helpers like those of VMRUN,= VMLOAD and VMSAVE so that svm.c can dispatch #UD to the guest rather than relying on n= estedsvm.c doing so. Afterwards you endup with a cleaner nestedhvm.h with no stubs and all logic removed by DCE. > =20 > /* > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..0234b57afb 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -46,6 +46,10 @@ > =20 > void noreturn svm_asm_do_resume(void); > =20 > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nsvm_vcpu_switch(void) { } > +#endif Rather than doing this, why not compile out the calls in entry.S? While at it, there's the hunk about p2m stealing we can also get rid of: cmp %cl,VCPU_nsvm_hap_enabled(%rbx) UNLIKELY_START(ne, nsvm_hap) cmp %rcx,VCPU_nhvm_p2m(%rbx) sete %al test VCPU_nhvm_guestmode(%rbx),%al UNLIKELY_DONE(z, nsvm_hap) /* * Someone shot down our nested p2m table; go round again * and nsvm_vcpu_switch() will fix it for us. */ sti jmp .Lsvm_do_resume __UNLIKELY_END(nsvm_hap) > + > u32 svm_feature_flags; > =20 > /* > @@ -2465,6 +2469,7 @@ static struct hvm_function_table __initdata_cf_clob= ber svm_function_table =3D { > .set_rdtsc_exiting =3D svm_set_rdtsc_exiting, > .get_insn_bytes =3D svm_get_insn_bytes, > =20 > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise =3D nsvm_vcpu_initialise, > .nhvm_vcpu_destroy =3D nsvm_vcpu_destroy, > .nhvm_vcpu_reset =3D nsvm_vcpu_reset, > @@ -2474,6 +2479,7 @@ static struct hvm_function_table __initdata_cf_clob= ber svm_function_table =3D { > .nhvm_vmcx_hap_enabled =3D nsvm_vmcb_hap_enabled, > .nhvm_intr_blocked =3D nsvm_intr_blocked, > .nhvm_hap_walk_L1_p2m =3D nsvm_hap_walk_L1_p2m, > +#endif > =20 > .get_reg =3D svm_get_reg, > .set_reg =3D svm_set_reg, > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefil= e > index 04a29ce59d..902564b3e2 100644 > --- a/xen/arch/x86/hvm/vmx/Makefile > +++ b/xen/arch/x86/hvm/vmx/Makefile > @@ -3,4 +3,4 @@ obj-y +=3D intr.o > obj-y +=3D realmode.o > obj-y +=3D vmcs.o > obj-y +=3D vmx.o > -obj-y +=3D vvmx.o > +obj-$(CONFIG_NESTED_VIRT) +=3D vvmx.o > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 82c55f49ae..252f27322b 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -55,6 +55,10 @@ > #include > #include > =20 > +#ifndef CONFIG_NESTED_VIRT > +void asmlinkage nvmx_switch_guest(void) { } > +#endif Same as for VMX. I didn't check the rest of it, but the same idea should ap= ply. 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Mon, 09 Feb 2026 06:56:22 -0800 (PST) Message-ID: <0105370f-6b00-4174-9641-83c2e6d743b7@suse.com> Date: Mon, 9 Feb 2026 15:56:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: short-circuit HVM shadow guest creation earlier To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20260209144049.86535-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209144049.86535-1-roger.pau@citrix.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YmK+fe9HGD05wTRdPfF713/05PtbjxmFOqhdvbvxpJv5NUc1/GAa+EWUivmwUZ3SuEs0u+HdBR/phsmKp/ALEIaoeYeDdcJYPM/qXDDIu1J7Kns1Tilqu2SJMMJ80IThf76YRraskE1zy0ajNhPf9eCVxrSpsUl9CI+gVWXmcqjpVyiCbsZJVp8rVMsbTgXZfalLziL9Hs4+IVaojm6l8RzwbYJ9dg98fvjxmoM6Rc7BXbAwNOZQoEuQcAbQhX+8KbzfWmzhuLkXcluyKQq756Hi696mMKh9Z9C5Wly2E2SD64Owvm3S8FpHCPYEcqyQ1N1z68Lm/b5q4NW34HrnPMnCu3OFkour01N7UPstLtWzQqsUVz8uN8fjjg2hGDFkqW7+o2AuZuEyO7OqidVH2uNzObgEB9V7DlExjZBj60nRvugdlOJyJl3TPXRlANAa X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 14:57:15.6307 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb2c20bb-a8a7-4b68-ce84-08de67eb83a8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4437 On Mon Feb 9, 2026 at 3:26 PM CET, Jan Beulich wrote: > On 09.02.2026 11:33, Alejandro Vallejo wrote: >> Wasn't following the tab+2 spaces convention throughout the rest of the = file. >>=20 >> Not a functional change. >>=20 >> Signed-off-by: Alejandro Vallejo > > Largely: > Acked-by: Jan Beulich Thanks. > >> --- a/xen/arch/x86/Kconfig >> +++ b/xen/arch/x86/Kconfig >> @@ -148,20 +148,17 @@ config SHADOW_PAGING >> default !PV_SHIM_EXCLUSIVE >> depends on PV || HVM >> help >> + Shadow paging is a software alternative to hardware paging support >> + (Intel EPT, AMD NPT). >> =20 >> - Shadow paging is a software alternative to hardware paging su= pport >> - (Intel EPT, AMD NPT). >> + It is required for: >> + * Running HVM guests on hardware lacking hardware paging support >> + (First-generation Intel VT-x or AMD SVM). >> + * Live migration of PV guests. >> + * L1TF sidechannel mitigation for PV guests. >> =20 >> - It is required for: >> - * Running HVM guests on hardware lacking hardware paging su= pport >> - (First-generation Intel VT-x or AMD SVM). >> - * Live migration of PV guests. >> - * L1TF sidechannel mitigation for PV guests. >> - >> - Under a small number of specific workloads, shadow paging may= be >> - deliberately used as a performance optimisation. >> - >> - If unsure, say Y. > > I'm trying to establish (among the committers) whether we're indeed meani= ng > to drop this sentence from Kconfig help texts that we touch. If I wouldn'= t > get conclusive feedback, I'd likely put it back in. > > Jan Sounds good to me either way. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:01:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:01:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225568.1532096 (Exim 4.92) (envelope-from ) id 1vpSlG-0003N4-PN; Mon, 09 Feb 2026 15:01:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225568.1532096; Mon, 09 Feb 2026 15:01:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSlG-0003Mx-MU; Mon, 09 Feb 2026 15:01:14 +0000 Received: by outflank-mailman (input) for mailman id 1225568; Mon, 09 Feb 2026 15:01:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpSlF-0003Mr-HL for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 15:01:13 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2c718577-05c8-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 16:01:12 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-480142406b3so35224855e9.1 for ; Mon, 09 Feb 2026 07:01:12 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 07:01:06 -0800 (PST) Message-ID: <13880b1a-fc99-4bc3-8c52-9e4d59354caf@suse.com> Date: Mon, 9 Feb 2026 16:01:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization To: Alejandro Vallejo , Stefano Stabellini Cc: roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, xen-devel@lists.xenproject.org References: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 15:55, Alejandro Vallejo wrote: > On Fri Feb 6, 2026 at 10:05 PM CET, Stefano Stabellini wrote: >> --- a/xen/arch/x86/hvm/svm/nestedhvm.h >> +++ b/xen/arch/x86/hvm/svm/nestedhvm.h >> @@ -26,6 +26,13 @@ >> #define nsvm_efer_svm_enabled(v) \ >> (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > > This should be IS_ENABLED(CONFIG_NESTED_VIRT) && (!!((v)->arch.hvm.guest_efer & EFER_SVME)) And then, btw, the !! also dropped and the wrapping opening parenthesis moved. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JufWAUGwlCjuhj7r5CvbfTRJyHGQgJaQR0qkPMcyojG+mlOv3YaeGzgmTykAihtLbOfRhCwCBGM3qclDpIW9L7kv8BZXfhdFH25tbipS0bwiRQRY97u8ufHO4q814rmD1cJ5A4xK5h47UM9rk+MTP307XIXCgEId7TUlXs5Z/XRS5mJo6eCJsEaOOw7IvqNATJHC84s2lp2XMEhDoEpghlVkze7EIGprPr1gYG4DfigripQyZqdM5HdtRcdMLi3WK546oTEgFlA5ZY0LTKAkzpbR1pDgv7YueqMlqZqrIsvFvDGV1f0dLzmLeg195P8lGKuEcO6L1RoK/+FRA9by9ism/nYnYvS1r0BKs0jTpEZgL8KEwz/VdLyH3rhGc4OX0x+YJVsSSzjonjZ1yfHnVeZo2lzq7iHvfP2dyL5Yy9TWwqZfvwl8HVHRS3ApXNRx X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 15:08:22.3895 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 78074416-145c-44a6-b7b1-08de67ed1119 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D0.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4455 On Mon Feb 9, 2026 at 3:36 PM CET, Jan Beulich wrote: > On 09.02.2026 11:41, Alejandro Vallejo wrote: >> It only has 2 callers, both of which can be conditionally removed. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> I'd be ok conditionalising the else branch on... >>=20 >> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) >>=20 >> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-= alejandro.garciavallejo@amd.com >>=20 >> ... to avoid the danger of stale pointers, with required changes elsewhe= re so >> none.c is only compiled out in that case. > > I'm not sure I understand this remark. Is this about something in the oth= er > patch (which I haven't looked at yet), or ... > >> --- a/xen/arch/x86/mm/paging.c >> +++ b/xen/arch/x86/mm/paging.c >> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) >> */ >> if ( hap_enabled(d) ) >> hap_domain_init(d); >> - else >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >> rc =3D shadow_domain_init(d); >> =20 >> return rc; >> @@ -645,7 +645,7 @@ void paging_vcpu_init(struct vcpu *v) >> { >> if ( hap_enabled(v->domain) ) >> hap_vcpu_init(v); >> - else >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >> shadow_vcpu_init(v); >> } > > ... these two hunks? In this latter case, I don't think the bigger condit= ional > would be correct. It'd be about these hunks and the inclusion condition for shadow/. I sugges= t that because... > >> --- a/xen/arch/x86/mm/shadow/none.c >> +++ /dev/null >> @@ -1,77 +0,0 @@ >> -#include >> -#include >> - >> -static int cf_check _toggle_log_dirty(struct domain *d) >> -{ >> - ASSERT(is_pv_domain(d)); >> - return -EOPNOTSUPP; >> -} >> - >> -static void cf_check _clean_dirty_bitmap(struct domain *d) >> -{ >> - ASSERT(is_pv_domain(d)); >> -} >> - >> -static void cf_check _update_paging_modes(struct vcpu *v) >> -{ >> - ASSERT_UNREACHABLE(); >> -} >> - >> -int shadow_domain_init(struct domain *d) >> -{ >> - /* For HVM set up pointers for safety, then fail. */ >> - static const struct log_dirty_ops sh_none_ops =3D { >> - .enable =3D _toggle_log_dirty, >> - .disable =3D _toggle_log_dirty, >> - .clean =3D _clean_dirty_bitmap, >> - }; >> - >> - paging_log_dirty_init(d, &sh_none_ops); > > How do you avoid d->arch.paging.log_dirty.ops remaining NULL with this > removed? ... as you point out, the ops don't get initialised. Adding the log-dirty condition ensures there's no uninitialised ops (even when unreachable). > >> - d->arch.paging.update_paging_modes =3D _update_paging_modes; > > Same question for this function pointer. > >> - return is_hvm_domain(d) ? -EOPNOTSUPP : 0; >> -} Oh. This was a hard miss, true that. >> - >> -static int cf_check _page_fault( >> - struct vcpu *v, unsigned long va, struct cpu_user_regs *regs) >> -{ >> - ASSERT_UNREACHABLE(); >> - return 0; >> -} >> - >> -static bool cf_check _invlpg(struct vcpu *v, unsigned long linear) >> -{ >> - ASSERT_UNREACHABLE(); >> - return true; >> -} >> - >> -#ifdef CONFIG_HVM >> -static unsigned long cf_check _gva_to_gfn( >> - struct vcpu *v, struct p2m_domain *p2m, unsigned long va, uint32_t = *pfec) >> -{ >> - ASSERT_UNREACHABLE(); >> - return gfn_x(INVALID_GFN); >> -} >> -#endif >> - >> -static pagetable_t cf_check _update_cr3(struct vcpu *v, bool noflush) >> -{ >> - ASSERT_UNREACHABLE(); >> - return pagetable_null(); >> -} >> - >> -static const struct paging_mode sh_paging_none =3D { >> - .page_fault =3D _page_fault, >> - .invlpg =3D _invlpg, >> -#ifdef CONFIG_HVM >> - .gva_to_gfn =3D _gva_to_gfn, >> -#endif >> - .update_cr3 =3D _update_cr3, >> -}; >> - >> -void shadow_vcpu_init(struct vcpu *v) >> -{ >> - ASSERT(is_pv_vcpu(v)); >> - v->arch.paging.mode =3D &sh_paging_none; > > And the same question yet again for this pointer. > > Jan However, on the whole. Under what circumstances are these handlers invoked? They are only compiled in for !CONFIG_SHADOW. But these are only applied wi= th HAP disabled. Are they for PV or something? Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:09:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:09:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225582.1532115 (Exim 4.92) (envelope-from ) id 1vpStW-0004pJ-Q8; Mon, 09 Feb 2026 15:09:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225582.1532115; Mon, 09 Feb 2026 15:09:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpStW-0004pC-NG; Mon, 09 Feb 2026 15:09:46 +0000 Received: by outflank-mailman (input) for mailman id 1225582; Mon, 09 Feb 2026 15:09:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpStV-0004p1-EE for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 15:09:45 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5da4b886-05c9-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 16:09:44 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-482f454be5bso46721035e9.0 for ; Mon, 09 Feb 2026 07:09:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 07:09:43 -0800 (PST) Message-ID: <7a3b72b4-23f9-410f-8d0d-08d9adaaf1a7@suse.com> Date: Mon, 9 Feb 2026 16:09:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini Cc: roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206210554.126443-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 22:05, Stefano Stabellini wrote: > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,14 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > > +config NESTED_VIRT > + bool "Nested virtualization support" > + depends on AMD_SVM || INTEL_VMX Should be HVM? Or else have separate NESTED_SVM and NESTED_VMX? > + default n Please omit such a redundant line. > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -26,6 +26,13 @@ > #define nsvm_efer_svm_enabled(v) \ > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > > +#define NSVM_INTR_NOTHANDLED 3 > +#define NSVM_INTR_NOTINTERCEPTED 2 > +#define NSVM_INTR_FORCEVMEXIT 1 > +#define NSVM_INTR_MASKED 0 It feels suspicious that all of these need moving ... > +#ifdef CONFIG_NESTED_VIRT ... ahead of this. > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT Same here. > --- a/xen/arch/x86/mm/hap/Makefile > +++ b/xen/arch/x86/mm/hap/Makefile > @@ -2,5 +2,5 @@ obj-y += hap.o > obj-y += guest_walk_2.o > obj-y += guest_walk_3.o > obj-y += guest_walk_4.o > -obj-y += nested_hap.o > -obj-$(CONFIG_INTEL_VMX) += nested_ept.o > +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o > +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) += nested_ept.o Maybe slightly easier to read as nested-y := nested_hap.o nested-$(CONFIG_INTEL_VMX) += nested_ept.o obj-$(CONFIG_NESTED_VIRT) += $(nested-y) > --- a/xen/arch/x86/sysctl.c > +++ b/xen/arch/x86/sysctl.c > @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > pi->capabilities |= XEN_SYSCTL_PHYSCAP_hap; > if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow; > + if ( hvm_nested_virt_supported() ) > + pi->capabilities |= XEN_SYSCTL_PHYSCAP_nestedhvm; > } > > long arch_do_sysctl( > --- a/xen/include/public/sysctl.h > +++ b/xen/include/public/sysctl.h > @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { > /* Xen supports the Grant v1 and/or v2 ABIs. */ > #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) > #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) > +/* The platform supports nested HVM. */ > +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) Doesn't this want introducing up front, for the tool stack to make use of? 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Mon, 09 Feb 2026 07:14:40 -0800 (PST) Message-ID: <6caea7dd-24e0-467b-beb6-3888616aab2e@suse.com> Date: Mon, 9 Feb 2026 16:14:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: Delete the none.c dummy file To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , xen-devel@lists.xenproject.org References: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 16:06, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 3:36 PM CET, Jan Beulich wrote: >> On 09.02.2026 11:41, Alejandro Vallejo wrote: >>> It only has 2 callers, both of which can be conditionally removed. >>> >>> Signed-off-by: Alejandro Vallejo >>> --- >>> I'd be ok conditionalising the else branch on... >>> >>> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) >>> >>> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com >>> >>> ... to avoid the danger of stale pointers, with required changes elsewhere so >>> none.c is only compiled out in that case. >> >> I'm not sure I understand this remark. Is this about something in the other >> patch (which I haven't looked at yet), or ... >> >>> --- a/xen/arch/x86/mm/paging.c >>> +++ b/xen/arch/x86/mm/paging.c >>> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) >>> */ >>> if ( hap_enabled(d) ) >>> hap_domain_init(d); >>> - else >>> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >>> rc = shadow_domain_init(d); >>> >>> return rc; >>> @@ -645,7 +645,7 @@ void paging_vcpu_init(struct vcpu *v) >>> { >>> if ( hap_enabled(v->domain) ) >>> hap_vcpu_init(v); >>> - else >>> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >>> shadow_vcpu_init(v); >>> } >> >> ... these two hunks? In this latter case, I don't think the bigger conditional >> would be correct. > > It'd be about these hunks and the inclusion condition for shadow/. I suggest that > because... > >> >>> --- a/xen/arch/x86/mm/shadow/none.c >>> +++ /dev/null >>> @@ -1,77 +0,0 @@ >>> -#include >>> -#include >>> - >>> -static int cf_check _toggle_log_dirty(struct domain *d) >>> -{ >>> - ASSERT(is_pv_domain(d)); >>> - return -EOPNOTSUPP; >>> -} >>> - >>> -static void cf_check _clean_dirty_bitmap(struct domain *d) >>> -{ >>> - ASSERT(is_pv_domain(d)); >>> -} >>> - >>> -static void cf_check _update_paging_modes(struct vcpu *v) >>> -{ >>> - ASSERT_UNREACHABLE(); >>> -} >>> - >>> -int shadow_domain_init(struct domain *d) >>> -{ >>> - /* For HVM set up pointers for safety, then fail. */ >>> - static const struct log_dirty_ops sh_none_ops = { >>> - .enable = _toggle_log_dirty, >>> - .disable = _toggle_log_dirty, >>> - .clean = _clean_dirty_bitmap, >>> - }; >>> - >>> - paging_log_dirty_init(d, &sh_none_ops); >> >> How do you avoid d->arch.paging.log_dirty.ops remaining NULL with this >> removed? > > ... as you point out, the ops don't get initialised. Adding the log-dirty > condition ensures there's no uninitialised ops (even when unreachable). IOW the remark is kind of (but not quite) making that other change a prereq? (See my remark there as to typing together SHADOW_PAGING and LOG_DIRTY.) >>> - d->arch.paging.update_paging_modes = _update_paging_modes; >> >> Same question for this function pointer. >> >>> - return is_hvm_domain(d) ? -EOPNOTSUPP : 0; >>> -} > > Oh. This was a hard miss, true that. > >>> - >>> -static int cf_check _page_fault( >>> - struct vcpu *v, unsigned long va, struct cpu_user_regs *regs) >>> -{ >>> - ASSERT_UNREACHABLE(); >>> - return 0; >>> -} >>> - >>> -static bool cf_check _invlpg(struct vcpu *v, unsigned long linear) >>> -{ >>> - ASSERT_UNREACHABLE(); >>> - return true; >>> -} >>> - >>> -#ifdef CONFIG_HVM >>> -static unsigned long cf_check _gva_to_gfn( >>> - struct vcpu *v, struct p2m_domain *p2m, unsigned long va, uint32_t *pfec) >>> -{ >>> - ASSERT_UNREACHABLE(); >>> - return gfn_x(INVALID_GFN); >>> -} >>> -#endif >>> - >>> -static pagetable_t cf_check _update_cr3(struct vcpu *v, bool noflush) >>> -{ >>> - ASSERT_UNREACHABLE(); >>> - return pagetable_null(); >>> -} >>> - >>> -static const struct paging_mode sh_paging_none = { >>> - .page_fault = _page_fault, >>> - .invlpg = _invlpg, >>> -#ifdef CONFIG_HVM >>> - .gva_to_gfn = _gva_to_gfn, >>> -#endif >>> - .update_cr3 = _update_cr3, >>> -}; >>> - >>> -void shadow_vcpu_init(struct vcpu *v) >>> -{ >>> - ASSERT(is_pv_vcpu(v)); >>> - v->arch.paging.mode = &sh_paging_none; >> >> And the same question yet again for this pointer. > > However, on the whole. Under what circumstances are these handlers invoked? > > They are only compiled in for !CONFIG_SHADOW. But these are only applied with > HAP disabled. Are they for PV or something? The .gva_to_gfn hook is clearly HVM-only. We still want to be sure to have no NULL pointers around that we could stumble across, especially as long as PV=y. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:23:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:23:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225608.1532146 (Exim 4.92) (envelope-from ) id 1vpT6X-0000Md-Dp; Mon, 09 Feb 2026 15:23:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225608.1532146; Mon, 09 Feb 2026 15:23:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpT6X-0000MW-AC; Mon, 09 Feb 2026 15:23:13 +0000 Received: by outflank-mailman (input) for mailman id 1225608; Mon, 09 Feb 2026 15:23:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpT6V-0000MN-Ou for xen-devel@lists.xenproject.org; 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Mon, 09 Feb 2026 07:23:00 -0800 (PST) MIME-Version: 1.0 References: <97a064c81ee5ea26774c189538f9f1e37dd3eebc.1770115302.git.bertrand.marquis@arm.com> <19C7C710-4447-42AC-AFF3-F3122606BC0C@arm.com> <0680A28E-E2A6-4A75-9C82-1348ACD17E2F@arm.com> In-Reply-To: <0680A28E-E2A6-4A75-9C82-1348ACD17E2F@arm.com> From: Jens Wiklander Date: Mon, 9 Feb 2026 16:22:48 +0100 X-Gm-Features: AZwV_Qj6c6GxPDju0TvmjeWC8_BhN37-lHrOcYZ2w9bO9OIg8h6DUOPfBTHNqII Message-ID: Subject: Re: [PATCH 03/12] xen/arm: ffa: Harden shm page parsing To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Mon, Feb 9, 2026 at 4:11=E2=80=AFPM Bertrand Marquis wrote: > > Hi Jens, > > > On 9 Feb 2026, at 15:26, Bertrand Marquis wr= ote: > > > > Hi Jens, > > > >> On 9 Feb 2026, at 10:31, Jens Wiklander wr= ote: > >> > >> Hi Bertrand, > >> > >> On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis > >> wrote: > >>> > >>> get_shm_pages() uses unchecked address arithmetic and does not enforc= e > >>> alignment, so malformed descriptors can cause overflow or slip throug= h > >>> validation. The reclaim path also repeats handle-to-shm-mem conversio= n > >>> in multiple places, duplicating error handling. > >>> > >>> Harden page parsing and reclaim handling: > >>> - add ffa_safe_addr_add() and use it to detect address overflows > >>> - enforce alignment checks in get_shm_pages() and return FF-A errors > >>> - introduce ffa_secure_reclaim() and use it for MEM_RECLAIM and teard= own > >>> - simplify ffa_mem_share() argument handling and allow max page count > >>> > >>> Functional impact: invalid or misaligned memory ranges now fail earli= er > >>> with proper error codes; behavior for valid descriptors is unchanged. > >>> > >>> Signed-off-by: Bertrand Marquis > >>> --- > >>> xen/arch/arm/tee/ffa_private.h | 11 +++++++ > >>> xen/arch/arm/tee/ffa_shm.c | 57 +++++++++++++++++----------------= - > >>> 2 files changed, 40 insertions(+), 28 deletions(-) > >>> > >>> diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_pr= ivate.h > >>> index b625f1c72914..58562d8e733c 100644 > >>> --- a/xen/arch/arm/tee/ffa_private.h > >>> +++ b/xen/arch/arm/tee/ffa_private.h > >>> @@ -632,4 +632,15 @@ static inline void ffa_uuid_set(struct ffa_uuid = *id, uint32_t val0, > >>> id->val[1] =3D ((uint64_t)val3 << 32U) | val2; > >>> } > >>> > >>> +/* > >>> + * Common overflow-safe helper to verify that adding a number of pag= es to an > >>> + * address will not wrap around. > >>> + */ > >>> +static inline bool ffa_safe_addr_add(uint64_t addr, uint64_t pages) > >>> +{ > >>> + uint64_t off =3D pages * FFA_PAGE_SIZE; > >>> + > >>> + return (off / FFA_PAGE_SIZE) =3D=3D pages && addr <=3D UINT64_MA= X - off; > >>> +} > >>> + > >>> #endif /*__FFA_PRIVATE_H__*/ > >>> diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > >>> index 90800e44a86a..4c0b45cde6ee 100644 > >>> --- a/xen/arch/arm/tee/ffa_shm.c > >>> +++ b/xen/arch/arm/tee/ffa_shm.c > >>> @@ -96,16 +96,14 @@ struct ffa_shm_mem { > >>> struct page_info *pages[]; > >>> }; > >>> > >>> -static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, > >>> - register_t addr, uint32_t pg_count, > >>> - uint64_t *handle) > >>> +static int32_t ffa_mem_share(uint32_t tot_len, uint64_t *handle) > >>> { > >>> struct arm_smccc_1_2_regs arg =3D { > >>> .a0 =3D FFA_MEM_SHARE_64, > >>> .a1 =3D tot_len, > >>> - .a2 =3D frag_len, > >>> - .a3 =3D addr, > >>> - .a4 =3D pg_count, > >>> + .a2 =3D tot_len, > >>> + .a3 =3D 0, > >>> + .a4 =3D 0, > >>> }; > >>> struct arm_smccc_1_2_regs resp; > >>> > >>> @@ -131,12 +129,16 @@ static int32_t ffa_mem_share(uint32_t tot_len, = uint32_t frag_len, > >>> } > >>> } > >>> > >>> -static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_h= i, > >>> - uint32_t flags) > >>> +static int32_t ffa_secure_reclaim(struct ffa_shm_mem *shm, uint32_t = flags) > >> > >> I agree with moving the uint64_to_regpair() call into this function, > >> but I'm puzzled by the new name. What's secure? > > > > This is to distinguish with reclaim for VM to VM sharing in the future = as here > > reclaim is asked to the secure world. > > > > But in fact to be coherent I should also have renamed ffa_mem_share to = ffa_secure_share. > > > > Would you be ok with that ? > > Looking at this a bit more, we are usually using spmc and not secure. > > Would you be ok if I rename both those to: > ffa_spmc_share > ffa_spmc_reclaim Yes, that sounds good. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MhZX64HhAePVtQiqy67OywHncaHYpTnE74WKLy8gSJvJIqfqwpQFeOEe9VDnSYzYOoLIkPK49HCQ2pjrax10RMTj9sTD1O3Dh3NAxoanhuIn5htT34fNAZQvViJquuWyIGNR5uAuSKPqB6Hafp/75ZZ5bDgYIVzxsT0FJqnteveqgf/zQScJNRCgTK+wB4f3o954/DJx1Nq9w/6uA7UKfmqRkGBhRj677wEC07N4hmP1D5JKlQiGKjSzaHQxDkn7eWljkZ6sokdDtHyRYhcjL2ShjwPAhd0kYz3M+UuJIjTLChulKQ6ZlqlLOgOSnGUwDOAuFPlPx4vhI+lVKKemZpK4DkbIQrKl5HMtdgQhLy16Lu622oag1NDRDFoGNzUzeD1z424xmjgMyaWXwOfVobWgl45wS0dTrhqYBwtIfZ+9ndNnHV26w694wEy1AUfq X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 15:24:29.4892 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 98931d58-d674-4b54-c127-08de67ef5181 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6728 On Mon Feb 9, 2026 at 3:48 PM CET, Jan Beulich wrote: > On 09.02.2026 11:31, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/Kconfig >> +++ b/xen/arch/x86/Kconfig >> @@ -146,6 +146,7 @@ config XEN_IBT >> config SHADOW_PAGING >> bool "Shadow Paging" >> default !PV_SHIM_EXCLUSIVE >> + select LOG_DIRTY >> depends on PV || HVM >> help > > Why would this be? IOW why would shadow imply log-dirty, but HAP wouldn't= ? The logic is rather opaque. I admit I'm a bit fuzzy on the uses of logdirty= . I know what it's for and I could navigate the code if a problem arose, but = I'm less clear about which other elements of the hypervisor rely on it (pod? ns= vm? vvmx? shadow? hap?). If it's strictly toolstack/DM-driven maybe it'd be more apt to have a separ= ate LIVE_MIGRATION and SAVE_RESTORE configs where LM selects SAVE_RESTORE, whic= h selects LOG_DIRTY. That's also improve some defaults auto-downgraded from t= he max policy just in case a VM is migrated. > >> @@ -166,6 +167,14 @@ config SHADOW_PAGING >> config PAGING >> def_bool HVM || SHADOW_PAGING >> =20 >> +config LOG_DIRTY > > PAGING_LOG_DIRTY? sure. > >> --- a/xen/arch/x86/domctl.c >> +++ b/xen/arch/x86/domctl.c >> @@ -220,15 +220,15 @@ long arch_do_domctl( >> { >> =20 >> case XEN_DOMCTL_shadow_op: >> -#ifdef CONFIG_PAGING >> + ret =3D -EOPNOTSUPP; >> + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) >> + break; >> + >> ret =3D paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); >> if ( ret =3D=3D -ERESTART ) >> return hypercall_create_continuation( >> __HYPERVISOR_paging_domctl_cont, "h", u_domctl); >> copyback =3D true; >> -#else >> - ret =3D -EOPNOTSUPP; >> -#endif >> break; > > Can a HVM-only hypervisor create any guests with this? I simply fail to > see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it through to > hap_domctl(). xl doesn't seem to call it at all. hap_set_allocation() is implicitly calle= d through paging_enable() -> hap_enable() -> hap_set_allocation() > >> --- a/xen/arch/x86/include/asm/domain.h >> +++ b/xen/arch/x86/include/asm/domain.h >> @@ -226,7 +226,9 @@ struct paging_domain { >> unsigned int p2m_pages; /* number of pages allocated = to p2m */ >> =20 >> /* log dirty support */ >> +#ifdef CONFIG_LOG_DIRTY >> struct log_dirty_domain log_dirty; >> +#endif /* CONFIG_LOG_DIRTY */ > > Such an #ifdef can likely replace the comment? Or else the comment would > better also live inside the #ifdef? true. > >> --- a/xen/arch/x86/include/asm/paging.h >> +++ b/xen/arch/x86/include/asm/paging.h >> @@ -55,12 +55,9 @@ >> #define PG_translate 0 >> #define PG_external 0 >> #endif >> -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) >> /* Enable log dirty mode */ >> -#define PG_log_dirty (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_s= hift) >> -#else >> -#define PG_log_dirty 0 >> -#endif >> +#define PG_log_dirty IS_ENABLED(CONFIG_LOG_DIRTY) * \ >> + (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_s= hift) > > Need wrapping in parentheses then. true. > >> --- a/xen/arch/x86/mm/hap/hap.c >> +++ b/xen/arch/x86/mm/hap/hap.c >> @@ -50,7 +50,7 @@ struct hap_dirty_vram { >> * calling p2m_log_dirty_range(), which interrogates each vram >> * page's p2m type looking for pages that have been made writable. >> */ >> - >> +#ifdef CONFIG_LOG_DIRTY > > This wants to move further up. sure > >> --- a/xen/include/hypercall-defs.c >> +++ b/xen/include/hypercall-defs.c >> @@ -194,7 +194,7 @@ dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op= _buf_t *bufs) >> #ifdef CONFIG_SYSCTL >> sysctl(xen_sysctl_t *u_sysctl) >> #endif >> -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV= _SHIM_EXCLUSIVE) >> +#if defined(CONFIG_LOG_DIRTY) >> paging_domctl_cont(xen_domctl_t *u_domctl) >> #endif >> #ifndef CONFIG_PV_SHIM_EXCLUSIVE >> @@ -292,7 +292,7 @@ dm_op compat do = compat do do >> hypfs_op do do do do = do >> #endif >> mca do do - - = - >> -#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV= _SHIM_EXCLUSIVE) >> +#if defined(CONFIG_LOG_DIRTY) >> paging_domctl_cont do do do do = - >> #endif > > The CONFIG_X86 part of the checking wants to remain: Another port may als= o gain > a setting of this name, without necessarily having this auxiliary hyperca= ll. Hmmm. Makes sense. > > Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:35:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:35:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225625.1532165 (Exim 4.92) (envelope-from ) id 1vpTIM-0002r2-N6; Mon, 09 Feb 2026 15:35:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225625.1532165; Mon, 09 Feb 2026 15:35:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTIM-0002qv-KN; Mon, 09 Feb 2026 15:35:26 +0000 Received: by outflank-mailman (input) for mailman id 1225625; Mon, 09 Feb 2026 15:35:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTIM-0002qp-8H for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2c3msWI7kbslzs8l2VTZfvv++dKmxL2WsykYg0YleI3P5IyZnJpf5IaYToB8i/R8yHB7m8knaW6e+4CySPfdcqtZ2ppsAkfbtPms8ZBxSZKn+zm7+Go7vPacrc0B9Wt2eJe6RaM9YQ5BIP0t5STUZ+V3pu01y58HrDLG6eVggOrP91/CO32K3BxvcCALP6ZLm3PlNOvNSQmwBNiQTTkq7+Gd2XUVVC+Faw0cTLy49kW2L9KqnwKHAd7aNCIaoybl5t48GfG+pQ/At8In8eCXroSLxxXFAsrNDHkfqMEzs/gl+zmXR4UwkYeKqrw6OVwCuHCHlEXPvOsArtyWnefs/2DtLTamBGUE7r0J902m25xUf0SbF+WHSHDvSnZfn34fHg2Ocum5pWSzb5S3offxzxPBDlAhPznK/aFOEMRtpJ1nr9NgyvTPd4Jc3wkwvZfo X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 15:35:12.5196 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cbadc5fe-5907-46c3-ff53-08de67f0d0c5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A4.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7987 On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monn=C3=A9 wrote: > On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: >> It only has 2 callers, both of which can be conditionally removed. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> I'd be ok conditionalising the else branch on... >>=20 >> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) >>=20 >> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-= alejandro.garciavallejo@amd.com >>=20 >> ... to avoid the danger of stale pointers, with required changes elsewhe= re so >> none.c is only compiled out in that case. >>=20 >> I'm not sure how much it matters seeing how they are all unreachable. >> --- >> xen/arch/x86/mm/Makefile | 2 +- >> xen/arch/x86/mm/paging.c | 4 +- >> xen/arch/x86/mm/shadow/Makefile | 4 -- >> xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- >> 4 files changed, 3 insertions(+), 84 deletions(-) >> delete mode 100644 xen/arch/x86/mm/shadow/none.c >>=20 >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile >> index 960f6e8409..066c4caff3 100644 >> --- a/xen/arch/x86/mm/Makefile >> +++ b/xen/arch/x86/mm/Makefile >> @@ -1,4 +1,4 @@ >> -obj-y +=3D shadow/ >> +obj-$(CONFIG_SHADOW_PAGING) +=3D shadow/ >> obj-$(CONFIG_HVM) +=3D hap/ >> =20 >> obj-$(CONFIG_ALTP2M) +=3D altp2m.o >> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c >> index 2396f81ad5..5f70254cec 100644 >> --- a/xen/arch/x86/mm/paging.c >> +++ b/xen/arch/x86/mm/paging.c >> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) >> */ >> if ( hap_enabled(d) ) >> hap_domain_init(d); >> - else >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >> rc =3D shadow_domain_init(d); > > If you want to go this route you will need to set rc =3D -EOPNOTSUPP; > prior to the `if ... else if` on the HVM case. Maybe this instead else rc =3D IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; And gate none.c on PV && !SHADOW_PAGING, which seems to be the only use. It's a lot easier to see the safety on the HVM-only case, particularly with= ... > is compiled out, and the toolstack has not specified the HAP flag at > domain creation you will end up with a domain that doesn't have the > paging operations initialized as paging_domain_init() would return 0 > with neither HAP nor shadow having been setup. That's likely to > trigger NULL pointer dereferences inside of Xen. > > Also, seeing the code in arch_sanitise_domain_config() we possibly > want to return an error at that point if toolstack attempts to create > an HVM guest without HAP enabled, and shadow is build time disabled. > I've sent a patch to that end. ... this patch you meantion. Thanks. I'm guessing it's still a hot potato in for non-shadow PV, which strongly h= ints at our being better off leaving it in that case. On HVM-only configurations= it seems rather silly. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:44:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:44:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225632.1532176 (Exim 4.92) (envelope-from ) id 1vpTRB-0004lc-G9; Mon, 09 Feb 2026 15:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225632.1532176; Mon, 09 Feb 2026 15:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTRB-0004lV-DJ; Mon, 09 Feb 2026 15:44:33 +0000 Received: by outflank-mailman (input) for mailman id 1225632; Mon, 09 Feb 2026 15:44:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTRA-0004lP-LY for xen-devel@lists.xenproject.org; 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Isn't HAP equally dependent on it? Oh, I see, You adjust HAP code to deal with the !CONFIG_LOG_DIRTY scenario, but not the SHADOW counterpart, that still has a hard dependency on LOG_DIRTY being enabled. > depends on PV || HVM > help > > @@ -166,6 +167,14 @@ config SHADOW_PAGING > config PAGING > def_bool HVM || SHADOW_PAGING > > +config LOG_DIRTY > + bool "Log-dirty page tracking" if EXPERT > + depends on PAGING > + default !PV_SHIM_EXCLUSIVE > + help > + Enable log-dirty infrastructure so Xen can track domain memory writes and > + the dirty state of VRAM for device models and live migrations. > + > config BIGMEM > bool "big memory support" > default n > diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c > index d9521808dc..61d43a21d0 100644 > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c > @@ -220,15 +220,15 @@ long arch_do_domctl( > { > > case XEN_DOMCTL_shadow_op: > -#ifdef CONFIG_PAGING > + ret = -EOPNOTSUPP; > + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) > + break; > + > ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); > if ( ret == -ERESTART ) > return hypercall_create_continuation( > __HYPERVISOR_paging_domctl_cont, "h", u_domctl); > copyback = true; > -#else > - ret = -EOPNOTSUPP; > -#endif > break; > > case XEN_DOMCTL_ioport_permission: > diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c > index 3b53471af0..94216aecc2 100644 > --- a/xen/arch/x86/hvm/dm.c > +++ b/xen/arch/x86/hvm/dm.c > @@ -48,6 +48,9 @@ static int track_dirty_vram(struct domain *d, xen_pfn_t first_pfn, > unsigned int nr_frames, > const struct xen_dm_op_buf *buf) > { > + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) > + return -EOPNOTSUPP; > + > if ( nr_frames > (GB(1) >> PAGE_SHIFT) ) > return -EINVAL; > > diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h > index 94b0cf7f1d..f09c13909f 100644 > --- a/xen/arch/x86/include/asm/domain.h > +++ b/xen/arch/x86/include/asm/domain.h > @@ -226,7 +226,9 @@ struct paging_domain { > unsigned int p2m_pages; /* number of pages allocated to p2m */ > > /* log dirty support */ > +#ifdef CONFIG_LOG_DIRTY > struct log_dirty_domain log_dirty; > +#endif /* CONFIG_LOG_DIRTY */ Can also ifdef out the declaration of the log_dirty_domain struct, and just provide a forward pointer declaration for it? Would that satisfy the paging_log_dirty_init() prototype? Hm, I guess that won't work with the usage in hap_domain_init(). > /* preemption handling */ > struct { > diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h > index 9016e88411..3c2dcacfa5 100644 > --- a/xen/arch/x86/include/asm/p2m.h > +++ b/xen/arch/x86/include/asm/p2m.h > @@ -253,9 +253,11 @@ struct p2m_domain { > bool *sve); > int (*recalc)(struct p2m_domain *p2m, > unsigned long gfn); > +#ifdef CONFIG_LOG_DIRTY > void (*enable_hardware_log_dirty)(struct p2m_domain *p2m); > void (*disable_hardware_log_dirty)(struct p2m_domain *p2m); > void (*flush_hardware_cached_dirty)(struct p2m_domain *p2m); > +#endif /* CONFIG_LOG_DIRTY */ Will this build when VMX is enabled? I think it's missing an adjustment to ept_p2m_init() to not initialize those fields if !CONFIG_LOG_DIRTY. > void (*change_entry_type_global)(struct p2m_domain *p2m, > p2m_type_t ot, > p2m_type_t nt); > diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h > index 291ab386e8..980cdfa455 100644 > --- a/xen/arch/x86/include/asm/paging.h > +++ b/xen/arch/x86/include/asm/paging.h > @@ -55,12 +55,9 @@ > #define PG_translate 0 > #define PG_external 0 > #endif > -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) > /* Enable log dirty mode */ > -#define PG_log_dirty (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) > -#else > -#define PG_log_dirty 0 > -#endif > +#define PG_log_dirty IS_ENABLED(CONFIG_LOG_DIRTY) * \ > + (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift) You want an extra set of parentheses around this define I think, just in case. Quite a lot of the code is also protected using #if PG_log_dirty. I think if you introduce a CONFIG_LOG_DIRTY it would best to also guard the logdirty code using that new define, so it's consistent (iow: replace `#if PG_log_dirty` and similar usages). > > /* All paging modes. */ > #define PG_MASK (PG_refcounts | PG_log_dirty | PG_translate | PG_external) > @@ -174,6 +171,7 @@ static inline void paging_log_dirty_init(struct domain *d, > const struct log_dirty_ops *ops) {} > static inline void paging_mark_dirty(struct domain *d, mfn_t gmfn) {} > static inline void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) {} > +static inline void paging_mark_pfn_clean(struct domain *d, pfn_t pfn) {} > static inline bool paging_mfn_is_dirty(struct domain *d, mfn_t gmfn) { return false; } > > #endif /* PG_log_dirty */ > diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c > index a337752bf4..21672db011 100644 > --- a/xen/arch/x86/mm/hap/hap.c > +++ b/xen/arch/x86/mm/hap/hap.c > @@ -50,7 +50,7 @@ struct hap_dirty_vram { > * calling p2m_log_dirty_range(), which interrogates each vram > * page's p2m type looking for pages that have been made writable. > */ > - > +#ifdef CONFIG_LOG_DIRTY Nit: I would leave the newline as-is. > int hap_track_dirty_vram(struct domain *d, > unsigned long begin_pfn, > unsigned int nr_frames, > @@ -161,6 +161,7 @@ out: > > return rc; > } > +#endif /* CONFIG_LOG_DIRTY */ > > /************************************************/ > /* HAP LOG DIRTY SUPPORT */ > @@ -440,14 +441,17 @@ static bool cf_check flush_tlb(const unsigned long *vcpu_bitmap); > > void hap_domain_init(struct domain *d) > { > - static const struct log_dirty_ops hap_ops = { > - .enable = hap_enable_log_dirty, > - .disable = hap_disable_log_dirty, > - .clean = hap_clean_dirty_bitmap, > - }; > - > - /* Use HAP logdirty mechanism. */ > - paging_log_dirty_init(d, &hap_ops); > + if ( IS_ENABLED(CONFIG_LOG_DIRTY) ) > + { > + static const struct log_dirty_ops hap_ops = { > + .enable = hap_enable_log_dirty, > + .disable = hap_disable_log_dirty, > + .clean = hap_clean_dirty_bitmap, > + }; > + > + /* Use HAP logdirty mechanism. */ > + paging_log_dirty_init(d, &hap_ops); > + } > > d->arch.paging.update_paging_modes = hap_update_paging_modes; > d->arch.paging.flush_tlb = flush_tlb; > diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c > index e915da26a8..373382c28c 100644 > --- a/xen/arch/x86/mm/p2m.c > +++ b/xen/arch/x86/mm/p2m.c > @@ -236,6 +236,7 @@ struct ioreq_server *p2m_get_ioreq_server(struct domain *d, > return s; > } > > +#ifdef CONFIG_LOG_DIRTY > void p2m_enable_hardware_log_dirty(struct domain *d) > { > struct p2m_domain *p2m = p2m_get_hostp2m(d); > @@ -263,6 +264,7 @@ void p2m_flush_hardware_cached_dirty(struct domain *d) > p2m_unlock(p2m); > } > } > +#endif /* CONFIG_LOG_DIRTY */ > > /* > * Force a synchronous P2M TLB flush if a deferred flush is pending. > diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c > index 2396f81ad5..13ee137db9 100644 > --- a/xen/arch/x86/mm/paging.c > +++ b/xen/arch/x86/mm/paging.c > @@ -623,10 +623,12 @@ int paging_domain_init(struct domain *d) > INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist); > mm_lock_init(&d->arch.paging.lock); > > +#ifdef CONFIG_LOG_DIRTY > /* This must be initialized separately from the rest of the > * log-dirty init code as that can be called more than once and we > * don't want to leak any active log-dirty bitmaps */ > d->arch.paging.log_dirty.top = INVALID_MFN; > +#endif /* CONFIG_LOG_DIRTY */ Could you possibly init this field from paging_log_dirty_init()? As to avoid having more ifdef churn in paging_domain_init(). Thanks, Roger. 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Mon, 09 Feb 2026 07:55:56 -0800 (PST) Message-ID: <1c33beef-f638-4e62-b38a-8b79575adf18@suse.com> Date: Mon, 9 Feb 2026 16:55:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: Add Kconfig option for log-dirty tracking To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260209103118.5885-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 16:24, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 3:48 PM CET, Jan Beulich wrote: >> On 09.02.2026 11:31, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/Kconfig >>> +++ b/xen/arch/x86/Kconfig >>> @@ -146,6 +146,7 @@ config XEN_IBT >>> config SHADOW_PAGING >>> bool "Shadow Paging" >>> default !PV_SHIM_EXCLUSIVE >>> + select LOG_DIRTY >>> depends on PV || HVM >>> help >> >> Why would this be? IOW why would shadow imply log-dirty, but HAP wouldn't? > > The logic is rather opaque. I admit I'm a bit fuzzy on the uses of logdirty. > > I know what it's for and I could navigate the code if a problem arose, but I'm > less clear about which other elements of the hypervisor rely on it (pod? nsvm? > vvmx? shadow? hap?). > > If it's strictly toolstack/DM-driven maybe it'd be more apt to have a separate > LIVE_MIGRATION and SAVE_RESTORE configs where LM selects SAVE_RESTORE, which > selects LOG_DIRTY. That's also improve some defaults auto-downgraded from the > max policy just in case a VM is migrated. It's save (not restore) for both PV and HVM, and VRAM dirty tracking for HVM only. Ordinary HVM guests will want VRAM tracking, so compiling out support for it will imo want mentioning in the Kconfig help text. >>> --- a/xen/arch/x86/domctl.c >>> +++ b/xen/arch/x86/domctl.c >>> @@ -220,15 +220,15 @@ long arch_do_domctl( >>> { >>> >>> case XEN_DOMCTL_shadow_op: >>> -#ifdef CONFIG_PAGING >>> + ret = -EOPNOTSUPP; >>> + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) >>> + break; >>> + >>> ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); >>> if ( ret == -ERESTART ) >>> return hypercall_create_continuation( >>> __HYPERVISOR_paging_domctl_cont, "h", u_domctl); >>> copyback = true; >>> -#else >>> - ret = -EOPNOTSUPP; >>> -#endif >>> break; >> >> Can a HVM-only hypervisor create any guests with this? I simply fail to >> see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it through to >> hap_domctl(). > > xl doesn't seem to call it at all. hap_set_allocation() is implicitly called > through paging_enable() -> hap_enable() -> hap_set_allocation() xl must be calling it, at least in the case where the paging pool size is explicitly set in the guest config. The important point is - not all of XEN_DOMCTL_shadow_op's sub-ops are log-dirty related. It's also odd that you did make changes at the call site here, but then left the called function (and its sibling paging_domctl_cont()) in place. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 15:56:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 15:56:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225641.1532187 (Exim 4.92) (envelope-from ) id 1vpTcK-0006iZ-KE; Mon, 09 Feb 2026 15:56:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225641.1532187; Mon, 09 Feb 2026 15:56:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTcK-0006iS-Fm; Mon, 09 Feb 2026 15:56:04 +0000 Received: by outflank-mailman (input) for mailman id 1225641; Mon, 09 Feb 2026 15:56:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTcJ-0006iM-Gl for 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action=none header.from=citrix.com; Date: Mon, 9 Feb 2026 16:55:52 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Alejandro Vallejo Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Tim Deegan Subject: Re: [PATCH] x86/shadow: Delete the none.c dummy file Message-ID: References: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: MA2P292CA0016.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250::14) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|CH8PR03MB8299:EE_ X-MS-Office365-Filtering-Correlation-Id: 1c644381-f4e0-41d2-7205-08de67f3b548 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016|7053199007; X-Microsoft-Antispam-Message-Info: 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X-MS-Exchange-CrossTenant-Network-Message-Id: 1c644381-f4e0-41d2-7205-08de67f3b548 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 15:55:55.2850 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iX12jkt2lcL90StL+iLRgjHcGjRQKGelXaE1b7YWJlDDBtGswurO3+g7ywO+FCF6w3FtErgnW7ONL4aEHNH1wA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR03MB8299 On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monné wrote: > > On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: > >> It only has 2 callers, both of which can be conditionally removed. > >> > >> Signed-off-by: Alejandro Vallejo > >> --- > >> I'd be ok conditionalising the else branch on... > >> > >> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) > >> > >> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com > >> > >> ... to avoid the danger of stale pointers, with required changes elsewhere so > >> none.c is only compiled out in that case. > >> > >> I'm not sure how much it matters seeing how they are all unreachable. > >> --- > >> xen/arch/x86/mm/Makefile | 2 +- > >> xen/arch/x86/mm/paging.c | 4 +- > >> xen/arch/x86/mm/shadow/Makefile | 4 -- > >> xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- > >> 4 files changed, 3 insertions(+), 84 deletions(-) > >> delete mode 100644 xen/arch/x86/mm/shadow/none.c > >> > >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > >> index 960f6e8409..066c4caff3 100644 > >> --- a/xen/arch/x86/mm/Makefile > >> +++ b/xen/arch/x86/mm/Makefile > >> @@ -1,4 +1,4 @@ > >> -obj-y += shadow/ > >> +obj-$(CONFIG_SHADOW_PAGING) += shadow/ > >> obj-$(CONFIG_HVM) += hap/ > >> > >> obj-$(CONFIG_ALTP2M) += altp2m.o > >> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c > >> index 2396f81ad5..5f70254cec 100644 > >> --- a/xen/arch/x86/mm/paging.c > >> +++ b/xen/arch/x86/mm/paging.c > >> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) > >> */ > >> if ( hap_enabled(d) ) > >> hap_domain_init(d); > >> - else > >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > >> rc = shadow_domain_init(d); > > > > If you want to go this route you will need to set rc = -EOPNOTSUPP; > > prior to the `if ... else if` on the HVM case. > > Maybe this instead > > else > rc = IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; But even for the PV case we cannot call shadow_domain_init() if shadow is compiled out? I think you want: if ( hap_enabled(d) ) hap_domain_init(d); else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) rc = shadow_domain_init(d); else rc = is_hvm_domain(d) ? -EOPNOTSUPP : 0; > And gate none.c on PV && !SHADOW_PAGING, which seems to be the only use. > > It's a lot easier to see the safety on the HVM-only case, particularly with... > > > is compiled out, and the toolstack has not specified the HAP flag at > > domain creation you will end up with a domain that doesn't have the > > paging operations initialized as paging_domain_init() would return 0 > > with neither HAP nor shadow having been setup. That's likely to > > trigger NULL pointer dereferences inside of Xen. > > > > Also, seeing the code in arch_sanitise_domain_config() we possibly > > want to return an error at that point if toolstack attempts to create > > an HVM guest without HAP enabled, and shadow is build time disabled. > > I've sent a patch to that end. > > ... this patch you meantion. Thanks. > > I'm guessing it's still a hot potato in for non-shadow PV, which strongly hints > at our being better off leaving it in that case. On HVM-only configurations it > seems rather silly. I'm not sure I follow exactly what you mean. Some rants below which might or might not be along the lines of what you suggest. PV needs shadow for migration. HVM can use shadow or HAP, and our default is HAP. For HVM only builds it could be possible to not recommend enabling shadow. Even for deployments where only dom0 is using PV mode, it does still make sense to possible recommend not enabling shadow for attack surface reduction. Thanks, Roger. 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Mon, 09 Feb 2026 07:58:59 -0800 (PST) MIME-Version: 1.0 References: <1A922065-D0DC-4930-806C-6C202B5A6957@arm.com> In-Reply-To: <1A922065-D0DC-4930-806C-6C202B5A6957@arm.com> From: Jens Wiklander Date: Mon, 9 Feb 2026 16:58:48 +0100 X-Gm-Features: AZwV_Qhc75scEaEIUlr-5KEopBKl8tD2-FV-XKlqVTAhyFrwLnljNOG3GWxGjn4 Message-ID: Subject: Re: [PATCH 04/12] xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Mon, Feb 9, 2026 at 3:50=E2=80=AFPM Bertrand Marquis wrote: > > Hi Jens, > > > On 9 Feb 2026, at 11:57, Jens Wiklander wro= te: > > > > Hi Bertrand, > > > > On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis > > wrote: > >> > >> FF-A 1.2 extends the endpoint memory access descriptor (EMAD) from > >> 16 to 32 bytes, adding implementation-defined (IMPDEF) fields and > >> reserved space. The MEM_SHARE path currently assumes the 1.1 EMAD > >> size and rejects the 1.2 layout. > >> > >> Add FF-A 1.2 EMAD support to MEM_SHARE: > >> - define ffa_mem_access_1_2 and store IMPDEF payload in ffa_shm_mem > >> - emit 1.2 EMADs to the SPMC for FF-A 1.2 guests, forwarding IMPDEF > >> - refactor header parsing into read_mem_transaction() for 1.0/1.1+ > >> - detect EMAD format by mem_access_size to allow 1.1 on 1.2 guests > >> > >> Functional impact: MEM_SHARE supports FF-A 1.2 EMADs. > >> > >> Signed-off-by: Bertrand Marquis > >> --- > >> xen/arch/arm/tee/ffa_shm.c | 108 +++++++++++++++++++++++++++++-------- > >> 1 file changed, 86 insertions(+), 22 deletions(-) > >> > >> diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > >> index 4c0b45cde6ee..905a64e3db01 100644 > >> --- a/xen/arch/arm/tee/ffa_shm.c > >> +++ b/xen/arch/arm/tee/ffa_shm.c > >> @@ -30,6 +30,14 @@ struct ffa_mem_access { > >> uint64_t reserved; > >> }; > >> > >> +/* Endpoint memory access descriptor (FF-A 1.2) */ > >> +struct ffa_mem_access_1_2 { > >> + struct ffa_mem_access_perm access_perm; > >> + uint32_t region_offs; > >> + uint8_t impdef[16]; > >> + uint8_t reserved[8]; > >> +}; > >> + > >> /* Lend, donate or share memory transaction descriptor */ > >> struct ffa_mem_transaction_1_0 { > >> uint16_t sender_id; > >> @@ -73,7 +81,7 @@ struct ffa_mem_transaction_1_1 { > >> /* > >> * The parts needed from struct ffa_mem_transaction_1_0 or struct > >> * ffa_mem_transaction_1_1, used to provide an abstraction of differen= ce in > >> - * data structures between version 1.0 and 1.1. This is just an inter= nal > >> + * data structures between version 1.0 and 1.2. This is just an inter= nal > >> * interface and can be changed without changing any ABI. > >> */ > >> struct ffa_mem_transaction_int { > >> @@ -92,6 +100,8 @@ struct ffa_shm_mem { > >> uint16_t sender_id; > >> uint16_t ep_id; /* endpoint, the one lending */ > >> uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ > >> + /* Endpoint memory access descriptor IMPDEF value (FF-A 1.2). */ > >> + uint64_t impdef[2]; > >> unsigned int page_count; > >> struct page_info *pages[]; > >> }; > >> @@ -297,17 +307,21 @@ static void init_range(struct ffa_address_range = *addr_range, > >> * This function uses the ffa_spmc tx buffer to transmit the memory tr= ansaction > >> * descriptor. > >> */ > >> -static int share_shm(struct ffa_shm_mem *shm) > >> +static int share_shm(struct ffa_shm_mem *shm, uint32_t ffa_vers) > >> { > >> const uint32_t max_frag_len =3D FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZ= E; > >> struct ffa_mem_access *mem_access_array; > >> + struct ffa_mem_access_1_2 *mem_access_array_1_2; > >> struct ffa_mem_transaction_1_1 *descr; > >> struct ffa_address_range *addr_range; > >> struct ffa_mem_region *region_descr; > >> - const unsigned int region_count =3D 1; > >> uint32_t frag_len; > >> uint32_t tot_len; > >> + uint32_t mem_access_size; > >> + uint32_t mem_access_offs; > >> + uint32_t region_offs; > >> paddr_t last_pa; > >> + uint32_t range_count; > >> unsigned int n; > >> paddr_t pa; > >> int32_t ret; > >> @@ -326,16 +340,35 @@ static int share_shm(struct ffa_shm_mem *shm) > >> descr->handle =3D shm->handle; > >> descr->mem_reg_attr =3D FFA_NORMAL_MEM_REG_ATTR; > >> descr->mem_access_count =3D 1; > >> - descr->mem_access_size =3D sizeof(*mem_access_array); > >> - descr->mem_access_offs =3D MEM_ACCESS_OFFSET(0); > >> + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > >> + mem_access_size =3D sizeof(struct ffa_mem_access_1_2); > >> + else > >> + mem_access_size =3D sizeof(struct ffa_mem_access); > >> + mem_access_offs =3D sizeof(struct ffa_mem_transaction_1_1); > >> + region_offs =3D mem_access_offs + mem_access_size; > >> + descr->mem_access_size =3D mem_access_size; > >> + descr->mem_access_offs =3D mem_access_offs; > >> > >> - mem_access_array =3D buf + descr->mem_access_offs; > >> - memset(mem_access_array, 0, sizeof(*mem_access_array)); > >> - mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > >> - mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > >> - mem_access_array[0].region_offs =3D REGION_OFFSET(descr->mem_acce= ss_count, 0); > >> + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > >> + { > >> + mem_access_array_1_2 =3D buf + mem_access_offs; > >> + memset(mem_access_array_1_2, 0, sizeof(*mem_access_array_1_2)= ); > >> + mem_access_array_1_2[0].access_perm.endpoint_id =3D shm->ep_i= d; > >> + mem_access_array_1_2[0].access_perm.perm =3D FFA_MEM_ACC_RW; > >> + mem_access_array_1_2[0].region_offs =3D region_offs; > >> + memcpy(mem_access_array_1_2[0].impdef, shm->impdef, > >> + sizeof(mem_access_array_1_2[0].impdef)); > >> + } > >> + else > >> + { > >> + mem_access_array =3D buf + mem_access_offs; > >> + memset(mem_access_array, 0, sizeof(*mem_access_array)); > >> + mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > >> + mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > >> + mem_access_array[0].region_offs =3D region_offs; > >> + } > >> > >> - region_descr =3D buf + mem_access_array[0].region_offs; > >> + region_descr =3D buf + region_offs; > >> memset(region_descr, 0, sizeof(*region_descr)); > >> region_descr->total_page_count =3D shm->page_count; > >> > >> @@ -349,8 +382,9 @@ static int share_shm(struct ffa_shm_mem *shm) > >> region_descr->address_range_count++; > >> } > >> > >> - tot_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_cou= nt, > >> - region_descr->address_range_count); > > > > Please remove the unused ADDR_RANGE_OFFSET() macro and friends, as > > they're no longer accurate. > > Very true, will remove them in v2. > > > > >> + range_count =3D region_descr->address_range_count; > >> + tot_len =3D region_offs + sizeof(*region_descr) + > >> + range_count * sizeof(struct ffa_address_range); > >> if ( tot_len > max_frag_len ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> @@ -358,7 +392,7 @@ static int share_shm(struct ffa_shm_mem *shm) > >> } > >> > >> addr_range =3D region_descr->address_range_array; > >> - frag_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_co= unt, 1); > >> + frag_len =3D region_offs + sizeof(*region_descr) + sizeof(*addr_r= ange); > >> last_pa =3D page_to_maddr(shm->pages[0]); > >> init_range(addr_range, last_pa); > >> for ( n =3D 1; n < shm->page_count; last_pa =3D pa, n++ ) > >> @@ -448,6 +482,12 @@ static int read_mem_transaction(uint32_t ffa_vers= , const void *buf, size_t blen, > >> if ( size * count + offs > blen ) > >> return FFA_RET_INVALID_PARAMETERS; > >> > >> + if ( size < sizeof(struct ffa_mem_access) ) > >> + return FFA_RET_INVALID_PARAMETERS; > > > > Implicitly, size should also be a multiple of 16. Don't you agree? > > The spec is giving some constraints on the offset but there is nothing ex= plicit for the > per mem access size. As we have no 64bit fields in it, I am not really se= eing any > implicit multiple of 16. I was perhaps assuming too much. The offset is required to be a multiple of 16, so it would make sense for all elements in the array to be at a 16-byte aligned offset. > > I am checking the offset because it is enforced by the spec but for the s= ize i would > rather not put something as who knows what might be added in the future. It's not important right now, since we only accept a single EMAD. But once we accept more than one, the second EMAD might be accessed from an unaligned address if we're not careful. > > > > >> + > >> + if ( offs & 0xF ) > >> + return FFA_RET_INVALID_PARAMETERS; > >> + > >> trans->mem_reg_attr =3D mem_reg_attr; > >> trans->flags =3D flags; > >> trans->mem_access_size =3D size; > >> @@ -464,7 +504,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *re= gs) > >> uint64_t addr =3D get_user_reg(regs, 3); > >> uint32_t page_count =3D get_user_reg(regs, 4); > >> const struct ffa_mem_region *region_descr; > >> - const struct ffa_mem_access *mem_access; > >> + const struct ffa_mem_access_1_2 *mem_access; > >> struct ffa_mem_transaction_int trans; > >> struct domain *d =3D current->domain; > >> struct ffa_ctx *ctx =3D d->arch.tee; > >> @@ -474,9 +514,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *r= egs) > >> register_t handle_hi =3D 0; > >> register_t handle_lo =3D 0; > >> int ret =3D FFA_RET_DENIED; > >> + uint32_t ffa_vers; > >> uint32_t range_count; > >> uint32_t region_offs; > >> uint16_t dst_id; > >> + uint8_t perm; > >> + uint64_t impdef[2]; > >> > >> if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) > >> { > >> @@ -515,8 +558,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *re= gs) > >> if ( frag_len > tx_size ) > >> goto out_unlock; > >> > >> - ret =3D read_mem_transaction(ACCESS_ONCE(ctx->guest_vers), tx_buf= , > >> - frag_len, &trans); > >> + ffa_vers =3D ACCESS_ONCE(ctx->guest_vers); > >> + ret =3D read_mem_transaction(ffa_vers, tx_buf, frag_len, &trans); > >> if ( ret ) > >> goto out_unlock; > >> > >> @@ -545,13 +588,35 @@ void ffa_handle_mem_share(struct cpu_user_regs *= regs) > >> goto out_unlock; > >> } > >> > >> + if ( trans.mem_access_size < sizeof(struct ffa_mem_access) ) > >> + { > >> + ret =3D FFA_RET_INVALID_PARAMETERS; > >> + goto out_unlock; > >> + } > >> + > >> /* Check that it fits in the supplied data */ > >> if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) > >> goto out_unlock; > >> > >> mem_access =3D tx_buf + trans.mem_access_offs; > >> - > >> dst_id =3D ACCESS_ONCE(mem_access->access_perm.endpoint_id); > >> + perm =3D ACCESS_ONCE(mem_access->access_perm.perm); > >> + region_offs =3D ACCESS_ONCE(mem_access->region_offs); > >> + > >> + /* > >> + * FF-A 1.2 introduced an extended mem_access descriptor with imp= def > >> + * fields, but guests can still use the 1.1 format if they don't = need > >> + * implementation-defined data. Detect which format is used based= on > >> + * the mem_access_size field rather than the negotiated FF-A vers= ion. > >> + */ > >> + if ( trans.mem_access_size >=3D sizeof(struct ffa_mem_access_1_2)= ) > >> + memcpy(impdef, mem_access->impdef, sizeof(impdef)); > >> + else > >> + { > >> + impdef[0] =3D 0; > >> + impdef[1] =3D 0; > >> + } > >> + > >> if ( !FFA_ID_IS_SECURE(dst_id) ) > >> { > >> /* we do not support sharing with VMs */ > >> @@ -559,13 +624,11 @@ void ffa_handle_mem_share(struct cpu_user_regs *= regs) > >> goto out_unlock; > >> } > >> > >> - if ( ACCESS_ONCE(mem_access->access_perm.perm) !=3D FFA_MEM_ACC_R= W ) > >> + if ( perm !=3D FFA_MEM_ACC_RW ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> goto out_unlock; > >> } > >> - > >> - region_offs =3D ACCESS_ONCE(mem_access->region_offs); > >> if ( sizeof(*region_descr) + region_offs > frag_len ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> @@ -590,6 +653,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *re= gs) > >> } > >> shm->sender_id =3D trans.sender_id; > >> shm->ep_id =3D dst_id; > >> + memcpy(shm->impdef, impdef, sizeof(shm->impdef)); > >> > >> /* > >> * Check that the Composite memory region descriptor fits. > >> @@ -605,7 +669,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *re= gs) > >> if ( ret ) > >> goto out; > >> > >> - ret =3D share_shm(shm); > >> + ret =3D share_shm(shm, ffa_vers); > > > > Shouldn't we rather use ffa_fw_version? > > Definitely yes. > > In fact i have done this in a follow up patch and i need to export the fw= version to be able to > do that but I will bring that forward and do it here, that makes a lot mo= re sense. Sounds good. Cheers, Jens > > Cheers > Bertrand > > > > > Cheers, > > Jens > > > >> if ( ret ) > >> goto out; > >> > >> -- > >> 2.50.1 (Apple Git-155) > > From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:00:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:00:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225661.1532216 (Exim 4.92) (envelope-from ) id 1vpTgX-0001S8-MZ; Mon, 09 Feb 2026 16:00:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225661.1532216; Mon, 09 Feb 2026 16:00:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTgX-0001S1-ID; Mon, 09 Feb 2026 16:00:25 +0000 Received: by outflank-mailman (input) for mailman id 1225661; Mon, 09 Feb 2026 16:00:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTgW-0001Ru-TY for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:00:24 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 70916f8d-05d0-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:00:22 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-436e87589e8so1322212f8f.3 for ; Mon, 09 Feb 2026 08:00:22 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 08:00:21 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 17:00:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: Add Kconfig option for log-dirty tracking To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo References: <20260209103118.5885-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 16:44, Roger Pau Monné wrote: > On Mon, Feb 09, 2026 at 11:31:15AM +0100, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/mm/paging.c >> +++ b/xen/arch/x86/mm/paging.c >> @@ -623,10 +623,12 @@ int paging_domain_init(struct domain *d) >> INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist); >> mm_lock_init(&d->arch.paging.lock); >> >> +#ifdef CONFIG_LOG_DIRTY >> /* This must be initialized separately from the rest of the >> * log-dirty init code as that can be called more than once and we >> * don't want to leak any active log-dirty bitmaps */ >> d->arch.paging.log_dirty.top = INVALID_MFN; >> +#endif /* CONFIG_LOG_DIRTY */ > > Could you possibly init this field from paging_log_dirty_init()? As > to avoid having more ifdef churn in paging_domain_init(). Hmm, I was wondering the same, but then trusted the comment. Looks like it may be stale, though. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: tZz0Rm3FdDOUoRSYIJ6N2uYD4preNhPZ+ro9vN/nYfS1hJvcHdYbqwZDrXzcU2pCKyouJDPuYPrjkmukG13XEFRm/NIo/PFQTBelunPfse0TBs8MR4c/+ACq2ThL9Y+yrRH9n1h7n9L3jdVTGswVg0QBWQdnfzZI1xmNVfSNIqTt5e742Evmg4wqPY1NiWv0Hqo8n6zoq9ja6EFheRVKYTeSiIMya3k1ZlVbhPMFZx2ZijKDnCTo9rKbywsXD1v5tLQsBm5JJ9zcysEGJW02Ued3IxR5jsOxoFr/Ah7N/mK5SHheuHRC+nj++sk+939DR/8iHdxeBMEDx+NgMKOr2W00JHDy3Xo2qOSLs7p0GSCiScd5pUIc7/8kCiIRpuCLP8MYIlh9ZUaA8UNr055kYVN8Kzahxrp4TocX2NjrB3abdCu8lMqWgu1hoCCUhz4f X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 16:02:30.2201 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71cf577b-4d1a-4aec-52e7-08de67f4a0eb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029927.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6042 On Mon Feb 9, 2026 at 3:40 PM CET, Roger Pau Monne wrote: > If shadow paging has been compiled out short circuit the creation of HVM > guests that attempt to use shadow paging at arch_sanitise_domain_config()= . > There's no need to further build the domain when creation is doomed to fa= il > later on. > > Signed-off-by: Roger Pau Monn=C3=A9 > --- > xen/arch/x86/domain.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index 8b2f33f1a06c..8eb1509782ef 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -627,6 +627,12 @@ int arch_sanitise_domain_config(struct xen_domctl_cr= eatedomain *config) > return -EINVAL; > } > =20 > + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) > + { > + dprintk(XENLOG_INFO, "Shadow paging requested but not available\= n"); nit: s/requested/required/, maybe? Also, with this in place can't we get rid of the panic in create_dom0() tha= t checks an identical condition? Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:04:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:04:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225681.1532241 (Exim 4.92) (envelope-from ) id 1vpTkv-0002ln-Ej; Mon, 09 Feb 2026 16:04:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225681.1532241; Mon, 09 Feb 2026 16:04:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTkv-0002lg-By; Mon, 09 Feb 2026 16:04:57 +0000 Received: by outflank-mailman (input) for mailman id 1225681; Mon, 09 Feb 2026 16:04:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpTkt-0002lZ-M2 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:04:55 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 12ca6861-05d1-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:04:54 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-43284ed32a0so3137599f8f.3 for ; Mon, 09 Feb 2026 08:04:54 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 08:04:54 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 17:04:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: Delete the none.c dummy file To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Tim Deegan , Alejandro Vallejo References: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 16:55, Roger Pau Monné wrote: > On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monné wrote: >>> On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: >>>> It only has 2 callers, both of which can be conditionally removed. >>>> >>>> Signed-off-by: Alejandro Vallejo >>>> --- >>>> I'd be ok conditionalising the else branch on... >>>> >>>> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) >>>> >>>> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com >>>> >>>> ... to avoid the danger of stale pointers, with required changes elsewhere so >>>> none.c is only compiled out in that case. >>>> >>>> I'm not sure how much it matters seeing how they are all unreachable. >>>> --- >>>> xen/arch/x86/mm/Makefile | 2 +- >>>> xen/arch/x86/mm/paging.c | 4 +- >>>> xen/arch/x86/mm/shadow/Makefile | 4 -- >>>> xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- >>>> 4 files changed, 3 insertions(+), 84 deletions(-) >>>> delete mode 100644 xen/arch/x86/mm/shadow/none.c >>>> >>>> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile >>>> index 960f6e8409..066c4caff3 100644 >>>> --- a/xen/arch/x86/mm/Makefile >>>> +++ b/xen/arch/x86/mm/Makefile >>>> @@ -1,4 +1,4 @@ >>>> -obj-y += shadow/ >>>> +obj-$(CONFIG_SHADOW_PAGING) += shadow/ >>>> obj-$(CONFIG_HVM) += hap/ >>>> >>>> obj-$(CONFIG_ALTP2M) += altp2m.o >>>> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c >>>> index 2396f81ad5..5f70254cec 100644 >>>> --- a/xen/arch/x86/mm/paging.c >>>> +++ b/xen/arch/x86/mm/paging.c >>>> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) >>>> */ >>>> if ( hap_enabled(d) ) >>>> hap_domain_init(d); >>>> - else >>>> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >>>> rc = shadow_domain_init(d); >>> >>> If you want to go this route you will need to set rc = -EOPNOTSUPP; >>> prior to the `if ... else if` on the HVM case. >> >> Maybe this instead >> >> else >> rc = IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; > > But even for the PV case we cannot call shadow_domain_init() if shadow > is compiled out? I think you want: > > if ( hap_enabled(d) ) > hap_domain_init(d); > else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > rc = shadow_domain_init(d); > else > rc = is_hvm_domain(d) ? -EOPNOTSUPP : 0; Wouldn't this still leave NULL pointers in places where they can be rather dangerous with PV guests? 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> > } > > > > + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) > > + { > > + dprintk(XENLOG_INFO, "Shadow paging requested but not available\n"); > > nit: s/requested/required/, maybe? The wording matches the rest of the messages in arch_sanitise_domain_config(). I'm not saying that makes it correct, but if we word this differently we should also change the others IMO. > Also, with this in place can't we get rid of the panic in create_dom0() that > checks an identical condition? Hm, I would possibly leave that one, as I think it's clearer for the dom0 case. Otherwise someone using a build without HAP or shadow and attempting to boot in PVH mode will get a message saying: "Shadow paging requested but not available", which is IMO less clear than getting a "Neither HAP nor Shadow available for PVH domain" error message. Just my thinking, both checks achieve the same result, but the error message in the create_dom0() instance is more helpful in the context of dom0 creation. Thanks, Roger. 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X-MS-Exchange-CrossTenant-Network-Message-Id: 64806e5c-c1bb-4f8d-90e2-08de67f6b5d9 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 16:17:24.7535 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kNRrivDhG2UZ0aa/DyCJLgF4YajyVRDCUiPv9h45uA0aasq5OtJ8412LBPVcT/3htQGJgMk3qGFOu0qRZ7YYuQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR03MB5769 On Mon, Feb 09, 2026 at 05:04:55PM +0100, Jan Beulich wrote: > On 09.02.2026 16:55, Roger Pau Monné wrote: > > On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: > >> On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monné wrote: > >>> On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: > >>>> It only has 2 callers, both of which can be conditionally removed. > >>>> > >>>> Signed-off-by: Alejandro Vallejo > >>>> --- > >>>> I'd be ok conditionalising the else branch on... > >>>> > >>>> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) > >>>> > >>>> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com > >>>> > >>>> ... to avoid the danger of stale pointers, with required changes elsewhere so > >>>> none.c is only compiled out in that case. > >>>> > >>>> I'm not sure how much it matters seeing how they are all unreachable. > >>>> --- > >>>> xen/arch/x86/mm/Makefile | 2 +- > >>>> xen/arch/x86/mm/paging.c | 4 +- > >>>> xen/arch/x86/mm/shadow/Makefile | 4 -- > >>>> xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- > >>>> 4 files changed, 3 insertions(+), 84 deletions(-) > >>>> delete mode 100644 xen/arch/x86/mm/shadow/none.c > >>>> > >>>> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > >>>> index 960f6e8409..066c4caff3 100644 > >>>> --- a/xen/arch/x86/mm/Makefile > >>>> +++ b/xen/arch/x86/mm/Makefile > >>>> @@ -1,4 +1,4 @@ > >>>> -obj-y += shadow/ > >>>> +obj-$(CONFIG_SHADOW_PAGING) += shadow/ > >>>> obj-$(CONFIG_HVM) += hap/ > >>>> > >>>> obj-$(CONFIG_ALTP2M) += altp2m.o > >>>> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c > >>>> index 2396f81ad5..5f70254cec 100644 > >>>> --- a/xen/arch/x86/mm/paging.c > >>>> +++ b/xen/arch/x86/mm/paging.c > >>>> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) > >>>> */ > >>>> if ( hap_enabled(d) ) > >>>> hap_domain_init(d); > >>>> - else > >>>> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > >>>> rc = shadow_domain_init(d); > >>> > >>> If you want to go this route you will need to set rc = -EOPNOTSUPP; > >>> prior to the `if ... else if` on the HVM case. > >> > >> Maybe this instead > >> > >> else > >> rc = IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; > > > > But even for the PV case we cannot call shadow_domain_init() if shadow > > is compiled out? I think you want: > > > > if ( hap_enabled(d) ) > > hap_domain_init(d); > > else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > > rc = shadow_domain_init(d); > > else > > rc = is_hvm_domain(d) ? -EOPNOTSUPP : 0; > > Wouldn't this still leave NULL pointers in places where they can be rather > dangerous with PV guests? Possibly, I didn't look much further on this patch, as returning rc == 0 and not having initialized neither HAP nor shadow is likely to already lead to NULL pointer dereferences. Regards, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pYOj5QY/FMhctV1WCLN14OPzqT7Qz8RovluPIT4g9nk8a8ml6LidzKg2ZA2nqBoU2rRTPKFuthkKXYYo+393Z9pKg2aeyDgw+XisH9mYzWDUynouid2Svez6Yk9KTom0tKN5Fa1F/yAXQbMwsNRL974LHcWcvI6PT9ljIJbBQE8VKvseyOAuuzwCRzeIbMbSOwqLPgXy4nQpyvbPr3JBm4Ci8y2KrJRf1V7NfWFuBKN034PSsc4oL1nYuJb6OAngp7PV3hKN38eeZRNJnIARJYAazQOjyx/L9rLZ6napXmd+vYnmM4/DeKkwJIligdmz7p4etYu210eSmYrIw2m2BxiEu3J7m3eVnWNL7McwGIaNVHiFCYVbB8XDWTovuo11ULXHtgf+hxODVUmfbtiZX9bXftdOqNVoh3CAEf48v334nErg6hleJi+0kljbcZBX X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 16:20:45.4589 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 688b8573-1564-4b72-f56d-08de67f72dbf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F63.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7654 On Mon Feb 9, 2026 at 4:55 PM CET, Roger Pau Monn=C3=A9 wrote: > On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monn=C3=A9 wrote: >> > On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: >> >> It only has 2 callers, both of which can be conditionally removed. >> >>=20 >> >> Signed-off-by: Alejandro Vallejo >> >> --- >> >> I'd be ok conditionalising the else branch on... >> >>=20 >> >> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) >> >>=20 >> >> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885= -1-alejandro.garciavallejo@amd.com >> >>=20 >> >> ... to avoid the danger of stale pointers, with required changes else= where so >> >> none.c is only compiled out in that case. >> >>=20 >> >> I'm not sure how much it matters seeing how they are all unreachable. >> >> --- >> >> xen/arch/x86/mm/Makefile | 2 +- >> >> xen/arch/x86/mm/paging.c | 4 +- >> >> xen/arch/x86/mm/shadow/Makefile | 4 -- >> >> xen/arch/x86/mm/shadow/none.c | 77 -------------------------------= -- >> >> 4 files changed, 3 insertions(+), 84 deletions(-) >> >> delete mode 100644 xen/arch/x86/mm/shadow/none.c >> >>=20 >> >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile >> >> index 960f6e8409..066c4caff3 100644 >> >> --- a/xen/arch/x86/mm/Makefile >> >> +++ b/xen/arch/x86/mm/Makefile >> >> @@ -1,4 +1,4 @@ >> >> -obj-y +=3D shadow/ >> >> +obj-$(CONFIG_SHADOW_PAGING) +=3D shadow/ >> >> obj-$(CONFIG_HVM) +=3D hap/ >> >> =20 >> >> obj-$(CONFIG_ALTP2M) +=3D altp2m.o >> >> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c >> >> index 2396f81ad5..5f70254cec 100644 >> >> --- a/xen/arch/x86/mm/paging.c >> >> +++ b/xen/arch/x86/mm/paging.c >> >> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) >> >> */ >> >> if ( hap_enabled(d) ) >> >> hap_domain_init(d); >> >> - else >> >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >> >> rc =3D shadow_domain_init(d); >> > >> > If you want to go this route you will need to set rc =3D -EOPNOTSUPP; >> > prior to the `if ... else if` on the HVM case. >>=20 >> Maybe this instead >>=20 >> else >> rc =3D IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; > > But even for the PV case we cannot call shadow_domain_init() if shadow > is compiled out? I think you want: > > if ( hap_enabled(d) ) > hap_domain_init(d); > else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > rc =3D shadow_domain_init(d); > else > rc =3D is_hvm_domain(d) ? -EOPNOTSUPP : 0; > none.c would need to stay in PV for what I proposed. For what you proposed = PV would return 0, but all the hooks would be gone. And I really don't know if they would be triggered or not. >> And gate none.c on PV && !SHADOW_PAGING, which seems to be the only use. >>=20 >> It's a lot easier to see the safety on the HVM-only case, particularly w= ith... >>=20 >> > is compiled out, and the toolstack has not specified the HAP flag at >> > domain creation you will end up with a domain that doesn't have the >> > paging operations initialized as paging_domain_init() would return 0 >> > with neither HAP nor shadow having been setup. That's likely to >> > trigger NULL pointer dereferences inside of Xen. >> > >> > Also, seeing the code in arch_sanitise_domain_config() we possibly >> > want to return an error at that point if toolstack attempts to create >> > an HVM guest without HAP enabled, and shadow is build time disabled. >> > I've sent a patch to that end. >>=20 >> ... this patch you meantion. Thanks. >>=20 >> I'm guessing it's still a hot potato in for non-shadow PV, which strongl= y hints >> at our being better off leaving it in that case. On HVM-only configurati= ons it >> seems rather silly. > > I'm not sure I follow exactly what you mean. I'm not sure _I_ follow exactly what I mean. Part of the confusion is the overloaded use of "shadow" to mean "shadow paging" and "fault-and-track" of logdirty behaviour. > Some rants below which > might or might not be along the lines of what you suggest. Thanks. > > PV needs shadow for migration. shadow in the sense of shadow paging? So PV-only + !SHADOW means migrations= are impossible? Why can't Xen operate on the PV pagetables rather than using sh= adow? > HVM can use shadow or HAP, and our default is HAP. For regular use or migrations? > For HVM only builds it could be possible to not > recommend enabling shadow. Even for deployments where only dom0 is > using PV mode, it does still make sense to possible recommend not > enabling shadow for attack surface reduction. What do you mean by "enabling shadow"? compiling it in? Running HVM without= HAP? Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:23:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:23:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225723.1532285 (Exim 4.92) (envelope-from ) id 1vpU2t-00082c-NA; Mon, 09 Feb 2026 16:23:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225723.1532285; Mon, 09 Feb 2026 16:23:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpU2t-00082V-KK; Mon, 09 Feb 2026 16:23:31 +0000 Received: by outflank-mailman (input) for mailman id 1225723; Mon, 09 Feb 2026 16:23:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpU2s-00082M-7x for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:23:30 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id aa2ac9d4-05d3-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:23:27 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4801d7c72a5so27099085e9.0 for ; Mon, 09 Feb 2026 08:23:27 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 08:23:27 -0800 (PST) Message-ID: <42c248e7-9747-4281-9fca-1b9950a06bf8@suse.com> Date: Mon, 9 Feb 2026 17:23:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/cpufreq: Add Kconfig option for CPU frequency scaling To: Stefano Stabellini Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260206233005.417233-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206233005.417233-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.02.2026 00:30, Stefano Stabellini wrote:> --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -652,7 +652,7 @@ endmenu > > config PM_OP > bool "Enable Performance Management Operation" > - depends on ACPI && HAS_CPUFREQ && SYSCTL > + depends on ACPI && CPUFREQ && SYSCTL > default y > help > This option shall enable userspace performance management control > @@ -660,7 +660,7 @@ config PM_OP > > config PM_STATS > bool "Enable Performance Management Statistics" > - depends on ACPI && HAS_CPUFREQ && SYSCTL > + depends on ACPI && CPUFREQ && SYSCTL > default y > help > Enable collection of performance management statistics to aid in Is the original HAS_CPUFREQ misleading here? do_pm_op() (in pm-op.c) is also doing some C-state related work. You may not compile that out just because of CPUFREQ=n. Same for pmstat.c. > --- a/xen/drivers/cpufreq/Kconfig > +++ b/xen/drivers/cpufreq/Kconfig > @@ -1,3 +1,17 @@ > - > config HAS_CPUFREQ > bool > + > +config CPUFREQ > + bool "CPU Frequency scaling" > + default y > + depends on HAS_CPUFREQ > + help > + Enable CPU frequency scaling and power management governors. > + This allows Xen to dynamically adjust CPU P-states (performance > + states) based on system load. > + > + Disabling this option removes all cpufreq governors and power > + management interfaces. This is useful for real-time systems or > + minimal hypervisor builds. > + > + If unsure, say Y. Looks like we're trying to get rid of such re-stating of what the default is. > --- a/xen/include/acpi/cpufreq/cpufreq.h > +++ b/xen/include/acpi/cpufreq/cpufreq.h > @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); > > int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); > > +#ifdef CONFIG_CPUFREQ > +int cpufreq_add_cpu(unsigned int cpu); > +int cpufreq_del_cpu(unsigned int cpu); If already you move these, please also get rid of the double blanks. > void cpufreq_dbs_timer_suspend(void); > void cpufreq_dbs_timer_resume(void); > +#else > +static inline int cpufreq_add_cpu(unsigned int cpu) { return -ENOSYS; } > +static inline int cpufreq_del_cpu(unsigned int cpu) { return -ENOSYS; } Here and below - no use of ENOSYS, please. EOPNOTSUPP it is everywhere else (unless dating back very far). > --- a/xen/include/xen/acpi.h > +++ b/xen/include/xen/acpi.h > @@ -185,8 +185,14 @@ static inline unsigned int acpi_get_csubstate_limit(void) { return 0; } > static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } > #endif > > -#ifdef XEN_GUEST_HANDLE If you leave this as-is, ... > +#if defined(XEN_GUEST_HANDLE) && defined(CONFIG_CPUFREQ) > int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); > +#elif defined(XEN_GUEST_HANDLE) > +static inline int acpi_set_pdc_bits(unsigned int acpi_id, > + XEN_GUEST_HANDLE(uint32) pdc) > +{ > + return -ENOSYS; > +} > #endif ... the overall result may be a tiny bit tidier. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -1255,9 +1255,14 @@ static always_inline bool is_iommu_enabled(const struct domain *d) > extern bool sched_smt_power_savings; > extern bool sched_disable_smt_switching; > > -extern enum cpufreq_controller { > +enum cpufreq_controller { > FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen > -} cpufreq_controller; This enum would better ... > +}; > +#ifdef CONFIG_CPUFREQ > +extern enum cpufreq_controller cpufreq_controller; ... stay inside here, then also making the split of type and var decl unnecessary. The two affected platform-ops likely want compiling out, too. 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Mon, 09 Feb 2026 08:24:44 -0800 (PST) Message-ID: <193c1ed0-75dd-4881-b6c4-9770cbb347d7@suse.com> Date: Mon, 9 Feb 2026 17:24:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: short-circuit HVM shadow guest creation earlier To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alejandro Vallejo Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Xen-devel References: <20260209144049.86535-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 17:11, Roger Pau Monné wrote: > On Mon, Feb 09, 2026 at 05:02:26PM +0100, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 3:40 PM CET, Roger Pau Monne wrote: >>> If shadow paging has been compiled out short circuit the creation of HVM >>> guests that attempt to use shadow paging at arch_sanitise_domain_config(). >>> There's no need to further build the domain when creation is doomed to fail >>> later on. >>> >>> Signed-off-by: Roger Pau Monné >>> --- >>> xen/arch/x86/domain.c | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >>> index 8b2f33f1a06c..8eb1509782ef 100644 >>> --- a/xen/arch/x86/domain.c >>> +++ b/xen/arch/x86/domain.c >>> @@ -627,6 +627,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >>> return -EINVAL; >>> } >>> >>> + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) >>> + { >>> + dprintk(XENLOG_INFO, "Shadow paging requested but not available\n"); >> >> nit: s/requested/required/, maybe? > > The wording matches the rest of the messages in > arch_sanitise_domain_config(). I'm not saying that makes it correct, > but if we word this differently we should also change the others > IMO. +1 >> Also, with this in place can't we get rid of the panic in create_dom0() that >> checks an identical condition? > > Hm, I would possibly leave that one, as I think it's clearer for the > dom0 case. Otherwise someone using a build without HAP or shadow and > attempting to boot in PVH mode will get a message saying: "Shadow > paging requested but not available", which is IMO less clear than > getting a "Neither HAP nor Shadow available for PVH domain" error > message. > > Just my thinking, both checks achieve the same result, but the error > message in the create_dom0() instance is more helpful in the context > of dom0 creation. +1 Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:27:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:27:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225741.1532305 (Exim 4.92) (envelope-from ) id 1vpU6V-0000im-EQ; Mon, 09 Feb 2026 16:27:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225741.1532305; Mon, 09 Feb 2026 16:27:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpU6V-0000if-Bp; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: HyyYZU19RrMBK4A4DwN67EMRTVdZIEB7zRyVEt5RFVJpC2yGxtuMSvtt/LH0XcPv6XwNki3anwyWywlTQuH9hKzrJqZ29g//aPiY/fxMoCznn7f6OVb+kp+77RqYId2WZArGaSPfPJ7oHoQoxEW/XYRVnfvqHWweFX0AVoxfQPvXCJH3PHWujmV5vkT83VZLta7EK4zCHedWm6vP4f3QpJjlTVcuXkP3hRBSzacuJxggRaJMzejUweDxwJYvvIy5QFEpjscGecE9xrJc+ji6la2P2XlOoolmTeqG6m7BUUt3w+InTBJj0n/KHqxigkTJ6BuLy+16rglz/5U3xyvY4jQA9h1DEfgD4ZoXuQiZCAQnWKjbLPDYKk4jHkhusmetBY8pgjXYNUR6rsX/mNWXSgjm+WAk4lh/eOBC2lNsOWOqAjsGShjD699gYmasPCcl X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 16:26:59.3370 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d303d922-cfd0-449c-d8a6-08de67f80c97 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001504.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7168 On Mon Feb 9, 2026 at 5:11 PM CET, Roger Pau Monn=C3=A9 wrote: > On Mon, Feb 09, 2026 at 05:02:26PM +0100, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 3:40 PM CET, Roger Pau Monne wrote: >> > If shadow paging has been compiled out short circuit the creation of H= VM >> > guests that attempt to use shadow paging at arch_sanitise_domain_confi= g(). >> > There's no need to further build the domain when creation is doomed to= fail >> > later on. >> > >> > Signed-off-by: Roger Pau Monn=C3=A9 >> > --- >> > xen/arch/x86/domain.c | 6 ++++++ >> > 1 file changed, 6 insertions(+) >> > >> > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >> > index 8b2f33f1a06c..8eb1509782ef 100644 >> > --- a/xen/arch/x86/domain.c >> > +++ b/xen/arch/x86/domain.c >> > @@ -627,6 +627,12 @@ int arch_sanitise_domain_config(struct xen_domctl= _createdomain *config) >> > return -EINVAL; >> > } >> > =20 >> > + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) >> > + { >> > + dprintk(XENLOG_INFO, "Shadow paging requested but not availab= le\n"); >>=20 >> nit: s/requested/required/, maybe? > > The wording matches the rest of the messages in > arch_sanitise_domain_config(). I'm not saying that makes it correct, > but if we word this differently we should also change the others > IMO. My point is rather that HAP, or relaxed MSRs, or other settings are activel= y requested via createdomain flags. Shadow is instead the consequence of not setting HAP. You don't request shadow, you either requested something else = or you hit the error. It's not terrible wording, just imprecise. >> Also, with this in place can't we get rid of the panic in create_dom0() = that >> checks an identical condition? > > Hm, I would possibly leave that one, as I think it's clearer for the > dom0 case. Otherwise someone using a build without HAP or shadow and > attempting to boot in PVH mode will get a message saying: "Shadow > paging requested but not available", which is IMO less clear than > getting a "Neither HAP nor Shadow available for PVH domain" error > message. > > Just my thinking, both checks achieve the same result, but the error > message in the create_dom0() instance is more helpful in the context > of dom0 creation. Fair enough. It doesn't matter much anyway. With or without the adjusted pr= intk. Reviewed-by: Alejandro Vallejo Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:31:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:31:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225750.1532316 (Exim 4.92) (envelope-from ) id 1vpUAa-0002fH-V7; Mon, 09 Feb 2026 16:31:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225750.1532316; Mon, 09 Feb 2026 16:31:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUAa-0002fA-Rp; Mon, 09 Feb 2026 16:31:28 +0000 Received: by outflank-mailman (input) for mailman id 1225750; Mon, 09 Feb 2026 16:31:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUAZ-0002f4-SH for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:31:27 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c6e34afd-05d4-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:31:25 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-47ee0291921so30564785e9.3 for ; Mon, 09 Feb 2026 08:31:25 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 08:31:24 -0800 (PST) Message-ID: <5b16020b-4ca0-4210-b8bf-d71f127dddfd@suse.com> Date: Mon, 9 Feb 2026 17:31:26 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: Delete the none.c dummy file To: Alejandro Vallejo Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Tim Deegan , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260209104104.7840-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 17:20, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 4:55 PM CET, Roger Pau Monné wrote: >> On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: >>> On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monné wrote: >>>> Also, seeing the code in arch_sanitise_domain_config() we possibly >>>> want to return an error at that point if toolstack attempts to create >>>> an HVM guest without HAP enabled, and shadow is build time disabled. >>>> I've sent a patch to that end. >>> >>> ... this patch you meantion. Thanks. >>> >>> I'm guessing it's still a hot potato in for non-shadow PV, which strongly hints >>> at our being better off leaving it in that case. On HVM-only configurations it >>> seems rather silly. >> >> I'm not sure I follow exactly what you mean. > > I'm not sure _I_ follow exactly what I mean. Part of the confusion is the > overloaded use of "shadow" to mean "shadow paging" and "fault-and-track" > of logdirty behaviour. There's no such overload, I don't think. Shadow paging is _needed_ for certain operations. E.g. to put a PV guest in log-dirty mode. >> Some rants below which >> might or might not be along the lines of what you suggest. > > Thanks. > >> >> PV needs shadow for migration. > > shadow in the sense of shadow paging? So PV-only + !SHADOW means migrations are > impossible? Why can't Xen operate on the PV pagetables rather than using shadow? > >> HVM can use shadow or HAP, and our default is HAP. > > For regular use or migrations? HVM guests always have paging enabled - either HAP or shadow. Hence this distinction makes sense only for PV. However, the answer is still: Both. Because besides for log-dirty tracking, shadow mode is also used there to mitigate L1TF for guests not doing so on their own. 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X-MS-Exchange-CrossTenant-Network-Message-Id: 11d9d5dd-b37f-4f09-2082-08de67f93129 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2026 16:35:10.5219 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rz1mR5BlNP/PrD7iT52Py0RYuSQdYHIb1xQzYiRAvdZBScgxLnW+mwPfBVmowgz5bR7LSa50rHaSUna/hqTgbw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR03MB7011 On Mon, Feb 09, 2026 at 05:20:40PM +0100, Alejandro Vallejo wrote: > On Mon Feb 9, 2026 at 4:55 PM CET, Roger Pau Monné wrote: > > On Mon, Feb 09, 2026 at 04:35:04PM +0100, Alejandro Vallejo wrote: > >> On Mon Feb 9, 2026 at 3:42 PM CET, Roger Pau Monné wrote: > >> > On Mon, Feb 09, 2026 at 11:41:02AM +0100, Alejandro Vallejo wrote: > >> >> It only has 2 callers, both of which can be conditionally removed. > >> >> > >> >> Signed-off-by: Alejandro Vallejo > >> >> --- > >> >> I'd be ok conditionalising the else branch on... > >> >> > >> >> IS_ENABLED(CONFIG_SHADOW_PAGING )|| IS_ENABLED(CONFIG_LOG_DIRTY) > >> >> > >> >> logdirty patch: https://lore.kernel.org/xen-devel/20260209103118.5885-1-alejandro.garciavallejo@amd.com > >> >> > >> >> ... to avoid the danger of stale pointers, with required changes elsewhere so > >> >> none.c is only compiled out in that case. > >> >> > >> >> I'm not sure how much it matters seeing how they are all unreachable. > >> >> --- > >> >> xen/arch/x86/mm/Makefile | 2 +- > >> >> xen/arch/x86/mm/paging.c | 4 +- > >> >> xen/arch/x86/mm/shadow/Makefile | 4 -- > >> >> xen/arch/x86/mm/shadow/none.c | 77 --------------------------------- > >> >> 4 files changed, 3 insertions(+), 84 deletions(-) > >> >> delete mode 100644 xen/arch/x86/mm/shadow/none.c > >> >> > >> >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > >> >> index 960f6e8409..066c4caff3 100644 > >> >> --- a/xen/arch/x86/mm/Makefile > >> >> +++ b/xen/arch/x86/mm/Makefile > >> >> @@ -1,4 +1,4 @@ > >> >> -obj-y += shadow/ > >> >> +obj-$(CONFIG_SHADOW_PAGING) += shadow/ > >> >> obj-$(CONFIG_HVM) += hap/ > >> >> > >> >> obj-$(CONFIG_ALTP2M) += altp2m.o > >> >> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c > >> >> index 2396f81ad5..5f70254cec 100644 > >> >> --- a/xen/arch/x86/mm/paging.c > >> >> +++ b/xen/arch/x86/mm/paging.c > >> >> @@ -634,7 +634,7 @@ int paging_domain_init(struct domain *d) > >> >> */ > >> >> if ( hap_enabled(d) ) > >> >> hap_domain_init(d); > >> >> - else > >> >> + else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > >> >> rc = shadow_domain_init(d); > >> > > >> > If you want to go this route you will need to set rc = -EOPNOTSUPP; > >> > prior to the `if ... else if` on the HVM case. > >> > >> Maybe this instead > >> > >> else > >> rc = IS_ENABLED(PV) ? shadow_domain_init(d) : -EOPNOTSUPP; > > > > But even for the PV case we cannot call shadow_domain_init() if shadow > > is compiled out? I think you want: > > > > if ( hap_enabled(d) ) > > hap_domain_init(d); > > else if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > > rc = shadow_domain_init(d); > > else > > rc = is_hvm_domain(d) ? -EOPNOTSUPP : 0; > > > > none.c would need to stay in PV for what I proposed. For what you proposed PV > would return 0, but all the hooks would be gone. And I really don't know if > they would be triggered or not. Oh, OK, so that would already diverge form the current patch - in this proposal you completely remove none.c. I see at least two of the hooks look to be reachable from PV seeing the ASSERTs in there, or at least that was the expectation. > >> And gate none.c on PV && !SHADOW_PAGING, which seems to be the only use. > >> > >> It's a lot easier to see the safety on the HVM-only case, particularly with... > >> > >> > is compiled out, and the toolstack has not specified the HAP flag at > >> > domain creation you will end up with a domain that doesn't have the > >> > paging operations initialized as paging_domain_init() would return 0 > >> > with neither HAP nor shadow having been setup. That's likely to > >> > trigger NULL pointer dereferences inside of Xen. > >> > > >> > Also, seeing the code in arch_sanitise_domain_config() we possibly > >> > want to return an error at that point if toolstack attempts to create > >> > an HVM guest without HAP enabled, and shadow is build time disabled. > >> > I've sent a patch to that end. > >> > >> ... this patch you meantion. Thanks. > >> > >> I'm guessing it's still a hot potato in for non-shadow PV, which strongly hints > >> at our being better off leaving it in that case. On HVM-only configurations it > >> seems rather silly. > > > > I'm not sure I follow exactly what you mean. > > I'm not sure _I_ follow exactly what I mean. Part of the confusion is the > overloaded use of "shadow" to mean "shadow paging" and "fault-and-track" > of logdirty behaviour. > > > Some rants below which > > might or might not be along the lines of what you suggest. > > Thanks. > > > > > PV needs shadow for migration. > > shadow in the sense of shadow paging? So PV-only + !SHADOW means migrations are > impossible? Why can't Xen operate on the PV pagetables rather than using shadow? At the time it was likely seen as easier to re-use the shadow code rather than add more complexity to the PV one? > > HVM can use shadow or HAP, and our default is HAP. > > For regular use or migrations? HAP doesn't need shadow to perform migrations, so in HVM there's no dependency between HAP and shadow. > > For HVM only builds it could be possible to not > > recommend enabling shadow. Even for deployments where only dom0 is > > using PV mode, it does still make sense to possible recommend not > > enabling shadow for attack surface reduction. > > What do you mean by "enabling shadow"? compiling it in? Running HVM without HAP? I meant not compiling it in. If the only PV guest running on the system is dom0, and the domUs are all HVM + HAP, you don't need shadow for neither of them. PV dom0 will never migrate, and HVM + HAP domUs won't use the shadow code for migration (or anything). Thanks, Roger. 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Mon, 09 Feb 2026 08:38:35 -0800 (PST) Message-ID: <1579e081-b945-40b1-9a72-f6c5f7ed69ca@suse.com> Date: Mon, 9 Feb 2026 17:38:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/6] xen/console: group conring code together To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-2-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-2-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > From: Denis Mukhin > > Groups conring buffer management code in the console driver for ease of > maintaining this code. > > Not a functional change. > > Signed-off-by: Denis Mukhin Acked-by: Jan Beulich with one minimal adjustment: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -126,17 +126,6 @@ static int cf_check parse_console_timestamps(const char *s); > custom_runtime_param("console_timestamps", parse_console_timestamps, > con_timestamp_mode_upd); > > -/* conring_size: allows a large console ring than default (16kB). */ > -static uint32_t __initdata opt_conring_size; > -size_param("conring_size", opt_conring_size); > - > -#define _CONRING_SIZE 16384 > -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) > -static char __initdata _conring[_CONRING_SIZE]; > -static char *__read_mostly conring = _conring; > -static uint32_t __read_mostly conring_size = _CONRING_SIZE; > -static uint32_t conringc, conringp; > - > static int __read_mostly sercon_handle = -1; > > #ifdef CONFIG_X86 > @@ -350,6 +339,17 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) > * ******************************************************** > */ > > +/* conring_size: allows a large console ring than default (16kB). */ As you move the comment, s/large/larger/. Will adjust while committing. > +static uint32_t __initdata opt_conring_size; > +size_param("conring_size", opt_conring_size); > + > +#define _CONRING_SIZE 16384 > +#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) > +static char __initdata _conring[_CONRING_SIZE]; > +static char *__read_mostly conring = _conring; > +static uint32_t __read_mostly conring_size = _CONRING_SIZE; > +static uint32_t conringc, conringp; There are several other tidying things to be done here, but I'm not going to request that you take care of those, too. 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Mon, 09 Feb 2026 08:40:32 -0800 (PST) Message-ID: <3b452d1a-97c9-41d8-9687-36b702309f47@suse.com> Date: Mon, 9 Feb 2026 17:40:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/6] xen/console: promote conring{,_size} to __ro_after_init To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-4-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-4-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > From: Denis Mukhin > > Both conring{,_size} should be RO after initialization is completed. > > Suggested-by: Andrew Cooper > Signed-off-by: Denis Mukhin Ah yes, that's one of those things mentioned for patch 1. Acked-by: Jan Beulich preferably with ... > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -346,8 +346,8 @@ size_param("conring_size", opt_conring_size); > #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) > #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) > static char __initdata _conring[_CONRING_SIZE]; > -static char *__read_mostly conring = _conring; > -static uint32_t __read_mostly conring_size = _CONRING_SIZE; > +static char *__ro_after_init conring = _conring; > +static uint32_t __ro_after_init conring_size = _CONRING_SIZE; ... the type here also changed to unsigned int (as set forth by ./CODING_STYLE). Happy to adjust while committing. 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8edacf1564sm415776866b.52.2026.02.09.08.52.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 08:52:38 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: be6d4348-05d7-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770655959; x=1771260759; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JMEwFKcyHIZZ4fXEejJ25YZMQb9FLhdSrVKjYgj/ce8=; b=d5CC6t6dB2t2c2BaoE5K0s8L6UrVhG/Kwx5yteQo7PJ+FPh0QdmppARh4W9A8GkCb9 ZvFOm1CFK4aQNOEJEtWGavTdhgMNAOViCI64+hD7CNBnB1o22hIr9XWcmKZ/hBK8Oxa7 WU5zK4rkp5KxKDMBL8gcxKBSeF55ZG2MPAh9vV1R24NbOcqsWonn8g5lwtQE7Wh82Wdw w3wxz0YA/3N1TloZMi4yWrk0KftlY+Qi5JEzJWejtaBeK7TPn/xJjiqLk/tZIrmM/QOO xGiyBglq/D4FVxdEsQsk+wbAbPgcJJoCDRtTZRsS4ePiXX6KxPKzCcb3au1LER45Vd0I dFog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770655959; x=1771260759; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=JMEwFKcyHIZZ4fXEejJ25YZMQb9FLhdSrVKjYgj/ce8=; b=sJdyJWRY0BxuA3LjCb7afPVeQkBdUXV4aTFCCpbZncniKRRo4I4g8iumq5s4JiBu6q XNo2Yam/aTrGW/nSidC2TmNoa6WOTTIo2Zh/gJECIrcltqBJBTeZ8ct2NWNf/JdbMEJe Irn1nvIo/+9bxklKyAgNpf25HQKiQKPVV4XHOC4JBsfsq21KIzR0KFAZy46ySyD3hhJG YNJ5UQMxSlht/fHq5q89eR3E3BuPJEsP6kZmfeXFuWozGeu3coF0kYlQOFPS4U7xD/HS HdKEyAXQTazRv6M+tCNovqi0TAZaocE7cxFnPfzYcwEJfsOIoXYHW8r0C0e78+Vqtxjc 0dYw== X-Gm-Message-State: AOJu0YwUdPPwX6KPx49NsiI5aZRJahLA2ynWwOSNAfg2CiQuqlZUvMFu PCC58Bst11vlCjV9OtBLL2o5vH91eSmBJ4MqsSgiuGnbY4/eUZCdT/BxSpUHWmq8 X-Gm-Gg: AZuq6aK6FVDU6F+HIzVNKNzARq+AL0J4AybsX+2N5MZnou0/cz6Zvp7txUehbQa8mQw 1JFGamfp7onKW7zQoY3HaF2Kt+eVXNdf3qZ0SwHijN0HhfSkn5REk67XdUTeV7pOTDoqv1o/DRA U2OYWdrcgXBEX9YPpADZoAhVyW/63Rd5+2g+vfs3t+f9e7fSpxNLLLprnv8SIht0rmo+brujN5j mBoWzXv4+8rKbwLKioD0/9WAvYy8LA0ihEZ676fYnpdziG9zMWcD1j1fAl89Ix546VtQfiolwut 5xkArmKLPhs/t0Dh+//CA4oFrHQlDUuMv+gF0BIY1bfm0GanM9sLIzQ+LqgCyQRwL5boO3D4rUs esxdkrqMpSeFqM2ZN3qEFDnmTizdKnMsBxaDO/UGGpyNrX0UZTq9Zd+j/2DayYfg7RgCti2P1nO oxb4PfifQEevnoXhjTljVNILA8RtQvJxITU/Q48l0YCturmZYeRluY8A== X-Received: by 2002:a17:907:a44:b0:b8e:d0ec:c9e2 with SMTP id a640c23a62f3a-b8edf37ec3emr628174066b.53.1770655958667; Mon, 09 Feb 2026 08:52:38 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 01/16] xen/riscv: implement arch_vcpu_{create,destroy}() Date: Mon, 9 Feb 2026 17:52:14 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce architecture-specific functions to create and destroy VCPUs. Note that arch_vcpu_create() currently returns -EOPNOTSUPP, as the virtual timer and interrupt controller are not yet implemented. Add calle-saved registers used to preserve Xen’s own execution context when switching between vCPU stacks. It is going to be used in the following way (pseudocode): context_switch(prev_vcpu, next_vcpu): ... /* Switch from previous stack to the next stack. */ __context_switch(prev_vcpu, next_vcpu); ... schedule_tail(prev_vcpu): Save and restore vCPU's CSRs. The Xen-saved context allows __context_switch() to switch execution from the previous vCPU’s stack to the next vCPU’s stack and later resume execution on the original stack when switching back. During vCPU creation, the Xen-saved context is going to be initialized with: - SP pointing to the newly allocated vCPU stack - RA pointing to a helper that performs final vCPU setup before transferring control to the guest After the first execution of __context_switch(), RA naturally points to the instruction following the call site, and the remaining callee-saved registers contain the Xen register state at the time of the switch. As part of this change, add continue_new_vcpu(), which will be used after the first context_switch() of a new vCPU. Since this functionality is not yet implemented, continue_new_vcpu() is currently provided as a stub. The prev argument is going to be set by RISC-V ABI (prev will be stored in a0) when __context_swtich() will be introduced and called from context_switch(). Update the STACK_SIZE definition and introduce STACK_ORDER (to align with other architectures) for allocating the vCPU stack. Introduce struct cpu_info to store per-vCPU state that lives at the top of the vCPU's stack. Signed-off-by: Oleksii Kurochko --- Changes in v3: - Move declaration of xen_saved_context structure and cpu_info structure here as they are going to be used in this patch. - Drop separate zero-ing of arch.cpu_info as a memory for it is allocated by vzalloc(). - Correct calculation of stack pointer in arch_vcpu_destroy() function. --- Changes in v2: - Drop BUILD_BUG_ON() in arch_vcpu_create() as a check isn't very useful. - Use vzalloc() instead of alloc_xenheap_page() to use the larger domheap to allocate vCPU's stack. - Drop printk() inside arch_vcpu_create() to not have potential big noise in console as it could be that an amount of vCPUs is pretty big. - Use XVFREE() instead of free_xenheap_pages() as vCPU's stack allocation happens with a usage of vzalloc() now. - Drop stack field as it is enough to have only cpu_info as stack pointer could be calculated based on cpu_info. - Drop cast when v.arch.cpu_info is inialized as it is not necessary to have it. - Drop memset() for arch.cpu_info() as it is enough to have vzalloc(). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 58 ++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/config.h | 3 +- xen/arch/riscv/include/asm/current.h | 6 +++ xen/arch/riscv/include/asm/domain.h | 24 ++++++++++++ xen/arch/riscv/stubs.c | 10 ----- 6 files changed, 91 insertions(+), 11 deletions(-) create mode 100644 xen/arch/riscv/domain.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 0df139b27423..868514c25006 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,5 +1,6 @@ obj-y += aplic.o obj-y += cpufeature.o +obj-y += domain.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += imsic.o diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c new file mode 100644 index 000000000000..d035b105c2cc --- /dev/null +++ b/xen/arch/riscv/domain.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +static void continue_new_vcpu(struct vcpu *prev) +{ + BUG_ON("unimplemented\n"); +} + +static void __init __maybe_unused build_assertions(void) +{ + /* + * Enforce the requirement documented in struct cpu_info that + * guest_cpu_user_regs must be the first field. + */ + BUILD_BUG_ON(offsetof(struct cpu_info, guest_cpu_user_regs) != 0); +} + +int arch_vcpu_create(struct vcpu *v) +{ + int rc = 0; + void *stack = vzalloc(STACK_SIZE); + + if ( !stack ) + return -ENOMEM; + + v->arch.cpu_info = stack + STACK_SIZE - sizeof(struct cpu_info); + + v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; + v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; + + /* Idle VCPUs don't need the rest of this setup */ + if ( is_idle_vcpu(v) ) + return rc; + + /* + * As the vtimer and interrupt controller (IC) are not yet implemented, + * return an error. + * + * TODO: Drop this once the vtimer and IC are implemented. + */ + rc = -EOPNOTSUPP; + goto fail; + + return rc; + + fail: + arch_vcpu_destroy(v); + return rc; +} + +void arch_vcpu_destroy(struct vcpu *v) +{ + vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); +} diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 1e08d3bf78be..86a95df018b5 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -143,7 +143,8 @@ #define SMP_CACHE_BYTES (1 << 6) -#define STACK_SIZE PAGE_SIZE +#define STACK_ORDER 3 +#define STACK_SIZE (PAGE_SIZE << STACK_ORDER) #define IDENT_AREA_SIZE 64 diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 0c3ea70c2ec8..58c9f1506b7c 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -21,6 +21,12 @@ struct pcpu_info { /* tp points to one of these */ extern struct pcpu_info pcpu_info[NR_CPUS]; +/* Per-VCPU state that lives at the top of the stack */ +struct cpu_info { + /* This should be the first member. */ + struct cpu_user_regs guest_cpu_user_regs; +}; + #define set_processor_id(id) do { \ tp->processor_id = (id); \ } while (0) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 316e7c6c8448..f78f145258d6 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -24,6 +24,30 @@ struct arch_vcpu_io { struct arch_vcpu { struct vcpu_vmid vmid; + + /* + * Callee saved registers for Xen's state used to switch from + * prev's stack to the next's stack during context switch. + */ + struct + { + register_t s0; + register_t s1; + register_t s2; + register_t s3; + register_t s4; + register_t s5; + register_t s6; + register_t s7; + register_t s8; + register_t s9; + register_t s10; + register_t s11; + register_t sp; + register_t ra; + } xen_saved_context; + + struct cpu_info *cpu_info; }; struct paging_domain { diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbfde79b5a7..c5784a436574 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -116,16 +116,6 @@ void dump_pageframe_info(struct domain *d) BUG_ON("unimplemented"); } -int arch_vcpu_create(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - -void arch_vcpu_destroy(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - void vcpu_switch_to_aarch64_mode(struct vcpu *v) { BUG_ON("unimplemented"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225791.1532426 (Exim 4.92) (envelope-from ) id 1vpUVF-0000lk-H3; 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This is not a practical issue for Arm, as the latest ARM ARM that timer frequency should be fixed at 1 GHz and older platforms used much lower rates, which is shy of 32-bit overflow. As the helpers are declared as static inline, they should not affect x86, which does not use them. On Arm, these helpers were historically implemented as out-of-line functions because the counter frequency was originally defined as static and unavailable to headers [1]. Later changes [2] removed this restriction, but the helpers remained unchanged. Now they can be implemented as static inline without any issues. Centralising the helpers avoids duplication and removes subtle differences between architectures while keeping the implementation simple. Drop redundant includes where already pulls it in. No functional change is intended. [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and XEN_SYSCTL_topologyinfo to common code Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in v3: - Add Reviewed-by: Jan Beulich . --- Changes in v2: - Move ns_to_ticks() and ticks_to_ns() to common code. --- xen/arch/arm/include/asm/time.h | 3 --- xen/arch/arm/time.c | 11 ----------- xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/include/asm/time.h | 5 ----- xen/arch/riscv/time.c | 1 + xen/include/xen/time.h | 11 +++++++++++ 6 files changed, 13 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index 49ad8c1a6d47..c194dbb9f52d 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -101,9 +101,6 @@ extern void init_timer_interrupt(void); /* Counter value at boot time */ extern uint64_t boot_count; -extern s_time_t ticks_to_ns(uint64_t ticks); -extern uint64_t ns_to_ticks(s_time_t ns); - void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index cc3fcf47b66a..a12912a106a0 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -27,7 +27,6 @@ #include #include #include -#include #include uint64_t __read_mostly boot_count; @@ -47,16 +46,6 @@ unsigned int timer_get_irq(enum timer_ppi ppi) return timer_irq[ppi]; } -/*static inline*/ s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz); -} - -/*static inline*/ uint64_t ns_to_ticks(s_time_t ns) -{ - return muldiv64(ns, 1000 * cpu_khz, SECONDS(1)); -} - static __initdata struct dt_device_node *timer; #ifdef CONFIG_ACPI diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index d2124b175521..2e85ff2b6e62 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -12,13 +12,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h index 1e7801e2ea0e..be3875b9984e 100644 --- a/xen/arch/riscv/include/asm/time.h +++ b/xen/arch/riscv/include/asm/time.h @@ -24,11 +24,6 @@ static inline cycles_t get_cycles(void) return csr_read(CSR_TIME); } -static inline s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, MILLISECS(1), cpu_khz); -} - void preinit_xen_time(void); #endif /* ASM__RISCV__TIME_H */ diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index e962f8518d78..2c7af0a5d63b 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -4,6 +4,7 @@ #include #include #include +#include #include unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index fe0d7a578a99..2185dd26a439 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -8,6 +8,7 @@ #ifndef __XEN_TIME_H__ #define __XEN_TIME_H__ +#include #include #include @@ -75,6 +76,16 @@ extern void send_timer_event(struct vcpu *v); void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds); +static inline s_time_t ticks_to_ns(uint64_t ticks) +{ + return muldiv64(ticks, MILLISECS(1), cpu_khz); +} + +static inline uint64_t ns_to_ticks(s_time_t ns) +{ + return muldiv64(ns, cpu_khz, MILLISECS(1)); +} + #include #endif /* __XEN_TIME_H__ */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225792.1532430 (Exim 4.92) (envelope-from ) id 1vpUVF-0000pf-U4; Mon, 09 Feb 2026 16:52:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225792.1532430; Mon, 09 Feb 2026 16:52:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVF-0000o4-Jg; Mon, 09 Feb 2026 16:52:49 +0000 Received: by outflank-mailman (input) for mailman id 1225792; Mon, 09 Feb 2026 16:52:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVE-0007Zo-1D for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:48 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c311b7df-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:47 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b885e8c6700so780491166b.0 for ; Mon, 09 Feb 2026 08:52:47 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8edacf1564sm415776866b.52.2026.02.09.08.52.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 08:52:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c311b7df-05d7-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770655966; x=1771260766; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ftXQlefZdbz0dncAwMVaBMfjTGZihapLiGK/88smptw=; b=B0Fl9Oikdm84wh+lWNu8SEQwSI3fs3ich86nX53CWPZZV6m4bOBw9QBOCHM/9I+6hm znXl9GJxzvFAkMlE+RceJeJtvozQUvMkYV/N640MbLk+NYn3zm3Dzo2xigdH45dCFhF2 fLfl3xS8UNxeJrrHFBtxHSI0braQkUjUZciCBuV1POntaMrRi/wKHWydfTTZ/EQLMrRF 4wvCove5+oyfM6RFr9pgrGzWzS34OVXq8elrtivle3c0G+AEacfmADXkmpdrOC0W4UUz gRB8nGk18BGWNq+8Rhfr6fum26WgNtrjIeGhXt8PJDr14JLGzE7Ie2geK/tauItqk7me g3Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770655966; x=1771260766; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ftXQlefZdbz0dncAwMVaBMfjTGZihapLiGK/88smptw=; b=Sk44xEyp8B90E6TraQOo2FUfvHfgOjt+t/0OeJancWyoiTJvCWGrXcOVDoEX0jccnS +YxI8c83BJGZ7/38HG76X498SDNY0/C59hDNSVO0FPIBRAm1x7dONqpX/oCOmTTSeamN JiVRqh/2NUuT2Lt/crx9jepQtz9IHQ4jhanGpdC1jJsgFTL74ChyARgPGH5olSxUUZKL iwukE/3VJtX4Qcu/lBxcaPuheSQCqng42mJLGPM/0AxoVQge8ezg00Sr0L6IGJGSSZUw G7QaJxkaEnbwO2hQVSQ58vclosblZocyXod2mjavl59pUvOCDlaHr0su6+CGvcoTCp3G nb2w== X-Gm-Message-State: AOJu0Yxrqmcpd9ThMqG04GGEpysYeIUCeFTKuYbX5D05Cbfel72c40K2 TVhFXULs/4iW/Ggn2FqRj7zdFUTE7cLqnA+muzaQnJ+HJfyl8KeMNJYzgselqcyE X-Gm-Gg: AZuq6aLGheRZEpZk8n6RK+6UDWEeXXBIHooetrr15MzGL/ltH1AjWnb6rxxGGY3E7Wv mzB2HgelYDKPkmqT8Dofe/VuELBqSNVJgf6xKIwfqIZFITzVqjn80un27XzzrFyKpYelntwYMYs 1W4tFKpGumaioHD8k4cQHU5ArYvVRd9XHpzaTBTHx21fTJdTJ+gcQWY0bW8Pfak3BteYOs1wFKW LR78oG8jLIrnejaQ/9BhRifZZICczaBgGx7Omnp9dLNe+cRjPoH/PuyT7u15RmglHrtnjHw/KVG 0G8Mza1a6Idg5uG5XFEJdopdPw6sq/riJ1T5dGL1jW5s83hKLG0iUiJgIn5Bv+8yzkDFl5wsuzm ptWOtNuvrhspDmhQ75KoNbLMJjJ/DtHSXiuq97XnWj4UBH5ald7o093PFxJymya6CIRZMIPykOF 2TBxg29IWQUC60+/0utSURLp76tHggaZC6BA0q3TfXYY0NJmGZ2hD1Mg== X-Received: by 2002:a17:907:868f:b0:b87:fad:442b with SMTP id a640c23a62f3a-b8edf11f316mr720701766b.3.1770655966298; Mon, 09 Feb 2026 08:52:46 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 08/16] xen/riscv: introduce basic vtimer infrastructure for guests Date: Mon, 9 Feb 2026 17:52:21 +0100 Message-ID: <792ea928d748e9ff7bd331b8e8b0262695a062e9.1770650552.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Lay the groundwork for guest timer support by introducing a per-vCPU virtual timer backed by Xen’s common timer infrastructure. The virtual timer is programmed in response to the guest SBI sbi_set_timer() call and injects a virtual supervisor timer interrupt into the vCPU when it expires. While a dedicated struct vtimer is not strictly required at present, it is expected to become necessary once SSTC support is introduced. In particular, it will need to carry additional state such as whether SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) to be saved and restored across context switches, and time delta state (e.g. HTIMEDELTA) required for use cases such as migration. Introducing struct vtimer now avoids a later refactoring. Signed-off-by: Oleksii Kurochko --- Changes in v3: - use one container_of() to get vcpu instead of two container_of()s. --- Changes in v2: - Drop domain_vtimer_init() as it does nothing. - Drop "struct vcpu *v;" from struct vtimer as it could be taken from arch_vcpu using container_of(). - Drop vtimer_initialized, use t->status == TIMER_STATUS_invalid instead to understand if timer was or wasn't initialized. - Drop inclusion of xen/domain.h as xen/sched.h already includes it. - s/ xen/time.h/ xen.timer.h in vtimer.c. - Drop ULL in if-conidtion in vtimer_set_timer() as with the cast it isn't necessary to have suffix ULL. - Add migrate timer to vtimer_set_timer() to be sure that vtimer will occur on pCPU it was ran, so the signalling to that vCPU will (commonly) be cheaper. - Check if the timeout has already expired and just inject the event in vtimer_vtimer_set_timer(). - Drop const for ticks argument of vtimer_set_timer(). - Merge two patches to one: - xen/riscv: introduce vtimer - xen/riscv: introduce vtimer_set_timer() and vtimer_expired() --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 8 +++- xen/arch/riscv/include/asm/domain.h | 3 ++ xen/arch/riscv/include/asm/vtimer.h | 20 ++++++++ xen/arch/riscv/vtimer.c | 71 +++++++++++++++++++++++++++++ 5 files changed, 101 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 868514c25006..7439d029cc45 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,6 +22,7 @@ obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ +obj-y += vtimer.o $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 67437912605a..3f4b062b6ce8 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -10,6 +10,7 @@ #include #include #include +#include #define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ BIT(CAUSE_FETCH_ACCESS, U) | \ @@ -105,11 +106,14 @@ int arch_vcpu_create(struct vcpu *v) if ( is_idle_vcpu(v) ) return rc; + if ( (rc = vcpu_vtimer_init(v)) ) + goto fail; + /* - * As the vtimer and interrupt controller (IC) are not yet implemented, + * As interrupt controller (IC) is not yet implemented, * return an error. * - * TODO: Drop this once the vtimer and IC are implemented. + * TODO: Drop this once IC is implemented. */ rc = -EOPNOTSUPP; goto fail; diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index de5aecb862b5..b5a8a9f711ac 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -8,6 +8,7 @@ #include #include +#include struct vcpu_vmid { uint64_t generation; @@ -49,6 +50,8 @@ struct arch_vcpu { struct cpu_info *cpu_info; + struct vtimer vtimer; + register_t hcounteren; register_t hedeleg; register_t henvcfg; diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h new file mode 100644 index 000000000000..0d1555511755 --- /dev/null +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * (c) 2023-2024 Vates + */ + +#ifndef ASM__RISCV__VTIMER_H +#define ASM__RISCV__VTIMER_H + +#include + +struct vtimer { + struct timer timer; +}; + +int vcpu_vtimer_init(struct vcpu *v); +void vcpu_timer_destroy(struct vcpu *v); + +void vtimer_set_timer(struct vtimer *t, uint64_t ticks); + +#endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c new file mode 100644 index 000000000000..32d142bcdfcd --- /dev/null +++ b/xen/arch/riscv/vtimer.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include + +static void vtimer_expired(void *data) +{ + struct vtimer *t = data; + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + + vcpu_set_interrupt(v, IRQ_VS_TIMER); +} + +int vcpu_vtimer_init(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + init_timer(&t->timer, vtimer_expired, t, v->processor); + + return 0; +} + +void vcpu_timer_destroy(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + if ( t->timer.status == TIMER_STATUS_invalid ) + return; + + kill_timer(&v->arch.vtimer.timer); +} + +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) +{ + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + s_time_t expires = ticks_to_ns(ticks - boot_clock_cycles); + + vcpu_unset_interrupt(v, IRQ_VS_TIMER); + + /* + * According to the RISC-V sbi spec: + * If the supervisor wishes to clear the timer interrupt without + * scheduling the next timer event, it can either request a timer + * interrupt infinitely far into the future (i.e., (uint64_t)-1), + * or it can instead mask the timer interrupt by clearing sie.STIE CSR + * bit. + */ + if ( ticks == ((uint64_t)~0) ) + { + stop_timer(&t->timer); + + return; + } + + if ( expires < NOW() ) + { + /* + * Simplify the logic if the timeout has already expired and just + * inject the event. + */ + stop_timer(&t->timer); + vcpu_set_interrupt(v, IRQ_VS_TIMER); + + return; + } + + migrate_timer(&t->timer, smp_processor_id()); + set_timer(&t->timer, expires); +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225786.1532373 (Exim 4.92) (envelope-from ) id 1vpUV9-0007ty-RE; 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Any attempt to access it will raise an illegal-instruction exception. Guard the hstateen0 dump with a runtime check for Smstateen support to avoid triggering traps when dumping CSRs on systems that do not implement this extension. Fixes: 3babc8d2e546 ("xen/riscv: dump GPRs and CSRs on unexpected traps") Signed-off-by: Oleksii Kurochko --- Changes in V3: - New patch --- xen/arch/riscv/cpufeature.c | 1 + xen/arch/riscv/include/asm/cpufeature.h | 1 + xen/arch/riscv/traps.c | 8 +++++++- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 02b68aeaa49f..03e27b037be0 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -137,6 +137,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(zbb), RISCV_ISA_EXT_DATA(zbs), RISCV_ISA_EXT_DATA(smaia), + RISCV_ISA_EXT_DATA(smstateen), RISCV_ISA_EXT_DATA(ssaia), RISCV_ISA_EXT_DATA(svade), RISCV_ISA_EXT_DATA(svpbmt), diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index b69616038888..ef02a3e26d2c 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -36,6 +36,7 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_zbb, RISCV_ISA_EXT_zbs, RISCV_ISA_EXT_smaia, + RISCV_ISA_EXT_smstateen, RISCV_ISA_EXT_ssaia, RISCV_ISA_EXT_svade, RISCV_ISA_EXT_svpbmt, diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 34920f4e5693..c81a4f79a0d2 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include @@ -144,7 +145,12 @@ static void dump_csrs(const char *ctx) (v & HSTATUS_SPV) ? " SPV" : "", (v & HSTATUS_GVA) ? " GVA" : ""); X(hgatp, CSR_HGATP, "\n"); - X(hstateen0, CSR_HSTATEEN0, "\n"); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + X(hstateen0, CSR_HSTATEEN0, "\n"); + } + X(stvec, CSR_STVEC, " "); X(vstvec, CSR_VSTVEC, "\n"); X(sepc, CSR_SEPC, " "); X(vsepc, CSR_VSEPC, "\n"); X(stval, CSR_STVAL, " "); X(vstval, CSR_VSTVAL, "\n"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225784.1532356 (Exim 4.92) (envelope-from ) id 1vpUV8-0007Zw-79; Mon, 09 Feb 2026 16:52:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225784.1532356; Mon, 09 Feb 2026 16:52:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUV8-0007Zp-3y; Mon, 09 Feb 2026 16:52:42 +0000 Received: by outflank-mailman (input) for mailman id 1225784; Mon, 09 Feb 2026 16:52:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUV6-0007Zd-LK for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:40 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bdca6d60-05d7-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:52:38 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b88593aa4dcso633197966b.3 for ; Mon, 09 Feb 2026 08:52:38 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Since the SSTC extension is not supported by Xen, an emulated (SBI-based) timer is required. To address this, a virtual timer built on Xen’s timer infrastructure is introduced, with save/restore support and SBI-based programming. To provide full guest software–based timer support, the following components are also introduced: - arch_vcpu_{create,destroy}() to initialize the virtual timer and other vCPU-related state not directly tied to timer functionality. As part of this work, struct arch_vcpu is introduced to describe the internal state of a virtual CPU, along with vcpu_csr_init() to initialize the relevant CSR state. - Support functions required by the virtual timer, including: - vcpu_kick(), and a stub implementation of smp_send_event_check_mask() (since SMP is not yet supported in Xen), which is used by vcpu_kick(). - Support for guest timer programming via interception of the SBI legacy SET_TIMER call from guest. - Implement reprogram_timer() using introduced sbi_set_timer(). - Initial lockless tracking of pending vCPU interrupts using atomic bitmaps. - Handling of hypervisor timer interrupts and dispatch into Xen’s generic timer softirq. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2314656143 --- Changes in v3: - Squash patch "xen/riscv: introduce struct arch_vcpu" into other patches of the patch series. - Merged to staging: - xen/riscv: implement stub for smp_send_event_check_mask() - Address other comments from ML. --- Changes in v2: - Add consumer part of tracking of pending vCPU interrupts. - Split patch "xen/riscv: init tasklet subsystem" to two. - Patches were acked: - xen/riscv: introduce vcpu_kick() implementation - xen/riscv: implement SBI legacy SET_TIMER support for guests - All other changes are patch-specific. Please check them. --- Oleksii Kurochko (16): xen/riscv: implement arch_vcpu_{create,destroy}() xen/riscv: avoid reading hstateen0 when Smstateen is not implemented xen/riscv: detect and store supported hypervisor CSR bits at boot xen/riscv: implement vcpu_csr_init() xen/riscv: introduce tracking of pending vCPU interrupts, part 1 xen/riscv: introduce tracking of pending vCPU interrupts, part 2 xen/time: move ticks<->ns helpers to common code xen/riscv: introduce basic vtimer infrastructure for guests xen/riscv: introduce vcpu_kick() implementation xen/riscv: add vtimer context switch helpers xen/riscv: implement SBI legacy SET_TIMER support for guests xen/riscv: introduce sbi_set_timer() xen/riscv: implement reprogram_timer() via SBI xen/riscv: handle hypervisor timer interrupts xen/riscv: init tasklet subsystem xen/riscv: implement sync_vcpu_execstate() xen/arch/arm/include/asm/time.h | 3 - xen/arch/arm/time.c | 11 - xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/Makefile | 2 + xen/arch/riscv/cpufeature.c | 1 + xen/arch/riscv/domain.c | 257 ++++++++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/config.h | 3 +- xen/arch/riscv/include/asm/cpufeature.h | 1 + xen/arch/riscv/include/asm/current.h | 8 + xen/arch/riscv/include/asm/domain.h | 58 +++++ xen/arch/riscv/include/asm/perfc_defn.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/include/asm/sbi.h | 18 ++ xen/arch/riscv/include/asm/setup.h | 9 + xen/arch/riscv/include/asm/time.h | 5 - xen/arch/riscv/include/asm/vtimer.h | 23 ++ xen/arch/riscv/sbi.c | 40 ++- xen/arch/riscv/setup.c | 29 +++ xen/arch/riscv/stubs.c | 30 --- xen/arch/riscv/time.c | 44 ++++ xen/arch/riscv/traps.c | 32 ++- xen/arch/riscv/vsbi/legacy-extension.c | 6 + xen/arch/riscv/vtimer.c | 86 +++++++ xen/include/xen/time.h | 11 + 25 files changed, 631 insertions(+), 54 deletions(-) create mode 100644 xen/arch/riscv/domain.c create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225787.1532380 (Exim 4.92) (envelope-from ) id 1vpUVA-0007yt-7o; Mon, 09 Feb 2026 16:52:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225787.1532380; Mon, 09 Feb 2026 16:52:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVA-0007yY-0A; Mon, 09 Feb 2026 16:52:44 +0000 Received: by outflank-mailman (input) for mailman id 1225787; Mon, 09 Feb 2026 16:52:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUV8-0007Zo-Sv for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:42 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bfbf3b32-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:42 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b885e8c6727so487877666b.1 for ; Mon, 09 Feb 2026 08:52:41 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Writing unsupported bits can either be ignored or raise an exception depending on the platform. Detect the set of writable bits for selected hypervisor CSRs at boot and store the resulting masks for later use. This allows safely programming these CSRs during vCPU context switching and avoids relying on hardcoded architectural assumptions. Note that csr_set() is used instead of csr_write() to write all ones to the mask, as the CSRRS instruction, according to the RISC-V specification, sets only those bits that are writable: Any bit that is high in rs1 will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. In contrast, the CSRRW instruction does not take CSR bit writability into account, which could lead to unintended side effects when writing all ones to a CSR. Masks are calculated at the moment only for hdeleg, henvcfg, hideleg, hstateen0 registers as only them are going to be used in the follow up patch. If the Smstateen extension is not implemented, hstateen0 cannot be read because the register is considered non-existent. Instructions that attempt to access a CSR that is not implemented or not visible in the current mode are reserved and will raise an illegal-instruction exception. Signed-off-by: Oleksii Kurochko --- Changes in V3: - New patch. --- xen/arch/riscv/include/asm/setup.h | 9 +++++++++ xen/arch/riscv/setup.c | 26 ++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index c9d69cdf5166..d54f6a2d1d29 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,15 @@ #include +struct csr_masks { + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; +}; + +extern struct csr_masks csr_masks; + #define max_init_domid (0) void setup_mm(void); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9b4835960d20..010489f0b713 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -32,6 +32,8 @@ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); +struct csr_masks __ro_after_init csr_masks; + /** * copy_from_paddr - copy data from a physical address * @dst: destination virtual address @@ -70,6 +72,28 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) return fdt; } +void __init init_csr_masks(void) +{ + register_t old; + +#define X(csr, field) \ + old = csr_read(CSR_##csr); \ + csr_set(CSR_##csr, ULONG_MAX); \ + csr_masks.field = csr_read(CSR_##csr); \ + csr_write(CSR_##csr, old) + + X(HEDELEG, hedeleg); + X(HENVCFG, henvcfg); + X(HIDELEG, hideleg); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + X(HSTATEEN0, hstateen0); + } + +#undef X +} + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { @@ -137,6 +161,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, riscv_fill_hwcap(); + init_csr_masks(); + preinit_xen_time(); intc_preinit(); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225790.1532411 (Exim 4.92) (envelope-from ) id 1vpUVE-0000Lg-0r; Mon, 09 Feb 2026 16:52:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225790.1532411; Mon, 09 Feb 2026 16:52:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVD-0000LF-Oo; Mon, 09 Feb 2026 16:52:47 +0000 Received: by outflank-mailman (input) for mailman id 1225790; Mon, 09 Feb 2026 16:52:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVB-0007Zd-UZ for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:45 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c109f96a-05d7-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:52:44 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b8871718b05so750093466b.2 for ; Mon, 09 Feb 2026 08:52:44 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Note that smp_wmb() is used instead of smp_mb__before_atomic() as what we want to guarantee that if a bit in irqs_pending_mask is obversable that the correspondent bit in irqs_pending is observable too. Add lockless tracking of pending vCPU interrupts using atomic bitops. Two bitmaps are introduced: - irqs_pending — interrupts currently pending for the vCPU - irqs_pending_mask — bits that have changed in irqs_pending The design follows a multi-producer, single-consumer model, where the consumer is the vCPU itself. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg_acquire(). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. On RISC-V interrupts are not injected via guest registers, so pending interrupts must be recorded in irqs_pending (using the new vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating HVIP before returning control to the guest. The consumer side is implemented in a follow-up patch. A barrier between updating irqs_pending and setting the corresponding mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees that if the consumer observes a mask bit set, the corresponding pending bit is also visible. This prevents missed interrupts during the flush. It is possible a guest could have pending bit not result in the hardware register without to be marked pending in irq_pending bitmap as: According to the RISC-V ISA specification: Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and interrupt-enable bits for VS-level software interrupts. VSSIP in hip is an alias (writable) of the same bit in hvip. Additionally: When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and hie.VSSIE. This means the guest may modify vsip.SSIP, which implicitly updates hip.VSSIP and the bit being writable with 1 would also trigger an interrupt as according to the RISC-V spec: These conditions for an interrupt trap to occur must be evaluated in a bounded amount of time from when an interrupt becomes, or ceases to be, pending in sip, and must also be evaluated immediately following the execution of an SRET instruction or an explicit write to a CSR on which these interrupt trap conditions expressly depend (including sip, sie and sstatus). What means that IRQ_VS_SOFT must be synchronized separately, what is done in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as PMU isn't supported now. For the remaining VS-level interrupt types (IRQ_VS_TIMER and IRQ_VS_EXT), the specification states they cannot be modified by the guest and are read-only: Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable bits for VS-level external interrupts. VSEIP is read-only in hip, and is the logical-OR of these interrupt sources: • bit VSEIP of hvip; • the bit of hgeip selected by hstatus.VGEIN; and • any other platform-specific external interrupt signal directed to VS-level. Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the logical-OR of hvip.VSTIP and any other platform-specific timer interrupt signal directed to VS-level. Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() and vcpu_unset_interrupt(), and flush them during the call of vcpu_flush_interrupts() (which is introduced in follow up patch). vcpu_sync_interrupts(), which is called just before entering the VM, slightly bends the rule that the irqs_pending bit must be written first, followed by updating the corresponding bit in irqs_pending_mask. However, it still respects the core guarantee that the producer never clears the mask and only writes to irqs_pending if it is the one that flipped the corresponding mask bit from 0 to 1. Moreover, since the consumer won't run concurrently because vcpu_sync_interrupts() and the consumer path are going to be invoked equentially immediately before VM entry, it is safe to slightly relax this ordering rule in vcpu_sync_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v3: - Use smp_wb() instead of smp_mb__before_atomic(). - Add explanation of the change above in the commit message. - Move vcpu_sync_interrupts() here to producers side. - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() is called. --- Changes in V2: - Move the patch before an introduction of vtimer. - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as vcpu structure starts out all zeros. - Drop const for irq argument of vcpu_{un}set_interrupt(). - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. - Drop IRQ_LOCAL_MAX as there is no usage for it now. --- xen/arch/riscv/domain.c | 70 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 24 ++++++++++ xen/arch/riscv/traps.c | 8 ++++ 3 files changed, 102 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index af9586a4eb0d..4513f778cdc4 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) { vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); } + +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) +{ + /* + * We only allow VS-mode software, timer, and external + * interrupts when irq is one of the local interrupts + * defined by RISC-V privilege specification. + */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + set_bit(irq, v->arch.irqs_pending); + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + vcpu_kick(v); + + return 0; +} + +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) +{ + /* + * We only allow VS-mode software, timer, external + * interrupts when irq is one of the local interrupts + * defined by RISC-V privilege specification. + */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + clear_bit(irq, v->arch.irqs_pending); + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + return 0; +} + +void vcpu_sync_interrupts(struct vcpu *v) +{ + unsigned long hvip; + + /* Read current HVIP and VSIE CSRs */ + v->arch.vsie = csr_read(CSR_VSIE); + + /* Sync-up HVIP.VSSIP bit changes done by Guest */ + hvip = csr_read(CSR_HVIP); + if ( (v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL) && + !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) ) + { + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + else + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + } + + /* + * Sync-up AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported + * now. + */ +#ifdef CONFIG_RISCV_32 +# error "Update v->arch.vsieh" +#endif +} diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6bb06a50c6ab..8d9432ec5a8b 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,25 @@ struct arch_vcpu { register_t henvcfg; register_t hideleg; register_t hstateen0; + register_t hvip; + + register_t vsie; + + /* + * VCPU interrupts + * + * We have a lockless approach for tracking pending VCPU interrupts + * implemented using atomic bitops. The irqs_pending bitmap represent + * pending interrupts whereas irqs_pending_mask represent bits changed + * in irqs_pending. Our approach is modeled around multiple producer + * and single consumer problem where the consumer is the VCPU itself. + * + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts + * on RV32 host. + */ +#define RISCV_VCPU_NR_IRQS 64 + DECLARE_BITMAP(irqs_pending, RISCV_VCPU_NR_IRQS); + DECLARE_BITMAP(irqs_pending_mask, RISCV_VCPU_NR_IRQS); }; struct paging_domain { @@ -92,6 +111,11 @@ static inline void update_guest_memory_policy(struct vcpu *v, static inline void arch_vcpu_block(struct vcpu *v) {} +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); + +void vcpu_sync_interrupts(struct vcpu *v); + #endif /* ASM__RISCV__DOMAIN_H */ /* diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index c81a4f79a0d2..82e1dc59cdea 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -169,6 +169,11 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +static void check_for_pcpu_work(void) +{ + vcpu_sync_interrupts(current); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -222,6 +227,9 @@ void do_trap(struct cpu_user_regs *cpu_regs) do_unexpected_trap(cpu_regs); break; } + + if ( cpu_regs->hstatus & HSTATUS_SPV ) + check_for_pcpu_work(); } void vcpu_show_execution_state(struct vcpu *v) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225788.1532396 (Exim 4.92) (envelope-from ) id 1vpUVC-0008Th-9g; Mon, 09 Feb 2026 16:52:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225788.1532396; Mon, 09 Feb 2026 16:52:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVC-0008TX-6P; Mon, 09 Feb 2026 16:52:46 +0000 Received: by outflank-mailman (input) for mailman id 1225788; Mon, 09 Feb 2026 16:52:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVA-0007Zd-Hm for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:44 +0000 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [2a00:1450:4864:20::632]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c03d163d-05d7-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:52:42 +0100 (CET) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-b884a84e655so678536366b.0 for ; Mon, 09 Feb 2026 08:52:42 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8edacf1564sm415776866b.52.2026.02.09.08.52.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 08:52:41 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c03d163d-05d7-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770655962; x=1771260762; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EKSs5oLs7wKY5onKUxL0luWYu7wbrnabRL4F2MZ4aOo=; b=IKnlpJU8Rpx6G4T98OUGeQiHevEPOitBsq15/zwJF3DMqkinFf0vuOczod14ZWLFMZ uD3zzlDOlQ0MuvRn5aEMcYuF/zfHadks+SYWEpri+nJ0VX0LCpUdCetiZggqyKvkewIp YC5/+fh3RS3Z8sdhBv3fW2kHDM+vFZyPeouxy4xelqv+GVZwtQq1+zUToPreefYXDmTB JdaGx0g6Xsv+78hIO33qpoyVNQwxdUL3b+nuCBMywpw0OweqyADk1zMmcOB/euEW6QOU GTK0ZY2k+bQWJFycU7arJahriuLTRK1CGf2S1dOr2GGE0KSkEvwMeM+odfMUTZGWlg61 NH1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770655962; x=1771260762; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=EKSs5oLs7wKY5onKUxL0luWYu7wbrnabRL4F2MZ4aOo=; b=PNrN4EfIEmzFNuuctVl6/TDLN9nMGyULLoDq4QaNYBubeb+g/WAfNuk+OxkewoRslK guMSkMDzrIJOiZCiWm2Z+UcGK9mk0nySxOLakhARi02yedY0eSDId5G8NM9Z2xgpIVzt RH6aiHh5JkOJm6fovmdW9xSulavdRnkbGA/ff0nU2BthICrwdJyI6hH8N1DgBLGyPn1w IU+q71DbsH5J72ZsFblsEYBCWnTkAxMlO9cAEWwfVSTkySP3K1/pbTvur0vvaAX9ZoN0 fXdaQXNOznmiUf56ywVmf7MYuQSWyzNNKzw7NoBytjINqSIf09Ptpflz6+m1cA8uxptN sYwQ== X-Gm-Message-State: AOJu0YyHByASxPQTGEBrL1AZqpqa+STJ5kg3SUwjKT5f3x8LwzJGP+EZ rnLheVT0YfmLe/5xrAPeqQSAKnZcu658CD9o8ISBDgYBHME7iyPCKCUXW1jdNeUL X-Gm-Gg: AZuq6aIQcveX+epL76c55I8DDmIgxYmiiAhVrmQVEy1NLv6/XaKiT8ZimeH0SD5UJD2 9cnwnzVa/I+ztCthYKVPQZikXi0wNNz73a2YBc81Aej4nNWmtJ0J9yiGcgan7RcxNCpMHNXfsT3 xU559fJdCfZc8pKhzJtb8bVpE3eG87NO1bAfxbaMPxz5q/H85KRxpRe6oLJ2EkMZ52rYY+ILPY2 ija62YUE7jOgMJifgkhitaPRdBdqm/CxvacwErJcZVRK1LxPOpYyo9uu6waFlpv53RkkLES7ZQn kP9v3zkhTtnlYU7/1J8W9wpvTt1HZkjtX8betnk1crAFyAOqj5YADayl4N2KcHX/Q5tEMz7nPJB rebN3PhjEZxtt5fix76cP8X6NQDYyaf2jv1aQhVGmIlhlSuesnlwLfGsXWdDzAAS2mmSz2tCL1q mWI5HgolOCcozZL8uUFR9k31km7SJo+KHKIOtopCnGAv1Ui2OaGc541w== X-Received: by 2002:a17:907:a45:b0:b8e:a1ae:f96a with SMTP id a640c23a62f3a-b8edf38cbf3mr741790166b.46.1770655961769; Mon, 09 Feb 2026 08:52:41 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 04/16] xen/riscv: implement vcpu_csr_init() Date: Mon, 9 Feb 2026 17:52:17 +0100 Message-ID: <212accf20032cc9cbe6c33752fa45de1c1284e3c.1770650552.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce vcpu_csr_init() to initialise hypervisor CSRs that control vCPU execution and virtualization behaviour before the vCPU is first scheduled. The function configures trap and interrupt delegation to VS-mode by setting the appropriate bits in the hedeleg and hideleg registers, initializes hstatus so that execution enters VS-mode when control is passed to the guest, and restricts guest access to hardware performance counters by initializing hcounteren, as unrestricted access would require additional handling in Xen. When the Smstateen and SSAIA extensions are available, access to AIA CSRs and IMSIC guest interrupt files is enabled by setting the corresponding bits in hstateen0, avoiding unnecessary traps into Xen (note that SVSLCT(Supervisor Virtual Select) name is used intead of CSRIND as OpenSBI uses such name and riscv_encoding.h is mostly based on it). If the Svpbmt extension is supported, the PBMTE bit is set in henvcfg to allow its use for VS-stage address translation. Guest access to the ENVCFG CSR is also enabled by setting ENVCFG bit in hstateen0, as a guest may need to control certain characteristics of the U-mode (VU-mode when V=1) execution environment. For CSRs that may contain read-only bits (e.g. hedeleg, hideleg, hstateen0), to the written value a correspondent mask is applied to avoid divergence between the software state and the actual CSR contents. As hstatus is not part of struct arch_vcpu (it already resides in struct cpu_user_regs), introduce vcpu_guest_cpu_user_regs() to provide a uniform way to access hstatus and other guest CPU user registers. This establishes a consistent and well-defined initial CSR state for vCPUs prior to their first context switch. Signed-off-by: Oleksii Kurochko --- Changes in v3: - Add hypervisor register used to initalize vCPU state. - Apply masks introduced before instead of csr_write()/csr_read() pattern. --- Changes in v2: - As hstatus isn't a part of arch_vcpu structure (as it is already a part of cpu_user_regs) introduce vcpu_guest_cpu_user_regs() to be able to access hstatus and other CPU user regs. - Sort hideleg bit setting by value. Drop a stray blank. - Drop | when the first initialization of hcounteren and hennvcfg happen. - Introduce HEDELEG_DEFAULT. Sort set bits by value and use BIT() macros instead of open-coding it. - Apply pattern csr_write() -> csr_read() for hedeleg and hideleg instead of direct bit setting in v->arch.h{i,e}deleg as it could be that for some reason some bits of hedeleg and hideleg are r/o. The similar patter is used for hstateen0 as some of the bits could be r/o. - Add check that SSAIA is avaialable before setting of SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT bits. - Drop local variables hstatus, hideleg and hedeleg as they aren't used anymore. --- xen/arch/riscv/domain.c | 68 +++++++++++++++++++++ xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/riscv_encoding.h | 2 + 4 files changed, 78 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index d035b105c2cc..af9586a4eb0d 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -5,6 +5,72 @@ #include #include +#include +#include +#include +#include + +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ + BIT(CAUSE_FETCH_ACCESS, U) | \ + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ + BIT(CAUSE_BREAKPOINT, U) | \ + BIT(CAUSE_MISALIGNED_LOAD, U) | \ + BIT(CAUSE_LOAD_ACCESS, U) | \ + BIT(CAUSE_MISALIGNED_STORE, U) | \ + BIT(CAUSE_STORE_ACCESS, U) | \ + BIT(CAUSE_USER_ECALL, U) | \ + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ + BIT(CAUSE_STORE_PAGE_FAULT, U)) + +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) + +static void vcpu_csr_init(struct vcpu *v) +{ + register_t hstateen0; + + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; + + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; + + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; + + /* + * VS should access only the time counter directly. + * Everything else should trap. + */ + v->arch.hcounteren = HCOUNTEREN_TM; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + if (riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia)) + /* + * If the hypervisor extension is implemented, the same three + * bitsare defined also in hypervisor CSR hstateen0 but concern + * only the state potentially accessible to a virtual machine + * executing in privilege modes VS and VU: + * bit 60 CSRs siselect and sireg (really vsiselect and + * vsireg) + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really + * vsiph, vsieh, and vstopi) + * bit 58 all state of IMSIC guest interrupt files, including + * CSR stopei (really vstopei) + * If one of these bits is zero in hstateen0, and the same bit is + * one in mstateen0, then an attempt to access the corresponding + * state from VS or VU-mode raises a virtual instruction exception. + */ + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; + + /* Allow guest to access CSR_ENVCFG */ + hstateen0 |= SMSTATEEN0_HSENVCFG; + + v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0; + } +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); @@ -32,6 +98,8 @@ int arch_vcpu_create(struct vcpu *v) v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; + vcpu_csr_init(v); + /* Idle VCPUs don't need the rest of this setup */ if ( is_idle_vcpu(v) ) return rc; diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 58c9f1506b7c..5fbee8182caa 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -48,6 +48,8 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_cpu_current(cpu) per_cpu(curr_vcpu, cpu) #define guest_cpu_user_regs() ({ BUG_ON("unimplemented"); NULL; }) +#define vcpu_guest_cpu_user_regs(vcpu) \ + (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) #define switch_stack_and_jump(stack, fn) do { \ asm volatile ( \ diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index f78f145258d6..6bb06a50c6ab 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -48,6 +48,12 @@ struct arch_vcpu { } xen_saved_context; struct cpu_info *cpu_info; + + register_t hcounteren; + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; }; struct paging_domain { diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 1f7e612366f8..dd15731a86fa 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -228,6 +228,8 @@ #define ENVCFG_CBIE_INV _UL(0x3) #define ENVCFG_FIOM _UL(0x1) +#define HCOUNTEREN_TM BIT(1, U) + /* ===== User-level CSRs ===== */ /* User Trap Setup (N-extension) */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225789.1532406 (Exim 4.92) (envelope-from ) id 1vpUVD-0000IQ-Jd; Mon, 09 Feb 2026 16:52:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225789.1532406; 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Add the consumer side (vcpu_flush_interrupts()) of the lockless pending interrupt tracking introduced in part 1 (for producers). According, to the design only one consumer is possible, and it is vCPU itself. vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due to the lack of functionality) before the hypervisor returns control to the guest. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg() (with aquire & release semantics). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. The worst thing which could happen with such approach is that a new pending bit will be set to irqs_pending bitmap during update of hvip variable in vcpu_flush_interrupt() but it isn't problem as the new pending bit won't be lost and just be proceded during the next flush. As AIA specs introduced hviph register which would want to be updated when guest related AIA code vcpu_update_hvip() is introduced instead of just open-code it in vcpu_flush_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v3: - Update the error message in case of RV32 from "hviph" to v->arch.hviph. - Make const argument of vcpu_update_hvip. - Move local variables mask and val inside if() in vcpu_flush_interrupts(). - Call vcpu_flush_interrupts() in check_pcpu_work(). - Move vcpu_update_hvip() inside if() in vcpu_flush_interrupts(). --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 33 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/traps.c | 2 ++ 3 files changed, 36 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 4513f778cdc4..67437912605a 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -194,3 +194,36 @@ void vcpu_sync_interrupts(struct vcpu *v) # error "Update v->arch.vsieh" #endif } + +static void vcpu_update_hvip(const struct vcpu *v) +{ + csr_write(CSR_HVIP, v->arch.hvip); +} + +void vcpu_flush_interrupts(struct vcpu *v) +{ + register_t *hvip = &v->arch.hvip; + + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) + { + unsigned long mask, val; + + mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); + val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; + + *hvip &= ~mask; + *hvip |= val; + + /* + * Flush AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't + * supported now. + */ +#ifdef CONFIG_RISCV_32 + # error "Update v->arch.hviph" +#endif + + vcpu_update_hvip(v); + } +} diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 8d9432ec5a8b..de5aecb862b5 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -115,6 +115,7 @@ int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); void vcpu_sync_interrupts(struct vcpu *v); +void vcpu_flush_interrupts(struct vcpu *v); #endif /* ASM__RISCV__DOMAIN_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 82e1dc59cdea..676a2da55811 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -172,6 +172,8 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) static void check_for_pcpu_work(void) { vcpu_sync_interrupts(current); + + vcpu_flush_interrupts(current); } void do_trap(struct cpu_user_regs *cpu_regs) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225793.1532438 (Exim 4.92) (envelope-from ) id 1vpUVG-00012U-MU; Mon, 09 Feb 2026 16:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225793.1532438; Mon, 09 Feb 2026 16:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVG-00011Z-Bw; Mon, 09 Feb 2026 16:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1225793; Mon, 09 Feb 2026 16:52:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVF-0007Zo-1S for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:49 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c3a33c6d-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:48 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b8838339fc6so424017066b.0 for ; Mon, 09 Feb 2026 08:52:48 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This mirrors the behavior of Arm and enables proper vCPU wakeup handling on RISC-V. Remove the stub implementation from stubs.c, as it is now provided by arch/riscv/domain.c. Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, for example, by randconfig what will lead to CI build issues. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3: - Add asm/perfc_defn.h to provide vcpu_kick perfcoounter to cover the case when CONFIG_PERF_COUNTERS=y. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/domain.c | 14 ++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/perfc_defn.h | 3 +++ xen/arch/riscv/stubs.c | 5 ----- 4 files changed, 17 insertions(+), 6 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 3f4b062b6ce8..30a966f53c1d 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include +#include #include #include @@ -231,3 +233,15 @@ void vcpu_flush_interrupts(struct vcpu *v) vcpu_update_hvip(v); } } + +void vcpu_kick(struct vcpu *v) +{ + bool running = v->is_running; + + vcpu_unblock(v); + if ( running && v != current ) + { + perfc_incr(vcpu_kick); + smp_send_event_check_mask(cpumask_of(v->processor)); + } +} diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index 3824f31c395c..86c56251d5d7 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -7,7 +7,6 @@ generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h generic-y += percpu.h -generic-y += perfc_defn.h generic-y += random.h generic-y += softirq.h generic-y += vm_event.h diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h new file mode 100644 index 000000000000..8a4b945df662 --- /dev/null +++ b/xen/arch/riscv/include/asm/perfc_defn.h @@ -0,0 +1,3 @@ +/* This file is intended to be included multiple times. */ + +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index c5784a436574..1f0add97b361 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -208,11 +208,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_kick(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - unsigned long hypercall_create_continuation(unsigned int op, const char *format, ...) { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225795.1532456 (Exim 4.92) (envelope-from ) id 1vpUVJ-0001ca-2k; Mon, 09 Feb 2026 16:52:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225795.1532456; Mon, 09 Feb 2026 16:52:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVI-0001bj-Nw; Mon, 09 Feb 2026 16:52:52 +0000 Received: by outflank-mailman (input) for mailman id 1225795; Mon, 09 Feb 2026 16:52:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVH-0007Zo-0t for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:51 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c457e3b0-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:49 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b8710c9cddbso366417966b.2 for ; Mon, 09 Feb 2026 08:52:49 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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At present, vtimer_ctxt_switch_from() is a no-op because the RISC-V SSTC extension, which provides a virtualization-aware timer, is not yet supported. Xen therefore relies the virtual (SBI-based) timer. The virtual timer uses Xen's internal timer infrastructure and must be associated with the pCPU on which the vCPU is currently running so that timer events can be delivered efficiently. As a result, vtimer_ctxt_switch_to() migrates the timer to the target pCPU when a vCPU is scheduled in. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3: - s/vtimer_ctx_switch_to/vtimer_ctxt_switch_to - s/vtimer_ctx_switch_from/vtimer_ctxt_switch_from - Add Acked-by: Jan Beulich . --- Changes in v2: - Align the parameters names for vtimer_ctx_switch_from() and vtimer_ctx_switch_to() in declarations to match the ones in the defintions to make Misra happy. - s/vtimer_save/vtimer_ctx_switch_from. - s/vtimer_restore/vtimer_ctx_switch_to. - Update the commit message. --- xen/arch/riscv/include/asm/vtimer.h | 3 +++ xen/arch/riscv/vtimer.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h index 0d1555511755..c70b0226515e 100644 --- a/xen/arch/riscv/include/asm/vtimer.h +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -17,4 +17,7 @@ void vcpu_timer_destroy(struct vcpu *v); void vtimer_set_timer(struct vtimer *t, uint64_t ticks); +void vtimer_ctxt_switch_from(struct vcpu *p); +void vtimer_ctxt_switch_to(struct vcpu *n); + #endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c index 32d142bcdfcd..afd8a53a7387 100644 --- a/xen/arch/riscv/vtimer.c +++ b/xen/arch/riscv/vtimer.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include @@ -69,3 +70,17 @@ void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) migrate_timer(&t->timer, smp_processor_id()); set_timer(&t->timer, expires); } + +void vtimer_ctxt_switch_from(struct vcpu *p) +{ + ASSERT(!is_idle_vcpu(p)); + + /* Nothing to do at the moment as SSTC isn't supported now. */ +} + +void vtimer_ctxt_switch_to(struct vcpu *n) +{ + ASSERT(!is_idle_vcpu(n)); + + migrate_timer(&n->arch.vtimer.timer, n->processor); +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225796.1532463 (Exim 4.92) (envelope-from ) id 1vpUVJ-0001jY-UO; Mon, 09 Feb 2026 16:52:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225796.1532463; Mon, 09 Feb 2026 16:52:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVJ-0001fl-A7; Mon, 09 Feb 2026 16:52:53 +0000 Received: by outflank-mailman (input) for mailman id 1225796; Mon, 09 Feb 2026 16:52:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVH-0007Zo-8z for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:51 +0000 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [2a00:1450:4864:20::632]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c4f42146-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:50 +0100 (CET) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-b8eafb515aeso553657466b.1 for ; Mon, 09 Feb 2026 08:52:50 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler now programs the vCPU’s virtual timer via vtimer_set_timer() and returns SBI_SUCCESS. This enables guests using the legacy SBI timer interface to schedule timer events correctly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3: - Nothing changed. Only rebase. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/vsbi/legacy-extension.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c index 2e8df191c295..090c23440cea 100644 --- a/xen/arch/riscv/vsbi/legacy-extension.c +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -7,6 +7,7 @@ #include #include +#include static void vsbi_print_char(char c) { @@ -44,6 +45,11 @@ static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, ret = SBI_ERR_NOT_SUPPORTED; break; + case SBI_EXT_0_1_SET_TIMER: + vtimer_set_timer(¤t->arch.vtimer, regs->a0); + regs->a0 = SBI_SUCCESS; + break; + default: /* * TODO: domain_crash() is acceptable here while things are still under -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225798.1532471 (Exim 4.92) (envelope-from ) id 1vpUVL-00022S-3W; Mon, 09 Feb 2026 16:52:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225798.1532471; Mon, 09 Feb 2026 16:52:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVK-00020U-Sa; Mon, 09 Feb 2026 16:52:54 +0000 Received: by outflank-mailman (input) for mailman id 1225798; Mon, 09 Feb 2026 16:52:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVJ-0007Zo-3U for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:53 +0000 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [2a00:1450:4864:20::630]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c62d15db-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:52 +0100 (CET) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-b88593aa4dcso633232466b.3 for ; Mon, 09 Feb 2026 08:52:52 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The privileged architecture only defines machine-mode timer interrupts (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) is optional and is not supported on the boards available to me, so the only viable approach today is to program the timer through SBI. reprogram_timer() enables/disables the supervisor timer interrupt and programs the next timer deadline using sbi_set_timer(). If the SBI call fails, the code panics, because sbi_set_timer() is expected to return either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to the latest ones). The SBI spec does not define a standard negative error code for this call, and without SSTC there is no alternative method to program the timer, so the SBI timer call must be available. reprogram_timer() currently returns int for compatibility with the existing prototype. While it might be cleaner to return bool, keeping the existing signature avoids premature changes in case sbi_set_timer() ever needs to return other values (based on which we could try to avoid panic-ing) in the future. Signed-off-by: Oleksii Kurochko --- Changes in v3: - Correct the comments in reprogram_timer(). - Move enablement of timer interrupt after sbi_set_timer() to avoid potentially receiving a timer interrupt between these 2 operations. --- Changes in v2: - Add TODO comment above sbi_set_timer() call. - Update the commit message. --- xen/arch/riscv/stubs.c | 5 ----- xen/arch/riscv/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 1f0add97b361..cb7546558b8e 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -21,11 +21,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; /* time.c */ -int reprogram_timer(s_time_t timeout) -{ - BUG_ON("unimplemented"); -} - void send_timer_event(struct vcpu *v) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 2c7af0a5d63b..7efa76fdbcb1 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -7,6 +7,9 @@ #include #include +#include +#include + unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ uint64_t __ro_after_init boot_clock_cycles; @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) cpu_khz = rate / 1000; } +int reprogram_timer(s_time_t timeout) +{ + uint64_t deadline, now; + int rc; + + if ( timeout == 0 ) + { + /* Disable timer interrupt */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; + } + + deadline = ns_to_ticks(timeout) + boot_clock_cycles; + now = get_cycles(); + if ( deadline <= now ) + return 0; + + /* + * TODO: When the SSTC extension is supported, it would be preferable to + * use the supervisor timer registers directly here for better + * performance, since an SBI call and mode switch would no longer + * be required. + * + * This would also reduce reliance on a specific SBI implementation. + * For example, it is not ideal to panic() if sbi_set_timer() returns + * a non-zero value. Currently it can return 0 or -ENOSUPP, and + * without SSTC we still need an implementation because only the + * M-mode timer is available, and it can only be programmed in + * M-mode. + */ + if ( (rc = sbi_set_timer(deadline)) ) + panic("%s: timer wasn't set because: %d\n", __func__, rc); + + /* Enable timer interrupt */ + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; +} + void __init preinit_xen_time(void) { if ( acpi_disabled ) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225799.1532478 (Exim 4.92) (envelope-from ) id 1vpUVL-00029y-RB; Mon, 09 Feb 2026 16:52:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225799.1532478; Mon, 09 Feb 2026 16:52:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVL-00027E-Fa; Mon, 09 Feb 2026 16:52:55 +0000 Received: by outflank-mailman (input) for mailman id 1225799; Mon, 09 Feb 2026 16:52:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVJ-0007Zd-9A for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:53 +0000 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [2a00:1450:4864:20::52b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c579a60a-05d7-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:52:51 +0100 (CET) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-6505cac9879so6220421a12.1 for ; Mon, 09 Feb 2026 08:52:51 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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If the TIME extension is not available, fall back to the legacy timer mechanism. This is useful when Xen runs as a guest under another Xen, because the TIME extension is not currently virtualised and therefore will not appear as available. Despite of the fact that sbi_set_timer_v01 is introduced and used as fall back, SBI v0.1 still isn't fully supported (with the current SBI calls usage, sbi_rfence_v01 should be introduced too), so panic() in sbi_init() isn't removed. The sbi_set_timer() pointer will be used by reprogram_timer() to program Xen’s physical timer as without SSTC extension there is no any other option except SBI call to do that as only M-timer is available for us. Use dprintk() for all the cases to print that a speicifc SBI extension is available as it isn't really necessary in case of release builds. Signed-off-by: Oleksii Kurochko --- Changes in v3: - Init sbi_set_timer with sbi_set_timer_v01 as fallback value. - Sort SBI IDs in the same way as SBI EXT IDs are declared. - Add __ro_after_init for sbi_set_timer variable. - use dprintk instead of printk to print information if SBI ext is available. --- Changes in v2: - Move up defintion of SBI_EXT_TIME_SET_TIMER and use the same padding as defintions around it. - Add an extra comment about stime_value granuality above declaration of sbi_set_timer function pointer. - Refactor implemetation of sbi_set_timer_v02(). - Provide fallback for sbi_set_timer_v01(). - Update the commit message. --- xen/arch/riscv/include/asm/sbi.h | 18 ++++++++++++++ xen/arch/riscv/sbi.c | 40 +++++++++++++++++++++++++++++++- 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index 79f7ff5c5501..a237f8b1393c 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -29,6 +29,7 @@ #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 +#define SBI_EXT_TIME 0x54494D45 /* SBI function IDs for BASE extension */ #define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 @@ -48,6 +49,9 @@ #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 +/* SBI function IDs for TIME extension */ +#define SBI_EXT_TIME_SET_TIMER 0x0 + #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f000000 #define SBI_SPEC_VERSION_MINOR_MASK 0x00ffffff @@ -134,6 +138,20 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, size_t size, unsigned long vmid); +/* + * Programs the clock for next event after stime_value time. This function also + * clears the pending timer interrupt bit. + * If the supervisor wishes to clear the timer interrupt without scheduling the + * next timer event, it can either request a timer interrupt infinitely far + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer + * interrupt by clearing sie.STIE CSR bit. + * The stime_value parameter represents absolute time measured in ticks. + * + * This SBI call returns 0 upon success or an implementation specific negative + * error code. + */ +extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); + /* * Initialize SBI library * diff --git a/xen/arch/riscv/sbi.c b/xen/arch/riscv/sbi.c index 425dce44c679..b4a7ae6940c1 100644 --- a/xen/arch/riscv/sbi.c +++ b/xen/arch/riscv/sbi.c @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, unsigned long arg4, unsigned long arg5); +static int cf_check sbi_set_timer_v02(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +static int cf_check sbi_set_timer_v01(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +int (* __ro_after_init sbi_set_timer)(uint64_t stime_value) = sbi_set_timer_v01; + int sbi_remote_sfence_vma(const cpumask_t *cpu_mask, vaddr_t start, size_t size) { @@ -324,7 +356,13 @@ int __init sbi_init(void) if ( sbi_probe_extension(SBI_EXT_RFENCE) > 0 ) { sbi_rfence = sbi_rfence_v02; - printk("SBI v0.2 RFENCE extension detected\n"); + dprintk(XENLOG_INFO, "SBI v0.2 RFENCE extension detected\n"); + } + + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) + { + sbi_set_timer = sbi_set_timer_v02; + dprintk(XENLOG_INFO, "SBI v0.2 TIME extension detected\n"); } } else -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:52:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:52:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225802.1532497 (Exim 4.92) (envelope-from ) id 1vpUVO-0002vM-UD; Mon, 09 Feb 2026 16:52:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225802.1532497; Mon, 09 Feb 2026 16:52:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVO-0002tp-KE; Mon, 09 Feb 2026 16:52:58 +0000 Received: by outflank-mailman (input) for mailman id 1225802; Mon, 09 Feb 2026 16:52:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVM-0007Zd-7g for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:56 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c74ddf33-05d7-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:52:54 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b86ed375d37so551166166b.3 for ; Mon, 09 Feb 2026 08:52:54 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Update the commit message. - Move implementation of sync_vcpu_execstate() to separate commit as it doesn't connect to tasklet subsystem. --- xen/arch/riscv/setup.c | 3 +++ xen/arch/riscv/stubs.c | 10 ---------- 2 files changed, 3 insertions(+), 10 deletions(-) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 010489f0b713..0cea1435ff32 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -157,6 +158,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, panic("Booting using ACPI isn't supported\n"); } + tasklet_subsys_init(); + init_IRQ(); riscv_fill_hwcap(); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index cb7546558b8e..26434166acc6 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -91,16 +91,6 @@ void continue_running(struct vcpu *same) BUG_ON("unimplemented"); } -void sync_local_execstate(void) -{ - BUG_ON("unimplemented"); -} - -void sync_vcpu_execstate(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - void startup_cpu_idle_loop(void) { BUG_ON("unimplemented"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:56:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:56:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225866.1532507 (Exim 4.92) (envelope-from ) id 1vpUYz-0006p2-ED; Mon, 09 Feb 2026 16:56:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225866.1532507; Mon, 09 Feb 2026 16:56:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUYz-0006ov-9g; Mon, 09 Feb 2026 16:56:41 +0000 Received: by outflank-mailman (input) for mailman id 1225866; Mon, 09 Feb 2026 16:56:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUYy-0006op-4C for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:56:40 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4c368811-05d8-11f1-9ccf-f158ae23cfc8; Mon, 09 Feb 2026 17:56:37 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-47edd9024b1so40269025e9.3 for ; Mon, 09 Feb 2026 08:56:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 08:56:37 -0800 (PST) Message-ID: <7e8669d4-d1b6-47c7-ad08-da14f14fb4a4@suse.com> Date: Mon, 9 Feb 2026 17:56:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/6] xen/console: use memcpy() in console_init_ring() To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-5-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-5-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > @@ -479,11 +479,23 @@ void __init console_init_ring(void) > opt_conring_size = PAGE_SIZE << order; > > nrspin_lock_irqsave(&console_lock, flags); > - for ( i = conringc ; i != conringp; i++ ) > - ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; > + > + start = conringc & (conring_size - 1); > + size = min(conringp - conringc, conring_size); Is this correct when the ring size actually shrinks? In such a case you want to copy the tail of the ring if not all of the original contents fits in the new one. But ... > + chunk = min(size, conring_size - start); > + > + memcpy(&ring[0], &conring[start], chunk); ... you start at its head. > + if ( size > chunk ) > + memcpy(&ring[chunk], &conring[0], size - chunk); > + > + /* Data is moved to [0..size), re-position conring pointers. */ > + conringc = 0; > + conringp = size; Why this unrelated change, which the description also doesn't mention? Since this is in an __init function, there's no race with read_console_ring(), but a static analysis tool may still (validly) spot one. Yet then there's also conring_flush(), which doesn't look to be using any locking either. Have you excluded that this function can run in a racing manner? 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8edacf1564sm415776866b.52.2026.02.09.08.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 08:52:52 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c6c7ab38-05d7-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770655973; x=1771260773; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=imBk95+i3lrNZl16Fz7LHP6T5cVPwdF19P0a+Yv8HIE=; b=BiCJhWGliJdA44LISFmZOUGXwVeR5m2VhAPwWpOYct+tygrQbhJ40YsW3VQ5ShbhBE 3P8SznbEmhCOIQcQKHHyntnT3DbXG9j5PLi53sG/tEZFp8MrgQpaaHco3ZWPgYvyWrGZ zLqlHygHR88oMjOQYWyfe0qD8O2KDQ7jGV564BwxOzhAH7rqUt0Wo3VGBpupMoyhTVws aVzPztwTlJuP82mzKUGWlrSRNwkmdRrHtzthdo8sSuCcKSZLEIrrO6IQ9zu5Jou4P0ZC JwWXayWhI+TMGfRWDbjFXFGilF7KdEm2HZk1BXDldJOtupsSmJOdKltpG8d35IYd4Xdk V+Ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770655973; x=1771260773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=imBk95+i3lrNZl16Fz7LHP6T5cVPwdF19P0a+Yv8HIE=; b=XQPV4nkgkCmUHlvl5imlSELlKgzNiqqxqcRNl5zMcyyEs/Bs8f3gRjkTgu/TemsDAI JpubQYQSe0uUaRZqqrJ0mG3NIGZMilYDHFOGcxVOrGY4rjJg53YpsR7G2JIZp/sRfsn9 MLfv1RxGRdO8+lV7rqYtEOjxx+AJREUW4JlULTPah3LLBparsXgBnUATKLUDiNzUd30E azvgc7nzfn5BEeifIchSi9kyFqgBNSQnciw4RlQlcThxcJzyoW33q5yF6Fj1on8qJ/3H oOJDCUWG7w2qsdyA3ITj0u2KWvWRV/Bgq1g7fQC+tKVwssJFFF97k5t2K7VaRQDkBrx9 UXGQ== X-Gm-Message-State: AOJu0YwvlAfIWOfmf/UfzXeUyDQSnqCb5UY4qKAGeW4KY8g8zpsFeZ2Z u++9tNY6mYIeODNyeyx8ZD+mYsiJCfPA3IhDSMTJ/1XFD4byO5LOrsEkGIHf06DN X-Gm-Gg: AZuq6aLVFPz2lsPPDbTQdk6eZDiKcrlPfqdk3HPUivL5tnAWNMEXmIJzbAIn44SgqVO c1dJdZxXACtX23R/OIG2DbY405EecEEyBAwH5+qwaSU3PfwRkcHXQxcDVG6H6h58+wFeKogUzYi IWNoRE7Olflf3MWjzI1xjlgOGjRZP0Mko5Fk9wpuZ2uvRofXQOCGyP7OG8KWnu2m3fc5D1/dlzL xFCNoDj5hNGALYTYwqMWQfaU/yga4TwuE4xz0WxnAXZW0UKTepE0dRMSYUatm61ITDWrXSkG1uz 3bAI530CToG7ko2sINPf7Lynj5tXRCNRWn5GkKIOubrkm8UsXLkUtSuxyM0tHlJwsa65qib+NsP Bv48I+AWE2bKbzNq4mMpEXcEouUCblicoSWb3I5QJNKjXgeDBuaDJWWwNAm5Z6dEGkepKWiP64S EFWCEGSBEcRQBbpaH8TyD52P/iR5v0ukO2bZT8qVG/xrfEwd1Pa3rc+Y5hprKUnF0u X-Received: by 2002:a17:907:9449:b0:b88:5ef6:17f9 with SMTP id a640c23a62f3a-b8edf15f695mr675946466b.7.1770655972552; Mon, 09 Feb 2026 08:52:52 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 14/16] xen/riscv: handle hypervisor timer interrupts Date: Mon, 9 Feb 2026 17:52:27 +0100 Message-ID: <4658719da8639b382b122bd79124381235d27aaf.1770650552.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce timer_interrupt() to process IRQ_S_TIMER interrupts. The handler disables further timer interrupts by clearing SIE.STIE and raises TIMER_SOFTIRQ so the generic timer subsystem can perform its processing. Update do_trap() to dispatch IRQ_S_TIMER to this new handler. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Drop cause argument of timer_interrupt() as it isn't used inside the function and anyway it is pretty clear what is the cause inside timer_interrupt(). --- xen/arch/riscv/traps.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 676a2da55811..e8d9ca902d9c 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -176,6 +177,15 @@ static void check_for_pcpu_work(void) vcpu_flush_interrupts(current); } +static void timer_interrupt(void) +{ + /* Disable the timer to avoid more interrupts */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + /* Signal the generic timer code to do its work */ + raise_softirq(TIMER_SOFTIRQ); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -217,6 +227,10 @@ void do_trap(struct cpu_user_regs *cpu_regs) intc_handle_external_irqs(cpu_regs); break; + case IRQ_S_TIMER: + timer_interrupt(); + break; + default: intr_handled = false; break; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 16:59:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 16:59:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225910.1532525 (Exim 4.92) (envelope-from ) id 1vpUbB-0000Aj-21; Mon, 09 Feb 2026 16:58:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225910.1532525; Mon, 09 Feb 2026 16:58:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUbA-0000Ac-Vb; Mon, 09 Feb 2026 16:58:56 +0000 Received: by outflank-mailman (input) for mailman id 1225910; Mon, 09 Feb 2026 16:58:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUVM-0007Zo-Bh for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 16:52:56 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c801b671-05d7-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 17:52:55 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-65808bb859cso6855045a12.2 for ; Mon, 09 Feb 2026 08:52:55 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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RISC-V does not support lazy context switching, so nothing is done in sync_vcpu_execstate() and sync_local_execstate(). Signed-off-by: Oleksii Kurochko --- This patch is dependent on patch from ML: [PATCH] sched: move vCPU exec state barriers --- Changes in v3: - Align sync_vcpu_execstate() with patch: [PATCH] sched: move vCPU exec state barriers --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 30a966f53c1d..ecb4ef8d0c89 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -245,3 +245,13 @@ void vcpu_kick(struct vcpu *v) smp_send_event_check_mask(cpumask_of(v->processor)); } } + +void sync_local_execstate(void) +{ + /* Nothing to do -- no lazy switching */ +} + +void sync_vcpu_execstate(struct vcpu *v) +{ + /* Nothing to do -- no lazy switching */ +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 09 17:01:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 17:01:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225925.1532536 (Exim 4.92) (envelope-from ) id 1vpUdd-0001oO-Eh; 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So PV-only + !SHADOW means migrations are >>> impossible? Why can't Xen operate on the PV pagetables rather than using shadow? This question doesn't appear to have been answered. Because PV guests can read their own pagetabes, and need to not see an absence of _PAGE_RW where it has a writeable page. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 09 17:02:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 17:02:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225932.1532546 (Exim 4.92) (envelope-from ) id 1vpUez-0002J0-OU; Mon, 09 Feb 2026 17:02:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225932.1532546; Mon, 09 Feb 2026 17:02:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUez-0002It-LC; Mon, 09 Feb 2026 17:02:53 +0000 Received: by outflank-mailman (input) for mailman id 1225932; Mon, 09 Feb 2026 17:02:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpUez-0002In-32 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 17:02:53 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2b37ddca-05d9-11f1-b162-2bf370ae4941; Mon, 09 Feb 2026 18:02:51 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-47ee07570deso28621155e9.1 for ; Mon, 09 Feb 2026 09:02:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 09 Feb 2026 09:02:50 -0800 (PST) Message-ID: Date: Mon, 9 Feb 2026 18:02:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 5/6] xen/console: update conring memory allocation To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-6-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -463,20 +463,34 @@ static void cf_check conring_dump_keyhandler(unsigned char key) > void __init console_init_ring(void) > { > char *ring; > - unsigned int start, size, chunk, order, memflags; > + unsigned int start, size, chunk; > unsigned long flags; > > if ( !opt_conring_size ) > return; > > - order = get_order_from_bytes(max(opt_conring_size, conring_size)); > - memflags = MEMF_bits(crashinfo_maxaddr_bits); > - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) > + opt_conring_size = max(opt_conring_size, conring_size); > + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > + if ( size != opt_conring_size ) > { > - BUG_ON(order == 0); > - order--; > + opt_conring_size = size; > + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", > + PAGE_SIZE >> 10); > } > - opt_conring_size = PAGE_SIZE << order; > + if ( opt_conring_size >= GB(2) ) > + { > + opt_conring_size = GB(2); > + printk(XENLOG_WARNING "Limiting user-configured console ring size.\n"); > + } > + else if ( opt_conring_size < _CONRING_SIZE ) > + { > + opt_conring_size = _CONRING_SIZE; > + printk(XENLOG_WARNING "Using compile-time console ring size.\n"); > + } > + > + /* Contiguous buffer; does not need to be naturally aligned. */ > + ring = xmalloc_bytes(opt_conring_size); I'm sorry, but I'm going to veto any new uses of xmalloc_bytes(). As per the comment at the top of xvmalloc.h, the family of functions there should be used in new code. That family deliberately doesn't include a counterpart of xmalloc_bytes(). You're wanting a multiple of page size anyway, so perhaps it is warranted here to actually use vmalloc() directly. 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To support more vCPUs, extend > the ioreq server to allocate multiple contiguous ioreq pages based on > the max number of vCPUs. This statement about the upper bound is correct, but it doesn't appear to be what you implement. > diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c > index f5fd30ce12..13c638db53 100644 > --- a/xen/common/ioreq.c > +++ b/xen/common/ioreq.c > @@ -95,12 +95,15 @@ static struct ioreq_server *get_ioreq_server(const struct domain *d, > > static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v) > { > - shared_iopage_t *p = s->ioreq.va; > + unsigned int vcpu_id = v->vcpu_id; > + unsigned int page_idx = vcpu_id / IOREQS_PER_PAGE; > + unsigned int slot_idx = vcpu_id % IOREQS_PER_PAGE; > + shared_iopage_t *p = s->ioreqs.page[page_idx].va; > > ASSERT((v == current) || !vcpu_runnable(v)); > ASSERT(p != NULL); > > - return &p->vcpu_ioreq[v->vcpu_id]; > + return &p->vcpu_ioreq[slot_idx]; Use xvmalloc_array().  It gives you contiguous VAs in Xen even if the underlying memory is non-contiguous. Notably it means you don't need to store the intermediate VAs, and this final line stays the same. > } > > /* > @@ -260,84 +263,120 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) > > static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) > { > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > struct page_info *page; > + unsigned int i, j, nr_pages = buf ? 1 : NR_IOREQ_PAGES; This NR_IOREQ_PAGES needs to not be a constant.  From below, it's:     DIV_ROUND_UP(HVM_MAX_VCPUS, IOREQS_PER_PAGE) but wants to be:     DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE) This way, small VMs only allocate one page, and only larger VMs allocate more. You probably want a predicate taking d as a parameter, to avoid opencoding it everywhere. > > - if ( iorp->page ) > + for ( i = 0; i < nr_pages; i++ ) > { > - /* > - * If a guest frame has already been mapped (which may happen > - * on demand if ioreq_server_get_info() is called), then > - * allocating a page is not permitted. > - */ > - if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) > - return -EPERM; > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > > - return 0; > - } > + if ( iorp->page ) > + { > + /* > + * If a guest frame has already been mapped (which may happen > + * on demand if ioreq_server_get_info() is called), then > + * allocating a page is not permitted. > + */ > + if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) > + return -EPERM; > + continue; /* Already allocated */ Allocation should be done in one location only, and should allocate everything needed. I suspect that most of this complexity will disappear when switching to xvmalloc_array(). > + } > > - page = alloc_domheap_page(s->target, MEMF_no_refcount); > + page = alloc_domheap_page(s->target, MEMF_no_refcount); > + if ( !page ) > + goto fail; > > - if ( !page ) > - return -ENOMEM; > + if ( !get_page_and_type(page, s->target, PGT_writable_page) ) > + { > + /* > + * The domain can't possibly know about this page yet, so failure > + * here is a clear indication of something fishy going on. > + */ > + put_page_alloc_ref(page); > + domain_crash(s->emulator); > + return -ENODATA; > + } > > - if ( !get_page_and_type(page, s->target, PGT_writable_page) ) > - { > - /* > - * The domain can't possibly know about this page yet, so failure > - * here is a clear indication of something fishy going on. > - */ > - domain_crash(s->emulator); > - return -ENODATA; > - } > + /* Assign early so cleanup can find it */ > + iorp->page = page; > > - iorp->va = __map_domain_page_global(page); > - if ( !iorp->va ) > - goto fail; > + iorp->va = __map_domain_page_global(page); > + if ( !iorp->va ) > + goto fail; > + > + clear_page(iorp->va); > + } As a note for the future, if you are doing a bulk indent/deindent, it's generally better to do that in a prep patch.  Such patches are trivial to review (git diff --ignore-all-space returns empty), and it makes the subsequent change in logic legible. > - fail: > - put_page_alloc_ref(page); > - put_page_and_type(page); > +fail: For reasons of differing tooling, labels have a minimum of one space before them. > diff --git a/xen/include/xen/ioreq.h b/xen/include/xen/ioreq.h > index e86f0869fa..8604311cb4 100644 > --- a/xen/include/xen/ioreq.h > +++ b/xen/include/xen/ioreq.h > @@ -19,9 +19,16 @@ > #ifndef __XEN_IOREQ_H__ > #define __XEN_IOREQ_H__ > > +#include xen/macros.h please.  We're trying to remove lib.h > #include > > #include > +#include > +#include Why all 3? > + > +/* 4096 / 32 = 128 ioreq slots per page */ > +#define IOREQS_PER_PAGE (PAGE_SIZE / sizeof(struct ioreq)) > +#define NR_IOREQ_PAGES DIV_ROUND_UP(HVM_MAX_VCPUS, IOREQS_PER_PAGE) IOERQS_PER_PAGE is fine to stay, but as indicated, NR_IOREQ_PAGES needs adjusting. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 09 18:12:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 18:12:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225963.1532567 (Exim 4.92) (envelope-from ) id 1vpVk3-0006LE-3k; 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we shouldn't print out the capability until it's being used. The patch subjects want to be:     x86/svm: Enumerations for virtual NMI and     x86/svm: Use virtual NMI when available Everything here is local to SVM.  Notably there should be no edits to hvm.c or hvm.h.  By introducing hvm_intblk_vnmi, you break NMI injection in other cases.  vNMI is just a hardware-optimised way of handling the hvm_intblk_nmi_iret case. svm_inject_nmi() wants to gain a check to see whether vNMI is enabled, and in the case that it is, simply set vnmi_pending.  You have this partially, but it needs to be dependent on the VMCB vNMI setting, not some global idea of enablement. svm_get_interrupt_shadow() needs a similar adjustment to read vnmi_blocked rather than unconditionally depending on INTERCEPT_IRET. In construct_vmcb(), you need to check cpu_has_svm_vnmi.  I think this change is simple enough to be enabled unconditionally.  (We'll need to change this in due course, but that's going to take other infrastructure which we don't have yet.) I think that's everything that needs altering. A couple of other minor notes: In the vintr_t union, use an anonymous 3 bit field (literally "u64 :3;", which is valid syntax) instead of renumbering the rsvd$N fields.  That will shrink the diff. Xen's style has spaces inside the outermost brackets for control structures, and {'s on new lines.  For the functions you're modifying, just copy the surrounding style. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 09 20:47:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 20:47:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1225997.1532576 (Exim 4.92) (envelope-from ) id 1vpY9o-0006vS-CY; Mon, 09 Feb 2026 20:46:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1225997.1532576; Mon, 09 Feb 2026 20:46:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpY9o-0006vL-99; Mon, 09 Feb 2026 20:46:56 +0000 Received: by outflank-mailman (input) for mailman id 1225997; Mon, 09 Feb 2026 20:46:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpY9m-0006uu-9l for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Wio1BjPJwyTU119d" Content-Disposition: inline In-Reply-To: --Wio1BjPJwyTU119d Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Mon, 9 Feb 2026 21:46:46 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= Cc: linux-kernel@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Peng Jiang , Qiu-ji Chen , Jason Andryuk , "moderated list:XEN HYPERVISOR INTERFACE" Subject: Re: [PATCH] xen/xenbus: better handle backend crash On Mon, Feb 09, 2026 at 10:02:28AM +0100, J=C3=BCrgen Gro=C3=9F wrote: > On 06.02.26 17:57, Marek Marczykowski-G=C3=B3recki wrote: > > On Thu, Jan 29, 2026 at 08:02:35AM +0100, J=C3=BCrgen Gro=C3=9F wrote: > > > On 26.01.26 08:08, J=C3=BCrgen Gro=C3=9F wrote: > > > > On 17.11.25 12:06, J=C3=BCrgen Gro=C3=9F wrote: > > > > > On 02.11.25 04:20, Marek Marczykowski-G=C3=B3recki wrote: > > > > > > When the backend domain crashes, coordinated device cleanup is = not > > > > > > possible (as it involves waiting for the backend state change).= In that > > > > > > case, toolstack forcefully removes frontend xenstore entries. > > > > > > xenbus_dev_changed() handles this case, and triggers device cle= anup. > > > > > > It's possible that toolstack manages to connect new device in t= hat > > > > > > place, before xenbus_dev_changed() notices the old one is missi= ng. If > > > > > > that happens, new one won't be probed and will forever remain in > > > > > > XenbusStateInitialising. > > > > > >=20 > > > > > > Fix this by checking backend-id and if it changes, consider it > > > > > > unplug+plug operation. It's important that cleanup on such unpl= ug > > > > > > doesn't modify xenstore entries (especially the "state" key) as= it > > > > > > belong to the new device to be probed - changing it would derail > > > > > > establishing connection to the new backend (most likely, closin= g the > > > > > > device before it was even connected). Handle this case by setti= ng new > > > > > > xenbus_device->vanished flag to true, and check it before chang= ing state > > > > > > entry. > > > > > >=20 > > > > > > And even if xenbus_dev_changed() correctly detects the device w= as > > > > > > forcefully removed, the cleanup handling is still racy. Since t= his whole > > > > > > handling doesn't happend in a single xenstore transaction, it's= possible > > > > > > that toolstack might put a new device there already. Avoid re-c= reating > > > > > > the state key (which in the case of loosing the race would actu= ally > > > > > > close newly attached device). > > > > > >=20 > > > > > > The problem does not apply to frontend domain crash, as this ca= se > > > > > > involves coordinated cleanup. > > > > > >=20 > > > > > > Problem originally reported at > > > > > > https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#= t, > > > > > > including reproduction steps. > > > > > >=20 > > > > > > Signed-off-by: Marek Marczykowski-G=C3=B3recki > > > > >=20 > > > > > Sorry I didn't get earlier to this. > > > > >=20 > > > > > My main problem with this patch is that it is basically just pape= ring over > > > > > a more general problem. > > > > >=20 > > > > > You are just making the problem much more improbable, but not imp= ossible to > > > > > occur again. In case the new driver domain has the same domid as = the old one > > > > > you can still have the same race. > > > > >=20 > > > > > The clean way to handle that would be to add a unique Id in Xenst= ore to each > > > > > device on the backend side, which can be tested on the frontend s= ide to > > > > > match. In case it doesn't match, an old device with the same kind= and devid > > > > > can be cleaned up. > > > > >=20 > > > > > The unique Id would obviously need to be set by the Xen tools ins= ide the > > > > > transaction writing the initial backend Xenstore nodes, as doing = that from > > > > > the backend would add another potential ambiguity by the driver d= omain > > > > > choosing the same unique id as the previous one did. > > > > >=20 > > > > > The question is whether something like your patch should be used = as a > > > > > fallback in case there is no unique Id on the backend side of the= device > > > > > due to a too old Xen version. > > > >=20 > > > > I think I have found a solution which is much more simple, as it do= esn't > > > > need any change of the protocol or any addition of new identifiers. > > > >=20 > > > > When creating a new PV device, Xen tools will always write all gene= ric > > > > frontend- and backend-nodes. This includes the frontend state, whic= h is > > > > initialized as XenbusStateInitialising. > > > >=20 > > > > The Linux kernel's xenbus driver is already storing the last known = state > > > > of a xenbus device in struct xenbus_device. When changing the state= , the > > > > xenbus driver is even reading the state from Xenstore (even if only= for > > > > making sure the path is still existing). So all what is needed is t= o check, > > > > whether the read current state is matching the locally saved state.= If it > > > > is not matching AND the read state is XenbusStateInitialising, you = can be > > > > sure that the backend has been replaced. > > > >=20 > > > > Handling this will need to check the return value of xenbus_switch_= state() > > > > in all related drivers, but this is just a more or less mechanical = change. > > > >=20 > > > > I'll prepare a patch series for that. > > >=20 > > > In the end the result is more like your patch, avoiding the need to m= odify > > > all drivers. > > >=20 > > > I just added my idea to your patch and modified some of your code to = be more > > > simple. I _think_ I have covered all possible scenarios now, resultin= g in > > > the need to keep the backend id check in case the backend died during= the > > > early init phase of the device. > > >=20 > > > Could you please verify the attached patch is working for you? > >=20 > > Thanks for the patch! > >=20 > > I ran it through relevant tests, and I got inconsistent results. > > Specifically, sometimes, the domU hangs (actually, just one vCPU spins > > inside xenwatch thread). Last console messages are: > >=20 > > systemd[626]: Starting dconf.service - User preferences database... > > gnome-keyring-daemon[975]: =E2=90=9B[0;1;39mcouldn't access contro= l socket: /run/user/1000/keyring/control: No such file or directory=E2=90= =9B[0m > > gnome-keyring-daemon[975]: =E2=90=9B[0;1;38:5:185mdiscover_other_d= aemon: 0=E2=90=9B[0m > > xen vif-0: xenbus: state reset occurred, reconnecting > > gnome-keyring-daemon[974]: =E2=90=9B[0;1;39mcouldn't access contro= l socket: /run/user/1000/keyring/control: No such file or directory=E2=90= =9B[0m > > gnome-keyring-daemon[976]: =E2=90=9B[0;1;39mcouldn't access contro= l socket: /run/user/1000/keyring/control: No such file or directory=E2=90= =9B[0m > > gnome-keyring-daemon[976]: =E2=90=9B[0;1;38:5:185mdiscover_other_d= aemon: 0=E2=90=9B[0m > > gnome-keyring-daemon[974]: =E2=90=9B[0;1;38:5:185mdiscover_other_d= aemon: 0=E2=90=9B[0m > > xen vif-0: xenbus: state reset occurred, reconnecting > > systemd[626]: Started dconf.service - User preferences database. > > xen_netfront: Initialising Xen virtual ethernet driver > > vif vif-0: xenbus: state reset occurred, reconnecting > >=20 > > And the call trace of the spinning xenwatch thread is: > >=20 > > task:xenwatch state:D stack:0 pid:64 tgid:64 ppid= :2 task_flags:0x288040 flags:0x00080000 > > Call Trace: > > > > __schedule+0x2f3/0x780 > > schedule+0x27/0x80 > > xs_wait_for_reply+0xab/0x1f0 > > ? __pfx_autoremove_wake_function+0x10/0x10 > > xs_talkv+0xec/0x200 > > xs_single+0x4a/0x70 > > xenbus_gather+0xe4/0x1a0 > > xenbus_read_driver_state+0x42/0x70 > > xennet_bus_close+0x113/0x2c0 [xen_netfront] > > ? __pfx_autoremove_wake_function+0x10/0x10 > > xennet_remove+0x16/0x80 [xen_netfront] > > xenbus_dev_remove+0x71/0xf0 > > device_release_driver_internal+0x19c/0x200 > > bus_remove_device+0xc6/0x130 > > device_del+0x160/0x3e0 > > device_unregister+0x17/0x60 > > xenbus_dev_changed.cold+0x5e/0x6b > > ? __pfx_xenwatch_thread+0x10/0x10 > > xenwatch_thread+0x92/0x1c0 > > ? __pfx_autoremove_wake_function+0x10/0x10 > > kthread+0xfc/0x240 > > ? __pfx_kthread+0x10/0x10 > > ret_from_fork+0xf5/0x110 > > ? __pfx_kthread+0x10/0x10 > > ret_from_fork_asm+0x1a/0x30 > > > > task:xenbus state:S stack:0 pid:63 tgid:63 ppid= :2 task_flags:0x208040 flags:0x00080000 > > Call Trace: > > > > __schedule+0x2f3/0x780 > > ? __pfx_xenbus_thread+0x10/0x10 > > schedule+0x27/0x80 > > xenbus_thread+0x1a8/0x200 > > ? __pfx_autoremove_wake_function+0x10/0x10 > > kthread+0xfc/0x240 > > ? __pfx_kthread+0x10/0x10 > > ret_from_fork+0xf5/0x110 > > ? __pfx_kthread+0x10/0x10 > > ret_from_fork_asm+0x1a/0x30 > > > >=20 > > (technically, `top` says it's the xenbus thread spinning, but it looks > > like the actual issue is in xenwatch one) > >=20 > > Note that other xenwatch actions in this domU are not executed, for > > example `xl sysrq` does nothing. Not surprising, given xenwatch thread > > is busy... Fortunately, it blocks only a single vCPU, so I'm able to > > interact with the domU over console (to get the above traces). > >=20 > > It isn't a reliable failure, in this test run it failed once, out of 4 > > related tests. > >=20 > > The specific test is: https://github.com/QubesOS/qubes-core-admin/blob/= main/qubes/tests/integ/network.py#L234 > > In short: > > 1. Start a domU > > 2. Pause it > > 3. Attach network (backend is !=3D dom0) > > 4. Unpause > >=20 > > TBH, I'm not sure why the "state reset occurred" message is triggered at > > all, I think it shouldn't be in this case... > >=20 >=20 > Second try. This time it's green: https://openqa.qubes-os.org/tests/166851 :) You can treat it as T-by tag. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Wio1BjPJwyTU119d Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmKR7YACgkQ24/THMrX 1yx6Zwf/Vg7p6rojPha934MdDVbWbu9+dqgnuc8BcDish1Vk5IDYjJSXTPsdjCQh C3ihtGcIRJFSyoxABnERRjSZ60lk4Nl4xsBrnWl/+4pIsAn6U8tEs87dYkK2RywS BAxViQ7OPmEku+cyqWwQVXGN+j/s4nMCnLcmMTuk4PFbW4SkNln68MRTdiRw1i34 oSSL10uS/KihVLspBayzKPRKQQBYyMJURNw86bErv3xLoG0K2bNmH6HxJjh3DXQs jsjTrfHScNUbNgX6Q+Pj8LS3e2B/ERIbk+p09LsfWwgqqf532EW+Ktlo0ZZil+U4 rq9G1pnidgnLyqSqTUDghINWA8y4Yg== =TyC6 -----END PGP SIGNATURE----- --Wio1BjPJwyTU119d-- From xen-devel-bounces@lists.xenproject.org Mon Feb 09 23:23:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 09 Feb 2026 23:23:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226024.1532586 (Exim 4.92) (envelope-from ) id 1vpab8-0008VH-W5; Mon, 09 Feb 2026 23:23:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226024.1532586; Mon, 09 Feb 2026 23:23:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpab8-0008V9-RJ; Mon, 09 Feb 2026 23:23:18 +0000 Received: by outflank-mailman (input) for mailman id 1226024; Mon, 09 Feb 2026 23:23:17 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpab7-0008V3-P6 for xen-devel@lists.xenproject.org; Mon, 09 Feb 2026 23:23:17 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4e025aff-060e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 00:23:14 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id C07E460008; Mon, 9 Feb 2026 23:23:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16A8BC116C6; Mon, 9 Feb 2026 23:23:10 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e025aff-060e-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770679392; bh=hN4f9pbOLQxB9dajd1xH/ubGDR3mYFCXUYLzi5PXPGY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=fM3Gx1E8Ch+SyrTuQ4FDSLA75Z6G9IJ4ZCWitj7MrrG9N2hOpa9rwCx1DsnqEgPvI sVOPC5jvsXm9LUtySqbCRhvccYZuRLL+2t0r7YXLWNvhd9GBqU/YoE3xNy6E8GCgLZ 5kaPVgPypqQclnj723yWFac8DFa9sDk8HHIEiLvb7GvBKZX+8XDSC9+dCxW2PBqGCN 1x3J1zoFc+/ofX4fIJ/Bclu+dcYuty/jdvtnmBruVzziEhKjXGUcxRvFHiBwMwF5Al j1VfdFdBQeQ+WltlIRfLs/BBKsD6fbmg4Za8E+H3g+s+GVGzZNaaBKcwv1AHm27b10 hEYz69WH6azcA== Date: Mon, 9 Feb 2026 15:23:02 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding In-Reply-To: <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> Message-ID: References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 9 Feb 2026, Jan Beulich wrote: > On 05.02.2026 00:37, Stefano Stabellini wrote: > > Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from > > global to VIRQ_DOMAIN to allow other domains to bind to it. > > > > Note that Linux silently falls back to polling when binding fails, which > > masks the issue. > > > > Signed-off-by: Jason Andryuk > > Signed-off-by: Stefano Stabellini > > Technically this is an ABI change, and hence I'm uncertain it can go without > that aspect being at least mentioned, perhaps even its implications properly > discussed. I am not sure if it qualifies as an ABI change or not but I am happy to expand the commit message in any way you might suggest. The jist of it is already in the commit message, really the key element is that VIRQ_CONSOLE can be bound by multiple domains. Aside from spelling out "this is an ABI change" what do you have in mind? From xen-devel-bounces@lists.xenproject.org Tue Feb 10 02:05:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 02:05:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226048.1532596 (Exim 4.92) (envelope-from ) id 1vpd7n-0001rs-FI; Tue, 10 Feb 2026 02:05:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226048.1532596; Tue, 10 Feb 2026 02:05:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpd7n-0001rk-9l; Tue, 10 Feb 2026 02:05:11 +0000 Received: by outflank-mailman (input) for mailman id 1226048; Tue, 10 Feb 2026 02:05:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpd7l-0001re-9X for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 02:05:09 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e9130a1c-0624-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 03:05:03 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id B05214359C; Tue, 10 Feb 2026 02:05:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B0579C116C6; Tue, 10 Feb 2026 02:05:00 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e9130a1c-0624-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770689101; bh=LM97bjY8qg88mpoRk8lwuPzp3ZS80JpbUdkIf7gS4+c=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=pPsjZsePw9LJ3opomhquxJ0dJddIhsilYKzPpejm2N2rrXmJf+dEhNa0lNsRwF9p4 5z/xnGojdSVqIhZZ2waQUiKd3JX8ZuQaMAxetOOfvrovPmXzyG1MhOc9r75m1JT4OV pftOdwxMgo1vgVJ8gzIcPW/ObLR97K/QM4tZzguIelPs6bmIHbISM1Ghzjo6EAr7vr 97RAyQ8Uipe5ZmUPXQ7jMNyleITc38NCZ441K1bXZR2rG8/Y33VTuyxJ+PDLX1WhOe ovIA7foxyBbjRU1POd/93srofk/yBgBM/UohYnayk1c+r5e0C3ZMj4IGCkX9qHUlgC f1COcxU9EQ1gg== Date: Mon, 9 Feb 2026 18:04:59 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v2] x86/cpufreq: Add Kconfig option for CPU frequency scaling In-Reply-To: <42c248e7-9747-4281-9fca-1b9950a06bf8@suse.com> Message-ID: References: <20260206233005.417233-1-stefano.stabellini@amd.com> <42c248e7-9747-4281-9fca-1b9950a06bf8@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 9 Feb 2026, Jan Beulich wrote: > On 07.02.2026 00:30, Stefano Stabellini wrote:> --- a/xen/common/Kconfig > > +++ b/xen/common/Kconfig > > @@ -652,7 +652,7 @@ endmenu > > > > config PM_OP > > bool "Enable Performance Management Operation" > > - depends on ACPI && HAS_CPUFREQ && SYSCTL > > + depends on ACPI && CPUFREQ && SYSCTL > > default y > > help > > This option shall enable userspace performance management control > > @@ -660,7 +660,7 @@ config PM_OP > > > > config PM_STATS > > bool "Enable Performance Management Statistics" > > - depends on ACPI && HAS_CPUFREQ && SYSCTL > > + depends on ACPI && CPUFREQ && SYSCTL > > default y > > help > > Enable collection of performance management statistics to aid in > > Is the original HAS_CPUFREQ misleading here? do_pm_op() (in pm-op.c) is also > doing some C-state related work. You may not compile that out just because of > CPUFREQ=n. Same for pmstat.c. I managed to resolve this with little changes thanks to DCE > > --- a/xen/drivers/cpufreq/Kconfig > > +++ b/xen/drivers/cpufreq/Kconfig > > @@ -1,3 +1,17 @@ > > - > > config HAS_CPUFREQ > > bool > > + > > +config CPUFREQ > > + bool "CPU Frequency scaling" > > + default y > > + depends on HAS_CPUFREQ > > + help > > + Enable CPU frequency scaling and power management governors. > > + This allows Xen to dynamically adjust CPU P-states (performance > > + states) based on system load. > > + > > + Disabling this option removes all cpufreq governors and power > > + management interfaces. This is useful for real-time systems or > > + minimal hypervisor builds. > > + > > + If unsure, say Y. > > Looks like we're trying to get rid of such re-stating of what the default > is. OK > > --- a/xen/include/acpi/cpufreq/cpufreq.h > > +++ b/xen/include/acpi/cpufreq/cpufreq.h > > @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); > > > > int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); > > > > +#ifdef CONFIG_CPUFREQ > > +int cpufreq_add_cpu(unsigned int cpu); > > +int cpufreq_del_cpu(unsigned int cpu); > > If already you move these, please also get rid of the double blanks. OK > > void cpufreq_dbs_timer_suspend(void); > > void cpufreq_dbs_timer_resume(void); > > +#else > > +static inline int cpufreq_add_cpu(unsigned int cpu) { return -ENOSYS; } > > +static inline int cpufreq_del_cpu(unsigned int cpu) { return -ENOSYS; } > > Here and below - no use of ENOSYS, please. EOPNOTSUPP it is everywhere else > (unless dating back very far). OK > > --- a/xen/include/xen/acpi.h > > +++ b/xen/include/xen/acpi.h > > @@ -185,8 +185,14 @@ static inline unsigned int acpi_get_csubstate_limit(void) { return 0; } > > static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } > > #endif > > > > -#ifdef XEN_GUEST_HANDLE > > If you leave this as-is, ... > > > +#if defined(XEN_GUEST_HANDLE) && defined(CONFIG_CPUFREQ) > > int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); > > +#elif defined(XEN_GUEST_HANDLE) > > +static inline int acpi_set_pdc_bits(unsigned int acpi_id, > > + XEN_GUEST_HANDLE(uint32) pdc) > > +{ > > + return -ENOSYS; > > +} > > #endif > > ... the overall result may be a tiny bit tidier. OK > > --- a/xen/include/xen/sched.h > > +++ b/xen/include/xen/sched.h > > @@ -1255,9 +1255,14 @@ static always_inline bool is_iommu_enabled(const struct domain *d) > > extern bool sched_smt_power_savings; > > extern bool sched_disable_smt_switching; > > > > -extern enum cpufreq_controller { > > +enum cpufreq_controller { > > FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen > > -} cpufreq_controller; > > This enum would better ... > > > +}; > > +#ifdef CONFIG_CPUFREQ > > +extern enum cpufreq_controller cpufreq_controller; > > ... stay inside here, then also making the split of type and var decl unnecessary. > > The two affected platform-ops likely want compiling out, too. I am not sure I understood your suggestion. If this is what you are thinking about, it doesn't seem like an improvement. diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1b431fc726..e8f5dfd473 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1255,13 +1255,15 @@ static always_inline bool is_iommu_enabled(const struct domain *d) extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; +#ifdef CONFIG_CPUFREQ enum cpufreq_controller { FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen }; -#ifdef CONFIG_CPUFREQ extern enum cpufreq_controller cpufreq_controller; #else -#define cpufreq_controller FREQCTL_none +#define FREQCTL_none 0 +#define FREQCTL_dom0_kernel 1 +#define cpufreq_controller FREQCTL_none #endif From xen-devel-bounces@lists.xenproject.org Tue Feb 10 05:09:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 05:09:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226065.1532606 (Exim 4.92) (envelope-from ) id 1vpfza-00067S-L6; Tue, 10 Feb 2026 05:08:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226065.1532606; Tue, 10 Feb 2026 05:08:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpfza-00067J-Ff; Tue, 10 Feb 2026 05:08:54 +0000 Received: by outflank-mailman (input) for mailman id 1226065; Tue, 10 Feb 2026 05:08:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpfzZ-00066u-6k for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 05:08:53 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 92d6c0b9-063e-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 06:08:45 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id D4FA06013E; Tue, 10 Feb 2026 05:08:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B8DCC116C6; Tue, 10 Feb 2026 05:08:43 +0000 (UTC) Received: from [10.30.226.235] (localhost [IPv6:::1]) by aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org (Postfix) with ESMTP id 48168380AA5E; Tue, 10 Feb 2026 05:08:40 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 92d6c0b9-063e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770700123; bh=EM6WIzd3Ikv4AEJNmBcx+mzXy3WzpK9Zspqs4PlJe9Q=; h=Subject:From:In-Reply-To:References:Date:To:Cc:From; b=V7nRWMEQ2FU1r3peQawqWqhbwzsWekeTV9PSjrF55AYkP04cwWDt97ENMZcp6+NTO iSyoJEsbHY8UDdy6Ge0Yu7xM8JE4mWHgew7EV6cApfcni61buSxn9ELEXODQx9LHyV DmRGyzg8rtKhaKNnhOMeZf6hvygYIxFpKnoxNKTX8FQiWn2Zckf+v4Yy8OSDHSoPkS SB9WOMmlfWJ481o2SnzdEOX9a75voqtzqI+PPO/gSxzjSQbT+SQ1xVhDPKYHlQ9+RS CgxWPdQdf+mMBIvIdslvRJQ9NktxV8d6iUx2fDTtwn6c7DQTTd1EaTv6bnCcMEjduc hVDS1cvBa/+rQ== Subject: Re: [GIT PULL] xen: branch for v7.0-rc1 From: pr-tracker-bot@kernel.org In-Reply-To: <20260209065018.74473-1-jgross@suse.com> References: <20260209065018.74473-1-jgross@suse.com> X-PR-Tracked-List-Id: X-PR-Tracked-Message-Id: <20260209065018.74473-1-jgross@suse.com> X-PR-Tracked-Remote: git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1-tag X-PR-Tracked-Commit-Id: c307b6dc9c4f68d00524ec10899cdf21466b5c1e X-PR-Merge-Tree: torvalds/linux.git X-PR-Merge-Refname: refs/heads/master X-PR-Merge-Commit-Id: 33120a2f8fc47f388506b7df1209bd5ac85dd584 Message-Id: <177070011886.3352335.14505383591657484674.pr-tracker-bot@kernel.org> Date: Tue, 10 Feb 2026 05:08:38 +0000 To: Juergen Gross Cc: torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org The pull request you sent on Mon, 9 Feb 2026 07:50:18 +0100: > git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1-tag has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/33120a2f8fc47f388506b7df1209bd5ac85dd584 Thank you! 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Mon, 09 Feb 2026 23:47:40 -0800 (PST) Message-ID: <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> Date: Tue, 10 Feb 2026 08:47:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding To: Stefano Stabellini , Daniel Smith Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 00:23, Stefano Stabellini wrote: > On Mon, 9 Feb 2026, Jan Beulich wrote: >> On 05.02.2026 00:37, Stefano Stabellini wrote: >>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from >>> global to VIRQ_DOMAIN to allow other domains to bind to it. >>> >>> Note that Linux silently falls back to polling when binding fails, which >>> masks the issue. >>> >>> Signed-off-by: Jason Andryuk >>> Signed-off-by: Stefano Stabellini >> >> Technically this is an ABI change, and hence I'm uncertain it can go without >> that aspect being at least mentioned, perhaps even its implications properly >> discussed. > > I am not sure if it qualifies as an ABI change or not but I am happy to > expand the commit message in any way you might suggest. > > The jist of it is already in the commit message, really the key element > is that VIRQ_CONSOLE can be bound by multiple domains. > > Aside from spelling out "this is an ABI change" what do you have in > mind? What I mean is discussion of the implications for domains using the vIRQ. Previously most domains would have attempts to bind this vIRQ rejected. Technically it is possible that kernels had code paths blindly doing the binding, relying on it to work only when running as Dom0. And really, you appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, without which its binding wasn't possible at all before (except for the hardware domain, which get_global_virq_handler() falls back to when no other domain is set). Or am I mis-reading things, as I can't spot any use of VIRQ_CONSOLE under tools/, whereas I would have expected provisions for (host) console handling to be delegated to a separate control or console domain? Of course other toolstacks (the XAPI-based one for example) might actually have such provisions. And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type vIRQ-s. Yet this vIRQ isn't supposed to be universally available to every DomU. Instead the ->console->input_allowed checking is kind of substituting such a check, which iirc Daniel said (in more general context) shouldn't ever be done. IOW in patch 5 you're actually effecting policy, which should be XSM's job aiui. Bottom line: The patch may need to be more involved, but at the very least the description would need updating to justify it being as simple as it is right now. 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> >> > } > >> > > >> > + if ( hvm && !hap && !IS_ENABLED(CONFIG_SHADOW_PAGING) ) > >> > + { > >> > + dprintk(XENLOG_INFO, "Shadow paging requested but not available\n"); > >> > >> nit: s/requested/required/, maybe? > > > > The wording matches the rest of the messages in > > arch_sanitise_domain_config(). I'm not saying that makes it correct, > > but if we word this differently we should also change the others > > IMO. > > My point is rather that HAP, or relaxed MSRs, or other settings are actively > requested via createdomain flags. Shadow is instead the consequence of not > setting HAP. You don't request shadow, you either requested something else or > you hit the error. > > It's not terrible wording, just imprecise. Hm, I see. I've always considered not requesting HAP equivalent to requesting shadow. IOW: not setting XEN_DOMCTL_CDF_hap doesn't mean "pick any possible option" but rather it's an explicit request to use shadow paging on HVM. The interface would possibly be cleaner if we had both a HAP and Shadow flags, and lack of any being selected could mean for Xen to pick the default one. Thanks, Roger. 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Tue, 10 Feb 2026 00:05:52 -0800 (PST) Message-ID: <6fc9864f-cd99-4649-a44d-520303571375@suse.com> Date: Tue, 10 Feb 2026 09:05:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/cpufreq: Add Kconfig option for CPU frequency scaling To: Stefano Stabellini Cc: Stefano Stabellini , andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260206233005.417233-1-stefano.stabellini@amd.com> <42c248e7-9747-4281-9fca-1b9950a06bf8@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 03:04, Stefano Stabellini wrote: > On Mon, 9 Feb 2026, Jan Beulich wrote: >> On 07.02.2026 00:30, Stefano Stabellini wrote:> --- a/xen/common/Kconfig >>> --- a/xen/include/xen/sched.h >>> +++ b/xen/include/xen/sched.h >>> @@ -1255,9 +1255,14 @@ static always_inline bool is_iommu_enabled(const struct domain *d) >>> extern bool sched_smt_power_savings; >>> extern bool sched_disable_smt_switching; >>> >>> -extern enum cpufreq_controller { >>> +enum cpufreq_controller { >>> FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen >>> -} cpufreq_controller; >> >> This enum would better ... >> >>> +}; >>> +#ifdef CONFIG_CPUFREQ >>> +extern enum cpufreq_controller cpufreq_controller; >> >> ... stay inside here, then also making the split of type and var decl unnecessary. >> >> The two affected platform-ops likely want compiling out, too. > > I am not sure I understood your suggestion. If this is what you are > thinking about, it doesn't seem like an improvement. > > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -1255,13 +1255,15 @@ static always_inline bool is_iommu_enabled(const struct domain *d) > extern bool sched_smt_power_savings; > extern bool sched_disable_smt_switching; > > +#ifdef CONFIG_CPUFREQ > enum cpufreq_controller { > FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen > }; > -#ifdef CONFIG_CPUFREQ > extern enum cpufreq_controller cpufreq_controller; > #else > -#define cpufreq_controller FREQCTL_none > +#define FREQCTL_none 0 > +#define FREQCTL_dom0_kernel 1 > +#define cpufreq_controller FREQCTL_none > #endif No. FREQCTL_* shouldn't need to be visible at all when CPUFREQ=n. Hence the reference to the two platform-ops, where one (and cpufreq_controller) is used. If those uses are also suitably compiled out, the #define-s above shouldn't be necessary. That said, use of IS_ENABLED() there would of course require the arrangement to stay as you had it originally. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 08:19:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 08:19:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226114.1532649 (Exim 4.92) (envelope-from ) id 1vpiyB-0005q1-Fx; Tue, 10 Feb 2026 08:19:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226114.1532649; Tue, 10 Feb 2026 08:19:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpiyB-0005pu-Cu; Tue, 10 Feb 2026 08:19:39 +0000 Received: by outflank-mailman (input) for mailman id 1226114; Tue, 10 Feb 2026 08:19:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpiy9-0005pl-Si for xen-devel@lists.xenproject.org; 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Not doing so enables certain > optimisations with regards to vendor checks in later patches. > > Signed-off-by: Alejandro Vallejo > --- > Patch 1 from the cross-vendor series. Do not merge here. It's simply for > consistency. > --- > xen/lib/x86/policy.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c > index f033d22785..079c42a29b 100644 > --- a/xen/lib/x86/policy.c > +++ b/xen/lib/x86/policy.c > @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, > #define FAIL_MSR(m) \ > do { e.msr = (m); goto out; } while ( 0 ) > > - if ( guest->basic.max_leaf > host->basic.max_leaf ) > + if ( (guest->x86_vendor != host->x86_vendor) || > + (guest->basic.max_leaf > host->basic.max_leaf) ) You possibly want to expand test-cpu-policy.c to add a small test to ensure this works as expected? Not that it shouldn't, but it's trivial to expand test_is_compatible_{success,failure}() to add a small test for the vendor checking. Thanks, Roger. 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A lot of statics go away and a lot more inlining will be allowed. > > A prerequisite for such optimisation is to expand Kconfig to have the > full set of vendors. Adds Hygon, Centaur, Shanghai and the unknown-vendor > path. Have Hygon select AMD, and Centaur|Shanghai select Intel. > > Not a functional change. > > Signed-off-by: Alejandro Vallejo > --- > rfc -> v1: > * s/depends on/select/ > * s/UNKNOWN_CPU/UNKNOWN_CPU_VENDOR/ > * Removed "if unsure, say Y" > --- > xen/arch/x86/Kconfig.cpu | 43 +++++++++++++++++++++++++++++++++++++++ > xen/arch/x86/cpu/Makefile | 6 +++--- > 2 files changed, 46 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu > index 5fb18db1aa..f895cfe97a 100644 > --- a/xen/arch/x86/Kconfig.cpu > +++ b/xen/arch/x86/Kconfig.cpu > @@ -19,4 +19,47 @@ config INTEL > May be turned off in builds targetting other vendors. Otherwise, > must be enabled for Xen to work suitably on Intel platforms. > > +config HYGON > + bool "Support Hygon CPUs" > + select AMD > + default y > + help > + Detection, tunings and quirks for Hygon platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Hygon platforms. > + > + > +config CENTAUR > + bool "Support Centaur CPUs" > + select INTEL > + default y > + help > + Detection, tunings and quirks for Centaur platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Centaur platforms. > + > +config SHANGHAI > + bool "Support Shanghai CPUs" > + select INTEL > + default y > + help > + Detection, tunings and quirks for Shanghai platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Shanghai platforms. > + > +config UNKNOWN_CPU_VENDOR > + bool "Support unknown CPU vendors" > + default y > + help > + This option prevents a panic on boot when the host CPU vendor isn't > + supported by going into a legacy compatibility mode and not applying > + any relevant tunings or quirks. > + > + Not selecting this options while selecting multiple vendors doesn't have > + any major effect on code size, but selecting a single vendor with this > + option cleared produces a much smaller build. > + > endmenu > diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile > index 7cfe28b7ec..84b060aa41 100644 > --- a/xen/arch/x86/cpu/Makefile > +++ b/xen/arch/x86/cpu/Makefile > @@ -3,13 +3,13 @@ obj-y += microcode/ > obj-y += mtrr/ > > obj-y += amd.o > -obj-y += centaur.o > +obj-$(CONFIG_CENTAUR) += centaur.o Maybe I'm missing some context here, but I think this would break the build? cpu/centaur.c exports centaur_cpu_dev which is referenced from cpu/common.c, and I don't see you making that reference in cpu/common.c conditional to CONFIG_CENTAUR being defined? I think the same applies to Hygon and Shanghai. Thanks, Roger. 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This is kind of misleading IMO. It will possibly allow such optimization for Intel or AMD, but not for Hygon/Centaur/Shanghai, as for those CPUs you will always end up selecting either Intel or AMD as a requisite (so X86_ENABLED_VENDORS will never have only a single bit set). Not saying it's bad, but I think the comment above should be adjusted a bit to notice that such compile time optimizations for single vendor builds will only be applicable to Intel or AMD builds. > * For all other cases it ANDs the result with the mask of compiled > vendors, with the effect of performing DCE in switch cases, removing > dead conditionals, etc. > > It's difficult to reason about codegen in general in a project this big, > but in this case the ANDed constant combines with the values typically > checked against, folding into a comparison against zero. Thus, it's better > for codegen to AND its result with the desired compared-against vendor, > rather than using (in)equality operators. That way the comparison is > always against zero. > > "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" > > turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + > cmp with zero). Whereas this... > > "cpu_vendor() == X86_VENDOR_AMD" > > forces cpu_vendor() to be ANDed and then compared to a non-zero value. > > Later patches take the opportunity and make this refactor as cpu_vendor() > is introduced throughout the tree. > > Signed-off-by: Alejandro Vallejo > --- > xen/arch/x86/cpu/common.c | 6 +++++- > xen/arch/x86/guest/xen/xen.c | 4 ++++ > xen/arch/x86/include/asm/cpufeature.h | 27 +++++++++++++++++++++++++++ > 3 files changed, 36 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c > index ebe2baf8b9..6f4e723172 100644 > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) > *(u32 *)&c->x86_vendor_id[4] = edx; > > c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > - switch (c->x86_vendor) { > + if ( c->x86_vendor != cpu_vendor() ) > + panic("CPU vendor not compiled-in: %s", > + x86_cpuid_vendor_to_str(c->x86_vendor)); I think you want to print both the current compiled in support plus the host vendor as part of the panic message. > + > + switch (cpu_vendor()) { > case X86_VENDOR_INTEL: intel_unlock_cpuid_leaves(c); > actual_cpu = intel_cpu_dev; break; > case X86_VENDOR_AMD: actual_cpu = amd_cpu_dev; break; > diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c > index 77a3a8742a..ec558bcbdb 100644 > --- a/xen/arch/x86/guest/xen/xen.c > +++ b/xen/arch/x86/guest/xen/xen.c > @@ -57,6 +57,10 @@ void asmlinkage __init early_hypercall_setup(void) > cpuid(0, &eax, &ebx, &ecx, &edx); > > boot_cpu_data.x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > + > + if ( cpu_vendor() != boot_cpu_data.x86_vendor ) > + panic("CPU vendor not compiled-in: %s", > + x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); Is this going to be useful? I fear the panic here might happen even before the console is setup, so a user won't get any output from Xen at all. Would it be fine to allow such mismatch in the hypercall setup, just for the sake of getting the console page setup so that early_cpu_init() can print a proper error message? Allowing the vendor mismatch here won't require any extra code, it's just the selection of the instruction to use to call into Xen when running in guest/shim mode. Thanks, Roger. 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Tue, 10 Feb 2026 01:07:30 -0800 (PST) Message-ID: <704f8923-6adc-457d-bde9-b1821b82ea79@suse.com> Date: Tue, 10 Feb 2026 10:07:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/ioreq: Extend ioreq server to support multiple ioreq pages To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260209123025.2628513-1-julian.vetter@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260209123025.2628513-1-julian.vetter@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 13:30, Julian Vetter wrote: > --- a/xen/arch/x86/hvm/ioreq.c > +++ b/xen/arch/x86/hvm/ioreq.c > @@ -71,6 +71,38 @@ static gfn_t hvm_alloc_legacy_ioreq_gfn(struct ioreq_server *s) > return INVALID_GFN; > } > > +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, > + unsigned int nr_pages) > +{ > + struct domain *d = s->target; > + unsigned long mask = d->arch.hvm.ioreq_gfn.mask; > + unsigned int i, run; > + > + /* Find nr_pages consecutive set bits */ > + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) > + { > + if ( test_bit(i, &mask) ) > + { > + if ( ++run == nr_pages ) > + { > + /* Found a run - clear all bits and return base GFN */ > + unsigned int start = i - nr_pages + 1; > + for ( unsigned int j = start; j <= i; j++ ) > + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); > + return _gfn(d->arch.hvm.ioreq_gfn.base + start); > + } We may want to gain a bitmap library function for this. Sadly bitmap_find_free_region() is too special purpose for the needs here. Otherwise I think ... > + } > + else > + run = 0; ... the construct as a whole would benefit from re-working into if/else-if, as that'll reduce indentation by one level for the main block of code. Also, nit: Blank line please between declaration(s) and statement(s). > @@ -121,52 +153,95 @@ static void hvm_free_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) > } > } > > +static void hvm_free_ioreq_gfns(struct ioreq_server *s, gfn_t gfn, > + unsigned int nr_pages) > +{ > + unsigned int i; > + > + for ( i = 0; i < nr_pages; i++ ) > + hvm_free_ioreq_gfn(s, _gfn(gfn_x(gfn) + i)); > +} > + > static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) > { > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; > > - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > - return; > + for ( i = 0; i < nr_pages; i++ ) > + { > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > + > + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > + continue; > > - destroy_ring_for_helper(&iorp->va, iorp->page); > - iorp->page = NULL; > + destroy_ring_for_helper(&iorp->va, iorp->page); > + iorp->page = NULL; > > - hvm_free_ioreq_gfn(s, iorp->gfn); > - iorp->gfn = INVALID_GFN; > + hvm_free_ioreq_gfn(s, iorp->gfn); > + iorp->gfn = INVALID_GFN; > + } > } > > static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) > { > struct domain *d = s->target; > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; > + gfn_t base_gfn; > int rc; > > - if ( iorp->page ) > + /* Check if already mapped */ > + for ( i = 0; i < nr_pages; i++ ) > { > - /* > - * If a page has already been allocated (which will happen on > - * demand if ioreq_server_get_frame() is called), then > - * mapping a guest frame is not permitted. > - */ > - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > - return -EPERM; > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > > - return 0; > + if ( iorp->page ) > + { > + /* > + * If a page has already been allocated (which will happen on > + * demand if ioreq_server_get_frame() is called), then > + * mapping a guest frame is not permitted. > + */ > + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > + return -EPERM; > + > + return 0; > + } How can you simply return here when you found one page already mapped? (This will likely solve itself when the data structure is changed; see remark at the very bottom.) > @@ -174,32 +249,43 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) > static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) > { > struct domain *d = s->target; > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; > > - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > - return; > + for ( i = 0; i < nr_pages; i++ ) > + { > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > + > + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > + continue; > > - if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) > - domain_crash(d); > - clear_page(iorp->va); > + if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) > + domain_crash(d); > + clear_page(iorp->va); > + } > } > > static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) > { > struct domain *d = s->target; > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > + unsigned int i, nr_pages = buf ? 1 : NR_IOREQ_PAGES; > int rc; > > - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > - return 0; > + for ( i = 0; i < nr_pages; i++ ) > + { > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > > - clear_page(iorp->va); > + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) > + continue; > > - rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); > - if ( rc == 0 ) > - paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); > + clear_page(iorp->va); > > - return rc; > + rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); > + if ( rc ) > + return rc; No rolling back of what was successfully done before will want explaining in a comment. > @@ -260,84 +263,120 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) > > static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) > { > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > struct page_info *page; > + unsigned int i, j, nr_pages = buf ? 1 : NR_IOREQ_PAGES; > > - if ( iorp->page ) > + for ( i = 0; i < nr_pages; i++ ) > { > - /* > - * If a guest frame has already been mapped (which may happen > - * on demand if ioreq_server_get_info() is called), then > - * allocating a page is not permitted. > - */ > - if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) > - return -EPERM; > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[i]; > > - return 0; > - } > + if ( iorp->page ) > + { > + /* > + * If a guest frame has already been mapped (which may happen > + * on demand if ioreq_server_get_info() is called), then > + * allocating a page is not permitted. > + */ > + if ( !gfn_eq(iorp->gfn, INVALID_GFN) ) > + return -EPERM; > + continue; /* Already allocated */ > + } > > - page = alloc_domheap_page(s->target, MEMF_no_refcount); > + page = alloc_domheap_page(s->target, MEMF_no_refcount); > + if ( !page ) > + goto fail; > > - if ( !page ) > - return -ENOMEM; > + if ( !get_page_and_type(page, s->target, PGT_writable_page) ) > + { > + /* > + * The domain can't possibly know about this page yet, so failure > + * here is a clear indication of something fishy going on. > + */ > + put_page_alloc_ref(page); > + domain_crash(s->emulator); > + return -ENODATA; > + } > > - if ( !get_page_and_type(page, s->target, PGT_writable_page) ) > - { > - /* > - * The domain can't possibly know about this page yet, so failure > - * here is a clear indication of something fishy going on. > - */ > - domain_crash(s->emulator); > - return -ENODATA; > - } > + /* Assign early so cleanup can find it */ > + iorp->page = page; > > - iorp->va = __map_domain_page_global(page); > - if ( !iorp->va ) > - goto fail; > + iorp->va = __map_domain_page_global(page); > + if ( !iorp->va ) > + goto fail; > + > + clear_page(iorp->va); > + } > > - iorp->page = page; > - clear_page(iorp->va); > return 0; > > - fail: > - put_page_alloc_ref(page); > - put_page_and_type(page); > +fail: > + /* Free all previously allocated pages */ > + for ( j = 0; j <= i; j++ ) > + { > + struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreqs.page[j]; > + if ( iorp->page ) > + { > + if ( iorp->va ) > + unmap_domain_page_global(iorp->va); Nit: Indentation. > + iorp->va = NULL; Perhaps best to introduce and use UNMAP_DOMAIN_PAGE_GLOBAL(), paralleling UNMAP_DOMAIN_PAGE(). > + put_page_alloc_ref(iorp->page); > + put_page_and_type(iorp->page); > + iorp->page = NULL; Maybe also PUT_PAGE_AND_TYPE(). > @@ -29,6 +36,10 @@ struct ioreq_page { > void *va; > }; > > +struct ioreq_pages { > + struct ioreq_page page[NR_IOREQ_PAGES]; > +}; > + > struct ioreq_vcpu { > struct list_head list_entry; > struct vcpu *vcpu; > @@ -45,7 +56,7 @@ struct ioreq_server { > /* Lock to serialize toolstack modifications */ > spinlock_t lock; > > - struct ioreq_page ioreq; > + struct ioreq_pages ioreqs; > struct list_head ioreq_vcpu_list; > struct ioreq_page bufioreq; You allocate contiguous GFNs and you will, as per what Andrew requested, also allocate contiguous VA space. No need to inflate the structure like this then? Having reached the bottom - how's qemu going to know that multiple pages are in use? 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2/98/WrDAG4bZCv3YHuQrWlL4InmEPEGjI+9TwG/4nlUcGGERcxo53Q6Hcu3v3bfyDQ/ljFTSHJ9AGMxC72axnOvkNYUf+WF0J8gr4Ek+pXMwbseC+pUr2shPJDB9xoGVXEuVsPOrqeDsnK3ilr5Lt9B5xQ0t9i/3tZpc247ZiDw4D/rEy659glD0pdchzcvWoM0zFp3dsyKwvISjqi2gL2Dx35TTOPDB30y2FJOGngxUgrHLb1kItnttPnrirNIy/CzhFQ8jfDtotSwAD6l2Nu9m0BH4o2G9av5b1Kr0Z2PJsVks4oqVBLOCyzIcqjN2oWqg8/+IYjSdkzzm1DF4euLTLhRfWMzG9CjJipoEeVTMvN8/eTSxStGcNfBx+TzzGXSf0oZMTexNFLV5olyrUhbNXsZXuEzjJerYAPXdDdkCPmk32gcbbjY9am9HrN3 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 10:04:11.5347 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ddeb9b5-1f8a-4db0-91ea-08de688bbd20 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9077 On Tue Feb 10, 2026 at 9:26 AM CET, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 06, 2026 at 05:15:24PM +0100, Alejandro Vallejo wrote: >> This enables very aggressive DCE passes on single-vendor builds in later >> patches, as it will allow most vendor checks to become statically chosen >> branches. A lot of statics go away and a lot more inlining will be allow= ed. >>=20 >> A prerequisite for such optimisation is to expand Kconfig to have the >> full set of vendors. Adds Hygon, Centaur, Shanghai and the unknown-vendo= r >> path. Have Hygon select AMD, and Centaur|Shanghai select Intel. >>=20 >> Not a functional change. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> rfc -> v1: >> * s/depends on/select/ >> * s/UNKNOWN_CPU/UNKNOWN_CPU_VENDOR/ >> * Removed "if unsure, say Y" >> --- >> xen/arch/x86/Kconfig.cpu | 43 +++++++++++++++++++++++++++++++++++++++ >> xen/arch/x86/cpu/Makefile | 6 +++--- >> 2 files changed, 46 insertions(+), 3 deletions(-) >>=20 >> diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu >> index 5fb18db1aa..f895cfe97a 100644 >> --- a/xen/arch/x86/Kconfig.cpu >> +++ b/xen/arch/x86/Kconfig.cpu >> @@ -19,4 +19,47 @@ config INTEL >> May be turned off in builds targetting other vendors. Otherwise, >> must be enabled for Xen to work suitably on Intel platforms. >> =20 >> +config HYGON >> + bool "Support Hygon CPUs" >> + select AMD >> + default y >> + help >> + Detection, tunings and quirks for Hygon platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Hygon platforms. >> + >> + >> +config CENTAUR >> + bool "Support Centaur CPUs" >> + select INTEL >> + default y >> + help >> + Detection, tunings and quirks for Centaur platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Centaur platforms. >> + >> +config SHANGHAI >> + bool "Support Shanghai CPUs" >> + select INTEL >> + default y >> + help >> + Detection, tunings and quirks for Shanghai platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Shanghai platforms. >> + >> +config UNKNOWN_CPU_VENDOR >> + bool "Support unknown CPU vendors" >> + default y >> + help >> + This option prevents a panic on boot when the host CPU vendor isn't >> + supported by going into a legacy compatibility mode and not applying >> + any relevant tunings or quirks. >> + >> + Not selecting this options while selecting multiple vendors doesn't = have >> + any major effect on code size, but selecting a single vendor with th= is >> + option cleared produces a much smaller build. >> + >> endmenu >> diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile >> index 7cfe28b7ec..84b060aa41 100644 >> --- a/xen/arch/x86/cpu/Makefile >> +++ b/xen/arch/x86/cpu/Makefile >> @@ -3,13 +3,13 @@ obj-y +=3D microcode/ >> obj-y +=3D mtrr/ >> =20 >> obj-y +=3D amd.o >> -obj-y +=3D centaur.o >> +obj-$(CONFIG_CENTAUR) +=3D centaur.o > > Maybe I'm missing some context here, but I think this would break the > build? > > cpu/centaur.c exports centaur_cpu_dev which is referenced from > cpu/common.c, and I don't see you making that reference in > cpu/common.c conditional to CONFIG_CENTAUR being defined? > > I think the same applies to Hygon and Shanghai. > > Thanks, Roger. Hmm. Yes, these hunks go on the following patch for bisectability. They wor= k due to the AND operation at the switch condition. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:05:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:05:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226172.1532700 (Exim 4.92) (envelope-from ) id 1vpkcA-0004YB-Rx; Tue, 10 Feb 2026 10:05:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226172.1532700; Tue, 10 Feb 2026 10:05:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpkcA-0004Y4-OB; Tue, 10 Feb 2026 10:05:02 +0000 Received: by outflank-mailman (input) for mailman id 1226172; Tue, 10 Feb 2026 10:05:01 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpkc9-00047C-Ha for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:05:01 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f61e39b8-0667-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:05:00 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-43638a3330dso2145354f8f.0 for ; Tue, 10 Feb 2026 02:05:00 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Therefore make the call conditional (and then also the one to scale_reciprocal()), adding a comment as to why there is this capping. Modernize types used while there, and switch to usiong initializers for the local variables. Signed-off-by: Jan Beulich --- Adding likely() to the conditional here does make a difference. Question is whether to do so, seeing that there looks to be a possibility (of unknown frequency) for the delta to be non-positive. --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1176,20 +1176,26 @@ uint64_t __init calibrate_apic_timer(voi return elapsed * CALIBRATE_FRAC; } -u64 stime2tsc(s_time_t stime) +uint64_t stime2tsc(s_time_t stime) { - struct cpu_time *t; - struct time_scale sys_to_tsc; - s_time_t stime_delta; + const struct cpu_time *t = &this_cpu(cpu_time); + s_time_t stime_delta = stime - t->stamp.local_stime; + int64_t delta = 0; - t = &this_cpu(cpu_time); - sys_to_tsc = scale_reciprocal(t->tsc_scale); + /* + * While for reprogram_timer() the capping at 0 isn't relevant (the returned + * value is likely in the past anyway then, by the time it is used), for + * cstate_restore_tsc() this is relevant: We need to avoid moving the TSC + * backwards (relative to when it may last have been read). + */ + if ( stime_delta > 0 ) + { + struct time_scale sys_to_tsc = scale_reciprocal(t->tsc_scale); - stime_delta = stime - t->stamp.local_stime; - if ( stime_delta < 0 ) - stime_delta = 0; + delta = scale_delta(stime_delta, &sys_to_tsc); + } - return t->stamp.local_tsc + scale_delta(stime_delta, &sys_to_tsc); + return t->stamp.local_tsc + delta; } void cstate_restore_tsc(void) From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:11:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:11:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226181.1532710 (Exim 4.92) (envelope-from ) id 1vpkiW-0006G1-Fy; Tue, 10 Feb 2026 10:11:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226181.1532710; Tue, 10 Feb 2026 10:11:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpkiW-0006Fu-D8; Tue, 10 Feb 2026 10:11:36 +0000 Received: by outflank-mailman (input) for mailman id 1226181; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: lLvwscv4HVQdLqf3VHsIvZsH1hIpHXJkkilH1JEl6ApJzZwRBwLewqzhoamKFCalkGklUHIzMtAKREJE8VWyeAqEODUAcsbEl7FUl0ur51lQZOkFWbFQc5qmaWn3w/czcCJfIX3Aj/h09h1lmVhARKl1vij2Yq1DiXbkw6Jk0EkjmR9TEY0d5wFzAKZaXXrTTzqYEJSC9jnUUrZTZ8sK0MpX4q/uUTmwouUS3pyRkbLQHBXDzdLoBbolb/oYdon5MHsQ+61VS4XrTIJFmYUXuYeLVCTT5QSxfaUtoImOXfd1r0guyUP5knLqI3LNuOut3NG3HUHeh6MSNIP93SZmPxoAXdxvd7Mf/srLZBJmFsLJA98TzX6yHsP+emawbH/3quycfKVWY23S4+uV8MOl+gVB0gCugXfcy3pw9ubETnA3BT9Gfn4YfmwhML6bw329 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 10:11:27.8457 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da6e9da4-96f5-4641-69ca-08de688cc12c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F68.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9322 On Tue Feb 10, 2026 at 9:19 AM CET, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 06, 2026 at 05:15:23PM +0100, Alejandro Vallejo wrote: >> While in principle it's possible to have a vendor virtualising another, >> this is fairly tricky in practice. Not doing so enables certain >> optimisations with regards to vendor checks in later patches. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> Patch 1 from the cross-vendor series. Do not merge here. It's simply for >> consistency. >> --- >> xen/lib/x86/policy.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >>=20 >> diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c >> index f033d22785..079c42a29b 100644 >> --- a/xen/lib/x86/policy.c >> +++ b/xen/lib/x86/policy.c >> @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_p= olicy *host, >> #define FAIL_MSR(m) \ >> do { e.msr =3D (m); goto out; } while ( 0 ) >> =20 >> - if ( guest->basic.max_leaf > host->basic.max_leaf ) >> + if ( (guest->x86_vendor !=3D host->x86_vendor) || >> + (guest->basic.max_leaf > host->basic.max_leaf) ) > > You possibly want to expand test-cpu-policy.c to add a small test to > ensure this works as expected? Not that it shouldn't, but it's > trivial to expand test_is_compatible_{success,failure}() to add a > small test for the vendor checking. > > Thanks, Roger. I didn't consider it. I guess I could. What I'm thinking also is that this vendor check should probably check the encoded vendor (ebcx/ecx/edx) rather than the decoded one. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:35:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:35:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226201.1532719 (Exim 4.92) (envelope-from ) id 1vpl5f-0000pv-B5; Tue, 10 Feb 2026 10:35:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226201.1532719; Tue, 10 Feb 2026 10:35:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpl5f-0000po-8S; Tue, 10 Feb 2026 10:35:31 +0000 Received: by outflank-mailman (input) for mailman id 1226201; Tue, 10 Feb 2026 10:35:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpl5d-0000pV-SY for xen-devel@lists.xenproject.org; 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bh=PNxsh5nfb/KB7K+12vjRkEyauWMl9fgwYWi2mdetMPE=; b=BU+WaBUL4s8ma95g1AiqQZYYYbv9HcUiBPUqc9YQqyyoMdAhE4f/28IPJL3mXzABKrsN3CmlKQfAG3DpYG/UgcfjFCPlOS8x2GSbd+JTdrmJdHx6eNgk22+Z4aOeo8GS5MmU2sEUhC84g2VxyDp93cRGXFaKr7cqZZCQ+uIxpVI= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Date: Tue, 10 Feb 2026 11:35:20 +0100 Message-ID: Subject: Re: [PATCH 03/12] x86: Add cpu_vendor() as a wrapper for the host's CPU vendor From: Alejandro Vallejo To: =?utf-8?q?Roger_Pau_Monn=C3=A9?= CC: , Jan Beulich , "Andrew Cooper" , Jason Andryuk X-Mailer: aerc 0.20.1 References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-4-alejandro.garciavallejo@amd.com> In-Reply-To: X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C6:EE_|CY5PR12MB6273:EE_ X-MS-Office365-Filtering-Correlation-Id: bfc95a33-a3a3-401c-f317-08de6890189e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|1800799024|36860700013; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wujdDqd9A9HhxRfyM1CGMccvXv9e+4NlF+mMfcvYQh27N5PEqTiVSR4HUlyQPWv7i2n72sV3VATf7e+YN+VzVzKSQBMm2en8fG0jp6223k1n9EZCLO0LQA0KwtpRXofUcBUHJyPl1k6qXmzPzaAnh294cCTqiB9aml2+z5YRSQVY6N97/0dXcriUUvp4WSxa97pQb4IaLrWCh36b5+ZPyefWwDwcxrzJ4vY6jWAWY8W1zN4vT/7i8XjiGiADcK73WOzV1Ac3KloBNpWoNlltmOAQN5tmePkmnsI4+FjHV+xX8fH8inyu9NOR3LHAh0VXn3pRqsmJyTZw3QhFNRDagsSh03+5fT9wMwMMGe2HBpfSSzmihxI/OeZubG5ghwnfDfbVQBOOkTM5kKFTKVGeXD1Wlnsk9jQHtLa/SMR75+DvonnL8UYWE0eD5zC8eD87 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 10:35:23.0231 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bfc95a33-a3a3-401c-f317-08de6890189e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6273 On Tue Feb 10, 2026 at 9:46 AM CET, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 06, 2026 at 05:15:25PM +0100, Alejandro Vallejo wrote: >> Introduces various optimisations that rely on constant folding, Value >> Range Propagation (VRP), and Dead Code Elimination (DCE) to aggressively >> eliminate code surrounding the uses of the function. >>=20 >> * For single-vendor+no-unknown-vendor builds returns a compile-time >> constant. > > This is kind of misleading IMO. It will possibly allow such > optimization for Intel or AMD, but not for Hygon/Centaur/Shanghai, as > for those CPUs you will always end up selecting either Intel or AMD as > a requisite (so X86_ENABLED_VENDORS will never have only a single bit > set). > > Not saying it's bad, but I think the comment above should be adjusted > a bit to notice that such compile time optimizations for single vendor > builds will only be applicable to Intel or AMD builds. You can't build a Hygon-only hypervisor with these changes. I can rewrite t= he commit message to clearly state which vendors are subject to the optimisati= on, though I'd fully expect users to notice they just can't deselect AMD when building for Hygon. > >> * For all other cases it ANDs the result with the mask of compiled >> vendors, with the effect of performing DCE in switch cases, removing >> dead conditionals, etc. >>=20 >> It's difficult to reason about codegen in general in a project this big, >> but in this case the ANDed constant combines with the values typically >> checked against, folding into a comparison against zero. Thus, it's bett= er >> for codegen to AND its result with the desired compared-against vendor, >> rather than using (in)equality operators. That way the comparison is >> always against zero. >>=20 >> "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" >>=20 >> turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + >> cmp with zero). Whereas this... >>=20 >> "cpu_vendor() =3D=3D X86_VENDOR_AMD" >>=20 >> forces cpu_vendor() to be ANDed and then compared to a non-zero value. >>=20 >> Later patches take the opportunity and make this refactor as cpu_vendor(= ) >> is introduced throughout the tree. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> xen/arch/x86/cpu/common.c | 6 +++++- >> xen/arch/x86/guest/xen/xen.c | 4 ++++ >> xen/arch/x86/include/asm/cpufeature.h | 27 +++++++++++++++++++++++++++ >> 3 files changed, 36 insertions(+), 1 deletion(-) >>=20 >> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c >> index ebe2baf8b9..6f4e723172 100644 >> --- a/xen/arch/x86/cpu/common.c >> +++ b/xen/arch/x86/cpu/common.c >> @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) >> *(u32 *)&c->x86_vendor_id[4] =3D edx; >> =20 >> c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx); >> - switch (c->x86_vendor) { >> + if ( c->x86_vendor !=3D cpu_vendor() ) >> + panic("CPU vendor not compiled-in: %s", >> + x86_cpuid_vendor_to_str(c->x86_vendor)); > > I think you want to print both the current compiled in support plus > the host vendor as part of the panic message. The mask of supported vendors, you mean? That could be helpful. > >> + >> + switch (cpu_vendor()) { >> case X86_VENDOR_INTEL: intel_unlock_cpuid_leaves(c); >> actual_cpu =3D intel_cpu_dev; break; >> case X86_VENDOR_AMD: actual_cpu =3D amd_cpu_dev; break; >> diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c >> index 77a3a8742a..ec558bcbdb 100644 >> --- a/xen/arch/x86/guest/xen/xen.c >> +++ b/xen/arch/x86/guest/xen/xen.c >> @@ -57,6 +57,10 @@ void asmlinkage __init early_hypercall_setup(void) >> cpuid(0, &eax, &ebx, &ecx, &edx); >> =20 >> boot_cpu_data.x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, = edx); >> + >> + if ( cpu_vendor() !=3D boot_cpu_data.x86_vendor ) >> + panic("CPU vendor not compiled-in: %s", >> + x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); > > Is this going to be useful? I fear the panic here might happen even > before the console is setup, so a user won't get any output from Xen > at all. It is true that early_cpu_init() is invoked immediately after serial is set up, so any other vendor check ends up being fairly useless. OTOH, thinking about it may stand to reason to have: 1. A very early panic in assembly, like that of missing nx. 2. Have this early hypercall setup nonsense present ONLY when INTEL && AM= D are both enabled. It really makes no sense to probe when you have explilcitly compiled for a single vendor. > > Would it be fine to allow such mismatch in the hypercall setup, just > for the sake of getting the console page setup so that > early_cpu_init() can print a proper error message? > > Allowing the vendor mismatch here won't require any extra code, it's > just the selection of the instruction to use to call into Xen when > running in guest/shim mode. It'd be fine, yes. Maybe with a comment noting we can use vm{m,}call whethe= r or not cpu_vendor() =3D=3D 0 because the instruction itself is supported by= HW. OTOH, I could also fully drop the dynamic detection logic on AMDLIKE-only o= r INTELLIKE-only builds like I mentioned above. I sort of like that second option, as it allows removing hypercall.S and hook it to the real hypercall machinery, that at that point can have the alternatives removed. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:46:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:46:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226218.1532746 (Exim 4.92) (envelope-from ) id 1vplGb-0002eX-Gd; Tue, 10 Feb 2026 10:46:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226218.1532746; Tue, 10 Feb 2026 10:46:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplGb-0002eQ-CF; Tue, 10 Feb 2026 10:46:49 +0000 Received: by outflank-mailman (input) for mailman id 1226218; Tue, 10 Feb 2026 10:46:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplGa-0002eK-Jj for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:46:48 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id cb867c2d-066d-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 11:46:46 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso6986025e9.1 for ; Tue, 10 Feb 2026 02:46:46 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 02:46:45 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 11:46:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Add Darwin.mk To: Bertrand Marquis Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 11:46, Bertrand Marquis wrote: > --- /dev/null > +++ b/config/Darwin.mk > @@ -0,0 +1,6 @@ > +# Use GNU tool definitions as the tools we are using are either GNU compatible > +# or we only use features which are supported on Mac OS. > +include $(XEN_ROOT)/config/StdGNU.mk > + > +# Cross compile on Mac OS, only hypervisor build has been tested, no tools > +XEN_COMPILE_ARCH = unknow While editing in the ABI aspect, it occurred to me to check what Apple has to say regarding their ABI. For both aarch64 and x86-64 they say they use the standard ABI with some modifications. We may want to evaluate whether those modifications are actually compatible with what we need. Talking of x86-64: Has building on an x86 Mac been tested as well? Especially if that doesn't work, it may want mentioning. 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Tue, 10 Feb 2026 02:51:28 -0800 (PST) Message-ID: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Date: Tue, 10 Feb 2026 11:51:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH v4 0/5] (v)PCI: extended capability handling To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit This is a follow-on to 'vPCI: avoid bogus "overlap in extended cap list" warnings', addressing further issues noted there. v4: Three new patches and some other re-work. See individual patches. 1: x86/PCI: avoid re-evaluation of extended config space accessibility 2: vPCI: introduce private header 3: vPCI: move vpci_init_capabilities() to a separate file 4: vPCI: move capability-list init 5: vPCI: re-init extended-capabilities when MMCFG availability changed Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:52:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:52:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226233.1532766 (Exim 4.92) (envelope-from ) id 1vplMT-0004ju-A2; Tue, 10 Feb 2026 10:52:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226233.1532766; Tue, 10 Feb 2026 10:52:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplMT-0004jn-6v; Tue, 10 Feb 2026 10:52:53 +0000 Received: by outflank-mailman (input) for mailman id 1226233; Tue, 10 Feb 2026 10:52:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplMS-0004jf-8L for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:52:52 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a522676b-066e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:52:51 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-436e87589e8so1971499f8f.3 for ; Tue, 10 Feb 2026 02:52:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 02:52:50 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 11:52:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v4 1/5] x86/PCI: avoid re-evaluation of extended config space accessibility From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When, during boot, we have already correctly determined availability of the MMCFG access method for a given bus range, there's then no need to invoke pci_check_extcfg() again for every of the devices. This in particular avoids ->ext_cfg to transiently indicate the wrong state. Switch to using Xen style on lines being touched and immediately adjacent ones. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- v4: Don't bypass mcfg_ioremap(cfg, idx, 0) in pci_mmcfg_arch_disable(). v3: New. --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -528,6 +528,8 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_H if ( !ret ) ret = pci_segment_iterate(info.segment, physdev_check_pci_extcfg, &info); + else if ( ret > 0 ) /* Indication of "no change". */ + ret = 0; if ( !ret && has_vpci(currd) && (info.flags & XEN_PCI_MMCFG_RESERVED) ) { --- a/xen/arch/x86/x86_64/mmconfig.h +++ b/xen/arch/x86/x86_64/mmconfig.h @@ -74,6 +74,6 @@ int pci_mmcfg_reserved(uint64_t address, unsigned int flags); int pci_mmcfg_arch_init(void); int pci_mmcfg_arch_enable(unsigned int idx); -void pci_mmcfg_arch_disable(unsigned int idx); +int pci_mmcfg_arch_disable(unsigned int idx); #endif /* X86_64_MMCONFIG_H */ --- a/xen/arch/x86/x86_64/mmconfig-shared.c +++ b/xen/arch/x86/x86_64/mmconfig-shared.c @@ -388,8 +388,9 @@ static bool __init pci_mmcfg_reject_brok (unsigned int)cfg->start_bus_number, (unsigned int)cfg->end_bus_number); - if (!is_mmconf_reserved(addr, size, i, cfg) || - pci_mmcfg_arch_enable(i)) { + if ( !is_mmconf_reserved(addr, size, i, cfg) || + pci_mmcfg_arch_enable(i) < 0 ) + { pci_mmcfg_arch_disable(i); valid = 0; } @@ -417,8 +418,8 @@ void __init acpi_mmcfg_init(void) unsigned int i; pci_mmcfg_arch_init(); - for (i = 0; i < pci_mmcfg_config_num; ++i) - if (pci_mmcfg_arch_enable(i)) + for ( i = 0; i < pci_mmcfg_config_num; ++i ) + if ( pci_mmcfg_arch_enable(i) < 0 ) valid = 0; } else { acpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg); @@ -458,10 +459,11 @@ int pci_mmcfg_reserved(uint64_t address, segment, start_bus, end_bus, address, cfg->address); return -EIO; } - if (flags & XEN_PCI_MMCFG_RESERVED) + + if ( flags & XEN_PCI_MMCFG_RESERVED ) return pci_mmcfg_arch_enable(i); - pci_mmcfg_arch_disable(i); - return 0; + + return pci_mmcfg_arch_disable(i); } } --- a/xen/arch/x86/x86_64/mmconfig_64.c +++ b/xen/arch/x86/x86_64/mmconfig_64.c @@ -138,8 +138,9 @@ int pci_mmcfg_arch_enable(unsigned int i const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; unsigned long start_mfn, end_mfn; - if (pci_mmcfg_virt[idx].virt) - return 0; + if ( pci_mmcfg_virt[idx].virt ) + return 1; + pci_mmcfg_virt[idx].virt = mcfg_ioremap(cfg, idx, PAGE_HYPERVISOR_UC); if (!pci_mmcfg_virt[idx].virt) { printk(KERN_ERR "PCI: Cannot map MCFG aperture for segment %04x\n", @@ -160,9 +161,10 @@ int pci_mmcfg_arch_enable(unsigned int i return 0; } -void pci_mmcfg_arch_disable(unsigned int idx) +int pci_mmcfg_arch_disable(unsigned int idx) { const typeof(pci_mmcfg_config[0]) *cfg = pci_mmcfg_virt[idx].cfg; + int ret = !pci_mmcfg_virt[idx].virt; pci_mmcfg_virt[idx].virt = NULL; /* @@ -173,6 +175,8 @@ void pci_mmcfg_arch_disable(unsigned int mcfg_ioremap(cfg, idx, 0); printk(KERN_WARNING "PCI: Not using MCFG for segment %04x bus %02x-%02x\n", cfg->pci_segment, cfg->start_bus_number, cfg->end_bus_number); + + return ret; } bool pci_mmcfg_decode(unsigned long mfn, unsigned int *seg, unsigned int *bdf) From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:53:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:53:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226242.1532775 (Exim 4.92) (envelope-from ) id 1vplNT-0005IF-Lx; Tue, 10 Feb 2026 10:53:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226242.1532775; Tue, 10 Feb 2026 10:53:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplNT-0005I8-Iw; Tue, 10 Feb 2026 10:53:55 +0000 Received: by outflank-mailman (input) for mailman id 1226242; Tue, 10 Feb 2026 10:53:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplNS-0004jf-Ax for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:53:54 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c9f9ac04-066e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:53:53 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-482f2599980so7818395e9.0 for ; Tue, 10 Feb 2026 02:53:53 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 02:53:52 -0800 (PST) Message-ID: <4fda7acb-e1a4-4a24-982e-4cae90048018@suse.com> Date: Tue, 10 Feb 2026 11:53:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v4 2/5] vPCI: introduce private header From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , Bertrand Marquis , Volodymyr Babchuk References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Before adding more private stuff to xen/vpci.h, split it up. In order to be able to include the private header first in a CU, the per-arch struct decls also need to move (to new asm/vpci.h files). While adjusting the test harness'es Makefile, also switch the pre-existing header symlink-ing rule to a pattern one. Apart from in the test harness code, things only move; no functional change intended. Signed-off-by: Jan Beulich --- Subsequently, at least on x86 more stuff may want moving into asm/vpci.h. --- v4: New. --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -14,8 +14,8 @@ else $(warning HOSTCC != CC, will not run test) endif -$(TARGET): vpci.c vpci.h list.h main.c emul.h - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c +$(TARGET): vpci.c vpci.h list.h private.h main.c emul.h + $(CC) $(CFLAGS_xeninclude) -include emul.h -g -o $@ vpci.c main.c .PHONY: clean clean: @@ -34,10 +34,10 @@ uninstall: $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c - # Remove includes and add the test harness header - sed -e '/#include/d' -e '1s/^/#include "emul.h"/' <$< >$@ + sed -e '/#include/d' <$< >$@ + +private.h: %.h: $(XEN_ROOT)/xen/drivers/vpci/%.h + sed -e '/#include/d' <$< >$@ -list.h: $(XEN_ROOT)/xen/include/xen/list.h -vpci.h: $(XEN_ROOT)/xen/include/xen/vpci.h -list.h vpci.h: +list.h vpci.h: %.h: $(XEN_ROOT)/xen/include/xen/%.h sed -e '/#include/d' <$< >$@ --- a/tools/tests/vpci/emul.h +++ b/tools/tests/vpci/emul.h @@ -86,6 +86,7 @@ typedef union { #define CONFIG_HAS_VPCI #include "vpci.h" +#include "private.h" #define __hwdom_init --- a/xen/arch/arm/include/asm/pci.h +++ b/xen/arch/arm/include/asm/pci.h @@ -31,14 +31,6 @@ struct arch_pci_dev { struct device dev; }; -/* Arch-specific MSI data for vPCI. */ -struct vpci_arch_msi { -}; - -/* Arch-specific MSI-X entry data for vPCI. */ -struct vpci_arch_msix_entry { -}; - /* * Because of the header cross-dependencies, e.g. we need both * struct pci_dev and struct arch_pci_dev at the same time, this cannot be --- /dev/null +++ b/xen/arch/arm/include/asm/vpci.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ARM_VPCI_H +#define ARM_VPCI_H + +/* Arch-specific MSI data for vPCI. */ +struct vpci_arch_msi { +}; + +/* Arch-specific MSI-X entry data for vPCI. */ +struct vpci_arch_msix_entry { +}; + +#endif /* ARM_VPCI_H */ --- a/xen/arch/x86/include/asm/hvm/io.h +++ b/xen/arch/x86/include/asm/hvm/io.h @@ -97,17 +97,6 @@ void msixtbl_init(struct domain *d); static inline void msixtbl_init(struct domain *d) {} #endif -/* Arch-specific MSI data for vPCI. */ -struct vpci_arch_msi { - int pirq; - bool bound; -}; - -/* Arch-specific MSI-X entry data for vPCI. */ -struct vpci_arch_msix_entry { - int pirq; -}; - void stdvga_init(struct domain *d); extern void hvm_dpci_msi_eoi(struct domain *d, int vector); --- /dev/null +++ b/xen/arch/x86/include/asm/vpci.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef X86_VPCI_H +#define X86_VPCI_H + +#include + +/* Arch-specific MSI data for vPCI. */ +struct vpci_arch_msi { + int pirq; + bool bound; +}; + +/* Arch-specific MSI-X entry data for vPCI. */ +struct vpci_arch_msix_entry { + int pirq; +}; + +#endif /* X86_VPCI_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -17,11 +17,12 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include #include #include -#include #include --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -16,9 +16,10 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include -#include #include --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -17,10 +17,11 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include #include -#include #include #include --- /dev/null +++ b/xen/drivers/vpci/private.h @@ -0,0 +1,124 @@ +#ifndef VPCI_PRIVATE_H +#define VPCI_PRIVATE_H + +#include + +typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg, + void *data); + +typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, + uint32_t val, void *data); + +typedef struct { + unsigned int id; + bool is_ext; + int (* init)(struct pci_dev *pdev); + int (* cleanup)(const struct pci_dev *pdev, bool hide); +} vpci_capability_t; + +#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ + static const vpci_capability_t name##_entry \ + __used_section(".data.rel.ro.vpci") = { \ + .id = (cap), \ + .init = (finit), \ + .cleanup = (fclean), \ + .is_ext = (ext), \ + } + +#define REGISTER_VPCI_CAP(name, finit, fclean) \ + REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) +#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ + REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) + +/* Add/remove a register handler. */ +int __must_check vpci_add_register_mask(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data, uint32_t ro_mask, + uint32_t rw1c_mask, uint32_t rsvdp_mask, + uint32_t rsvdz_mask); +int __must_check vpci_add_register(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data); + +int vpci_remove_registers(struct vpci *vpci, unsigned int start, + unsigned int size); + +/* Helper to return the value passed in data. */ +uint32_t cf_check vpci_read_val( + const struct pci_dev *pdev, unsigned int reg, void *data); + +/* Passthrough handlers. */ +uint32_t cf_check vpci_hw_read8( + const struct pci_dev *pdev, unsigned int reg, void *data); +uint32_t cf_check vpci_hw_read16( + const struct pci_dev *pdev, unsigned int reg, void *data); +uint32_t cf_check vpci_hw_read32( + const struct pci_dev *pdev, unsigned int reg, void *data); +void cf_check vpci_hw_write8( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); +void cf_check vpci_hw_write16( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); + +#ifdef __XEN__ +/* Make sure there's a hole in the p2m for the MSIX mmio areas. */ +int vpci_make_msix_hole(const struct pci_dev *pdev); + +/* + * Helper functions to fetch MSIX related data. They are used by both the + * emulated MSIX code and the BAR handlers. + */ +static inline paddr_t vmsix_table_host_base(const struct vpci *vpci, + unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr; +} + +static inline paddr_t vmsix_table_host_addr(const struct vpci *vpci, + unsigned int nr) +{ + return vmsix_table_host_base(vpci, nr) + + (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); +} + +static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & + PCI_MSIX_BIRMASK].guest_addr; +} + +static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) +{ + return vmsix_table_base(vpci, nr) + + (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); +} + +/* + * Note regarding the size calculation of the PBA: the spec mentions "The last + * QWORD will not necessarily be fully populated", so it implies that the PBA + * size is 64-bit aligned. + */ +static inline size_t vmsix_table_size(const struct vpci *vpci, unsigned int nr) +{ + return + (nr == VPCI_MSIX_TABLE) ? vpci->msix->max_entries * PCI_MSIX_ENTRY_SIZE + : ROUNDUP(DIV_ROUND_UP(vpci->msix->max_entries, + 8), 8); +} + +#endif /* __XEN__ */ + +#endif /* VPCI_PRIVATE_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/rebar.c +++ b/xen/drivers/vpci/rebar.c @@ -5,8 +5,9 @@ * Author: Jiqian Chen */ +#include "private.h" + #include -#include static void cf_check rebar_ctrl_write(const struct pci_dev *pdev, unsigned int reg, --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -17,8 +17,9 @@ * License along with this program; If not, see . */ +#include "private.h" + #include -#include #include /* Internal struct to store the emulated PCI registers. */ --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -7,18 +7,7 @@ #include #include -typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg, - void *data); - -typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, - uint32_t val, void *data); - -typedef struct { - unsigned int id; - bool is_ext; - int (* init)(struct pci_dev *pdev); - int (* cleanup)(const struct pci_dev *pdev, bool hide); -} vpci_capability_t; +#include #define VPCI_ECAM_BDF(addr) (((addr) & 0x0ffff000) >> 12) @@ -30,20 +19,6 @@ typedef struct { */ #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) -#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ - static const vpci_capability_t name##_entry \ - __used_section(".data.rel.ro.vpci") = { \ - .id = (cap), \ - .init = (finit), \ - .cleanup = (fclean), \ - .is_ext = (ext), \ - } - -#define REGISTER_VPCI_CAP(name, finit, fclean) \ - REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) -#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ - REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) - int __must_check vpci_init_header(struct pci_dev *pdev); /* Assign vPCI to device by adding handlers. */ @@ -52,44 +27,11 @@ int __must_check vpci_assign_device(stru /* Remove all handlers and free vpci related structures. */ void vpci_deassign_device(struct pci_dev *pdev); -/* Add/remove a register handler. */ -int __must_check vpci_add_register_mask(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, unsigned int size, - void *data, uint32_t ro_mask, - uint32_t rw1c_mask, uint32_t rsvdp_mask, - uint32_t rsvdz_mask); -int __must_check vpci_add_register(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, unsigned int size, - void *data); - -int vpci_remove_registers(struct vpci *vpci, unsigned int start, - unsigned int size); - /* Generic read/write handlers for the PCI config space. */ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size); void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, uint32_t data); -/* Helper to return the value passed in data. */ -uint32_t cf_check vpci_read_val( - const struct pci_dev *pdev, unsigned int reg, void *data); - -/* Passthrough handlers. */ -uint32_t cf_check vpci_hw_read8( - const struct pci_dev *pdev, unsigned int reg, void *data); -uint32_t cf_check vpci_hw_read16( - const struct pci_dev *pdev, unsigned int reg, void *data); -uint32_t cf_check vpci_hw_read32( - const struct pci_dev *pdev, unsigned int reg, void *data); -void cf_check vpci_hw_write8( - const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); -void cf_check vpci_hw_write16( - const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); - /* * Check for pending vPCI operations on this vcpu. Returns true if the vcpu * should not run. @@ -213,9 +155,6 @@ struct vpci_vcpu { #ifdef __XEN__ void vpci_dump_msi(void); -/* Make sure there's a hole in the p2m for the MSIX mmio areas. */ -int vpci_make_msix_hole(const struct pci_dev *pdev); - /* Arch-specific vPCI MSI helpers. */ void vpci_msi_arch_mask(struct vpci_msi *msi, const struct pci_dev *pdev, unsigned int entry, bool mask); @@ -238,48 +177,6 @@ int __must_check vpci_msix_arch_disable_ void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry); int vpci_msix_arch_print(const struct vpci_msix *msix); -/* - * Helper functions to fetch MSIX related data. They are used by both the - * emulated MSIX code and the BAR handlers. - */ -static inline paddr_t vmsix_table_host_base(const struct vpci *vpci, - unsigned int nr) -{ - return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr; -} - -static inline paddr_t vmsix_table_host_addr(const struct vpci *vpci, - unsigned int nr) -{ - return vmsix_table_host_base(vpci, nr) + - (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); -} - -static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr) -{ - return vpci->header.bars[vpci->msix->tables[nr] & - PCI_MSIX_BIRMASK].guest_addr; -} - -static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) -{ - return vmsix_table_base(vpci, nr) + - (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); -} - -/* - * Note regarding the size calculation of the PBA: the spec mentions "The last - * QWORD will not necessarily be fully populated", so it implies that the PBA - * size is 64-bit aligned. - */ -static inline size_t vmsix_table_size(const struct vpci *vpci, unsigned int nr) -{ - return - (nr == VPCI_MSIX_TABLE) ? vpci->msix->max_entries * PCI_MSIX_ENTRY_SIZE - : ROUNDUP(DIV_ROUND_UP(vpci->msix->max_entries, - 8), 8); -} - static inline unsigned int vmsix_entry_nr(const struct vpci_msix *msix, const struct vpci_msix_entry *entry) { From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:54:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:54:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226249.1532786 (Exim 4.92) (envelope-from ) id 1vplNv-0005mc-TV; Tue, 10 Feb 2026 10:54:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226249.1532786; Tue, 10 Feb 2026 10:54:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplNv-0005mV-QV; Tue, 10 Feb 2026 10:54:23 +0000 Received: by outflank-mailman (input) for mailman id 1226249; Tue, 10 Feb 2026 10:54:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplNt-0004jf-Kd for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:54:21 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id da7965a1-066e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:54:20 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4801eb2c0a5so51890865e9.3 for ; Tue, 10 Feb 2026 02:54:20 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Start with moving vpci_init_capabilities() and its helpers, plus splitting out of its cleanup counterpart. Signed-off-by: Jan Beulich --- vpci_get_register(), while now only used by cap.c, didn't look like it would want moving there. --- v4: New. --- a/xen/drivers/vpci/Makefile +++ b/xen/drivers/vpci/Makefile @@ -1,2 +1,3 @@ +obj-y += cap.o obj-y += vpci.o header.o rebar.o obj-$(CONFIG_HAS_PCI_MSI) += msi.o msix.o --- /dev/null +++ b/xen/drivers/vpci/cap.c @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Capability handling for guest PCI configuration space. + */ + +#include "private.h" + +#include + +extern const vpci_capability_t __start_vpci_array[]; +extern const vpci_capability_t __end_vpci_array[]; +#define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array) + +static struct vpci_register *vpci_get_previous_cap_register( + const struct vpci *vpci, unsigned int offset) +{ + unsigned int next; + struct vpci_register *r; + + if ( offset < 0x40 ) + { + ASSERT_UNREACHABLE(); + return NULL; + } + + for ( r = vpci_get_register(vpci, PCI_CAPABILITY_LIST, 1); r; + r = next >= 0x40 ? vpci_get_register(vpci, + next + PCI_CAP_LIST_NEXT, 1) + : NULL ) + { + next = (unsigned int)(uintptr_t)r->private; + ASSERT(next == (uintptr_t)r->private); + if ( next == offset ) + break; + } + + return r; +} + +static int vpci_capability_hide(const struct pci_dev *pdev, unsigned int cap) +{ + const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap); + struct vpci_register *prev_r, *next_r; + struct vpci *vpci = pdev->vpci; + + if ( !offset ) + { + ASSERT_UNREACHABLE(); + return 0; + } + + spin_lock(&vpci->lock); + prev_r = vpci_get_previous_cap_register(vpci, offset); + next_r = vpci_get_register(vpci, offset + PCI_CAP_LIST_NEXT, 1); + if ( !prev_r || !next_r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + prev_r->private = next_r->private; + /* + * Not calling vpci_remove_registers() here is to avoid redoing + * the register search. + */ + list_del(&next_r->node); + spin_unlock(&vpci->lock); + xfree(next_r); + + if ( !is_hardware_domain(pdev->domain) ) + return vpci_remove_registers(vpci, offset + PCI_CAP_LIST_ID, 1); + + return 0; +} + +static struct vpci_register *vpci_get_previous_ext_cap_register( + const struct vpci *vpci, unsigned int offset) +{ + unsigned int pos = PCI_CFG_SPACE_SIZE; + struct vpci_register *r; + + if ( offset <= PCI_CFG_SPACE_SIZE ) + { + ASSERT_UNREACHABLE(); + return NULL; + } + + for ( r = vpci_get_register(vpci, pos, 4); r; + r = pos > PCI_CFG_SPACE_SIZE ? vpci_get_register(vpci, pos, 4) + : NULL ) + { + uint32_t header = (uint32_t)(uintptr_t)r->private; + + ASSERT(header == (uintptr_t)r->private); + + pos = PCI_EXT_CAP_NEXT(header); + if ( pos == offset ) + break; + } + + return r; +} + +static int vpci_ext_capability_hide( + const struct pci_dev *pdev, unsigned int cap) +{ + const unsigned int offset = pci_find_ext_capability(pdev, cap); + struct vpci_register *r, *prev_r; + struct vpci *vpci = pdev->vpci; + uint32_t header, pre_header; + + if ( offset < PCI_CFG_SPACE_SIZE ) + { + ASSERT_UNREACHABLE(); + return 0; + } + + spin_lock(&vpci->lock); + r = vpci_get_register(vpci, offset, 4); + if ( !r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + header = (uint32_t)(uintptr_t)r->private; + if ( offset == PCI_CFG_SPACE_SIZE ) + { + if ( PCI_EXT_CAP_NEXT(header) <= PCI_CFG_SPACE_SIZE ) + r->private = (void *)0; + else + /* + * The first extended capability (0x100) can not be removed from + * the linked list, so instead mask its capability ID to return 0 + * hopefully forcing OSes to skip it. + */ + r->private = (void *)(uintptr_t)(header & ~PCI_EXT_CAP_ID(header)); + + spin_unlock(&vpci->lock); + return 0; + } + + prev_r = vpci_get_previous_ext_cap_register(vpci, offset); + if ( !prev_r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + pre_header = (uint32_t)(uintptr_t)prev_r->private; + pre_header &= ~PCI_EXT_CAP_NEXT_MASK; + pre_header |= header & PCI_EXT_CAP_NEXT_MASK; + prev_r->private = (void *)(uintptr_t)pre_header; + + list_del(&r->node); + spin_unlock(&vpci->lock); + xfree(r); + + return 0; +} + +int vpci_init_capabilities(struct pci_dev *pdev) +{ + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) + { + const vpci_capability_t *capability = &__start_vpci_array[i]; + const unsigned int cap = capability->id; + const bool is_ext = capability->is_ext; + unsigned int pos = 0; + int rc; + + if ( !is_ext ) + pos = pci_find_cap_offset(pdev->sbdf, cap); + else if ( is_hardware_domain(pdev->domain) ) + pos = pci_find_ext_capability(pdev, cap); + + if ( !pos ) + continue; + + rc = capability->init(pdev); + if ( rc ) + { + const char *type = is_ext ? "extended" : "legacy"; + + printk(XENLOG_WARNING + "%pd %pp: init %s cap %u fail rc=%d, mask it\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + + if ( capability->cleanup ) + { + rc = capability->cleanup(pdev, true); + if ( rc ) + { + printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + if ( !is_hardware_domain(pdev->domain) ) + return rc; + } + } + + if ( !is_ext ) + rc = vpci_capability_hide(pdev, cap); + else + rc = vpci_ext_capability_hide(pdev, cap); + if ( rc ) + { + printk(XENLOG_ERR "%pd %pp: hide %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + return rc; + } + } + } + + return 0; +} + +void vpci_cleanup_capabilities(struct pci_dev *pdev) +{ + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) + { + const vpci_capability_t *capability = &__start_vpci_array[i]; + const unsigned int cap = capability->id; + unsigned int pos = 0; + + if ( !capability->cleanup ) + continue; + + if ( !capability->is_ext ) + pos = pci_find_cap_offset(pdev->sbdf, cap); + else if ( is_hardware_domain(pdev->domain) ) + pos = pci_find_ext_capability(pdev, cap); + if ( pos ) + { + int rc = capability->cleanup(pdev, false); + + if ( rc ) + printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, + capability->is_ext ? "extended" : "legacy", cap, rc); + } + } +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/private.h +++ b/xen/drivers/vpci/private.h @@ -9,6 +9,20 @@ typedef uint32_t vpci_read_t(const struc typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); +/* Internal struct to store the emulated PCI registers. */ +struct vpci_register { + vpci_read_t *read; + vpci_write_t *write; + unsigned int size; + unsigned int offset; + void *private; + struct list_head node; + uint32_t ro_mask; + uint32_t rw1c_mask; + uint32_t rsvdp_mask; + uint32_t rsvdz_mask; +}; + typedef struct { unsigned int id; bool is_ext; @@ -30,6 +44,9 @@ typedef struct { #define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) +int vpci_init_capabilities(struct pci_dev *pdev); +void vpci_cleanup_capabilities(struct pci_dev *pdev); + /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler, @@ -47,6 +64,10 @@ int __must_check vpci_add_register(struc int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size); +struct vpci_register *vpci_get_register(const struct vpci *vpci, + unsigned int offset, + unsigned int size); + /* Helper to return the value passed in data. */ uint32_t cf_check vpci_read_val( const struct pci_dev *pdev, unsigned int reg, void *data); --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -22,24 +22,7 @@ #include #include -/* Internal struct to store the emulated PCI registers. */ -struct vpci_register { - vpci_read_t *read; - vpci_write_t *write; - unsigned int size; - unsigned int offset; - void *private; - struct list_head node; - uint32_t ro_mask; - uint32_t rw1c_mask; - uint32_t rsvdp_mask; - uint32_t rsvdz_mask; -}; - #ifdef __XEN__ -extern const vpci_capability_t __start_vpci_array[]; -extern const vpci_capability_t __end_vpci_array[]; -#define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array) #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT static int assign_virtual_sbdf(struct pci_dev *pdev) @@ -84,9 +67,9 @@ static int assign_virtual_sbdf(struct pc #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */ -static struct vpci_register *vpci_get_register(const struct vpci *vpci, - unsigned int offset, - unsigned int size) +struct vpci_register *vpci_get_register(const struct vpci *vpci, + unsigned int offset, + unsigned int size) { struct vpci_register *r; @@ -104,209 +87,6 @@ static struct vpci_register *vpci_get_re return NULL; } -static struct vpci_register *vpci_get_previous_cap_register( - const struct vpci *vpci, unsigned int offset) -{ - unsigned int next; - struct vpci_register *r; - - if ( offset < 0x40 ) - { - ASSERT_UNREACHABLE(); - return NULL; - } - - for ( r = vpci_get_register(vpci, PCI_CAPABILITY_LIST, 1); r; - r = next >= 0x40 ? vpci_get_register(vpci, - next + PCI_CAP_LIST_NEXT, 1) - : NULL ) - { - next = (unsigned int)(uintptr_t)r->private; - ASSERT(next == (uintptr_t)r->private); - if ( next == offset ) - break; - } - - return r; -} - -static int vpci_capability_hide(const struct pci_dev *pdev, unsigned int cap) -{ - const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap); - struct vpci_register *prev_r, *next_r; - struct vpci *vpci = pdev->vpci; - - if ( !offset ) - { - ASSERT_UNREACHABLE(); - return 0; - } - - spin_lock(&vpci->lock); - prev_r = vpci_get_previous_cap_register(vpci, offset); - next_r = vpci_get_register(vpci, offset + PCI_CAP_LIST_NEXT, 1); - if ( !prev_r || !next_r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - prev_r->private = next_r->private; - /* - * Not calling vpci_remove_registers() here is to avoid redoing - * the register search. - */ - list_del(&next_r->node); - spin_unlock(&vpci->lock); - xfree(next_r); - - if ( !is_hardware_domain(pdev->domain) ) - return vpci_remove_registers(vpci, offset + PCI_CAP_LIST_ID, 1); - - return 0; -} - -static struct vpci_register *vpci_get_previous_ext_cap_register( - const struct vpci *vpci, unsigned int offset) -{ - unsigned int pos = PCI_CFG_SPACE_SIZE; - struct vpci_register *r; - - if ( offset <= PCI_CFG_SPACE_SIZE ) - { - ASSERT_UNREACHABLE(); - return NULL; - } - - for ( r = vpci_get_register(vpci, pos, 4); r; - r = pos > PCI_CFG_SPACE_SIZE ? vpci_get_register(vpci, pos, 4) - : NULL ) - { - uint32_t header = (uint32_t)(uintptr_t)r->private; - - ASSERT(header == (uintptr_t)r->private); - - pos = PCI_EXT_CAP_NEXT(header); - if ( pos == offset ) - break; - } - - return r; -} - -static int vpci_ext_capability_hide( - const struct pci_dev *pdev, unsigned int cap) -{ - const unsigned int offset = pci_find_ext_capability(pdev, cap); - struct vpci_register *r, *prev_r; - struct vpci *vpci = pdev->vpci; - uint32_t header, pre_header; - - if ( offset < PCI_CFG_SPACE_SIZE ) - { - ASSERT_UNREACHABLE(); - return 0; - } - - spin_lock(&vpci->lock); - r = vpci_get_register(vpci, offset, 4); - if ( !r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - header = (uint32_t)(uintptr_t)r->private; - if ( offset == PCI_CFG_SPACE_SIZE ) - { - if ( PCI_EXT_CAP_NEXT(header) <= PCI_CFG_SPACE_SIZE ) - r->private = (void *)0; - else - /* - * The first extended capability (0x100) can not be removed from - * the linked list, so instead mask its capability ID to return 0 - * hopefully forcing OSes to skip it. - */ - r->private = (void *)(uintptr_t)(header & ~PCI_EXT_CAP_ID(header)); - - spin_unlock(&vpci->lock); - return 0; - } - - prev_r = vpci_get_previous_ext_cap_register(vpci, offset); - if ( !prev_r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - pre_header = (uint32_t)(uintptr_t)prev_r->private; - pre_header &= ~PCI_EXT_CAP_NEXT_MASK; - pre_header |= header & PCI_EXT_CAP_NEXT_MASK; - prev_r->private = (void *)(uintptr_t)pre_header; - - list_del(&r->node); - spin_unlock(&vpci->lock); - xfree(r); - - return 0; -} - -static int vpci_init_capabilities(struct pci_dev *pdev) -{ - for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) - { - const vpci_capability_t *capability = &__start_vpci_array[i]; - const unsigned int cap = capability->id; - const bool is_ext = capability->is_ext; - unsigned int pos = 0; - int rc; - - if ( !is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); - else if ( is_hardware_domain(pdev->domain) ) - pos = pci_find_ext_capability(pdev, cap); - - if ( !pos ) - continue; - - rc = capability->init(pdev); - if ( rc ) - { - const char *type = is_ext ? "extended" : "legacy"; - - printk(XENLOG_WARNING - "%pd %pp: init %s cap %u fail rc=%d, mask it\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - - if ( capability->cleanup ) - { - rc = capability->cleanup(pdev, true); - if ( rc ) - { - printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - if ( !is_hardware_domain(pdev->domain) ) - return rc; - } - } - - if ( !is_ext ) - rc = vpci_capability_hide(pdev, cap); - else - rc = vpci_ext_capability_hide(pdev, cap); - if ( rc ) - { - printk(XENLOG_ERR "%pd %pp: hide %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - return rc; - } - } - } - - return 0; -} - void vpci_deassign_device(struct pci_dev *pdev) { unsigned int i; @@ -322,29 +102,7 @@ void vpci_deassign_device(struct pci_dev &pdev->domain->vpci_dev_assigned_map); #endif - for ( i = 0; i < NUM_VPCI_INIT; i++ ) - { - const vpci_capability_t *capability = &__start_vpci_array[i]; - const unsigned int cap = capability->id; - unsigned int pos = 0; - - if ( !capability->cleanup ) - continue; - - if ( !capability->is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); - else if ( is_hardware_domain(pdev->domain) ) - pos = pci_find_ext_capability(pdev, cap); - if ( pos ) - { - int rc = capability->cleanup(pdev, false); - - if ( rc ) - printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, - capability->is_ext ? "extended" : "legacy", cap, rc); - } - } + vpci_cleanup_capabilities(pdev); spin_lock(&pdev->vpci->lock); while ( !list_empty(&pdev->vpci->handlers) ) From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:54:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:54:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226256.1532796 (Exim 4.92) (envelope-from ) id 1vplOT-0006Kc-AX; Tue, 10 Feb 2026 10:54:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226256.1532796; Tue, 10 Feb 2026 10:54:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplOT-0006KV-75; Tue, 10 Feb 2026 10:54:57 +0000 Received: by outflank-mailman (input) for mailman id 1226256; Tue, 10 Feb 2026 10:54:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplOS-0004jf-J3 for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:54:56 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ef32cb16-066e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:54:55 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-43622089851so636762f8f.3 for ; Tue, 10 Feb 2026 02:54:55 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Don't invoke them directly in vpci_init_header(), but instead first thing in vpci_init_capabilities(). Suggested-by: Roger Pau Monné Signed-off-by: Jan Beulich --- v4: New. --- a/xen/drivers/vpci/cap.c +++ b/xen/drivers/vpci/cap.c @@ -159,15 +159,150 @@ static int vpci_ext_capability_hide( return 0; } +static int vpci_init_capability_list(struct pci_dev *pdev) +{ + int rc; + bool mask_cap_list = false; + bool is_hwdom = is_hardware_domain(pdev->domain); + + if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST ) + { + /* Only expose capabilities to the guest that vPCI can handle. */ + unsigned int next, ttl = 48; + static const unsigned int supported_caps[] = { + PCI_CAP_ID_MSI, + PCI_CAP_ID_MSIX, + }; + /* + * For dom0, we should expose all capabilities instead of a fixed + * capabilities array, so setting n to 0 here is to get the next + * capability position directly in pci_find_next_cap_ttl. + */ + const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps); + + next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST, + supported_caps, n, &ttl); + + rc = vpci_add_register(pdev->vpci, vpci_read_val, + is_hwdom ? vpci_hw_write8 : NULL, + PCI_CAPABILITY_LIST, 1, + (void *)(uintptr_t)next); + if ( rc ) + return rc; + + next &= ~3; + + if ( !next && !is_hwdom ) + /* + * If we don't have any supported capabilities to expose to the + * guest, mask the PCI_STATUS_CAP_LIST bit in the status + * register. + */ + mask_cap_list = true; + + while ( next && ttl ) + { + unsigned int pos = next; + + next = pci_find_next_cap_ttl(pdev->sbdf, + pos + PCI_CAP_LIST_NEXT, + supported_caps, n, &ttl); + + if ( !is_hwdom ) + { + rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL, + pos + PCI_CAP_LIST_ID, 1, NULL); + if ( rc ) + return rc; + } + + rc = vpci_add_register(pdev->vpci, vpci_read_val, + is_hwdom ? vpci_hw_write8 : NULL, + pos + PCI_CAP_LIST_NEXT, 1, + (void *)(uintptr_t)next); + if ( rc ) + return rc; + + next &= ~3; + } + } + + /* Return early for the hw domain, no masking of PCI_STATUS. */ + if ( is_hwdom ) + return 0; + + /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */ + return vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16, + PCI_STATUS, 2, NULL, + PCI_STATUS_RO_MASK & + ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0), + PCI_STATUS_RW1C_MASK, + mask_cap_list ? PCI_STATUS_CAP_LIST : 0, + PCI_STATUS_RSVDZ_MASK); +} + +static int vpci_init_ext_capability_list(const struct pci_dev *pdev) +{ + unsigned int pos = PCI_CFG_SPACE_SIZE; + + if ( !pdev->ext_cfg ) + return 0; + + if ( !is_hardware_domain(pdev->domain) ) + /* Extended capabilities read as zero, write ignore for DomU */ + return vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, 4, (void *)0); + + do + { + uint32_t header = pci_conf_read32(pdev->sbdf, pos); + int rc; + + if ( header == 0xffffffffU ) + { + printk(XENLOG_WARNING + "%pd %pp: broken extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + + rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, 4, (void *)(uintptr_t)header); + if ( rc == -EEXIST ) + { + printk(XENLOG_WARNING + "%pd %pp: overlap in extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + + if ( rc ) + return rc; + + pos = PCI_EXT_CAP_NEXT(header); + } while ( pos >= PCI_CFG_SPACE_SIZE ); + + return 0; +} + int vpci_init_capabilities(struct pci_dev *pdev) { + int rc; + + rc = vpci_init_capability_list(pdev); + if ( rc ) + return rc; + + rc = vpci_init_ext_capability_list(pdev); + if ( rc ) + return rc; + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) { const vpci_capability_t *capability = &__start_vpci_array[i]; const unsigned int cap = capability->id; const bool is_ext = capability->is_ext; unsigned int pos = 0; - int rc; if ( !is_ext ) pos = pci_find_cap_offset(pdev->sbdf, cap); --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -744,132 +744,6 @@ static int bar_add_rangeset(const struct return !bar->mem ? -ENOMEM : 0; } -static int vpci_init_capability_list(struct pci_dev *pdev) -{ - int rc; - bool mask_cap_list = false; - bool is_hwdom = is_hardware_domain(pdev->domain); - - if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST ) - { - /* Only expose capabilities to the guest that vPCI can handle. */ - unsigned int next, ttl = 48; - static const unsigned int supported_caps[] = { - PCI_CAP_ID_MSI, - PCI_CAP_ID_MSIX, - }; - /* - * For dom0, we should expose all capabilities instead of a fixed - * capabilities array, so setting n to 0 here is to get the next - * capability position directly in pci_find_next_cap_ttl. - */ - const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps); - - next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST, - supported_caps, n, &ttl); - - rc = vpci_add_register(pdev->vpci, vpci_read_val, - is_hwdom ? vpci_hw_write8 : NULL, - PCI_CAPABILITY_LIST, 1, - (void *)(uintptr_t)next); - if ( rc ) - return rc; - - next &= ~3; - - if ( !next && !is_hwdom ) - /* - * If we don't have any supported capabilities to expose to the - * guest, mask the PCI_STATUS_CAP_LIST bit in the status - * register. - */ - mask_cap_list = true; - - while ( next && ttl ) - { - unsigned int pos = next; - - next = pci_find_next_cap_ttl(pdev->sbdf, - pos + PCI_CAP_LIST_NEXT, - supported_caps, n, &ttl); - - if ( !is_hwdom ) - { - rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL, - pos + PCI_CAP_LIST_ID, 1, NULL); - if ( rc ) - return rc; - } - - rc = vpci_add_register(pdev->vpci, vpci_read_val, - is_hwdom ? vpci_hw_write8 : NULL, - pos + PCI_CAP_LIST_NEXT, 1, - (void *)(uintptr_t)next); - if ( rc ) - return rc; - - next &= ~3; - } - } - - /* Return early for the hw domain, no masking of PCI_STATUS. */ - if ( is_hwdom ) - return 0; - - /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */ - return vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16, - PCI_STATUS, 2, NULL, - PCI_STATUS_RO_MASK & - ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0), - PCI_STATUS_RW1C_MASK, - mask_cap_list ? PCI_STATUS_CAP_LIST : 0, - PCI_STATUS_RSVDZ_MASK); -} - -static int vpci_init_ext_capability_list(const struct pci_dev *pdev) -{ - unsigned int pos = PCI_CFG_SPACE_SIZE; - - if ( !pdev->ext_cfg ) - return 0; - - if ( !is_hardware_domain(pdev->domain) ) - /* Extended capabilities read as zero, write ignore for DomU */ - return vpci_add_register(pdev->vpci, vpci_read_val, NULL, - pos, 4, (void *)0); - - do - { - uint32_t header = pci_conf_read32(pdev->sbdf, pos); - int rc; - - if ( header == 0xffffffffU ) - { - printk(XENLOG_WARNING - "%pd %pp: broken extended cap list, offset %#x\n", - pdev->domain, &pdev->sbdf, pos); - return 0; - } - - rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, - pos, 4, (void *)(uintptr_t)header); - if ( rc == -EEXIST ) - { - printk(XENLOG_WARNING - "%pd %pp: overlap in extended cap list, offset %#x\n", - pdev->domain, &pdev->sbdf, pos); - return 0; - } - - if ( rc ) - return rc; - - pos = PCI_EXT_CAP_NEXT(header); - } while ( pos >= PCI_CFG_SPACE_SIZE ); - - return 0; -} - int vpci_init_header(struct pci_dev *pdev) { uint16_t cmd; @@ -918,14 +792,6 @@ int vpci_init_header(struct pci_dev *pde if ( rc ) return rc; - rc = vpci_init_capability_list(pdev); - if ( rc ) - return rc; - - rc = vpci_init_ext_capability_list(pdev); - if ( rc ) - return rc; - if ( pdev->ignore_bars ) return 0; From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:55:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:55:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226264.1532806 (Exim 4.92) (envelope-from ) id 1vplP8-0006pp-I8; Tue, 10 Feb 2026 10:55:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226264.1532806; Tue, 10 Feb 2026 10:55:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplP8-0006pi-Ev; Tue, 10 Feb 2026 10:55:38 +0000 Received: by outflank-mailman (input) for mailman id 1226264; Tue, 10 Feb 2026 10:55:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vplP7-0006pN-7L for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 10:55:37 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 078fcdc6-066f-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 11:55:36 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-4359a302794so2557449f8f.1 for ; Tue, 10 Feb 2026 02:55:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 02:55:35 -0800 (PST) Message-ID: <67b1f190-a7a8-4cf2-89ca-7186204f0b56@suse.com> Date: Tue, 10 Feb 2026 11:55:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v4 5/5] vPCI: re-init extended-capabilities when MMCFG availability changed From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit When Dom0 informs us about MMCFG usability, this may change whether extended capabilities are available (accessible) for devices. Zap what might be on record, and re-initialize things. No synchronization is added for the case where devices may already be in use. That'll need sorting when (a) DomU support was added and (b) DomU-s may run already while Dom0 / hwdom still boots (dom0less, Hyperlaunch). Signed-off-by: Jan Beulich --- vpci_reinit_ext_capabilities()'es return value isn't checked, as it doesn't feel quite right to fail the hypercall because of this. At the same time it also doesn't feel quite right to have the function return "void". Thoughts? --- v4: Make sure ->cleanup() and ->init() are invoked. v3: New. --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -8,6 +8,8 @@ #include #include #include +#include + #include #include #include @@ -169,7 +171,10 @@ int cf_check physdev_check_pci_extcfg(st ASSERT(pdev->seg == info->segment); if ( pdev->bus >= info->start_bus && pdev->bus <= info->end_bus ) + { pci_check_extcfg(pdev); + vpci_reinit_ext_capabilities(pdev); + } return 0; } --- a/xen/drivers/vpci/cap.c +++ b/xen/drivers/vpci/cap.c @@ -285,13 +285,16 @@ static int vpci_init_ext_capability_list return 0; } -int vpci_init_capabilities(struct pci_dev *pdev) +int vpci_init_capabilities(struct pci_dev *pdev, bool ext_only) { int rc; - rc = vpci_init_capability_list(pdev); - if ( rc ) - return rc; + if ( !ext_only ) + { + rc = vpci_init_capability_list(pdev); + if ( rc ) + return rc; + } rc = vpci_init_ext_capability_list(pdev); if ( rc ) @@ -305,7 +308,7 @@ int vpci_init_capabilities(struct pci_de unsigned int pos = 0; if ( !is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); + pos = !ext_only ? pci_find_cap_offset(pdev->sbdf, cap) : 0; else if ( is_hardware_domain(pdev->domain) ) pos = pci_find_ext_capability(pdev, cap); @@ -349,7 +352,7 @@ int vpci_init_capabilities(struct pci_de return 0; } -void vpci_cleanup_capabilities(struct pci_dev *pdev) +void vpci_cleanup_capabilities(struct pci_dev *pdev, bool ext_only) { for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) { @@ -361,7 +364,7 @@ void vpci_cleanup_capabilities(struct pc continue; if ( !capability->is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); + pos = !ext_only ? pci_find_cap_offset(pdev->sbdf, cap) : 0; else if ( is_hardware_domain(pdev->domain) ) pos = pci_find_ext_capability(pdev, cap); if ( pos ) @@ -376,6 +379,20 @@ void vpci_cleanup_capabilities(struct pc } } +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) +{ + if ( !pdev->vpci ) + return 0; + + vpci_cleanup_capabilities(pdev, true); + + if ( vpci_remove_registers(pdev->vpci, PCI_CFG_SPACE_SIZE, + PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) ) + ASSERT_UNREACHABLE(); + + return vpci_init_capabilities(pdev, true); +} + /* * Local variables: * mode: C --- a/xen/drivers/vpci/private.h +++ b/xen/drivers/vpci/private.h @@ -44,8 +44,8 @@ typedef struct { #define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) -int vpci_init_capabilities(struct pci_dev *pdev); -void vpci_cleanup_capabilities(struct pci_dev *pdev); +int vpci_init_capabilities(struct pci_dev *pdev, bool ext_only); +void vpci_cleanup_capabilities(struct pci_dev *pdev, bool ext_only); /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -102,7 +102,7 @@ void vpci_deassign_device(struct pci_dev &pdev->domain->vpci_dev_assigned_map); #endif - vpci_cleanup_capabilities(pdev); + vpci_cleanup_capabilities(pdev, false); spin_lock(&pdev->vpci->lock); while ( !list_empty(&pdev->vpci->handlers) ) @@ -159,7 +159,7 @@ int vpci_assign_device(struct pci_dev *p if ( rc ) goto out; - rc = vpci_init_capabilities(pdev); + rc = vpci_init_capabilities(pdev, false); out: if ( rc ) --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -20,6 +20,7 @@ #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) int __must_check vpci_init_header(struct pci_dev *pdev); +int vpci_reinit_ext_capabilities(struct pci_dev *pdev); /* Assign vPCI to device by adding handlers. */ int __must_check vpci_assign_device(struct pci_dev *pdev); @@ -197,6 +198,11 @@ bool vpci_ecam_read(pci_sbdf_t sbdf, uns #else /* !CONFIG_HAS_VPCI */ struct vpci_vcpu {}; +static inline int vpci_reinit_ext_capabilities(struct pci_dev *pdev) +{ + return 0; +} + static inline int vpci_assign_device(struct pci_dev *pdev) { return 0; From xen-devel-bounces@lists.xenproject.org Tue Feb 10 10:58:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 10:58:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226276.1532816 (Exim 4.92) (envelope-from ) id 1vplRY-0007cz-VT; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: apC9g/RNfuVlHGVX4UNZpuIkoW/KzEdxavfLgMjMW4iBLOfU1fVNECVowoR+rjER2LmfzRC4w0trGnD2A2f5ycFjAzxQcVBa+iGnoJmL52a0NtVDASM8MoYzYlqn2ai1i3SICgSXjwDs/v2hjtGA9rmAJ91WuqKu/Pg2XAAVPa6rHvXcEfVOhigpH3GMbVisMANIrsWbCt6VEKnpxEM9k7fFXKPvbqeaXP+748z6wdPg4mDFxnwcU58uc6CwpDU4xXNXs8nRlMybhJVXKbNG90JqbfOhikK4ygShqbTnN3AXXQ8zYXOTDHr8f5bJJX61flQKR4XJ0WqSGgwIz8pdhziWCOcfVMyTWnyPLZTjqmSsMuAafMz5BgpIroCGuW17e9LFB1nzrPhVDEgVcHHE6XNXydjSKVlTkt15T4qX4yau4GKMNyBeKmHe7ExDvzop X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 10:57:53.8503 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 10e568d1-d716-475e-05bf-08de68933dca X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001A2.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8808 Hi Jan, > On 10 Feb 2026, at 11:46, Jan Beulich wrote: >=20 > On 09.02.2026 11:46, Bertrand Marquis wrote: >> --- /dev/null >> +++ b/config/Darwin.mk >> @@ -0,0 +1,6 @@ >> +# Use GNU tool definitions as the tools we are using are either GNU com= patible >> +# or we only use features which are supported on Mac OS. >> +include $(XEN_ROOT)/config/StdGNU.mk >> + >> +# Cross compile on Mac OS, only hypervisor build has been tested, no to= ols >> +XEN_COMPILE_ARCH =3D unknow >=20 > While editing in the ABI aspect, it occurred to me to check what Apple ha= s > to say regarding their ABI. For both aarch64 and x86-64 they say they use > the standard ABI with some modifications. We may want to evaluate whether > those modifications are actually compatible with what we need. >=20 > Talking of x86-64: Has building on an x86 Mac been tested as well? No i did not tested that (and i have no x86 mac i can use to do so). > Especially if that doesn't work, it may want mentioning. We might have to say that it was only tested on arm mac. I would expect that it works on x86 mac but i cannot sign on that. Cheers Bertrand >=20 > Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 11:15:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 11:15:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226292.1532826 (Exim 4.92) (envelope-from ) id 1vpliP-0002Bm-Dz; Tue, 10 Feb 2026 11:15:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226292.1532826; Tue, 10 Feb 2026 11:15:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpliP-0002Bf-Ab; Tue, 10 Feb 2026 11:15:33 +0000 Received: by outflank-mailman (input) for mailman id 1226292; Tue, 10 Feb 2026 11:15:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpliN-0002BZ-71 for xen-devel@lists.xenproject.org; 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This >> means that switch_stack_and_jump() needs to discard one extra word when FRED >> is active. >> >> Fix a typo in the parameter name, which should be shstk_base. >> >> Signed-off-by: Andrew Cooper >> Reviewed-by: Jan Beulich >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> >> Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 >> to parse as an instruction immediate. > I don't follow. Where would the 2nd $ come from if you write ... > >> --- a/xen/arch/x86/include/asm/current.h >> +++ b/xen/arch/x86/include/asm/current.h >> @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); >> "rdsspd %[ssp];" \ >> "cmp $1, %[ssp];" \ >> "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ >> - "mov $%c[skstk_base], %[val];" \ >> + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ >> + "mov $%c[shstk_base] + 8, %[val];", \ >> + X86_FEATURE_XEN_FRED) \ > ALTERNATIVE("mov %[shstk_base], %[val];", \ > "mov %[shstk_base] + 8, %[val];", \ > X86_FEATURE_XEN_FRED) \ I find this feedback completely uncharacteristic.  You always goes out of your way to hide % inside macros to prohibit non-register operands. This is exactly the same, except to force an immediate operand, so the length of the two instructions is the same. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 10 11:41:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 11:41:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226305.1532835 (Exim 4.92) (envelope-from ) id 1vpm7k-0006Z5-E5; Tue, 10 Feb 2026 11:41:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226305.1532835; Tue, 10 Feb 2026 11:41:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpm7k-0006Yy-BM; Tue, 10 Feb 2026 11:41:44 +0000 Received: by outflank-mailman (input) for mailman id 1226305; Tue, 10 Feb 2026 11:41:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpm7j-0006Yr-DB for xen-devel@lists.xenproject.org; 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For both aarch64 and x86-64 they say they use > the standard ABI with some modifications. We may want to evaluate whether > those modifications are actually compatible with what we need. >=20 > Talking of x86-64: Has building on an x86 Mac been tested as well? > Especially if that doesn't work, it may want mentioning. I no longer have access to an x86 Mac, those are about to disappear. FWIW, I build x86 on Mac using the Docker containers, just as the CI does. OSX Docker allows running x86 containers on arm64 using the "Rosetta 2" binary translation layer. I've attempted doing a cross-build from an arm64 Mac using the x86-elf toolchain, but got the following error: % make XEN_TARGET_ARCH=3Dx86_64 CROSS_COMPILE=3Dx86_64-elf- HOSTCC=3Dgcc -C= xen V=3D1 [...] /Library/Developer/CommandLineTools/usr/bin/make -f ./Rules.mk obj=3Dcommon= need-builtin=3D1 x86_64-elf-gcc -MMD -MP -MF common/.bitmap.o.d -m64 -DBUILD_ID -fno-stric= t-aliasing -std=3Dgnu99 -Wall -Wstrict-prototypes -Wno-unused-but-set-varia= ble -Wno-unused-local-typedefs -O1 -fno-omit-frame-pointer -nostdinc -fno= -builtin -fno-common -fzero-init-padding-bits=3Dall -Werror -Wredundant-dec= ls -Wwrite-strings -Wno-pointer-arith -Wdeclaration-after-statement -Wunini= tialized -Wvla -Wflex-array-member-not-at-end -Winit-self -pipe -D__XEN__ -= include ./include/xen/config.h -Wa,--strip-local-absolute -ffunction-sectio= ns -fdata-sections -g -malign-data=3Dabi -mindirect-branch=3Dthunk-extern -= mindirect-branch-register -fno-jump-tables -mfunction-return=3Dthunk-extern= -Wa,-mx86-used-note=3Dno -fno-stack-protector -I./include -I./arch/x86/in= clude -I./arch/x86/include/generated -DXEN_IMG_OFFSET=3D0x200000 -msoft-flo= at -fno-pie -fno-exceptions -fno-asynchronous-unwind-tables -Wnested-extern= s -DHAVE_AS_QUOTED_SYM -DHAVE_AS_MOVDIR -DHAVE_AS_ENQCMD -DHAVE_AS_NOPS_DIR= ECTIVE -mno-red-zone -fpic -mno-mmx -mno-sse -mskip-rax-setup -fcf-protecti= on=3Dbranch -mmanual-endbr -fno-jump-tables -mmemcpy-strategy=3Dunrolled_lo= op:16:noalign,libcall:-1:noalign -mmemset-strategy=3Dunrolled_loop:16:noali= gn,libcall:-1:noalign -Wa,-I./include -Wa,-I./include '-D__OBJECT_LABEL__= =3Dcommon/bitmap.o' -mpreferred-stack-boundary=3D3 -c common/bitmap.c -o = common/.bitmap.o.tmp -MQ common/bitmap.o ./arch/x86/include/asm/bitops.h: Assembler messages: ./arch/x86/include/asm/bitops.h:511: Error: found ' ', expected: ')' ./arch/x86/include/asm/bitops.h:511: Error: found ' ', expected: ')' ./arch/x86/include/asm/bitops.h:511: Error: found ' ', expected: ')' ./arch/x86/include/asm/bitops.h:511: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:20: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside of f= eatureset range ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:28: Error: found ' ', expected: ')' ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside of f= eatureset range I haven't investigated further. Seems like some issue with alternative and the uses of CPUID defines. We probably want to mention in the commit message that only arm64 builds have been tested so far. Thanks, Roger. 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Tue, 10 Feb 2026 03:42:01 -0800 (PST) Message-ID: <9c7930ad-196a-419e-b81c-d87cba5973db@suse.com> Date: Tue, 10 Feb 2026 12:42:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/22] x86/traps: Alter switch_stack_and_jump() for FRED mode To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20251003225334.2123667-1-andrew.cooper3@citrix.com> <20251003225334.2123667-8-andrew.cooper3@citrix.com> <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 12:15, Andrew Cooper wrote: > On 07/10/2025 4:58 pm, Jan Beulich wrote: >> On 04.10.2025 00:53, Andrew Cooper wrote: >>> FRED and IDT differ by a Supervisor Token on the base of the shstk. This >>> means that switch_stack_and_jump() needs to discard one extra word when FRED >>> is active. >>> >>> Fix a typo in the parameter name, which should be shstk_base. >>> >>> Signed-off-by: Andrew Cooper >>> Reviewed-by: Jan Beulich >>> --- >>> CC: Jan Beulich >>> CC: Roger Pau Monné >>> >>> Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 >>> to parse as an instruction immediate. >> I don't follow. Where would the 2nd $ come from if you write ... >> >>> --- a/xen/arch/x86/include/asm/current.h >>> +++ b/xen/arch/x86/include/asm/current.h >>> @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); >>> "rdsspd %[ssp];" \ >>> "cmp $1, %[ssp];" \ >>> "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ >>> - "mov $%c[skstk_base], %[val];" \ >>> + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ >>> + "mov $%c[shstk_base] + 8, %[val];", \ >>> + X86_FEATURE_XEN_FRED) \ >> ALTERNATIVE("mov %[shstk_base], %[val];", \ >> "mov %[shstk_base] + 8, %[val];", \ >> X86_FEATURE_XEN_FRED) \ > > I find this feedback completely uncharacteristic.  You always goes out > of your way to hide % inside macros to prohibit non-register operands. > > This is exactly the same, except to force an immediate operand, so the > length of the two instructions is the same. Might there be some misunderstanding? $%c isn't what forces an immediate operand. It's the constraint (not visible above) which does. What we see above is only an elaborate form of a format string, requiring that operands are already of appropriate type (arranged for by way of the corresponding constraint). If a modifier character like 'c' doesn't apply to the type of operand selected, the compiler may issue a diagnostic, may ignore the modifier, or may emit code the assembler can't make sense of. (Of course a particular modifier character could, in principle, also have different meaning for different kinds of operands.) Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 11:55:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 11:55:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226333.1532876 (Exim 4.92) (envelope-from ) id 1vpmLJ-0000YI-5D; Tue, 10 Feb 2026 11:55:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226333.1532876; Tue, 10 Feb 2026 11:55:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpmLJ-0000YB-1m; Tue, 10 Feb 2026 11:55:45 +0000 Received: by outflank-mailman (input) for mailman id 1226333; Tue, 10 Feb 2026 11:55:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpmLH-0000Y5-Hs for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 11:55:43 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6c379a01-0677-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 12:55:41 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-481188b7760so39321495e9.0 for ; Tue, 10 Feb 2026 03:55:41 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 03:55:40 -0800 (PST) Message-ID: <82adaa8a-b7d9-40fa-b59b-0851776fb59b@suse.com> Date: Tue, 10 Feb 2026 12:55:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/22] x86/traps: Alter switch_stack_and_jump() for FRED mode To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20251003225334.2123667-1-andrew.cooper3@citrix.com> <20251003225334.2123667-8-andrew.cooper3@citrix.com> <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 12:15, Andrew Cooper wrote: > On 07/10/2025 4:58 pm, Jan Beulich wrote: >> On 04.10.2025 00:53, Andrew Cooper wrote: >>> FRED and IDT differ by a Supervisor Token on the base of the shstk. This >>> means that switch_stack_and_jump() needs to discard one extra word when FRED >>> is active. >>> >>> Fix a typo in the parameter name, which should be shstk_base. >>> >>> Signed-off-by: Andrew Cooper >>> Reviewed-by: Jan Beulich >>> --- >>> CC: Jan Beulich >>> CC: Roger Pau Monné >>> >>> Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 >>> to parse as an instruction immediate. >> I don't follow. Where would the 2nd $ come from if you write ... >> >>> --- a/xen/arch/x86/include/asm/current.h >>> +++ b/xen/arch/x86/include/asm/current.h >>> @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); >>> "rdsspd %[ssp];" \ >>> "cmp $1, %[ssp];" \ >>> "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ >>> - "mov $%c[skstk_base], %[val];" \ >>> + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ >>> + "mov $%c[shstk_base] + 8, %[val];", \ >>> + X86_FEATURE_XEN_FRED) \ >> ALTERNATIVE("mov %[shstk_base], %[val];", \ >> "mov %[shstk_base] + 8, %[val];", \ >> X86_FEATURE_XEN_FRED) \ > > I find this feedback completely uncharacteristic.  You always goes out > of your way to hide % inside macros to prohibit non-register operands. > > This is exactly the same, except to force an immediate operand, so the > length of the two instructions is the same. Thinking about it more, are you perhaps referring to assembler macros? There indeed I prefer to have the % inside the macros; the same may go for $ there, but I don't think we had the need so far. For inline assembly the situation is different: The compiler emits the % (and also the $), unless special modifiers are used. It wouldn't even occur to me to ask that we use %%%V[val] for a register operand. That really is the register equivalent of the $%c[val] that you use above. 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It will possibly allow such > > optimization for Intel or AMD, but not for Hygon/Centaur/Shanghai, as > > for those CPUs you will always end up selecting either Intel or AMD as > > a requisite (so X86_ENABLED_VENDORS will never have only a single bit > > set). > > > > Not saying it's bad, but I think the comment above should be adjusted > > a bit to notice that such compile time optimizations for single vendor > > builds will only be applicable to Intel or AMD builds. > > You can't build a Hygon-only hypervisor with these changes. I can rewrite the > commit message to clearly state which vendors are subject to the optimisation, > though I'd fully expect users to notice they just can't deselect AMD when > building for Hygon. Yes, right, I guess someone would notice that right now it's not possible to select just Hygon for example, and that it always pulls AMD. In theory it should be possible to decouple the set of supported CPUs in X86_ENABLED_VENDORS from the set of support code that you build the hypervisor with. IOW: it should be possible to build an hypervisor with CONFIG_AMD & CONFIG_HYGON that only has CONFIG_HYGON in X86_ENABLED_VENDORS. For the purpose of enabling secondary vendors (like Hygon) to also take advantage of such build time optimizations. > > > >> * For all other cases it ANDs the result with the mask of compiled > >> vendors, with the effect of performing DCE in switch cases, removing > >> dead conditionals, etc. > >> > >> It's difficult to reason about codegen in general in a project this big, > >> but in this case the ANDed constant combines with the values typically > >> checked against, folding into a comparison against zero. Thus, it's better > >> for codegen to AND its result with the desired compared-against vendor, > >> rather than using (in)equality operators. That way the comparison is > >> always against zero. > >> > >> "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" > >> > >> turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + > >> cmp with zero). Whereas this... > >> > >> "cpu_vendor() == X86_VENDOR_AMD" > >> > >> forces cpu_vendor() to be ANDed and then compared to a non-zero value. > >> > >> Later patches take the opportunity and make this refactor as cpu_vendor() > >> is introduced throughout the tree. > >> > >> Signed-off-by: Alejandro Vallejo > >> --- > >> xen/arch/x86/cpu/common.c | 6 +++++- > >> xen/arch/x86/guest/xen/xen.c | 4 ++++ > >> xen/arch/x86/include/asm/cpufeature.h | 27 +++++++++++++++++++++++++++ > >> 3 files changed, 36 insertions(+), 1 deletion(-) > >> > >> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c > >> index ebe2baf8b9..6f4e723172 100644 > >> --- a/xen/arch/x86/cpu/common.c > >> +++ b/xen/arch/x86/cpu/common.c > >> @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) > >> *(u32 *)&c->x86_vendor_id[4] = edx; > >> > >> c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > >> - switch (c->x86_vendor) { > >> + if ( c->x86_vendor != cpu_vendor() ) > >> + panic("CPU vendor not compiled-in: %s", > >> + x86_cpuid_vendor_to_str(c->x86_vendor)); > > > > I think you want to print both the current compiled in support plus > > the host vendor as part of the panic message. > > The mask of supported vendors, you mean? That could be helpful. Yes, print both c->x86_vendor and cpu_vendor() as part of the error message. > > > >> + > >> + switch (cpu_vendor()) { > >> case X86_VENDOR_INTEL: intel_unlock_cpuid_leaves(c); > >> actual_cpu = intel_cpu_dev; break; > >> case X86_VENDOR_AMD: actual_cpu = amd_cpu_dev; break; > >> diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c > >> index 77a3a8742a..ec558bcbdb 100644 > >> --- a/xen/arch/x86/guest/xen/xen.c > >> +++ b/xen/arch/x86/guest/xen/xen.c > >> @@ -57,6 +57,10 @@ void asmlinkage __init early_hypercall_setup(void) > >> cpuid(0, &eax, &ebx, &ecx, &edx); > >> > >> boot_cpu_data.x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > >> + > >> + if ( cpu_vendor() != boot_cpu_data.x86_vendor ) > >> + panic("CPU vendor not compiled-in: %s", > >> + x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); > > > > Is this going to be useful? I fear the panic here might happen even > > before the console is setup, so a user won't get any output from Xen > > at all. > > It is true that early_cpu_init() is invoked immediately after serial is > set up, so any other vendor check ends up being fairly useless. > > OTOH, thinking about it may stand to reason to have: > > 1. A very early panic in assembly, like that of missing nx. > 2. Have this early hypercall setup nonsense present ONLY when INTEL && AMD > are both enabled. It really makes no sense to probe when you have > explilcitly compiled for a single vendor. If you don't probe at all, then yes, you would need an assembly-like message. However given the hypercall page initialization is likely to be used mostly in pv-shim mode, not even the assembly message would get out I'm afraid, as the code to print such message only outputs to the VGA and the serial, but not to the Xen PV console provided in shim mode. pv-shim runs inside of a PVH container, that doesn't have emulated serial or VGA. You could implement early PV console support to print such message, but it seems simpler to me to defer the panic until early_cpu_init() for the sake of simplicity. > > > > > Would it be fine to allow such mismatch in the hypercall setup, just > > for the sake of getting the console page setup so that > > early_cpu_init() can print a proper error message? > > > > Allowing the vendor mismatch here won't require any extra code, it's > > just the selection of the instruction to use to call into Xen when > > running in guest/shim mode. > > It'd be fine, yes. Maybe with a comment noting we can use vm{m,}call whether > or not cpu_vendor() == 0 because the instruction itself is supported by HW. > > OTOH, I could also fully drop the dynamic detection logic on AMDLIKE-only or > INTELLIKE-only builds like I mentioned above. That would still leave us in a difficult situation w.r.t printing anything to warn the user in case of mismatch. > I sort of like that second option, as it allows removing hypercall.S and > hook it to the real hypercall machinery, that at that point can have the > alternatives removed. I think you possible need a way to cope with vendor mismatch in the early hypercall setup, just enough so that you can get into early_cpu_init() to panic and print an error message. Thanks, Roger. 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To start with, implement >> exception handling in the same manner as entry_from_xen(), although we can >> unconditionally enable interrupts after the async/fatal events. >> >> After entry_from_pv() returns, test_all_events() needs to run to perform >> exception and interrupt injection. Split entry_FRED_R3() into two and >> introduce eretu_exit_to_guest() as the latter half, coming unilaterally from >> restore_all_guest(). >> >> For all of this, there is a slightly complicated relationship with CONFIG_PV. >> entry_FRED_R3() must exist irrespective of CONFIG_PV, because it's the >> entrypoint registered with hardware. For simplicity, entry_from_pv() is >> always called, but it collapses into fatal_trap() in the !PV case. >> >> Signed-off-by: Andrew Cooper > Reviewed-by: Jan Beulich Thanks. > > Nevertheless ... > >> --- a/xen/arch/x86/traps.c >> +++ b/xen/arch/x86/traps.c >> @@ -2266,9 +2266,82 @@ void asmlinkage check_ist_exit(const struct cpu_user_regs *regs, bool ist_exit) >> >> void asmlinkage entry_from_pv(struct cpu_user_regs *regs) >> { >> + struct fred_info *fi = cpu_regs_fred_info(regs); >> + uint8_t type = regs->fred_ss.type; >> + uint8_t vec = regs->fred_ss.vector; >> + >> /* Copy fred_ss.vector into entry_vector as IDT delivery would have done. */ >> - regs->entry_vector = regs->fred_ss.vector; >> + regs->entry_vector = vec; >> + >> + if ( !IS_ENABLED(CONFIG_PV) ) >> + goto fatal; >> + >> + /* >> + * First, handle the asynchronous or fatal events. These are either >> + * unrelated to the interrupted context, or may not have valid context >> + * recorded, and all have special rules on how/whether to re-enable IRQs. >> + */ >> + switch ( type ) >> + { >> + case X86_ET_EXT_INTR: >> + return do_IRQ(regs); >> + >> + case X86_ET_NMI: >> + return do_nmi(regs); >> + >> + case X86_ET_HW_EXC: >> + switch ( vec ) >> + { >> + case X86_EXC_DF: return do_double_fault(regs); >> + case X86_EXC_MC: return do_machine_check(regs); >> + } >> + break; >> + } >> + >> + /* >> + * With the asynchronous events handled, what remains are the synchronous >> + * ones. PV guest context always had interrupts enabled. >> + */ >> + local_irq_enable(); >> + >> + switch ( type ) >> + { >> + case X86_ET_HW_EXC: >> + case X86_ET_PRIV_SW_EXC: >> + case X86_ET_SW_EXC: >> + switch ( vec ) >> + { >> + case X86_EXC_PF: handle_PF(regs, fi->edata); break; >> + case X86_EXC_GP: do_general_protection(regs); break; >> + case X86_EXC_UD: do_invalid_op(regs); break; >> + case X86_EXC_NM: do_device_not_available(regs); break; >> + case X86_EXC_BP: do_int3(regs); break; >> + case X86_EXC_DB: handle_DB(regs, fi->edata); break; >> + case X86_EXC_CP: do_entry_CP(regs); break; >> + >> + case X86_EXC_DE: >> + case X86_EXC_OF: >> + case X86_EXC_BR: >> + case X86_EXC_NP: >> + case X86_EXC_SS: >> + case X86_EXC_MF: >> + case X86_EXC_AC: >> + case X86_EXC_XM: >> + do_trap(regs); >> + break; >> >> + default: >> + goto fatal; >> + } >> + break; >> + >> + default: >> + goto fatal; >> + } >> + >> + return; >> + >> + fatal: >> fatal_trap(regs, false); >> } > ... I'm still somewhat bothered by this almost entirely duplicating the > other entry function, i.e. I continue to wonder if we wouldn't be better > off by eliminating that duplication (say by way of an always_inline > helper with a suitable extra parameter). They are not sufficiently similar. By the end of this series alone, they differ by IS_ENABLED(CONFIG_PV), the condition for enabling local interrupts, the ERETU fixup, and the SYSCALL/SYSENTER handling. NMI handling is still an open question (deferred for now, because it functions, albeit inefficiently) and adds a further difference. > >> --- a/xen/arch/x86/x86_64/entry.S >> +++ b/xen/arch/x86/x86_64/entry.S >> @@ -63,7 +63,7 @@ UNLIKELY_END(syscall_no_callback) >> /* Conditionally clear DF */ >> and %esi, UREGS_eflags(%rsp) >> /* %rbx: struct vcpu */ >> -test_all_events: >> +LABEL(test_all_events, 0) >> ASSERT_NOT_IN_ATOMIC >> cli # tests must not race interrupts >> /*test_softirqs:*/ >> @@ -152,6 +152,8 @@ END(switch_to_kernel) >> FUNC_LOCAL(restore_all_guest) >> ASSERT_INTERRUPTS_DISABLED >> >> + ALTERNATIVE "", "jmp eretu_exit_to_guest", X86_FEATURE_XEN_FRED >> + >> /* Stash guest SPEC_CTRL value while we can read struct vcpu. */ >> mov VCPU_arch_msrs(%rbx), %rdx > I also continue to wonder if we wouldn't do a tiny bit better by using > > ALTERNATIVE "mov VCPU_arch_msrs(%rbx), %rdx", \ > "jmp eretu_exit_to_guest", \ > X86_FEATURE_XEN_FRED > > Or by converting the few jumps to restore_all_guest to alternatives > (duplicating the ASSERT_INTERRUPTS_DISABLED there). I'm quite firmly against this. Sure, we could save a 5 byte nop, but the cost of doing that is merging two unrelated pieces of logic in a construct explicitly to signal two related things. The added complexity to follow the logic is not worth the 5 byte nop saving. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 10 12:58:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 12:58:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226380.1532906 (Exim 4.92) (envelope-from ) id 1vpnJV-0000su-9W; Tue, 10 Feb 2026 12:57:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226380.1532906; Tue, 10 Feb 2026 12:57:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpnJV-0000sn-6h; Tue, 10 Feb 2026 12:57:57 +0000 Received: by outflank-mailman (input) for mailman id 1226380; Tue, 10 Feb 2026 12:57:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8783 On Mon Feb 9, 2026 at 4:55 PM CET, Jan Beulich wrote: > On 09.02.2026 16:24, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 3:48 PM CET, Jan Beulich wrote: >>> On 09.02.2026 11:31, Alejandro Vallejo wrote: >>>> --- a/xen/arch/x86/Kconfig >>>> +++ b/xen/arch/x86/Kconfig >>>> @@ -146,6 +146,7 @@ config XEN_IBT >>>> config SHADOW_PAGING >>>> bool "Shadow Paging" >>>> default !PV_SHIM_EXCLUSIVE >>>> + select LOG_DIRTY >>>> depends on PV || HVM >>>> help >>> >>> Why would this be? IOW why would shadow imply log-dirty, but HAP wouldn= 't? >>=20 >> The logic is rather opaque. I admit I'm a bit fuzzy on the uses of logdi= rty. >>=20 >> I know what it's for and I could navigate the code if a problem arose, b= ut I'm >> less clear about which other elements of the hypervisor rely on it (pod?= nsvm? >> vvmx? shadow? hap?). >>=20 >> If it's strictly toolstack/DM-driven maybe it'd be more apt to have a se= parate >> LIVE_MIGRATION and SAVE_RESTORE configs where LM selects SAVE_RESTORE, w= hich >> selects LOG_DIRTY. That's also improve some defaults auto-downgraded fro= m the >> max policy just in case a VM is migrated. > > It's save (not restore) for both PV and HVM, and VRAM dirty tracking for = HVM > only. Ordinary HVM guests will want VRAM tracking, so compiling out suppo= rt > for it will imo want mentioning in the Kconfig help text. ack. > >>>> --- a/xen/arch/x86/domctl.c >>>> +++ b/xen/arch/x86/domctl.c >>>> @@ -220,15 +220,15 @@ long arch_do_domctl( >>>> { >>>> =20 >>>> case XEN_DOMCTL_shadow_op: >>>> -#ifdef CONFIG_PAGING >>>> + ret =3D -EOPNOTSUPP; >>>> + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) >>>> + break; >>>> + >>>> ret =3D paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); >>>> if ( ret =3D=3D -ERESTART ) >>>> return hypercall_create_continuation( >>>> __HYPERVISOR_paging_domctl_cont, "h", u_domctl= ); >>>> copyback =3D true; >>>> -#else >>>> - ret =3D -EOPNOTSUPP; >>>> -#endif >>>> break; >>> >>> Can a HVM-only hypervisor create any guests with this? I simply fail to >>> see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it through = to >>> hap_domctl(). >>=20 >> xl doesn't seem to call it at all. hap_set_allocation() is implicitly ca= lled >> through paging_enable() -> hap_enable() -> hap_set_allocation() > > xl must be calling it, at least in the case where the paging pool size is > explicitly set in the guest config. The important point is - not all of > XEN_DOMCTL_shadow_op's sub-ops are log-dirty related. > > It's also odd that you did make changes at the call site here, but then > left the called function (and its sibling paging_domctl_cont()) in place. > > Jan That goes through DOMCTL_set_paging_mempool_size. With identical behaviour except it uses a different op. Blergh. There are no uses for shadow ops other than logdirty that I can see. libs/guest/xg_sr_save.c: rc =3D xc_shadow_control(xch, ctx->domid, libs/guest/xg_sr_save.c- XEN_DOMCTL_SHADOW_OP_ENA= BLE_LOGDIRTY, -- libs/guest/xg_sr_save.c: rc =3D xc_shadow_control(xch, ctx->domid, X= EN_DOMCTL_SHADOW_OP_OFF, libs/guest/xg_sr_save.c- NULL, 0); -- libs/guest/xg_sr_save.c: rc =3D xc_shadow_control(xch, ctx->domi= d, libs/guest/xg_sr_save.c- XEN_DOMCTL_SHADO= W_OP_ENABLE_LOGDIRTY, -- libs/guest/xg_sr_save.c: xc_shadow_control(xch, ctx->domid, XEN_DOMCTL_S= HADOW_OP_OFF, libs/guest/xg_sr_save.c- NULL, 0); -- libs/light/libxl_colo_restore.c: if (xc_shadow_control(CTX->xch, domid, libs/light/libxl_colo_restore.c- XEN_DOMCTL_SHADOW= _OP_ENABLE_LOGDIRTY, -- libs/light/libxl_colo_restore.c: if (xc_shadow_control(CTX->xch, domid, = XEN_DOMCTL_SHADOW_OP_OFF, -- ocaml/libs/xc/xenctrl_stubs.c: ret =3D xc_shadow_control(xch, Int_val(domi= d), ocaml/libs/xc/xenctrl_stubs.c- XEN_DOMCTL_SHADOW_O= P_GET_ALLOCATION, -- ocaml/libs/xc/xenctrl_stubs.c: ret =3D xc_shadow_control(xch, Int_val(domi= d), ocaml/libs/xc/xenctrl_stubs.c- XEN_DOMCTL_SHADOW_O= P_SET_ALLOCATION, Not even for shadow, which seems=20 There's an ocaml stub, but I can't be bothered to check whether XAPI uses i= t. I'll leave around the domctl so XEN_DOMCTL_SHADOW_OP_OFF doesn't return -EOPNOTSUPP, but set/get allocation should go away at some point before stabilising the control interfaces. I'll also remove the bad #if PG_log_dirty gating these, as it really just w= ants to be !PV_SHIM_EXCLUSIVE (that's why I originally got rid of it all). Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 13:22:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 13:22:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226403.1532926 (Exim 4.92) (envelope-from ) id 1vpngl-0005HQ-El; Tue, 10 Feb 2026 13:21:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226403.1532926; Tue, 10 Feb 2026 13:21:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpngl-0005HJ-Bf; Tue, 10 Feb 2026 13:21:59 +0000 Received: by outflank-mailman (input) for mailman id 1226403; Tue, 10 Feb 2026 13:21:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpngk-0005Gu-5e for xen-devel@lists.xenproject.org; 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IOW why would shadow imply log-dirty, but HAP wouldn't? >>> The logic is rather opaque. I admit I'm a bit fuzzy on the uses of logdirty. >>> >>> I know what it's for and I could navigate the code if a problem arose, but I'm >>> less clear about which other elements of the hypervisor rely on it (pod? nsvm? >>> vvmx? shadow? hap?). >>> >>> If it's strictly toolstack/DM-driven maybe it'd be more apt to have a separate >>> LIVE_MIGRATION and SAVE_RESTORE configs where LM selects SAVE_RESTORE, which >>> selects LOG_DIRTY. That's also improve some defaults auto-downgraded from the >>> max policy just in case a VM is migrated. >> It's save (not restore) for both PV and HVM, and VRAM dirty tracking for HVM >> only. Ordinary HVM guests will want VRAM tracking, so compiling out support >> for it will imo want mentioning in the Kconfig help text. > ack. > >>>>> --- a/xen/arch/x86/domctl.c >>>>> +++ b/xen/arch/x86/domctl.c >>>>> @@ -220,15 +220,15 @@ long arch_do_domctl( >>>>> { >>>>> >>>>> case XEN_DOMCTL_shadow_op: >>>>> -#ifdef CONFIG_PAGING >>>>> + ret = -EOPNOTSUPP; >>>>> + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) >>>>> + break; >>>>> + >>>>> ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); >>>>> if ( ret == -ERESTART ) >>>>> return hypercall_create_continuation( >>>>> __HYPERVISOR_paging_domctl_cont, "h", u_domctl); >>>>> copyback = true; >>>>> -#else >>>>> - ret = -EOPNOTSUPP; >>>>> -#endif >>>>> break; >>>> Can a HVM-only hypervisor create any guests with this? I simply fail to >>>> see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it through to >>>> hap_domctl(). >>> xl doesn't seem to call it at all. hap_set_allocation() is implicitly called >>> through paging_enable() -> hap_enable() -> hap_set_allocation() >> xl must be calling it, at least in the case where the paging pool size is >> explicitly set in the guest config. The important point is - not all of >> XEN_DOMCTL_shadow_op's sub-ops are log-dirty related. >> >> It's also odd that you did make changes at the call site here, but then >> left the called function (and its sibling paging_domctl_cont()) in place. >> >> Jan > That goes through DOMCTL_set_paging_mempool_size. This DOMCTL was added in an XSA because ARM needed the functionality, hence no cleanup. I didn't get around to cleaning up XEN_DOMCTL_SHADOW_OP_{GET,SET}_ALLOCATION, but please do.  We should not have multiple ways of configuring this, and it simplifies the your patch. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 10 13:46:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 13:46:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226415.1532937 (Exim 4.92) (envelope-from ) id 1vpo43-0008Jo-8z; Tue, 10 Feb 2026 13:46:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226415.1532937; Tue, 10 Feb 2026 13:46:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpo43-0008Jh-3z; Tue, 10 Feb 2026 13:46:03 +0000 Received: by outflank-mailman (input) for mailman id 1226415; Tue, 10 Feb 2026 13:46:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpo42-0008Ja-I0 for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 13:46:02 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d55640d3-0686-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 14:46:00 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-47edd9024b1so52355515e9.3 for ; Tue, 10 Feb 2026 05:46:00 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 05:45:59 -0800 (PST) Message-ID: <4dbe4d2f-1f91-4c80-994e-86d42a9ad896@suse.com> Date: Tue, 10 Feb 2026 14:45:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Add Darwin.mk To: Bertrand Marquis , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <49c0bd388d45b6936bd852d99fbbc262fb078253.1770633598.git.bertrand.marquis@arm.com> <02BCBE82-C7F1-4631-AC9E-4A4B2E6065A3@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <02BCBE82-C7F1-4631-AC9E-4A4B2E6065A3@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 10.02.2026 13:56, Bertrand Marquis wrote: > Hi Roger, >=20 >> On 10 Feb 2026, at 12:41, Roger Pau Monn=C3=A9 = wrote: >> >> On Tue, Feb 10, 2026 at 11:46:44AM +0100, Jan Beulich wrote: >>> On 09.02.2026 11:46, Bertrand Marquis wrote: >>>> --- /dev/null >>>> +++ b/config/Darwin.mk >>>> @@ -0,0 +1,6 @@ >>>> +# Use GNU tool definitions as the tools we are using are either GNU= compatible >>>> +# or we only use features which are supported on Mac OS. >>>> +include $(XEN_ROOT)/config/StdGNU.mk >>>> + >>>> +# Cross compile on Mac OS, only hypervisor build has been tested, n= o tools >>>> +XEN_COMPILE_ARCH =3D unknow >>> >>> While editing in the ABI aspect, it occurred to me to check what Appl= e has >>> to say regarding their ABI. For both aarch64 and x86-64 they say they= use >>> the standard ABI with some modifications. We may want to evaluate whe= ther >>> those modifications are actually compatible with what we need. >>> >>> Talking of x86-64: Has building on an x86 Mac been tested as well? >>> Especially if that doesn't work, it may want mentioning. >> >> I no longer have access to an x86 Mac, those are about to disappear. >> >> FWIW, I build x86 on Mac using the Docker containers, just as the CI >> does. OSX Docker allows running x86 containers on arm64 using the >> "Rosetta 2" binary translation layer. >> >> I've attempted doing a cross-build from an arm64 Mac using the x86-elf= >> toolchain, but got the following error: If it's really x86-elf (not x86-linux), then likely ... >> % make XEN_TARGET_ARCH=3Dx86_64 CROSS_COMPILE=3Dx86_64-elf- HOSTCC=3Dg= cc -C xen V=3D1 >> [...] >> /Library/Developer/CommandLineTools/usr/bin/make -f ./Rules.mk obj=3Dc= ommon need-builtin=3D1 >> x86_64-elf-gcc -MMD -MP -MF common/.bitmap.o.d -m64 -DBUILD_ID -fno-s= trict-aliasing -std=3Dgnu99 -Wall -Wstrict-prototypes -Wno-unused-but-set= -variable -Wno-unused-local-typedefs -O1 -fno-omit-frame-pointer -nostd= inc -fno-builtin -fno-common -fzero-init-padding-bits=3Dall -Werror -Wred= undant-decls -Wwrite-strings -Wno-pointer-arith -Wdeclaration-after-state= ment -Wuninitialized -Wvla -Wflex-array-member-not-at-end -Winit-self -pi= pe -D__XEN__ -include ./include/xen/config.h -Wa,--strip-local-absolute -= ffunction-sections -fdata-sections -g -malign-data=3Dabi -mindirect-branc= h=3Dthunk-extern -mindirect-branch-register -fno-jump-tables -mfunction-r= eturn=3Dthunk-extern -Wa,-mx86-used-note=3Dno -fno-stack-protector -I./i= nclude -I./arch/x86/include -I./arch/x86/include/generated -DXEN_IMG_OFFS= ET=3D0x200000 -msoft-float -fno-pie -fno-exceptions -fno-asynchronous-unw= ind-tables -Wnested-externs -DHAVE_AS_QUOTED_SYM -DHAVE_AS_MOVDIR -DHAVE_= AS_ENQCMD -DHAVE_AS_NOPS_DIRECTIVE -mno-red-zone -fpic -mno-mmx -mno-sse = -mskip-rax-setup -fcf-protection=3Dbranch -mmanual-endbr -fno-jump-tables= -mmemcpy-strategy=3Dunrolled_loop:16:noalign,libcall:-1:noalign -mmemset= -strategy=3Dunrolled_loop:16:noalign,libcall:-1:noalign -Wa,-I./include -= Wa,-I./include '-D__OBJECT_LABEL__=3Dcommon/bitmap.o' -mpreferred-stack-b= oundary=3D3 -c common/bitmap.c -o common/.bitmap.o.tmp -MQ common/bitma= p.o >> ./arch/x86/include/asm/bitops.h: Assembler messages: >> ./arch/x86/include/asm/bitops.h:511: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/bitops.h:511: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/bitops.h:511: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/bitops.h:511: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:20: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:21: Error: alternative feature outside= of featureset range >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:28: Error: found ' >> ', expected: ')' >> ./arch/x86/include/asm/nospec.h:29: Error: alternative feature outside= of featureset range >> >> I haven't investigated further. Seems like some issue with >> alternative and the uses of CPUID defines. We probably want to >> mention in the commit message that only arm64 builds have been tested >> so far. >=20 > I just tried the same and could reproduce that. >=20 > This is apparently not related to mac os but to binutils (2.45.1 on my = side) >=20 > After some digging i found out that this can be triggered with a simple= assembler test where > .if (2/32)=20 > triggers the same error, while > .if 2/32 > is fine (ie parenthesis are the source of the issue). =2E.. the wrong conclusion is being drawn here. It's not the parenthesis = then, but the fact that '/' is a comment character there. Requires adding --div= ide to the command line options to have the character re-obtain its meaning a= s division operator. (GNU, Linux, FreeBSD, NetBSD, Haiku, and Dragonfly are= the targets where '/' isn't a comment character by default, at present. Y= es, this is pretty confusing.) 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Thanks, Roger. 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Tue, 10 Feb 2026 06:43:56 -0800 (PST) Message-ID: <350a6794-5117-49fd-8850-a34f83a2ab91@suse.com> Date: Tue, 10 Feb 2026 15:43:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] non-x86/symbols: check table sizes don't change between linking passes 2 and 3 To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Timothy Pearson , Alistair Francis , Connor Davis , Oleksii Kurochko References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 15:37, Roger Pau Monné wrote: > On Mon, Feb 02, 2026 at 03:45:37PM +0100, Jan Beulich wrote: >> Extend commit 1df11ccceb1a ("symbols: check table sizes don't change >> between linking passes 2 and 3") to other ports as well. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. > Do you know whether the risc/ppc builds in the CI are OK after this? Not yet, the pre-push testing will show. They are okay in my local builds. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 14:49:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 14:49:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226454.1532965 (Exim 4.92) (envelope-from ) id 1vpp3E-00007P-0k; Tue, 10 Feb 2026 14:49:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226454.1532965; Tue, 10 Feb 2026 14:49:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpp3D-00007G-UA; Tue, 10 Feb 2026 14:49:15 +0000 Received: by outflank-mailman (input) for mailman id 1226454; Tue, 10 Feb 2026 14:49:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpp3C-000077-1F for xen-devel@lists.xenproject.org; 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Tue, 10 Feb 2026 06:49:10 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Tue, 10 Feb 2026 15:48:59 +0100 X-Gm-Features: AZwV_QgkdyupUtA5YpS0SjbsQLiRA7KTwmaPzE3S-06pIrFXocnfHXQXPIfWct8 Message-ID: Subject: Re: [PATCH 06/12] xen/arm: ffa: Fix RX/TX map layout and errors To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > FFA_RXTX_MAP builds a descriptor for the SPMC and the composite region > offsets must be 8-byte aligned. Xen currently uses a 12-byte header > size, which produces misaligned RX/TX offsets. Mapping failures also > return INVALID_PARAMETERS even when the failure is due to resource > exhaustion, which misreports the error condition. > > Round the descriptor header size up to 8 bytes before placing the RX > region and derive the TX offset from the aligned RX offset. Return > FFA_RET_NO_MEMORY when the TX or RX buffer mapping fails before the > error paths unwind. > > Functional impact: RXTX_MAP now returns NO_MEMORY on mapping failures > and the SPMC receives an aligned RX/TX descriptor layout. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_rxtx.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c > index 50758fb57cdf..eff95a7955d7 100644 > --- a/xen/arch/arm/tee/ffa_rxtx.c > +++ b/xen/arch/arm/tee/ffa_rxtx.c > @@ -119,11 +119,17 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_= t tx_addr, > > tx =3D __map_domain_page_global(tx_pg); > if ( !tx ) > + { > + ret =3D FFA_RET_NO_MEMORY; > goto err_put_rx_pg; > + } > > rx =3D __map_domain_page_global(rx_pg); > if ( !rx ) > + { > + ret =3D FFA_RET_NO_MEMORY; > goto err_unmap_tx; > + } > > /* > * Transmit the RX/TX buffer information to the SPM if acquire is su= pported > @@ -136,7 +142,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t = tx_addr, > struct ffa_mem_region *mem_reg; > > /* All must fit in our TX buffer */ > - BUILD_BUG_ON(sizeof(*rxtx_desc) + sizeof(*mem_reg) * 2 + > + BUILD_BUG_ON(ROUNDUP(sizeof(*rxtx_desc), 8) + > + sizeof(*mem_reg) * 2 + > sizeof(struct ffa_address_range) * 2 > > FFA_MAX_RXTX_PAGE_COUNT * FFA_PAGE_SIZE); > > @@ -153,8 +160,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t = tx_addr, > */ > rxtx_desc->sender_id =3D ffa_get_vm_id(d); > rxtx_desc->reserved =3D 0; > - rxtx_desc->rx_region_offs =3D sizeof(*rxtx_desc); > - rxtx_desc->tx_region_offs =3D sizeof(*rxtx_desc) + > + rxtx_desc->rx_region_offs =3D ROUNDUP(sizeof(*rxtx_desc), 8); > + rxtx_desc->tx_region_offs =3D rxtx_desc->rx_region_offs + > offsetof(struct ffa_mem_region, > address_range_array[1]); > > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Tue Feb 10 15:08:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 15:08:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226474.1532979 (Exim 4.92) (envelope-from ) id 1vppLe-00032q-I9; Tue, 10 Feb 2026 15:08:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226474.1532979; Tue, 10 Feb 2026 15:08:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppLe-00032j-EF; Tue, 10 Feb 2026 15:08:18 +0000 Received: by outflank-mailman (input) for mailman id 1226474; Tue, 10 Feb 2026 15:08:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppLe-00032d-1Q for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 15:08:18 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 53205e91-0692-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 16:08:15 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-47ee3a63300so11170915e9.2 for ; Tue, 10 Feb 2026 07:08:15 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 07:08:14 -0800 (PST) Message-ID: <869795f7-1bd8-4b4b-ae91-6876477115df@suse.com> Date: Tue, 10 Feb 2026 16:08:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 5/6] xen/console: update conring memory allocation To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-6-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -463,20 +463,34 @@ static void cf_check conring_dump_keyhandler(unsigned char key) > void __init console_init_ring(void) > { > char *ring; > - unsigned int start, size, chunk, order, memflags; > + unsigned int start, size, chunk; > unsigned long flags; > > if ( !opt_conring_size ) > return; > > - order = get_order_from_bytes(max(opt_conring_size, conring_size)); > - memflags = MEMF_bits(crashinfo_maxaddr_bits); > - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) > + opt_conring_size = max(opt_conring_size, conring_size); > + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > + if ( size != opt_conring_size ) > { > - BUG_ON(order == 0); > - order--; > + opt_conring_size = size; > + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", > + PAGE_SIZE >> 10); > } > - opt_conring_size = PAGE_SIZE << order; I've spotted this removal only while looking at patch 6: How does this work? We require conring_size to be a power of 2, or else masking by (conring_size - 1) isn't a valid thing to do. You even touch CONRING_IDX_MASK() twice in this series, so you really should have noticed. > + if ( opt_conring_size >= GB(2) ) > + { > + opt_conring_size = GB(2); > + printk(XENLOG_WARNING "Limiting user-configured console ring size.\n"); > + } > + else if ( opt_conring_size < _CONRING_SIZE ) > + { > + opt_conring_size = _CONRING_SIZE; > + printk(XENLOG_WARNING "Using compile-time console ring size.\n"); > + } > + > + /* Contiguous buffer; does not need to be naturally aligned. */ > + ring = xmalloc_bytes(opt_conring_size); > + BUG_ON(ring == NULL); > > nrspin_lock_irqsave(&console_lock, flags); > From xen-devel-bounces@lists.xenproject.org Tue Feb 10 15:10:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 15:10:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226479.1532989 (Exim 4.92) (envelope-from ) id 1vppNj-0004WD-T0; Tue, 10 Feb 2026 15:10:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226479.1532989; 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Otherwise the compiler loses context and they might return ENOSYS instead. debug_op, mem_sharing_op and psr_alloc change behaviour and return EOPNOTSUPP when compiled out, rather than ENOSYS. While at it, remove the public headers from mem_sharing.h (forward declarations are fine) and add a missing xen/sched.h include (for complete struct domain definition). Signed-off-by: Alejandro Vallejo --- xen/arch/x86/domctl.c | 27 +++++++++++++++----------- xen/arch/x86/include/asm/mem_sharing.h | 11 +++++++---- 2 files changed, 23 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index d9521808dc..7066a18735 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -220,15 +220,15 @@ long arch_do_domctl( { case XEN_DOMCTL_shadow_op: -#ifdef CONFIG_PAGING + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_PAGING) ) + break; + ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); if ( ret == -ERESTART ) return hypercall_create_continuation( __HYPERVISOR_paging_domctl_cont, "h", u_domctl); copyback = true; -#else - ret = -EOPNOTSUPP; -#endif break; case XEN_DOMCTL_ioport_permission: @@ -842,11 +842,14 @@ long arch_do_domctl( } break; -#ifdef CONFIG_HVM case XEN_DOMCTL_debug_op: { struct vcpu *v; + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_HVM) ) + break; + ret = -EINVAL; if ( (domctl->u.debug_op.vcpu >= d->max_vcpus) || ((v = d->vcpu[domctl->u.debug_op.vcpu]) == NULL) ) @@ -860,7 +863,6 @@ long arch_do_domctl( ret = hvm_debug_op(v, domctl->u.debug_op.op); break; } -#endif case XEN_DOMCTL_gdbsx_guestmemio: case XEN_DOMCTL_gdbsx_pausevcpu: @@ -1033,11 +1035,13 @@ long arch_do_domctl( break; } -#ifdef CONFIG_MEM_SHARING case XEN_DOMCTL_mem_sharing_op: + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_MEM_SHARING) ) + break; + ret = mem_sharing_domctl(d, &domctl->u.mem_sharing_op); break; -#endif #if P2M_AUDIT case XEN_DOMCTL_audit_p2m: @@ -1240,9 +1244,12 @@ long arch_do_domctl( break; case XEN_DOMCTL_psr_alloc: + ret = -EOPNOTSUPP; + if ( IS_ENABLED(CONFIG_X86_PSR) ) + break; + switch ( domctl->u.psr_alloc.cmd ) { -#ifdef CONFIG_X86_PSR case XEN_DOMCTL_PSR_SET_L3_CBM: ret = psr_set_val(d, domctl->u.psr_alloc.target, domctl->u.psr_alloc.data, @@ -1305,8 +1312,6 @@ long arch_do_domctl( #undef domctl_psr_get_val -#endif /* CONFIG_X86_PSR */ - default: ret = -EOPNOTSUPP; break; diff --git a/xen/arch/x86/include/asm/mem_sharing.h b/xen/arch/x86/include/asm/mem_sharing.h index 040962f690..7ee783fde8 100644 --- a/xen/arch/x86/include/asm/mem_sharing.h +++ b/xen/arch/x86/include/asm/mem_sharing.h @@ -9,8 +9,13 @@ #ifndef __MEM_SHARING_H__ #define __MEM_SHARING_H__ -#include -#include +#include + +struct xen_domctl_mem_sharing_op; +struct xen_mem_sharing_op; + +int mem_sharing_domctl(struct domain *d, + struct xen_domctl_mem_sharing_op *mec); #ifdef CONFIG_MEM_SHARING @@ -92,8 +97,6 @@ int mem_sharing_fork_reset(struct domain *d, bool reset_state, int mem_sharing_notify_enomem(struct domain *d, unsigned long gfn, bool allow_sleep); int mem_sharing_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_sharing_op_t) arg); -int mem_sharing_domctl(struct domain *d, - struct xen_domctl_mem_sharing_op *mec); /* * Scans the p2m and relinquishes any shared pages, destroying base-commit: 2fa468919c39aac189623b6c580ce4ff8592d799 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 15:10:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 15:10:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226481.1532999 (Exim 4.92) (envelope-from ) id 1vppO2-0004qB-8d; Tue, 10 Feb 2026 15:10:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226481.1532999; Tue, 10 Feb 2026 15:10:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppO2-0004q0-4b; Tue, 10 Feb 2026 15:10:46 +0000 Received: by outflank-mailman (input) for mailman id 1226481; Tue, 10 Feb 2026 15:10:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppO1-0004Vw-7y for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 15:10:45 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id abdd5e04-0692-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 16:10:44 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-436356740e6so3442971f8f.2 for ; Tue, 10 Feb 2026 07:10:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 07:10:43 -0800 (PST) Message-ID: <75df20e0-70f0-454c-9797-e62725f53b63@suse.com> Date: Tue, 10 Feb 2026 16:10:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 6/6] xen/console: add conring buffer size alignment setting To: dmukhin@xen.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20260205013606.3384798-1-dmukhin@ford.com> <20260205013606.3384798-7-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260205013606.3384798-7-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 02:36, dmukhin@xen.org wrote: > From: Denis Mukhin > > Introduce CONFIG_CONRING_ALIGN_PAGE_SIZE to control rounding down of the > user-defined conring buffer size. What's wrong with the rounding? The more that, with the original behavior properly restored in patch 5, it'll be a power-of-2 multiple of PAGE_SIZE anyway? > Also, update the logline reporting the final conring buffer size to report > bytes instead of kilobytes, since the user-defined size may not necessarily > be kilobyte-alined. Yet making the number harder to grok. > Suggested-by: Andrew Cooper Having talked to him, I don't think he meant what you're doing here. All he apparently meant is to stop using alloc_*heap_pages(), which needlessly supplies order-aligned memory. > --- a/xen/drivers/char/Kconfig > +++ b/xen/drivers/char/Kconfig > @@ -95,6 +95,13 @@ config SERIAL_TX_BUFSIZE > > Default value is 32768 (32KiB). > > +config CONRING_ALIGN_PAGE_SIZE > + bool > + default y IOW "def_bool y". But what's the point of the option when there's no prompt? > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -470,12 +470,15 @@ void __init console_init_ring(void) > return; > > opt_conring_size = max(opt_conring_size, conring_size); > - size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > - if ( size != opt_conring_size ) > + if ( IS_ENABLED(CONFIG_CONRING_ALIGN_PAGE_SIZE) ) > { > - opt_conring_size = size; > - printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", > - PAGE_SIZE >> 10); > + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > + if ( size != opt_conring_size ) > + { > + opt_conring_size = size; > + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", This line wants splitting at the start of the string literal, and the full stop wants removing if already it is being touched. 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This is incorrect with Xen's usage, which does use '/' in assembly files as a mathematical operator. The behavior of the assembler can be altered by passing the --divide option; unconditionally pass this option when available to force the expected behavior. Reported-by: Jan Beulich Signed-off-by: Roger Pau Monné --- xen/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/xen/Makefile b/xen/Makefile index 31352d4cd260..eee0262933a7 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -405,6 +405,11 @@ $(call cc-option-add,CFLAGS,CC,-Winit-self) CFLAGS += -pipe -D__XEN__ -include $(srctree)/include/xen/config.h CFLAGS-$(CONFIG_DEBUG_INFO) += -g +# The GNU assembler will interpret '/' as a comment start marker instead of a +# divide on some platforms. Pass --divide when when available to signal '/' is +# always used as an operator in assembly. +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) + ifneq ($(CONFIG_CC_IS_CLANG),y) # Clang doesn't understand this command line argument, and doesn't appear to # have a suitable alternative. The resulting compiled binary does function, -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 15:27:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 15:27:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226512.1533020 (Exim 4.92) (envelope-from ) id 1vppeL-0007Zk-Pg; Tue, 10 Feb 2026 15:27:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226512.1533020; Tue, 10 Feb 2026 15:27:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppeL-0007Zd-Lj; Tue, 10 Feb 2026 15:27:37 +0000 Received: by outflank-mailman (input) for mailman id 1226512; Tue, 10 Feb 2026 15:27:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vppeK-0007TH-0g for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 15:27:36 +0000 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [2a00:1450:4864:20::343]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0614ff16-0695-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 16:27:34 +0100 (CET) Received: by mail-wm1-x343.google.com with SMTP id 5b1f17b1804b1-47ee0291921so41624295e9.3 for ; Tue, 10 Feb 2026 07:27:34 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 07:27:34 -0800 (PST) Message-ID: <8bef9911-2f37-4cd1-bf18-29cca646fb09@suse.com> Date: Tue, 10 Feb 2026 16:27:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: always consider '/' as a division in assembly To: Roger Pau Monne Cc: Bertrand Marquis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260210151110.26770-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260210151110.26770-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 16:11, Roger Pau Monne wrote: > GNU assembler will consider '/' as the start of comment marker on some > platforms. This is incorrect with Xen's usage, which does use '/' in > assembly files as a mathematical operator. > > The behavior of the assembler can be altered by passing the --divide > option; unconditionally pass this option when available to force the > expected behavior. I'm fine with this in principle, but I wonder: What about Clang? If it's properly compatible, it ought to also take '/' as a comment char for those same targets (in particular for the plain "x86_64-elf" one). According to godbolt it can't deal with -Wa,--divide, yet there I also can't control what exact target the toolchain supports (i.e. this may be only a weak indication of lack of support / compatibility). > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -405,6 +405,11 @@ $(call cc-option-add,CFLAGS,CC,-Winit-self) > CFLAGS += -pipe -D__XEN__ -include $(srctree)/include/xen/config.h > CFLAGS-$(CONFIG_DEBUG_INFO) += -g > > +# The GNU assembler will interpret '/' as a comment start marker instead of a > +# divide on some platforms. Could I talk you into s/on some platforms/for some ELF targets/ ? A more fundamental question is: Do we really mean to support (allow) building with arbitrary-target toolchains? There are other subtle differences, which may be hard to evaluate as to them possibly affecting the Xen build. > Pass --divide when when available to signal '/' is > +# always used as an operator in assembly. > +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) I don't think this should be done here: --divide is an x86-specific option. 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Tue, 10 Feb 2026 07:39:21 -0800 (PST) Message-ID: <6152fc3a-0169-4cbe-b1fb-a392901db34e@suse.com> Date: Tue, 10 Feb 2026 16:39:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/domctl: Conditionalise x86 domctl using DCE rather than ifdef To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260210151008.217830-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260210151008.217830-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 16:10, Alejandro Vallejo wrote: > @@ -1033,11 +1035,13 @@ long arch_do_domctl( > break; > } > > -#ifdef CONFIG_MEM_SHARING > case XEN_DOMCTL_mem_sharing_op: > + ret = -EOPNOTSUPP; > + if ( !IS_ENABLED(CONFIG_MEM_SHARING) ) > + break; > + > ret = mem_sharing_domctl(d, &domctl->u.mem_sharing_op); > break; > -#endif > > #if P2M_AUDIT > case XEN_DOMCTL_audit_p2m: What about this #if, though? > --- a/xen/arch/x86/include/asm/mem_sharing.h > +++ b/xen/arch/x86/include/asm/mem_sharing.h > @@ -9,8 +9,13 @@ > #ifndef __MEM_SHARING_H__ > #define __MEM_SHARING_H__ > > -#include > -#include > +#include As it looks this is for mem_sharing_is_fork(). Can this then please move ... > +struct xen_domctl_mem_sharing_op; > +struct xen_mem_sharing_op; > + > +int mem_sharing_domctl(struct domain *d, > + struct xen_domctl_mem_sharing_op *mec); > > #ifdef CONFIG_MEM_SHARING ... inside this #ifdef? The mem_sharing_domctl() decl may then want moving to the bottom of the file. Otoh I wonder whether supplying a stub wouldn't be neater for the single use site. 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Tue, 10 Feb 2026 07:48:52 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 16:48:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 3/5] xen/console: add locking for serial_rx ring buffer access To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260204233712.3396752-3-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260204233712.3396752-3-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 00:37, Stefano Stabellini wrote: > Guard every mutation of serial_rx_cons/prod with console_lock so that > cross-domain reads can't see stale data: Cross-domain reads become a thing the earliest in the next patch, though? You say something along these lines ... > - In console_switch_input(): protect console_rx assignment with the lock > using irqsave/irqrestore variants since this can be called from > interrupt context > > - In __serial_rx(): protect the ring buffer write operation when > delivering input to the hardware domain > > - In do_console_io() CONSOLEIO_read: hold the lock around the entire > read loop, using a local buffer copy to avoid holding the lock during > copy_to_guest_offset() > > This is preparatory work for allowing multiple domains to use the > console_io hypercalls where proper synchronization is required. ... here, but I think that initial part also wants slightly re-phrasing. At the very least insert "in the future". > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -553,10 +553,13 @@ static void console_switch_input(void) > { > domid_t domid; > struct domain *d; > + unsigned long flags; > > if ( next_rx++ >= max_console_rx ) > { > + nrspin_lock_irqsave(&console_lock, flags); > ACCESS_ONCE(console_rx) = 0; > + nrspin_unlock_irqrestore(&console_lock, flags); > printk("*** Serial input to Xen"); > break; > } > @@ -576,7 +579,9 @@ static void console_switch_input(void) > > rcu_unlock_domain(d); > > + nrspin_lock_irqsave(&console_lock, flags); > ACCESS_ONCE(console_rx) = next_rx; > + nrspin_unlock_irqrestore(&console_lock, flags); > printk("*** Serial input to DOM%u", domid); > break; > } In __serial_rx() and do_console_io() you guard more than the mere updating. As said before, with this arrangement of locking next_rx can in principle be stale by the time you use it for storing into console_rx. This arrangement may be okay, but would then need commenting upon. > @@ -796,6 +805,7 @@ long do_console_io( > { > long rc; > unsigned int idx, len; > + char kbuf[SERIAL_RX_SIZE]; Please can such live in the narrowest possible scope? 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This is incorrect with Xen's usage, which does use '/' in > > assembly files as a mathematical operator. > > > > The behavior of the assembler can be altered by passing the --divide > > option; unconditionally pass this option when available to force the > > expected behavior. > > I'm fine with this in principle, but I wonder: What about Clang? If it's > properly compatible, it ought to also take '/' as a comment char for > those same targets (in particular for the plain "x86_64-elf" one). > According to godbolt it can't deal with -Wa,--divide, yet there I also > can't control what exact target the toolchain supports (i.e. this may be > only a weak indication of lack of support / compatibility). Hm, I'm unsure I can get such a Clang build to properly test it. Note the checking for the presence of the option would also be done in Clang. I would like to think if Clang integrated assembler has this behavior the option to select our expected behavior will also be --divide. I think that's the best I can do ATM. > > --- a/xen/Makefile > > +++ b/xen/Makefile > > @@ -405,6 +405,11 @@ $(call cc-option-add,CFLAGS,CC,-Winit-self) > > CFLAGS += -pipe -D__XEN__ -include $(srctree)/include/xen/config.h > > CFLAGS-$(CONFIG_DEBUG_INFO) += -g > > > > +# The GNU assembler will interpret '/' as a comment start marker instead of a > > +# divide on some platforms. > > Could I talk you into s/on some platforms/for some ELF targets/ ? Yes, that's fine IMO. > A more fundamental question is: Do we really mean to support (allow) > building with arbitrary-target toolchains? There are other subtle > differences, which may be hard to evaluate as to them possibly affecting > the Xen build. Hm, TBH I wasn't aware of such subtle and annoying differences until today, so I'm not sure what to reply here. I haven't tested the x86 image yet, as I'm still attempting to resolve some non-POSIX options usage in check-endbr.sh. We might want to state which ELF targets we do explicitly support for production usage. TBH I doubt anyone would use a Darwin build for production. > > Pass --divide when when available to signal '/' is > > +# always used as an operator in assembly. > > +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) > > I don't think this should be done here: --divide is an x86-specific > option. Oh, that wasn't clear from the output of as. I can make it x86-specific then. However, is there any chance of this behavior escaping outside of x86, and hence would we like to ensure this behavior on all possible arches? Or is it possible that other arches re-use the --divide option for some other functionality? Thanks, Roger. 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This is incorrect with Xen's usage, which does use '/' in > > assembly files as a mathematical operator. > > > > The behavior of the assembler can be altered by passing the --divide > > option; unconditionally pass this option when available to force the > > expected behavior. > > This is solving the issue and I can build for arm with what and further > for x86 on mac os but it fails on check-endbr.sh: > > /bin/sh ../tools/check-endbr.sh xen-syms > stat: illegal option -- c Yeah, I know. I've fixed the stat issue, but there's a further one about an illegal bit sequence in grep. I'm looking into that. Thanks, Roger. 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bh=56GrrR10PcykWbVX708bvTGCH0yk3C6/IRZ+B6YShKA=; b=fHLlVQnzPfhlfDASvVGUwva9QOsgvky0aB6qCJIARfDBJapP3tSfAotzfIXXNlN4heGUqnxVT6jFdKHr9qNWU6f0UrvbYv2yj+75ImQe1eQg6UurwXR6PnGYb7dk+1kQA3K4bZZwEhJtXkFCe3Vs2zfHU7AWYaEcdo9lB+cHAjk= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: <1a25aad8-a4cc-45f2-bfa2-f96d7caccfc1@amd.com> Date: Tue, 10 Feb 2026 10:59:58 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/5] x86/PCI: avoid re-evaluation of extended config space accessibility To: Jan Beulich , "xen-devel@lists.xenproject.org" CC: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Language: en-US From: Stewart Hildebrand In-Reply-To: Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /pSxsImWprmM0lx58VfjAVggJW2ULKugY8W/2W4KAg3Vq8EqTWojs8AjQjCrNYiaoWLMvEYX8fVJxMubcZmZyMU22dNZZtHkJ7yMcjj2qlfdJChyy19AWqGN2c0uonbt02I3EztzY9WvEerwuMwawufHoJA/VwBRJgM47g9VEBun5bIB9hrAFgptYOtL86qPkdI7Aw4gKsIGS7DmjXgUaOntL+hX+6k8D85n35rQg3kehNigr5Shnr+7aZU/FdqQrC5Bcqo73ZuiDktoZnCCK1R+luWdM7iSSHrDOxpJd60TzhaM0kYEk0svpZ8e8P0W41UZS/91nkrsq1si2dGpruw9gjUL2GQXpz9xA477uTH2ond2u7slfjgNjJNTLSFqywPTmQpT7Mo0bkR599NrhdpfnfDWjVsxurL8WTY/iX68CiKW/KyHliEy7yZ4157T X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 16:00:01.3430 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b3f68536-9156-4d77-cbf1-08de68bd729e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D6.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB8610 On 2/10/26 05:52, Jan Beulich wrote: > When, during boot, we have already correctly determined availability of > the MMCFG access method for a given bus range, there's then no need to > invoke pci_check_extcfg() again for every of the devices. This in > particular avoids ->ext_cfg to transiently indicate the wrong state. > > Switch to using Xen style on lines being touched and immediately adjacent > ones. > > Signed-off-by: Jan Beulich > Acked-by: Roger Pau Monné Reviewed-by: Stewart Hildebrand From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:06:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:06:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226594.1533100 (Exim 4.92) (envelope-from ) id 1vpqFT-0000QS-Hy; Tue, 10 Feb 2026 16:05:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226594.1533100; Tue, 10 Feb 2026 16:05:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqFT-0000QL-EE; Tue, 10 Feb 2026 16:05:59 +0000 Received: by outflank-mailman (input) for mailman id 1226594; Tue, 10 Feb 2026 16:05:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqFR-0000Q7-Eo for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:05:57 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5d34cfee-069a-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 17:05:48 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-43626796202so841214f8f.3 for ; Tue, 10 Feb 2026 08:05:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 08:05:47 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 17:05:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 4/5] xen/console: handle multiple domains using console_io hypercalls To: Stefano Stabellini Cc: grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260204233712.3396752-4-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260204233712.3396752-4-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.02.2026 00:37, Stefano Stabellini wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -541,6 +541,12 @@ void console_put_domain(struct domain *d) > rcu_unlock_domain(d); > } > > +static bool is_focus_domain(const struct domain *d) > +{ > + ASSERT(rspin_is_locked(&console_lock)); > + return d != NULL && d->domain_id == console_rx - 1; > +} Just as a remark: You using only nrspin_*() further down and in patch 3, using rspin_is_locked() here is slightly irritating. It looks to be technically correct, but maybe a comment is warranted nevertheless? > @@ -559,6 +565,7 @@ static void console_switch_input(void) > { > nrspin_lock_irqsave(&console_lock, flags); > ACCESS_ONCE(console_rx) = 0; > + serial_rx_cons = serial_rx_prod; I think you want to have the same comment here as you put ... > @@ -581,6 +588,8 @@ static void console_switch_input(void) > > nrspin_lock_irqsave(&console_lock, flags); > ACCESS_ONCE(console_rx) = next_rx; > + /* Don't let the next dom read the previous dom's unread data. */ > + serial_rx_cons = serial_rx_prod; ... here. > @@ -610,7 +619,7 @@ static void __serial_rx(char c) > unsigned long flags; > > /* > - * Deliver input to the hardware domain buffer, unless it is > + * Deliver input to the focus domain buffer, unless it is > * already full. > */ > nrspin_lock_irqsave(&console_lock, flags); The conditional ahead of this comment isn't changed here yet, so changing the comment is premature. (I'm pretty sure I said so before.) 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This is incorrect with Xen's usage, which does use '/' in > >>> assembly files as a mathematical operator. > >>> > >>> The behavior of the assembler can be altered by passing the --divide > >>> option; unconditionally pass this option when available to force the > >>> expected behavior. > >> > >> This is solving the issue and I can build for arm with what and further > >> for x86 on mac os but it fails on check-endbr.sh: > >> > >> /bin/sh ../tools/check-endbr.sh xen-syms > >> stat: illegal option -- c > > > > Yeah, I know. I've fixed the stat issue, but there's a further one > > about an illegal bit sequence in grep. I'm looking into that. > > LC_ALL=C grep is fixing that one on my side I haven't tested that one yet, but yes, might be a way to solve. Would you like to send the fix for grep? > with that and stat -c replaced with wc -c < xx I can fully compile x86 on Mac os. Yeah, the problem with using wc is that you have to read the file. I prefer $(($(du |cut -w -f1) << 9)) because that avoids reading the actual data to count. Thanks, Roger. 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Tue, 10 Feb 2026 08:09:30 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 17:09:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: always consider '/' as a division in assembly To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Bertrand Marquis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260210151110.26770-1-roger.pau@citrix.com> <8bef9911-2f37-4cd1-bf18-29cca646fb09@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 16:53, Roger Pau Monné wrote: > On Tue, Feb 10, 2026 at 04:27:33PM +0100, Jan Beulich wrote: >> On 10.02.2026 16:11, Roger Pau Monne wrote: >>> Pass --divide when when available to signal '/' is >>> +# always used as an operator in assembly. >>> +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) >> >> I don't think this should be done here: --divide is an x86-specific >> option. > > Oh, that wasn't clear from the output of as. I can make it > x86-specific then. However, is there any chance of this behavior > escaping outside of x86, and hence would we like to ensure this > behavior on all possible arches? > > Or is it possible that other arches re-use the --divide option for > some other functionality? It is equally possible for that to happen (if some target needs to support '/' as a comment char) as it is for such a target to then use an entirely different command line option. Furthermore, --divide may mean something else on another arch. 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Tue, 10 Feb 2026 08:15:01 -0800 (PST) Message-ID: <5d656a16-467e-4603-b5c6-e388303ecd38@suse.com> Date: Tue, 10 Feb 2026 17:15:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: always consider '/' as a division in assembly To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis References: <20260210151110.26770-1-roger.pau@citrix.com> <1115BE16-FE3E-4F9D-BB32-77064580D5E3@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 17:09, Roger Pau Monné wrote: > On Tue, Feb 10, 2026 at 03:57:17PM +0000, Bertrand Marquis wrote: >> Hi Roger >> >>> On 10 Feb 2026, at 16:55, Roger Pau Monné wrote: >>> >>> On Tue, Feb 10, 2026 at 03:44:33PM +0000, Bertrand Marquis wrote: >>>> Hi Roger, >>>> >>>>> On 10 Feb 2026, at 16:11, Roger Pau Monne wrote: >>>>> >>>>> GNU assembler will consider '/' as the start of comment marker on some >>>>> platforms. This is incorrect with Xen's usage, which does use '/' in >>>>> assembly files as a mathematical operator. >>>>> >>>>> The behavior of the assembler can be altered by passing the --divide >>>>> option; unconditionally pass this option when available to force the >>>>> expected behavior. >>>> >>>> This is solving the issue and I can build for arm with what and further >>>> for x86 on mac os but it fails on check-endbr.sh: >>>> >>>> /bin/sh ../tools/check-endbr.sh xen-syms >>>> stat: illegal option -- c >>> >>> Yeah, I know. I've fixed the stat issue, but there's a further one >>> about an illegal bit sequence in grep. I'm looking into that. >> >> LC_ALL=C grep is fixing that one on my side > > I haven't tested that one yet, but yes, might be a way to solve. > Would you like to send the fix for grep? > >> with that and stat -c replaced with wc -c < xx I can fully compile x86 on Mac os. > > Yeah, the problem with using wc is that you have to read the file. I > prefer $(($(du |cut -w -f1) << 9)) because that avoids reading > the actual data to count. But shifting by hardcoded 9 doesn't look very portable. The size not being exact may be okay for the purposes here, but wouldn't it then be better to use (standardized) ls output? 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b=m2mat6qJwKnrqwEiV5tqP27IEYmJYox8kz78u1Ka6OvfcpmQ8oamKK8lFTFO9nmpjsyNwWUf014Ir9lF3hq6RhsQp+HAWZV9/7VVQ1C/J13G9+uaSfjbUpgzgMPOSh0JxdMj1VHH61ZIF3LfEA/T8sMXM5lG3Vi7SJbNSbxAYmA= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <6a675aa8-ad41-4b09-b38e-562c5866149f@citrix.com> Date: Tue, 10 Feb 2026 16:21:13 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel Subject: Re: [PATCH v3 07/22] x86/traps: Alter switch_stack_and_jump() for FRED mode To: Jan Beulich References: <20251003225334.2123667-1-andrew.cooper3@citrix.com> <20251003225334.2123667-8-andrew.cooper3@citrix.com> <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> <82adaa8a-b7d9-40fa-b59b-0851776fb59b@suse.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <82adaa8a-b7d9-40fa-b59b-0851776fb59b@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO2P123CA0001.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:a6::13) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|PH0PR03MB6509:EE_ X-MS-Office365-Filtering-Correlation-Id: c15d1fc6-78fa-40cc-0d38-08de68c06acc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|7142099003|7053199007; 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This >>>> means that switch_stack_and_jump() needs to discard one extra word when FRED >>>> is active. >>>> >>>> Fix a typo in the parameter name, which should be shstk_base. >>>> >>>> Signed-off-by: Andrew Cooper >>>> Reviewed-by: Jan Beulich >>>> --- >>>> CC: Jan Beulich >>>> CC: Roger Pau Monné >>>> >>>> Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 >>>> to parse as an instruction immediate. >>> I don't follow. Where would the 2nd $ come from if you write ... >>> >>>> --- a/xen/arch/x86/include/asm/current.h >>>> +++ b/xen/arch/x86/include/asm/current.h >>>> @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); >>>> "rdsspd %[ssp];" \ >>>> "cmp $1, %[ssp];" \ >>>> "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ >>>> - "mov $%c[skstk_base], %[val];" \ >>>> + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ >>>> + "mov $%c[shstk_base] + 8, %[val];", \ >>>> + X86_FEATURE_XEN_FRED) \ >>> ALTERNATIVE("mov %[shstk_base], %[val];", \ >>> "mov %[shstk_base] + 8, %[val];", \ >>> X86_FEATURE_XEN_FRED) \ >> I find this feedback completely uncharacteristic.  You always goes out >> of your way to hide % inside macros to prohibit non-register operands. >> >> This is exactly the same, except to force an immediate operand, so the >> length of the two instructions is the same. > Thinking about it more, are you perhaps referring to assembler macros? > There indeed I prefer to have the % inside the macros; the same may go > for $ there, but I don't think we had the need so far. For inline > assembly the situation is different: The compiler emits the % (and also > the $), unless special modifiers are used. It wouldn't even occur to me > to ask that we use %%%V[val] for a register operand. That really is the > register equivalent of the $%c[val] that you use above. We can't use %V anyway because it's not available in our toolchain baseline. But, bottom line.  How insistent are you going to be here, because this is the only thing holding up committing 6 patches. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:21:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:21:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226645.1533159 (Exim 4.92) (envelope-from ) id 1vpqUo-0006AR-3A; Tue, 10 Feb 2026 16:21:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226645.1533159; Tue, 10 Feb 2026 16:21:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqUn-0006AK-W8; Tue, 10 Feb 2026 16:21:49 +0000 Received: by outflank-mailman (input) for mailman id 1226645; Tue, 10 Feb 2026 16:21:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqUm-00069o-QQ for xen-devel@lists.xenproject.org; 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Tue, 10 Feb 2026 08:24:53 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 17:24:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 01/16] xen/riscv: implement arch_vcpu_{create,destroy}() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > Introduce architecture-specific functions to create and destroy VCPUs. > Note that arch_vcpu_create() currently returns -EOPNOTSUPP, as the virtual > timer and interrupt controller are not yet implemented. > > Add calle-saved registers used to preserve Xen’s own execution context > when switching between vCPU stacks. "Add" is lacking context here: You don't add those to arch_vcpu_create(), which is the context left from the earlier paragraph. > It is going to be used in the following way (pseudocode): > context_switch(prev_vcpu, next_vcpu): > ... > > /* Switch from previous stack to the next stack. */ > __context_switch(prev_vcpu, next_vcpu); > > ... > schedule_tail(prev_vcpu): > Save and restore vCPU's CSRs. > The Xen-saved context allows __context_switch() to switch execution > from the previous vCPU’s stack to the next vCPU’s stack and later resume > execution on the original stack when switching back. > > During vCPU creation, the Xen-saved context is going to be initialized > with: > - SP pointing to the newly allocated vCPU stack > - RA pointing to a helper that performs final vCPU setup before > transferring control to the guest > After the first execution of __context_switch(), RA naturally points to > the instruction following the call site, and the remaining callee-saved > registers contain the Xen register state at the time of the switch. RA doesn't "naturally" point anywhere until you actually implement more pieces. Please, again, can descriptions be written such that they make sense at the point where the patch being described applies? > --- /dev/null > +++ b/xen/arch/riscv/domain.c > @@ -0,0 +1,58 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > + > +static void continue_new_vcpu(struct vcpu *prev) > +{ > + BUG_ON("unimplemented\n"); > +} > + > +static void __init __maybe_unused build_assertions(void) > +{ > + /* > + * Enforce the requirement documented in struct cpu_info that > + * guest_cpu_user_regs must be the first field. > + */ > + BUILD_BUG_ON(offsetof(struct cpu_info, guest_cpu_user_regs) != 0); > +} > + > +int arch_vcpu_create(struct vcpu *v) > +{ > + int rc = 0; > + void *stack = vzalloc(STACK_SIZE); Much like you use void * here, ... > + if ( !stack ) > + return -ENOMEM; > + > + v->arch.cpu_info = stack + STACK_SIZE - sizeof(struct cpu_info); > + > + v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; > + v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; > + > + /* Idle VCPUs don't need the rest of this setup */ > + if ( is_idle_vcpu(v) ) > + return rc; > + > + /* > + * As the vtimer and interrupt controller (IC) are not yet implemented, > + * return an error. > + * > + * TODO: Drop this once the vtimer and IC are implemented. > + */ > + rc = -EOPNOTSUPP; > + goto fail; > + > + return rc; > + > + fail: > + arch_vcpu_destroy(v); > + return rc; > +} > + > +void arch_vcpu_destroy(struct vcpu *v) > +{ > + vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); ... you probably want to do so here as well. And btw, this can be shortened: vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:34:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:34:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226677.1533179 (Exim 4.92) (envelope-from ) id 1vpqhP-0000Tt-Cy; Tue, 10 Feb 2026 16:34:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226677.1533179; Tue, 10 Feb 2026 16:34:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqhP-0000Tm-9z; Tue, 10 Feb 2026 16:34:51 +0000 Received: by outflank-mailman (input) for mailman id 1226677; Tue, 10 Feb 2026 16:34:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqhN-0000TT-SN for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:34:49 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6ab98203-069e-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 17:34:49 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-43767807da6so751083f8f.2 for ; Tue, 10 Feb 2026 08:34:49 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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All other stubs look somewhat reasonable. No functional change. Signed-off-by: Andrew Cooper --- CC: Oleksii Kurochko CC: Timothy Pearson CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini --- xen/arch/ppc/stubs.c | 5 ----- xen/arch/riscv/stubs.c | 5 ----- 2 files changed, 10 deletions(-) diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c index f7f6e7ed97af..a333f06119a0 100644 --- a/xen/arch/ppc/stubs.c +++ b/xen/arch/ppc/stubs.c @@ -162,11 +162,6 @@ void arch_vcpu_destroy(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_switch_to_aarch64_mode(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbfde79b5a7..d071c8b86d07 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -126,11 +126,6 @@ void arch_vcpu_destroy(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_switch_to_aarch64_mode(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { BUG_ON("unimplemented"); base-commit: 2fa468919c39aac189623b6c580ce4ff8592d799 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:36:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:36:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226684.1533189 (Exim 4.92) (envelope-from ) id 1vpqjP-000132-RC; Tue, 10 Feb 2026 16:36:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226684.1533189; Tue, 10 Feb 2026 16:36:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjP-00012v-O5; Tue, 10 Feb 2026 16:36:55 +0000 Received: by outflank-mailman (input) for mailman id 1226684; Tue, 10 Feb 2026 16:36:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjO-00012i-ID for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:36:54 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b448e335-069e-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 17:36:52 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-47edd6111b4so85424775e9.1 for ; Tue, 10 Feb 2026 08:36:52 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Although this patch series is technically independent of [1], some merge conflicts are still possible depending on which series is applied first. For now, the series has been rebased on top of [1] but can go without [1]. [1] https://lore.kernel.org/xen-devel/cover.1770650552.git.oleksii.kurochko@gmail.com/T/#m5d8de24e5ee0eaf6f35f9f1437a00096e3574684 --- Changes in v2: - Drop patch "xen/riscv: introduce struct arch_vcpu", took only declaration of vsatp and squash it with the patch: xen/riscv: implement p2m_ctx_switch_{to,from}_state() - Other changes please look at specific patch. - CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2317277592 --- Oleksii Kurochko (2): xen/riscv: add support for local guest TLB flush using HFENCE.VVMA xen/riscv: add p2m context switch handling for VSATP and HGATP xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/flushtlb.h | 7 ++ xen/arch/riscv/include/asm/insn-defs.h | 10 ++ xen/arch/riscv/include/asm/p2m.h | 11 +++ xen/arch/riscv/p2m.c | 123 +++++++++++++++++++++++++ xen/arch/riscv/traps.c | 2 + 6 files changed, 154 insertions(+) create mode 100644 xen/arch/riscv/include/asm/insn-defs.h -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:36:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:36:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226685.1533199 (Exim 4.92) (envelope-from ) id 1vpqjR-0001GX-2v; Tue, 10 Feb 2026 16:36:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226685.1533199; Tue, 10 Feb 2026 16:36:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjQ-0001GH-UO; Tue, 10 Feb 2026 16:36:56 +0000 Received: by outflank-mailman (input) for mailman id 1226685; Tue, 10 Feb 2026 16:36:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjP-00012i-HU for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:36:55 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b501d82f-069e-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 17:36:53 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso8989705e9.0 for ; Tue, 10 Feb 2026 08:36:53 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This leverages the RISC-V HFENCE.VVMA instruction, which is used to invalidate translations in the VS-stage of address translation. As for RISC-V binutils >= 2.39 is choosen, we can use hfence.vvma mnemonics instead of defining hfence.vvma using .insn. Although it would be possible to use sbi_remote_hfence_vvma() for this purpose, it is unnecessary in this context since the flush is required only on the local hart. Using the SBI call would introduce additional overhead without benefit, resulting in unnecessary performance loss. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Add missed blanks in asm(). - Add operand modifier "z" and "J" constraint to be sure that zero register will be used when 0 is passed to HFENCE_VVMA(). --- xen/arch/riscv/include/asm/flushtlb.h | 7 +++++++ xen/arch/riscv/include/asm/insn-defs.h | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 xen/arch/riscv/include/asm/insn-defs.h diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index 4f64f9757058..b0112d416dbe 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -5,6 +5,7 @@ #include #include +#include #include struct page_info; @@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void) asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); } +/* Flush VS-stage TLB for current hart. */ +static inline void flush_tlb_guest_local(void) +{ + HFENCE_VVMA(0, 0); +} + /* Flush TLB of local processor for address va. */ static inline void flush_tlb_one_local(vaddr_t va) { diff --git a/xen/arch/riscv/include/asm/insn-defs.h b/xen/arch/riscv/include/asm/insn-defs.h new file mode 100644 index 000000000000..61aaa202fd13 --- /dev/null +++ b/xen/arch/riscv/include/asm/insn-defs.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_INSN_DEFS_H +#define ASM_RISCV_INSN_DEFS_H + +#define HFENCE_VVMA(vaddr, asid) \ + asm volatile ( "hfence.vvma %z0, %z1" \ + :: "rJ" (vaddr), "rJ" (asid) : "memory" ) + +#endif /* ASM_RISCV_INSN_DEFS_H */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:36:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:36:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226686.1533204 (Exim 4.92) (envelope-from ) id 1vpqjR-0001J4-Da; Tue, 10 Feb 2026 16:36:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226686.1533204; Tue, 10 Feb 2026 16:36:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjR-0001I3-5o; Tue, 10 Feb 2026 16:36:57 +0000 Received: by outflank-mailman (input) for mailman id 1226686; Tue, 10 Feb 2026 16:36:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqjQ-00012i-IX for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:36:56 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b5af66a5-069e-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 17:36:54 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-47ff94b46afso55972545e9.1 for ; Tue, 10 Feb 2026 08:36:54 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5e11f5sm64803255e9.4.2026.02.10.08.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Feb 2026 08:36:53 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b5af66a5-069e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770741414; x=1771346214; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JjEc9mDWav/qoIa1ZW+EtUPB2mySUlmztw5R2P/dXKI=; b=OZjnZeza4HclH6dSK8itrSbvark5ZCYAJEJJOxF7lZv12mum2VdoesyoGR0vy4Wgwg cCBAr118XDvw7oHFIJaEjmRBX2QWxg9zabHyfqmz1adxB9W0/AYZkCIZIWbDGA/OCCAd 90nGEhe/BY9Lf3oDYKYNucJkCjuDshzaBLPT7dltyNmTKKqGnr99rd21Cx1QLTKgyv2/ 3B5W2VHXDEpoFJ+hBduntz5n7QBgTG0Ekmt5d340Ggf24Rt5t9WdlXB0rG2cwE/R8HFv 6mhvehcZoWxOFPA659wN4SXbf4VsjzjW8xDOVWdCzd8cl+pTkcLX+fdyYNoR8Q+nqwTr UZXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770741414; x=1771346214; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=JjEc9mDWav/qoIa1ZW+EtUPB2mySUlmztw5R2P/dXKI=; b=m5EVdcLIa+FI5rmVct/35lM3h1/n5A3wd4N9TqIDb0OzT9k2s/9GiCcavnPLi7AMPb 5u1G1Sdcr+4zQUDXDFv3pX89X329gGqzWFS1FeOVwJss4gU9h8cQcasnLMtM1eDYPRAd u2OrXaileiqApFalb9J0kl8hZ7CyQbwiOztvyY6qgPmlBC+n5IFSzT7sdan5TZqQdGu9 bUxmJO/cNLQPb6hNpavT0ZDhnPHuOCbU6k2vem9h+AHi7RmS5kLuj9kz4dMETJFSONN2 DMwYimlvZBzaFRX+rMG8A+S02GJPJ/LYR3WIBLQi5z8vfzY9dAyC4gB6vHelPR5WFsZF 4sXA== X-Gm-Message-State: AOJu0YypVuxhTOOLSobodaeMW3D4ycrtC+p7b22BpBv4P6kbNHyD/0Jw tQXW3kAg+WJTWs3EJHHsXKb/HWeZLzhrLucmg/tjx8yPPjlGEK8R+QfpsirXjK6l X-Gm-Gg: AZuq6aIARFjmvZX/iL/5sjAWDrMPjSCQhcR3/xz4kT+KReXHeCs0AVSpMGPIGerH4Le J5rtV+ak8oPA5X8b9pQdLw3DVc41DQMxFn/djYaSTXQGiGl9/8DPMyqeNK9SpmWMAMgOZ5NxR1B e54iZa3jIhvbl6otFHt+rNR5JwXbBIiU26JLDHKPOAWrFjbzLFQZOKgqbCaQqwGFOJGUUTpsDyV 9Rz9tMYvR+Ck9e4xEWNfQ4FlCEWHeosxu/MyF/ecbaWaeokvO1f48y5EHQJJzyZfpRmew2r2LGf fNdSu8ze6GuIhSxY5WR9QNuG+p3FBgDt8nOlZNHZIpouATJDfdvk6PVqxdUHew+iTaYzBIp+URJ 0tCBUpILP/ULvh3K2gLIIz1/duhYYvbH2skqCpB2jfoAXtG1F2ewqAS6IIcFn5m8P8VvlTN81yR jL5/Tco4ar5764BqeoxqdukG4usVHAi3Ttrab3G+06GRGTXyyAaPKBx4RDHw17uWQUb0wCgQ== X-Received: by 2002:a05:600c:a59b:b0:471:793:e795 with SMTP id 5b1f17b1804b1-4834f38ff19mr24116555e9.0.1770741413865; Tue, 10 Feb 2026 08:36:53 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 2/2] xen/riscv: add p2m context switch handling for VSATP and HGATP Date: Tue, 10 Feb 2026 17:36:41 +0100 Message-ID: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add helpers to safely update VS-stage and G-stage translation registers during vCPU context switches. Because VSATP and HGATP cannot be updated atomically, VSATP is cleared on switch-out to prevent speculative VS-stage translations being cached under an incorrect VMID. On VM entry, HGATP is reconstructed, VMID handling is performed, and VSATP is restored. This provides the necessary infrastructure for correct p2m context switching on RISC-V. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Add vsatp field declaration to arch_vcpu. - s/p2m_ctx_switch_{from,to}/p2m_ctxt_switch_{from,to}. - Introduce p2m_handle_vmenter() for proper handling of VMID, hgatp and vsatp updates. - Introduce is_p2m_switch_finished and init it inisde p2m_ctx_switch_to() for furhter handling in p2m_handle_vmenter(). - Code style fixes. - Add is_idle_vcpu() check in p2m_ctxt_switch_from(). - use csr_swap() in p2m_ctxt_switch_from(). - move flush_tlb_guest_local() to the end if p2m_handle_vmenter() and drop unnessary anymore comments. - Correct printk()'s arguments in p2m_handle_vmenter(). --- xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/p2m.h | 11 +++ xen/arch/riscv/p2m.c | 123 ++++++++++++++++++++++++++++ xen/arch/riscv/traps.c | 2 + 4 files changed, 137 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index b5a8a9f711ac..c029e50b96fe 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -59,6 +59,7 @@ struct arch_vcpu { register_t hstateen0; register_t hvip; + register_t vsatp; register_t vsie; /* diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index f63b5dec99b1..0cdd3dc44683 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -90,6 +90,13 @@ struct p2m_domain { */ bool clean_dcache; + /* + * Inidicate that context switch is fully finished. It is needed to + * detect in p2m_handle_vmenter() to undestand what to write to + * CSR_VSATP register. + */ + bool is_ctxt_switch_finished; + /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; @@ -255,6 +262,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, p2m_type_t *t); +void p2m_ctxt_switch_from(struct vcpu *p); +void p2m_ctxt_switch_to(struct vcpu *n); +void p2m_handle_vmenter(void); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 0abeb374c110..275c38020ae2 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1434,3 +1434,126 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, return get_page(page, p2m->domain) ? page : NULL; } + +void p2m_ctxt_switch_from(struct vcpu *p) +{ + if ( is_idle_vcpu(p) ) + return; + + /* + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value what will be done in + * p2m_handle_vmenter(). + */ + p->arch.vsatp = csr_swap(CSR_VSATP, 0); + + /* + * Nothing to do with HGATP as it is constructed each time when + * p2m_handle_vmenter() is called. + */ +} + +void p2m_ctxt_switch_to(struct vcpu *n) +{ + if ( is_idle_vcpu(n) ) + return; + + n->domain->arch.p2m.is_ctxt_switch_finished = false; + + /* + * Nothing to do with HGATP or VSATP, they will be set in + * p2_handle_vmenter() + */ +} + +void p2m_handle_vmenter(void) +{ + struct p2m_domain *p2m = ¤t->domain->arch.p2m; + struct vcpu_vmid *p_vmid = ¤t->arch.vmid; + uint16_t old_vmid, new_vmid; + bool need_flush; + register_t vsatp_old = 0; + + BUG_ON(is_idle_vcpu(current)); + + /* + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value + * + * CSR_VSATP is already set to 0 in p2m_ctxt_switch_from() in the + * case when n->arch.is_p2m_switch_finished = false. Also, there is + * BUG_ON() below to verify that. + */ + if ( p2m->is_ctxt_switch_finished ) + vsatp_old = csr_swap(CSR_VSATP, 0); + + old_vmid = p_vmid->vmid; + need_flush = vmid_handle_vmenter(p_vmid); + new_vmid = p_vmid->vmid; + +#ifdef P2M_DEBUG + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", + current, old_vmid, new_vmid, need_flush); +#endif + + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), + new_vmid)); + + if ( unlikely(need_flush) ) + local_hfence_gvma_all(); + + if ( p2m->is_ctxt_switch_finished ) + csr_swap(CSR_VSATP, vsatp_old); + /* + * We are not coming from a context switch here, so the VSATP value is + * the same as it was before csr_swap() was executed at the start of + * this function. Since VSATP was set to 0, no speculation could occur, + * and the VS-stage TLB cannot be polluted. + * Therefore, no additional VS TLB flush is required. + */ + else + { + vsatp_old = csr_swap(CSR_VSATP, current->arch.vsatp); + + /* + * vsatp_old should be zero as in the case of context switch it was + * set to 0 in p2m_ctxt_switch_from(). + */ + BUG_ON(vsatp_old); + + p2m->is_ctxt_switch_finished = true; + + /* + * TODO: further investigation is needed here. + * + * In my opinion, a VS-stage TLB flush is not always strictly + * necessary. + * If a context switch occurs and VSATP is set to 0 before any + * context-switch-related operations begin, no speculation can + * occur. Therefore, at the time this function executes, the + * VS-stage TLB should not be polluted with incorrect entries + * belonging to a previously running vCPU. Another one reason is + * that about SATP register is mentioned the following in RISC-V + * spec: + * Changing satp.MODE from Bare to other modes and vice versa + * also takes effect immediately, without the need to execute + * an SFENCE.VMA instruction. Likewise, changes to satp.ASID + * take effect immediately. + * I expect the same for VSATP (as it is VS copy of SATP) but it + * isn't mentioned explicitly in the spec. + * + * The only case where a VS-stage TLB flush seems necessary is + * when the VASID remains unchanged but VSATP is updated to point + * to a different VS page table. In that case, flushing + * guarantees that the guest observes a clean context switch + * without any possibility of using stale TLB entries. + */ + flush_tlb_guest_local(); + } +} diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index e8d9ca902d9c..d6543eac1390 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -175,6 +175,8 @@ static void check_for_pcpu_work(void) vcpu_sync_interrupts(current); vcpu_flush_interrupts(current); + + p2m_handle_vmenter(); } static void timer_interrupt(void) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:40:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:40:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226709.1533218 (Exim 4.92) (envelope-from ) id 1vpqmY-0003yI-P6; Tue, 10 Feb 2026 16:40:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226709.1533218; Tue, 10 Feb 2026 16:40:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqmY-0003yB-MT; Tue, 10 Feb 2026 16:40:10 +0000 Received: by outflank-mailman (input) for mailman id 1226709; Tue, 10 Feb 2026 16:40:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqmX-0003y5-HF for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:40:09 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 26743446-069f-11f1-9ccf-f158ae23cfc8; Tue, 10 Feb 2026 17:40:04 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-43591b55727so3842821f8f.3 for ; Tue, 10 Feb 2026 08:40:04 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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All other stubs look > somewhat reasonable. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Oleksii Kurochko > CC: Timothy Pearson > CC: Anthony PERARD > CC: Michal Orzel > CC: Jan Beulich > CC: Julien Grall > CC: Roger Pau Monné > CC: Stefano Stabellini > --- > xen/arch/ppc/stubs.c | 5 ----- > xen/arch/riscv/stubs.c | 5 ----- > 2 files changed, 10 deletions(-) > > diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c > index f7f6e7ed97af..a333f06119a0 100644 > --- a/xen/arch/ppc/stubs.c > +++ b/xen/arch/ppc/stubs.c > @@ -162,11 +162,6 @@ void arch_vcpu_destroy(struct vcpu *v) > BUG_ON("unimplemented"); > } > > -void vcpu_switch_to_aarch64_mode(struct vcpu *v) > -{ > - BUG_ON("unimplemented"); > -} > - > int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > { > BUG_ON("unimplemented"); > diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c > index acbfde79b5a7..d071c8b86d07 100644 > --- a/xen/arch/riscv/stubs.c > +++ b/xen/arch/riscv/stubs.c > @@ -126,11 +126,6 @@ void arch_vcpu_destroy(struct vcpu *v) > BUG_ON("unimplemented"); > } > > -void vcpu_switch_to_aarch64_mode(struct vcpu *v) > -{ > - BUG_ON("unimplemented"); > -} > - These changes looks good to me: Reviewed-by: Oleksii Kurochko Thanks for cleaning it up. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 10 16:45:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 16:45:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226722.1533229 (Exim 4.92) (envelope-from ) id 1vpqrX-0004ay-Di; Tue, 10 Feb 2026 16:45:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226722.1533229; Tue, 10 Feb 2026 16:45:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqrX-0004ar-Ai; Tue, 10 Feb 2026 16:45:19 +0000 Received: by outflank-mailman (input) for mailman id 1226722; Tue, 10 Feb 2026 16:45:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpqrW-0004al-0F for xen-devel@lists.xenproject.org; Tue, 10 Feb 2026 16:45:18 +0000 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [2a00:1450:4864:20::341]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e0be8805-069f-11f1-b162-2bf370ae4941; Tue, 10 Feb 2026 17:45:16 +0100 (CET) Received: by mail-wm1-x341.google.com with SMTP id 5b1f17b1804b1-48329eb96a7so20226185e9.3 for ; Tue, 10 Feb 2026 08:45:16 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Tue, 10 Feb 2026 08:45:15 -0800 (PST) Message-ID: Date: Tue, 10 Feb 2026 17:45:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] non-x86/symbols: check table sizes don't change between linking passes 2 and 3 To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Timothy Pearson , Alistair Francis , Connor Davis References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/2/26 3:45 PM, Jan Beulich wrote: > Extend commit 1df11ccceb1a ("symbols: check table sizes don't change > between linking passes 2 and 3") to other ports as well. > > Signed-off-by: Jan Beulich > > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -99,6 +99,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=sysv $@ \ > --- a/xen/arch/ppc/Makefile > +++ b/xen/arch/ppc/Makefile > @@ -26,6 +26,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=sysv $@ \ > --- a/xen/arch/riscv/Makefile > +++ b/xen/arch/riscv/Makefile > @@ -40,6 +40,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=$(@D) $(dot-target).2.o > + $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > $(dot-target).2.o -o $@ > $(NM) -pa --format=sysv $@ \ Reviewed-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 10 17:11:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 17:11:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226749.1533240 (Exim 4.92) (envelope-from ) id 1vprGV-0000WY-DA; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vKXhjF+5z4gxCnlwC4GwWZqVbmcxI8cxZRIKuRaOHGOjGSf/O9D+dheZkA6EMhFpsMlwfhgMUulPzzjiTcdwyLfn6+mh/lc1ESkW4SfytSCn/pA6K+isZ0+7rIIvyew/zqpf7AJJaBh6Rh0fc4rlflHNepHuW2GbXOyrAqBBSv1hXy5nZrIs+PzWUrbzi0IoLopOsTh19YuIKqLGTYyAsd03MRSFtmlrc7cXFYv9IyjoO5qM+6ZGf0L8KURKcHZV1ptvSXQIJ9NarBO+npTfeuRhJ6o1FkYY0EP+XkPU6toCI3dP2bzB8G1rvLo8+TJfTHZ66C0r7kiRdFQq2I5WED9LdbfSly3zDTU1paye7ar3IOYmmjtUW0MFCMDFBTp5ccPqa15NHL3mRJkf9w328jmJNbvG8uWKx12mr24wuxpylO0pHUT7eENgPwrwdfA8 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 17:10:53.3866 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6024214c-6d5d-48c0-82c7-08de68c75902 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5739 On Tue Feb 10, 2026 at 4:39 PM CET, Jan Beulich wrote: > On 10.02.2026 16:10, Alejandro Vallejo wrote: >> @@ -1033,11 +1035,13 @@ long arch_do_domctl( >> break; >> } >> =20 >> -#ifdef CONFIG_MEM_SHARING >> case XEN_DOMCTL_mem_sharing_op: >> + ret =3D -EOPNOTSUPP; >> + if ( !IS_ENABLED(CONFIG_MEM_SHARING) ) >> + break; >> + >> ret =3D mem_sharing_domctl(d, &domctl->u.mem_sharing_op); >> break; >> -#endif >> =20 >> #if P2M_AUDIT >> case XEN_DOMCTL_audit_p2m: > > What about this #if, though? It missed the grep. Should've been changed too. > >> --- a/xen/arch/x86/include/asm/mem_sharing.h >> +++ b/xen/arch/x86/include/asm/mem_sharing.h >> @@ -9,8 +9,13 @@ >> #ifndef __MEM_SHARING_H__ >> #define __MEM_SHARING_H__ >> =20 >> -#include >> -#include >> +#include > > As it looks this is for mem_sharing_is_fork(). Can this then please move = ... > >> +struct xen_domctl_mem_sharing_op; >> +struct xen_mem_sharing_op; >> + >> +int mem_sharing_domctl(struct domain *d, >> + struct xen_domctl_mem_sharing_op *mec); >> =20 >> #ifdef CONFIG_MEM_SHARING > > ... inside this #ifdef? The mem_sharing_domctl() decl may then want movin= g to > the bottom of the file. Sure. > Otoh I wonder whether supplying a stub wouldn't be > neater for the single use site. > > Jan Stubs make it really awkward to read the headers. I'd rather not make an already overcomplicated one worse. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 17:24:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 17:24:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226763.1533248 (Exim 4.92) (envelope-from ) id 1vprSz-0002IS-F6; Tue, 10 Feb 2026 17:24:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226763.1533248; Tue, 10 Feb 2026 17:24:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vprSz-0002IL-Bu; Tue, 10 Feb 2026 17:24:01 +0000 Received: by outflank-mailman (input) for mailman id 1226763; Tue, 10 Feb 2026 17:24:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vprSy-0002Hq-2m for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: E2+z54T9uAQnMpNXtmcS3aJUpfllsHbNsceTVRcnjq00bs7V/ydK9svRcl/gHxryQ7LskRwxZvXahrOIzG1IxylDdnZT8Tr3xKeqz/6HO7wkQeRu1ZgtzBE9qc/4YocBlS3kdL3fzyNKdW+zXf04Ayb0WY1tr2lK0Rndo/cznHrj5oK4F1vTUjVP8HkEGA553NlczZx/ZNmreLaM23P5c82bdOIHVz5gfij0A8OvooVln8HqNEzVKJspDBKuyOzJPDuV2T9/oo2bO90O37VRpBg/PjgvBVihipBm9GRMvPZEMpYK9z/a+vx2qPRk1UupbWvxEJv44dVvC+Uvr3v6oBGcqHRJ/RKRPGk3PnbiB3ko8KMXC1WwxrUoAMdWBzTFD5I9GffCN+gDEF9+ORXO8Q2jjxXMiXjDnwTleylbMHmKnpExkabDa039JMEEsT4f X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 17:23:52.6339 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 307f544f-baa4-40ef-cc3d-08de68c92980 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8648 On Tue Feb 10, 2026 at 4:10 PM CET, Alejandro Vallejo wrote: > Make them uniformly return EOPNOTSUPP when their dependent features > are absent. Otherwise the compiler loses context and they might return > ENOSYS instead. > > debug_op, mem_sharing_op and psr_alloc change behaviour and return > EOPNOTSUPP when compiled out, rather than ENOSYS. > > While at it, remove the public headers from mem_sharing.h (forward > declarations are fine) and add a missing xen/sched.h include (for > complete struct domain definition). > > Signed-off-by: Alejandro Vallejo > --- > xen/arch/x86/domctl.c | 27 +++++++++++++++----------- > xen/arch/x86/include/asm/mem_sharing.h | 11 +++++++---- > 2 files changed, 23 insertions(+), 15 deletions(-) > > diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c > index d9521808dc..7066a18735 100644 > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c [snip] > case XEN_DOMCTL_psr_alloc: > + ret =3D -EOPNOTSUPP; > + if ( IS_ENABLED(CONFIG_X86_PSR) ) This was supposed to be !IS_ENABLED(), obviously. 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Otherwise the compiler loses context and they might return ENOSYS instead. debug_op, mem_sharing_op, p2m_audit and psr_alloc change behaviour and return EOPNOTSUPP when compiled out, rather than ENOSYS. While at it, remove the public headers from mem_sharing.h (forward declarations are fine) and add a missing xen/sched.h include (for complete struct domain definition). Signed-off-by: Alejandro Vallejo --- v2: * Also cover p2m_audit * in mem_sharing.h, restrict the xen/sched.h inclusion to the ifdef. * bugfix: make psr handler correctly exit early when !IS_ENABLED(...PSR) --- xen/arch/x86/domctl.c | 33 +++++++++++++++----------- xen/arch/x86/include/asm/mem_sharing.h | 12 ++++++---- xen/arch/x86/include/asm/p2m.h | 10 ++++---- 3 files changed, 31 insertions(+), 24 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index d9521808dc..942f41c584 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -220,15 +220,15 @@ long arch_do_domctl( { case XEN_DOMCTL_shadow_op: -#ifdef CONFIG_PAGING + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_PAGING) ) + break; + ret = paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0); if ( ret == -ERESTART ) return hypercall_create_continuation( __HYPERVISOR_paging_domctl_cont, "h", u_domctl); copyback = true; -#else - ret = -EOPNOTSUPP; -#endif break; case XEN_DOMCTL_ioport_permission: @@ -842,11 +842,14 @@ long arch_do_domctl( } break; -#ifdef CONFIG_HVM case XEN_DOMCTL_debug_op: { struct vcpu *v; + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_HVM) ) + break; + ret = -EINVAL; if ( (domctl->u.debug_op.vcpu >= d->max_vcpus) || ((v = d->vcpu[domctl->u.debug_op.vcpu]) == NULL) ) @@ -860,7 +863,6 @@ long arch_do_domctl( ret = hvm_debug_op(v, domctl->u.debug_op.op); break; } -#endif case XEN_DOMCTL_gdbsx_guestmemio: case XEN_DOMCTL_gdbsx_pausevcpu: @@ -1033,15 +1035,18 @@ long arch_do_domctl( break; } -#ifdef CONFIG_MEM_SHARING case XEN_DOMCTL_mem_sharing_op: + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_MEM_SHARING) ) + break; + ret = mem_sharing_domctl(d, &domctl->u.mem_sharing_op); break; -#endif -#if P2M_AUDIT case XEN_DOMCTL_audit_p2m: - if ( d == currd ) + if ( !P2M_AUDIT ) + ret = -EOPNOTSUPP; + else if ( d == currd ) ret = -EPERM; else { @@ -1052,7 +1057,6 @@ long arch_do_domctl( copyback = true; } break; -#endif /* P2M_AUDIT */ case XEN_DOMCTL_set_broken_page_p2m: { @@ -1240,9 +1244,12 @@ long arch_do_domctl( break; case XEN_DOMCTL_psr_alloc: + ret = -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_X86_PSR) ) + break; + switch ( domctl->u.psr_alloc.cmd ) { -#ifdef CONFIG_X86_PSR case XEN_DOMCTL_PSR_SET_L3_CBM: ret = psr_set_val(d, domctl->u.psr_alloc.target, domctl->u.psr_alloc.data, @@ -1305,8 +1312,6 @@ long arch_do_domctl( #undef domctl_psr_get_val -#endif /* CONFIG_X86_PSR */ - default: ret = -EOPNOTSUPP; break; diff --git a/xen/arch/x86/include/asm/mem_sharing.h b/xen/arch/x86/include/asm/mem_sharing.h index 040962f690..c66cc912db 100644 --- a/xen/arch/x86/include/asm/mem_sharing.h +++ b/xen/arch/x86/include/asm/mem_sharing.h @@ -9,10 +9,12 @@ #ifndef __MEM_SHARING_H__ #define __MEM_SHARING_H__ -#include -#include +struct xen_domctl_mem_sharing_op; #ifdef CONFIG_MEM_SHARING +#include + +struct xen_mem_sharing_op; #define mem_sharing_enabled(d) ((d)->arch.hvm.mem_sharing.enabled) @@ -92,8 +94,6 @@ int mem_sharing_fork_reset(struct domain *d, bool reset_state, int mem_sharing_notify_enomem(struct domain *d, unsigned long gfn, bool allow_sleep); int mem_sharing_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_sharing_op_t) arg); -int mem_sharing_domctl(struct domain *d, - struct xen_domctl_mem_sharing_op *mec); /* * Scans the p2m and relinquishes any shared pages, destroying @@ -103,6 +103,7 @@ int mem_sharing_domctl(struct domain *d, int relinquish_shared_pages(struct domain *d); #else +struct domctl; #define mem_sharing_enabled(d) false @@ -147,4 +148,7 @@ static inline int mem_sharing_fork_reset(struct domain *d, bool reset_state, #endif +int mem_sharing_domctl(struct domain *d, + struct xen_domctl_mem_sharing_op *mec); + #endif /* __MEM_SHARING_H__ */ diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index 9016e88411..b2721f8c11 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -806,12 +806,10 @@ static inline void p2m_pt_init(struct p2m_domain *p2m) {} void *map_domain_gfn(struct p2m_domain *p2m, gfn_t gfn, mfn_t *mfn, p2m_query_t q, uint32_t *pfec); -#if P2M_AUDIT -extern void audit_p2m(struct domain *d, - uint64_t *orphans, - uint64_t *m2p_bad, - uint64_t *p2m_bad); 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mk07TQyFB1f04kEZL+7oRq7L1eTlLaGJiH35keKp5OtTcIo8eTuntVdLChadgUmJvhmaPxf97XCIXGsGoT5QdX2RMXv2pJnFf6FnIEW2pjgh5yFcDJlJZoSMxaAvyx/c7hd77h5NEc4vuqpEtFc/8RW1cmPpKeKXTSOaaDojSzUuijSVMl6ggm8jh1i7yqB3xJmEn5O7hhqkZaHHgU9AjAZ8J/o1bji1osCfZXgkRKRD9xV1s1Vk6wI5oN8fy6HRKiHEkRgUzwlO113wo/Webplk9yI+7rp+X07FdCn0ahvQ2H3tq8FQ9LWYbdb9yI2+bxiAmOSq23KgN89aL7igY27DseORjra+HrmGzWZY1GETpatoRxf7ejYABSpY9Pr6/Ku0uVtD9yhWDk8fn0UQ/gbwbvDKVH/HDlDBjwYkzXyyPoVtsWN8CVihOOYyr6UR X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2026 17:42:56.9477 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d872495-e911-4cad-5c9f-08de68cbd38a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A6.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5915 On Tue Feb 10, 2026 at 2:21 PM CET, Andrew Cooper wrote: > On 10/02/2026 1:13 pm, Alejandro Vallejo wrote: >> On Mon Feb 9, 2026 at 4:55 PM CET, Jan Beulich wrote: >>> On 09.02.2026 16:24, Alejandro Vallejo wrote: >>>> On Mon Feb 9, 2026 at 3:48 PM CET, Jan Beulich wrote: >>>>> On 09.02.2026 11:31, Alejandro Vallejo wrote: >>>>>> --- a/xen/arch/x86/Kconfig >>>>>> +++ b/xen/arch/x86/Kconfig >>>>>> @@ -146,6 +146,7 @@ config XEN_IBT >>>>>> config SHADOW_PAGING >>>>>> bool "Shadow Paging" >>>>>> default !PV_SHIM_EXCLUSIVE >>>>>> + select LOG_DIRTY >>>>>> depends on PV || HVM >>>>>> help >>>>> Why would this be? IOW why would shadow imply log-dirty, but HAP woul= dn't? >>>> The logic is rather opaque. I admit I'm a bit fuzzy on the uses of log= dirty. >>>> >>>> I know what it's for and I could navigate the code if a problem arose,= but I'm >>>> less clear about which other elements of the hypervisor rely on it (po= d? nsvm? >>>> vvmx? shadow? hap?). >>>> >>>> If it's strictly toolstack/DM-driven maybe it'd be more apt to have a = separate >>>> LIVE_MIGRATION and SAVE_RESTORE configs where LM selects SAVE_RESTORE,= which >>>> selects LOG_DIRTY. That's also improve some defaults auto-downgraded f= rom the >>>> max policy just in case a VM is migrated. >>> It's save (not restore) for both PV and HVM, and VRAM dirty tracking fo= r HVM >>> only. Ordinary HVM guests will want VRAM tracking, so compiling out sup= port >>> for it will imo want mentioning in the Kconfig help text. >> ack. >> >>>>>> --- a/xen/arch/x86/domctl.c >>>>>> +++ b/xen/arch/x86/domctl.c >>>>>> @@ -220,15 +220,15 @@ long arch_do_domctl( >>>>>> { >>>>>> =20 >>>>>> case XEN_DOMCTL_shadow_op: >>>>>> -#ifdef CONFIG_PAGING >>>>>> + ret =3D -EOPNOTSUPP; >>>>>> + if ( !IS_ENABLED(CONFIG_LOG_DIRTY) ) >>>>>> + break; >>>>>> + >>>>>> ret =3D paging_domctl(d, &domctl->u.shadow_op, u_domctl, 0)= ; >>>>>> if ( ret =3D=3D -ERESTART ) >>>>>> return hypercall_create_continuation( >>>>>> __HYPERVISOR_paging_domctl_cont, "h", u_domc= tl); >>>>>> copyback =3D true; >>>>>> -#else >>>>>> - ret =3D -EOPNOTSUPP; >>>>>> -#endif >>>>>> break; >>>>> Can a HVM-only hypervisor create any guests with this? I simply fail = to >>>>> see how XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION would then make it throug= h to >>>>> hap_domctl(). >>>> xl doesn't seem to call it at all. hap_set_allocation() is implicitly = called >>>> through paging_enable() -> hap_enable() -> hap_set_allocation() >>> xl must be calling it, at least in the case where the paging pool size = is >>> explicitly set in the guest config. The important point is - not all of >>> XEN_DOMCTL_shadow_op's sub-ops are log-dirty related. >>> >>> It's also odd that you did make changes at the call site here, but then >>> left the called function (and its sibling paging_domctl_cont()) in plac= e. >>> >>> Jan >> That goes through DOMCTL_set_paging_mempool_size. > > This DOMCTL was added in an XSA because ARM needed the functionality, > hence no cleanup. > > I didn't get around to cleaning up > XEN_DOMCTL_SHADOW_OP_{GET,SET}_ALLOCATION, but please do.=C2=A0 We should= not > have multiple ways of configuring this, and it simplifies the your patch. > > ~Andrew I have a separate patch for that, but I won't add it here because it does n= ot simplify the patch at all. hap_domctl() ought to remain to return EINVAL on unexpected ops anyway, and there's lots of loose ends to tie (python/ocaml stubs). Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Tue Feb 10 18:06:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 10 Feb 2026 18:06:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226813.1533278 (Exim 4.92) (envelope-from ) id 1vps84-0000S6-2k; Tue, 10 Feb 2026 18:06:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226813.1533278; Tue, 10 Feb 2026 18:06:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vps84-0000Rz-00; Tue, 10 Feb 2026 18:06:28 +0000 Received: by outflank-mailman (input) for mailman id 1226813; Tue, 10 Feb 2026 18:06:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vps82-0000Rl-AJ for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="VP75K/iWhXkNFJA+" Content-Disposition: inline --VP75K/iWhXkNFJA+ Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 10 Feb 2026 19:06:20 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: xen-devel Cc: intel-xe@lists.freedesktop.org Subject: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 Hi, Recently I started testing compatibility with Intel Lunar Lake. This is the first one that uses "xe" instead of "i915" Linux driver for iGPU. I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running Linux 6.17.9 in this test. The result is rather sad: https://openqa.qubes-os.org/tests/166691#step/simple_gui_apps/30 or https://openqa.qubes-os.org/tests/166700#step/desktop_linux_manager_config/= 42 The black windows are mapped from a domU (using grant tables). But if you watch the video (in the "logs&assets" tab), login window of dom0 is affected too (background is rendered significantly later than its text and widgets).=20 I didn't found any relevant errors in kernel (or Xen) messages. Just in case, full dumps: https://openqa.qubes-os.org/tests/166700/file/desktop_linux_manager_config-= journalctl.log https://openqa.qubes-os.org/tests/166700/file/desktop_linux_manager_config-= xl-dmesg.log Some user reported similar issue with Intel Arc Pro B50, which also uses "xe" driver: https://github.com/QubesOS/qubes-issues/issues/10661 I tested also Linux 6.19-rc8, no improvements. My previous tests of the xe driver on older systems (Meteor Lake, Raptor Lake) resulted in similar behavior, while i915 works fine there. But there I needed to use force_probe parameter, and blamed the issue on xe not officially supporting those platforms. I wanted to compare with i915 on LNL, but i915 doesn't support that model at all (and if I force it, I get kernel panic in i915_pci_probe...). Interestingly, it appears to work just fine on Qubes OS 4.2 (Xen 4.17.6, same Linux dom0 version). I did not tested with Xen 4.21. In both cases, our Xen has the patch to use Linux's PAT layout applied. That's a workaround for https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7648, which is fixed now, but apparently similar bug is still present in a few other drivers (including binary nvidia one...). The same Linux kernel started without Xen works just fine. Any ideas? Having good and a bad version, I can try to bisect this one, but given it requires rebuilding Xen toolstack each time too (due to bisection across releases), I'd rather avoid it if possible... I'm CC-ing also intel-xe list, maybe somebody there have some ideas how to debug this.=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --VP75K/iWhXkNFJA+ Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmLc5wACgkQ24/THMrX 1yw9Owf+JkM97SAK2ek48Wh67U9zNqNtGDeAek2LesR4biLYu6M9NzVL/GsiilxJ lirOwFwvfBR0vffsawvhpCKBOlICa3d7/vJgk4YvHHUSeBfDxkHp9xhRjzfVJBkQ Yj6ZRqwcqg866HudQsa1Snd7Yuy92ymkpetTz55SIV4486Xw09026bxP8HN9MyJj aS7c0uDbB8DOYzvOiCy7U183gImGhmTCJtWXY0F8EAJyJ3anP8AFdNqeDIst02lj 97BVgrzOkyrh/iuNMgHBTroeUnxV1BEhtCGqAAVRiWS5+WKTTyDKimoIhypolkwN qa4GBeMUVhm/YSRhuJbljMGcLyjHPg== =SRC/ -----END PGP SIGNATURE----- --VP75K/iWhXkNFJA+-- From xen-devel-bounces@lists.xenproject.org Wed Feb 11 00:17:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 00:17:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226922.1533289 (Exim 4.92) (envelope-from ) id 1vpxuu-0001jM-Mr; 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Smith" , Jan Beulich Subject: [PATCH] EFI: Fix relocating ESRT for dom0 Date: Wed, 11 Feb 2026 01:16:42 +0100 Message-ID: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix calculating the table size - it consists of a header + entries, not just entries. This bug caused the last entry to have garbage in its final fields, including LowestSupportedFwVersion and CapsuleFlags, which (usually) made fwupd to detect firmware update availability, but refuse actually installing it. Fixes: dc7da0874ba4 ("EFI: preserve the System Resource Table for dom0") Signed-off-by: Marek Marczykowski-Górecki --- xen/common/efi/boot.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index 5b84dbf26e5e..45015a0dd583 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -675,7 +675,8 @@ static size_t __init get_esrt_size(const EFI_MEMORY_DESCRIPTOR *desc) if ( esrt_ptr->FwResourceCount > available_len / sizeof(esrt_ptr->Entries[0]) ) return 0; - return esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); + return offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries) + + esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); } static EFI_GUID __initdata esrt_guid = EFI_SYSTEM_RESOURCE_TABLE_GUID; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 00:58:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 00:58:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226930.1533298 (Exim 4.92) (envelope-from ) id 1vpyYy-0006ll-F1; Wed, 11 Feb 2026 00:58:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226930.1533298; Wed, 11 Feb 2026 00:58:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpyYy-0006ld-C5; Wed, 11 Feb 2026 00:58:40 +0000 Received: by outflank-mailman (input) for mailman id 1226930; Wed, 11 Feb 2026 00:58:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpyYw-0006lX-Lw for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 00:58:38 +0000 Received: from BL0PR03CU003.outbound.protection.outlook.com (mail-eastusazlp170120007.outbound.protection.outlook.com [2a01:111:f403:c101::7]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c85779a6-06e4-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 01:58:32 +0100 (CET) Received: from CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) by BY5PR03MB5064.namprd03.prod.outlook.com (2603:10b6:a03:1e2::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.19; Wed, 11 Feb 2026 00:58:28 +0000 Received: from CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37]) by CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37%6]) with mapi id 15.20.9587.017; Wed, 11 Feb 2026 00:58:28 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c85779a6-06e4-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ISoZcR//QdhEifX33laPmPu8aHkpX6q7E8JOyC1dKNt/ViyR1OK+vdlivyQad+m0JjYd97KLg+QhIbwBZeOTGdggV5IXDQ+T5CXQ3brMF9/nqGPDwMUQSzjEsAMHYm1rZfrjm9/YEaBtCVM/tCVLoQjqQNi+t/YZuLCXyWS0aIDiwui0Xh90oXr0X/2RgTy214DDzjoBRpUw0myk7p7sS2SGv2H/038y82xal2y45+SZCBVbks/I6kZcNEJdDsk63YheTwFc5C6HQetY6qSpPmNiZcyOwAaXJTlTnh7WBaiThYbEhrOdbE2wGa71QurMAqHyfIrt94z7T8g+HQuy/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=eLLcyqarVogVOK/76OmWLICUXJWTpS84dyt6ewkbiBw=; b=shdPgfsFtoupsanpNUFhJXnlwk4Dc9VYhQPBs//M/KzOFKhTitLGKU24aJrJ+s95KpgqVh/fHREp7jfPL6xUur8hqrbQr1YR3x5svbgX1n2EimsMBhMVbKnBI7iyQG4nC4A6HFUUIYw0HvtOimz60nxfGFe2nmGqZbZyUqTjUzfK2JtswzSHJN/osNS2r3Tp9kEI4wQ9SHqyTyD3EkYPfjReHzNCOirp4i713hUZxaVWcCe3mWeuAJbHBslrlV3RenaXiIJ4KRqMsGPjTr2qiL2gOSi20f9R9ZvWNzE/6447ExnC2jREZ3r2lmILvihjkk1CIyskmE1OiHu/LmE7sw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=eLLcyqarVogVOK/76OmWLICUXJWTpS84dyt6ewkbiBw=; b=plTI1Tavf/HX8D14iMhooX5mdJFMRFUuMyiGOrIf+lVpeGAUQZh/S2aD9xe5aEAhHwZUv/VkoZ4SYobuAks5vBPszSL2cN229y/BR51RX6WRRRN9a/QI9wew13HOt2QmP5A5CLYH2rXv7GW7kggfY7GHyhnjgNInV6KMt01GlyM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <33667892-789a-4e94-ae0d-d240f7062b81@citrix.com> Date: Wed, 11 Feb 2026 00:58:25 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , "Daniel P. Smith" , Jan Beulich Subject: Re: [PATCH] EFI: Fix relocating ESRT for dom0 To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO6P265CA0010.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:339::7) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|BY5PR03MB5064:EE_ X-MS-Office365-Filtering-Correlation-Id: cb644ef3-f38e-4fab-18a0-08de6908ab0a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cG93QkwxV1dWS0Z0MHBEQ2Z5dmpNQlpnakVUS2JCY1IxYnV3S0Fmc3VUYmlU?= =?utf-8?B?K3RObHM5K3p2M014cjRVcExTYm9yendMZzJwUUJqcllmeFhBYUNSZk9ZWUxX?= =?utf-8?B?YVZ1VlhvVzVPZ0tNaXlIcm9tYTkxWWxFNVdVejZlK0dlZU5kMXB1ZnpFV0h6?= =?utf-8?B?UE1QUGRaRXpwdlNnZWp3UUxBeDI2bHhDNDdoZXBScE9ibGRpQnpqUzJXdTNT?= =?utf-8?B?RDJuTFp5WjRSZW5uU0N6UkNYdWJvWnd5dTdXZGZHNThFMUlTMjZTM3FzbVFB?= =?utf-8?B?N0loUmhmYUNZbUJEK0ZjMGFzWEV3MWZsdE44NENwL0pqdTNHcUl5U1NJQlQx?= =?utf-8?B?aWJVcEE0ZUoxMWk5dlNJbEdzNHp4VlBXSWd0N2JONW5yOTgyRDk2SFNRYVNi?= =?utf-8?B?eTFOakp5MmFOZDE2THRsbzdBZE1BMGZKWVB3NjMzeWE0WmlGZjJ4YmNWZDY3?= =?utf-8?B?VGNZdEpWMGRwb0V5SDVpRWROL2F3NjhRaTJtc2M5OXFlL0Vaa0tyRFdUQjh4?= =?utf-8?B?azh6WS9nR0JCMlJZbFlSeU1ZOVQ1SCt3UkdsQnFIS28wR3htTy91WHFvUkFz?= =?utf-8?B?M0YrSEtOcGFWcUJmMXdQVDRrOXpUNW5mSm10ZUFjQzFGaE9kMlRnSDFhTksr?= =?utf-8?B?TzZYUmFBT0NXTk1OamJvOGZvOVRKaUNJSGdEd3ZKY0syblZSTnpLYXRicWFS?= =?utf-8?B?VE5lWG16a2NGR0tNTzUrOWFyaGdTUVQxVTZTU3FYWXJzc0ltbXNDQ0t3bFdx?= =?utf-8?B?NFZnMEJIYk9vQS8rbHNKNCtVL3NzRHVXNEFiUDJHYXBrVFJVWnNwMUMvRUUy?= =?utf-8?B?Mi90ZDNOZGJMMnRlT09OeUd3T1hTREhqQ2ZwbXd2VkxybWE0a0dCQTN6dHN5?= =?utf-8?B?ek5WeFdsN1NmVURBQ0tLak40YnVzZjJORGVZblY0OTk0c004djd1M2hlY1JH?= =?utf-8?B?YzVTMlZkYVNmUm1KeDN3Z0ViUmh3TXNSWGQyRk5kdThxaURicUlFZFpDVnFZ?= =?utf-8?B?dzIxWkR4L09lVmUxbUs4ejUrUmRKZW4wVC9XV202VmRXMjkyVzVjRmFRWmJt?= =?utf-8?B?cjVyR044UkIybmlBTkdsSWtwTDA4aXBFUmV4ZzhyRXBEdlhjOXVvL1ZvM2Iv?= =?utf-8?B?Q3Y1aktsOThmNm1iSzVYM29VMXNxMWpuQTNlS1UvNEk5WTZUR1V5NEcraVF4?= =?utf-8?B?dmlvd3U1Z2JWSTlOSllvN1hvVFVJUDM3OURGb3lTa3V4eU5ucDNxdm90WWlI?= =?utf-8?B?WVBWTS9PWmkvSGoxV3gzMERGRnRHVUhySVRSTmR1S3dsUkRCaHRvMldWZG45?= =?utf-8?B?NE1JUEdLUVE0NWE4Znk1dE9nUHFLNWt6OGhzZ2F6aDJEWGFZQlNJUEJKVTA2?= =?utf-8?B?bXFyMFlkQTRqM2hOL0FUV0R1SVBNVEU3N2dvT215ZmVCakM5TUVEVHJjR3ho?= =?utf-8?B?WGxuZ2szWFdMTkdHS003ZDByMHVjYlArRmJZa3c3K1JKTlNtVTZBSHFNR3pH?= =?utf-8?B?N1JzYWl3SFRZOVRReFFWb2tRNmRJQVVMU1pDZ2NhUTFpNVVlc3FNM3p6RURa?= =?utf-8?B?NWVLZy96TzJLWGEyQ2tYZ2pWM3lxbUQxZVE2YjZVQytBa09wN00zeEQ0YTNF?= =?utf-8?B?VlpiT2lucUM1cVR5ZDR2QjdmZDBORnErZDNueTJJclFTMlI2ekZ2VnNRcldG?= =?utf-8?B?c3VObS9oRkpDVGREeXZrZzgzNmdrZlFvTUY2N3prNVhlZE1DWTd4Y0lFYzBV?= =?utf-8?B?ODBGZlZtWXhrNjQ4YUdSaks4Z3hWd3NvSk1lM3VOa0xIeHdkS1ZWOG4rVEJ0?= =?utf-8?B?aUhBOFZXYXFXSnIzSEdDbDJnVExzaE1YNVFuRG5lTzdVMzhtOEtNdmlZSWw1?= =?utf-8?B?QTJuNlgxSU5qNG1pZ0NRZzhFU1BpQ2RsaEt4SDRRb0VaRDVVelVHWkFsQ3Zr?= =?utf-8?B?cXNjWFdMVE5iN09US2RvWkUxTmlCbGk4WlJ6Nm5RQlYvdjQ5K2Q0SVA4T2tx?= =?utf-8?B?WnJRSmNoTHVySzRkTkh1UUVWU2hBbTA1cWJCN0JGb0VMZnFBWVpRaFdyT3o0?= =?utf-8?B?ZUtNR2luUStDMTJpU3kxMDZEU2FGR2NNak16YWJ6NjNHdkRsWGVnQWEyOXMw?= =?utf-8?Q?eygs=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH8PR03MB8275.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7053199007);DIR:OUT;SFP:1101; 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> > - return esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); > + return offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries) + > + esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries[esrt_ptr->FwResourceCount]) is a shorter expression with the same answer, and a pattern we use elsewhere.  I can fix on commit if you're happy. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 11 01:16:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 01:16:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1226940.1533309 (Exim 4.92) (envelope-from ) id 1vpyqS-0000Qe-1i; Wed, 11 Feb 2026 01:16:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1226940.1533309; Wed, 11 Feb 2026 01:16:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vpyqR-0000QW-Tl; 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Smith" , Jan Beulich Subject: Re: [PATCH] EFI: Fix relocating ESRT for dom0 Message-ID: References: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> <33667892-789a-4e94-ae0d-d240f7062b81@citrix.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="8c6GOirE1GocLifO" Content-Disposition: inline In-Reply-To: <33667892-789a-4e94-ae0d-d240f7062b81@citrix.com> --8c6GOirE1GocLifO Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Wed, 11 Feb 2026 02:16:31 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich Subject: Re: [PATCH] EFI: Fix relocating ESRT for dom0 On Wed, Feb 11, 2026 at 12:58:25AM +0000, Andrew Cooper wrote: > On 11/02/2026 12:16 am, Marek Marczykowski-G=C3=B3recki wrote: > > Fix calculating the table size - it consists of a header + entries, not > > just entries. > > This bug caused the last entry to have garbage in its final fields, > > including LowestSupportedFwVersion and CapsuleFlags, which (usually) > > made fwupd to detect firmware update availability, but refuse actually >=20 > "made fwupd able to" >=20 > > installing it. > > > > Fixes: dc7da0874ba4 ("EFI: preserve the System Resource Table for dom0") > > Signed-off-by: Marek Marczykowski-G=C3=B3recki > > --- > > xen/common/efi/boot.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c > > index 5b84dbf26e5e..45015a0dd583 100644 > > --- a/xen/common/efi/boot.c > > +++ b/xen/common/efi/boot.c > > @@ -675,7 +675,8 @@ static size_t __init get_esrt_size(const EFI_MEMORY= _DESCRIPTOR *desc) > > if ( esrt_ptr->FwResourceCount > available_len / sizeof(esrt_ptr->= Entries[0]) ) > > return 0; > > =20 > > - return esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); > > + return offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries) + > > + esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); >=20 > offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries[esrt_ptr->FwResourceCount]) >=20 > is a shorter expression with the same answer, and a pattern we use > elsewhere.=C2=A0 I can fix on commit if you're happy. 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Tue, 10 Feb 2026 23:17:41 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 08:17:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/domctl: Conditionalise x86 domctl using DCE rather than ifdef To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org, Tamas K Lengyel References: <20260210173022.257030-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260210173022.257030-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 18:30, Alejandro Vallejo wrote: > --- a/xen/arch/x86/include/asm/mem_sharing.h > +++ b/xen/arch/x86/include/asm/mem_sharing.h > @@ -9,10 +9,12 @@ > #ifndef __MEM_SHARING_H__ > #define __MEM_SHARING_H__ > > -#include > -#include > +struct xen_domctl_mem_sharing_op; > > #ifdef CONFIG_MEM_SHARING > +#include > + > +struct xen_mem_sharing_op; > > #define mem_sharing_enabled(d) ((d)->arch.hvm.mem_sharing.enabled) > > @@ -92,8 +94,6 @@ int mem_sharing_fork_reset(struct domain *d, bool reset_state, > int mem_sharing_notify_enomem(struct domain *d, unsigned long gfn, > bool allow_sleep); > int mem_sharing_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_sharing_op_t) arg); > -int mem_sharing_domctl(struct domain *d, > - struct xen_domctl_mem_sharing_op *mec); > > /* > * Scans the p2m and relinquishes any shared pages, destroying > @@ -103,6 +103,7 @@ int mem_sharing_domctl(struct domain *d, > int relinquish_shared_pages(struct domain *d); > > #else > +struct domctl; DYM struct domain? If so (can adjust while committing): Reviewed-by: Jan Beulich Cc-ing Tamas at least for awareness; I think ./MAINTAINERS should enumerate this file in the X86 MEMORY SHARING section. > --- a/xen/arch/x86/include/asm/p2m.h > +++ b/xen/arch/x86/include/asm/p2m.h > @@ -806,12 +806,10 @@ static inline void p2m_pt_init(struct p2m_domain *p2m) {} > void *map_domain_gfn(struct p2m_domain *p2m, gfn_t gfn, mfn_t *mfn, > p2m_query_t q, uint32_t *pfec); > > -#if P2M_AUDIT > -extern void audit_p2m(struct domain *d, > - uint64_t *orphans, > - uint64_t *m2p_bad, > - uint64_t *p2m_bad); > -#endif /* P2M_AUDIT */ > +void audit_p2m(struct domain *d, > + uint64_t *orphans, > + uint64_t *m2p_bad, > + uint64_t *p2m_bad); If already you adjust this beyond dropping the #ifdef, I think we also want to make use of line length, to better match e.g. the other prototype in patch context above. I'm likely to take the liberty of doing so while committing. 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Tue, 10 Feb 2026 23:23:00 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 08:22:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/16] xen/riscv: avoid reading hstateen0 when Smstateen is not implemented To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > If the Smstateen extension is not implemented, the hstateen0 CSR is > considered non-existent. Any attempt to access it will raise an > illegal-instruction exception. > > Guard the hstateen0 dump with a runtime check for Smstateen support to > avoid triggering traps when dumping CSRs on systems that do not > implement this extension. > > Fixes: 3babc8d2e546 ("xen/riscv: dump GPRs and CSRs on unexpected traps") > Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich It is, aiui, independent of patch 1 and hence can go in right away. > @@ -144,7 +145,12 @@ static void dump_csrs(const char *ctx) > (v & HSTATUS_SPV) ? " SPV" : "", > (v & HSTATUS_GVA) ? " GVA" : ""); > X(hgatp, CSR_HGATP, "\n"); > - X(hstateen0, CSR_HSTATEEN0, "\n"); > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) > + { > + X(hstateen0, CSR_HSTATEEN0, "\n"); > + } I was going to ask for the braces to be dropped, but I notice they are required as long as X() isn't properly adjusted. This is why even for local use macros we should take a little more care when introducing them, so they can be used without having to pay too close attention to their actual implementation. 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Tue, 10 Feb 2026 23:39:24 -0800 (PST) MIME-Version: 1.0 References: <971bf27b9a2cafa0ed405a638a532b6fbbf51142.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <971bf27b9a2cafa0ed405a638a532b6fbbf51142.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 08:39:13 +0100 X-Gm-Features: AZwV_QgDQKCi4OiQx0XmIgx2lycCVB8uWIjtbZ7LzBFjf_W0JhSSJjhf9apn2f4 Message-ID: Subject: Re: [PATCH 07/12] xen/arm: ffa: Fix RXTX_UNMAP ownership race To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > rxtx_unmap() checks RX ownership without holding the RX/TX locks and > only enforces the ownership rule when FFA_RX_ACQUIRE is supported. This > allows a vCPU to acquire RX between the check and unmap, and it lets > RXTX_UNMAP proceed while RX is owned when buffers are not forwarded to > firmware. > > Hold rx_lock/tx_lock across the ownership check and unmap, and deny > RXTX_UNMAP whenever RX is owned, independent of RX_ACQUIRE support. For > teardown, release RX ownership under the same lock window; use > FFA_RX_RELEASE directly because rx_lock is held, and clear the local > flag when the firmware path is unavailable. > > Functional impact: RXTX_UNMAP now reliably returns DENIED while RX is > owned, and teardown releases/clears ownership without a race. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_rxtx.c | 36 +++++++++++++++++++++++++++++++++--- > 1 file changed, 33 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c > index eff95a7955d7..450ce102cbdc 100644 > --- a/xen/arch/arm/tee/ffa_rxtx.c > +++ b/xen/arch/arm/tee/ffa_rxtx.c > @@ -220,7 +220,7 @@ err_unlock_rxtx: > return ret; > } > > -static int32_t rxtx_unmap(struct domain *d) > +static int32_t rxtx_unmap(struct domain *d, bool teardown) > { > struct ffa_ctx *ctx =3D d->arch.tee; > int32_t ret =3D FFA_RET_OK; > @@ -234,6 +234,36 @@ static int32_t rxtx_unmap(struct domain *d) > goto err_unlock_rxtx; > } > > + if ( !ctx->rx_is_free ) > + { > + if ( teardown ) > + { > + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) > + { > + int32_t rel_ret; > + > + /* Can't use ffa_rx_release() while holding rx_lock. */ > + rel_ret =3D ffa_simple_call(FFA_RX_RELEASE, ctx->ffa_id, > + 0, 0, 0); > + if ( rel_ret ) > + gdprintk(XENLOG_DEBUG, > + "ffa: RX release during teardown failed: %d= \n", > + rel_ret); > + else > + ctx->rx_is_free =3D true; I don't see why this assignment is needed, or the one just below. > + } > + else > + ctx->rx_is_free =3D true; > + } > + else > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: RXTX_UNMAP denied, RX buffer owned by VM\n"); > + ret =3D FFA_RET_DENIED; > + goto err_unlock_rxtx; > + } > + } > + > if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) > { > ret =3D ffa_rxtx_unmap(ffa_get_vm_id(d)); > @@ -261,7 +291,7 @@ err_unlock_rxtx: > > int32_t ffa_handle_rxtx_unmap(void) > { > - return rxtx_unmap(current->domain); > + return rxtx_unmap(current->domain, false); > } > > int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size= ) > @@ -369,7 +399,7 @@ int32_t ffa_rxtx_domain_init(struct domain *d) > > void ffa_rxtx_domain_destroy(struct domain *d) > { > - rxtx_unmap(d); > + rxtx_unmap(d, true); How about adding a /* teardown */ just after true as a reminder of what true is supposed to represent. Adding such comments isn't very common, but we're doing it at a few places in the source tree, and I think it helps when reading the code. Cheers, Jens > } > > void *ffa_rxtx_spmc_rx_acquire(void) > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 07:50:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 07:50:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227016.1533348 (Exim 4.92) (envelope-from ) id 1vq4yw-0005Yl-H1; Wed, 11 Feb 2026 07:49:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227016.1533348; Wed, 11 Feb 2026 07:49:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq4yw-0005Ye-EP; Wed, 11 Feb 2026 07:49:54 +0000 Received: by outflank-mailman (input) for mailman id 1227016; Wed, 11 Feb 2026 07:49:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq4yv-0005YY-Gr for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 07:49:53 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3f62d9f9-071e-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 08:49:52 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-47edd9024b1so62770105e9.3 for ; Tue, 10 Feb 2026 23:49:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 10 Feb 2026 23:49:51 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 08:49:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 03/16] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > Some hypervisor CSRs expose optional functionality and may not implement > all architectural bits. Writing unsupported bits can either be ignored > or raise an exception depending on the platform. > > Detect the set of writable bits for selected hypervisor CSRs at boot and > store the resulting masks for later use. This allows safely programming > these CSRs during vCPU context switching and avoids relying on hardcoded > architectural assumptions. > > Note that csr_set() is used instead of csr_write() to write all ones to > the mask, as the CSRRS instruction, according to the RISC-V specification, > sets only those bits that are writable: > Any bit that is high in rs1 will cause the corresponding bit to be set > in the CSR, if that CSR bit is writable. > In contrast, the CSRRW instruction does not take CSR bit writability into > account, which could lead to unintended side effects when writing all ones > to a CSR. Hmm, I wonder in how far the wording there is precise. In a subsequent paragraph there is: "For both CSRRS and CSRRC, if rs1=x0, then the instruction will not write to the CSR at all, and so shall not cause any of the side effects that might otherwise occur on a CSR write, nor raise illegal-instruction exceptions on accesses to read-only CSRs." To me, a read-only CSR is a CSR with all bits read-only. With this interpretation, the two statements conflict with one another. Is this interpretation ruled out somewhere? > Masks are calculated at the moment only for hdeleg, henvcfg, hideleg, Nit: First one is hedeleg. > hstateen0 registers as only them are going to be used in the follow up > patch. > > If the Smstateen extension is not implemented, hstateen0 cannot be read > because the register is considered non-existent. Instructions that attempt > to access a CSR that is not implemented or not visible in the current mode > are reserved and will raise an illegal-instruction exception. > > Signed-off-by: Oleksii Kurochko > --- > Changes in V3: > - New patch. > > --- a/xen/arch/riscv/setup.c > +++ b/xen/arch/riscv/setup.c > @@ -32,6 +32,8 @@ > unsigned char __initdata cpu0_boot_stack[STACK_SIZE] > __aligned(STACK_SIZE); > > +struct csr_masks __ro_after_init csr_masks; setup.c would be nice to only have __init functions and __initdata data. Really up to now that's the case, and I wonder why the makefile doesn't leverage this by using setup.init.o in place of setup.o. This variable would likely better live elsewhere anyway, imo: Somewhere it's actually (going to be) used. > @@ -70,6 +72,28 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) > return fdt; > } > > +void __init init_csr_masks(void) > +{ > + register_t old; > + > +#define X(csr, field) \ > + old = csr_read(CSR_##csr); \ > + csr_set(CSR_##csr, ULONG_MAX); \ > + csr_masks.field = csr_read(CSR_##csr); \ > + csr_write(CSR_##csr, old) See my remark on the earlier patch regarding locally used macros. You shouldn't ... > + X(HEDELEG, hedeleg); > + X(HENVCFG, henvcfg); > + X(HIDELEG, hideleg); > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) > + { > + X(HSTATEEN0, hstateen0); > + } ... be required to put braces here. (Then I'd further recommend to make "old" local to the macro's scope.) I'm also inclined to recommend to avoid an inflation of X() macros. Give each such macro a somewhat sensible (yet still short) name. This way you'll avoid Misra rule 5.4 ("Macro identifiers shall be distinct") concerns, in combination with rule 20.5 ("#undef should not be used"). Note that we didn't accept the latter rule, hence why I'm only saying "concerns", not "violations". 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Wed, 11 Feb 2026 00:15:09 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 09:15:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/22] x86/traps: Alter switch_stack_and_jump() for FRED mode To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20251003225334.2123667-1-andrew.cooper3@citrix.com> <20251003225334.2123667-8-andrew.cooper3@citrix.com> <6786174e-e00e-46fd-8b82-7eb823ad96a8@citrix.com> <82adaa8a-b7d9-40fa-b59b-0851776fb59b@suse.com> <6a675aa8-ad41-4b09-b38e-562c5866149f@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6a675aa8-ad41-4b09-b38e-562c5866149f@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 17:21, Andrew Cooper wrote: > On 10/02/2026 11:55 am, Jan Beulich wrote: >> On 10.02.2026 12:15, Andrew Cooper wrote: >>> On 07/10/2025 4:58 pm, Jan Beulich wrote: >>>> On 04.10.2025 00:53, Andrew Cooper wrote: >>>>> FRED and IDT differ by a Supervisor Token on the base of the shstk. This >>>>> means that switch_stack_and_jump() needs to discard one extra word when FRED >>>>> is active. >>>>> >>>>> Fix a typo in the parameter name, which should be shstk_base. >>>>> >>>>> Signed-off-by: Andrew Cooper >>>>> Reviewed-by: Jan Beulich >>>>> --- >>>>> CC: Jan Beulich >>>>> CC: Roger Pau Monné >>>>> >>>>> Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 >>>>> to parse as an instruction immediate. >>>> I don't follow. Where would the 2nd $ come from if you write ... >>>> >>>>> --- a/xen/arch/x86/include/asm/current.h >>>>> +++ b/xen/arch/x86/include/asm/current.h >>>>> @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); >>>>> "rdsspd %[ssp];" \ >>>>> "cmp $1, %[ssp];" \ >>>>> "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ >>>>> - "mov $%c[skstk_base], %[val];" \ >>>>> + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ >>>>> + "mov $%c[shstk_base] + 8, %[val];", \ >>>>> + X86_FEATURE_XEN_FRED) \ >>>> ALTERNATIVE("mov %[shstk_base], %[val];", \ >>>> "mov %[shstk_base] + 8, %[val];", \ >>>> X86_FEATURE_XEN_FRED) \ >>> I find this feedback completely uncharacteristic.  You always goes out >>> of your way to hide % inside macros to prohibit non-register operands. >>> >>> This is exactly the same, except to force an immediate operand, so the >>> length of the two instructions is the same. >> Thinking about it more, are you perhaps referring to assembler macros? >> There indeed I prefer to have the % inside the macros; the same may go >> for $ there, but I don't think we had the need so far. For inline >> assembly the situation is different: The compiler emits the % (and also >> the $), unless special modifiers are used. It wouldn't even occur to me >> to ask that we use %%%V[val] for a register operand. That really is the >> register equivalent of the $%c[val] that you use above. > > We can't use %V anyway because it's not available in our toolchain baseline. Sure, I used this to get my point across. Technically we could macro-ize this to use plain % on older gcc and %%%V on ones recognizing the modifier. > But, bottom line.  How insistent are you going to be here, because this > is the only thing holding up committing 6 patches. The construct you use is technically correct, so it feels odd for me to block this (hence the R-b I gave). Otoh I have to return the question: How insistent are you on using a more complicated construct when a simpler one will do (and will be correct as long as we get the constraint right)? Jan PS: As to the constraint, I wonder if it wouldn't better be "e". The value used is small enough right now, but if whatever change led to it becoming huge (e.g. an address instead of a size, as "shstk_base" may be taken to imply), this would still assemble (to what - oddly - AT&T syntax calls MOVABS). Yet we may want to be aware of such an encoding change. Having said this, while things ought to assemble okay in that case, I'm not as certain as to this also compiling successfully, due to our request for PIC code. Yet that then ought to be the case regardless of "i" or "e", and might then only work correctly with the new %cc modifier (which obviously we can't use unconditionally anyway). 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Wed, 11 Feb 2026 00:17:58 -0800 (PST) MIME-Version: 1.0 References: <5331b33343441028d10c290b21b82acce295fff0.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <5331b33343441028d10c290b21b82acce295fff0.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 09:17:46 +0100 X-Gm-Features: AZwV_QhE0gcct39M8TIW1-bQXxJYBmkPBkcr8-Z4pFs7iATDwX9jHErhRwWV-kg Message-ID: Subject: Re: [PATCH 08/12] xen/arm: ffa: Fix FFA_FEATURES validation To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > FFA_FEATURES currently accepts non-zero input properties (w2-w7) from > guests and advertises several ABIs unconditionally, even when firmware > support is missing or when the ABI is physical-instance-only. This can > mislead guests about what Xen can actually provide and violates FF-A > calling conventions. Some SPMCs (Hafnium v2.14 or earlier) also fail to > report FFA_RX_ACQUIRE despite supporting it. > > Update FFA_FEATURES validation to match spec and firmware support: > - reject non-zero w2-w7 input properties with INVALID_PARAMETERS > - reject 64-bit calling conventions from 32-bit guests with NOT_SUPPORTED > - return NOT_SUPPORTED for physical-instance-only ABIs > (FFA_NOTIFICATION_BITMAP_{CREATE,DESTROY}, FFA_RX_ACQUIRE) > - advertise FFA_INTERRUPT as supported > - gate message ABIs on firmware support: > - FFA_MSG_SEND_DIRECT_REQ_{32,64} > - FFA_MSG_SEND_DIRECT_REQ2 (also requires FF-A 1.2 negotiation) > - FFA_MSG_SEND2 (or VM-to-VM enabled) > - report MEM_SHARE_{32,64} only when FFA_MEM_SHARE_64 is supported > - stop advertising FFA_MSG_YIELD (not implemented) > > Update firmware probing: drop FFA_MEM_SHARE_32 checks (deprecated) and > add FFA_RX_ACQUIRE to the probed set. If FFA_MSG_SEND2 is reported but > FFA_RX_ACQUIRE is not, assume RX_ACQUIRE support and warn to work > around the Hafnium bug. > > Functional impact: guests now see ABI support that reflects firmware > capabilities and Xen implementation status. When SEND2 is present but > RX_ACQUIRE is not reported, Xen assumes RX_ACQUIRE support. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa.c | 62 +++++++++++++++++++++++++++++++++++++----- > 1 file changed, 55 insertions(+), 7 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index 6de2b9f8ac8e..e9e020bb0cb3 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -91,10 +91,10 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = =3D { > FW_ABI(FFA_PARTITION_INFO_GET), > FW_ABI(FFA_NOTIFICATION_INFO_GET_64), > FW_ABI(FFA_NOTIFICATION_GET), > + FW_ABI(FFA_RX_ACQUIRE), > FW_ABI(FFA_RX_RELEASE), > FW_ABI(FFA_RXTX_MAP_64), > FW_ABI(FFA_RXTX_UNMAP), > - FW_ABI(FFA_MEM_SHARE_32), > FW_ABI(FFA_MEM_SHARE_64), > FW_ABI(FFA_MEM_RECLAIM), > FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32), > @@ -240,19 +240,39 @@ static void handle_features(struct cpu_user_regs *r= egs) > struct ffa_ctx *ctx =3D d->arch.tee; > unsigned int n; > > + /* > + * Xen does not accept any non-zero FFA_FEATURES input properties fr= om > + * VMs. The spec only defines w2 input properties for FFA_MEM_RETRIE= VE_REQ > + * (NS-bit negotiation for SP/SPMC) and FFA_RXTX_MAP (buffer size an= d > + * alignment), so w2 must be MBZ for our callers. > + */ The spec (version 1.2) lists them as SBZ, except for w2, which is MBZ, for Feature IDs. However, if we're to return an error, invalid parameters is a better choice= . Cheers, Jens > for ( n =3D 2; n <=3D 7; n++ ) > { > if ( get_user_reg(regs, n) ) > { > - ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + ffa_set_regs_error(regs, FFA_RET_INVALID_PARAMETERS); > return; > } > } > > + if ( !is_64bit_domain(d) && smccc_is_conv_64(a1) ) > + { > + /* 32bit guests should only use 32bit convention calls */ > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + return; > + } > + > switch ( a1 ) > { > + case FFA_NOTIFICATION_BITMAP_CREATE: > + case FFA_NOTIFICATION_BITMAP_DESTROY: > + case FFA_RX_ACQUIRE: > + /* Physical-instance-only ABIs are not exposed to VMs. */ > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > case FFA_ERROR: > case FFA_VERSION: > + case FFA_INTERRUPT: > case FFA_SUCCESS_32: > case FFA_SUCCESS_64: > case FFA_FEATURES: > @@ -261,16 +281,25 @@ static void handle_features(struct cpu_user_regs *r= egs) > case FFA_RXTX_UNMAP: > case FFA_MEM_RECLAIM: > case FFA_PARTITION_INFO_GET: > + ffa_set_regs_success(regs, 0, 0); > + break; > case FFA_MSG_SEND_DIRECT_REQ_32: > case FFA_MSG_SEND_DIRECT_REQ_64: > - case FFA_MSG_SEND2: > case FFA_RUN: > - case FFA_INTERRUPT: > - case FFA_MSG_YIELD: > - ffa_set_regs_success(regs, 0, 0); > + if ( ffa_fw_supports_fid(a1) ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > + case FFA_MSG_SEND2: > + if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) = ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_MSG_SEND_DIRECT_REQ2: > - if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > + if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 && > + ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ2) ) > { > ffa_set_regs_success(regs, 0, 0); > } > @@ -281,6 +310,11 @@ static void handle_features(struct cpu_user_regs *re= gs) > break; > case FFA_MEM_SHARE_64: > case FFA_MEM_SHARE_32: > + if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) > + { > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > + } > /* > * We currently don't support dynamically allocated buffers. Rep= ort > * that with 0 in bit[0] of w2. > @@ -688,6 +722,20 @@ static bool ffa_probe_fw(void) > ffa_fw_abi_needed[i].name); > } > > + /* > + * Hafnium v2.14 or earlier does not report FFA_RX_ACQUIRE in > + * FFA_FEATURES even though it supports it. > + */ > + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) && > + ffa_fw_supports_fid(FFA_MSG_SEND2) ) > + { > + printk(XENLOG_WARNING > + "ARM FF-A Firmware reports FFA_MSG_SEND2 without FFA_RX_A= CQUIRE\n"); > + printk(XENLOG_WARNING > + "ffa: assuming RX_ACQUIRE support (workaround)\n"); > + set_bit(FFA_ABI_BITNUM(FFA_RX_ACQUIRE), ffa_fw_abi_supported); > + } > + > if ( !ffa_rxtx_spmc_init() ) > { > printk(XENLOG_ERR "ffa: Error during RXTX buffer init\n"); > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:28:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:28:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227057.1533378 (Exim 4.92) (envelope-from ) id 1vq5aI-0003uI-F7; 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Wed, 11 Feb 2026 00:28:25 -0800 (PST) MIME-Version: 1.0 References: <21505d8f47bdabbf0f8e534eed937c5bf0a4ce02.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <21505d8f47bdabbf0f8e534eed937c5bf0a4ce02.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 11 Feb 2026 10:28:13 +0200 X-Gm-Features: AZwV_Qhf7Sk-3veq8pb7JP-KVFkxMtvofOqfn2KXzQJMJwrtBJMhdzS7avXhXbY Message-ID: Subject: Re: [RFC PATCH 01/19] arm/gicv4 add management structure definitions To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Mykyta Thank you for the contribution. On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Add GICv4 specific structures to be used in later patches. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/include/asm/vgic.h | 43 +++++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index 6f9ab1c98c..a874a02d70 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -127,6 +127,42 @@ struct vgic_irq_rank { > uint8_t vcpu[32]; > }; > > +#ifdef CONFIG_GICV4 > +struct its_vm { > + struct its_vpe **vpes; > + /* Number of VPE. */ > + unsigned int nr_vpes; > + uint32_t *db_lpi_bases; > + unsigned int nr_db_lpis; > + /* Property table per VM. */ > + void *vproptable; > +}; > + > +struct its_vpe { > + rwlock_t lock; > + uint32_t vpe_id; > + /* Pending table per VCPU. */ > + void *vpendtable; > + uint32_t vpe_db_lpi; > + struct its_vm *its_vm; > + unsigned int col_idx; > + bool resident; > + /* Pending VLPIs on schedule out? */ > + bool pending_last; > + struct { > + /* Implementation Defined Area Invalid */ > + bool idai; > + /* VPE proxy mapping */ > + int vpe_proxy_event; > + }; > + /* > + * Ensure mutual exclusion between affinity setting of the vPE > + * and vLPI operations using vpe->col_idx. > + */ > + spinlock_t vpe_lock; > +}; > +#endif > + > struct vgic_dist { > /* Version of the vGIC */ > enum gic_version version; > @@ -193,6 +229,10 @@ struct vgic_dist { > */ > bool rdists_enabled; /* Is any redistributor enabled?= */ > bool has_its; > +#ifdef CONFIG_GICV4 > + struct its_vm *its_vm; > +#endif > + bool nassgireq; nit: unused in this series Best regards, Mykola > #endif > }; > > @@ -227,6 +267,9 @@ struct vgic_cpu { > #define VGIC_V3_RDIST_LAST (1 << 0) /* last vCPU of the rdis= t */ > #define VGIC_V3_LPIS_ENABLED (1 << 1) > uint8_t flags; > +#ifdef CONFIG_GICV4 > + struct its_vpe *its_vpe; > +#endif > }; > > struct sgi_target { > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:28:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:28:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227059.1533388 (Exim 4.92) (envelope-from ) id 1vq5aU-0004B0-Mp; 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Wed, 11 Feb 2026 00:28:38 -0800 (PST) MIME-Version: 1.0 References: <3eb1cea5fb870e01b86e964caef5ceb9b2a8ed75.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <3eb1cea5fb870e01b86e964caef5ceb9b2a8ed75.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 11 Feb 2026 10:28:25 +0200 X-Gm-Features: AZwV_QjfORdiQXQuveEv0skT_N_toFlsGm-8olRbDuLsRhGAxkr25F6n81Gezvg Message-ID: Subject: Re: [RFC PATCH 02/19] arm/gicv4-its: Add GICv4 ITS command definitions To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Add definitions for GICv4 specific ITS commands. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/include/asm/gic_v4_its.h | 41 +++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 xen/arch/arm/include/asm/gic_v4_its.h > > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > new file mode 100644 > index 0000000000..f48eae60ad > --- /dev/null > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -0,0 +1,41 @@ > +/* > + * ARM GICv4 ITS support > + * > + * Penny Zheng > + * Copyright (c) 2023 ARM Ltd. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; under version 2 of the License. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; If not, see . > + */ > + > +#ifndef __ASM_ARM_GICV4_ITS_H__ > +#define __ASM_ARM_GICV4_ITS_H__ > + > +#define GITS_CMD_VMOVI 0x21 > +#define GITS_CMD_VMOVP 0x22 > +#define GITS_CMD_VSGI 0x23 nit: This looks unrelated to the changes in this series no vSGI handling in this series Best regards, Mykola > +#define GITS_CMD_VSYNC 0x25 > +#define GITS_CMD_VMAPP 0x29 > +#define GITS_CMD_VMAPTI 0x2a > +#define GITS_CMD_VINVALL 0x2d > +#define GITS_CMD_INVDB 0x2e > + > +#endif > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * indent-tabs-mode: nil > + * End: > + */ > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:32:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:32:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227071.1533399 (Exim 4.92) (envelope-from ) id 1vq5dj-0005tQ-6C; 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Wed, 11 Feb 2026 00:31:58 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Wed, 11 Feb 2026 10:31:46 +0200 X-Gm-Features: AZwV_QjQu-ZwcX5v6NVPUuzSfVeGWjjym7tpXb48z3RX2grXHMh_D-uU27J7Ojs Message-ID: Subject: Re: [RFC PATCH 06/19] arm/gicv4-its: Add VLPI map/unmap operations To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > For VLPI to be injected into a guest, it needs to be mapped or moved to > a corresponding VPE first. Add a struct to handle the info about the > VLPI mapping and a flag indicating whether the IRQ is tied to a HW one. > > Implement mapping/unmapping of VLPIs to VPEs, also handle moving. Tie > them to emulated MAPTI/MOVI/DISCARD commands. > > Add GIC_IRQ_GUEST_FORWARDED IRQ status flag to keep track of which LPIs > are mapped to virtual ones. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 14 ++ > xen/arch/arm/gic-v4-its.c | 292 ++++++++++++++++++++++++++ > xen/arch/arm/include/asm/gic_v3_its.h | 20 ++ > xen/arch/arm/include/asm/gic_v4_its.h | 20 ++ > xen/arch/arm/include/asm/vgic.h | 5 + > xen/arch/arm/vgic-v3-its.c | 42 +++- > 6 files changed, 387 insertions(+), 6 deletions(-) > create mode 100644 xen/arch/arm/gic-v4-its.c > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index 25c07eb861..25889445f5 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -315,6 +315,20 @@ int its_send_cmd_inv(struct host_its *its, > return its_send_command(its, cmd); > } > > +int its_send_cmd_discard(struct host_its *its, struct its_device *dev, > + uint32_t eventid) > +{ > + uint64_t cmd[4]; > + uint32_t deviceid =3D dev->host_devid; > + > + cmd[0] =3D GITS_CMD_DISCARD | ((uint64_t)deviceid << 32); > + cmd[1] =3D (uint64_t)eventid; > + cmd[2] =3D 0x00; > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > /* Set up the (1:1) collection mapping for the given host CPU. */ > int gicv3_its_setup_collection(unsigned int cpu) > { > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > new file mode 100644 > index 0000000000..9bbd0d96b7 > --- /dev/null > +++ b/xen/arch/arm/gic-v4-its.c > @@ -0,0 +1,292 @@ > +/* > + * xen/arch/arm/gic-v4-its.c > + * > + * ARM Generic Interrupt Controller support v4 version > + * based on xen/arch/arm/gic-v3-its.c and kernel GICv4 driver > + * > + * Copyright (C) 2023 - ARM Ltd > + * Penny Zheng , ARM Ltd ported to Xen > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > + > +static int its_send_cmd_vsync(struct host_its *its, uint16_t vpeid) > +{ > + uint64_t cmd[4]; > + > + cmd[0] =3D GITS_CMD_VSYNC; > + cmd[1] =3D (uint64_t)vpeid << 32; > + cmd[2] =3D 0x00; > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > +static int its_send_cmd_vmapti(struct host_its *its, struct its_device *= dev, > + uint32_t eventid) > +{ > + uint64_t cmd[4]; > + uint32_t deviceid =3D dev->host_devid; > + struct its_vlpi_map *map =3D &dev->event_map.vlpi_maps[eventid]; > + uint16_t vpeid =3D map->vm->vpes[map->vpe_idx]->vpe_id; > + uint32_t vintid =3D map->vintid; > + uint32_t db_pintid; > + > + if ( map->db_enabled ) > + db_pintid =3D map->vm->vpes[map->vpe_idx]->vpe_db_lpi; > + else > + db_pintid =3D INVALID_LPI; If we want to disable the doorbell, the VMAPTI encoding should use Dbell_pINTID =3D 1023. Arm IHI 0069H.b, section 5.3.20 VMAPTI states: - If Dbell_pINTID is 1023, then no physical interrupt is generated. - It is an error if Dbell_pINTID is not a valid doorbell INTID, where a valid INTID is either: * 1023, or * within the supported range for LPIs. So using 1023 is the architected way to represent =E2=80=9Cno doorbell=E2= =80=9D. > + > + cmd[0] =3D GITS_CMD_VMAPTI | ((uint64_t)deviceid << 32); > + cmd[1] =3D eventid | ((uint64_t)vpeid << 32); > + cmd[2] =3D vintid | ((uint64_t)db_pintid << 32); > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > +static bool pirq_is_forwarded_to_vcpu(struct pending_irq *pirq) > +{ > + ASSERT(pirq); > + return test_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); > +} > + > +bool event_is_forwarded_to_vcpu(struct its_device *dev, uint32_t eventid= ) > +{ > + struct pending_irq *pirq; > + > + /* No vlpi maps at all ? */ > + if ( !dev->event_map.vlpi_maps) > + return false; > + > + pirq =3D dev->event_map.vlpi_maps[eventid].pirq; > + return pirq_is_forwarded_to_vcpu(pirq); > +} > + > +static int its_send_cmd_vmovi(struct host_its *its, struct its_vlpi_map = *map) > +{ > + uint64_t cmd[4]; > + struct its_device *dev =3D map->dev; > + uint32_t eventid =3D map->eventid; > + uint32_t deviceid =3D dev->host_devid; > + uint16_t vpeid =3D map->vm->vpes[map->vpe_idx]->vpe_id; > + uint32_t db_pintid; > + > + if ( map->db_enabled ) > + db_pintid =3D map->vm->vpes[map->vpe_idx]->vpe_db_lpi; > + else > + db_pintid =3D INVALID_IRQ; Same point as above: if the intention is =E2=80=9Cno doorbell=E2=80=9D, the= architected encoding is Dbell_pINTID =3D 1023. Per Arm IHI 0069H.b, section 5.3.21 VMOVI, an error is generated only when D =3D=3D 1 and Dbell_pINTID is not a valid doorbell INTID (valid values are 1023 or an INTID within the supported LPI range). When D =3D=3D 0, Dbell_pI= NTID is ignored. > + > + cmd[0] =3D GITS_CMD_VMOVI | ((uint64_t)deviceid << 32); > + cmd[1] =3D eventid | ((uint64_t)vpeid << 32); > + cmd[2] =3D (map->db_enabled ? 1UL : 0UL) | ((uint64_t)db_pintid << 3= 2); > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > +static int gicv4_its_vlpi_map(struct its_vlpi_map *map) > +{ > + struct its_device *dev; > + struct host_its *its; > + uint32_t eventid; > + int ret; > + > + if ( !map ) > + return -EINVAL; > + dev =3D map->dev; > + its =3D map->dev->hw_its; > + eventid =3D map->eventid; > + > + spin_lock(&dev->event_map.vlpi_lock); > + > + if ( !dev->event_map.vm ) > + { > + struct its_vlpi_map *maps; > + > + maps =3D xzalloc_array(struct its_vlpi_map, dev->event_map.nr_lp= is); > + if ( !maps ) > + { > + ret =3D -ENOMEM; > + goto err; nit: goto out; > + } > + > + dev->event_map.vm =3D map->vm; > + dev->event_map.vlpi_maps =3D maps; > + } > + else if ( dev->event_map.vm !=3D map->vm ) > + { > + ret =3D -EINVAL; > + goto err; > + } > + > + /* Get our private copy of the mapping information */ > + dev->event_map.vlpi_maps[eventid] =3D *map; > + > + if ( pirq_is_forwarded_to_vcpu(map->pirq) ) > + { > + struct its_vlpi_map *old =3D &dev->event_map.vlpi_maps[eventid]; > + uint32_t old_vpeid =3D old->vm->vpes[old->vpe_idx]->vpe_id; Nit/bug?: old_vpeid is read after vlpi_maps[eventid] has been overwritten with *map, so it=E2=80=99s not the old mapping anymore. Should old_vpeid be captured before the assignment? > + > + /* Already mapped, move it around */ > + ret =3D its_send_cmd_vmovi(dev->hw_its, map); > + if ( ret ) > + goto err; > + > + /* > + * ARM spec says that If, after using VMOVI to move an interrupt= from > + * vPE A to vPE B, software moves the same interrupt again, a VS= YNC > + * command must be issued to vPE A between the moves to ensure c= orrect > + * behavior. > + * So each time we issue VMOVI, we VSYNC the old VPE for good me= asure. > + */ > + ret =3D its_send_cmd_vsync(dev->hw_its, old_vpeid); > + } > + else > + { > + /* Drop the original physical mapping firstly */ > + ret =3D its_send_cmd_discard(its, dev, eventid); > + if ( ret ) > + goto err; > + > + /* Then install the virtual one */ > + ret =3D its_send_cmd_vmapti(its, dev, eventid); > + if ( ret ) > + goto err; > + > + /* Increment the number of VLPIs */ > + dev->event_map.nr_vlpis++; > + } > + > + goto out; > + > + err: > + xfree(dev->event_map.vlpi_maps); 1. Bug?: unconditionally frees dev->event_map.vlpi_maps, but it=E2=80=99s o= nly newly allocated on the !dev->event_map.vm path. If called with an existing vm/maps, this can free live state and cause UAF. 2. Prefer XFREE(dev->event_map.vlpi_maps); it frees and NULLs the pointer. > + out: > + spin_unlock(&dev->event_map.vlpi_lock); > + return ret; > +} nit: add new line between functions > +int gicv4_its_vlpi_unmap(struct pending_irq *pirq) > +{ > + struct its_vlpi_map *map =3D pirq->vlpi_map; > + struct its_device *dev =3D map->dev; > + int ret; > + uint32_t host_lpi; > + > + spin_lock(&dev->event_map.vlpi_lock); > + > + if ( !dev->event_map.vm || !pirq_is_tied_to_hw(pirq) ) > + { > + ret =3D -EINVAL; > + goto out; > + } > + > + /* Drop the virtual mapping */ > + ret =3D its_send_cmd_discard(dev->hw_its, dev, map->eventid); > + if ( ret ) > + goto out; > + > + /* Restore the physical one */ > + clear_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); > + host_lpi =3D dev->host_lpi_blocks[map->eventid / LPI_BLOCK] + > + (map->eventid % LPI_BLOCK); > + /* Map every host LPI to host CPU 0 */ > + ret =3D its_send_cmd_mapti(dev->hw_its, dev->host_devid, map->eventi= d, > + host_lpi, 0); > + if ( ret ) > + goto out; > + > + lpi_write_config(lpi_data.lpi_property, host_lpi, 0xff, LPI_PROP_ENA= BLED); Are we intentionally resetting host LPI priority here (same as allocation p= ath)? If yes, worth documenting. > + > + ret =3D its_inv_lpi(dev->hw_its, dev, map->eventid, 0); > + if ( ret ) > + goto out; > + > + xfree(map); > + /* > + * Drop the refcount and make the device available again if > + * this was the last VLPI. > + */ > + if ( !--dev->event_map.nr_vlpis ) > + { > + dev->event_map.vm =3D NULL; > + xfree(dev->event_map.vlpi_maps); > + } > + > +out: > + spin_unlock(&dev->event_map.vlpi_lock); > + return ret; > +} > + > +int gicv4_assign_guest_event(struct domain *d, paddr_t vdoorbell_address= , > + uint32_t vdevid, uint32_t eventid, > + struct pending_irq *pirq) > + > +{ > + int ret =3D ENODEV; > + struct its_vm *vm =3D d->arch.vgic.its_vm; > + struct its_vlpi_map *map; > + struct its_device *dev; > + > + spin_lock(&d->arch.vgic.its_devices_lock); > + dev =3D get_its_device(d, vdoorbell_address, vdevid); > + if ( dev && eventid < dev->eventids ) > + { > + /* Prepare the vlpi mapping info */ > + map =3D xzalloc(struct its_vlpi_map); > + if ( !map ) > + goto out; > + map->vm =3D vm; > + map->vintid =3D pirq->irq; > + map->db_enabled =3D true; > + map->vpe_idx =3D pirq->lpi_vcpu_id; > + map->properties =3D pirq->lpi_priority | > + (test_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status= ) ? > + LPI_PROP_ENABLED : 0); > + map->pirq =3D pirq; > + map->dev =3D dev; > + map->eventid =3D eventid; > + > + ret =3D gicv4_its_vlpi_map(map); > + if ( ret ) > + { > + xfree(map); > + goto out; > + } > + > + pirq->vlpi_map =3D map; > + } > + > + out: > + spin_unlock(&d->arch.vgic.its_devices_lock); > + return ret; > +} > + > +int gicv4_its_vlpi_move(struct pending_irq *pirq, struct vcpu *vcpu) > +{ > + struct its_vlpi_map *map =3D pirq->vlpi_map; > + struct its_device *dev =3D map->dev; map is dereferenced before it=E2=80=99s validated > + > + if ( !dev->event_map.vm || !map ) > + return -EINVAL; > + > + map->vpe_idx =3D vcpu->vcpu_id; > + return gicv4_its_vlpi_map(map); > +} > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index 9f0ea9ccb1..75c91c0426 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -116,6 +116,9 @@ > /* We allocate LPIs on the hosts in chunks of 32 to reduce handling over= head. */ > #define LPI_BLOCK 32U > > +#ifdef CONFIG_GICV4 > +#include > +#endif > /* > * Describes a device which is using the ITS and is used by a guest. > * Since device IDs are per ITS (in contrast to vLPIs, which are per > @@ -135,6 +138,9 @@ struct its_device { > uint32_t eventids; /* Number of event IDs (MSIs) */ > uint32_t *host_lpi_blocks; /* Which LPIs are used on the ho= st */ > struct pending_irq *pend_irqs; /* One struct per event */ > +#ifdef CONFIG_GICV4 > + struct event_vlpi_map event_map; > +#endif > }; > > /* data structure for each hardware ITS */ > @@ -184,6 +190,8 @@ extern struct __lpi_data lpi_data; > > extern struct list_head host_its_list; > > +int its_send_cmd_discard(struct host_its *its, struct its_device *dev, > + uint32_t eventid); > int its_send_cmd_inv(struct host_its *its, uint32_t deviceid, uint32_t e= ventid); > int its_send_cmd_clear(struct host_its *its, uint32_t deviceid, uint32_t= eventid); > int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, > @@ -254,6 +262,18 @@ int its_send_command(struct host_its *hw_its, const = void *its_cmd); > > struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, > uint32_t vdevid); > +/* GICv4 functions */ > +int gicv4_assign_guest_event(struct domain *d, paddr_t vdoorbell_address= , > + uint32_t vdevid, uint32_t eventid, > + struct pending_irq *pirq); > +int gicv4_its_vlpi_move(struct pending_irq *pirq, struct vcpu *vcpu); > +#ifndef CONFIG_GICV4 > +#define event_is_forwarded_to_vcpu(dev, eventid) ((void)dev, (void)event= id, false) > +#else > +bool event_is_forwarded_to_vcpu(struct its_device *dev, uint32_t eventid= ); > +void its_vpe_mask_db(struct its_vpe *vpe); > +#endif > +int gicv4_its_vlpi_unmap(struct pending_irq *pirq); > > /* ITS quirks handling. */ > uint64_t gicv3_its_get_cacheability(void); > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > index f48eae60ad..722247ec60 100644 > --- a/xen/arch/arm/include/asm/gic_v4_its.h > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -29,6 +29,26 @@ > #define GITS_CMD_VINVALL 0x2d > #define GITS_CMD_INVDB 0x2e > > +/* Describes the mapping of a VLPI */ > +struct its_vlpi_map { > + struct its_vm *vm; > + unsigned int vpe_idx; /* Index of the VPE */ > + uint32_t vintid; /* Virtual LPI number */ > + bool db_enabled; /* Is the VPE doorbell to be generat= ed? */ > + uint8_t properties; > + struct pending_irq *pirq; > + struct its_device *dev; > + uint32_t eventid; > +}; > + > +struct event_vlpi_map { > + unsigned int nr_lpis; > + spinlock_t vlpi_lock; > + struct its_vm *vm; > + struct its_vlpi_map *vlpi_maps; > + unsigned int nr_vlpis; > +}; > + > #endif > > /* > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index 77323b2584..360f8a968e 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -70,6 +70,7 @@ struct pending_irq > * LPI with the same number in an LR must be from an older LPI, whic= h > * has been unmapped before. > * > + * GIC_IRQ_GUEST_FORWARDED: the IRQ is forwarded to a VCPU(GICv4 onl= y) > */ > #define GIC_IRQ_GUEST_QUEUED 0 > #define GIC_IRQ_GUEST_ACTIVE 1 > @@ -77,6 +78,7 @@ struct pending_irq > #define GIC_IRQ_GUEST_ENABLED 3 > #define GIC_IRQ_GUEST_MIGRATING 4 > #define GIC_IRQ_GUEST_PRISTINE_LPI 5 > +#define GIC_IRQ_GUEST_FORWARDED 6 > unsigned long status; > struct irq_desc *desc; /* only set if the irq corresponds to a physi= cal irq */ > unsigned int irq; > @@ -95,6 +97,9 @@ struct pending_irq > * vgic lock is not going to be enough. */ > struct list_head lr_queue; > bool hw; /* Tied to HW IRQ */ > +#ifdef CONFIG_GICV4 > + struct its_vlpi_map *vlpi_map; > +#endif > }; > > #define NR_INTERRUPT_PER_RANK 32 > diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c > index 576e7fd4b0..94f7dd7d90 100644 > --- a/xen/arch/arm/vgic-v3-its.c > +++ b/xen/arch/arm/vgic-v3-its.c > @@ -589,6 +589,14 @@ static int its_discard_event(struct virt_its *its, > if ( vlpi =3D=3D INVALID_LPI ) > return -ENOENT; > > + p =3D gicv3_its_get_event_pending_irq(its->d, its->doorbell_address, > + vdevid, vevid); > + if ( unlikely(!p) ) > + return -EINVAL; > + > + if ( pirq_is_tied_to_hw(p) ) > + if ( gicv4_its_vlpi_unmap(p) ) > + return -EINVAL; > /* > * TODO: This relies on the VCPU being correct in the ITS tables. > * This can be fixed by either using a per-IRQ lock or by using > @@ -751,6 +759,27 @@ static int its_handle_mapti(struct virt_its *its, ui= nt64_t *cmdptr) > > vgic_init_pending_irq(pirq, intid, gic_is_gicv4()); > > + pirq->lpi_vcpu_id =3D vcpu->vcpu_id; pirq->lpi_vcpu_id =3D vcpu->vcpu_id; is assigned twice (here and again belo= w). Can we drop the earlier assignment and keep only the one after the mapping/setup, unless something in between relies on it? > + > + if ( pirq_is_tied_to_hw(pirq) ) > + /* > + * If on GICv4, we could let the VLPI being directly injected > + * to the guest. To achieve that, the VLPI must be mapped using > + * the VMAPTI command. > + */ > + if ( gicv4_assign_guest_event(its->d, its->doorbell_address, dev= id, > + eventid, pirq) ) > + goto out_remove_mapping; 1. looks like we should jump to "out_remove_host_entry" here, to roll back the host mapping created by gicv3_assign_guest_event(). 2. missing GICv4 rollback on error path: need gicv4_its_vlpi_unmap() before removing host mapping Best regards, Mykola > + > + if ( pirq_is_tied_to_hw(pirq) ) > + set_bit(GIC_IRQ_GUEST_FORWARDED, &pirq->status); > + else > + /* > + * Mark this LPI as new, so any older (now unmapped) LPI in any = LR > + * can be easily recognised as such. > + */ > + set_bit(GIC_IRQ_GUEST_PRISTINE_LPI, &pirq->status); > + > /* > * Now read the guest's property table to initialize our cached stat= e. > * We don't need the VGIC VCPU lock here, because the pending_irq is= n't > @@ -761,12 +790,6 @@ static int its_handle_mapti(struct virt_its *its, ui= nt64_t *cmdptr) > goto out_remove_host_entry; > > pirq->lpi_vcpu_id =3D vcpu->vcpu_id; > - /* > - * Mark this LPI as new, so any older (now unmapped) LPI in any LR > - * can be easily recognised as such. > - */ > - set_bit(GIC_IRQ_GUEST_PRISTINE_LPI, &pirq->status); > - > /* > * Now insert the pending_irq into the domain's LPI tree, so that > * it becomes live. > @@ -824,6 +847,13 @@ static int its_handle_movi(struct virt_its *its, uin= t64_t *cmdptr) > if ( unlikely(!p) ) > goto out_unlock; > > + if ( pirq_is_tied_to_hw(p) ) > + { > + ret =3D gicv4_its_vlpi_move(p, nvcpu); > + if ( ret ) > + goto out_unlock; > + } > + > /* > * TODO: This relies on the VCPU being correct in the ITS tables. > * This can be fixed by either using a per-IRQ lock or by using > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:39:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:39:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227080.1533409 (Exim 4.92) (envelope-from ) id 1vq5l6-0006ih-2Y; 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Wed, 11 Feb 2026 00:39:36 -0800 (PST) MIME-Version: 1.0 References: <9466059cffcae65acb96a6c3710778f2e9ebcbbd.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <9466059cffcae65acb96a6c3710778f2e9ebcbbd.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 09:39:23 +0100 X-Gm-Features: AZwV_Qg9FbKHeIyDVqX75kroi9gPCtoEJ5GmC8F1o1EoakBir7J_C_lcS3a5yvs Message-ID: Subject: Re: [PATCH 09/12] xen/arm: ffa: Fix SEND2 SP support gating To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > Xen only maps a VM RX/TX buffer into the SPMC when firmware supports > FFA_RX_ACQUIRE. Without that mapping, the SPMC cannot access the VM TX > buffer to relay FFA_MSG_SEND2 to a secure partition. > > Advertise FFA_MSG_SEND2 to guests only when VM-to-VM is enabled or when > the firmware supports both FFA_MSG_SEND2 and FFA_RX_ACQUIRE, and reject > SEND2 to a secure partition otherwise. Add comments to document the > mapping/ownership dependency. > > Functional impact: SEND2 to a secure partition is reported as > NOT_SUPPORTED when FFA_RX_ACQUIRE is absent. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa.c | 8 +++++++- > xen/arch/arm/tee/ffa_msg.c | 11 +++++++++++ > 2 files changed, 18 insertions(+), 1 deletion(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index e9e020bb0cb3..a46c6e5e67f1 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -292,7 +292,13 @@ static void handle_features(struct cpu_user_regs *re= gs) > ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_MSG_SEND2: > - if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) = ) > + /* > + * Forwarding SEND2 to an SP requires the SPMC to see the VM TX = buffer. > + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is support= ed. > + */ > + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) || > + (ffa_fw_supports_fid(FFA_MSG_SEND2) && > + ffa_fw_supports_fid(FFA_RX_ACQUIRE)) ) > ffa_set_regs_success(regs, 0, 0); > else > ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c > index 10856fddcbc4..928f269f6c3a 100644 > --- a/xen/arch/arm/tee/ffa_msg.c > +++ b/xen/arch/arm/tee/ffa_msg.c > @@ -274,6 +274,17 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *r= egs) > ret =3D FFA_RET_NOT_SUPPORTED; > goto out; > } > + /* > + * The SPMC needs access to the VM TX buffer to relay SEND2. > + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is support= ed. > + */ > + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) > + { > + ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 to SP requires RX_ACQUIRE\n"); > + goto out; > + } > > ret =3D ffa_simple_call(FFA_MSG_SEND2, > ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0,= 0, 0); > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:45:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:45:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227088.1533419 (Exim 4.92) (envelope-from ) id 1vq5qt-0008FP-KT; Wed, 11 Feb 2026 08:45:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227088.1533419; Wed, 11 Feb 2026 08:45:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq5qt-0008FI-Ha; Wed, 11 Feb 2026 08:45:39 +0000 Received: by outflank-mailman (input) for mailman id 1227088; Wed, 11 Feb 2026 08:45:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq5qs-0008FC-QQ for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 08:45:38 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 08f20b59-0726-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 09:45:36 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-480706554beso53413865e9.1 for ; Wed, 11 Feb 2026 00:45:36 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Any attempt to access it will raise an >> illegal-instruction exception. >> >> Guard the hstateen0 dump with a runtime check for Smstateen support to >> avoid triggering traps when dumping CSRs on systems that do not >> implement this extension. >> >> Fixes: 3babc8d2e546 ("xen/riscv: dump GPRs and CSRs on unexpected traps") >> Signed-off-by: Oleksii Kurochko > Reviewed-by: Jan Beulich Thanks. > > It is, aiui, independent of patch 1 and hence can go in right away. Yes, it is independent. > >> @@ -144,7 +145,12 @@ static void dump_csrs(const char *ctx) >> (v & HSTATUS_SPV) ? " SPV" : "", >> (v & HSTATUS_GVA) ? " GVA" : ""); >> X(hgatp, CSR_HGATP, "\n"); >> - X(hstateen0, CSR_HSTATEEN0, "\n"); >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) >> + { >> + X(hstateen0, CSR_HSTATEEN0, "\n"); >> + } > I was going to ask for the braces to be dropped, but I notice they are > required as long as X() isn't properly adjusted. This is why even for > local use macros we should take a little more care when introducing > them, so they can be used without having to pay too close attention to > their actual implementation. It would be better to have do {...} while(0) in the definition of X macros. I will add do {...} while(0) to one of the next patches where I have the same case. I don't mind to update X() in dump_csrs() in the next patch version to: #define X(name, csr, fmt, ...) do { \ v = csr_read(csr); \ printk("%-10s: %016lx" fmt, #name, v, ##__VA_ARGS__); \ while(0) ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 08:53:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 08:53:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227098.1533430 (Exim 4.92) (envelope-from ) id 1vq5y5-0001Xg-BL; Wed, 11 Feb 2026 08:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227098.1533430; Wed, 11 Feb 2026 08:53:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq5y5-0001XZ-7F; Wed, 11 Feb 2026 08:53:05 +0000 Received: by outflank-mailman (input) for mailman id 1227098; Wed, 11 Feb 2026 08:53:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq5y4-0001XT-8i for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 00:52:55 -0800 (PST) MIME-Version: 1.0 References: <38d71ac53abeeb4598d6ffb6bdab3717b3531334.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <38d71ac53abeeb4598d6ffb6bdab3717b3531334.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 09:52:43 +0100 X-Gm-Features: AZwV_QiV4UmolsCRVma8gWNLgXZVjFGpG9XEnApvRoRtziub7bzhTn62EHVYBJo Message-ID: Subject: Re: [PATCH 10/12] xen/arm: ffa: Reduce logging noise To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > Several FF-A paths log warnings for expected or recoverable conditions, > leading to noisy logs during normal operation. > > Reduce log noise by: > - demoting unhandled FID warnings to debug > - ratelimiting notification and VM teardown failures > - printing the bit-15 convention warning once per boot > - adjusting log prefixes for hypervisor-only events > - adding debug diagnostics for RX/TX acquire failures, with busy cases > ratelimited > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa.c | 11 ++++++----- > xen/arch/arm/tee/ffa_notif.c | 11 ++++++----- > xen/arch/arm/tee/ffa_partinfo.c | 15 ++++++++------- > xen/arch/arm/tee/ffa_rxtx.c | 21 +++++++++++++++++++-- > 4 files changed, 39 insertions(+), 19 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index a46c6e5e67f1..d0b9c9f1ab2e 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -461,7 +461,7 @@ static bool ffa_handle_call(struct cpu_user_regs *reg= s) > break; > > default: > - gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); > + gdprintk(XENLOG_DEBUG, "ffa: unhandled fid 0x%x\n", fid); > e =3D FFA_RET_NOT_SUPPORTED; > break; > } > @@ -581,7 +581,8 @@ static void ffa_domain_teardown_continue(struct ffa_c= tx *ctx, bool first_time) > > if ( retry ) > { > - printk(XENLOG_G_INFO "%pd: ffa: Remaining cleanup, retrying\n", = ctx->teardown_d); > + printk(XENLOG_G_DEBUG "%pd: ffa: Remaining cleanup, retrying\n", > + ctx->teardown_d); > > ctx->teardown_expire =3D NOW() + FFA_CTX_TEARDOWN_DELAY; > > @@ -622,7 +623,7 @@ static void ffa_teardown_timer_callback(void *arg) > if ( ctx ) > ffa_domain_teardown_continue(ctx, false /* !first_time */); > else > - printk(XENLOG_G_ERR "%s: teardown list is empty\n", __func__); > + printk(XENLOG_ERR "%s: teardown list is empty\n", __func__); > } > > /* This function is supposed to undo what ffa_domain_init() has done */ > @@ -684,7 +685,7 @@ static bool ffa_probe_fw(void) > > if ( !ffa_get_version(&vers) ) > { > - gprintk(XENLOG_ERR, "Cannot retrieve the FFA version\n"); > + printk(XENLOG_ERR "ffa: Cannot retrieve the FFA version\n"); > goto err_no_fw; > } > > @@ -724,7 +725,7 @@ static bool ffa_probe_fw(void) > set_bit(FFA_ABI_BITNUM(ffa_fw_abi_needed[i].id), > ffa_fw_abi_supported); > else > - printk(XENLOG_INFO "ARM FF-A Firmware does not support %s\n"= , > + printk(XENLOG_WARNING "ARM FF-A Firmware does not support %s= \n", > ffa_fw_abi_needed[i].name); > } > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index 37b05747cd21..186e72641237 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -292,8 +292,9 @@ static void notif_vm_pend_intr(uint16_t vm_id) > break; > } > } > - if ( !v ) > - printk(XENLOG_ERR "ffa: can't inject NPI, all vCPUs offline\n"); > + if ( !v && printk_ratelimit() ) > + printk(XENLOG_G_DEBUG "%pd: ffa: can't inject NPI, all vCPUs off= line\n", > + d); > > out_unlock: > rcu_unlock_domain(d); > @@ -316,9 +317,9 @@ static void notif_sri_action(void *unused) > res =3D ffa_get_ret_code(&resp); > if ( res ) > { > - if ( res !=3D FFA_RET_NO_DATA ) > - printk(XENLOG_ERR "ffa: notification info get failed: er= ror %d\n", > - res); > + if ( res !=3D FFA_RET_NO_DATA && printk_ratelimit() ) > + printk(XENLOG_WARNING > + "ffa: notification info get failed: error %d\n", = res); > return; > } > > diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_parti= nfo.c > index 6b01c4abe915..c9f186b3720c 100644 > --- a/xen/arch/arm/tee/ffa_partinfo.c > +++ b/xen/arch/arm/tee/ffa_partinfo.c > @@ -461,9 +461,11 @@ static bool init_subscribers(void *buf, uint16_t cou= nt, uint32_t fpi_size) > */ > if ( !FFA_ID_IS_SECURE(fpi->id) ) > { > - printk(XENLOG_ERR "ffa: Firmware is not using bit 15 convent= ion for IDs !!\n" > - "ffa: Secure partition with id 0x%04x cann= ot be used\n", > - fpi->id); > + printk_once(XENLOG_ERR > + "ffa: Firmware is not using bit 15 convention fo= r IDs !!\n"); > + printk(XENLOG_ERR > + "ffa: Secure partition with id 0x%04x cannot be used\= n", > + fpi->id); > } > else > { > @@ -632,11 +634,10 @@ bool ffa_partinfo_domain_destroy(struct domain *d) > res =3D ffa_direct_req_send_vm(subscr_vm_destroyed[n], ffa_get_v= m_id(d), > FFA_MSG_SEND_VM_DESTROYED); > > - if ( res ) > - { > - printk(XENLOG_ERR "%pd: ffa: Failed to report destruction of= vm_id %u to %u: res %d\n", > + if ( res && printk_ratelimit() ) > + printk(XENLOG_WARNING > + "%pd: ffa: Failed to report destruction of vm_id %u t= o %u: res %d\n", > d, ffa_get_vm_id(d), subscr_vm_destroyed[n], res); > - } > > /* > * For these two error codes the hypervisor is expected to resen= d > diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c > index 450ce102cbdc..3147aba21ddf 100644 > --- a/xen/arch/arm/tee/ffa_rxtx.c > +++ b/xen/arch/arm/tee/ffa_rxtx.c > @@ -4,6 +4,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -82,8 +83,9 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx= _addr, > > if ( page_count > FFA_MAX_RXTX_PAGE_COUNT || !page_count ) > { > - printk(XENLOG_ERR "ffa: RXTX_MAP: error: %u pages requested (lim= it %u)\n", > - page_count, FFA_MAX_RXTX_PAGE_COUNT); > + gdprintk(XENLOG_DEBUG, > + "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n"= , > + page_count, FFA_MAX_RXTX_PAGE_COUNT); > return FFA_RET_INVALID_PARAMETERS; > } > > @@ -303,12 +305,15 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **= buf, size_t *buf_size) > if ( !ctx->page_count ) > { > ret =3D FFA_RET_DENIED; > + gdprintk(XENLOG_DEBUG, "ffa: RX acquire denied, no RX/TX mapped\= n"); > goto out; > } > > if ( !ctx->rx_is_free ) > { > ret =3D FFA_RET_BUSY; > + if ( printk_ratelimit() ) > + gdprintk(XENLOG_DEBUG, "ffa: RX acquire busy\n"); > goto out; > } > > @@ -316,7 +321,10 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **b= uf, size_t *buf_size) > { > ret =3D ffa_simple_call(FFA_RX_ACQUIRE, ctx->ffa_id, 0, 0, 0); > if ( ret !=3D FFA_RET_OK ) > + { > + gdprintk(XENLOG_DEBUG, "ffa: RX acquire failed: %d\n", ret); > goto out; > + } > } > ctx->rx_is_free =3D false; > *buf =3D ctx->rx; > @@ -355,13 +363,22 @@ int32_t ffa_tx_acquire(struct ffa_ctx *ctx, const v= oid **buf, size_t *buf_size) > int32_t ret =3D FFA_RET_DENIED; > > if ( !spin_trylock(&ctx->tx_lock) ) > + { > + gdprintk(XENLOG_DEBUG, "ffa: TX acquire busy\n"); > return FFA_RET_BUSY; > + } > > if ( !ctx->page_count ) > + { > + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, no RX/TX mapped\= n"); > goto err_unlock; > + } > > if ( !ctx->tx ) > + { > + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, TX buffer missin= g\n"); > goto err_unlock; > + } > > *buf =3D ctx->tx; > *buf_size =3D ctx->page_count * FFA_PAGE_SIZE; > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 09:34:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 09:34:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227113.1533442 (Exim 4.92) (envelope-from ) id 1vq6bb-0006wa-9E; Wed, 11 Feb 2026 09:33:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227113.1533442; Wed, 11 Feb 2026 09:33:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq6bb-0006wT-5z; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3b5RZ/KHtF0RIAYoOF/qEDOrtZxikmxKaF/Q/QHYoLbNOnvhpZO6fdl6WldLAjmdPFouoFdmUfYEA47Yzl/90ESRcmC3hEVr84ZGhw9Lidr3LJhnYmUZ3QQDX7OujByS3wgbJQAoOwwHIcySh77Z82v1hf39YMNPvAfLOkaJigJyEplwIRqvC3n8E/TrH/17lDaWCGoW4bHiu+62YhnczFwtBa3+JwODQuEMVKAAl+gPyoydLJaVqUpcktJLq2Cvg9wQzQEh7Io2aQmloO/IM9ZF0wEBU4W38V82ceSDr9PSKyBxrJ1Isn416vpacEW76uOPLmq5BWbidVGWoKyo2sWH+8nMbl0ERMqB4P3N3CyrSzQP0OMOceLhPtA2aw06qzK1GWmGDhJpqjXrUj/CvAgaRG5Ik6W3xEYBcGVXz/HXxDJiOL0vh9eWh0Fsve4K X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 09:33:48.0948 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b4253ea-6bf9-412d-cbee-08de6950a8ac X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5899 On Wed Feb 11, 2026 at 8:17 AM CET, Jan Beulich wrote: > On 10.02.2026 18:30, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/include/asm/mem_sharing.h >> +++ b/xen/arch/x86/include/asm/mem_sharing.h >> @@ -9,10 +9,12 @@ >> #ifndef __MEM_SHARING_H__ >> #define __MEM_SHARING_H__ >> =20 >> -#include >> -#include >> +struct xen_domctl_mem_sharing_op; >> =20 >> #ifdef CONFIG_MEM_SHARING >> +#include >> + >> +struct xen_mem_sharing_op; >> =20 >> #define mem_sharing_enabled(d) ((d)->arch.hvm.mem_sharing.enabled) >> =20 >> @@ -92,8 +94,6 @@ int mem_sharing_fork_reset(struct domain *d, bool rese= t_state, >> int mem_sharing_notify_enomem(struct domain *d, unsigned long gfn, >> bool allow_sleep); >> int mem_sharing_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_sharing_op_t) arg)= ; >> -int mem_sharing_domctl(struct domain *d, >> - struct xen_domctl_mem_sharing_op *mec); >> =20 >> /* >> * Scans the p2m and relinquishes any shared pages, destroying >> @@ -103,6 +103,7 @@ int mem_sharing_domctl(struct domain *d, >> int relinquish_shared_pages(struct domain *d); >> =20 >> #else >> +struct domctl; > > DYM struct domain? If so (can adjust while committing): > Reviewed-by: Jan Beulich I did. Annoyingly I only recompiled on with mem_sharing enabled. > > Cc-ing Tamas at least for awareness; I think ./MAINTAINERS should enumera= te > this file in the X86 MEMORY SHARING section. > >> --- a/xen/arch/x86/include/asm/p2m.h >> +++ b/xen/arch/x86/include/asm/p2m.h >> @@ -806,12 +806,10 @@ static inline void p2m_pt_init(struct p2m_domain *= p2m) {} >> void *map_domain_gfn(struct p2m_domain *p2m, gfn_t gfn, mfn_t *mfn, >> p2m_query_t q, uint32_t *pfec); >> =20 >> -#if P2M_AUDIT >> -extern void audit_p2m(struct domain *d, >> - uint64_t *orphans, >> - uint64_t *m2p_bad, >> - uint64_t *p2m_bad); >> -#endif /* P2M_AUDIT */ >> +void audit_p2m(struct domain *d, >> + uint64_t *orphans, >> + uint64_t *m2p_bad, >> + uint64_t *p2m_bad); > > If already you adjust this beyond dropping the #ifdef, I think we also wa= nt to > make use of line length, to better match e.g. the other prototype in patc= h > context above. I'm likely to take the liberty of doing so while committin= g. > > Jan Thanks, Jan. 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Wed, 11 Feb 2026 01:45:02 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 10:44:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 04/16] xen/riscv: implement vcpu_csr_init() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <212accf20032cc9cbe6c33752fa45de1c1284e3c.1770650552.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <212accf20032cc9cbe6c33752fa45de1c1284e3c.1770650552.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -5,6 +5,72 @@ > #include > #include > > +#include > +#include > +#include > +#include > + > +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ > + BIT(CAUSE_FETCH_ACCESS, U) | \ > + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ > + BIT(CAUSE_BREAKPOINT, U) | \ > + BIT(CAUSE_MISALIGNED_LOAD, U) | \ > + BIT(CAUSE_LOAD_ACCESS, U) | \ > + BIT(CAUSE_MISALIGNED_STORE, U) | \ > + BIT(CAUSE_STORE_ACCESS, U) | \ > + BIT(CAUSE_USER_ECALL, U) | \ > + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ > + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ > + BIT(CAUSE_STORE_PAGE_FAULT, U)) > + > +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) > + > +static void vcpu_csr_init(struct vcpu *v) > +{ > + register_t hstateen0; There not being an initializer here, ... > + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; > + > + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; > + > + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; > + > + /* > + * VS should access only the time counter directly. > + * Everything else should trap. > + */ > + v->arch.hcounteren = HCOUNTEREN_TM; > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) > + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) > + { > + if (riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia)) (Nit: Style.) > + /* > + * If the hypervisor extension is implemented, the same three > + * bitsare defined also in hypervisor CSR hstateen0 but concern (Nit: "bits are") > + * only the state potentially accessible to a virtual machine > + * executing in privilege modes VS and VU: > + * bit 60 CSRs siselect and sireg (really vsiselect and > + * vsireg) > + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really > + * vsiph, vsieh, and vstopi) > + * bit 58 all state of IMSIC guest interrupt files, including > + * CSR stopei (really vstopei) > + * If one of these bits is zero in hstateen0, and the same bit is > + * one in mstateen0, then an attempt to access the corresponding > + * state from VS or VU-mode raises a virtual instruction exception. > + */ > + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; > + > + /* Allow guest to access CSR_ENVCFG */ > + hstateen0 |= SMSTATEEN0_HSENVCFG; ... doesn't the compiler complain about the use of a possibly uninitialized variable? The variable also wants to move to the more narrow scope. > @@ -32,6 +98,8 @@ int arch_vcpu_create(struct vcpu *v) > v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; > v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; > > + vcpu_csr_init(v); > + > /* Idle VCPUs don't need the rest of this setup */ > if ( is_idle_vcpu(v) ) > return rc; Do idle vCPU-s really need to have vcpu_csr_init() called for them? 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Writing unsupported bits can either be ignored >> or raise an exception depending on the platform. >> >> Detect the set of writable bits for selected hypervisor CSRs at boot and >> store the resulting masks for later use. This allows safely programming >> these CSRs during vCPU context switching and avoids relying on hardcoded >> architectural assumptions. >> >> Note that csr_set() is used instead of csr_write() to write all ones to >> the mask, as the CSRRS instruction, according to the RISC-V specification, >> sets only those bits that are writable: >> Any bit that is high in rs1 will cause the corresponding bit to be set >> in the CSR, if that CSR bit is writable. >> In contrast, the CSRRW instruction does not take CSR bit writability into >> account, which could lead to unintended side effects when writing all ones >> to a CSR. > Hmm, I wonder in how far the wording there is precise. In a subsequent > paragraph there is: > > "For both CSRRS and CSRRC, if rs1=x0, then the instruction will not write > to the CSR at all, and so shall not cause any of the side effects that > might otherwise occur on a CSR write, nor raise illegal-instruction > exceptions on accesses to read-only CSRs." > > To me, a read-only CSR is a CSR with all bits read-only. With this > interpretation, the two statements conflict with one another. Is this > interpretation ruled out somewhere? Good question. Actually by read-only CSRs RISC-V spec means that a CSR is read-only by its design: The standard RISC-V ISA sets aside a 12-bit encoding space (csr[11:0]) for up to 4,096 CSRs. By convention, the upper 4 bits of the CSR address (csr[11:8]) are used to encode the read and write accessibility of the CSRs according to privilege level as shown in Table 3. The top two bits (csr[11:10]) indicate whether the register is read/write (00,01, or 10) or read-only (11). But logically it seems like if CSR is read-only then technically all CSR bits are read-only as anyway an exception will occur if CSR is read-only. So CSRRW* can't be used for such read-only CSRs as write always happen and it will lead to an exception. I can add in the commit message that the quote about CSRRS considers only not read-only CSRs if it makes sense as if CSR is read-only then we won't calculate a mask for it. > >> Masks are calculated at the moment only for hdeleg, henvcfg, hideleg, > Nit: First one is hedeleg. > >> hstateen0 registers as only them are going to be used in the follow up >> patch. >> >> If the Smstateen extension is not implemented, hstateen0 cannot be read >> because the register is considered non-existent. Instructions that attempt >> to access a CSR that is not implemented or not visible in the current mode >> are reserved and will raise an illegal-instruction exception. >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in V3: >> - New patch. >> >> --- a/xen/arch/riscv/setup.c >> +++ b/xen/arch/riscv/setup.c >> @@ -32,6 +32,8 @@ >> unsigned char __initdata cpu0_boot_stack[STACK_SIZE] >> __aligned(STACK_SIZE); >> >> +struct csr_masks __ro_after_init csr_masks; > setup.c would be nice to only have __init functions and __initdata data. > Really up to now that's the case, and I wonder why the makefile doesn't > leverage this by using setup.init.o in place of setup.o. This variable > would likely better live elsewhere anyway, imo: Somewhere it's actually > (going to be) used. I put it here as I wasn't able to find better place. If it is okay to have it in domain.c then I'm okay to move this variable there. > >> @@ -70,6 +72,28 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) >> return fdt; >> } >> >> +void __init init_csr_masks(void) >> +{ >> + register_t old; >> + >> +#define X(csr, field) \ >> + old = csr_read(CSR_##csr); \ >> + csr_set(CSR_##csr, ULONG_MAX); \ >> + csr_masks.field = csr_read(CSR_##csr); \ >> + csr_write(CSR_##csr, old) > See my remark on the earlier patch regarding locally used macros. You > shouldn't ... > >> + X(HEDELEG, hedeleg); >> + X(HENVCFG, henvcfg); >> + X(HIDELEG, hideleg); >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) >> + { >> + X(HSTATEEN0, hstateen0); >> + } > ... be required to put braces here. (Then I'd further recommend to make "old" > local to the macro's scope.) > > I'm also inclined to recommend to avoid an inflation of X() macros. Give > each such macro a somewhat sensible (yet still short) name. This way you'll > avoid Misra rule 5.4 ("Macro identifiers shall be distinct") concerns, in > combination with rule 20.5 ("#undef should not be used"). Note that we > didn't accept the latter rule, hence why I'm only saying "concerns", not > "violations". Thanks for explanation MISRA stuff. I will rename X() here to INIT_CSR_MASK() and add do {...} while(0) to deal with if()'s brackets. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 09:51:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 09:51:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227138.1533473 (Exim 4.92) (envelope-from ) id 1vq6s6-0002LR-AB; Wed, 11 Feb 2026 09:50:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227138.1533473; Wed, 11 Feb 2026 09:50:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq6s6-0002LK-4T; Wed, 11 Feb 2026 09:50:58 +0000 Received: by outflank-mailman (input) for mailman id 1227138; Wed, 11 Feb 2026 09:50:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq6s5-0002LE-DG for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 09:50:57 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 292e89d1-072f-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 10:50:56 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-4359108fd24so4206791f8f.2 for ; Wed, 11 Feb 2026 01:50:56 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 01:50:55 -0800 (PST) Message-ID: <6f170f0c-6d36-4ecc-b2c6-5b70aff8ed45@suse.com> Date: Wed, 11 Feb 2026 10:50:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 03/16] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3650d684-f6c8-4f73-ad8b-3c6dd64c256c@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3650d684-f6c8-4f73-ad8b-3c6dd64c256c@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 10:47, Oleksii Kurochko wrote: > On 2/11/26 8:49 AM, Jan Beulich wrote: >> On 09.02.2026 17:52, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/setup.c >>> +++ b/xen/arch/riscv/setup.c >>> @@ -32,6 +32,8 @@ >>> unsigned char __initdata cpu0_boot_stack[STACK_SIZE] >>> __aligned(STACK_SIZE); >>> >>> +struct csr_masks __ro_after_init csr_masks; >> setup.c would be nice to only have __init functions and __initdata data. >> Really up to now that's the case, and I wonder why the makefile doesn't >> leverage this by using setup.init.o in place of setup.o. This variable >> would likely better live elsewhere anyway, imo: Somewhere it's actually >> (going to be) used. > > I put it here as I wasn't able to find better place. If it is okay to have > it in domain.c then I'm okay to move this variable there. If that's where it's going to be (mainly) used (as the next patch suggests), I see nothing speaking against you doing so. Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 09:53:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 09:53:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227145.1533483 (Exim 4.92) (envelope-from ) id 1vq6uB-0002qq-KT; Wed, 11 Feb 2026 09:53:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227145.1533483; Wed, 11 Feb 2026 09:53:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq6uB-0002qj-Fi; Wed, 11 Feb 2026 09:53:07 +0000 Received: by outflank-mailman (input) for mailman id 1227145; Wed, 11 Feb 2026 09:53:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq6u9-0002qb-Rs for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 09:53:05 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 752318d1-072f-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 10:53:03 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-47ee3a63300so20652565e9.2 for ; Wed, 11 Feb 2026 01:53:03 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Wed, 11 Feb 2026 01:53:02 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 10:53:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 04/16] xen/riscv: implement vcpu_csr_init() To: Jan Beulich Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <212accf20032cc9cbe6c33752fa45de1c1284e3c.1770650552.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/11/26 10:44 AM, Jan Beulich wrote: > On 09.02.2026 17:52, Oleksii Kurochko wrote: >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -5,6 +5,72 @@ >> #include >> #include >> >> +#include >> +#include >> +#include >> +#include >> + >> +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ >> + BIT(CAUSE_FETCH_ACCESS, U) | \ >> + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ >> + BIT(CAUSE_BREAKPOINT, U) | \ >> + BIT(CAUSE_MISALIGNED_LOAD, U) | \ >> + BIT(CAUSE_LOAD_ACCESS, U) | \ >> + BIT(CAUSE_MISALIGNED_STORE, U) | \ >> + BIT(CAUSE_STORE_ACCESS, U) | \ >> + BIT(CAUSE_USER_ECALL, U) | \ >> + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ >> + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ >> + BIT(CAUSE_STORE_PAGE_FAULT, U)) >> + >> +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) >> + >> +static void vcpu_csr_init(struct vcpu *v) >> +{ >> + register_t hstateen0; > There not being an initializer here, ... > >> + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; >> + >> + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; >> + >> + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; >> + >> + /* >> + * VS should access only the time counter directly. >> + * Everything else should trap. >> + */ >> + v->arch.hcounteren = HCOUNTEREN_TM; >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) >> + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) >> + { >> + if (riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia)) > (Nit: Style.) > >> + /* >> + * If the hypervisor extension is implemented, the same three >> + * bitsare defined also in hypervisor CSR hstateen0 but concern > (Nit: "bits are") > >> + * only the state potentially accessible to a virtual machine >> + * executing in privilege modes VS and VU: >> + * bit 60 CSRs siselect and sireg (really vsiselect and >> + * vsireg) >> + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really >> + * vsiph, vsieh, and vstopi) >> + * bit 58 all state of IMSIC guest interrupt files, including >> + * CSR stopei (really vstopei) >> + * If one of these bits is zero in hstateen0, and the same bit is >> + * one in mstateen0, then an attempt to access the corresponding >> + * state from VS or VU-mode raises a virtual instruction exception. >> + */ >> + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; >> + >> + /* Allow guest to access CSR_ENVCFG */ >> + hstateen0 |= SMSTATEEN0_HSENVCFG; > ... doesn't the compiler complain about the use of a possibly uninitialized > variable? The variable also wants to move to the more narrow scope. Hmm, for some reason it doesn't. Anyway, I agree that it would be better to move it to a narrower scope, since `hstateen0` exists only when RISCV_ISA_EXT_smstateen is supported. > >> @@ -32,6 +98,8 @@ int arch_vcpu_create(struct vcpu *v) >> v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; >> v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; >> >> + vcpu_csr_init(v); >> + >> /* Idle VCPUs don't need the rest of this setup */ >> if ( is_idle_vcpu(v) ) >> return rc; > Do idle vCPU-s really need to have vcpu_csr_init() called for them? Agree, there is no any sense. I will move the call of vcpu_csr_init() after is_idle_vcpu() check. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:08:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:08:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227167.1533503 (Exim 4.92) (envelope-from ) id 1vq793-000547-4d; Wed, 11 Feb 2026 10:08:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227167.1533503; Wed, 11 Feb 2026 10:08:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq793-000540-27; Wed, 11 Feb 2026 10:08:29 +0000 Received: by outflank-mailman (input) for mailman id 1227167; Wed, 11 Feb 2026 10:08:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq791-00053u-SJ for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 02:08:24 -0800 (PST) MIME-Version: 1.0 References: <94e10f14d499d7e584fb0fbdd28d0288bb5831bd.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <94e10f14d499d7e584fb0fbdd28d0288bb5831bd.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 11:08:11 +0100 X-Gm-Features: AZwV_Qitgxl6iN38jOoWc9xfa70pVbIFnz2caY86PLL3MRmbfLCo_xzbuaynqBs Message-ID: Subject: Re: [PATCH 11/12] xen/arm: ffa: Add MEM_SHARE page diagnostics To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > MEM_SHARE failures in get_shm_pages() are silent, which makes malformed > ranges and page mapping failures hard to diagnose. > > Add debug logging for page validation failures: > - descriptor validation failures (unaligned, range short/overflow) > - per-page mapping failures (unmapped GFN, wrong p2m type) > - address overflow detection in range walks > > Ratelimit temporary reclaim failures and log permanent reclaim failures > as errors. > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_shm.c | 73 ++++++++++++++++++++++++++++++++------ > 1 file changed, 63 insertions(+), 10 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 905a64e3db01..89161753e922 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -169,6 +169,12 @@ static int32_t get_shm_pages(struct domain *d, struc= t ffa_shm_mem *shm, > uint64_t addr; > uint64_t page_count; > uint64_t gaddr; > + int32_t ret =3D FFA_RET_OK; > + const char *reason =3D NULL; > + unsigned int bad_rg =3D 0; > + unsigned int bad_pg =3D 0; > + unsigned long bad_addr =3D 0; > + p2m_type_t bad_t =3D p2m_invalid; > > for ( n =3D 0; n < range_count; n++ ) > { > @@ -176,34 +182,78 @@ static int32_t get_shm_pages(struct domain *d, stru= ct ffa_shm_mem *shm, > addr =3D ACCESS_ONCE(range[n].address); > > if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) > - return FFA_RET_INVALID_PARAMETERS; > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + reason =3D "unaligned"; > + bad_rg =3D n; > + bad_addr =3D (unsigned long)addr; > + goto out; The extra help variables clutter the code, and the debug message requires one to read the code to understand it. I'd prefer separate prints for each error location. For example: gdprintk(XENLOG_DEBUG, "ffa: mem share pages invalid: unalinged range %u address %#lx\n", ...) return FFA_RET_INVALID_PARAMETERS; It should result in fewer lines of code and clearer debug messages. Cheers, Jens > + } > > for ( m =3D 0; m < page_count; m++ ) > { > if ( pg_idx >=3D shm->page_count ) > - return FFA_RET_INVALID_PARAMETERS; > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + reason =3D "range overflow"; > + bad_rg =3D n; > + bad_pg =3D m; > + goto out; > + } > > if ( !ffa_safe_addr_add(addr, m) ) > - return FFA_RET_INVALID_PARAMETERS; > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + reason =3D "addr overflow"; > + bad_rg =3D n; > + bad_pg =3D m; > + bad_addr =3D (unsigned long)addr; > + goto out; > + } > > gaddr =3D addr + m * FFA_PAGE_SIZE; > gfn =3D gaddr_to_gfn(gaddr); > shm->pages[pg_idx] =3D get_page_from_gfn(d, gfn_x(gfn), &t, > P2M_ALLOC); > if ( !shm->pages[pg_idx] ) > - return FFA_RET_DENIED; > + { > + ret =3D FFA_RET_DENIED; > + reason =3D "gfn unmapped"; > + bad_rg =3D n; > + bad_pg =3D m; > + bad_addr =3D (unsigned long)gaddr; > + goto out; > + } > /* Only normal RW RAM for now */ > if ( t !=3D p2m_ram_rw ) > - return FFA_RET_DENIED; > + { > + ret =3D FFA_RET_DENIED; > + reason =3D "p2m type"; > + bad_rg =3D n; > + bad_pg =3D m; > + bad_addr =3D (unsigned long)gaddr; > + bad_t =3D t; > + goto out; > + } > pg_idx++; > } > } > > /* The ranges must add up */ > if ( pg_idx < shm->page_count ) > - return FFA_RET_INVALID_PARAMETERS; > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + reason =3D "range short"; > + bad_pg =3D pg_idx; > + goto out; > + } > > - return FFA_RET_OK; > +out: > + if ( ret ) > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: %s rg %u pg %u addr %#lx= p2m %u\n", > + reason ? reason : "unknown", bad_rg, bad_pg, bad_addr, = bad_t); > + return ret; > } > > static void put_shm_pages(struct ffa_shm_mem *shm) > @@ -759,8 +809,10 @@ bool ffa_shm_domain_destroy(struct domain *d) > * A temporary error that may get resolved a bit later, it's > * worth retrying. > */ > - printk(XENLOG_G_INFO "%pd: ffa: Failed to reclaim handle %#l= x : %d\n", > - d, shm->handle, res); > + if ( printk_ratelimit() ) > + printk(XENLOG_G_WARNING > + "%pd: ffa: Failed to reclaim handle %#lx : %d\n", > + d, shm->handle, res); > break; /* We will retry later */ > default: > /* > @@ -772,7 +824,8 @@ bool ffa_shm_domain_destroy(struct domain *d) > * FFA_RET_NO_MEMORY might be a temporary error as it it cou= ld > * succeed if retried later, but treat it as permanent for n= ow. > */ > - printk(XENLOG_G_INFO "%pd: ffa: Permanent failure to reclaim= handle %#lx : %d\n", > + printk(XENLOG_G_ERR > + "%pd: ffa: Permanent failure to reclaim handle %#lx := %d\n", > d, shm->handle, res); > > /* > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:16:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:16:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227197.1533526 (Exim 4.92) (envelope-from ) id 1vq7H6-0006oA-2Y; Wed, 11 Feb 2026 10:16:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227197.1533526; Wed, 11 Feb 2026 10:16:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7H5-0006o3-W3; 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Wed, 11 Feb 2026 02:16:43 -0800 (PST) MIME-Version: 1.0 References: <209e5474e236737dd13e0f7ff8120b05cdb7eabe.1770115302.git.bertrand.marquis@arm.com> In-Reply-To: <209e5474e236737dd13e0f7ff8120b05cdb7eabe.1770115302.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 11:16:31 +0100 X-Gm-Features: AZwV_QipjR6ieZFOpUfyFCXBksh_L80RmeFuP26ja6kDoLgiLqXMLWph2x0RSdA Message-ID: Subject: Re: [PATCH 12/12] xen/arm: ffa: Add message parameter diagnostics To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis wrote: > > MSG_SEND2 and direct request validation failures are silent, making it > hard to diagnose invalid IDs, oversized messages, or unsupported > destination types. > > Add debug logs for parameter validation failures: > - invalid endpoint IDs > - oversized messages > - unsupported destination types > - invalid sender/receiver combinations > - ratelimit MSG_SEND2 busy failures to avoid log flooding > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_msg.c | 45 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c > index 928f269f6c3a..cc273c9a8e80 100644 > --- a/xen/arch/arm/tee/ffa_msg.c > +++ b/xen/arch/arm/tee/ffa_msg.c > @@ -4,6 +4,7 @@ > */ > > #include > +#include > #include > #include > > @@ -100,6 +101,7 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > if ( !ffa_fw_supports_fid(fid) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: direct req fid %#x not supported\n"= , fid); > goto out; > } > > @@ -108,6 +110,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > (src_dst & GENMASK(15,0)) =3D=3D ffa_get_vm_id(d) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: direct req invalid src/dst %#x\n", > + (uint32_t)src_dst); > goto out; > } > > @@ -115,6 +120,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, > + "ffa: direct req to non-secure dst %#x\n", > + (uint32_t)(src_dst & GENMASK(15, 0))); > goto out; > } > > @@ -166,7 +174,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, con= st void *src_buf, > /* This is also checking that dest is not src */ > ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > if ( ret ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 lookup failed: dst %#x ret %d\n", > + dst_id, ret); > return ret; > + } > > /* This also checks that destination has set a Rx buffer */ > ret =3D ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); > @@ -199,6 +212,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, con= st void *src_buf, > /* receiver rx buffer will be released by the receiver*/ > > out_unlock: > + if ( ret ) > + { > + if ( ret !=3D FFA_RET_BUSY || printk_ratelimit() ) Shouldn't this be && ? Cheers, Jens > + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to %#x failed: %d\n", > + dst_id, ret); > + } > rcu_unlock_domain(dst_d); > if ( !ret ) > ffa_raise_rx_buffer_full(dst_d); > @@ -226,7 +245,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *r= egs) > > ret =3D ffa_tx_acquire(src_ctx, &tx_buf, &tx_size); > if ( ret !=3D FFA_RET_OK ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 TX acquire failed: %d\n", ret); > return ret; > + } > > /* create a copy of the message header */ > memcpy(&src_msg, tx_buf, sizeof(src_msg)); > @@ -238,6 +261,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > dst_id =3D=3D ffa_get_vm_id(src_d) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid src/dst src %#x dst %#x\n", > + src_id, dst_id); > goto out; > } > > @@ -246,6 +272,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > if (src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1)) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_offset %u (v1.1)\n", > + src_msg.msg_offset); > goto out; > } > /* Set uuid to Nil UUID for v1.1 guests */ > @@ -255,6 +284,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > else if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_2) = ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_offset %u (v1.2)\n", > + src_msg.msg_offset); > goto out; > } > > @@ -263,6 +295,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > src_msg.msg_size > (tx_size - src_msg.msg_offset) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_size %u offset %u tx %zu\n"= , > + src_msg.msg_size, src_msg.msg_offset, tx_size); > goto out; > } > > @@ -272,6 +307,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 to SP not supported\n"); > goto out; > } > /* > @@ -288,6 +325,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > > ret =3D ffa_simple_call(FFA_MSG_SEND2, > ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0,= 0, 0); > + if ( ret ) > + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to SP failed: %d\n", = ret); > } > else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > @@ -295,7 +334,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *r= egs) > ret =3D ffa_msg_send2_vm(dst_id, tx_buf, &src_msg); > } > else > + { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 to VM disabled (dst %#x)\n", dst_id); > + } > > out: > ffa_tx_release(src_ctx); > @@ -311,6 +354,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint3= 2_t fid) > if ( !ffa_fw_supports_fid(fid) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: run fid %#x not supported\n", fid); > goto out; > } > > @@ -322,6 +366,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint3= 2_t fid) > if ( !FFA_ID_IS_SECURE(dst >> 16) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: run to non-secure dst %#x\n", dst); > goto out; > } > > -- > 2.50.1 (Apple Git-155) > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227220.1533549 (Exim 4.92) (envelope-from ) id 1vq7kN-0002hg-MI; Wed, 11 Feb 2026 10:47:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227220.1533549; Wed, 11 Feb 2026 10:47:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kN-0002hZ-IW; Wed, 11 Feb 2026 10:47:03 +0000 Received: by outflank-mailman (input) for mailman id 1227220; Wed, 11 Feb 2026 10:47:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kL-0002Tg-FQ for xen-devel@lists.xenproject.org; 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This is incorrect with Xen's usage, which does use '/' in assembly files as a mathematical operator. The behavior of the assembler can be altered by passing the --divide option; unconditionally pass this option when available to force the expected behavior. Reported-by: Jan Beulich Signed-off-by: Roger Pau Monné --- Changes since v1: - Guard option setting to x86 only. - Adjust comment. --- xen/Makefile | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/Makefile b/xen/Makefile index a054315fa4a2..4c83e2a46477 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -413,6 +413,13 @@ ifneq ($(CONFIG_CC_IS_CLANG),y) CFLAGS += -Wa,--strip-local-absolute endif +ifeq ($(CONFIG_X86),y) +# The GNU assembler will interpret '/' as a comment start marker instead of a +# divide for some ELF targets. Pass --divide when when available to signal '/' +# is always used as an operator in assembly. +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) +endif + $(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227221.1533557 (Exim 4.92) (envelope-from ) id 1vq7kO-0002kp-0A; Wed, 11 Feb 2026 10:47:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227221.1533557; Wed, 11 Feb 2026 10:47:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kN-0002kI-QF; Wed, 11 Feb 2026 10:47:03 +0000 Received: by outflank-mailman (input) for mailman id 1227221; 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From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , Stefano Stabellini , Bertrand Marquis Subject: [PATCH 2/5] xen/tools: remove usages of `stat -s` in check-endbr.sh Date: Wed, 11 Feb 2026 11:46:35 +0100 Message-ID: <20260211104638.7938-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260211104638.7938-1-roger.pau@citrix.com> References: <20260211104638.7938-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MA3P292CA0012.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:2c::16) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|CO1PR03MB7844:EE_ X-MS-Office365-Filtering-Correlation-Id: 972d5a60-4c94-4baa-c040-08de695ae153 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016; 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The first instance of `stat -s` can be removed by fetching the section size from the output of objdump itself, which the script already parses to get the VMA values. The other two instances can be replaced by counting the lines in the respective files. Those files contain list of addresses, so the size in bytes is not strictly needed, we can count the number of lines instead. Suggested-by: Bertrand Marquis Signed-off-by: Roger Pau Monné --- xen/tools/check-endbr.sh | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/xen/tools/check-endbr.sh b/xen/tools/check-endbr.sh index bf153a570db4..383d7e710a53 100755 --- a/xen/tools/check-endbr.sh +++ b/xen/tools/check-endbr.sh @@ -92,14 +92,15 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & # check nevertheless. # eval $(${OBJDUMP} -j .text $1 -h | - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN - -bin_sz=$(stat -c '%s' $TEXT_BIN) +# Convert objdump hex reported .text size to decimal +bin_sz=$(printf %u $bin_sz) [ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && { echo "$MSG_PFX Error: .text offsets must not exceed 256M" >&2; exit 1; } +${OBJCOPY} -j .text $1 -O binary $TEXT_BIN + # instruction: hex: oct: # endbr64 f3 0f 1e fa 363 017 036 372 # endbr32 f3 0f 1e fb 363 017 036 373 @@ -116,8 +117,8 @@ fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > wait # Sanity check $VALID and $ALL, in case the string parsing bitrots -val_sz=$(stat -c '%s' $VALID) -all_sz=$(stat -c '%s' $ALL) +val_sz=$(wc -l < $VALID) +all_sz=$(wc -l < $ALL) [ "$val_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty valid-addrs" >&2; exit 1; } [ "$all_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty all-addrs" >&2; exit 1; } [ "$all_sz" -lt "$val_sz" ] && { echo "$MSG_PFX Error: More valid-addrs than all-addrs" >&2; exit 1; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227219.1533540 (Exim 4.92) (envelope-from ) id 1vq7kL-0002Tt-AI; Wed, 11 Feb 2026 10:47:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227219.1533540; Wed, 11 Feb 2026 10:47:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kL-0002Tm-7E; Wed, 11 Feb 2026 10:47:01 +0000 Received: by outflank-mailman (input) for mailman id 1227219; Wed, 11 Feb 2026 10:47:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kK-0002Tg-0Z for xen-devel@lists.xenproject.org; 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Patches 4 and 5 introduce some Cirrus-CI testing to do cross-builds from macOS, plus it also introduces some basic smoke testing of the x86 builds using the XTF selftest, just like it's currently done for the FreeBSD builds. A result of the updated Cirrus-CI pipeline can be seen at: https://cirrus-ci.com/build/6723050642604032 Thanks, Roger. Roger Pau Monne (5): xen/x86: always consider '/' as a division in assembly xen/tools: remove usages of `stat -s` in check-endbr.sh xen/tools: fix grep reporting 'illegal byte sequence' in check-endbr.sh cirrus-ci: add x86 and arm64 macOS hypervisor builds cirrus-ci: add x86 XTF self-tests for macOS build .cirrus.yml | 51 ++++++++++++++++++++++++++++++++++------ xen/Makefile | 7 ++++++ xen/tools/check-endbr.sh | 18 +++++++------- 3 files changed, 61 insertions(+), 15 deletions(-) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227222.1533570 (Exim 4.92) (envelope-from ) id 1vq7kQ-00039a-6l; Wed, 11 Feb 2026 10:47:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227222.1533570; Wed, 11 Feb 2026 10:47:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq7kQ-00039R-3F; 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The binary encoding used by the grep matching pattern is not valid when processed as UTF-8. Switch the local to C just for the grep invocation to use the binary match pattern correctly. Suggested-by: Bertrand Marquis Signed-off-by: Roger Pau Monné --- xen/tools/check-endbr.sh | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/tools/check-endbr.sh b/xen/tools/check-endbr.sh index 383d7e710a53..0be9986dd356 100755 --- a/xen/tools/check-endbr.sh +++ b/xen/tools/check-endbr.sh @@ -109,8 +109,9 @@ if $perl_re then LC_ALL=C grep -aobP '\xf3\x0f\x1e(\xfa|\xfb)|\x66\x0f\x1f\x01' $TEXT_BIN else - grep -aob -e "$(printf '\363\17\36\372')" -e "$(printf '\363\17\36\373')" \ - -e "$(printf '\146\17\37\1')" $TEXT_BIN + LC_ALL=C grep -aob -e "$(printf '\363\17\36\372')" \ + -e "$(printf '\363\17\36\373')" \ + -e "$(printf '\146\17\37\1')" $TEXT_BIN fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > $ALL # Wait for $VALID to become complete -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227223.1533579 (Exim 4.92) (envelope-from ) id 1vq7kU-0003Sb-Hm; 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Those build the hypervisor using the elf cross-toolchain from Homebrew for both x86 and arm64. Signed-off-by: Roger Pau Monné --- I haven't added any randconfig jobs, we can consider adding those later on if the builds are stable. --- .cirrus.yml | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/.cirrus.yml b/.cirrus.yml index 7bbb4f1c5c6c..b9608e71cca7 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -1,3 +1,5 @@ +## FreeBSD Build Jobs + # https://cirrus-ci.org/guide/tips-and-tricks/#sharing-configuration-between-tasks freebsd_versions: &FREEBSD_VERSIONS env: @@ -122,7 +124,41 @@ task: path: xtf/tests/selftest/test-*-selftest type: application/octet-stream -# Test jobs +## macOS Build Jobs + +task: + name: 'macOS: hypervisor build' + + env: + matrix: + ARCH: x86_64 + ARCH: aarch64 + + alias: macos-$ARCH + macos_instance: + image: ghcr.io/cirruslabs/macos-runner:sonoma + + environment: + CIRRUS_CLONE_DEPTH: 1 + CIRRUS_LOG_TIMESTAMP: true + + install_script: + - brew install $ARCH-elf-gcc $ARCH-elf-binutils + + build_script: + - make -j`sysctl -n hw.ncpu` + XEN_TARGET_ARCH=`echo $ARCH | sed -e s/aarch64/arm64/` + CROSS_COMPILE=$ARCH-elf- HOSTCC=clang -C xen + + xen_artifacts: + path: xen/xen + type: application/octet-stream + + debug_artifacts: + path: xen/xen-syms + type: application/octet-stream + +## Test Jobs task: name: 'FreeBSD: XTF selftest' -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:47:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:47:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227224.1533590 (Exim 4.92) (envelope-from ) id 1vq7kW-0003l7-Px; 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Note this is only done for the x86 build, there's no ARM support in XTF yet. Signed-off-by: Roger Pau Monné --- .cirrus.yml | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index b9608e71cca7..839c25149c9e 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -161,18 +161,19 @@ task: ## Test Jobs task: - name: 'FreeBSD: XTF selftest' + name: 'XTF selftest' << : *FREEBSD_ENV_PRODUCTION env: matrix: - FREEBSD_BUILD: $FREEBSD_LEGACY - FREEBSD_BUILD: $FREEBSD_PRODUCTION - FREEBSD_BUILD: $FREEBSD_CURRENT + BUILD: freebsd_full_$FREEBSD_LEGACY + BUILD: freebsd_full_$FREEBSD_PRODUCTION + BUILD: freebsd_full_$FREEBSD_CURRENT + BUILD: macos-x86_64 depends_on: - - freebsd_full_$FREEBSD_BUILD + - $BUILD - xtf install_script: pkg install -y qemu-nox11 expect @@ -187,7 +188,7 @@ task: fetch_script: - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/xtf/xtf.zip - - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/freebsd_full_$FREEBSD_BUILD/xen.zip + - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/$BUILD/xen.zip - unzip xtf.zip - unzip xen.zip -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 10:50:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 10:50:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227264.1533599 (Exim 4.92) (envelope-from ) id 1vq7nn-0006mD-Az; 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Wed, 11 Feb 2026 02:50:32 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Frediano Ziglio Date: Wed, 11 Feb 2026 10:50:21 +0000 X-Gm-Features: AZwV_Qgy91sD4U9cLiSdy8Be5d7GI5E8O9x6cSh-4G0Y7QGpGDC56SPPwUcttPI Message-ID: Subject: Re: [PATCH livepatch-build-tools v2] Treat constant sections as string sections To: xen-devel Cc: Frediano Ziglio , Ross Lagerwall , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Konrad Rzeszutek Wilk Content-Type: text/plain; charset="UTF-8" On Tue, 13 Jan 2026 at 11:54, Frediano Ziglio wrote: > > On Tue, 18 Nov 2025 at 10:44, Frediano Ziglio wrote: > > > > > > Newer compiler can put some constant strings inside constant > > > > sections (.rodata.cstXX) instead of string sections (.rodata.str1.XX). > > > > This causes the produced live patch to not apply when such > > > > strings are produced. > > > > So treat the constant sections as string ones. > > > > > > > > Signed-off-by: Frediano Ziglio > > > > > > Reviewed-by: Ross Lagerwall > > > > > > Thanks, > > > Ross > > > > Hi, > > any update on this change? Could it be merged? > > > > Any update? > This is the third time I ping this patch. Can somebody at least give me a reason why this is still pending? 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Wed, 11 Feb 2026 03:11:33 -0800 (PST) Message-ID: <124efc9a-b4f2-451f-8354-29ee78ac5bd5@suse.com> Date: Wed, 11 Feb 2026 12:11:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] xen/x86: always consider '/' as a division in assembly To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260211104638.7938-1-roger.pau@citrix.com> <20260211104638.7938-2-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260211104638.7938-2-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 11:46, Roger Pau Monne wrote: > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -413,6 +413,13 @@ ifneq ($(CONFIG_CC_IS_CLANG),y) > CFLAGS += -Wa,--strip-local-absolute > endif > > +ifeq ($(CONFIG_X86),y) > +# The GNU assembler will interpret '/' as a comment start marker instead of a > +# divide for some ELF targets. Pass --divide when when available to signal '/' > +# is always used as an operator in assembly. > +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) > +endif As said before, I don't think this should be put here. Not even with the new ifeq(,) around it. It should go in x86/arch.mk, or a reason should be given why it can't. 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Pass --divide when when available to signal '/' > > +# is always used as an operator in assembly. > > +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) > > +endif > > As said before, I don't think this should be put here. Not even with the > new ifeq(,) around it. It should go in x86/arch.mk, or a reason should be > given why it can't. My bad. I've attempted to put it there but got complains from the build in x86/boot/. I think that was because I had leftover stale objects in there, and nothing do to with the patch itself. I can confirm it works when the chunk is placed in x86/arch.mk. Thanks, Roger. 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Wed, 11 Feb 2026 03:41:00 -0800 (PST) Message-ID: <35bdb10b-d39d-4e67-9ed8-c0b85ca5bd54@suse.com> Date: Wed, 11 Feb 2026 12:40:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] xen/tools: remove usages of `stat -s` in check-endbr.sh To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , xen-devel@lists.xenproject.org References: <20260211104638.7938-1-roger.pau@citrix.com> <20260211104638.7938-3-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260211104638.7938-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.02.2026 11:46, Roger Pau Monne wrote: > The `-s` option to stat is not POSIX compatible, and hence prevents the > check-endbr.sh script from running reliably. > > The first instance of `stat -s` can be removed by fetching the section size > from the output of objdump itself, which the script already parses to get > the VMA values. In both paragraphs, s/-s/-c/ ? > The other two instances can be replaced by counting the lines in the > respective files. Those files contain list of addresses, so the size in > bytes is not strictly needed, we can count the number of lines instead. Hmm, indeed, just that ... > --- a/xen/tools/check-endbr.sh > +++ b/xen/tools/check-endbr.sh > @@ -92,14 +92,15 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & > # check nevertheless. > # > eval $(${OBJDUMP} -j .text $1 -h | > - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') > + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') > > -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN > - > -bin_sz=$(stat -c '%s' $TEXT_BIN) > +# Convert objdump hex reported .text size to decimal > +bin_sz=$(printf %u $bin_sz) (Alternatively without this line, but ... > [ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && [ "$(($bin_sz))" -ge $(((1 << 28) - $vma_lo)) ] && ?) > { echo "$MSG_PFX Error: .text offsets must not exceed 256M" >&2; exit 1; } > > +${OBJCOPY} -j .text $1 -O binary $TEXT_BIN > + > # instruction: hex: oct: > # endbr64 f3 0f 1e fa 363 017 036 372 > # endbr32 f3 0f 1e fb 363 017 036 373 > @@ -116,8 +117,8 @@ fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > > wait > > # Sanity check $VALID and $ALL, in case the string parsing bitrots > -val_sz=$(stat -c '%s' $VALID) > -all_sz=$(stat -c '%s' $ALL) > +val_sz=$(wc -l < $VALID) > +all_sz=$(wc -l < $ALL) > [ "$val_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty valid-addrs" >&2; exit 1; } > [ "$all_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty all-addrs" >&2; exit 1; } > [ "$all_sz" -lt "$val_sz" ] && { echo "$MSG_PFX Error: More valid-addrs than all-addrs" >&2; exit 1; } ... the variables' _sz suffixes then end up a little misleading. Not sure in how far we care. Perhaps not enough to warrant the bigger churn: Reviewed-by: Jan Beulich (with the description adjustment). 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=?utf-8?B?STYyM2c4b01MMlhZOWlmQjJWRmQ3Y2JZenpGc2dRNDdiaFpQMFJrelpYcVNH?= =?utf-8?B?dXBENnZyRlJDbDNOVFJRSTZUZzNWN2xPUldGUFBXS3ZObU53Vjc1bXdUY2ox?= =?utf-8?B?cVVWRVBacGh0OVJIOE16MmhVTk5RRWZPM1hrUjBxY3RCaTBmVmNsZz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: bd188171-c044-4916-76a4-08de6968782c X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 12:24:14.8585 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: a6MYDfg9Qt1jGDdOjirUgY99x/ZB6N6u7t5vxmGrikx8G416PJl1rgBarPEqINaOZLQ29BesJHehMy1+s1jPWw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR03MB7166 On Wed, Feb 11, 2026 at 12:40:58PM +0100, Jan Beulich wrote: > On 11.02.2026 11:46, Roger Pau Monne wrote: > > The `-s` option to stat is not POSIX compatible, and hence prevents the > > check-endbr.sh script from running reliably. > > > > The first instance of `stat -s` can be removed by fetching the section size > > from the output of objdump itself, which the script already parses to get > > the VMA values. > > In both paragraphs, s/-s/-c/ ? Bah, yes. > > The other two instances can be replaced by counting the lines in the > > respective files. Those files contain list of addresses, so the size in > > bytes is not strictly needed, we can count the number of lines instead. > > Hmm, indeed, just that ... > > > --- a/xen/tools/check-endbr.sh > > +++ b/xen/tools/check-endbr.sh > > @@ -92,14 +92,15 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & > > # check nevertheless. > > # > > eval $(${OBJDUMP} -j .text $1 -h | > > - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') > > + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') > > > > -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN > > - > > -bin_sz=$(stat -c '%s' $TEXT_BIN) > > +# Convert objdump hex reported .text size to decimal > > +bin_sz=$(printf %u $bin_sz) > > (Alternatively without this line, but ... > > > [ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && > > [ "$(($bin_sz))" -ge $(((1 << 28) - $vma_lo)) ] && > > ?) Isn't that bash-specific functionality? The script interpreter is set as /bin/sh. > > { echo "$MSG_PFX Error: .text offsets must not exceed 256M" >&2; exit 1; } > > > > +${OBJCOPY} -j .text $1 -O binary $TEXT_BIN > > + > > # instruction: hex: oct: > > # endbr64 f3 0f 1e fa 363 017 036 372 > > # endbr32 f3 0f 1e fb 363 017 036 373 > > @@ -116,8 +117,8 @@ fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > > > wait > > > > # Sanity check $VALID and $ALL, in case the string parsing bitrots > > -val_sz=$(stat -c '%s' $VALID) > > -all_sz=$(stat -c '%s' $ALL) > > +val_sz=$(wc -l < $VALID) > > +all_sz=$(wc -l < $ALL) > > [ "$val_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty valid-addrs" >&2; exit 1; } > > [ "$all_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty all-addrs" >&2; exit 1; } > > [ "$all_sz" -lt "$val_sz" ] && { echo "$MSG_PFX Error: More valid-addrs than all-addrs" >&2; exit 1; } > > ... the variables' _sz suffixes then end up a little misleading. Not sure > in how far we care. Perhaps not enough to warrant the bigger churn: > Reviewed-by: Jan Beulich > (with the description adjustment). I could rename to _lines or some such, but I didn't see much benefit. If you don't have a strong opinion towards renaming I will leave as-is. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227445.1533831 (Exim 4.92) (envelope-from ) id 1vq9MN-0001nx-En; Wed, 11 Feb 2026 12:30:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227445.1533831; Wed, 11 Feb 2026 12:30:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9MN-0001nq-C2; Wed, 11 Feb 2026 12:30:23 +0000 Received: by outflank-mailman (input) for mailman id 1227445; Wed, 11 Feb 2026 12:30:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9ML-0001nh-QF for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:30:21 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6ca6f490-0745-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 13:30:19 +0100 (CET) Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-373-31_9MFcgNwi-1OT-_RHVTg-1; Wed, 11 Feb 2026 07:30:14 -0500 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 6D5361800366; Wed, 11 Feb 2026 12:30:12 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id C076619560A3; Wed, 11 Feb 2026 12:30:10 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6ca6f490-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813018; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=kzn58S0lNfEjMqYO60adMvk7cCAhn0+RWpF0wuFs9kY=; b=H2FBtrXvoCOE51RxyId7/cIHCABPgYz8p6+CH54f6Ks8ZTfORimwjYST4vhn+FbfaDTOtA M+tYzdLSzhOEeml+ERTRbVtkRSQAxauJmPJd1CjxnxQaHm6d7GplyGMufWYrwhPIA/MCEv ZLugnt/BKiatdK9pn429+qixr+3RzRU= X-MC-Unique: 31_9MFcgNwi-1OT-_RHVTg-1 X-Mimecast-MFC-AGG-ID: 31_9MFcgNwi-1OT-_RHVTg_1770813013 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant Subject: [PULL 00/14] Char patches Date: Wed, 11 Feb 2026 16:29:47 +0400 Message-ID: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: j0U4zGGTPhwc0D8JHgOUYas0o2a1c6YcOeAOtEfDIzI_1770813013 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit From: Marc-André Lureau The following changes since commit 0b91040d23dc8820724a60c811223b777f3bc6b7: Merge tag 'pull-loongarch-20260210' of https://github.com/gaosong715/qemu into staging (2026-02-10 09:12:38 +0000) are available in the Git repository at: https://gitlab.com/marcandre.lureau/qemu.git tags/char-pull-request for you to fetch changes up to 72913e8b8ef10071965d43349516d0e7f19a959d: chardev: add logtimestamp option (2026-02-11 16:27:18 +0400) ---------------------------------------------------------------- chardev patches ---------------------------------------------------------------- Eric K (1): char-udp: Fix initial backend open status Vladimir Sementsov-Ogievskiy (13): ui/spice: Require spice-server >= 0.15.0 ui/spice: drop SPICE_HAS_ATTACHED_WORKER macro chardev: ChardevClass: consistent naming for handlers chardev: consistent naming for ChardevClass handlers implementations chardev: .chr_open(): drop be_opened parameter chardev: .chr_open(): add boolean return value chardev/char-pty: store pty_name into PtyChardev state chardev: introduce .chr_get_pty_name() handler chardev: rework filename handling chardev/char: qemu_char_open(): add return value char: qemu_chr_write_log() use qemu_write_full() error-report: make real_time_iso8601() public chardev: add logtimestamp option meson.build | 2 +- qapi/char.json | 6 +- include/chardev/char.h | 23 ++- include/qemu/error-report.h | 6 + include/ui/qemu-spice.h | 6 - chardev/baum.c | 12 +- chardev/char-console.c | 10 +- chardev/char-fe.c | 8 +- chardev/char-file.c | 26 ++-- chardev/char-hub.c | 27 ++-- chardev/char-mux.c | 30 ++-- chardev/char-null.c | 9 +- chardev/char-parallel.c | 41 +++--- chardev/char-pipe.c | 30 ++-- chardev/char-pty.c | 56 ++++--- chardev/char-ringbuf.c | 20 +-- chardev/char-serial.c | 39 ++--- chardev/char-socket.c | 73 ++++------ chardev/char-stdio.c | 30 ++-- chardev/char-udp.c | 18 +-- chardev/char-win-stdio.c | 25 ++-- chardev/char.c | 137 ++++++++++++------ chardev/msmouse.c | 13 +- chardev/spice.c | 52 +++---- chardev/wctablet.c | 10 +- gdbstub/system.c | 12 +- hw/char/xen_console.c | 7 +- hw/display/qxl.c | 23 +-- hw/misc/ivshmem-pci.c | 7 +- tests/unit/test-char.c | 2 + ui/console-vc.c | 12 +- ui/dbus-chardev.c | 16 +- ui/dbus.c | 4 +- ui/gtk.c | 14 +- ui/spice-app.c | 18 +-- ui/spice-display.c | 19 +-- ui/vdagent.c | 17 +-- util/error-report.c | 3 +- .../codeconverter/test_regexps.py | 2 +- 39 files changed, 437 insertions(+), 428 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227446.1533842 (Exim 4.92) (envelope-from ) id 1vq9MR-00022F-Kw; Wed, 11 Feb 2026 12:30:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227446.1533842; Wed, 11 Feb 2026 12:30:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9MR-000228-IG; Wed, 11 Feb 2026 12:30:27 +0000 Received: by outflank-mailman (input) for mailman id 1227446; Wed, 11 Feb 2026 12:30:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9MP-0001nh-QF for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:30:25 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7024e63f-0745-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 13:30:25 +0100 (CET) Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-65-AMhWbVJWNvKZZaJjRa3M1w-1; Wed, 11 Feb 2026 07:30:20 -0500 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 54D9918003FC; Wed, 11 Feb 2026 12:30:18 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id A0C611956056; Wed, 11 Feb 2026 12:30:16 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7024e63f-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813023; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LGj9xk/Pm83KB03G6LVj5ElLZzoxkSGN+CQtNgApbDQ=; b=NTzxXaF/dqhF7rO7lTRBGTdc9cQth5htbc9b25uTkkiVJhpeTL2nTW2KZzjv1IIThXuK25 Djcmaosh72zv+ctf47a+xu8CDYy2OGhB9eid5ybLygVDPWN+CyBLDho531zQVSludb7s+Z 78UxVU6uBZ/rGb8/iuq4aFHezlSYjy4= X-MC-Unique: AMhWbVJWNvKZZaJjRa3M1w-1 X-Mimecast-MFC-AGG-ID: AMhWbVJWNvKZZaJjRa3M1w_1770813018 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Eric K Subject: [PULL 01/14] char-udp: Fix initial backend open status Date: Wed, 11 Feb 2026 16:29:48 +0400 Message-ID: <20260211123007.3569932-2-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: rQbXHHOJa2k9xHdIpfE5LbVHQ99WRIDPJ52gohL9nHo_1770813018 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Eric K This patch removes the `*be_opened = false` override for the UDP chardev backend. Since UDP is connectionless it never sends a `CHR_EVENT_OPENED` so it is never marked open. This causes some frontends (e.g. virtio-serial) to never perform any operations on the socket. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2993 Signed-off-by: Eric K Reviewed-by: Marc-André Lureau Message-Id: <20251208225849.705554-1-erickra@cs.utexas.edu> --- chardev/char-udp.c | 2 -- tests/unit/test-char.c | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 572fab0ad13..1025f577a0d 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -215,8 +215,6 @@ static void qmp_chardev_open_udp(Chardev *chr, g_free(name); s->ioc = QIO_CHANNEL(sioc); - /* be isn't opened until we get a connection */ - *be_opened = false; } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/tests/unit/test-char.c b/tests/unit/test-char.c index 8a98e42cad0..2869c4e09df 100644 --- a/tests/unit/test-char.c +++ b/tests/unit/test-char.c @@ -1012,6 +1012,8 @@ static void char_udp_test_internal(Chardev *reuse_chr, int sock) qemu_chr_fe_init(fe, chr, &error_abort); } + g_assert(chr->be_open); + d.chr = chr; qemu_chr_fe_set_handlers(fe, socket_can_read_hello, socket_read_hello, NULL, NULL, &d, NULL, true); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227447.1533852 (Exim 4.92) (envelope-from ) id 1vq9MU-0002Ib-T8; Wed, 11 Feb 2026 12:30:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227447.1533852; Wed, 11 Feb 2026 12:30:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9MU-0002IL-PM; Wed, 11 Feb 2026 12:30:30 +0000 Received: by outflank-mailman (input) for mailman id 1227447; Wed, 11 Feb 2026 12:30:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9MT-0001nh-Kb for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:30:29 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 721b9526-0745-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 13:30:28 +0100 (CET) Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-372-KX-bclq4MP2GmkzEZbJ6MA-1; Wed, 11 Feb 2026 07:30:25 -0500 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id C3A5D180025C; Wed, 11 Feb 2026 12:30:23 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 4D1A3180066F; Wed, 11 Feb 2026 12:30:21 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 721b9526-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813027; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cGBq4qMkI/q12TmIhq+tbmp2Snz+Rz/20mUay39k8ag=; b=FHRdi0ClHZ5J9lxznEJoELYW/3/R3fJlQzdKwCiQyQm253TS1bCuWG6gRA1vkxspbg9lce IIcGyIc8jIQSuhvpuVLNzVe0UcCZBEAiJU01S63h9JFL7a3/jexGU2LFGqBv3TUFMs0nID RYJJOwuWZCZqYB2cGFgBOp2I0p/mwMQ= X-MC-Unique: KX-bclq4MP2GmkzEZbJ6MA-1 X-Mimecast-MFC-AGG-ID: KX-bclq4MP2GmkzEZbJ6MA_1770813024 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 02/14] ui/spice: Require spice-server >= 0.15.0 Date: Wed, 11 Feb 2026 16:29:49 +0400 Message-ID: <20260211123007.3569932-3-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: VoCalRhe8zsb_DYcXXzNBMoSURMpIyTnQ_Lqv3Pf_68_1770813024 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy For major distributions we have now: Debian 13: 0.15.2 Ubuntu 22.04: 0.15.0 RHEL-9/CentOS Stream 9: SPICE is removed Fedora 42: 0.15.1 OpenSUSE Leap 15.4: 0.15.0 Time to update the dependancy in QEMU and drop almost all SPICE_SERVER_VERSION checks. Suggested-by: Marc-André Lureau Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-2-vsementsov@yandex-team.ru> --- meson.build | 2 +- include/ui/qemu-spice.h | 4 ---- chardev/spice.c | 6 ------ hw/display/qxl.c | 11 ++--------- ui/spice-display.c | 8 ++------ 5 files changed, 5 insertions(+), 26 deletions(-) diff --git a/meson.build b/meson.build index 2d114e90184..9c12e0db601 100644 --- a/meson.build +++ b/meson.build @@ -1320,7 +1320,7 @@ if get_option('spice') \ .require(pixman.found(), error_message: 'cannot enable SPICE if pixman is not available') \ .allowed() - spice = dependency('spice-server', version: '>=0.14.0', + spice = dependency('spice-server', version: '>=0.15.0', required: get_option('spice'), method: 'pkg-config') endif diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h index b7d493742c4..8e5e6b2a744 100644 --- a/include/ui/qemu-spice.h +++ b/include/ui/qemu-spice.h @@ -34,11 +34,7 @@ int qemu_spice_add_display_interface(QXLInstance *qxlin, QemuConsole *con); int qemu_spice_migrate_info(const char *hostname, int port, int tls_port, const char *subject); -#if SPICE_SERVER_VERSION >= 0x000f00 /* release 0.15.0 */ #define SPICE_HAS_ATTACHED_WORKER 1 -#else -#define SPICE_HAS_ATTACHED_WORKER 0 -#endif #else /* CONFIG_SPICE */ diff --git a/chardev/spice.c b/chardev/spice.c index db53b49da26..39b79d60fb4 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -278,12 +278,6 @@ static void qemu_chr_open_spice_vmc(Chardev *chr, } *be_opened = false; -#if SPICE_SERVER_VERSION < 0x000e02 - /* Spice < 0.14.2 doesn't explicitly open smartcard chardev */ - if (strcmp(type, "smartcard") == 0) { - *be_opened = true; - } -#endif chr_open(chr, type); } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index f29b736722c..fbba02113f7 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -261,11 +261,6 @@ static void qxl_spice_monitors_config_async(PCIQXLDevice *qxl, int replay) QXL_COOKIE_TYPE_POST_LOAD_MONITORS_CONFIG, 0)); } else { -#if SPICE_SERVER_VERSION < 0x000e02 /* release 0.14.2 */ - if (qxl->max_outputs) { - spice_qxl_set_max_monitors(&qxl->ssd.qxl, qxl->max_outputs); - } -#endif qxl->guest_monitors_config = qxl->ram->monitors_config; spice_qxl_monitors_config_async(&qxl->ssd.qxl, qxl->ram->monitors_config, @@ -2109,6 +2104,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) uint8_t* config = qxl->pci.config; uint32_t pci_device_rev; uint32_t io_size; + Error *err = NULL; + char device_address[256] = ""; qemu_spice_display_init_common(&qxl->ssd); qxl->mode = QXL_MODE_UNDEFINED; @@ -2208,9 +2205,6 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) return; } -#if SPICE_SERVER_VERSION >= 0x000e02 /* release 0.14.2 */ - Error *err = NULL; - char device_address[256] = ""; if (qemu_console_fill_device_address(qxl->vga.con, device_address, sizeof(device_address), &err)) { @@ -2221,7 +2215,6 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) } else { error_report_err(err); } -#endif qemu_add_vm_change_state_handler(qxl_vm_change_state_handler, qxl); diff --git a/ui/spice-display.c b/ui/spice-display.c index db71e866f89..f2304bb0ce2 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -689,13 +689,11 @@ static int interface_client_monitors_config(QXLInstance *sin, if (mc->num_of_monitors > head) { info.width = mc->monitors[head].width; info.height = mc->monitors[head].height; -#if SPICE_SERVER_VERSION >= 0x000e04 /* release 0.14.4 */ if (mc->flags & VD_AGENT_CONFIG_MONITORS_FLAG_PHYSICAL_SIZE) { VDAgentMonitorMM *mm = (void *)&mc->monitors[mc->num_of_monitors]; info.width_mm = mm[head].width; info.height_mm = mm[head].height; } -#endif } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); @@ -1393,6 +1391,8 @@ static const DisplayGLCtxOps gl_ctx_ops = { static void qemu_spice_display_init_one(QemuConsole *con) { SimpleSpiceDisplay *ssd = g_new0(SimpleSpiceDisplay, 1); + Error *err = NULL; + char device_address[256] = ""; qemu_spice_display_init_common(ssd); @@ -1414,9 +1414,6 @@ static void qemu_spice_display_init_one(QemuConsole *con) ssd->qxl.base.sif = &dpy_interface.base; qemu_spice_add_display_interface(&ssd->qxl, con); -#if SPICE_SERVER_VERSION >= 0x000e02 /* release 0.14.2 */ - Error *err = NULL; - char device_address[256] = ""; if (qemu_console_fill_device_address(con, device_address, 256, &err)) { spice_qxl_set_device_info(&ssd->qxl, device_address, @@ -1425,7 +1422,6 @@ static void qemu_spice_display_init_one(QemuConsole *con) } else { error_report_err(err); } -#endif qemu_spice_create_host_memslot(ssd); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227451.1533862 (Exim 4.92) (envelope-from ) id 1vq9Md-0002gf-C8; Wed, 11 Feb 2026 12:30:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227451.1533862; Wed, 11 Feb 2026 12:30:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Md-0002gX-8R; Wed, 11 Feb 2026 12:30:39 +0000 Received: by outflank-mailman (input) for mailman id 1227451; Wed, 11 Feb 2026 12:30:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Mb-00016c-U3 for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 12:30:27 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 76b4253e-0745-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813034; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=y3G7pz3JVMFqRvpJ05R+kBwpJ0ObSQg4ak0FyKLiTE8=; b=VvDhOnybq1ZVO7LCm/vinOPqPmTxt6NdMM58lr/hzBR8YzbXk1ikiUKtkbYGS7A09Deo66 gkzek2z33VU0y1uKu9+a+8Jj//hNylZxdB1V4KnxCBNMnLBNG3n4Vn1yADBSK0hx7rS2RC JqgpBUniIz8QCcaLM7Z7M0FZPQ8Iju4= X-MC-Unique: CFV2PrjpPRWNUIY43HdbbQ-1 X-Mimecast-MFC-AGG-ID: CFV2PrjpPRWNUIY43HdbbQ_1770813030 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 03/14] ui/spice: drop SPICE_HAS_ATTACHED_WORKER macro Date: Wed, 11 Feb 2026 16:29:50 +0400 Message-ID: <20260211123007.3569932-4-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: -q37x9RyfgxChA-RHDLxik9_cW0YOs0SZRY4Sl8UhGs_1770813030 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Since previous commit it is always 1. Let's just drop it. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-3-vsementsov@yandex-team.ru> --- include/ui/qemu-spice.h | 2 -- hw/display/qxl.c | 12 ------------ ui/spice-display.c | 11 ----------- 3 files changed, 25 deletions(-) diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h index 8e5e6b2a744..111a09ceca3 100644 --- a/include/ui/qemu-spice.h +++ b/include/ui/qemu-spice.h @@ -34,8 +34,6 @@ int qemu_spice_add_display_interface(QXLInstance *qxlin, QemuConsole *con); int qemu_spice_migrate_info(const char *hostname, int port, int tls_port, const char *subject); -#define SPICE_HAS_ATTACHED_WORKER 1 - #else /* CONFIG_SPICE */ #include "qemu/error-report.h" diff --git a/hw/display/qxl.c b/hw/display/qxl.c index fbba02113f7..0551b38230b 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -530,13 +530,6 @@ static void interface_attached_worker(QXLInstance *sin) trace_qxl_interface_attach_worker(qxl->id); } -#if !(SPICE_HAS_ATTACHED_WORKER) -static void interface_attach_worker(QXLInstance *sin, QXLWorker *qxl_worker) -{ - interface_attached_worker(sin); -} -#endif - static void interface_set_compression_level(QXLInstance *sin, int level) { PCIQXLDevice *qxl = container_of(sin, PCIQXLDevice, ssd.qxl); @@ -1131,12 +1124,7 @@ static const QXLInterface qxl_interface = { .base.major_version = SPICE_INTERFACE_QXL_MAJOR, .base.minor_version = SPICE_INTERFACE_QXL_MINOR, -#if SPICE_HAS_ATTACHED_WORKER .attached_worker = interface_attached_worker, -#else - .attache_worker = interface_attach_worker, -#endif - .set_compression_level = interface_set_compression_level, .get_init_info = interface_get_init_info, diff --git a/ui/spice-display.c b/ui/spice-display.c index f2304bb0ce2..28399f8a817 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -507,17 +507,10 @@ void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) /* spice display interface callbacks */ -#if SPICE_HAS_ATTACHED_WORKER static void interface_attached_worker(QXLInstance *sin) { /* nothing to do */ } -#else -static void interface_attach_worker(QXLInstance *sin, QXLWorker *qxl_worker) -{ - /* nothing to do */ -} -#endif static void interface_set_compression_level(QXLInstance *sin, int level) { @@ -707,11 +700,7 @@ static const QXLInterface dpy_interface = { .base.major_version = SPICE_INTERFACE_QXL_MAJOR, .base.minor_version = SPICE_INTERFACE_QXL_MINOR, -#if SPICE_HAS_ATTACHED_WORKER .attached_worker = interface_attached_worker, -#else - .attache_worker = interface_attach_worker, -#endif .set_compression_level = interface_set_compression_level, .get_init_info = interface_get_init_info, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227458.1533872 (Exim 4.92) (envelope-from ) id 1vq9Mk-0003DU-Lp; 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Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 04/14] chardev: ChardevClass: consistent naming for handlers Date: Wed, 11 Feb 2026 16:29:51 +0400 Message-ID: <20260211123007.3569932-5-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: y2z_rBTN_of1Yo9f7bEablhaXyvOchsCj89_W0_kFBo_1770813037 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Most handlers have name prefixed with "chr_". That's a good practice which helps to grep them. Convert the rest: .parse, .open, get/set_msgfds. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-4-vsementsov@yandex-team.ru> --- include/chardev/char.h | 8 ++++---- chardev/baum.c | 2 +- chardev/char-console.c | 2 +- chardev/char-fe.c | 8 ++++---- chardev/char-file.c | 4 ++-- chardev/char-hub.c | 4 ++-- chardev/char-mux.c | 4 ++-- chardev/char-null.c | 2 +- chardev/char-parallel.c | 4 ++-- chardev/char-pipe.c | 4 ++-- chardev/char-pty.c | 4 ++-- chardev/char-ringbuf.c | 4 ++-- chardev/char-serial.c | 4 ++-- chardev/char-socket.c | 8 ++++---- chardev/char-stdio.c | 4 ++-- chardev/char-udp.c | 4 ++-- chardev/char-win-stdio.c | 2 +- chardev/char.c | 8 ++++---- chardev/msmouse.c | 2 +- chardev/spice.c | 8 ++++---- chardev/wctablet.c | 2 +- gdbstub/system.c | 2 +- ui/console-vc.c | 4 ++-- ui/dbus-chardev.c | 8 ++++---- ui/dbus.c | 4 ++-- ui/gtk.c | 2 +- ui/spice-app.c | 6 +++--- ui/vdagent.c | 4 ++-- scripts/codeconverter/codeconverter/test_regexps.py | 2 +- 29 files changed, 62 insertions(+), 62 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index 192cad67d41..d33833b6c02 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -257,10 +257,10 @@ struct ChardevClass { bool supports_yank; /* parse command line options and populate QAPI @backend */ - void (*parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); + void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*open)(Chardev *chr, ChardevBackend *backend, + void (*chr_open)(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp); /* write buf to the backend */ @@ -282,10 +282,10 @@ struct ChardevClass { int (*chr_ioctl)(Chardev *s, int cmd, void *arg); /* get ancillary-received fds during last read */ - int (*get_msgfds)(Chardev *s, int* fds, int num); + int (*chr_get_msgfds)(Chardev *s, int* fds, int num); /* set ancillary fds to be sent with next write */ - int (*set_msgfds)(Chardev *s, int *fds, int num); + int (*chr_set_msgfds)(Chardev *s, int *fds, int num); /* accept the given fd */ int (*chr_add_client)(Chardev *chr, int fd); diff --git a/chardev/baum.c b/chardev/baum.c index 157f8b95195..75e41965c11 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -676,7 +676,7 @@ static void char_braille_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = baum_chr_open; + cc->chr_open = baum_chr_open; cc->chr_write = baum_chr_write; cc->chr_accept_input = baum_chr_accept_input; } diff --git a/chardev/char-console.c b/chardev/char-console.c index 7e1bf642ebd..9a2e012d53f 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -38,7 +38,7 @@ static void char_console_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = qemu_chr_open_win_con; + cc->chr_open = qemu_chr_open_win_con; } static const TypeInfo char_console_type_info = { diff --git a/chardev/char-fe.c b/chardev/char-fe.c index 34b83fc1c4a..a44f2673731 100644 --- a/chardev/char-fe.c +++ b/chardev/char-fe.c @@ -130,8 +130,8 @@ int qemu_chr_fe_get_msgfds(CharFrontend *c, int *fds, int len) return -1; } - return CHARDEV_GET_CLASS(s)->get_msgfds ? - CHARDEV_GET_CLASS(s)->get_msgfds(s, fds, len) : -1; + return CHARDEV_GET_CLASS(s)->chr_get_msgfds ? + CHARDEV_GET_CLASS(s)->chr_get_msgfds(s, fds, len) : -1; } int qemu_chr_fe_set_msgfds(CharFrontend *c, int *fds, int num) @@ -142,8 +142,8 @@ int qemu_chr_fe_set_msgfds(CharFrontend *c, int *fds, int num) return -1; } - return CHARDEV_GET_CLASS(s)->set_msgfds ? - CHARDEV_GET_CLASS(s)->set_msgfds(s, fds, num) : -1; + return CHARDEV_GET_CLASS(s)->chr_set_msgfds ? + CHARDEV_GET_CLASS(s)->chr_set_msgfds(s, fds, num) : -1; } void qemu_chr_fe_accept_input(CharFrontend *c) diff --git a/chardev/char-file.c b/chardev/char-file.c index 1f7adf592ff..1e293e7054a 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -133,8 +133,8 @@ static void char_file_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_file_out; - cc->open = qmp_chardev_open_file; + cc->chr_parse = qemu_chr_parse_file_out; + cc->chr_open = qmp_chardev_open_file; } static const TypeInfo char_file_type_info = { diff --git a/chardev/char-hub.c b/chardev/char-hub.c index d0967c22336..082baa84ab8 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -276,8 +276,8 @@ static void char_hub_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_hub; - cc->open = qemu_chr_open_hub; + cc->chr_parse = qemu_chr_parse_hub; + cc->chr_open = qemu_chr_open_hub; cc->chr_write = hub_chr_write; cc->chr_add_watch = hub_chr_add_watch; /* We handle events from backends only */ diff --git a/chardev/char-mux.c b/chardev/char-mux.c index db9e89f441d..c82c2da56dd 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -451,8 +451,8 @@ static void char_mux_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_mux; - cc->open = qemu_chr_open_mux; + cc->chr_parse = qemu_chr_parse_mux; + cc->chr_open = qemu_chr_open_mux; cc->chr_write = mux_chr_write; cc->chr_accept_input = mux_chr_accept_input; cc->chr_add_watch = mux_chr_add_watch; diff --git a/chardev/char-null.c b/chardev/char-null.c index 89cb85da792..674603b3807 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -38,7 +38,7 @@ static void char_null_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = null_chr_open; + cc->chr_open = null_chr_open; } static const TypeInfo char_null_type_info = { diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 62a44b2f969..a0839b784b8 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -274,8 +274,8 @@ static void char_parallel_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_parallel; - cc->open = qmp_chardev_open_parallel; + cc->chr_parse = qemu_chr_parse_parallel; + cc->chr_open = qmp_chardev_open_parallel; cc->chr_ioctl = pp_ioctl; } diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index e9f3bb82904..a2cd322efe6 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -182,8 +182,8 @@ static void char_pipe_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_pipe; - cc->open = qemu_chr_open_pipe; + cc->chr_parse = qemu_chr_parse_pipe; + cc->chr_open = qemu_chr_open_pipe; } static const TypeInfo char_pipe_type_info = { diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 652b0bd9e73..1a15082b025 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -394,8 +394,8 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = char_pty_parse; - cc->open = char_pty_open; + cc->chr_parse = char_pty_parse; + cc->chr_open = char_pty_open; cc->chr_write = char_pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 98aadb6acfb..6d5ba667bb4 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -227,8 +227,8 @@ static void char_ringbuf_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_ringbuf; - cc->open = qemu_chr_open_ringbuf; + cc->chr_parse = qemu_chr_parse_ringbuf; + cc->chr_open = qemu_chr_open_ringbuf; cc->chr_write = ringbuf_chr_write; } diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 4c6ca713eb1..97ed7adf736 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -305,8 +305,8 @@ static void char_serial_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_serial; - cc->open = qmp_chardev_open_serial; + cc->chr_parse = qemu_chr_parse_serial; + cc->chr_open = qmp_chardev_open_serial; #ifndef _WIN32 cc->chr_ioctl = tty_serial_ioctl; #endif diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 3f45dd2ecdc..149a6d8cc15 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1585,14 +1585,14 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->supports_yank = true; - cc->parse = qemu_chr_parse_socket; - cc->open = qmp_chardev_open_socket; + cc->chr_parse = qemu_chr_parse_socket; + cc->chr_open = qmp_chardev_open_socket; cc->chr_wait_connected = tcp_chr_wait_connected; cc->chr_write = tcp_chr_write; cc->chr_sync_read = tcp_chr_sync_read; cc->chr_disconnect = tcp_chr_disconnect; - cc->get_msgfds = tcp_get_msgfds; - cc->set_msgfds = tcp_set_msgfds; + cc->chr_get_msgfds = tcp_get_msgfds; + cc->chr_set_msgfds = tcp_set_msgfds; cc->chr_add_client = tcp_chr_add_client; cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index 2568164a108..b7e9af1388f 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -142,9 +142,9 @@ static void char_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_stdio; + cc->chr_parse = qemu_chr_parse_stdio; #ifndef _WIN32 - cc->open = qemu_chr_open_stdio; + cc->chr_open = qemu_chr_open_stdio; cc->chr_set_echo = qemu_chr_set_echo_stdio; #endif } diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 1025f577a0d..71b8d8b37df 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -221,8 +221,8 @@ static void char_udp_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_udp; - cc->open = qmp_chardev_open_udp; + cc->chr_parse = qemu_chr_parse_udp; + cc->chr_open = qmp_chardev_open_udp; cc->chr_write = udp_chr_write; cc->chr_update_read_handler = udp_chr_update_read_handler; } diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index fb802a00b13..26e67aef1ca 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -260,7 +260,7 @@ static void char_win_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = qemu_chr_open_stdio; + cc->chr_open = qemu_chr_open_stdio; cc->chr_write = win_stdio_write; cc->chr_set_echo = qemu_chr_set_echo_win_stdio; } diff --git a/chardev/char.c b/chardev/char.c index 3e432195a5a..df37d1df161 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -267,8 +267,8 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, } } - if (cc->open) { - cc->open(chr, backend, be_opened, errp); + if (cc->chr_open) { + cc->chr_open(chr, backend, be_opened, errp); } } @@ -604,8 +604,8 @@ ChardevBackend *qemu_chr_parse_opts(QemuOpts *opts, Error **errp) backend = g_new0(ChardevBackend, 1); backend->type = CHARDEV_BACKEND_KIND_NULL; - if (cc->parse) { - cc->parse(opts, backend, &local_err); + if (cc->chr_parse) { + cc->chr_parse(opts, backend, &local_err); if (local_err) { error_propagate(errp, local_err); qapi_free_ChardevBackend(backend); diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 1a55755d397..84050164893 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -271,7 +271,7 @@ static void char_msmouse_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = msmouse_chr_open; + cc->chr_open = msmouse_chr_open; cc->chr_write = msmouse_chr_write; cc->chr_accept_input = msmouse_chr_accept_input; cc->chr_ioctl = msmouse_ioctl; diff --git a/chardev/spice.c b/chardev/spice.c index 39b79d60fb4..61caa6d0efe 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -364,8 +364,8 @@ static void char_spicevmc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_spice_vmc; - cc->open = qemu_chr_open_spice_vmc; + cc->chr_parse = qemu_chr_parse_spice_vmc; + cc->chr_open = qemu_chr_open_spice_vmc; cc->chr_set_fe_open = spice_vmc_set_fe_open; } @@ -380,8 +380,8 @@ static void char_spiceport_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_spice_port; - cc->open = qemu_chr_open_spice_port; + cc->chr_parse = qemu_chr_parse_spice_port; + cc->chr_open = qemu_chr_open_spice_port; cc->chr_set_fe_open = spice_port_set_fe_open; } diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 0dc6ef08f59..8285a56e7bc 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -346,7 +346,7 @@ static void wctablet_chr_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = wctablet_chr_open; + cc->chr_open = wctablet_chr_open; cc->chr_write = wctablet_chr_write; cc->chr_ioctl = wctablet_chr_ioctl; cc->chr_accept_input = wctablet_chr_accept_input; diff --git a/gdbstub/system.c b/gdbstub/system.c index 8ec8b7ea336..29b9e16a908 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -244,7 +244,7 @@ static void char_gdb_class_init(ObjectClass *oc, const void *data) ChardevClass *cc = CHARDEV_CLASS(oc); cc->internal = true; - cc->open = gdb_monitor_open; + cc->chr_open = gdb_monitor_open; cc->chr_write = gdb_monitor_write; } diff --git a/ui/console-vc.c b/ui/console-vc.c index 830842064d6..931068d43ab 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1185,8 +1185,8 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = vc_chr_parse; - cc->open = vc_chr_open; + cc->chr_parse = vc_chr_parse; + cc->chr_open = vc_chr_open; cc->chr_write = vc_chr_write; cc->chr_accept_input = vc_chr_accept_input; cc->chr_set_echo = vc_chr_set_echo; diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index d05dddaf81b..f6c426e2209 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -205,12 +205,12 @@ dbus_chr_open(Chardev *chr, ChardevBackend *backend, opts = qemu_opts_create(qemu_find_opts("chardev"), NULL, 0, &error_abort); qemu_opt_set(opts, "server", "on", &error_abort); qemu_opt_set(opts, "wait", "off", &error_abort); - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->parse( + CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_parse( opts, be, errp); if (*errp) { return; } - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->open( + CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( chr, be, be_opened, errp); } @@ -274,8 +274,8 @@ char_dbus_class_init(ObjectClass *oc, const void *data) DBusChardevClass *klass = DBUS_CHARDEV_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = dbus_chr_parse; - cc->open = dbus_chr_open; + cc->chr_parse = dbus_chr_parse; + cc->chr_open = dbus_chr_open; cc->chr_set_fe_open = dbus_chr_set_fe_open; cc->chr_set_echo = dbus_chr_set_echo; klass->parent_chr_be_event = cc->chr_be_event; diff --git a/ui/dbus.c b/ui/dbus.c index d2dff332585..31f6eb1189f 100644 --- a/ui/dbus.c +++ b/ui/dbus.c @@ -451,8 +451,8 @@ dbus_vc_class_init(ObjectClass *oc, const void *data) DBusVCClass *klass = DBUS_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - klass->parent_parse = cc->parse; - cc->parse = dbus_vc_parse; + klass->parent_parse = cc->chr_parse; + cc->chr_parse = dbus_vc_parse; } static const TypeInfo dbus_vc_type_info = { diff --git a/ui/gtk.c b/ui/gtk.c index e83a3666258..6217e9552e3 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1985,7 +1985,7 @@ static void char_gd_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = gd_vc_open; + cc->chr_open = gd_vc_open; cc->chr_write = gd_vc_chr_write; cc->chr_accept_input = gd_vc_chr_accept_input; cc->chr_set_echo = gd_vc_chr_set_echo; diff --git a/ui/spice-app.c b/ui/spice-app.c index 24f78f305c4..ea0b62a22b7 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -106,10 +106,10 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) VCChardevClass *vc = CHARDEV_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - vc->parent_open = cc->open; + vc->parent_open = cc->chr_open; - cc->parse = vc_chr_parse; - cc->open = vc_chr_open; + cc->chr_parse = vc_chr_parse; + cc->chr_open = vc_chr_open; cc->chr_set_echo = vc_chr_set_echo; } diff --git a/ui/vdagent.c b/ui/vdagent.c index 142a3691ac9..090771ab171 100644 --- a/ui/vdagent.c +++ b/ui/vdagent.c @@ -924,8 +924,8 @@ static void vdagent_chr_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = vdagent_chr_parse; - cc->open = vdagent_chr_open; + cc->chr_parse = vdagent_chr_parse; + cc->chr_open = vdagent_chr_open; cc->chr_write = vdagent_chr_write; cc->chr_set_fe_open = vdagent_chr_set_fe_open; cc->chr_accept_input = vdagent_chr_accept_input; diff --git a/scripts/codeconverter/codeconverter/test_regexps.py b/scripts/codeconverter/codeconverter/test_regexps.py index b00e9ef15b2..d3a5cc3ad38 100644 --- a/scripts/codeconverter/codeconverter/test_regexps.py +++ b/scripts/codeconverter/codeconverter/test_regexps.py @@ -57,7 +57,7 @@ def fullmatch(regexp, s): print(RE_TYPEINFO_START) assert re.search(RE_TYPEINFO_START, r''' - cc->open = qmp_chardev_open_file; + cc->chr_open = qmp_chardev_open_file; } static const TypeInfo char_file_type_info = { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227468.1533882 (Exim 4.92) (envelope-from ) id 1vq9Mp-0003cE-30; Wed, 11 Feb 2026 12:30:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227468.1533882; Wed, 11 Feb 2026 12:30:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Mo-0003bz-VV; Wed, 11 Feb 2026 12:30:50 +0000 Received: by outflank-mailman (input) for mailman id 1227468; Wed, 11 Feb 2026 12:30:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Mn-0001nh-Gb for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 12:30:41 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7e056fb0-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813047; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6UIUvqKAVHmKYMD5HBaon7fRgToMxwvi5ehZIc//TG8=; b=FzfoXfEnlO8opgcPShRvpqQ9Q2xMUOGOz8X3Me3sYIU4/128sQyAagN+gxiiYhZjB6ZsPD ALu6lmxxUbjQb5MF/Yuxzd4KnR+Ys87HP66bwcFWvuvFBAkNxgrn6FBv/HOhTL7slhplEH NvLg2T/VOHOj4SrPYG/KQRLckZ8hisg= X-MC-Unique: zHKrClWFPBOizOCdyanCjA-1 X-Mimecast-MFC-AGG-ID: zHKrClWFPBOizOCdyanCjA_1770813044 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 05/14] chardev: consistent naming for ChardevClass handlers implementations Date: Wed, 11 Feb 2026 16:29:52 +0400 Message-ID: <20260211123007.3569932-6-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: 0BcZdT8t_rvHGJUwOwzpeb2gQKhqSJiEo8pQEgtOM00_1770813044 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Most handlers implementations has name like {unit_name}_{handler_name}, which is usual and well-recognized pattern. Convert the rest (especially with useless qemu_ prefixes and misleading qmp_ prefixes) to the common pattern. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-5-vsementsov@yandex-team.ru> --- chardev/char-console.c | 10 ++--- chardev/char-file.c | 16 ++++---- chardev/char-hub.c | 15 ++++--- chardev/char-mux.c | 15 ++++--- chardev/char-parallel.c | 28 ++++++------- chardev/char-pipe.c | 24 +++++------ chardev/char-pty.c | 19 +++++---- chardev/char-ringbuf.c | 16 ++++---- chardev/char-serial.c | 28 ++++++------- chardev/char-socket.c | 25 ++++++------ chardev/char-stdio.c | 22 +++++----- chardev/char-udp.c | 15 ++++--- chardev/char-win-stdio.c | 20 +++++----- chardev/msmouse.c | 4 +- chardev/spice.c | 40 +++++++++---------- gdbstub/system.c | 8 ++-- ui/gtk.c | 4 +- .../codeconverter/test_regexps.py | 2 +- 18 files changed, 153 insertions(+), 158 deletions(-) diff --git a/chardev/char-console.c b/chardev/char-console.c index 9a2e012d53f..f3ef1a7748c 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -26,10 +26,10 @@ #include "chardev/char-win.h" #include "qemu/module.h" -static void qemu_chr_open_win_con(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void console_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); } @@ -38,7 +38,7 @@ static void char_console_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = qemu_chr_open_win_con; + cc->chr_open = console_chr_open; } static const TypeInfo char_console_type_info = { diff --git a/chardev/char-file.c b/chardev/char-file.c index 1e293e7054a..568600bb7c4 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,10 +34,10 @@ #include "chardev/char-fd.h" #endif -static void qmp_chardev_open_file(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void file_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -102,8 +102,8 @@ static void qmp_chardev_open_file(Chardev *chr, #endif } -static void qemu_chr_parse_file_out(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *path = qemu_opt_get(opts, "path"); const char *inpath = qemu_opt_get(opts, "input-path"); @@ -133,8 +133,8 @@ static void char_file_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_file_out; - cc->chr_open = qmp_chardev_open_file; + cc->chr_parse = file_chr_parse; + cc->chr_open = file_chr_open; } static const TypeInfo char_file_type_info = { diff --git a/chardev/char-hub.c b/chardev/char-hub.c index 082baa84ab8..11556dfa72b 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,10 +203,10 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void qemu_chr_open_hub(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void hub_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -245,8 +245,7 @@ static void qemu_chr_open_hub(Chardev *chr, *be_opened = false; } -static void qemu_chr_parse_hub(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { ChardevHub *hub; strList **tail; @@ -276,8 +275,8 @@ static void char_hub_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_hub; - cc->chr_open = qemu_chr_open_hub; + cc->chr_parse = hub_chr_parse; + cc->chr_open = hub_chr_open; cc->chr_write = hub_chr_write; cc->chr_add_watch = hub_chr_add_watch; /* We handle events from backends only */ diff --git a/chardev/char-mux.c b/chardev/char-mux.c index c82c2da56dd..f38d66b21f1 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,10 +361,10 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void qemu_chr_open_mux(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void mux_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -384,8 +384,7 @@ static void qemu_chr_open_mux(Chardev *chr, qemu_chr_fe_init(&d->chr, drv, errp); } -static void qemu_chr_parse_mux(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *chardev = qemu_opt_get(opts, "chardev"); ChardevMux *mux; @@ -451,8 +450,8 @@ static void char_mux_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_mux; - cc->chr_open = qemu_chr_open_mux; + cc->chr_parse = mux_chr_parse; + cc->chr_open = mux_chr_open; cc->chr_write = mux_chr_write; cc->chr_accept_input = mux_chr_accept_input; cc->chr_add_watch = mux_chr_add_watch; diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index a0839b784b8..1be1ef46292 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -70,7 +70,7 @@ static int pp_hw_mode(ParallelChardev *s, uint16_t mode) return 1; } -static int pp_ioctl(Chardev *chr, int cmd, void *arg) +static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); int fd = drv->fd; @@ -157,7 +157,7 @@ static int pp_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qemu_chr_open_pp_fd(Chardev *chr, +static void parallel_chr_open_fd(Chardev *chr, int fd, bool *be_opened, Error **errp) @@ -185,7 +185,7 @@ typedef struct { #define PARALLEL_CHARDEV(obj) \ OBJECT_CHECK(ParallelChardev, (obj), TYPE_CHARDEV_PARALLEL) -static int pp_ioctl(Chardev *chr, int cmd, void *arg) +static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); uint8_t b; @@ -227,7 +227,7 @@ static int pp_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qemu_chr_open_pp_fd(Chardev *chr, +static void parallel_chr_open_fd(Chardev *chr, int fd, bool *be_opened, Error **errp) @@ -239,10 +239,10 @@ static void qemu_chr_open_pp_fd(Chardev *chr, #endif #ifdef HAVE_CHARDEV_PARALLEL -static void qmp_chardev_open_parallel(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void parallel_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *parallel = backend->u.parallel.data; int fd; @@ -251,11 +251,11 @@ static void qmp_chardev_open_parallel(Chardev *chr, if (fd < 0) { return; } - qemu_chr_open_pp_fd(chr, fd, be_opened, errp); + parallel_chr_open_fd(chr, fd, be_opened, errp); } -static void qemu_chr_parse_parallel(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *parallel; @@ -274,9 +274,9 @@ static void char_parallel_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_parallel; - cc->chr_open = qmp_chardev_open_parallel; - cc->chr_ioctl = pp_ioctl; + cc->chr_parse = parallel_chr_parse; + cc->chr_open = parallel_chr_open; + cc->chr_ioctl = parallel_chr_ioctl; } static void char_parallel_finalize(Object *obj) diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index a2cd322efe6..e84492d42b6 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,10 +103,10 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void qemu_chr_open_pipe(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; @@ -118,10 +118,10 @@ static void qemu_chr_open_pipe(Chardev *chr, #else -static void qemu_chr_open_pipe(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -162,8 +162,8 @@ static void qemu_chr_open_pipe(Chardev *chr, #endif /* !_WIN32 */ -static void qemu_chr_parse_pipe(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void pipe_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *dev; @@ -182,8 +182,8 @@ static void char_pipe_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_pipe; - cc->chr_open = qemu_chr_open_pipe; + cc->chr_parse = pipe_chr_parse; + cc->chr_open = pipe_chr_open; } static const TypeInfo char_pipe_type_info = { diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 1a15082b025..909ab01f5f2 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -105,7 +105,7 @@ static void pty_chr_update_read_handler(Chardev *chr) } } -static int char_pty_chr_write(Chardev *chr, const uint8_t *buf, int len) +static int pty_chr_write(Chardev *chr, const uint8_t *buf, int len) { PtyChardev *s = PTY_CHARDEV(chr); GPollFD pfd; @@ -331,10 +331,10 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void char_pty_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pty_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -378,8 +378,7 @@ static void char_pty_open(Chardev *chr, } } -static void char_pty_parse(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *path = qemu_opt_get(opts, "path"); ChardevPty *pty; @@ -394,9 +393,9 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = char_pty_parse; - cc->chr_open = char_pty_open; - cc->chr_write = char_pty_chr_write; + cc->chr_parse = pty_chr_parse; + cc->chr_open = pty_chr_open; + cc->chr_write = pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; } diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 6d5ba667bb4..19652fe2b3a 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -92,10 +92,10 @@ static void char_ringbuf_finalize(Object *obj) g_free(d->cbuf); } -static void qemu_chr_open_ringbuf(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void ringbuf_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevRingbuf *opts = backend->u.ringbuf.data; RingBufChardev *d = RINGBUF_CHARDEV(chr); @@ -206,8 +206,8 @@ char *qmp_ringbuf_read(const char *device, int64_t size, return data; } -static void qemu_chr_parse_ringbuf(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void ringbuf_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { int val; ChardevRingbuf *ringbuf; @@ -227,8 +227,8 @@ static void char_ringbuf_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_ringbuf; - cc->chr_open = qemu_chr_open_ringbuf; + cc->chr_parse = ringbuf_chr_parse; + cc->chr_open = ringbuf_chr_open; cc->chr_write = ringbuf_chr_write; } diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 97ed7adf736..54c2b3935cf 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,10 +41,10 @@ #ifdef _WIN32 -static void qmp_chardev_open_serial(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *serial = backend->u.serial.data; @@ -176,7 +176,7 @@ static void tty_serial_init(int fd, int speed, tcsetattr(fd, TCSANOW, &tty); } -static int tty_serial_ioctl(Chardev *chr, int cmd, void *arg) +static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) { FDChardev *s = FD_CHARDEV(chr); QIOChannelFile *fioc = QIO_CHANNEL_FILE(s->ioc_in); @@ -258,10 +258,10 @@ static int tty_serial_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qmp_chardev_open_serial(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -285,8 +285,8 @@ static void qmp_chardev_open_serial(Chardev *chr, #endif /* __linux__ || __sun__ */ #ifdef HAVE_CHARDEV_SERIAL -static void qemu_chr_parse_serial(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void serial_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *serial; @@ -305,10 +305,10 @@ static void char_serial_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_serial; - cc->chr_open = qmp_chardev_open_serial; + cc->chr_parse = serial_chr_parse; + cc->chr_open = serial_chr_open; #ifndef _WIN32 - cc->chr_ioctl = tty_serial_ioctl; + cc->chr_ioctl = serial_chr_ioctl; #endif } diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 149a6d8cc15..a3203f2f97b 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -222,7 +222,7 @@ static void tcp_chr_process_IAC_bytes(Chardev *chr, *size = j; } -static int tcp_get_msgfds(Chardev *chr, int *fds, int num) +static int tcp_chr_get_msgfds(Chardev *chr, int *fds, int num) { SocketChardev *s = SOCKET_CHARDEV(chr); @@ -248,7 +248,7 @@ static int tcp_get_msgfds(Chardev *chr, int *fds, int num) return to_copy; } -static int tcp_set_msgfds(Chardev *chr, int *fds, int num) +static int tcp_chr_set_msgfds(Chardev *chr, int *fds, int num) { SocketChardev *s = SOCKET_CHARDEV(chr); @@ -367,7 +367,7 @@ static void tcp_chr_free_connection(Chardev *chr) remove_hup_source(s); - tcp_set_msgfds(chr, NULL, 0); + tcp_chr_set_msgfds(chr, NULL, 0); remove_fd_in_watch(chr); if (s->registered_yank && (s->state == TCP_CHARDEV_STATE_CONNECTING @@ -1365,10 +1365,10 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void qmp_chardev_open_socket(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void tcp_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1456,8 +1456,7 @@ static void qmp_chardev_open_socket(Chardev *chr, } } -static void qemu_chr_parse_socket(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *path = qemu_opt_get(opts, "path"); const char *host = qemu_opt_get(opts, "host"); @@ -1585,14 +1584,14 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->supports_yank = true; - cc->chr_parse = qemu_chr_parse_socket; - cc->chr_open = qmp_chardev_open_socket; + cc->chr_parse = tcp_chr_parse; + cc->chr_open = tcp_chr_open; cc->chr_wait_connected = tcp_chr_wait_connected; cc->chr_write = tcp_chr_write; cc->chr_sync_read = tcp_chr_sync_read; cc->chr_disconnect = tcp_chr_disconnect; - cc->chr_get_msgfds = tcp_get_msgfds; - cc->chr_set_msgfds = tcp_set_msgfds; + cc->chr_get_msgfds = tcp_chr_get_msgfds; + cc->chr_set_msgfds = tcp_chr_set_msgfds; cc->chr_add_client = tcp_chr_add_client; cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index b7e9af1388f..f0920a23faa 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -56,7 +56,7 @@ static void term_exit(void) } } -static void qemu_chr_set_echo_stdio(Chardev *chr, bool echo) +static void stdio_chr_set_echo(Chardev *chr, bool echo) { struct termios tty; @@ -82,13 +82,13 @@ static void qemu_chr_set_echo_stdio(Chardev *chr, bool echo) static void term_stdio_handler(int sig) { /* restore echo after resume from suspend. */ - qemu_chr_set_echo_stdio(NULL, stdio_echo_state); + stdio_chr_set_echo(NULL, stdio_echo_state); } -static void qemu_chr_open_stdio(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void stdio_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; @@ -122,11 +122,11 @@ static void qemu_chr_open_stdio(Chardev *chr, sigaction(SIGCONT, &act, NULL); stdio_allow_signal = !opts->has_signal || opts->signal; - qemu_chr_set_echo_stdio(chr, false); + stdio_chr_set_echo(chr, false); } #endif -static void qemu_chr_parse_stdio(QemuOpts *opts, ChardevBackend *backend, +static void stdio_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { ChardevStdio *stdio; @@ -142,10 +142,10 @@ static void char_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_stdio; + cc->chr_parse = stdio_chr_parse; #ifndef _WIN32 - cc->chr_open = qemu_chr_open_stdio; - cc->chr_set_echo = qemu_chr_set_echo_stdio; + cc->chr_open = stdio_chr_open; + cc->chr_set_echo = stdio_chr_set_echo; #endif } diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 71b8d8b37df..18f4322408a 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -131,8 +131,7 @@ static void char_udp_finalize(Object *obj) qemu_chr_be_event(chr, CHR_EVENT_CLOSED); } -static void qemu_chr_parse_udp(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *host = qemu_opt_get(opts, "host"); const char *port = qemu_opt_get(opts, "port"); @@ -189,10 +188,10 @@ static void qemu_chr_parse_udp(QemuOpts *opts, ChardevBackend *backend, } } -static void qmp_chardev_open_udp(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void upd_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -221,8 +220,8 @@ static void char_udp_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_udp; - cc->chr_open = qmp_chardev_open_udp; + cc->chr_parse = udp_chr_parse; + cc->chr_open = upd_chr_open; cc->chr_write = udp_chr_write; cc->chr_update_read_handler = udp_chr_update_read_handler; } diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 26e67aef1ca..866f3a20398 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -128,7 +128,7 @@ static void win_stdio_thread_wait_func(void *opaque) SetEvent(stdio->hInputDoneEvent); } -static void qemu_chr_set_echo_win_stdio(Chardev *chr, bool echo) +static void win_stiod_chr_set_echo(Chardev *chr, bool echo) { WinStdioChardev *stdio = WIN_STDIO_CHARDEV(chr); DWORD dwMode = 0; @@ -142,10 +142,10 @@ static void qemu_chr_set_echo_win_stdio(Chardev *chr, bool echo) } } -static void qemu_chr_open_stdio(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void win_stdio_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevStdio *opts = backend->u.stdio.data; bool stdio_allow_signal = !opts->has_signal || opts->signal; @@ -206,7 +206,7 @@ static void qemu_chr_open_stdio(Chardev *chr, SetConsoleMode(stdio->hStdIn, dwMode); - qemu_chr_set_echo_win_stdio(chr, false); + win_stiod_chr_set_echo(chr, false); return; @@ -237,7 +237,7 @@ static void char_win_stdio_finalize(Object *obj) } } -static int win_stdio_write(Chardev *chr, const uint8_t *buf, int len) +static int win_stdio_chr_write(Chardev *chr, const uint8_t *buf, int len) { HANDLE hStdOut = GetStdHandle(STD_OUTPUT_HANDLE); DWORD dwSize; @@ -260,9 +260,9 @@ static void char_win_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = qemu_chr_open_stdio; - cc->chr_write = win_stdio_write; - cc->chr_set_echo = qemu_chr_set_echo_win_stdio; + cc->chr_open = win_stdio_chr_open; + cc->chr_write = win_stdio_chr_write; + cc->chr_set_echo = win_stiod_chr_set_echo; } static const TypeInfo char_win_stdio_type_info = { diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 84050164893..d07cd998cb5 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -178,7 +178,7 @@ static const QemuInputHandler msmouse_handler = { .sync = msmouse_input_sync, }; -static int msmouse_ioctl(Chardev *chr, int cmd, void *arg) +static int msmouse_chr_ioctl(Chardev *chr, int cmd, void *arg) { MouseChardev *mouse = MOUSE_CHARDEV(chr); int c, i, j; @@ -274,7 +274,7 @@ static void char_msmouse_class_init(ObjectClass *oc, const void *data) cc->chr_open = msmouse_chr_open; cc->chr_write = msmouse_chr_write; cc->chr_accept_input = msmouse_chr_accept_input; - cc->chr_ioctl = msmouse_ioctl; + cc->chr_ioctl = msmouse_chr_ioctl; } static const TypeInfo char_msmouse_type_info = { diff --git a/chardev/spice.c b/chardev/spice.c index 61caa6d0efe..3ea25706653 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -215,7 +215,7 @@ static void char_spice_finalize(Object *obj) g_free((char *)s->sin.portname); } -static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) +static void spice_vmc_chr_set_fe_open(struct Chardev *chr, int fe_open) { SpiceChardev *s = SPICE_CHARDEV(chr); if (fe_open) { @@ -225,7 +225,7 @@ static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) } } -static void spice_port_set_fe_open(struct Chardev *chr, int fe_open) +static void spice_port_chr_set_fe_open(struct Chardev *chr, int fe_open) { SpiceChardev *s = SPICE_CHARDEV(chr); @@ -251,10 +251,10 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void qemu_chr_open_spice_vmc(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void spice_vmc_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; const char *type = spicevmc->type; @@ -281,10 +281,10 @@ static void qemu_chr_open_spice_vmc(Chardev *chr, chr_open(chr, type); } -static void qemu_chr_open_spice_port(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void spice_port_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; const char *name = spiceport->fqdn; @@ -309,8 +309,8 @@ static void qemu_chr_open_spice_port(Chardev *chr, vmc_register_interface(s); } -static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void spice_vmc_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *name = qemu_opt_get(opts, "name"); ChardevSpiceChannel *spicevmc; @@ -325,8 +325,8 @@ static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend, spicevmc->type = g_strdup(name); } -static void qemu_chr_parse_spice_port(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void spice_port_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *name = qemu_opt_get(opts, "name"); ChardevSpicePort *spiceport; @@ -364,9 +364,9 @@ static void char_spicevmc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_spice_vmc; - cc->chr_open = qemu_chr_open_spice_vmc; - cc->chr_set_fe_open = spice_vmc_set_fe_open; + cc->chr_parse = spice_vmc_chr_parse; + cc->chr_open = spice_vmc_chr_open; + cc->chr_set_fe_open = spice_vmc_chr_set_fe_open; } static const TypeInfo char_spicevmc_type_info = { @@ -380,9 +380,9 @@ static void char_spiceport_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_spice_port; - cc->chr_open = qemu_chr_open_spice_port; - cc->chr_set_fe_open = spice_port_set_fe_open; + cc->chr_parse = spice_port_chr_parse; + cc->chr_open = spice_port_chr_open; + cc->chr_set_fe_open = spice_port_chr_set_fe_open; } static const TypeInfo char_spiceport_type_info = { diff --git a/gdbstub/system.c b/gdbstub/system.c index 29b9e16a908..e161b14485b 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -225,7 +225,7 @@ static void gdb_sigterm_handler(int signal) } #endif -static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len) +static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) { g_autoptr(GString) hex_buf = g_string_new("O"); gdb_memtohex(hex_buf, buf, len); @@ -233,7 +233,7 @@ static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_monitor_open(Chardev *chr, ChardevBackend *backend, +static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp) { *be_opened = false; @@ -244,8 +244,8 @@ static void char_gdb_class_init(ObjectClass *oc, const void *data) ChardevClass *cc = CHARDEV_CLASS(oc); cc->internal = true; - cc->chr_open = gdb_monitor_open; - cc->chr_write = gdb_monitor_write; + cc->chr_open = gdb_chr_open; + cc->chr_write = gdb_chr_write; } #define TYPE_CHARDEV_GDB "chardev-gdb" diff --git a/ui/gtk.c b/ui/gtk.c index 6217e9552e3..acf55cdfce2 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,7 +1963,7 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_open(Chardev *chr, +static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp) @@ -1985,7 +1985,7 @@ static void char_gd_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = gd_vc_open; + cc->chr_open = gd_vc_chr_open; cc->chr_write = gd_vc_chr_write; cc->chr_accept_input = gd_vc_chr_accept_input; cc->chr_set_echo = gd_vc_chr_set_echo; diff --git a/scripts/codeconverter/codeconverter/test_regexps.py b/scripts/codeconverter/codeconverter/test_regexps.py index d3a5cc3ad38..2b9f5b80111 100644 --- a/scripts/codeconverter/codeconverter/test_regexps.py +++ b/scripts/codeconverter/codeconverter/test_regexps.py @@ -57,7 +57,7 @@ def fullmatch(regexp, s): print(RE_TYPEINFO_START) assert re.search(RE_TYPEINFO_START, r''' - cc->chr_open = qmp_chardev_open_file; + cc->chr_open = file_chr_open; } static const TypeInfo char_file_type_info = { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:30:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:30:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227474.1533892 (Exim 4.92) (envelope-from ) id 1vq9Mx-00045y-IG; Wed, 11 Feb 2026 12:30:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227474.1533892; Wed, 11 Feb 2026 12:30:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Mx-00045o-FI; Wed, 11 Feb 2026 12:30:59 +0000 Received: by outflank-mailman (input) for mailman id 1227474; Wed, 11 Feb 2026 12:30:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Mw-0001nh-8g for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 12:30:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 83363f0b-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813055; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ARe11uBwUQtZK+r/LyMwdLX8qnRbouC5icUkGH7AqSA=; b=CTbha19rja44F9ru+Y6n2Oiyosw09I7YcgzswvgrKlE2AuVm405d25tB7PrisxL33/zLJA lqSDHSe7RQfhW9iMmbj9kbMgsl3cnZrLEmA3QBZjyqajB4Yd+fnBLYbKrclJEmqbUSNC+t EnQ9ieyn0ZWPnTf8eRbIfymOJEX1Tuw= X-MC-Unique: 8dzO44fAOkO8hgNBHIWcLA-1 X-Mimecast-MFC-AGG-ID: 8dzO44fAOkO8hgNBHIWcLA_1770813050 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 06/14] chardev: .chr_open(): drop be_opened parameter Date: Wed, 11 Feb 2026 16:29:53 +0400 Message-ID: <20260211123007.3569932-7-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: t0wGx4rLtFIMFGMXuZWD0ARFACVZCwh6a53Wk7oPHEc_1770813050 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy The logic around the parameter is rather tricky. Let's instead explicitly send CHR_EVENT_OPENED in all backends where needed. Signed-off-by: Vladimir Sementsov-Ogievskiy [ Marc-André - add CHR_EVENT_OPENED in udp_chr_open() ] Signed-off-by: Marc-André Lureau Message-Id: <20260115144606.233252-6-vsementsov@yandex-team.ru> --- include/chardev/char.h | 3 +-- chardev/baum.c | 7 +++---- chardev/char-console.c | 5 ++--- chardev/char-file.c | 7 +++---- chardev/char-hub.c | 11 +++++------ chardev/char-mux.c | 19 +++++++++++-------- chardev/char-null.c | 7 ++----- chardev/char-parallel.c | 15 ++++----------- chardev/char-pipe.c | 14 ++++++-------- chardev/char-pty.c | 6 +----- chardev/char-ringbuf.c | 3 ++- chardev/char-serial.c | 18 +++++++++--------- chardev/char-socket.c | 10 +++------- chardev/char-stdio.c | 7 +++---- chardev/char-udp.c | 6 ++---- chardev/char-win-stdio.c | 2 +- chardev/char.c | 11 +++-------- chardev/msmouse.c | 4 ++-- chardev/spice.c | 10 ++-------- chardev/wctablet.c | 5 ++--- gdbstub/system.c | 5 ++--- ui/console-vc.c | 7 ++----- ui/dbus-chardev.c | 6 ++---- ui/gtk.c | 9 +++------ ui/spice-app.c | 10 +++------- ui/vdagent.c | 3 +-- 26 files changed, 80 insertions(+), 130 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index d33833b6c02..aa42e01b8a3 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -260,8 +260,7 @@ struct ChardevClass { void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*chr_open)(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp); + void (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); /* write buf to the backend */ int (*chr_write)(Chardev *s, const uint8_t *buf, int len); diff --git a/chardev/baum.c b/chardev/baum.c index 75e41965c11..4b97d630ffb 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -642,10 +642,7 @@ static void char_braille_finalize(Object *obj) } } -static void baum_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { BaumChardev *baum = BAUM_CHARDEV(chr); brlapi_handle_t *handle; @@ -670,6 +667,8 @@ static void baum_chr_open(Chardev *chr, * as an integer, but in practice it seems to work */ qemu_set_fd_handler(baum->brlapi_fd, baum_chr_read, NULL, baum); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_braille_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-console.c b/chardev/char-console.c index f3ef1a7748c..423f0f4cc4e 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -26,12 +26,11 @@ #include "chardev/char-win.h" #include "qemu/module.h" -static void console_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void console_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_console_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-file.c b/chardev/char-file.c index 568600bb7c4..34ef386abc5 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,10 +34,7 @@ #include "chardev/char-fd.h" #endif -static void file_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -100,6 +97,8 @@ static void file_chr_open(Chardev *chr, return; } #endif + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-hub.c b/chardev/char-hub.c index 11556dfa72b..aa6058c2f6f 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,10 +203,7 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void hub_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -241,8 +238,10 @@ static void hub_chr_open(Chardev *chr, list = list->next; } - /* Closed until an explicit event from backend */ - *be_opened = false; + /* + * Closed until an explicit event from backend, so we don't + * send CHR_EVENT_OPENED now. + */ } static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-mux.c b/chardev/char-mux.c index f38d66b21f1..7210df431fc 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,10 +361,7 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void mux_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -377,11 +374,17 @@ static void mux_chr_open(Chardev *chr, } d->focus = -1; - /* only default to opened state if we've realized the initial - * set of muxes + if (!qemu_chr_fe_init(&d->chr, drv, errp)) { + return; + } + + /* + * Only move to opened state if we've realized + * the initial set of muxes: */ - *be_opened = muxes_opened; - qemu_chr_fe_init(&d->chr, drv, errp); + if (muxes_opened) { + qemu_chr_be_event(chr, CHR_EVENT_OPENED); + } } static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-null.c b/chardev/char-null.c index 674603b3807..900b5febb6c 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -26,12 +26,9 @@ #include "chardev/char.h" #include "qemu/module.h" -static void null_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - *be_opened = false; + /* do not send CHR_EVENT_OPENED */ } static void char_null_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 1be1ef46292..359efa3c9c8 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -157,10 +157,7 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, - int fd, - bool *be_opened, - Error **errp) +static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); @@ -172,6 +169,7 @@ static void parallel_chr_open_fd(Chardev *chr, } drv->mode = IEEE1284_MODE_COMPAT; + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* __linux__ */ @@ -227,21 +225,16 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, - int fd, - bool *be_opened, - Error **errp) +static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); drv->fd = fd; - *be_opened = false; } #endif #ifdef HAVE_CHARDEV_PARALLEL static void parallel_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevHostdev *parallel = backend->u.parallel.data; @@ -251,7 +244,7 @@ static void parallel_chr_open(Chardev *chr, if (fd < 0) { return; } - parallel_chr_open_fd(chr, fd, be_opened, errp); + parallel_chr_open_fd(chr, fd, errp); } static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index e84492d42b6..2f26372dfc9 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,10 +103,7 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void pipe_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; @@ -114,14 +111,13 @@ static void pipe_chr_open(Chardev *chr, if (win_chr_pipe_init(chr, filename, errp) < 0) { return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #else -static void pipe_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -158,6 +154,8 @@ static void pipe_chr_open(Chardev *chr, } return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* !_WIN32 */ diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 909ab01f5f2..d4d69a29a95 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -331,10 +331,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void pty_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -364,7 +361,6 @@ static void pty_chr_open(Chardev *chr, qio_channel_set_name(s->ioc, name); g_free(name); s->timer_src = NULL; - *be_opened = false; /* create symbolic link */ if (path) { diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 19652fe2b3a..30b17a96d3a 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -94,7 +94,6 @@ static void char_ringbuf_finalize(Object *obj) static void ringbuf_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevRingbuf *opts = backend->u.ringbuf.data; @@ -111,6 +110,8 @@ static void ringbuf_chr_open(Chardev *chr, d->prod = 0; d->cons = 0; d->cbuf = g_malloc0(d->size); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } void qmp_ringbuf_write(const char *device, const char *data, diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 54c2b3935cf..9995f184258 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,14 +41,15 @@ #ifdef _WIN32 -static void serial_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; + int ret = win_chr_serial_init(chr, serial->device, errp); + if (ret < 0) { + return; + } - win_chr_serial_init(chr, serial->device, errp); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #elif defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ @@ -258,10 +259,7 @@ static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void serial_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -281,6 +279,8 @@ static void serial_chr_open(Chardev *chr, close(fd); return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* __linux__ || __sun__ */ diff --git a/chardev/char-socket.c b/chardev/char-socket.c index a3203f2f97b..2951b2ec9be 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1365,10 +1365,7 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void tcp_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1439,9 +1436,6 @@ static void tcp_chr_open(Chardev *chr, } s->registered_yank = true; - /* be isn't opened until we get a connection */ - *be_opened = false; - update_disconnected_filename(s); if (s->is_listen) { @@ -1454,6 +1448,8 @@ static void tcp_chr_open(Chardev *chr, return; } } + + /* be isn't opened until we get a connection */ } static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index f0920a23faa..534f6ed5658 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -85,10 +85,7 @@ static void term_stdio_handler(int sig) stdio_chr_set_echo(NULL, stdio_echo_state); } -static void stdio_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; @@ -123,6 +120,8 @@ static void stdio_chr_open(Chardev *chr, stdio_allow_signal = !opts->has_signal || opts->signal; stdio_chr_set_echo(chr, false); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 18f4322408a..4c81c95e656 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -188,10 +188,7 @@ static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) } } -static void upd_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -214,6 +211,7 @@ static void upd_chr_open(Chardev *chr, g_free(name); s->ioc = QIO_CHANNEL(sioc); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 866f3a20398..0535960ff1b 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -144,7 +144,6 @@ static void win_stiod_chr_set_echo(Chardev *chr, bool echo) static void win_stdio_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; @@ -208,6 +207,7 @@ static void win_stdio_chr_open(Chardev *chr, win_stiod_chr_set_echo(chr, false); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); return; err3: diff --git a/chardev/char.c b/chardev/char.c index df37d1df161..44bfed36272 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -246,8 +246,7 @@ int qemu_chr_add_client(Chardev *s, int fd) CHARDEV_GET_CLASS(s)->chr_add_client(s, fd) : -1; } -static void qemu_char_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevClass *cc = CHARDEV_GET_CLASS(chr); /* Any ChardevCommon member would work */ @@ -268,7 +267,7 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, } if (cc->chr_open) { - cc->chr_open(chr, backend, be_opened, errp); + cc->chr_open(chr, backend, errp); } } @@ -1009,7 +1008,6 @@ static Chardev *chardev_new(const char *id, const char *typename, Object *obj; Chardev *chr = NULL; Error *local_err = NULL; - bool be_opened = true; assert(g_str_has_prefix(typename, "chardev-")); assert(id); @@ -1020,7 +1018,7 @@ static Chardev *chardev_new(const char *id, const char *typename, chr->label = g_strdup(id); chr->gcontext = gcontext; - qemu_char_open(chr, backend, &be_opened, &local_err); + qemu_char_open(chr, backend, &local_err); if (local_err) { error_propagate(errp, local_err); object_unref(obj); @@ -1030,9 +1028,6 @@ static Chardev *chardev_new(const char *id, const char *typename, if (!chr->filename) { chr->filename = g_strdup(typename + 8); } - if (be_opened) { - qemu_chr_be_event(chr, CHR_EVENT_OPENED); - } return chr; } diff --git a/chardev/msmouse.c b/chardev/msmouse.c index d07cd998cb5..9dc04e3b3ec 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -255,16 +255,16 @@ static void char_msmouse_finalize(Object *obj) static void msmouse_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { MouseChardev *mouse = MOUSE_CHARDEV(chr); - *be_opened = false; mouse->hs = qemu_input_handler_register((DeviceState *)mouse, &msmouse_handler); mouse->tiocm = 0; fifo8_create(&mouse->outbuf, MSMOUSE_BUF_SZ); + + /* Never send CHR_EVENT_OPENED */ } static void char_msmouse_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/spice.c b/chardev/spice.c index 3ea25706653..f5b1f585eb1 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -251,9 +251,7 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void spice_vmc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; @@ -277,13 +275,10 @@ static void spice_vmc_chr_open(Chardev *chr, return; } - *be_opened = false; chr_open(chr, type); } -static void spice_port_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; @@ -302,7 +297,6 @@ static void spice_port_chr_open(Chardev *chr, chr_open(chr, "port"); - *be_opened = false; s = SPICE_CHARDEV(chr); s->sin.portname = g_strdup(name); diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 8285a56e7bc..65b2ceb58c9 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -326,13 +326,10 @@ static void wctablet_chr_finalize(Object *obj) static void wctablet_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { TabletChardev *tablet = WCTABLET_CHARDEV(chr); - *be_opened = true; - /* init state machine */ memcpy(tablet->outbuf, WC_FULL_CONFIG_STRING, WC_FULL_CONFIG_STRING_LENGTH); tablet->outlen = WC_FULL_CONFIG_STRING_LENGTH; @@ -340,6 +337,8 @@ static void wctablet_chr_open(Chardev *chr, tablet->hs = qemu_input_handler_register((DeviceState *)tablet, &wctablet_handler); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void wctablet_chr_class_init(ObjectClass *oc, const void *data) diff --git a/gdbstub/system.c b/gdbstub/system.c index e161b14485b..982857f314a 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -233,10 +233,9 @@ static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - *be_opened = false; + /* Never send CHR_EVENT_OPENED */ } static void char_gdb_class_init(ObjectClass *oc, const void *data) diff --git a/ui/console-vc.c b/ui/console-vc.c index 931068d43ab..4c8ea4c1485 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1093,10 +1093,7 @@ void qemu_text_console_update_size(QemuTextConsole *c) dpy_text_resize(QEMU_CONSOLE(c), c->width, c->height); } -static void vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevVC *vc = backend->u.vc.data; VCChardev *drv = VC_CHARDEV(chr); @@ -1144,7 +1141,7 @@ static void vc_chr_open(Chardev *chr, drv->t_attrib = TEXT_ATTRIBUTES_DEFAULT; } - *be_opened = true; + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void vc_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index f6c426e2209..3e471f84cd8 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -176,9 +176,7 @@ dbus_chr_send_break( return DBUS_METHOD_INVOCATION_HANDLED; } -static void -dbus_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ERRP_GUARD(); @@ -211,7 +209,7 @@ dbus_chr_open(Chardev *chr, ChardevBackend *backend, return; } CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( - chr, be, be_opened, errp); + chr, be, errp); } static void diff --git a/ui/gtk.c b/ui/gtk.c index acf55cdfce2..44b2b868ec9 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,10 +1963,7 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { if (nb_vcs == MAX_VCS) { error_setg(errp, "Maximum number of consoles reached"); @@ -1975,10 +1972,10 @@ static void gd_vc_chr_open(Chardev *chr, vcs[nb_vcs++] = chr; - /* console/chardev init sometimes completes elsewhere in a 2nd + /* + * console/chardev init sometimes completes elsewhere in a 2nd * stage, so defer OPENED events until they are fully initialized */ - *be_opened = false; } static void char_gd_vc_class_init(ObjectClass *oc, const void *data) diff --git a/ui/spice-app.c b/ui/spice-app.c index ea0b62a22b7..7ac9ae4e78d 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -49,8 +49,7 @@ struct VCChardev { struct VCChardevClass { ChardevClass parent; - void (*parent_open)(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp); + void (*parent_open)(Chardev *chr, ChardevBackend *backend, Error **errp); }; #define TYPE_CHARDEV_VC "chardev-vc" @@ -67,10 +66,7 @@ chr_spice_backend_new(void) return be; } -static void vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VCChardevClass *vc = CHARDEV_VC_GET_CLASS(chr); ChardevBackend *be; @@ -87,7 +83,7 @@ static void vc_chr_open(Chardev *chr, be = chr_spice_backend_new(); be->u.spiceport.data->fqdn = fqdn ? g_strdup(fqdn) : g_strdup_printf("org.qemu.console.%s", chr->label); - vc->parent_open(chr, be, be_opened, errp); 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Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 11/14] chardev/char: qemu_char_open(): add return value Date: Wed, 11 Feb 2026 16:29:58 +0400 Message-ID: <20260211123007.3569932-12-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: XjVJwudVIUxpXEYycY1eSDMRMr489ItP4cqYDevW5D4_1770813079 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Accordingly with recommendations in include/qapi/error.h accompany errp by boolean return value and get rid of error propagation. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-11-vsementsov@yandex-team.ru> --- chardev/char.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/chardev/char.c b/chardev/char.c index 3373c9b61f8..5d00cac2f31 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -246,7 +246,7 @@ int qemu_chr_add_client(Chardev *s, int fd) CHARDEV_GET_CLASS(s)->chr_add_client(s, fd) : -1; } -static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevClass *cc = CHARDEV_GET_CLASS(chr); /* Any ChardevCommon member would work */ @@ -262,13 +262,15 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) } chr->logfd = qemu_create(common->logfile, flags, 0666, errp); if (chr->logfd < 0) { - return; + return false; } } - if (cc->chr_open) { - cc->chr_open(chr, backend, errp); + if (!cc->chr_open) { + return true; } + + return cc->chr_open(chr, backend, errp); } static void char_init(Object *obj) @@ -1006,7 +1008,6 @@ static Chardev *chardev_new(const char *id, const char *typename, { Object *obj; Chardev *chr = NULL; - Error *local_err = NULL; assert(g_str_has_prefix(typename, "chardev-")); assert(id); @@ -1017,9 +1018,7 @@ static Chardev *chardev_new(const char *id, const char *typename, chr->label = g_strdup(id); chr->gcontext = gcontext; - qemu_char_open(chr, backend, &local_err); - if (local_err) { - error_propagate(errp, local_err); + if (!qemu_char_open(chr, backend, errp)) { object_unref(obj); return NULL; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:37:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:37:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227512.1533912 (Exim 4.92) (envelope-from ) id 1vq9Th-000638-L3; Wed, 11 Feb 2026 12:37:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227512.1533912; Wed, 11 Feb 2026 12:37:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Th-000631-Ha; Wed, 11 Feb 2026 12:37:57 +0000 Received: by outflank-mailman (input) for mailman id 1227512; Wed, 11 Feb 2026 12:37:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9N1-0001nh-Vc for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:31:04 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8697f043-0745-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 13:31:02 +0100 (CET) Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-639-30M7JcaDOLavjNI8Ti6E3A-1; Wed, 11 Feb 2026 07:30:58 -0500 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 236821955E77; Wed, 11 Feb 2026 12:30:56 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 8EA3E180066A; Wed, 11 Feb 2026 12:30:54 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8697f043-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813061; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dLHfC75X0gnITV5XgkytU+NTkgxXg1ikFTWZtIHy/IU=; b=NyluingiuhwKhURqUo5G68x1bWeqOHT5xVw/kbXZcspyvxEANtOvIWZZ39f962RlPhW1nB 7kzBNc6bb556nMwicqmB4azZwVm9D6p5oLmiffR1+wAKTRhh1ku2OT7PgGxK/U6x1Z1Tf9 JP8XCRXGsUf3qVAGCxAiZEd4ebZ/fPw= X-MC-Unique: 30M7JcaDOLavjNI8Ti6E3A-1 X-Mimecast-MFC-AGG-ID: 30M7JcaDOLavjNI8Ti6E3A_1770813056 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 07/14] chardev: .chr_open(): add boolean return value Date: Wed, 11 Feb 2026 16:29:54 +0400 Message-ID: <20260211123007.3569932-8-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: 9mSNiUQn0FChtVn4ABwZJCBzNdP_dhbctVNbcfFBah4_1770813056 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Add boolean return value to follow common recommendations for functions with errrp in include/qapi/error.h Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-7-vsementsov@yandex-team.ru> --- include/chardev/char.h | 2 +- chardev/baum.c | 5 +++-- chardev/char-console.c | 1 + chardev/char-file.c | 13 +++++++------ chardev/char-hub.c | 11 ++++++----- chardev/char-mux.c | 8 +++++--- chardev/char-null.c | 4 ++-- chardev/char-parallel.c | 14 ++++++++------ chardev/char-pipe.c | 12 +++++++----- chardev/char-pty.c | 9 ++++++--- chardev/char-ringbuf.c | 5 +++-- chardev/char-serial.c | 15 +++++++++------ chardev/char-socket.c | 17 +++++++++-------- chardev/char-stdio.c | 11 ++++++----- chardev/char-udp.c | 5 +++-- chardev/char-win-stdio.c | 7 ++++--- chardev/msmouse.c | 3 ++- chardev/spice.c | 12 +++++++----- chardev/wctablet.c | 3 ++- gdbstub/system.c | 3 ++- ui/console-vc.c | 3 ++- ui/dbus-chardev.c | 6 +++--- ui/gtk.c | 5 +++-- ui/spice-app.c | 10 ++++++---- ui/vdagent.c | 10 +++++----- 25 files changed, 112 insertions(+), 82 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index aa42e01b8a3..e1bf97222b8 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -260,7 +260,7 @@ struct ChardevClass { void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); + bool (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); /* write buf to the backend */ int (*chr_write)(Chardev *s, const uint8_t *buf, int len); diff --git a/chardev/baum.c b/chardev/baum.c index 4b97d630ffb..1219963656b 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -642,7 +642,7 @@ static void char_braille_finalize(Object *obj) } } -static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { BaumChardev *baum = BAUM_CHARDEV(chr); brlapi_handle_t *handle; @@ -656,7 +656,7 @@ static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) brlapi_strerror(brlapi_error_location())); g_free(handle); baum->brlapi = NULL; - return; + return false; } baum->deferred_init = 0; @@ -669,6 +669,7 @@ static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) qemu_set_fd_handler(baum->brlapi_fd, baum_chr_read, NULL, baum); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_braille_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-console.c b/chardev/char-console.c index 423f0f4cc4e..c911cc62e3c 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -31,6 +31,7 @@ static void console_chr_open(Chardev *chr, ChardevBackend *backend, { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_console_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-file.c b/chardev/char-file.c index 34ef386abc5..b0dd9d5f870 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,7 +34,7 @@ #include "chardev/char-fd.h" #endif -static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -44,7 +44,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (file->in) { error_setg(errp, "input file not supported"); - return; + return false; } if (file->has_append && file->append) { @@ -61,7 +61,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) FILE_ATTRIBUTE_NORMAL, NULL); if (out == INVALID_HANDLE_VALUE) { error_setg(errp, "open %s failed", file->out); - return; + return false; } win_chr_set_file(chr, out, false); @@ -77,7 +77,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) out = qmp_chardev_open_file_source(file->out, flags, errp); if (out < 0) { - return; + return false; } if (file->in) { @@ -85,7 +85,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) in = qmp_chardev_open_file_source(file->in, flags, errp); if (in < 0) { qemu_close(out); - return; + return false; } } @@ -94,11 +94,12 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (in >= 0) { qemu_close(in); } - return; + return false; } #endif qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-hub.c b/chardev/char-hub.c index aa6058c2f6f..05cf722b5b0 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,7 +203,7 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -213,7 +213,7 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (list == NULL) { error_setg(errp, "hub: 'chardevs' list is not defined"); - return; + return false; } while (list) { @@ -223,17 +223,17 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (s == NULL) { error_setg(errp, "hub: chardev can't be found by id '%s'", list->value); - return; + return false; } if (CHARDEV_IS_HUB(s) || CHARDEV_IS_MUX(s)) { error_setg(errp, "hub: multiplexers and hub devices can't be " "stacked, check chardev '%s', chardev should not " "be a hub device or have 'mux=on' enabled", list->value); - return; + return false; } if (!hub_chr_attach_chardev(d, s, errp)) { - return; + return false; } list = list->next; } @@ -242,6 +242,7 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) * Closed until an explicit event from backend, so we don't * send CHR_EVENT_OPENED now. */ + return true; } static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-mux.c b/chardev/char-mux.c index 7210df431fc..881443d869d 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,7 +361,7 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -370,12 +370,12 @@ static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) drv = qemu_chr_find(mux->chardev); if (drv == NULL) { error_setg(errp, "mux: base chardev %s not found", mux->chardev); - return; + return false; } d->focus = -1; if (!qemu_chr_fe_init(&d->chr, drv, errp)) { - return; + return false; } /* @@ -385,6 +385,8 @@ static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (muxes_opened) { qemu_chr_be_event(chr, CHR_EVENT_OPENED); } + + return true; } static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-null.c b/chardev/char-null.c index 900b5febb6c..d5a101178bb 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -26,9 +26,9 @@ #include "chardev/char.h" #include "qemu/module.h" -static void null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - /* do not send CHR_EVENT_OPENED */ + return true; } static void char_null_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 359efa3c9c8..cbf87e660da 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -157,7 +157,7 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) +static bool parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); @@ -165,11 +165,12 @@ static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) if (ioctl(fd, PPCLAIM) < 0) { error_setg_errno(errp, errno, "not a parallel port"); - return; + return false; } drv->mode = IEEE1284_MODE_COMPAT; qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* __linux__ */ @@ -225,15 +226,16 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) +static bool parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); drv->fd = fd; + return true; } #endif #ifdef HAVE_CHARDEV_PARALLEL -static void parallel_chr_open(Chardev *chr, +static bool parallel_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -242,9 +244,9 @@ static void parallel_chr_open(Chardev *chr, fd = qmp_chardev_open_file_source(parallel->device, O_RDWR, errp); if (fd < 0) { - return; + return false; } - parallel_chr_open_fd(chr, fd, errp); + return parallel_chr_open_fd(chr, fd, errp); } static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index 2f26372dfc9..472b3e0801f 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,21 +103,22 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; if (win_chr_pipe_init(chr, filename, errp) < 0) { - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #else -static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -143,7 +144,7 @@ static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) ); if (fd_in < 0) { error_setg_file_open(errp, errno, filename); - return; + return false; } } @@ -152,10 +153,11 @@ static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (fd_out != fd_in) { close(fd_out); } - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* !_WIN32 */ diff --git a/chardev/char-pty.c b/chardev/char-pty.c index d4d69a29a95..9e26e97baf5 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -331,7 +331,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -342,13 +342,13 @@ static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) master_fd = qemu_openpty_raw(&slave_fd, pty_name); if (master_fd < 0) { error_setg_errno(errp, errno, "Failed to create PTY"); - return; + return false; } close(slave_fd); if (!qemu_set_blocking(master_fd, false, errp)) { close(master_fd); - return; + return false; } chr->filename = g_strdup_printf("pty:%s", pty_name); @@ -368,10 +368,13 @@ static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (res != 0) { error_setg_errno(errp, errno, "Failed to create PTY symlink"); + return false; } else { s->path = g_strdup(path); } } + + return true; } static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 30b17a96d3a..8f998d26a49 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -92,7 +92,7 @@ static void char_ringbuf_finalize(Object *obj) g_free(d->cbuf); } -static void ringbuf_chr_open(Chardev *chr, +static bool ringbuf_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -104,7 +104,7 @@ static void ringbuf_chr_open(Chardev *chr, /* The size must be power of 2 */ if (d->size & (d->size - 1)) { error_setg(errp, "size of ringbuf chardev must be power of two"); - return; + return false; } d->prod = 0; @@ -112,6 +112,7 @@ static void ringbuf_chr_open(Chardev *chr, d->cbuf = g_malloc0(d->size); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } void qmp_ringbuf_write(const char *device, const char *data, diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 9995f184258..0c73bafc545 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,15 +41,17 @@ #ifdef _WIN32 -static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int ret = win_chr_serial_init(chr, serial->device, errp); if (ret < 0) { - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + + return true; } #elif defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ @@ -259,7 +261,7 @@ static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -267,20 +269,21 @@ static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) fd = qmp_chardev_open_file_source(serial->device, O_RDWR | O_NONBLOCK, errp); if (fd < 0) { - return; + return false; } if (!qemu_set_blocking(fd, false, errp)) { close(fd); - return; + return false; } tty_serial_init(fd, 115200, 'N', 8, 1); if (!qemu_chr_open_fd(chr, fd, fd, errp)) { close(fd); - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* __linux__ || __sun__ */ diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 2951b2ec9be..908bbdbc124 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1365,7 +1365,7 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1390,7 +1390,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (!creds) { error_setg(errp, "No TLS credentials with id '%s'", sock->tls_creds); - return; + return false; } s->tls_creds = (QCryptoTLSCreds *) object_dynamic_cast(creds, @@ -1398,7 +1398,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (!s->tls_creds) { error_setg(errp, "Object with id '%s' is not TLS credentials", sock->tls_creds); - return; + return false; } object_ref(OBJECT(s->tls_creds)); if (!qcrypto_tls_creds_check_endpoint(s->tls_creds, @@ -1406,7 +1406,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) ? QCRYPTO_TLS_CREDS_ENDPOINT_SERVER : QCRYPTO_TLS_CREDS_ENDPOINT_CLIENT, errp)) { - return; + return false; } } s->tls_authz = g_strdup(sock->tls_authz); @@ -1414,7 +1414,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s->addr = addr = socket_address_flatten(sock->addr); if (!qmp_chardev_validate_socket(sock, addr, errp)) { - return; + return false; } qemu_chr_set_feature(chr, QEMU_CHAR_FEATURE_RECONNECTABLE); @@ -1431,7 +1431,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) */ if (!chr->handover_yank_instance) { if (!yank_register_instance(CHARDEV_YANK_INSTANCE(chr->label), errp)) { - return; + return false; } } s->registered_yank = true; @@ -1441,15 +1441,16 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (s->is_listen) { if (qmp_chardev_open_socket_server(chr, is_telnet || is_tn3270, is_waitconnect, errp) < 0) { - return; + return false; } } else { if (qmp_chardev_open_socket_client(chr, reconnect_ms, errp) < 0) { - return; + return false; } } /* be isn't opened until we get a connection */ + return true; } static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index 534f6ed5658..fe1cbb2d880 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -85,19 +85,19 @@ static void term_stdio_handler(int sig) stdio_chr_set_echo(NULL, stdio_echo_state); } -static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; if (is_daemonized()) { error_setg(errp, "cannot use stdio with -daemonize"); - return; + return false; } if (stdio_in_use) { error_setg(errp, "cannot use stdio by multiple character devices"); - return; + return false; } stdio_in_use = true; @@ -105,11 +105,11 @@ static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) old_fd1_flags = fcntl(1, F_GETFL); tcgetattr(0, &oldtty); if (!qemu_set_blocking(0, false, errp)) { - return; + return false; } if (!qemu_chr_open_fd(chr, 0, 1, errp)) { - return; + return false; } atexit(term_exit); @@ -122,6 +122,7 @@ static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) stdio_chr_set_echo(chr, false); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 4c81c95e656..423000832ff 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -188,7 +188,7 @@ static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) } } -static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -203,7 +203,7 @@ static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) qapi_free_SocketAddress(remote_addr); if (ret < 0) { object_unref(OBJECT(sioc)); - return; + return false; } name = g_strdup_printf("chardev-udp-%s", chr->label); @@ -212,6 +212,7 @@ static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s->ioc = QIO_CHANNEL(sioc); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 0535960ff1b..bb9c195a8b1 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -142,7 +142,7 @@ static void win_stiod_chr_set_echo(Chardev *chr, bool echo) } } -static void win_stdio_chr_open(Chardev *chr, +static bool win_stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -155,7 +155,7 @@ static void win_stdio_chr_open(Chardev *chr, stdio->hStdIn = GetStdHandle(STD_INPUT_HANDLE); if (stdio->hStdIn == INVALID_HANDLE_VALUE) { error_setg(errp, "cannot open stdio: invalid handle"); - return; + return false; } is_console = GetConsoleMode(stdio->hStdIn, &dwMode) != 0; @@ -208,7 +208,7 @@ static void win_stdio_chr_open(Chardev *chr, win_stiod_chr_set_echo(chr, false); qemu_chr_be_event(chr, CHR_EVENT_OPENED); - return; + return true; err3: qemu_del_wait_object(stdio->hInputReadyEvent, NULL, NULL); @@ -217,6 +217,7 @@ err2: CloseHandle(stdio->hInputDoneEvent); err1: qemu_del_wait_object(stdio->hStdIn, NULL, NULL); + return false; } static void char_win_stdio_finalize(Object *obj) diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 9dc04e3b3ec..365f04546e9 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -253,7 +253,7 @@ static void char_msmouse_finalize(Object *obj) fifo8_destroy(&mouse->outbuf); } -static void msmouse_chr_open(Chardev *chr, +static bool msmouse_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -265,6 +265,7 @@ static void msmouse_chr_open(Chardev *chr, fifo8_create(&mouse->outbuf, MSMOUSE_BUF_SZ); /* Never send CHR_EVENT_OPENED */ + return true; } static void char_msmouse_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/spice.c b/chardev/spice.c index f5b1f585eb1..ad97d98ac6b 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -251,7 +251,7 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, +static bool spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; @@ -272,13 +272,14 @@ static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, subtypes); g_free(subtypes); - return; + return false; } chr_open(chr, type); + return true; } -static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, +static bool spice_port_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; @@ -287,12 +288,12 @@ static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, if (name == NULL) { error_setg(errp, "missing name parameter"); - return; + return false; } if (!using_spice) { error_setg(errp, "spice not enabled"); - return; + return false; } chr_open(chr, "port"); @@ -301,6 +302,7 @@ static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, s->sin.portname = g_strdup(name); vmc_register_interface(s); + return true; } static void spice_vmc_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 65b2ceb58c9..214d5ca2e28 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -324,7 +324,7 @@ static void wctablet_chr_finalize(Object *obj) } } -static void wctablet_chr_open(Chardev *chr, +static bool wctablet_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -339,6 +339,7 @@ static void wctablet_chr_open(Chardev *chr, &wctablet_handler); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void wctablet_chr_class_init(ObjectClass *oc, const void *data) diff --git a/gdbstub/system.c b/gdbstub/system.c index 982857f314a..e86c5870abc 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -233,9 +233,10 @@ static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { /* Never send CHR_EVENT_OPENED */ + return true; } static void char_gdb_class_init(ObjectClass *oc, const void *data) diff --git a/ui/console-vc.c b/ui/console-vc.c index 4c8ea4c1485..f22806fed79 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1093,7 +1093,7 @@ void qemu_text_console_update_size(QemuTextConsole *c) dpy_text_resize(QEMU_CONSOLE(c), c->width, c->height); } -static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevVC *vc = backend->u.vc.data; VCChardev *drv = VC_CHARDEV(chr); @@ -1142,6 +1142,7 @@ static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void vc_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index 3e471f84cd8..9442b475517 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -176,7 +176,7 @@ dbus_chr_send_break( return DBUS_METHOD_INVOCATION_HANDLED; } -static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ERRP_GUARD(); @@ -206,9 +206,9 @@ static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_parse( opts, be, errp); if (*errp) { - return; + return false; } - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( + return CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( chr, be, errp); } diff --git a/ui/gtk.c b/ui/gtk.c index 44b2b868ec9..9ebe7e8df0d 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,11 +1963,11 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { if (nb_vcs == MAX_VCS) { error_setg(errp, "Maximum number of consoles reached"); - return; + return false; } vcs[nb_vcs++] = chr; @@ -1976,6 +1976,7 @@ static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) * console/chardev init sometimes completes elsewhere in a 2nd * stage, so defer OPENED events until they are fully initialized */ + return true; } static void char_gd_vc_class_init(ObjectClass *oc, const void *data) diff --git a/ui/spice-app.c b/ui/spice-app.c index 7ac9ae4e78d..9e55f273715 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -49,7 +49,7 @@ struct VCChardev { struct VCChardevClass { ChardevClass parent; - void (*parent_open)(Chardev *chr, ChardevBackend *backend, Error **errp); + bool (*parent_init)(Chardev *chr, ChardevBackend *backend, Error **errp); }; #define TYPE_CHARDEV_VC "chardev-vc" @@ -66,11 +66,12 @@ chr_spice_backend_new(void) return be; } -static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VCChardevClass *vc = CHARDEV_VC_GET_CLASS(chr); ChardevBackend *be; const char *fqdn = NULL; + bool ok; if (strstart(chr->label, "serial", NULL)) { fqdn = "org.qemu.console.serial.0"; @@ -83,8 +84,9 @@ static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) be = chr_spice_backend_new(); be->u.spiceport.data->fqdn = fqdn ? g_strdup(fqdn) : g_strdup_printf("org.qemu.console.%s", chr->label); - vc->parent_open(chr, be, errp); + ok = vc->parent_init(chr, be, errp); qapi_free_ChardevBackend(be); + return ok; } static void vc_chr_set_echo(Chardev *chr, bool echo) @@ -102,7 +104,7 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) VCChardevClass *vc = CHARDEV_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - vc->parent_open = cc->chr_open; + vc->parent_init = cc->chr_open; cc->chr_parse = vc_chr_parse; cc->chr_open = vc_chr_open; diff --git a/ui/vdagent.c b/ui/vdagent.c index 644e9acaaeb..7ff0861f3e9 100644 --- a/ui/vdagent.c +++ b/ui/vdagent.c @@ -660,8 +660,7 @@ static void vdagent_chr_recv_clipboard(VDAgentChardev *vd, VDAgentMessage *msg) /* ------------------------------------------------------------------ */ /* chardev backend */ -static void vdagent_chr_open(Chardev *chr, - ChardevBackend *backend, +static bool vdagent_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VDAgentChardev *vd = QEMU_VDAGENT_CHARDEV(chr); @@ -673,7 +672,7 @@ static void vdagent_chr_open(Chardev *chr, * so we have to byteswap everything on BE hosts. */ error_setg(errp, "vdagent is not supported on bigendian hosts"); - return; + return false; #endif vd->mouse = VDAGENT_MOUSE_DEFAULT; @@ -692,6 +691,7 @@ static void vdagent_chr_open(Chardev *chr, } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void vdagent_clipboard_peer_register(VDAgentChardev *vd) @@ -1074,7 +1074,7 @@ static const VMStateDescription vmstate_vdagent = { } }; -static void vdagent_chr_init(Object *obj) +static void vdagent_chr_instance_init(Object *obj) { VDAgentChardev *vd = QEMU_VDAGENT_CHARDEV(obj); @@ -1097,7 +1097,7 @@ static const TypeInfo vdagent_chr_type_info = { .name = TYPE_CHARDEV_QEMU_VDAGENT, .parent = TYPE_CHARDEV, .instance_size = sizeof(VDAgentChardev), - .instance_init = vdagent_chr_init, + .instance_init = vdagent_chr_instance_init, .instance_finalize = vdagent_chr_fini, .class_init = vdagent_chr_class_init, }; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:38:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:38:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227525.1533922 (Exim 4.92) (envelope-from ) id 1vq9UM-0006t9-1Z; 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s=mimecast20190719; t=1770813070; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F4BORkMGuDDVLyTEyiaLb3JWHa0y/2ix01bD3RCQTgw=; b=Urc/cFFSlS+0b7lP7P8P7QckX8MoYVAIjTfZ46RWompBfKMUUGKdINzC1obsE9S1nfMx2J 8QaYKt/dERgVa/McKblivwk6SPDwYDLuMsFJ+9JgQeH+NMcV3z7uITMH9EywWPfGM8OpTM nlVTl48spywIkQn0xlxnbdaL3CNdxB0= X-MC-Unique: qiGiuxj6PlqMG7wbownoNg-1 X-Mimecast-MFC-AGG-ID: qiGiuxj6PlqMG7wbownoNg_1770813067 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 09/14] chardev: introduce .chr_get_pty_name() handler Date: Wed, 11 Feb 2026 16:29:56 +0400 Message-ID: <20260211123007.3569932-10-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: 2wdgSEG2EszoSwDlsMDW-MhjCObKdsC2deyVHNLcFlU_1770813067 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Currently we do two wrong things: 1. Abuse s->filename to get pty_name from it 2. Violate layering with help of CHARDEV_IS_PTY() Let's get rid of both, and introduce correct way to get pty name in generic code, if available. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-9-vsementsov@yandex-team.ru> --- include/chardev/char.h | 7 +++++-- chardev/char-pty.c | 7 +++++++ chardev/char.c | 19 +++++++++++++------ hw/char/xen_console.c | 7 ++++--- 4 files changed, 29 insertions(+), 11 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index e1bf97222b8..ada5529fa6c 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -247,8 +247,6 @@ OBJECT_DECLARE_TYPE(Chardev, ChardevClass, CHARDEV) #define CHARDEV_IS_RINGBUF(chr) \ object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_RINGBUF) -#define CHARDEV_IS_PTY(chr) \ - object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_PTY) struct ChardevClass { ObjectClass parent_class; @@ -308,6 +306,9 @@ struct ChardevClass { void (*chr_be_event)(Chardev *s, QEMUChrEvent event); void (*chr_listener_cleanup)(Chardev *chr); + + /* return PTY name if available */ + char *(*chr_get_pty_name)(Chardev *s); }; Chardev *qemu_chardev_new(const char *id, const char *typename, @@ -322,4 +323,6 @@ GSource *qemu_chr_timeout_add_ms(Chardev *chr, guint ms, void suspend_mux_open(void); void resume_mux_open(void); +char *qemu_chr_get_pty_name(Chardev *chr); + #endif diff --git a/chardev/char-pty.c b/chardev/char-pty.c index a582aa7bc73..047aade09e5 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -387,6 +387,12 @@ static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) pty->path = g_strdup(path); } +static char *pty_chr_get_pty_name(Chardev *chr) +{ + PtyChardev *s = PTY_CHARDEV(chr); + return g_strdup(s->pty_name); +} + static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); @@ -396,6 +402,7 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) cc->chr_write = pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; + cc->chr_get_pty_name = pty_chr_get_pty_name; } static const TypeInfo char_pty_type_info = { diff --git a/chardev/char.c b/chardev/char.c index 44bfed36272..0dc792b88f7 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -1090,9 +1090,7 @@ ChardevReturn *qmp_chardev_add(const char *id, ChardevBackend *backend, } ret = g_new0(ChardevReturn, 1); - if (CHARDEV_IS_PTY(chr)) { - ret->pty = g_strdup(chr->filename + 4); - } + ret->pty = qemu_chr_get_pty_name(chr); return ret; @@ -1101,6 +1099,17 @@ err: return NULL; } +char *qemu_chr_get_pty_name(Chardev *chr) +{ + ChardevClass *cc = CHARDEV_GET_CLASS(chr); + + if (cc->chr_get_pty_name) { + return cc->chr_get_pty_name(chr); + } + + return NULL; +} + ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, Error **errp) { @@ -1192,9 +1201,7 @@ ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, object_unref(OBJECT(chr_new)); ret = g_new0(ChardevReturn, 1); - if (CHARDEV_IS_PTY(chr_new)) { - ret->pty = g_strdup(chr_new->filename + 4); - } + ret->pty = qemu_chr_get_pty_name(chr_new); return ret; } diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c index 8ee098d9ad4..bdeb76dc870 100644 --- a/hw/char/xen_console.c +++ b/hw/char/xen_console.c @@ -418,6 +418,7 @@ static void xen_console_realize(XenDevice *xendev, Error **errp) XenConsole *con = XEN_CONSOLE_DEVICE(xendev); Chardev *cs = qemu_chr_fe_get_driver(&con->chr); unsigned int u; + g_autofree char *pty_name = NULL; if (!cs) { error_setg(errp, "no backing character device"); @@ -450,9 +451,9 @@ static void xen_console_realize(XenDevice *xendev, Error **errp) trace_xen_console_realize(con->dev, object_get_typename(OBJECT(cs))); - if (CHARDEV_IS_PTY(cs)) { - /* Strip the leading 'pty:' */ - xen_device_frontend_printf(xendev, "tty", "%s", cs->filename + 4); + pty_name = qemu_chr_get_pty_name(cs); + if (pty_name) { + xen_device_frontend_printf(xendev, "tty", "%s", pty_name); } /* No normal PV driver initialization for the primary console under Xen */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:38:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:38:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227526.1533932 (Exim 4.92) (envelope-from ) id 1vq9UT-0007C7-8d; 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s=mimecast20190719; t=1770813067; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=47+h7KsUk4pIeVRSrl5x3R/+mYPfTcUJPXIJdzZh/Nw=; b=MFaYlZbAwjD3Wk5zykf1DRFQ3U3spCBoJv+qMv9A7nwWIJR/q8TFqxVYtsbcOAn2giBMqN rRBtNIrO0yZEQ7qc/zukPoOZBAf+9MOHmn4Pa3pTK+DluZ2K2EPVxrwYHAa5y9U6j/GmCI 995Z6fm+sOu6AYSz1HT8/3xjU/wJqjI= X-MC-Unique: pzo26kLgOTqOlnqtBd77Iw-1 X-Mimecast-MFC-AGG-ID: pzo26kLgOTqOlnqtBd77Iw_1770813062 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 08/14] chardev/char-pty: store pty_name into PtyChardev state Date: Wed, 11 Feb 2026 16:29:55 +0400 Message-ID: <20260211123007.3569932-9-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: vuGF1DX707vTfxUNMgM81DAZPeUC5vI5eVuXPjFZLEo_1770813062 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy We'll use it in following commit. Note the bonus: stop use blind strcpy(). Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-8-vsementsov@yandex-team.ru> --- chardev/char-pty.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 9e26e97baf5..a582aa7bc73 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -43,6 +43,7 @@ struct PtyChardev { int connected; GSource *timer_src; char *path; + char *pty_name; }; typedef struct PtyChardev PtyChardev; @@ -303,7 +304,7 @@ static void cfmakeraw (struct termios *termios_p) #endif /* like openpty() but also makes it raw; return master fd */ -static int qemu_openpty_raw(int *aslave, char *pty_name) +static int qemu_openpty_raw(int *aslave, char **pty_name) { int amaster; struct termios tty; @@ -324,9 +325,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) cfmakeraw(&tty); tcsetattr(*aslave, TCSAFLUSH, &tty); - if (pty_name) { - strcpy(pty_name, q_ptsname(amaster)); - } + *pty_name = g_strdup(q_ptsname(amaster)); return amaster; } @@ -335,11 +334,12 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; - char pty_name[PATH_MAX]; char *name; char *path = backend->u.pty.data->path; - master_fd = qemu_openpty_raw(&slave_fd, pty_name); + s = PTY_CHARDEV(chr); + + master_fd = qemu_openpty_raw(&slave_fd, &s->pty_name); if (master_fd < 0) { error_setg_errno(errp, errno, "Failed to create PTY"); return false; @@ -351,11 +351,10 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) return false; } - chr->filename = g_strdup_printf("pty:%s", pty_name); + chr->filename = g_strdup_printf("pty:%s", s->pty_name); qemu_printf("char device redirected to %s (label %s)\n", - pty_name, chr->label); + s->pty_name, chr->label); - s = PTY_CHARDEV(chr); s->ioc = QIO_CHANNEL(qio_channel_file_new_fd(master_fd)); name = g_strdup_printf("chardev-pty-%s", chr->label); qio_channel_set_name(s->ioc, name); @@ -364,7 +363,7 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) /* create symbolic link */ if (path) { - int res = symlink(pty_name, path); + int res = symlink(s->pty_name, path); if (res != 0) { error_setg_errno(errp, errno, "Failed to create PTY symlink"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:38:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:38:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227527.1533938 (Exim 4.92) (envelope-from ) id 1vq9UT-0007FR-Jl; Wed, 11 Feb 2026 12:38:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227527.1533938; Wed, 11 Feb 2026 12:38:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9UT-0007Ew-Dd; Wed, 11 Feb 2026 12:38:45 +0000 Received: by outflank-mailman (input) for mailman id 1227527; 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Wed, 11 Feb 2026 12:31:24 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 235A318003F6; Wed, 11 Feb 2026 12:31:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9726d49c-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813089; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tpYjeot8p53E9hbudpSJPO+xYO8RwO13MoSHQweyb84=; b=JCG7WAJNXG042yyBVm5YVFFN/Z+jbzpOgc7zl+JEHtffvq0atvsh1G4ZDvXUCmReR0d11+ sA5BsHCy2bqExEb3tXtISy/2gZCyEupkIa65AWpBIYQ7Y1XhbKfu4Lqh/wJFbTMYpoSskN NFE1OU75Ne+ii/MCHlW23UBkiIJYn00= X-MC-Unique: O6N5zASFObGpSC7yEto7wA-1 X-Mimecast-MFC-AGG-ID: O6N5zASFObGpSC7yEto7wA_1770813084 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 12/14] char: qemu_chr_write_log() use qemu_write_full() Date: Wed, 11 Feb 2026 16:29:59 +0400 Message-ID: <20260211123007.3569932-13-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: v9CM-dJxE4MCY49_nCw6IidR9wKR_S89aum6RIxiPi4_1770813084 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy logfd is blocking, so we don't need to care about EAGAIN. Let's simply use qemu_write_full(). Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-2-vsementsov@yandex-team.ru> --- chardev/char.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/chardev/char.c b/chardev/char.c index 5d00cac2f31..4b285baf029 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -82,29 +82,17 @@ void qemu_chr_be_event(Chardev *s, QEMUChrEvent event) CHARDEV_GET_CLASS(s)->chr_be_event(s, event); } -/* Not reporting errors from writing to logfile, as logs are - * defined to be "best effort" only */ static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) { - size_t done = 0; - ssize_t ret; - if (s->logfd < 0) { return; } - while (done < len) { - retry: - ret = write(s->logfd, buf + done, len - done); - if (ret == -1 && errno == EAGAIN) { - g_usleep(100); - goto retry; - } - - if (ret <= 0) { - return; - } - done += ret; + if (qemu_write_full(s->logfd, buf, len) < len) { + /* + * qemu_write_full() is defined with G_GNUC_WARN_UNUSED_RESULT, + * but logging is best‑effort, we do ignore errors. + */ } } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:38:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:38:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227533.1533951 (Exim 4.92) (envelope-from ) id 1vq9Ub-0007px-Oz; Wed, 11 Feb 2026 12:38:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227533.1533951; Wed, 11 Feb 2026 12:38:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Ub-0007pm-M0; Wed, 11 Feb 2026 12:38:53 +0000 Received: by outflank-mailman (input) for mailman id 1227533; Wed, 11 Feb 2026 12:38:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Nd-0001nh-NG for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:31:41 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9d4dced9-0745-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 13:31:41 +0100 (CET) Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-68-WIujemrANsyyw5L1QkdvYg-1; Wed, 11 Feb 2026 07:31:36 -0500 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id C10951955F27; Wed, 11 Feb 2026 12:31:34 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 7D7B130001BF; Wed, 11 Feb 2026 12:31:33 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9d4dced9-0745-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813099; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oafPsMhhX2LYktt1mZytvPrd7reHuMI6cpisN3UVjHk=; b=aj445UeDgTtmkriiBG7dMmAJdELD6NkG3uNoUrYCkXLQeRhs/lu2oggiW//LVwmuDYX8yX s2uVXbaRM27ZmXdwLVlJWoxOBC+YZ2h2GJ3mTqXfwoQg/+fncAq2fneyq1de2EX0h0EVMQ B0L70j63ZFcaaIbKdoIWj0aQfzmc5iE= X-MC-Unique: WIujemrANsyyw5L1QkdvYg-1 X-Mimecast-MFC-AGG-ID: WIujemrANsyyw5L1QkdvYg_1770813094 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 14/14] chardev: add logtimestamp option Date: Wed, 11 Feb 2026 16:30:01 +0400 Message-ID: <20260211123007.3569932-15-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: dZjaz2DoEH78eRcqwCgXQ2BHDfDWB1jtulChYzIupms_1770813094 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Add an option to inject timestamps into serial log file. That simplifies debugging a lot, when you can simply compare QEMU logs with guest console logs. Signed-off-by: Vladimir Sementsov-Ogievskiy Acked-by: Markus Armbruster Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-4-vsementsov@yandex-team.ru> --- qapi/char.json | 6 +++- include/chardev/char.h | 2 ++ chardev/char.c | 63 ++++++++++++++++++++++++++++++++++++++---- 3 files changed, 65 insertions(+), 6 deletions(-) diff --git a/qapi/char.json b/qapi/char.json index 140614f82c3..a4abafa6803 100644 --- a/qapi/char.json +++ b/qapi/char.json @@ -197,11 +197,15 @@ # @logappend: true to append instead of truncate (default to false to # truncate) # +# @logtimestamp: true to insert timestamps into logfile +# (default false) (since 11.0) +# # Since: 2.6 ## { 'struct': 'ChardevCommon', 'data': { '*logfile': 'str', - '*logappend': 'bool' } } + '*logappend': 'bool', + '*logtimestamp': 'bool' } } ## # @ChardevFile: diff --git a/include/chardev/char.h b/include/chardev/char.h index 81bc0cbdf2a..c2c42e4b7a3 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -63,6 +63,8 @@ struct Chardev { CharFrontend *fe; char *label; int logfd; + bool logtimestamp; + bool log_line_start; int be_open; /* used to coordinate the chardev-change special-case: */ bool handover_yank_instance; diff --git a/chardev/char.c b/chardev/char.c index 4b285baf029..48b326d57b9 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -82,12 +82,8 @@ void qemu_chr_be_event(Chardev *s, QEMUChrEvent event) CHARDEV_GET_CLASS(s)->chr_be_event(s, event); } -static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) +static void do_write_log(Chardev *s, const uint8_t *buf, size_t len) { - if (s->logfd < 0) { - return; - } - if (qemu_write_full(s->logfd, buf, len) < len) { /* * qemu_write_full() is defined with G_GNUC_WARN_UNUSED_RESULT, @@ -96,6 +92,55 @@ static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) } } +static void do_write_log_timestamps(Chardev *s, const uint8_t *buf, size_t len) +{ + g_autofree char *timestr = NULL; + + while (len) { + size_t i; + + if (s->log_line_start) { + if (!timestr) { + timestr = real_time_iso8601(); + } + do_write_log(s, (const uint8_t *)timestr, strlen(timestr)); + do_write_log(s, (const uint8_t *)" ", 1); + s->log_line_start = false; + } + + for (i = 0; i < len; i++) { + if (buf[i] == '\n') { + break; + } + } + + if (i == len) { + /* not found \n */ + do_write_log(s, buf, len); + return; + } + + i += 1; + do_write_log(s, buf, i); + buf += i; + len -= i; + s->log_line_start = true; + } +} + +static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) +{ + if (s->logfd < 0) { + return; + } + + if (s->logtimestamp) { + do_write_log_timestamps(s, buf, len); + } else { + do_write_log(s, buf, len); + } +} + static int qemu_chr_write_buffer(Chardev *s, const uint8_t *buf, int len, int *offset, bool write_all) @@ -248,6 +293,7 @@ static bool qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) } else { flags |= O_TRUNC; } + chr->logtimestamp = common->has_logtimestamp && common->logtimestamp; chr->logfd = qemu_create(common->logfile, flags, 0666, errp); if (chr->logfd < 0) { return false; @@ -267,6 +313,7 @@ static void char_init(Object *obj) chr->handover_yank_instance = false; chr->logfd = -1; + chr->log_line_start = true; qemu_mutex_init(&chr->chr_write_lock); /* @@ -505,6 +552,9 @@ void qemu_chr_parse_common(QemuOpts *opts, ChardevCommon *backend) backend->logfile = g_strdup(logfile); backend->has_logappend = true; backend->logappend = qemu_opt_get_bool(opts, "logappend", false); + + backend->has_logtimestamp = true; + backend->logtimestamp = qemu_opt_get_bool(opts, "logtimestamp", false); } static const ChardevClass *char_get_class(const char *driver, Error **errp) @@ -956,6 +1006,9 @@ QemuOptsList qemu_chardev_opts = { },{ .name = "logappend", .type = QEMU_OPT_BOOL, + },{ + .name = "logtimestamp", + .type = QEMU_OPT_BOOL, },{ .name = "mouse", .type = QEMU_OPT_BOOL, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:39:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:39:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227541.1533962 (Exim 4.92) (envelope-from ) id 1vq9Uj-0008LW-8q; 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s=mimecast20190719; t=1770813078; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NawPSV0+R7Z6iBTNYDG41PH3COFdnG/VW+iZ15ECL/g=; b=JZK+gZdIa7y5dr69Q073QF37R/hEdLi4fSXYoQcPO1Pc15qw3QNmqBjZCu7XufmwNLMsO2 dRmvFtvEwU+FQJg8EnBYvCwGpxkMUn/KkTtg4gNjE0F7bbPF9QcPtWkSFs1L19PKwhN0QG grcnVbkQRyQcpqYvCAbcd1YXanuMRws= X-MC-Unique: vuGe2ZcvOIGOm3x7YZ09mA-1 X-Mimecast-MFC-AGG-ID: vuGe2ZcvOIGOm3x7YZ09mA_1770813074 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 10/14] chardev: rework filename handling Date: Wed, 11 Feb 2026 16:29:57 +0400 Message-ID: <20260211123007.3569932-11-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: c-_Sek1T2OdFJX7Kp4aPVImd5YgfiBwkExksSBCdhrc_1770813074 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Instead of checking, did backend set the filename state or not, let's be stateless: filename is needed rarely, so, let's just have a generic function (with optional implementation by backends) to get it. Signed-off-by: Vladimir Sementsov-Ogievskiy [ Marc-André - fix leak in ivshmem-pci.c ] Signed-off-by: Marc-André Lureau Message-Id: <20260115144606.233252-10-vsementsov@yandex-team.ru> --- include/chardev/char.h | 5 ++++- chardev/char-pty.c | 8 +++++++- chardev/char-socket.c | 31 ++++++++++++------------------- chardev/char.c | 21 +++++++++++++++------ hw/misc/ivshmem-pci.c | 7 ++++--- 5 files changed, 42 insertions(+), 30 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index ada5529fa6c..81bc0cbdf2a 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -62,7 +62,6 @@ struct Chardev { QemuMutex chr_write_lock; CharFrontend *fe; char *label; - char *filename; int logfd; int be_open; /* used to coordinate the chardev-change special-case: */ @@ -309,6 +308,9 @@ struct ChardevClass { /* return PTY name if available */ char *(*chr_get_pty_name)(Chardev *s); + + /* get filename for reporting */ + char *(*chr_get_filename)(Chardev *s); }; Chardev *qemu_chardev_new(const char *id, const char *typename, @@ -324,5 +326,6 @@ void suspend_mux_open(void); void resume_mux_open(void); char *qemu_chr_get_pty_name(Chardev *chr); +char *qemu_chr_get_filename(Chardev *chr); #endif diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 047aade09e5..7e95132cdbb 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -351,7 +351,6 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) return false; } - chr->filename = g_strdup_printf("pty:%s", s->pty_name); qemu_printf("char device redirected to %s (label %s)\n", s->pty_name, chr->label); @@ -393,6 +392,12 @@ static char *pty_chr_get_pty_name(Chardev *chr) return g_strdup(s->pty_name); } +static char *pty_chr_get_filename(Chardev *chr) +{ + PtyChardev *s = PTY_CHARDEV(chr); + return g_strdup_printf("pty:%s", s->pty_name); +} + static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); @@ -403,6 +408,7 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; cc->chr_get_pty_name = pty_chr_get_pty_name; + cc->chr_get_filename = pty_chr_get_filename; } static const TypeInfo char_pty_type_info = { diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 908bbdbc124..5adeb908659 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -40,6 +40,7 @@ static gboolean socket_reconnect_timeout(gpointer opaque); static void tcp_chr_telnet_init(Chardev *chr); +static char *qemu_chr_compute_filename(SocketChardev *s); static void tcp_chr_change_state(SocketChardev *s, TCPChardevState state) { @@ -384,8 +385,6 @@ static void tcp_chr_free_connection(Chardev *chr) s->sioc = NULL; object_unref(OBJECT(s->ioc)); s->ioc = NULL; - g_free(chr->filename); - chr->filename = NULL; tcp_chr_change_state(s, TCP_CHARDEV_STATE_DISCONNECTED); } @@ -439,16 +438,17 @@ static char *qemu_chr_socket_address(SocketChardev *s, const char *prefix) } } -static void update_disconnected_filename(SocketChardev *s) +static char *tcp_chr_get_filename(Chardev *chr) { - Chardev *chr = CHARDEV(s); + SocketChardev *s = SOCKET_CHARDEV(chr); - g_free(chr->filename); - if (s->addr) { - chr->filename = qemu_chr_socket_address(s, "disconnected:"); - } else { - chr->filename = g_strdup("disconnected:socket"); + if (s->state == TCP_CHARDEV_STATE_CONNECTED) { + return qemu_chr_compute_filename(s); + } else if (s->addr) { + return qemu_chr_socket_address(s, "disconnected:"); } + + return g_strdup("disconnected:socket"); } /* NB may be called even if tcp_chr_connect has not been @@ -468,7 +468,6 @@ static void tcp_chr_disconnect_locked(Chardev *chr) qio_net_listener_set_client_func_full(s->listener, tcp_chr_accept, chr, NULL, chr->gcontext); } - update_disconnected_filename(s); if (emit_close) { qemu_chr_be_event(chr, CHR_EVENT_CLOSED); } @@ -639,9 +638,6 @@ static void tcp_chr_connect(void *opaque) Chardev *chr = CHARDEV(opaque); SocketChardev *s = SOCKET_CHARDEV(opaque); - g_free(chr->filename); - chr->filename = qemu_chr_compute_filename(s); - tcp_chr_change_state(s, TCP_CHARDEV_STATE_CONNECTED); update_ioc_handlers(s); qemu_chr_be_event(chr, CHR_EVENT_OPENED); @@ -1000,8 +996,8 @@ static void tcp_chr_accept_server_sync(Chardev *chr) { SocketChardev *s = SOCKET_CHARDEV(chr); QIOChannelSocket *sioc; - info_report("QEMU waiting for connection on: %s", - chr->filename); + g_autofree char *filename = qemu_chr_get_filename(chr); + info_report("QEMU waiting for connection on: %s", filename); tcp_chr_change_state(s, TCP_CHARDEV_STATE_CONNECTING); sioc = qio_net_listener_wait_client(s->listener); tcp_chr_set_client_ioc_name(chr, sioc); @@ -1258,8 +1254,6 @@ static int qmp_chardev_open_socket_server(Chardev *chr, s->addr = qio_net_listener_get_local_address(s->listener, 0, errp); skip_listen: - update_disconnected_filename(s); - if (is_waitconnect) { tcp_chr_accept_server_sync(chr); } else { @@ -1436,8 +1430,6 @@ static bool tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) } s->registered_yank = true; - update_disconnected_filename(s); - if (s->is_listen) { if (qmp_chardev_open_socket_server(chr, is_telnet || is_tn3270, is_waitconnect, errp) < 0) { @@ -1593,6 +1585,7 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; cc->chr_listener_cleanup = tcp_chr_listener_cleanup; + cc->chr_get_filename = tcp_chr_get_filename; object_class_property_add(oc, "addr", "SocketAddress", char_socket_get_addr, NULL, diff --git a/chardev/char.c b/chardev/char.c index 0dc792b88f7..3373c9b61f8 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -309,7 +309,6 @@ static void char_finalize(Object *obj) if (chr->fe) { chr->fe->chr = NULL; } - g_free(chr->filename); g_free(chr->label); if (chr->logfd != -1) { close(chr->logfd); @@ -796,7 +795,7 @@ static int qmp_query_chardev_foreach(Object *obj, void *data) ChardevInfo *value = g_malloc0(sizeof(*value)); value->label = g_strdup(chr->label); - value->filename = g_strdup(chr->filename); + value->filename = qemu_chr_get_filename(chr); value->frontend_open = chr->fe && chr->fe->fe_is_open; QAPI_LIST_PREPEND(*list, value); @@ -1025,10 +1024,6 @@ static Chardev *chardev_new(const char *id, const char *typename, return NULL; } - if (!chr->filename) { - chr->filename = g_strdup(typename + 8); - } - return chr; } @@ -1110,6 +1105,20 @@ char *qemu_chr_get_pty_name(Chardev *chr) return NULL; } +char *qemu_chr_get_filename(Chardev *chr) +{ + ChardevClass *cc = CHARDEV_GET_CLASS(chr); + const char *typename; + + if (cc->chr_get_filename) { + return cc->chr_get_filename(chr); + } + + typename = object_get_typename(OBJECT(chr)); + assert(g_str_has_prefix(typename, "chardev-")); + return g_strdup(typename + 8); +} + ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, Error **errp) { diff --git a/hw/misc/ivshmem-pci.c b/hw/misc/ivshmem-pci.c index b9162589a02..a3a43f53bd1 100644 --- a/hw/misc/ivshmem-pci.c +++ b/hw/misc/ivshmem-pci.c @@ -873,10 +873,11 @@ static void ivshmem_common_realize(PCIDevice *dev, Error **errp) host_memory_backend_set_mapped(s->hostmem, true); } else { Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr); - assert(chr); + g_autofree char *filename = NULL; - IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", - chr->filename); + assert(chr); + filename = qemu_chr_get_filename(chr); + IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", filename); /* we allocate enough space for 16 peers and grow as needed */ resize_peers(s, 16); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:39:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:39:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227555.1533973 (Exim 4.92) (envelope-from ) id 1vq9Uy-0000l2-Ir; Wed, 11 Feb 2026 12:39:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227555.1533973; Wed, 11 Feb 2026 12:39:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Uy-0000kt-D6; Wed, 11 Feb 2026 12:39:16 +0000 Received: by outflank-mailman (input) for mailman id 1227555; Wed, 11 Feb 2026 12:39:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9No-0001nh-6p for xen-devel@lists.xenproject.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit From: Hou Wenlong [ Upstream commit db9aded979b491a24871e1621cd4e8822dbca859 ] The PVH entry is available for 32-bit KVM guests, and 32-bit KVM guests do not depend on CONFIG_X86_PAE. However, mk_early_pgtbl_32() builds different pagetables depending on whether CONFIG_X86_PAE is set. Therefore, enabling PAE mode for 32-bit KVM guests without CONFIG_X86_PAE being set would result in a boot failure during CR3 loading. Signed-off-by: Hou Wenlong Reviewed-by: Juergen Gross Signed-off-by: Juergen Gross Message-ID: Signed-off-by: Sasha Levin --- LLM Generated explanations, may be completely bogus: Now I have all the information needed for a complete analysis. --- ## Detailed Analysis ### 1. Commit Message Analysis The subject clearly states the problem: PAE mode is being unconditionally enabled for all PVH guests, but for 32-bit guests it should only be enabled when `CONFIG_X86_PAE` is set. The commit message explicitly describes a **boot failure** scenario: loading CR3 fails when the page table format doesn't match the CPU's paging mode expectation. The commit is: - Reviewed by Juergen Gross (Xen subsystem maintainer) - Signed off by Juergen Gross (subsystem maintainer sign-off) ### 2. Code Change Analysis **The Bug Mechanism:** The PVH entry path in `arch/x86/platform/pvh/head.S` is the boot entry point for PVH (Para-Virtualized Hardware) guests, used by Xen and KVM. The flow is: 1. **Line 94-97** (before fix): PAE mode is unconditionally enabled in CR4: ```94:97:arch/x86/platform/pvh/head.S /* Enable PAE mode. */ mov %cr4, %eax orl $X86_CR4_PAE, %eax mov %eax, %cr4 ``` 2. For **64-bit** guests (`CONFIG_X86_64`), this is correct — PAE is always needed as a prerequisite for long mode (line 99-104). 3. For **32-bit** guests (the `#else` path starting at line 196), the code calls `mk_early_pgtbl_32()` to build early page tables: ```196:205:arch/x86/platform/pvh/head.S #else /* CONFIG_X86_64 */ call mk_early_pgtbl_32 mov $_pa(initial_page_table), %eax mov %eax, %cr3 mov %cr0, %eax or $(X86_CR0_PG | X86_CR0_PE), %eax mov %eax, %cr0 ``` 4. `mk_early_pgtbl_32()` in `arch/x86/kernel/head32.c` builds **fundamentally different** page table structures depending on `CONFIG_X86_PAE`: ```95:103:arch/x86/kernel/head32.c #ifdef CONFIG_X86_PAE typedef pmd_t pl2_t; #define pl2_base initial_pg_pmd #define SET_PL2(val) { .pmd = (val), } #else typedef pgd_t pl2_t; #define pl2_base initial_page_table #define SET_PL2(val) { .pgd = (val), } #endif ``` - With `CONFIG_X86_PAE`: Builds **3-level PAE page tables** (PGDIR_SHIFT=30, uses PMDs + PDPTEs) - Without `CONFIG_X86_PAE`: Builds **2-level non-PAE page tables** (PGDIR_SHIFT=22, uses PGDs directly) **The crash**: When PAE is enabled in CR4 but non-PAE page tables are loaded into CR3, the CPU interprets the 2-level page directory as a PAE PDPT (Page Directory Pointer Table). When paging is activated (CR0.PG=1), the processor tries to load the PDPTE entries from the address in CR3. The non-PAE page directory entries are completely incompatible with PAE PDPTE format, causing a **#GP fault or triple fault**, resulting in an immediate boot failure. **The Fix:** Simply wrapping the PAE enablement with proper `#ifdef` guards: ```asm #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) /* Enable PAE mode. */ mov %cr4, %eax orl $X86_CR4_PAE, %eax mov %eax, %cr4 #endif ``` This ensures PAE is only enabled when: - `CONFIG_X86_64` is set (64-bit always needs PAE for long mode), or - `CONFIG_X86_PAE` is set (32-bit with PAE — page tables match) Note that the 32-bit path at lines 212-220 already has code to disable PAE before jumping to `startup_32`, which confirms the original author was aware that PAE and non-PAE modes exist, but the initial enablement was not properly guarded. ### 3. Classification This is a **boot failure fix**. It's not a feature, cleanup, or optimization. It fixes a configuration where a 32-bit PVH guest without `CONFIG_X86_PAE` completely fails to boot. ### 4. Scope and Risk Assessment - **Lines changed**: 2 lines added (`#if defined(...)` and `#endif`), 0 lines removed - **Files touched**: 1 (`arch/x86/platform/pvh/head.S`) - **Complexity**: Minimal — conditional compilation guard - **Risk**: Extremely low - For `CONFIG_X86_64`: No change (the `#if` is always true) - For `CONFIG_X86_32` with `CONFIG_X86_PAE`: No change (the `#if` is true) - For `CONFIG_X86_32` without `CONFIG_X86_PAE`: PAE is no longer enabled, matching the page table format — this is the bug fix - **Regression potential**: Near zero. The only behavioral change is for the broken configuration that currently crashes. ### 5. User Impact - **Who is affected**: Anyone running a 32-bit kernel without PAE as a PVH/KVM guest. This is a legitimate configuration since `config PVH` has no dependency on `CONFIG_X86_PAE` or `CONFIG_X86_64`. - **Severity**: Complete boot failure — the system cannot boot at all - **Workaround**: Users must enable `CONFIG_X86_PAE` for 32-bit PVH guests, which may not be obvious and adds unnecessary configuration constraints ### 6. Stability Indicators - **Reviewed-by**: Juergen Gross (Xen subsystem maintainer) — very strong indicator - **Signed-off-by**: Juergen Gross (accepted through the Xen tree) - The fix is trivially correct by inspection — when `CONFIG_X86_PAE` is not set, enabling PAE in CR4 is wrong because the page tables aren't in PAE format ### 7. Dependency Check - **No dependencies** on other patches — this is a completely self- contained fix - The affected code (`pvh_start_xen` with the unconditional PAE enablement) exists in **all current stable trees** (confirmed present from v5.4 through v6.12) - The fix context is slightly different in older stable trees (e.g., `rep\n movsl` vs `rep movsl`, PIC vs absolute addressing), so minor backport adjustments may be needed for older trees, but the fix itself (adding `#if`/`#endif` around the PAE lines) is trivial to adapt ### 8. Conclusion This is a textbook stable kernel fix: - **Fixes a real, severe bug**: Complete boot failure for a valid kernel configuration - **Obviously correct**: The fix is a 2-line conditional compilation guard that makes PAE enablement match page table format - **Small and contained**: 2 lines added to 1 file - **No new features**: Just correctness fix - **No risk of regression**: Only changes behavior for the currently- broken configuration - **Present in all stable trees**: The bug has existed since the original PVH commit (v4.11, 2017) - **Reviewed by subsystem maintainer**: Juergen Gross **YES** arch/x86/platform/pvh/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S index 344030c1a81d4..53ee2d53fcf8e 100644 --- a/arch/x86/platform/pvh/head.S +++ b/arch/x86/platform/pvh/head.S @@ -91,10 +91,12 @@ SYM_CODE_START(pvh_start_xen) leal rva(early_stack_end)(%ebp), %esp +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) /* Enable PAE mode. */ mov %cr4, %eax orl $X86_CR4_PAE, %eax mov %eax, %cr4 +#endif #ifdef CONFIG_X86_64 /* Enable Long mode. */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 12:39:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 12:39:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227568.1533982 (Exim 4.92) (envelope-from ) id 1vq9VD-0001Vh-Nx; Wed, 11 Feb 2026 12:39:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227568.1533982; Wed, 11 Feb 2026 12:39:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9VD-0001VY-L1; Wed, 11 Feb 2026 12:39:31 +0000 Received: by outflank-mailman (input) for mailman id 1227568; Wed, 11 Feb 2026 12:39:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9Nc-00016c-Eb for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 12:31:40 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9a39f093-0745-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 13:31:35 +0100 (CET) Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-676-FYZ-7oebMfKy2oSzbnuHug-1; Wed, 11 Feb 2026 07:31:31 -0500 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 69E491800282; Wed, 11 Feb 2026 12:31:29 +0000 (UTC) Received: from localhost (unknown [10.45.242.6]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 6BED718003F6; Wed, 11 Feb 2026 12:31:27 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9a39f093-0745-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770813094; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jM55cKZhaLYd8jeB1eDli6p7CvLSuDmkHDqz2KhxR1g=; b=Z7IMSXpWHfPCAklRvbAXDGpqlE3WPHcKlTdLoAdhMGVjXTC5vuf0Skqeco+9BFVteyDHIj l3MRUVOWEcF+q7274Wwckr5uWAizJl0dliCbrCWYfLSh0xyGZUsXWYWxd7xUiEVVkppFUn FXPqVzBDCWDe/es0zo3diq3X5X+awb4= X-MC-Unique: FYZ-7oebMfKy2oSzbnuHug-1 X-Mimecast-MFC-AGG-ID: FYZ-7oebMfKy2oSzbnuHug_1770813089 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: Eduardo Habkost , xen-devel@lists.xenproject.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Stabellini , Paul Durrant , Vladimir Sementsov-Ogievskiy Subject: [PULL 13/14] error-report: make real_time_iso8601() public Date: Wed, 11 Feb 2026 16:30:00 +0400 Message-ID: <20260211123007.3569932-14-marcandre.lureau@redhat.com> In-Reply-To: <20260211123007.3569932-1-marcandre.lureau@redhat.com> References: <20260211123007.3569932-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: A5TDt3lip-DGrywrDOD_YuOtJw35bjfLameypk1uEFI_1770813089 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy To be reused in the following commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Markus Armbruster Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-3-vsementsov@yandex-team.ru> --- include/qemu/error-report.h | 6 ++++++ util/error-report.c | 3 +-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/qemu/error-report.h b/include/qemu/error-report.h index 3ae2357fda5..dc423d36071 100644 --- a/include/qemu/error-report.h +++ b/include/qemu/error-report.h @@ -74,4 +74,10 @@ extern bool message_with_timestamp; extern bool error_with_guestname; extern const char *error_guest_name; +/* + * Return current datetime in ISO 8601 format. + * Caller is responsible to g_free() the returned string. + */ +char *real_time_iso8601(void); + #endif diff --git a/util/error-report.c b/util/error-report.c index 1b17c11de19..d6b7448183a 100644 --- a/util/error-report.c +++ b/util/error-report.c @@ -169,8 +169,7 @@ static void print_loc(void) } } -static char * -real_time_iso8601(void) +char *real_time_iso8601(void) { g_autoptr(GDateTime) dt = g_date_time_new_now_utc(); return g_date_time_format_iso8601(dt); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 13:07:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 13:07:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227604.1533992 (Exim 4.92) (envelope-from ) id 1vq9w8-0000KX-Q7; Wed, 11 Feb 2026 13:07:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227604.1533992; Wed, 11 Feb 2026 13:07:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9w8-0000KQ-NE; Wed, 11 Feb 2026 13:07:20 +0000 Received: by outflank-mailman (input) for mailman id 1227604; Wed, 11 Feb 2026 13:07:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vq9w6-0000KK-Uu for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 13:07:18 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 96af9854-074a-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 14:07:16 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso19113015e9.1 for ; Wed, 11 Feb 2026 05:07:16 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 05:07:15 -0800 (PST) Message-ID: <3f1e043f-2cd1-43a3-9ec9-9323c133d8d1@suse.com> Date: Wed, 11 Feb 2026 14:07:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] xen/tools: remove usages of `stat -s` in check-endbr.sh To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , xen-devel@lists.xenproject.org References: <20260211104638.7938-1-roger.pau@citrix.com> <20260211104638.7938-3-roger.pau@citrix.com> <35bdb10b-d39d-4e67-9ed8-c0b85ca5bd54@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.02.2026 13:24, Roger Pau Monné wrote: > On Wed, Feb 11, 2026 at 12:40:58PM +0100, Jan Beulich wrote: >> On 11.02.2026 11:46, Roger Pau Monne wrote: >>> --- a/xen/tools/check-endbr.sh >>> +++ b/xen/tools/check-endbr.sh >>> @@ -92,14 +92,15 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & >>> # check nevertheless. >>> # >>> eval $(${OBJDUMP} -j .text $1 -h | >>> - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') >>> + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') >>> >>> -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN >>> - >>> -bin_sz=$(stat -c '%s' $TEXT_BIN) >>> +# Convert objdump hex reported .text size to decimal >>> +bin_sz=$(printf %u $bin_sz) >> >> (Alternatively without this line, but ... >> >>> [ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && >> >> [ "$(($bin_sz))" -ge $(((1 << 28) - $vma_lo)) ] && >> >> ?) > > Isn't that bash-specific functionality? The script interpreter is set > as /bin/sh. I, too, would have thought so, but then the rhs of the -ge already used $((...)). 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The script interpreter is set > > as /bin/sh. > > I, too, would have thought so, but then the rhs of the -ge already used $((...)). OK, yes, I didn't realize those existing usages. Now that I look at it it does seem to have a bunch of other bashisms, for example parameter expansion. I will adjust that plus the commit message and take your RB. Thanks, Roger. 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Wed, 11 Feb 2026 05:34:26 -0800 (PST) MIME-Version: 1.0 References: <5331b33343441028d10c290b21b82acce295fff0.1770115302.git.bertrand.marquis@arm.com> <26A3747F-0313-437F-B461-F5C70CE1A4F1@arm.com> In-Reply-To: <26A3747F-0313-437F-B461-F5C70CE1A4F1@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 14:34:14 +0100 X-Gm-Features: AZwV_Qh6FQSYvVJe-MQ-Zkout2bZDAegCvLXVbX6lQe7lBf9TNxTcIBHsJ7pfv8 Message-ID: Subject: Re: [PATCH 08/12] xen/arm: ffa: Fix FFA_FEATURES validation To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 12:27=E2=80=AFPM Bertrand Marquis wrote: > > Hi Jens, > > > On 11 Feb 2026, at 09:17, Jens Wiklander wr= ote: > > > > Hi Bertrand, > > > > On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis > > wrote: > >> > >> FFA_FEATURES currently accepts non-zero input properties (w2-w7) from > >> guests and advertises several ABIs unconditionally, even when firmware > >> support is missing or when the ABI is physical-instance-only. This can > >> mislead guests about what Xen can actually provide and violates FF-A > >> calling conventions. Some SPMCs (Hafnium v2.14 or earlier) also fail t= o > >> report FFA_RX_ACQUIRE despite supporting it. > >> > >> Update FFA_FEATURES validation to match spec and firmware support: > >> - reject non-zero w2-w7 input properties with INVALID_PARAMETERS > >> - reject 64-bit calling conventions from 32-bit guests with NOT_SUPPOR= TED > >> - return NOT_SUPPORTED for physical-instance-only ABIs > >> (FFA_NOTIFICATION_BITMAP_{CREATE,DESTROY}, FFA_RX_ACQUIRE) > >> - advertise FFA_INTERRUPT as supported > >> - gate message ABIs on firmware support: > >> - FFA_MSG_SEND_DIRECT_REQ_{32,64} > >> - FFA_MSG_SEND_DIRECT_REQ2 (also requires FF-A 1.2 negotiation) > >> - FFA_MSG_SEND2 (or VM-to-VM enabled) > >> - report MEM_SHARE_{32,64} only when FFA_MEM_SHARE_64 is supported > >> - stop advertising FFA_MSG_YIELD (not implemented) > >> > >> Update firmware probing: drop FFA_MEM_SHARE_32 checks (deprecated) and > >> add FFA_RX_ACQUIRE to the probed set. If FFA_MSG_SEND2 is reported but > >> FFA_RX_ACQUIRE is not, assume RX_ACQUIRE support and warn to work > >> around the Hafnium bug. > >> > >> Functional impact: guests now see ABI support that reflects firmware > >> capabilities and Xen implementation status. When SEND2 is present but > >> RX_ACQUIRE is not reported, Xen assumes RX_ACQUIRE support. > >> > >> Signed-off-by: Bertrand Marquis > >> --- > >> xen/arch/arm/tee/ffa.c | 62 +++++++++++++++++++++++++++++++++++++----- > >> 1 file changed, 55 insertions(+), 7 deletions(-) > >> > >> diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > >> index 6de2b9f8ac8e..e9e020bb0cb3 100644 > >> --- a/xen/arch/arm/tee/ffa.c > >> +++ b/xen/arch/arm/tee/ffa.c > >> @@ -91,10 +91,10 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[]= =3D { > >> FW_ABI(FFA_PARTITION_INFO_GET), > >> FW_ABI(FFA_NOTIFICATION_INFO_GET_64), > >> FW_ABI(FFA_NOTIFICATION_GET), > >> + FW_ABI(FFA_RX_ACQUIRE), > >> FW_ABI(FFA_RX_RELEASE), > >> FW_ABI(FFA_RXTX_MAP_64), > >> FW_ABI(FFA_RXTX_UNMAP), > >> - FW_ABI(FFA_MEM_SHARE_32), > >> FW_ABI(FFA_MEM_SHARE_64), > >> FW_ABI(FFA_MEM_RECLAIM), > >> FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32), > >> @@ -240,19 +240,39 @@ static void handle_features(struct cpu_user_regs= *regs) > >> struct ffa_ctx *ctx =3D d->arch.tee; > >> unsigned int n; > >> > >> + /* > >> + * Xen does not accept any non-zero FFA_FEATURES input properties= from > >> + * VMs. The spec only defines w2 input properties for FFA_MEM_RET= RIEVE_REQ > >> + * (NS-bit negotiation for SP/SPMC) and FFA_RXTX_MAP (buffer size= and > >> + * alignment), so w2 must be MBZ for our callers. > >> + */ > > > > The spec (version 1.2) lists them as SBZ, except for w2, which is MBZ, > > for Feature IDs. > > Very true, this should only check w2 which is anyway defined as MBZ when > not used. > w3-w7 were MBZ in previous versions of FF-A but are in fact SBZ in 1.2 so > we should ignore them > > > However, if we're to return an error, invalid parameters is a better ch= oice. > > In fact the spec is actually saying the following: > If the FF-A interface or feature that was queried is not implemented or i= nvalid, > the callee completes this call with an invocation of the FFA_ERROR interf= ace > with the NOT_SUPPORTED error code. > > So there is no case for INVALID_PARAMETER. You're right. > > So in fact i should: > - return NOT_SUPPORTED if w2 is not 0 > - ignore w3-w7 > > Can you confirm that you have the same reading of the spec than me ? The 1.2 spec only says this w2 is MBZ for Feature IDs, and that w2 is SBZ for FFA_RXTX_MAP. The 1.3 spec says the same, except that in Table 13.14: Feature IDs and properties table, it lists w2 as SBZ. Note that FFA_MEM_RETRIEVE_REQ has bits defined in w2, and the unknown bits are SBZ. Based on that, I'm inclined to keep it simple and ignore w2-w7. Cheers, Jens From xen-devel-bounces@lists.xenproject.org Wed Feb 11 13:36:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 13:36:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227653.1534078 (Exim 4.92) (envelope-from ) id 1vqAOm-0001Yq-3z; Wed, 11 Feb 2026 13:36:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227653.1534078; Wed, 11 Feb 2026 13:36:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqAOm-0001Yj-0e; Wed, 11 Feb 2026 13:36:56 +0000 Received: by outflank-mailman (input) for mailman id 1227653; Wed, 11 Feb 2026 13:36:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqAOk-0001Yd-Qn for xen-devel@lists.xenproject.org; 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Wed, 11 Feb 2026 05:36:52 -0800 (PST) MIME-Version: 1.0 References: <209e5474e236737dd13e0f7ff8120b05cdb7eabe.1770115302.git.bertrand.marquis@arm.com> <7B367F9A-37E3-4157-A7B2-3EA21EE9FE52@arm.com> In-Reply-To: <7B367F9A-37E3-4157-A7B2-3EA21EE9FE52@arm.com> From: Jens Wiklander Date: Wed, 11 Feb 2026 14:36:40 +0100 X-Gm-Features: AZwV_Qi1rarmLvovzI2gLCqmihj3DmnYP9NcRgKmqame8ZhWjjrETnPKLOweg5M Message-ID: Subject: Re: [PATCH 12/12] xen/arm: ffa: Add message parameter diagnostics To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 12:48=E2=80=AFPM Bertrand Marquis wrote: > > Hi Jens, > > > On 11 Feb 2026, at 11:16, Jens Wiklander wr= ote: > > > > Hi Bertrand, > > > > On Tue, Feb 3, 2026 at 6:38=E2=80=AFPM Bertrand Marquis > > wrote: > >> > >> MSG_SEND2 and direct request validation failures are silent, making it > >> hard to diagnose invalid IDs, oversized messages, or unsupported > >> destination types. > >> > >> Add debug logs for parameter validation failures: > >> - invalid endpoint IDs > >> - oversized messages > >> - unsupported destination types > >> - invalid sender/receiver combinations > >> - ratelimit MSG_SEND2 busy failures to avoid log flooding > >> > >> No functional changes. > >> > >> Signed-off-by: Bertrand Marquis > >> --- > >> xen/arch/arm/tee/ffa_msg.c | 45 ++++++++++++++++++++++++++++++++++++++ > >> 1 file changed, 45 insertions(+) > >> > >> diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c > >> index 928f269f6c3a..cc273c9a8e80 100644 > >> --- a/xen/arch/arm/tee/ffa_msg.c > >> +++ b/xen/arch/arm/tee/ffa_msg.c > >> @@ -4,6 +4,7 @@ > >> */ > >> > >> #include > >> +#include > >> #include > >> #include > >> > >> @@ -100,6 +101,7 @@ void ffa_handle_msg_send_direct_req(struct cpu_use= r_regs *regs, uint32_t fid) > >> if ( !ffa_fw_supports_fid(fid) ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> + gdprintk(XENLOG_DEBUG, "ffa: direct req fid %#x not supported= \n", fid); > >> goto out; > >> } > >> > >> @@ -108,6 +110,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_use= r_regs *regs, uint32_t fid) > >> (src_dst & GENMASK(15,0)) =3D=3D ffa_get_vm_id(d) ) > >> { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: direct req invalid src/dst %#x\n", > >> + (uint32_t)src_dst); > >> goto out; > >> } > >> > >> @@ -115,6 +120,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_use= r_regs *regs, uint32_t fid) > >> if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: direct req to non-secure dst %#x\n", > >> + (uint32_t)(src_dst & GENMASK(15, 0))); > >> goto out; > >> } > >> > >> @@ -166,7 +174,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, = const void *src_buf, > >> /* This is also checking that dest is not src */ > >> ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > >> if ( ret ) > >> + { > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 lookup failed: dst %#x ret %d\n", > >> + dst_id, ret); > >> return ret; > >> + } > >> > >> /* This also checks that destination has set a Rx buffer */ > >> ret =3D ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); > >> @@ -199,6 +212,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, = const void *src_buf, > >> /* receiver rx buffer will be released by the receiver*/ > >> > >> out_unlock: > >> + if ( ret ) > >> + { > >> + if ( ret !=3D FFA_RET_BUSY || printk_ratelimit() ) > > > > Shouldn't this be && ? > > The intent here is to log all non BUSY errors but only log BUSY when rate= limit allows > to reduce the amount of logs in case of someone polling when the receiver= RX buffer > is busy. > > Maybe I should add a comment to make that clearer ? Yes, please. Cheers, Jens > > Cheers > Bertrand > > > > > Cheers, > > Jens > > > >> + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to %#x failed: %d\= n", > >> + dst_id, ret); > >> + } > >> rcu_unlock_domain(dst_d); > >> if ( !ret ) > >> ffa_raise_rx_buffer_full(dst_d); > >> @@ -226,7 +245,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs= *regs) > >> > >> ret =3D ffa_tx_acquire(src_ctx, &tx_buf, &tx_size); > >> if ( ret !=3D FFA_RET_OK ) > >> + { > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 TX acquire failed: %d\n", ret); > >> return ret; > >> + } > >> > >> /* create a copy of the message header */ > >> memcpy(&src_msg, tx_buf, sizeof(src_msg)); > >> @@ -238,6 +261,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> dst_id =3D=3D ffa_get_vm_id(src_d) ) > >> { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 invalid src/dst src %#x dst %#x\n", > >> + src_id, dst_id); > >> goto out; > >> } > >> > >> @@ -246,6 +272,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> if (src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1)) > >> { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 invalid msg_offset %u (v1.1)\n", > >> + src_msg.msg_offset); > >> goto out; > >> } > >> /* Set uuid to Nil UUID for v1.1 guests */ > >> @@ -255,6 +284,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> else if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_2= ) ) > >> { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 invalid msg_offset %u (v1.2)\n", > >> + src_msg.msg_offset); > >> goto out; > >> } > >> > >> @@ -263,6 +295,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> src_msg.msg_size > (tx_size - src_msg.msg_offset) ) > >> { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 invalid msg_size %u offset %u tx %zu= \n", > >> + src_msg.msg_size, src_msg.msg_offset, tx_size); > >> goto out; > >> } > >> > >> @@ -272,6 +307,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 to SP not supported\n"); > >> goto out; > >> } > >> /* > >> @@ -288,6 +325,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs = *regs) > >> > >> ret =3D ffa_simple_call(FFA_MSG_SEND2, > >> ((uint32_t)ffa_get_vm_id(src_d)) << 16, = 0, 0, 0); > >> + if ( ret ) > >> + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to SP failed: %d\n= ", ret); > >> } > >> else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > >> { > >> @@ -295,7 +334,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs= *regs) > >> ret =3D ffa_msg_send2_vm(dst_id, tx_buf, &src_msg); > >> } > >> else > >> + { > >> ret =3D FFA_RET_INVALID_PARAMETERS; > >> + gdprintk(XENLOG_DEBUG, > >> + "ffa: msg_send2 to VM disabled (dst %#x)\n", dst_id)= ; > >> + } > >> > >> out: > >> ffa_tx_release(src_ctx); > >> @@ -311,6 +354,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, ui= nt32_t fid) > >> if ( !ffa_fw_supports_fid(fid) ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> + gdprintk(XENLOG_DEBUG, "ffa: run fid %#x not supported\n", fi= d); > >> goto out; > >> } > >> > >> @@ -322,6 +366,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, ui= nt32_t fid) > >> if ( !FFA_ID_IS_SECURE(dst >> 16) ) > >> { > >> ret =3D FFA_RET_NOT_SUPPORTED; > >> + gdprintk(XENLOG_DEBUG, "ffa: run to non-secure dst %#x\n", ds= t); > >> goto out; > >> } > >> > >> -- > >> 2.50.1 (Apple Git-155) > >> > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 13:37:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 13:37:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227657.1534087 (Exim 4.92) (envelope-from ) id 1vqAP3-0001xO-GR; Wed, 11 Feb 2026 13:37:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227657.1534087; Wed, 11 Feb 2026 13:37:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqAP3-0001xB-DH; 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Iglesias" , Markus Armbruster , Paolo Bonzini , Anthony PERARD , Eric Blake , Samuel Thibault , =?UTF-8?B?QWxleCBCZW5uw6ll?= , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Stefano Stabellini , Paul Durrant X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: 3XT4d9cc_cFuo7GiZlpoMMOJRPm20nyBMH4cXHzW594_1770817027 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi On Wed, Feb 11, 2026 at 4:30=E2=80=AFPM wrote= : > > From: Marc-Andr=C3=A9 Lureau > > The following changes since commit 0b91040d23dc8820724a60c811223b777f3bc6= b7: > > Merge tag 'pull-loongarch-20260210' of https://github.com/gaosong715/qe= mu into staging (2026-02-10 09:12:38 +0000) > > are available in the Git repository at: > > https://gitlab.com/marcandre.lureau/qemu.git tags/char-pull-request > > for you to fetch changes up to 72913e8b8ef10071965d43349516d0e7f19a959d: > > chardev: add logtimestamp option (2026-02-11 16:27:18 +0400) > > ---------------------------------------------------------------- > chardev patches > > ---------------------------------------------------------------- > self-nack, it failed win32 compilation: https://gitlab.com/marcandre.lureau/qemu/-/jobs/13073244313 > Eric K (1): > char-udp: Fix initial backend open status > > Vladimir Sementsov-Ogievskiy (13): > ui/spice: Require spice-server >=3D 0.15.0 > ui/spice: drop SPICE_HAS_ATTACHED_WORKER macro > chardev: ChardevClass: consistent naming for handlers > chardev: consistent naming for ChardevClass handlers implementations > chardev: .chr_open(): drop be_opened parameter > chardev: .chr_open(): add boolean return value > chardev/char-pty: store pty_name into PtyChardev state > chardev: introduce .chr_get_pty_name() handler > chardev: rework filename handling > chardev/char: qemu_char_open(): add return value > char: qemu_chr_write_log() use qemu_write_full() > error-report: make real_time_iso8601() public > chardev: add logtimestamp option > > meson.build | 2 +- > qapi/char.json | 6 +- > include/chardev/char.h | 23 ++- > include/qemu/error-report.h | 6 + > include/ui/qemu-spice.h | 6 - > chardev/baum.c | 12 +- > chardev/char-console.c | 10 +- > chardev/char-fe.c | 8 +- > chardev/char-file.c | 26 ++-- > chardev/char-hub.c | 27 ++-- > chardev/char-mux.c | 30 ++-- > chardev/char-null.c | 9 +- > chardev/char-parallel.c | 41 +++--- > chardev/char-pipe.c | 30 ++-- > chardev/char-pty.c | 56 ++++--- > chardev/char-ringbuf.c | 20 +-- > chardev/char-serial.c | 39 ++--- > chardev/char-socket.c | 73 ++++------ > chardev/char-stdio.c | 30 ++-- > chardev/char-udp.c | 18 +-- > chardev/char-win-stdio.c | 25 ++-- > chardev/char.c | 137 ++++++++++++------ > chardev/msmouse.c | 13 +- > chardev/spice.c | 52 +++---- > chardev/wctablet.c | 10 +- > gdbstub/system.c | 12 +- > hw/char/xen_console.c | 7 +- > hw/display/qxl.c | 23 +-- > hw/misc/ivshmem-pci.c | 7 +- > tests/unit/test-char.c | 2 + > ui/console-vc.c | 12 +- > ui/dbus-chardev.c | 16 +- > ui/dbus.c | 4 +- > ui/gtk.c | 14 +- > ui/spice-app.c | 18 +-- > ui/spice-display.c | 19 +-- > ui/vdagent.c | 17 +-- > util/error-report.c | 3 +- > .../codeconverter/test_regexps.py | 2 +- > 39 files changed, 437 insertions(+), 428 deletions(-) > > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Wed Feb 11 13:43:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 13:43:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227677.1534097 (Exim 4.92) (envelope-from ) id 1vqAUw-0005Hf-3w; Wed, 11 Feb 2026 13:43:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227677.1534097; Wed, 11 Feb 2026 13:43:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqAUw-0005HY-1E; Wed, 11 Feb 2026 13:43:18 +0000 Received: by outflank-mailman (input) for mailman id 1227677; Wed, 11 Feb 2026 13:43:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqAUu-0005HS-Ly for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 13:43:16 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9d9a41ad-074f-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 14:43:15 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-4359249bbacso635052f8f.0 for ; Wed, 11 Feb 2026 05:43:15 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 05:43:14 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 14:43:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] xen/tools: remove usages of `stat -s` in check-endbr.sh To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , xen-devel@lists.xenproject.org References: <20260211104638.7938-1-roger.pau@citrix.com> <20260211104638.7938-3-roger.pau@citrix.com> <35bdb10b-d39d-4e67-9ed8-c0b85ca5bd54@suse.com> <3f1e043f-2cd1-43a3-9ec9-9323c133d8d1@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.02.2026 14:34, Roger Pau Monné wrote: > On Wed, Feb 11, 2026 at 02:07:13PM +0100, Jan Beulich wrote: >> On 11.02.2026 13:24, Roger Pau Monné wrote: >>> On Wed, Feb 11, 2026 at 12:40:58PM +0100, Jan Beulich wrote: >>>> On 11.02.2026 11:46, Roger Pau Monne wrote: >>>>> --- a/xen/tools/check-endbr.sh >>>>> +++ b/xen/tools/check-endbr.sh >>>>> @@ -92,14 +92,15 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & >>>>> # check nevertheless. >>>>> # >>>>> eval $(${OBJDUMP} -j .text $1 -h | >>>>> - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') >>>>> + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') >>>>> >>>>> -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN >>>>> - >>>>> -bin_sz=$(stat -c '%s' $TEXT_BIN) >>>>> +# Convert objdump hex reported .text size to decimal >>>>> +bin_sz=$(printf %u $bin_sz) >>>> >>>> (Alternatively without this line, but ... >>>> >>>>> [ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && >>>> >>>> [ "$(($bin_sz))" -ge $(((1 << 28) - $vma_lo)) ] && >>>> >>>> ?) >>> >>> Isn't that bash-specific functionality? The script interpreter is set >>> as /bin/sh. >> >> I, too, would have thought so, but then the rhs of the -ge already used $((...)). > > OK, yes, I didn't realize those existing usages. Now that I look at > it it does seem to have a bunch of other bashisms, for example > parameter expansion. Then perhaps in another patch we want to properly mark it as a bash script. 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Wed, 11 Feb 2026 06:16:55 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 15:16:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > Based on Linux kernel v6.16.0. > Note that smp_wmb() is used instead of smp_mb__before_atomic() as what > we want to guarantee that if a bit in irqs_pending_mask is obversable > that the correspondent bit in irqs_pending is observable too. And the counterpart of this barrier is the one encoded implicitly in xchg()? Could do with making more explicit, e.g. by way of adding a code comment there. > Add lockless tracking of pending vCPU interrupts using atomic bitops. > Two bitmaps are introduced: > - irqs_pending — interrupts currently pending for the vCPU > - irqs_pending_mask — bits that have changed in irqs_pending > > The design follows a multi-producer, single-consumer model, where the > consumer is the vCPU itself. Producers may set bits in > irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is > performed only by the consumer via xchg_acquire(). What is xchg_acquire() in Xen? I can't spot anything like this. > The consumer must not > write to irqs_pending and must not act on bits that are not set in the > mask. Otherwise, extra synchronization should be provided. > > On RISC-V interrupts are not injected via guest registers, so pending > interrupts must be recorded in irqs_pending (using the new > vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating > HVIP before returning control to the guest. The consumer side is > implemented in a follow-up patch. > > A barrier between updating irqs_pending and setting the corresponding > mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees > that if the consumer observes a mask bit set, the corresponding pending > bit is also visible. This prevents missed interrupts during the flush. > > It is possible a guest could have pending bit not result in the hardware > register without to be marked pending in irq_pending bitmap as: Are there some words missing in this sentence? I find it hard to follow the way it is. > According to the RISC-V ISA specification: > Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and > interrupt-enable bits for VS-level software interrupts. VSSIP in hip > is an alias (writable) of the same bit in hvip. > Additionally: > When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only > zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and > hie.VSSIE. > This means the guest may modify vsip.SSIP, which implicitly updates > hip.VSSIP and the bit being writable with 1 would also trigger an interrupt s/writable/written/ ? > as according to the RISC-V spec: > These conditions for an interrupt trap to occur must be evaluated in a > bounded amount of time from when an interrupt becomes, or ceases to be, > pending in sip, and must also be evaluated immediately following the > execution of an SRET instruction or an explicit write to a CSR on which > these interrupt trap conditions expressly depend (including sip, sie and > sstatus). > What means that IRQ_VS_SOFT must be synchronized separately, what is done > in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be > synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as > PMU isn't supported now. > > For the remaining VS-level interrupt types (IRQ_VS_TIMER and > IRQ_VS_EXT), the specification states they cannot be modified by the guest > and are read-only: > Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable > bits for VS-level external interrupts. VSEIP is read-only in hip, and is > the logical-OR of these interrupt sources: > • bit VSEIP of hvip; > • the bit of hgeip selected by hstatus.VGEIN; and > • any other platform-specific external interrupt signal directed to > VS-level. > Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable > bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the > logical-OR of hvip.VSTIP and any other platform-specific timer interrupt > signal directed to VS-level. In what you quote there is something being said about bits being r/o in hip, but I can't conclude the "cannot be modified by the guest" that is being said ahead of the quotation. > Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() > and vcpu_unset_interrupt(), and flush them during the call of > vcpu_flush_interrupts() (which is introduced in follow up patch). > > vcpu_sync_interrupts(), which is called just before entering the VM, > slightly bends the rule that the irqs_pending bit must be written > first, followed by updating the corresponding bit in irqs_pending_mask. > However, it still respects the core guarantee that the producer never > clears the mask and only writes to irqs_pending if it is the one that > flipped the corresponding mask bit from 0 to 1. > Moreover, since the consumer won't run concurrently because > vcpu_sync_interrupts() and the consumer path are going to be invoked > equentially immediately before VM entry, it is safe to slightly relax > this ordering rule in vcpu_sync_interrupts(). > > Signed-off-by: Oleksii Kurochko > --- > Changes in v3: > - Use smp_wb() instead of smp_mb__before_atomic(). > - Add explanation of the change above in the commit message. > - Move vcpu_sync_interrupts() here to producers side. > - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() > is called. > --- > Changes in V2: > - Move the patch before an introduction of vtimer. > - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as > vcpu structure starts out all zeros. > - Drop const for irq argument of vcpu_{un}set_interrupt(). > - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it > could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. > - Drop IRQ_LOCAL_MAX as there is no usage for it now. > --- > xen/arch/riscv/domain.c | 70 +++++++++++++++++++++++++++++ > xen/arch/riscv/include/asm/domain.h | 24 ++++++++++ > xen/arch/riscv/traps.c | 8 ++++ > 3 files changed, 102 insertions(+) > > diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c > index af9586a4eb0d..4513f778cdc4 100644 > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -5,6 +5,7 @@ > #include > #include > > +#include > #include > #include > #include > @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) > { > vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); > } > + > +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) > +{ > + /* > + * We only allow VS-mode software, timer, and external > + * interrupts when irq is one of the local interrupts > + * defined by RISC-V privilege specification. > + */ What is "when irq is one ..." intended to be telling me? There's no ... > + if ( irq != IRQ_VS_SOFT && > + irq != IRQ_VS_TIMER && > + irq != IRQ_VS_EXT ) > + return -EINVAL; ... corresponding code (anymore), afaict. Further, who are the prospected callers of this function and its sibling below? If they're all internal (i.e. not reachable via hypercalls or emulation on behalf of the guest), this may want to be assertions. > + set_bit(irq, v->arch.irqs_pending); > + smp_wmb(); > + set_bit(irq, v->arch.irqs_pending_mask); > + > + vcpu_kick(v); Shouldn't this be conditional upon the pending_mask bit going from 0 to 1? > +void vcpu_sync_interrupts(struct vcpu *v) > +{ > + unsigned long hvip; > + > + /* Read current HVIP and VSIE CSRs */ > + v->arch.vsie = csr_read(CSR_VSIE); > + > + /* Sync-up HVIP.VSSIP bit changes done by Guest */ > + hvip = csr_read(CSR_HVIP); > + if ( (v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL) && Nit: Parentheses please around an & expression when used in an && one. > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -54,6 +54,25 @@ struct arch_vcpu { > register_t henvcfg; > register_t hideleg; > register_t hstateen0; > + register_t hvip; > + > + register_t vsie; > + > + /* > + * VCPU interrupts > + * > + * We have a lockless approach for tracking pending VCPU interrupts > + * implemented using atomic bitops. The irqs_pending bitmap represent > + * pending interrupts whereas irqs_pending_mask represent bits changed > + * in irqs_pending. Our approach is modeled around multiple producer > + * and single consumer problem where the consumer is the VCPU itself. > + * > + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts > + * on RV32 host. > + */ > +#define RISCV_VCPU_NR_IRQS 64 What is this 64 deriving from? IOW - can it be some kind of expression, helping the reader? > --- a/xen/arch/riscv/traps.c > +++ b/xen/arch/riscv/traps.c > @@ -169,6 +169,11 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) > die(); > } > > +static void check_for_pcpu_work(void) > +{ > + vcpu_sync_interrupts(current); > +} Is this really a helpful wrapper? Or is there going to be more stuff in here later on? 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Wed, 11 Feb 2026 06:26:55 -0800 (PST) Message-ID: <2f50ee9a-b2f3-4e33-a2a9-fbf066e93f8d@suse.com> Date: Wed, 11 Feb 2026 15:26:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 06/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 2 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > This patch is based on Linux kernel 6.16.0. > > Add the consumer side (vcpu_flush_interrupts()) of the lockless pending > interrupt tracking introduced in part 1 (for producers). According, to the > design only one consumer is possible, and it is vCPU itself. > vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due > to the lack of functionality) before the hypervisor returns control to the > guest. > > Producers may set bits in irqs_pending_mask without a lock. Clearing bits in > irqs_pending_mask is performed only by the consumer via xchg() (with aquire & > release semantics). Where the release part isn't relevant here, aiui. > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -194,3 +194,36 @@ void vcpu_sync_interrupts(struct vcpu *v) > # error "Update v->arch.vsieh" > #endif > } > + > +static void vcpu_update_hvip(const struct vcpu *v) > +{ > + csr_write(CSR_HVIP, v->arch.hvip); > +} > + > +void vcpu_flush_interrupts(struct vcpu *v) > +{ > + register_t *hvip = &v->arch.hvip; Why not in the if()'s scope, when it's used only there? > + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) > + { > + unsigned long mask, val; > + > + mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); > + val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; Make these the initializers of the variables? > + *hvip &= ~mask; > + *hvip |= val; > + > + /* > + * Flush AIA high interrupts. > + * > + * It is necessary to do only for CONFIG_RISCV_32 which isn't > + * supported now. > + */ > +#ifdef CONFIG_RISCV_32 > + # error "Update v->arch.hviph" Ehem. I really dislike having to give the same comment over and over again. Please have the # of a pre-processor directive always in the first column. Also, isn't this misplaced? The containing if() checks irqs_pending_mask[0], yet aiui irqs_pending_mask[1] would be of interest for hviph? > --- a/xen/arch/riscv/traps.c > +++ b/xen/arch/riscv/traps.c > @@ -172,6 +172,8 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) > static void check_for_pcpu_work(void) > { > vcpu_sync_interrupts(current); > + > + vcpu_flush_interrupts(current); > } Ah, okay - here comes a 2nd call from this function. However, please latch current into a local variable (already in the earlier patch perhaps); no need to fetch it from per-CPU data twice (or yet more times, if further stuff was going to appear here). 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=m+Gm0E3xfIwuIDuCNEAkeNWHgxwHcDpYnywo0MUdgyw=; b=n3uSp2CxF/gP9Xd2teqQaH9raie94o/Fb7NjKf/q2H/gK8J3gA/gbJ6/RSq+9rd/LmAIppKAeWtRYgnoNXsLj5NhgynHBXegOmVgg8AOVCgAXjxsphK7SrEW6lTzwS9B0H1kSaqkCwmyxebt5xei+sZSiyEIEr0yC9ToYB6m55g= From: Bertrand Marquis To: Jens Wiklander CC: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Subject: Re: [PATCH 08/12] xen/arm: ffa: Fix FFA_FEATURES validation Thread-Topic: [PATCH 08/12] xen/arm: ffa: Fix FFA_FEATURES validation Thread-Index: AQHclTQCVYzQoM1PdEyfckgwmOVEyLV9M2UAgAA0pYCAACPHAIAAD/qA Date: Wed, 11 Feb 2026 14:31:35 +0000 Message-ID: <7E530111-37DD-4B4F-95FF-423FB8A3EC1D@arm.com> References: <5331b33343441028d10c290b21b82acce295fff0.1770115302.git.bertrand.marquis@arm.com> <26A3747F-0313-437F-B461-F5C70CE1A4F1@arm.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: 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Wed, 11 Feb 2026 06:51:21 -0800 (PST) Message-ID: <75d70edc-b0f7-4d61-8da6-e783c57b4490@suse.com> Date: Wed, 11 Feb 2026 15:51:19 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 08/16] xen/riscv: introduce basic vtimer infrastructure for guests To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <792ea928d748e9ff7bd331b8e8b0262695a062e9.1770650552.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <792ea928d748e9ff7bd331b8e8b0262695a062e9.1770650552.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > @@ -105,11 +106,14 @@ int arch_vcpu_create(struct vcpu *v) > if ( is_idle_vcpu(v) ) > return rc; > > + if ( (rc = vcpu_vtimer_init(v)) ) > + goto fail; > + > /* > - * As the vtimer and interrupt controller (IC) are not yet implemented, > + * As interrupt controller (IC) is not yet implemented, > * return an error. > * > - * TODO: Drop this once the vtimer and IC are implemented. > + * TODO: Drop this once IC is implemented. > */ > rc = -EOPNOTSUPP; > goto fail; Shouldn't you then also call vcpu_vtimer_destroy() from arch_vcpu_destroy()? > --- /dev/null > +++ b/xen/arch/riscv/vtimer.c > @@ -0,0 +1,71 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > + > +#include > + > +static void vtimer_expired(void *data) > +{ > + struct vtimer *t = data; > + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); > + > + vcpu_set_interrupt(v, IRQ_VS_TIMER); > +} > + > +int vcpu_vtimer_init(struct vcpu *v) > +{ > + struct vtimer *t = &v->arch.vtimer; > + > + init_timer(&t->timer, vtimer_expired, t, v->processor); > + > + return 0; > +} > + > +void vcpu_timer_destroy(struct vcpu *v) > +{ > + struct vtimer *t = &v->arch.vtimer; > + > + if ( t->timer.status == TIMER_STATUS_invalid ) > + return; > + > + kill_timer(&v->arch.vtimer.timer); > +} > + > +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) > +{ > + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); > + s_time_t expires = ticks_to_ns(ticks - boot_clock_cycles); > + > + vcpu_unset_interrupt(v, IRQ_VS_TIMER); > + > + /* > + * According to the RISC-V sbi spec: > + * If the supervisor wishes to clear the timer interrupt without > + * scheduling the next timer event, it can either request a timer > + * interrupt infinitely far into the future (i.e., (uint64_t)-1), > + * or it can instead mask the timer interrupt by clearing sie.STIE CSR > + * bit. > + */ > + if ( ticks == ((uint64_t)~0) ) Btw, such a cast doesn't further need parenthesizing. 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Wed, 11 Feb 2026 06:53:43 -0800 (PST) Message-ID: <5d108b61-f46e-404d-ad03-18a0405fe44d@suse.com> Date: Wed, 11 Feb 2026 15:53:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 From: Jan Beulich To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 15:16, Jan Beulich wrote: > On 09.02.2026 17:52, Oleksii Kurochko wrote: >> @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) >> { >> vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); >> } >> + >> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* >> + * We only allow VS-mode software, timer, and external >> + * interrupts when irq is one of the local interrupts >> + * defined by RISC-V privilege specification. >> + */ > > What is "when irq is one ..." intended to be telling me? There's no ... > >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; > > ... corresponding code (anymore), afaict. > > Further, who are the prospected callers of this function and its sibling > below? If they're all internal (i.e. not reachable via hypercalls or > emulation on behalf of the guest), this may want to be assertions. Having seen a use in patch 08, I should clarify the "reachable" part here: It's not the "reachable" alone, but whether the guest has control over the "irq" value passed. For the example in patch 08 this isn't the case. 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Wed, 11 Feb 2026 07:03:42 -0800 (PST) Message-ID: <4304e4a5-c820-4673-8ff7-bbfdea54edf6@suse.com> Date: Wed, 11 Feb 2026 16:03:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 12/16] xen/riscv: introduce sbi_set_timer() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3b102fd2267c629e8505631277efc2eeae5a1a6a.1770650552.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3b102fd2267c629e8505631277efc2eeae5a1a6a.1770650552.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > Introduce a function pointer for sbi_set_timer(), since different OpenSBI > versions may implement the TIME extension with different extension IDs > and/or function IDs. > > If the TIME extension is not available, fall back to the legacy timer > mechanism. This is useful when Xen runs as a guest under another Xen, > because the TIME extension is not currently virtualised and therefore > will not appear as available. > Despite of the fact that sbi_set_timer_v01 is introduced and used as > fall back, SBI v0.1 still isn't fully supported (with the current SBI > calls usage, sbi_rfence_v01 should be introduced too), so panic() > in sbi_init() isn't removed. > > The sbi_set_timer() pointer will be used by reprogram_timer() to program > Xen’s physical timer as without SSTC extension there is no any other > option except SBI call to do that as only M-timer is available for us. > > Use dprintk() for all the cases to print that a speicifc SBI extension > is available as it isn't really necessary in case of release builds. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich with one further request: > @@ -134,6 +138,20 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, > int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, > size_t size, unsigned long vmid); > > +/* > + * Programs the clock for next event after stime_value time. This function also > + * clears the pending timer interrupt bit. "after stime_value time" reads as if this was a relative input, stime_value units of time need to pass until the event. Iirc values passed are absolute, though. Furthermore it was my understanding that the interrupt being raised is dependent upon clock >= value, not clock > value (where the latter is what "after" means when taken to apply to an absolute value). Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:09:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:09:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227787.1534206 (Exim 4.92) (envelope-from ) id 1vqBpu-0004kv-4a; Wed, 11 Feb 2026 15:09:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227787.1534206; Wed, 11 Feb 2026 15:09:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBpu-0004ko-1t; Wed, 11 Feb 2026 15:09:02 +0000 Received: by outflank-mailman (input) for mailman id 1227787; Wed, 11 Feb 2026 15:09:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBps-0004kc-KA for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:09:00 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 93f5c1af-075b-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 16:08:54 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1770822527410693.8196586983516; Wed, 11 Feb 2026 07:08:47 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 93f5c1af-075b-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; t=1770822531; cv=none; d=zohomail.com; s=zohoarc; b=k7pcYTGnbN799BoMgNeDWB8q4tr5fiAxeKOCPGfnNg3I3qkchi3vn9wpfu/TeR7eeWgzaZ0oD19gaBkYydAvmK5aNuFhioz3VK2b8GJs08ruuNIINTjErOxUTlTo7bufvL+kKp97fNiZCs/TbnYg2PN6fj0GBn4t7ftA6AtjiII= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1770822531; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=1ahHpP31MwpRsY5QW3laABbm6TfJ8CRyHZKtBKrmJIc=; b=UPAP6NghrVkB6N5V3OIBhnZa39KNEdxZdJXAKb3D+17pNQGXkaoPoadpQpKkJxQJoZDSbCCv84iAhNj1Tnz76AtXApnaR1ulekZggMJ9oOQB+bykWMqW5SOL0cniKA1vbyI0chYH1L/NOA5ni+kA7veU9qSbCqI/jxjfjwMpOZU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1770822530; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Date:Date:From:From:To:To:CC:Subject:Subject:In-Reply-To:References:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To:Cc; bh=1ahHpP31MwpRsY5QW3laABbm6TfJ8CRyHZKtBKrmJIc=; b=rUVc9HwNerWb/jtHebEAX/DDJ5CH891uIi49/3HGGE7RuC69AN1FP4+bc1i/qqMu NIY/ILRzUTswuLltz6zxCkmgWro0oE3mwZlU4K1xh2MrYU0IZ1sDyYQsoO0pkdtZ93R V+65KJtWft1c0xRR/djwpr5qMLs33kBOCqIB6GZM= Date: Wed, 11 Feb 2026 09:55:05 -0500 From: "Daniel P. Smith" To: =?ISO-8859-1?Q?Marek_Marczykowski-G=F3recki?= , xen-devel@lists.xenproject.org CC: Jan Beulich Subject: Re: [PATCH] EFI: Fix relocating ESRT for dom0 User-Agent: Thunderbird for Android In-Reply-To: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> References: <20260211001650.1592239-1-marmarek@invisiblethingslab.com> Message-ID: <4BF5BA76-396A-473B-841E-29AA6DBAC9E7@apertussolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External On February 10, 2026 7:16:42 PM EST, "Marek Marczykowski-G=C3=B3recki" wrote: >Fix calculating the table size - it consists of a header + entries, not >just entries=2E >This bug caused the last entry to have garbage in its final fields, >including LowestSupportedFwVersion and CapsuleFlags, which (usually) >made fwupd to detect firmware update availability, but refuse actually >installing it=2E > >Fixes: dc7da0874ba4 ("EFI: preserve the System Resource Table for dom0") >Signed-off-by: Marek Marczykowski-G=C3=B3recki >--- > xen/common/efi/boot=2Ec | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > >diff --git a/xen/common/efi/boot=2Ec b/xen/common/efi/boot=2Ec >index 5b84dbf26e5e=2E=2E45015a0dd583 100644 >--- a/xen/common/efi/boot=2Ec >+++ b/xen/common/efi/boot=2Ec >@@ -675,7 +675,8 @@ static size_t __init get_esrt_size(const EFI_MEMORY_D= ESCRIPTOR *desc) > if ( esrt_ptr->FwResourceCount > available_len / sizeof(esrt_ptr->En= tries[0]) ) > return 0; >=20 >- return esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); >+ return offsetof(EFI_SYSTEM_RESOURCE_TABLE, Entries) + >+ esrt_ptr->FwResourceCount * sizeof(esrt_ptr->Entries[0]); > } >=20 > static EFI_GUID __initdata esrt_guid =3D EFI_SYSTEM_RESOURCE_TABLE_GUID; With Andy's suggestions,=20 Acked-by: Daniel P=2E Smith From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:12:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:12:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227796.1534216 (Exim 4.92) (envelope-from ) id 1vqBsr-0006m1-In; Wed, 11 Feb 2026 15:12:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227796.1534216; Wed, 11 Feb 2026 15:12:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBsr-0006lu-Fs; Wed, 11 Feb 2026 15:12:05 +0000 Received: by outflank-mailman (input) for mailman id 1227796; Wed, 11 Feb 2026 15:12:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBsp-0006gu-L3 for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:12:03 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 04e59c72-075c-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 16:12:02 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4376c0bffc1so2864945f8f.0 for ; Wed, 11 Feb 2026 07:12:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 07:12:02 -0800 (PST) Message-ID: <3a584527-1c20-4774-b533-0ab802587f04@suse.com> Date: Wed, 11 Feb 2026 16:12:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 13/16] xen/riscv: implement reprogram_timer() via SBI To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > Implement reprogram_timer() on RISC-V using the standard SBI timer call. > > The privileged architecture only defines machine-mode timer interrupts > (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must > be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) > is optional and is not supported on the boards available to me, so the > only viable approach today is to program the timer through SBI. > > reprogram_timer() enables/disables the supervisor timer interrupt and > programs the next timer deadline using sbi_set_timer(). If the SBI call > fails, the code panics, because sbi_set_timer() is expected to return > either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to > the latest ones). The SBI spec does not define a standard negative error > code for this call, and without SSTC there is no alternative method to > program the timer, so the SBI timer call must be available. > > reprogram_timer() currently returns int for compatibility with the > existing prototype. While it might be cleaner to return bool, keeping the > existing signature avoids premature changes in case sbi_set_timer() ever > needs to return other values (based on which we could try to avoid > panic-ing) in the future. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich > --- > Changes in v3: > - Correct the comments in reprogram_timer(). > - Move enablement of timer interrupt after sbi_set_timer() to avoid > potentially receiving a timer interrupt between these 2 operations. I'd like to mention that this is of only hypothetical concern, at least for the sole caller in common code: That's doing the call with IRQs off, so only the bit in SIP could become set too early, while no IRQ would surface before timer_softirq_action() turns IRQs on again. (This isn't to say that it wasn't a good thing to adjust the order.) Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:14:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:14:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227811.1534225 (Exim 4.92) (envelope-from ) id 1vqBvV-0007f6-32; Wed, 11 Feb 2026 15:14:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227811.1534225; Wed, 11 Feb 2026 15:14:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBvV-0007ez-0J; Wed, 11 Feb 2026 15:14:49 +0000 Received: by outflank-mailman (input) for mailman id 1227811; Wed, 11 Feb 2026 15:14:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqBvT-0007et-QM for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:14:47 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 65f3be57-075c-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 16:14:45 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso20469435e9.1 for ; Wed, 11 Feb 2026 07:14:45 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 07:14:44 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 16:14:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 13/16] xen/riscv: implement reprogram_timer() via SBI From: Jan Beulich To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3a584527-1c20-4774-b533-0ab802587f04@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3a584527-1c20-4774-b533-0ab802587f04@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 16:12, Jan Beulich wrote: > On 09.02.2026 17:52, Oleksii Kurochko wrote: >> Implement reprogram_timer() on RISC-V using the standard SBI timer call. >> >> The privileged architecture only defines machine-mode timer interrupts >> (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must >> be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) >> is optional and is not supported on the boards available to me, so the >> only viable approach today is to program the timer through SBI. >> >> reprogram_timer() enables/disables the supervisor timer interrupt and >> programs the next timer deadline using sbi_set_timer(). If the SBI call >> fails, the code panics, because sbi_set_timer() is expected to return >> either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to >> the latest ones). The SBI spec does not define a standard negative error >> code for this call, and without SSTC there is no alternative method to >> program the timer, so the SBI timer call must be available. >> >> reprogram_timer() currently returns int for compatibility with the >> existing prototype. While it might be cleaner to return bool, keeping the >> existing signature avoids premature changes in case sbi_set_timer() ever >> needs to return other values (based on which we could try to avoid >> panic-ing) in the future. >> >> Signed-off-by: Oleksii Kurochko > > Acked-by: Jan Beulich > >> --- >> Changes in v3: >> - Correct the comments in reprogram_timer(). >> - Move enablement of timer interrupt after sbi_set_timer() to avoid >> potentially receiving a timer interrupt between these 2 operations. > > I'd like to mention that this is of only hypothetical concern, at least for > the sole caller in common code: That's doing the call with IRQs off, so > only the bit in SIP could become set too early, while no IRQ would surface > before timer_softirq_action() turns IRQs on again. Actually, further to this: If IRQs were on, an IRQ could still surface between the two operations, when the SIE bit was already sent upon entry into the function (i.e. for example when a timeout is being moved earlier). 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Wed, 11 Feb 2026 07:16:56 -0800 (PST) Message-ID: <64e0c923-dc1c-42c2-9b36-67f0a289e144@suse.com> Date: Wed, 11 Feb 2026 16:16:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 16/16] xen/riscv: implement sync_vcpu_execstate() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.02.2026 17:52, Oleksii Kurochko wrote: > The scheduler may call this function to force synchronization of given > vCPU's state. RISC-V does not support lazy context switching, so nothing > is done in sync_vcpu_execstate() and sync_local_execstate(). > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:31:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:31:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227838.1534246 (Exim 4.92) (envelope-from ) id 1vqCBr-00050F-LG; Wed, 11 Feb 2026 15:31:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227838.1534246; Wed, 11 Feb 2026 15:31:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCBr-000508-Hg; Wed, 11 Feb 2026 15:31:43 +0000 Received: by outflank-mailman (input) for mailman id 1227838; Wed, 11 Feb 2026 15:31:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCBq-000502-IR for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:31:42 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c3390796-075e-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 16:31:41 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-6594382a264so9872096a12.1 for ; Wed, 11 Feb 2026 07:31:41 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Yes, it should be. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:38:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:38:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227855.1534256 (Exim 4.92) (envelope-from ) id 1vqCHm-0005is-7N; Wed, 11 Feb 2026 15:37:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227855.1534256; Wed, 11 Feb 2026 15:37:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCHm-0005il-4K; Wed, 11 Feb 2026 15:37:50 +0000 Received: by outflank-mailman (input) for mailman id 1227855; Wed, 11 Feb 2026 15:37:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCHl-0005if-64 for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:37:49 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9cfdb26b-075f-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 16:37:46 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b8f86167d39so34139966b.0 for ; Wed, 11 Feb 2026 07:37:46 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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This is useful when Xen runs as a guest under another Xen, >> because the TIME extension is not currently virtualised and therefore >> will not appear as available. >> Despite of the fact that sbi_set_timer_v01 is introduced and used as >> fall back, SBI v0.1 still isn't fully supported (with the current SBI >> calls usage, sbi_rfence_v01 should be introduced too), so panic() >> in sbi_init() isn't removed. >> >> The sbi_set_timer() pointer will be used by reprogram_timer() to program >> Xen’s physical timer as without SSTC extension there is no any other >> option except SBI call to do that as only M-timer is available for us. >> >> Use dprintk() for all the cases to print that a speicifc SBI extension >> is available as it isn't really necessary in case of release builds. >> >> Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > with one further request: > >> @@ -134,6 +138,20 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, >> int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, >> size_t size, unsigned long vmid); >> >> +/* >> + * Programs the clock for next event after stime_value time. This function also >> + * clears the pending timer interrupt bit. > "after stime_value time" reads as if this was a relative input, stime_value units > of time need to pass until the event. Iirc values passed are absolute, though. > Furthermore it was my understanding that the interrupt being raised is dependent > upon clock >= value, not clock > value (where the latter is what "after" means > when taken to apply to an absolute value). Interesting that sbi_set_timer() has different description for OpenSBI v0.1 and v0.2. What you see in the comment it is what v0.1 tells, but v0.2 tells that: "Programs the clock for next event after stime_value time.*stime_value is in absolute time.* This function must clear the pending timer interrupt bit as well." "stime_value is in absolute time" has been added in v0.2. I'll update the comment for a clarity. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 15:41:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 15:41:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227866.1534266 (Exim 4.92) (envelope-from ) id 1vqCLZ-0008Jh-Lm; Wed, 11 Feb 2026 15:41:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227866.1534266; Wed, 11 Feb 2026 15:41:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCLZ-0008Ja-JD; Wed, 11 Feb 2026 15:41:45 +0000 Received: by outflank-mailman (input) for mailman id 1227866; Wed, 11 Feb 2026 15:41:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCLX-0008JE-Sg for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 15:41:43 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 298f7307-0760-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 16:41:42 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4327790c4e9so4451614f8f.2 for ; Wed, 11 Feb 2026 07:41:42 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 07:41:41 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 16:41:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/12] x86: Reject CPU policies with vendors other than the host's To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-2-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-2-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/lib/x86/policy.c > +++ b/xen/lib/x86/policy.c > @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, > #define FAIL_MSR(m) \ > do { e.msr = (m); goto out; } while ( 0 ) > > - if ( guest->basic.max_leaf > host->basic.max_leaf ) > + if ( (guest->x86_vendor != host->x86_vendor) || With the subsequent "unknown" discussion also in mind, I wonder: Should we fail the request here when either side is "unknown"? Jan > + (guest->basic.max_leaf > host->basic.max_leaf) ) > FAIL_CPUID(0, NA); > > if ( guest->feat.max_subleaf > host->feat.max_subleaf ) From xen-devel-bounces@lists.xenproject.org Wed Feb 11 16:00:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 16:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227885.1534277 (Exim 4.92) (envelope-from ) id 1vqCdH-0004YO-7l; Wed, 11 Feb 2026 16:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227885.1534277; Wed, 11 Feb 2026 16:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCdH-0004Xp-2a; Wed, 11 Feb 2026 16:00:03 +0000 Received: by outflank-mailman (input) for mailman id 1227885; Wed, 11 Feb 2026 16:00:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqCdF-0003uS-Lv for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 16:00:01 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b7a0f76a-0762-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 16:59:59 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-43626796202so1851359f8f.3 for ; Wed, 11 Feb 2026 07:59:59 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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According, to the >> design only one consumer is possible, and it is vCPU itself. >> vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due >> to the lack of functionality) before the hypervisor returns control to the >> guest. >> >> Producers may set bits in irqs_pending_mask without a lock. Clearing bits in >> irqs_pending_mask is performed only by the consumer via xchg() (with aquire & >> release semantics). > Where the release part isn't relevant here, aiui. Yes, only acquire part is relevant here. release mentioned here as xchg use .aqrl prefix. > >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -194,3 +194,36 @@ void vcpu_sync_interrupts(struct vcpu *v) >> # error "Update v->arch.vsieh" >> #endif >> } >> + >> +static void vcpu_update_hvip(const struct vcpu *v) >> +{ >> + csr_write(CSR_HVIP, v->arch.hvip); >> +} >> + >> +void vcpu_flush_interrupts(struct vcpu *v) >> +{ >> + register_t *hvip = &v->arch.hvip; > Why not in the if()'s scope, when it's used only there? Missed that during vcpu_update_hvip() inside if(). > >> + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) >> + { >> + unsigned long mask, val; >> + >> + mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); >> + val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; > Make these the initializers of the variables? Good point. I will do that. > >> + *hvip &= ~mask; >> + *hvip |= val; >> + >> + /* >> + * Flush AIA high interrupts. >> + * >> + * It is necessary to do only for CONFIG_RISCV_32 which isn't >> + * supported now. >> + */ >> +#ifdef CONFIG_RISCV_32 >> + # error "Update v->arch.hviph" > Ehem. I really dislike having to give the same comment over and over again. > Please have the # of a pre-processor directive always in the first column. > > Also, isn't this misplaced? The containing if() checks irqs_pending_mask[0], > yet aiui irqs_pending_mask[1] would be of interest for hviph? Agree, it would be more correct to have outside if(). > >> --- a/xen/arch/riscv/traps.c >> +++ b/xen/arch/riscv/traps.c >> @@ -172,6 +172,8 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) >> static void check_for_pcpu_work(void) >> { >> vcpu_sync_interrupts(current); >> + >> + vcpu_flush_interrupts(current); >> } > Ah, okay - here comes a 2nd call from this function. However, please latch > current into a local variable (already in the earlier patch perhaps); no > need to fetch it from per-CPU data twice (or yet more times, if further > stuff was going to appear here). It makes sense. Ill do that. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 11 16:04:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 16:04:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227895.1534285 (Exim 4.92) (envelope-from ) id 1vqChm-0005zF-M5; Wed, 11 Feb 2026 16:04:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227895.1534285; Wed, 11 Feb 2026 16:04:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqChm-0005z8-JO; Wed, 11 Feb 2026 16:04:42 +0000 Received: by outflank-mailman (input) for mailman id 1227895; Wed, 11 Feb 2026 16:04:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqChl-0005z2-UB for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 16:04:41 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5e7eea73-0763-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 17:04:39 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-43284ed32a0so4792045f8f.3 for ; Wed, 11 Feb 2026 08:04:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 08:04:38 -0800 (PST) Message-ID: <7eeb369d-04a9-4c17-983c-078e45b4679d@suse.com> Date: Wed, 11 Feb 2026 17:04:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/12] x86: Add cpu_vendor() as a wrapper for the host's CPU vendor To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-4-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-4-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) > *(u32 *)&c->x86_vendor_id[4] = edx; > > c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > - switch (c->x86_vendor) { > + if ( c->x86_vendor != cpu_vendor() ) When we introduce new functions to Linux-style files, nowadays we take the liberty and make them Xen-style right away. In entirely Linux- style functions the style should remain consistently Linux'es, though. > + panic("CPU vendor not compiled-in: %s", > + x86_cpuid_vendor_to_str(c->x86_vendor)); This will be somewhat awkward when c->x86_vendor is UNKNOWN. There'll also be a degenerate case, but I'll comment on that on the earlier patch causing that. > --- a/xen/arch/x86/include/asm/cpufeature.h > +++ b/xen/arch/x86/include/asm/cpufeature.h > @@ -14,6 +14,7 @@ > #include > #include > #include > +#include Nit: Can the asm/-s please all stay together? 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Wed, 11 Feb 2026 08:06:32 -0800 (PST) Message-ID: Date: Wed, 11 Feb 2026 17:06:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/12] x86: Add more granularity to the vendors in Kconfig To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-3-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-3-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/arch/x86/Kconfig.cpu > +++ b/xen/arch/x86/Kconfig.cpu > @@ -19,4 +19,47 @@ config INTEL > May be turned off in builds targetting other vendors. Otherwise, > must be enabled for Xen to work suitably on Intel platforms. > > +config HYGON > + bool "Support Hygon CPUs" > + select AMD > + default y > + help > + Detection, tunings and quirks for Hygon platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Hygon platforms. > + > + > +config CENTAUR > + bool "Support Centaur CPUs" > + select INTEL > + default y > + help > + Detection, tunings and quirks for Centaur platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Centaur platforms. > + > +config SHANGHAI > + bool "Support Shanghai CPUs" > + select INTEL > + default y > + help > + Detection, tunings and quirks for Shanghai platforms. > + > + May be turned off in builds targetting other vendors. Otherwise, > + must be enabled for Xen to work suitably on Shanghai platforms. > + > +config UNKNOWN_CPU_VENDOR > + bool "Support unknown CPU vendors" > + default y > + help > + This option prevents a panic on boot when the host CPU vendor isn't > + supported by going into a legacy compatibility mode and not applying > + any relevant tunings or quirks. > + > + Not selecting this options while selecting multiple vendors doesn't have > + any major effect on code size, but selecting a single vendor with this > + option cleared produces a much smaller build. Shouldn't this option's prompt be suppressed when all other vendors were selected off? Else the degenerate case can result that I mentioned in reply to patch 03. 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Wed, 11 Feb 2026 08:15:25 -0800 (PST) Message-ID: <0a77d849-37b6-4015-815c-a572527313d0@suse.com> Date: Wed, 11 Feb 2026 17:15:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/12] x86: Migrate MSR handler vendor checks to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-5-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-5-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > Many handlers are vendor-specific and are currently gated on runtime > checks. If we migrate those to cpu_vendor() they will effectively > cause the ellision of handling code for CPU vendors not compiled in. This builds upon the still very new "cp->x86_vendor can't be different from boot_cpu_data.vendor". This imo wants mentioning, not only for ... > --- a/xen/arch/x86/msr.c > +++ b/xen/arch/x86/msr.c > @@ -157,8 +157,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) > * The MSR has existed on all Intel parts since before the 64bit days, > * and is implemented by other vendors. > */ > - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR | > - X86_VENDOR_SHANGHAI)) ) > + if ( !(cpu_vendor() & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR | > + X86_VENDOR_SHANGHAI)) ) ... this kind of transformation, but even more so ... > @@ -169,8 +169,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) > break; > > case MSR_IA32_PLATFORM_ID: > - if ( !(cp->x86_vendor & X86_VENDOR_INTEL) || > - !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) ) > + if ( !(cpu_vendor() & X86_VENDOR_INTEL) ) ... when two checks are folded into a single one. Yet as mentioned earlier - the UNKNOWN case still will want settling on from an abstract perspective. (This isn't because there would be an issue here, but to have a clear understanding where we're heading.) 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Could it be merged? > > > > > > > Any update? > > > > This is the third time I ping this patch. > Can somebody at least give me a reason why this is still pending? I've pushed this, but I'm not a maintainer of livepatch-build-tools.git. I was expecting Ross to push the change, but maybe he is not able to push to xenbits? I don't mind picking those up, but I wasn't aware I should be on the hook for them. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Wed Feb 11 16:51:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 16:51:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227955.1534326 (Exim 4.92) (envelope-from ) id 1vqDQf-0000Qr-QC; Wed, 11 Feb 2026 16:51:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227955.1534326; Wed, 11 Feb 2026 16:51:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDQf-0000Qk-Nc; Wed, 11 Feb 2026 16:51:05 +0000 Received: by outflank-mailman (input) for mailman id 1227955; Wed, 11 Feb 2026 16:51:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDQe-0000Qe-Fx for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 16:51:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vqDQe-003YpK-1G for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 16:51:04 +0000 Received: from mail-vk1-f170.google.com ([209.85.221.170]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vqDQd-003WfJ-2u for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 16:51:04 +0000 Received: by mail-vk1-f170.google.com with SMTP id 71dfb90a1353d-56739adfa1aso1468865e0c.0 for ; Wed, 11 Feb 2026 08:51:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:Cc:To:Subject:Message-ID: Date:From:MIME-Version; bh=AN2WkJyjZxzrinD9uQ/yNy7nxYJlJXpKROwP0CR2fGU=; b=ln KBDt113XjtiF4R+S5lr8BTP2k9FJRm6F8YbQXX9Nu1v9DkR+6GO4qK99J0Ls7YBNZhQeudXFeP33+ DiUqmVdWRh2bT6r3IpE+M+Tf2EU0R1nHVwEW9DgrFcW0c3EBZyiIyZV9w/qRRZr/Tj7CEl3YzamMa vyG0hq/pxfTQc+0=; X-Gm-Message-State: AOJu0YyQtGKLcyuMJC4khCzc9uq770vDuVq9BsZlShjrLQAbQyV3UY+K b21xsrgibPiMeENLv/+P4BCUusdX2M/DNuu/LtUFvurDf+bTBRexotPkmtYaAniFKnzZOPzSw+b H5H5MhJ/d4VY12jL6MPtBA5ZstjX6LhI= X-Received: by 2002:a05:6122:2c07:b0:567:4c2b:832 with SMTP id 71dfb90a1353d-5674c2b0d9dmr646064e0c.7.1770828663746; Wed, 11 Feb 2026 08:51:03 -0800 (PST) MIME-Version: 1.0 From: Cody Zuschlag Date: Wed, 11 Feb 2026 17:50:52 +0100 X-Gmail-Original-Message-ID: X-Gm-Features: AZwV_QjGCrl7sIoiwcOqBUhfHs2Wjwqx--g4Yo2KguLhHsYJUxQuv_Gi25ihHW4 Message-ID: Subject: [ANNOUNCEMENT] Xen stable branch support extended to 5 years of security support To: xen-devel@lists.xenproject.org Cc: xen-announce@lists.xenprojet.org Content-Type: multipart/alternative; boundary="00000000000075fb52064a8f2d53" --00000000000075fb52064a8f2d53 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Statement from the Xen Committers and Core Maintainers TL;DR: All Xen releases will now have long-term support, with up to five years of security support. The Xen Committers and Core Maintainers have agreed to update the Xen Project stable branch support policy to better align with common industry expectations for long-term security maintenance. Across open source infrastructure projects, a five-year security support window is increasingly the norm, particularly in embedded and automotive environments. Xen is already a strong fit in these domains, and clearer long-term guarantees help downstreams plan with confidence. Historically, Xen releases have received approximately 1.5 years of full support, followed by security-only support up to 3 years total. With this change, we are extending: - Full support to 3 years - Security support to 5 years total for each release Effective immediately, the support policy is as follows: Xen 4.20 and later - 3 years of full support (bug fixes and security fixes) - Followed by 2 years of security-only support - For a total of 5 years of security support Xen 4.17 to 4.19 - Security-only support up to a total of 5 years from original release - No general bug-fix backports This policy is being adopted as a baseline, and we will actively monitor its impact on the stable and security maintenance effort. If experience shows this model to be unsustainable or otherwise unworkable, the Committers and Core Maintainers reserve the ability to revise the policy with minimal disruption. Because all Xen releases follow the same support timelines, we intentionally avoid introducing LTS-branded branches. While the motivation aligns with traditional LTS goals, using LTS terminology can imply that only selected releases receive extended support. Our aim is consistent, predictable security support across all releases. This update strengthens Xen=E2=80=99s position in embedded and automotive u= se cases, while keeping the stable and security maintenance effort sustainable and avoiding changes to release cadence. The Xen Project website and documentation will be updated to reflect this policy. Cross-posted to xen-devel and xen-announce. Very best regards, Cody Zuschlag Xen Project - Community Manager --00000000000075fb52064a8f2d53 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Statement from the Xen Committers and Core Maintainer= s

TL;DR: All Xen releases will now have long-term support, with up t= o five years of security support.

The Xen Committers and Core Mainta= iners have agreed to update the Xen Project stable branch support policy to= better align with common industry expectations for long-term security main= tenance.

Across open source infrastructure projects, a five-year sec= urity support window is increasingly the norm, particularly in embedded and= automotive environments. Xen is already a strong fit in these domains, and= clearer long-term guarantees help downstreams plan with confidence.
Historically, Xen releases have received approximately 1.5 years of full s= upport, followed by security-only support up to 3 years total. With this ch= ange, we are extending:

- Full support to 3 years
- Security supp= ort to 5 years total for each release

Effective immediately, the sup= port policy is as follows:

Xen 4.20 and later
- 3 years of full s= upport (bug fixes and security fixes)
- Followed by 2 years of security-= only support
- For a total of 5 years of security support

Xen 4.1= 7 to 4.19
- Security-only support up to a total of 5 years from original= release
- No general bug-fix backports

This policy is being adop= ted as a baseline, and we will actively monitor its impact on the stable an= d security maintenance effort. If experience shows this model to be unsusta= inable or otherwise unworkable, the Committers and Core Maintainers reserve= the ability to revise the policy with minimal disruption.

Because a= ll Xen releases follow the same support timelines, we intentionally avoid i= ntroducing LTS-branded branches. While the motivation aligns with tradition= al LTS goals, using LTS terminology can imply that only selected releases r= eceive extended support. Our aim is consistent, predictable security suppor= t across all releases.

This update strengthens Xen=E2=80=99s positio= n in embedded and automotive use cases, while keeping the stable and securi= ty maintenance effort sustainable and avoiding changes to release cadence.<= br>
The Xen Project website and documentation will be updated to reflect= this policy.
Cross-posted to xen-devel and xen-announce.

Very best regards,

=
Cody Zuschlag
Xen Project - Community Manager
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Make CONFIG_VM_EVENT select CONFIG_WAIT, and use CONFIG_WAIT to control building it. Provide stubs of functions called from common code. entry.S needs an ifdef to hide the symbol from the assembly. Also conditionalize .waitqueue_vcpu in struct vcpu to save space. Signed-off-by: Jason Andryuk --- xen/arch/x86/x86_64/entry.S | 2 ++ xen/common/Kconfig | 4 ++++ xen/common/Makefile | 2 +- xen/include/xen/sched.h | 2 ++ xen/include/xen/wait.h | 11 +++++++++-- 5 files changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index ca446c6ff0..adb570c07e 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -664,7 +664,9 @@ FUNC(continue_pv_domain) ALTERNATIVE "", "mov $2, %eax; incsspd %eax", X86_FEATURE_XEN_SHSTK #endif +#ifdef CONFIG_WAIT call check_wakeup_from_wait +#endif ret_from_intr: GET_CURRENT(bx) testb $3, UREGS_cs(%rsp) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index d7e79e752a..ab3f24cb4f 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -173,10 +173,14 @@ config HAS_VMAP config LIBFDT bool +config WAIT + bool + config VM_EVENT bool "Memory Access and VM events" depends on HVM default X86 + select WAIT help Framework to configure memory access types for guests and receive diff --git a/xen/common/Makefile b/xen/common/Makefile index 4fc0c15088..ef2c5ddd4e 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -61,7 +61,7 @@ obj-y += virtual_region.o obj-$(CONFIG_VM_EVENT) += vm_event.o obj-$(CONFIG_HAS_VMAP) += vmap.o obj-y += vsprintf.o -obj-y += wait.o +obj-$(CONFIG_WAIT) += wait.o obj-bin-y += warning.init.o obj-y += xmalloc_tlsf.o diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..f232f2731e 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -293,7 +293,9 @@ struct vcpu /* Multicall information. */ struct mc_state mc_state; +#ifdef CONFIG_WAIT struct waitqueue_vcpu *waitqueue_vcpu; +#endif struct evtchn_fifo_vcpu *evtchn_fifo; diff --git a/xen/include/xen/wait.h b/xen/include/xen/wait.h index 1c68bc564b..d7d83adef1 100644 --- a/xen/include/xen/wait.h +++ b/xen/include/xen/wait.h @@ -49,11 +49,18 @@ do { \ } while (0) /* Private functions. */ -int init_waitqueue_vcpu(struct vcpu *v); -void destroy_waitqueue_vcpu(struct vcpu *v); void prepare_to_wait(struct waitqueue_head *wq); void wait(void); void finish_wait(struct waitqueue_head *wq); + +#ifdef CONFIG_WAIT +int init_waitqueue_vcpu(struct vcpu *v); +void destroy_waitqueue_vcpu(struct vcpu *v); void check_wakeup_from_wait(void); +#else +static inline int init_waitqueue_vcpu(struct vcpu *v) { return 0; } +static inline void destroy_waitqueue_vcpu(struct vcpu *v) {} +static inline void check_wakeup_from_wait(void) {} +#endif #endif /* __XEN_WAIT_H__ */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227991.1534345 (Exim 4.92) (envelope-from ) id 1vqDog-0004UH-3e; Wed, 11 Feb 2026 17:15:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227991.1534345; Wed, 11 Feb 2026 17:15:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDog-0004UA-0o; Wed, 11 Feb 2026 17:15:54 +0000 Received: by outflank-mailman (input) for mailman id 1227991; Wed, 11 Feb 2026 17:15:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDof-0004U4-3C for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:15:53 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 4e2adfb4-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:15:47 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 37D80339; Wed, 11 Feb 2026 09:15:40 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 775063F63F; Wed, 11 Feb 2026 09:15:45 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e2adfb4-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 00/12] xen/arm: ffa: v1.2 improvements Date: Wed, 11 Feb 2026 18:15:24 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series tightens Xen's FF-A mediator after the v1.2 enablement work, focusing on correctness, validation, and diagnostics while keeping existing v1.0/v1.1 guests working. Hardening and validation (Patches 1-3): 1) centralize endpoint lookup validation for messaging paths 2) reject NS MEM_SHARE attributes and name normal memory encoding 3) tighten MEM_SHARE page parsing with overflow/alignment checks FF-A 1.2 support (Patch 4): 4) accept 1.2 EMADs in MEM_SHARE and forward IMPDEF while allowing 1.1 layouts Correctness fixes (Patches 5-9): 5) avoid spurious SPMC RX releases on PARTINFO failures 6) align RX/TX map descriptor layout and return NO_MEMORY on map failures 7) deny RXTX_UNMAP while a VM owns the RX buffer and close the race 8) validate FFA_FEATURES properties and gate ABIs, with RX_ACQUIRE workaround 9) gate SEND2 SP support on RX_ACQUIRE Code quality and diagnostics (Patches 10-12): 10) reduce log noise and ratelimit expected failures 11) add MEM_SHARE page diagnostics for malformed ranges and mapping issues 12) add message parameter diagnostics for SEND2 and direct requests Backward compatibility: v1.0/v1.1 guests continue to use their ABI unchanged; v1.2 guests use EMADs and negotiated ABI features. The implementation passes the FF-A Architecture Compliance Suite. This serie was validated through gitlab-ci here: https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/tree/ffa-v12-improve/v2 Build pipeline for the serie: https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/pipelines/2319853458 Changes since v1: - Handle review comments, details in each patch - add Jens R-b on reviewed patches Bertrand Marquis (12): xen/arm: ffa: Add endpoint lookup helper xen/arm: ffa: Fix MEM_SHARE NS attribute handling xen/arm: ffa: Harden shm page parsing xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors xen/arm: ffa: Fix PARTINFO RX release errors xen/arm: ffa: Fix RX/TX map layout and errors xen/arm: ffa: Fix RXTX_UNMAP ownership race xen/arm: ffa: Fix FFA_FEATURES validation xen/arm: ffa: Fix SEND2 SP support gating xen/arm: ffa: Reduce logging noise xen/arm: ffa: Add MEM_SHARE page diagnostics xen/arm: ffa: Add message parameter diagnostics xen/arch/arm/tee/ffa.c | 127 +++++++++++++++--- xen/arch/arm/tee/ffa_msg.c | 80 ++++++++--- xen/arch/arm/tee/ffa_notif.c | 11 +- xen/arch/arm/tee/ffa_partinfo.c | 29 ++-- xen/arch/arm/tee/ffa_private.h | 34 ++++- xen/arch/arm/tee/ffa_rxtx.c | 80 +++++++++-- xen/arch/arm/tee/ffa_shm.c | 226 ++++++++++++++++++++++---------- 7 files changed, 450 insertions(+), 137 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227992.1534356 (Exim 4.92) (envelope-from ) id 1vqDon-0004jN-9s; Wed, 11 Feb 2026 17:16:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227992.1534356; Wed, 11 Feb 2026 17:16:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDon-0004jG-79; Wed, 11 Feb 2026 17:16:01 +0000 Received: by outflank-mailman (input) for mailman id 1227992; Wed, 11 Feb 2026 17:15:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDol-0004U4-TD for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:15:59 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 54b4f057-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:15:58 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1DEE0339; Wed, 11 Feb 2026 09:15:51 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A61E3F63F; Wed, 11 Feb 2026 09:15:56 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 54b4f057-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 01/12] xen/arm: ffa: Add endpoint lookup helper Date: Wed, 11 Feb 2026 18:15:25 +0100 Message-ID: <6f3d7c8a34c5bf9c0b860bbc86859aa658a6bc92.1770826406.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Direct messaging paths duplicate endpoint validation and RCU domain lookup logic across multiple call sites, which makes the checks easy to drift and complicates maintenance. Introduce ffa_endpoint_domain_lookup() to centralize this logic. The helper validates the endpoint ID (rejecting ID 0 for the hypervisor), performs RCU domain lookup, ensures the domain is live and has an initialized FF-A context with a negotiated version, and returns the domain locked via RCU. Switch ffa_msg_send2_vm() to use the helper, replacing its open-coded validation sequence. This consolidates approximately 20 lines of duplicated checks into a single call. No functional changes. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - add Jens R-b --- xen/arch/arm/tee/ffa.c | 45 ++++++++++++++++++++++++++++++++++ xen/arch/arm/tee/ffa_msg.c | 24 +++--------------- xen/arch/arm/tee/ffa_private.h | 3 +++ 3 files changed, 51 insertions(+), 21 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index ed18e76080d0..6de2b9f8ac8e 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -433,6 +433,51 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) return true; } +/* + * Look up a domain by its FF-A endpoint ID and validate it's ready for FF-A. + * Returns FFA_RET_OK on success with domain locked via RCU. + * Caller must call rcu_unlock_domain() when done. + * + * Validates: + * - endpoint_id is not 0 (the hypervisor) + * - domain exists and is live + * - domain has FF-A context initialized + * - domain has negotiated an FF-A version + */ +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, + struct ffa_ctx **ctx_out) +{ + struct domain *d; + struct ffa_ctx *ctx; + int err; + + if ( endpoint_id == 0 ) + return FFA_RET_INVALID_PARAMETERS; + + err = rcu_lock_live_remote_domain_by_id(endpoint_id - 1, &d); + if ( err ) + return FFA_RET_INVALID_PARAMETERS; + + if ( !d->arch.tee ) + { + rcu_unlock_domain(d); + return FFA_RET_INVALID_PARAMETERS; + } + + ctx = d->arch.tee; + if ( !ACCESS_ONCE(ctx->guest_vers) ) + { + rcu_unlock_domain(d); + return FFA_RET_INVALID_PARAMETERS; + } + + *d_out = d; + if ( ctx_out ) + *ctx_out = ctx; + + return FFA_RET_OK; +} + static int ffa_domain_init(struct domain *d) { struct ffa_ctx *ctx; diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 4e26596461a9..10856fddcbc4 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -161,30 +161,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, struct ffa_part_msg_rxtx_1_2 *dst_msg; void *rx_buf; size_t rx_size; - int err; int32_t ret; - if ( dst_id == 0 ) - /* FF-A ID 0 is the hypervisor, this is not valid */ - return FFA_RET_INVALID_PARAMETERS; - /* This is also checking that dest is not src */ - err = rcu_lock_live_remote_domain_by_id(dst_id - 1, &dst_d); - if ( err ) - return FFA_RET_INVALID_PARAMETERS; - - if ( dst_d->arch.tee == NULL ) - { - ret = FFA_RET_INVALID_PARAMETERS; - goto out_unlock; - } - - dst_ctx = dst_d->arch.tee; - if ( !ACCESS_ONCE(dst_ctx->guest_vers) ) - { - ret = FFA_RET_INVALID_PARAMETERS; - goto out_unlock; - } + ret = ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); + if ( ret ) + return ret; /* This also checks that destination has set a Rx buffer */ ret = ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index 282c105f3bce..cd7ecabc7eff 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -437,6 +437,9 @@ int32_t ffa_partinfo_domain_init(struct domain *d); bool ffa_partinfo_domain_destroy(struct domain *d); void ffa_handle_partition_info_get(struct cpu_user_regs *regs); +int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, + struct ffa_ctx **ctx_out); + bool ffa_rxtx_spmc_init(void); void ffa_rxtx_spmc_destroy(void); void *ffa_rxtx_spmc_rx_acquire(void); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227993.1534366 (Exim 4.92) (envelope-from ) id 1vqDop-0004yg-Gz; Wed, 11 Feb 2026 17:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227993.1534366; Wed, 11 Feb 2026 17:16:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDop-0004yP-DP; Wed, 11 Feb 2026 17:16:03 +0000 Received: by outflank-mailman (input) for mailman id 1227993; Wed, 11 Feb 2026 17:16:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDon-0004U4-AV for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:01 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 55995b5d-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:15:59 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A21EB497; Wed, 11 Feb 2026 09:15:52 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BB1083F63F; Wed, 11 Feb 2026 09:15:57 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 55995b5d-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 02/12] xen/arm: ffa: Fix MEM_SHARE NS attribute handling Date: Wed, 11 Feb 2026 18:15:26 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The FF-A memory attribute encoding is currently a literal value (0x2f), which makes reviews and validation harder. In addition, MEM_SHARE accepts the NS (non-secure) attribute bit even though the normal world must not set it according to FF-A specification. Introduce named attribute bit masks and express FFA_NORMAL_MEM_REG_ATTR in terms of them for clarity. Reject MEM_SHARE descriptors with the NS bit set, returning INVALID_PARAMETERS to match FF-A v1.1 rules that prohibit normal world from setting this bit. Functional impact: MEM_SHARE now rejects descriptors with NS bit set with the right error code, INVALID_PARAMETER. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - Fix functional impact to mention the error code fix as the case was already filtered before but with a non spec compliant code - Add Jens R-b --- xen/arch/arm/tee/ffa_private.h | 17 ++++++++++++++++- xen/arch/arm/tee/ffa_shm.c | 6 ++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index cd7ecabc7eff..b625f1c72914 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -129,11 +129,26 @@ #define FFA_HANDLE_HYP_FLAG BIT(63, ULL) #define FFA_HANDLE_INVALID 0xffffffffffffffffULL +/* NS attribute was introduced in v1.1 */ +#define FFA_MEM_ATTR_NS BIT(6, U) + +#define FFA_MEM_ATTR_TYPE_DEV (1U << 3) +#define FFA_MEM_ATTR_TYPE_MEM (2U << 4) + +#define FFA_MEM_ATTR_NC (1U << 2) +#define FFA_MEM_ATTR_WB (3U << 2) + +#define FFA_MEM_ATTR_NON_SHARE (0U) +#define FFA_MEM_ATTR_OUT_SHARE (2U) +#define FFA_MEM_ATTR_INN_SHARE (3U) + /* * Memory attributes: Normal memory, Write-Back cacheable, Inner shareable * Defined in FF-A-1.1-REL0 Table 10.18 at page 175. */ -#define FFA_NORMAL_MEM_REG_ATTR 0x2fU +#define FFA_NORMAL_MEM_REG_ATTR (FFA_MEM_ATTR_TYPE_MEM | \ + FFA_MEM_ATTR_WB | \ + FFA_MEM_ATTR_INN_SHARE) /* * Memory access permissions: Read-write * Defined in FF-A-1.1-REL0 Table 10.15 at page 168. diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 8282bacf85d3..90800e44a86a 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -512,6 +512,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( ret ) goto out_unlock; + if ( trans.mem_reg_attr & FFA_MEM_ATTR_NS ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + if ( trans.mem_reg_attr != FFA_NORMAL_MEM_REG_ATTR ) { ret = FFA_RET_NOT_SUPPORTED; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227994.1534373 (Exim 4.92) (envelope-from ) id 1vqDop-000528-Ui; Wed, 11 Feb 2026 17:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227994.1534373; Wed, 11 Feb 2026 17:16:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDop-00051c-MS; Wed, 11 Feb 2026 17:16:03 +0000 Received: by outflank-mailman (input) for mailman id 1227994; Wed, 11 Feb 2026 17:16:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDoo-0004tt-CH for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:02 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 56820d96-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:01 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 307D1339; Wed, 11 Feb 2026 09:15:54 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4BBCE3F63F; Wed, 11 Feb 2026 09:15:59 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 56820d96-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 03/12] xen/arm: ffa: Harden shm page parsing Date: Wed, 11 Feb 2026 18:15:27 +0100 Message-ID: <5189cce4272700616ff5a39870566abc72a1acd2.1770826406.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit get_shm_pages() uses unchecked address arithmetic and does not enforce alignment, so malformed descriptors can cause overflow or slip through validation. The reclaim path also repeats handle-to-shm-mem conversion in multiple places, duplicating error handling. Harden page parsing and reclaim handling: - add ffa_safe_addr_add() and use it to detect address overflows - enforce alignment checks in get_shm_pages() and return FF-A errors - introduce ffa_secure_reclaim() and use it for MEM_RECLAIM and teardown - simplify ffa_mem_share() argument handling and allow max page count While there rename ffa_mem_share to ffa_spmc_share and ffa_mem_reclaim to ffa_spmc_reclaim to have coherent names with other parts of ffa implementation for SMC wrappers to the SPMC. Functional impact: invalid or misaligned memory ranges now fail earlier with proper error codes; behavior for valid descriptors is unchanged. Signed-off-by: Bertrand Marquis --- Changes since v1: - rename ffa_mem_share to ffa_spmc_share and ffa_mem_reclaim to ffa_spmc_reclaim - remove unused frag_len --- xen/arch/arm/tee/ffa_private.h | 11 +++++++ xen/arch/arm/tee/ffa_shm.c | 60 ++++++++++++++++------------------ 2 files changed, 40 insertions(+), 31 deletions(-) diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index b625f1c72914..58562d8e733c 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -632,4 +632,15 @@ static inline void ffa_uuid_set(struct ffa_uuid *id, uint32_t val0, id->val[1] = ((uint64_t)val3 << 32U) | val2; } +/* + * Common overflow-safe helper to verify that adding a number of pages to an + * address will not wrap around. + */ +static inline bool ffa_safe_addr_add(uint64_t addr, uint64_t pages) +{ + uint64_t off = pages * FFA_PAGE_SIZE; + + return (off / FFA_PAGE_SIZE) == pages && addr <= UINT64_MAX - off; +} + #endif /*__FFA_PRIVATE_H__*/ diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 90800e44a86a..adc7e645a1c7 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -96,16 +96,14 @@ struct ffa_shm_mem { struct page_info *pages[]; }; -static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, - register_t addr, uint32_t pg_count, - uint64_t *handle) +static int32_t ffa_spmc_share(uint32_t tot_len, uint64_t *handle) { struct arm_smccc_1_2_regs arg = { .a0 = FFA_MEM_SHARE_64, .a1 = tot_len, - .a2 = frag_len, - .a3 = addr, - .a4 = pg_count, + .a2 = tot_len, + .a3 = 0, + .a4 = 0, }; struct arm_smccc_1_2_regs resp; @@ -131,12 +129,16 @@ static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, } } -static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, - uint32_t flags) +static int32_t ffa_spmc_reclaim(struct ffa_shm_mem *shm, uint32_t flags) { + register_t handle_hi; + register_t handle_lo; + if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) return FFA_RET_NOT_SUPPORTED; + uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); + return ffa_simple_call(FFA_MEM_RECLAIM, handle_lo, handle_hi, flags, 0); } @@ -145,7 +147,7 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, * this function fails then the caller is still expected to call * put_shm_pages() as a cleanup. */ -static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, +static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, const struct ffa_address_range *range, uint32_t range_count) { @@ -156,17 +158,26 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, p2m_type_t t; uint64_t addr; uint64_t page_count; + uint64_t gaddr; for ( n = 0; n < range_count; n++ ) { page_count = ACCESS_ONCE(range[n].page_count); addr = ACCESS_ONCE(range[n].address); + + if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) + return FFA_RET_INVALID_PARAMETERS; + for ( m = 0; m < page_count; m++ ) { if ( pg_idx >= shm->page_count ) return FFA_RET_INVALID_PARAMETERS; - gfn = gaddr_to_gfn(addr + m * FFA_PAGE_SIZE); + if ( !ffa_safe_addr_add(addr, m) ) + return FFA_RET_INVALID_PARAMETERS; + + gaddr = addr + m * FFA_PAGE_SIZE; + gfn = gaddr_to_gfn(gaddr); shm->pages[pg_idx] = get_page_from_gfn(d, gfn_x(gfn), &t, P2M_ALLOC); if ( !shm->pages[pg_idx] ) @@ -180,7 +191,7 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, /* The ranges must add up */ if ( pg_idx < shm->page_count ) - return FFA_RET_INVALID_PARAMETERS; + return FFA_RET_INVALID_PARAMETERS; return FFA_RET_OK; } @@ -198,15 +209,11 @@ static void put_shm_pages(struct ffa_shm_mem *shm) static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) { - bool ret = true; + bool ret = false; spin_lock(&ctx->lock); - if ( ctx->shm_count >= FFA_MAX_SHM_COUNT ) - { - ret = false; - } - else + if ( ctx->shm_count < FFA_MAX_SHM_COUNT ) { /* * If this is the first shm added, increase the domain reference @@ -217,6 +224,7 @@ static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) get_knownalive_domain(d); ctx->shm_count++; + ret = true; } spin_unlock(&ctx->lock); @@ -251,7 +259,7 @@ static struct ffa_shm_mem *alloc_ffa_shm_mem(struct domain *d, struct ffa_ctx *ctx = d->arch.tee; struct ffa_shm_mem *shm; - if ( page_count >= FFA_MAX_SHM_PAGE_COUNT ) + if ( page_count > FFA_MAX_SHM_PAGE_COUNT ) return NULL; if ( !inc_ctx_shm_count(d, ctx) ) return NULL; @@ -297,7 +305,6 @@ static int share_shm(struct ffa_shm_mem *shm) struct ffa_address_range *addr_range; struct ffa_mem_region *region_descr; const unsigned int region_count = 1; - uint32_t frag_len; uint32_t tot_len; paddr_t last_pa; unsigned int n; @@ -350,7 +357,6 @@ static int share_shm(struct ffa_shm_mem *shm) } addr_range = region_descr->address_range_array; - frag_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, 1); last_pa = page_to_maddr(shm->pages[0]); init_range(addr_range, last_pa); for ( n = 1; n < shm->page_count; last_pa = pa, n++ ) @@ -362,12 +368,11 @@ static int share_shm(struct ffa_shm_mem *shm) continue; } - frag_len += sizeof(*addr_range); addr_range++; init_range(addr_range, pa); } - ret = ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle); + ret = ffa_spmc_share(tot_len, &shm->handle); out: ffa_rxtx_spmc_tx_release(); @@ -637,8 +642,6 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags) struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; struct ffa_shm_mem *shm; - register_t handle_hi; - register_t handle_lo; int32_t ret; if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) @@ -652,8 +655,7 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags) if ( !shm ) return FFA_RET_INVALID_PARAMETERS; - uint64_to_regpair(&handle_hi, &handle_lo, handle); - ret = ffa_mem_reclaim(handle_lo, handle_hi, flags); + ret = ffa_spmc_reclaim(shm, flags); if ( ret ) { @@ -677,11 +679,7 @@ bool ffa_shm_domain_destroy(struct domain *d) list_for_each_entry_safe(shm, tmp, &ctx->shm_list, list) { - register_t handle_hi; - register_t handle_lo; - - uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); - res = ffa_mem_reclaim(handle_lo, handle_hi, 0); + res = ffa_spmc_reclaim(shm, 0); switch ( res ) { case FFA_RET_OK: printk(XENLOG_G_DEBUG "%pd: ffa: Reclaimed handle %#lx\n", -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227996.1534386 (Exim 4.92) (envelope-from ) id 1vqDos-0005TZ-3a; Wed, 11 Feb 2026 17:16:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227996.1534386; Wed, 11 Feb 2026 17:16:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDos-0005TL-0k; Wed, 11 Feb 2026 17:16:06 +0000 Received: by outflank-mailman (input) for mailman id 1227996; Wed, 11 Feb 2026 17:16:04 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDoq-0004U4-JT for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:04 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 576c8058-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:16:02 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BBD89497; Wed, 11 Feb 2026 09:15:55 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D0E933F63F; Wed, 11 Feb 2026 09:16:00 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 576c8058-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 04/12] xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors Date: Wed, 11 Feb 2026 18:15:28 +0100 Message-ID: <8ddb97095d8f7f4140e660d2ff13ec2ccc82cc62.1770826406.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FF-A 1.2 extends the endpoint memory access descriptor (EMAD) from 16 to 32 bytes, adding implementation-defined (IMPDEF) fields and reserved space. The MEM_SHARE path currently assumes the 1.1 EMAD size and rejects the 1.2 layout. Add FF-A 1.2 EMAD support to MEM_SHARE: - define ffa_mem_access_1_2 and store IMPDEF payload in ffa_shm_mem - emit 1.2 EMADs to the SPMC for FF-A 1.2 guests, forwarding IMPDEF - refactor header parsing into read_mem_transaction() for 1.0/1.1+ - detect EMAD format by mem_access_size to allow 1.1 on 1.2 guests Export ffa_fw_version to build memory descriptors according to the firware version to relay share memory requests and remove unused offset macros. Functional impact: MEM_SHARE supports FF-A 1.2 EMADs. Signed-off-by: Bertrand Marquis --- Changes since v1: - export ffa_fw_version and use it to construct descriptors according to firmware version - remove unused offset macros --- xen/arch/arm/tee/ffa.c | 2 +- xen/arch/arm/tee/ffa_private.h | 1 + xen/arch/arm/tee/ffa_shm.c | 121 +++++++++++++++++++++++---------- 3 files changed, 87 insertions(+), 37 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 6de2b9f8ac8e..23e1f408485b 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -70,7 +70,7 @@ #include "ffa_private.h" /* Negotiated FF-A version to use with the SPMC, 0 if not there or supported */ -static uint32_t __ro_after_init ffa_fw_version; +uint32_t __ro_after_init ffa_fw_version; /* Features supported by the SPMC or secure world when present */ DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE); diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index 58562d8e733c..ccef2f7631f6 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -436,6 +436,7 @@ struct ffa_ctx { }; extern DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE); +extern uint32_t __ro_after_init ffa_fw_version; extern struct list_head ffa_ctx_head; extern rwlock_t ffa_ctx_list_rwlock; diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index adc7e645a1c7..070babce9627 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -30,6 +30,14 @@ struct ffa_mem_access { uint64_t reserved; }; +/* Endpoint memory access descriptor (FF-A 1.2) */ +struct ffa_mem_access_1_2 { + struct ffa_mem_access_perm access_perm; + uint32_t region_offs; + uint8_t impdef[16]; + uint8_t reserved[8]; +}; + /* Lend, donate or share memory transaction descriptor */ struct ffa_mem_transaction_1_0 { uint16_t sender_id; @@ -55,25 +63,10 @@ struct ffa_mem_transaction_1_1 { uint8_t reserved[12]; }; -/* Calculate offset of struct ffa_mem_access from start of buffer */ -#define MEM_ACCESS_OFFSET(access_idx) \ - ( sizeof(struct ffa_mem_transaction_1_1) + \ - ( access_idx ) * sizeof(struct ffa_mem_access) ) - -/* Calculate offset of struct ffa_mem_region from start of buffer */ -#define REGION_OFFSET(access_count, region_idx) \ - ( MEM_ACCESS_OFFSET(access_count) + \ - ( region_idx ) * sizeof(struct ffa_mem_region) ) - -/* Calculate offset of struct ffa_address_range from start of buffer */ -#define ADDR_RANGE_OFFSET(access_count, region_count, range_idx) \ - ( REGION_OFFSET(access_count, region_count) + \ - ( range_idx ) * sizeof(struct ffa_address_range) ) - /* * The parts needed from struct ffa_mem_transaction_1_0 or struct * ffa_mem_transaction_1_1, used to provide an abstraction of difference in - * data structures between version 1.0 and 1.1. This is just an internal + * data structures between version 1.0 and 1.2. This is just an internal * interface and can be changed without changing any ABI. */ struct ffa_mem_transaction_int { @@ -92,6 +85,8 @@ struct ffa_shm_mem { uint16_t sender_id; uint16_t ep_id; /* endpoint, the one lending */ uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ + /* Endpoint memory access descriptor IMPDEF value (FF-A 1.2). */ + uint64_t impdef[2]; unsigned int page_count; struct page_info *pages[]; }; @@ -297,16 +292,20 @@ static void init_range(struct ffa_address_range *addr_range, * This function uses the ffa_spmc tx buffer to transmit the memory transaction * descriptor. */ -static int share_shm(struct ffa_shm_mem *shm) +static int share_shm(struct ffa_shm_mem *shm, uint32_t ffa_vers) { const uint32_t max_frag_len = FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE; struct ffa_mem_access *mem_access_array; + struct ffa_mem_access_1_2 *mem_access_array_1_2; struct ffa_mem_transaction_1_1 *descr; struct ffa_address_range *addr_range; struct ffa_mem_region *region_descr; - const unsigned int region_count = 1; uint32_t tot_len; + uint32_t mem_access_size; + uint32_t mem_access_offs; + uint32_t region_offs; paddr_t last_pa; + uint32_t range_count; unsigned int n; paddr_t pa; int32_t ret; @@ -325,16 +324,35 @@ static int share_shm(struct ffa_shm_mem *shm) descr->handle = shm->handle; descr->mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR; descr->mem_access_count = 1; - descr->mem_access_size = sizeof(*mem_access_array); - descr->mem_access_offs = MEM_ACCESS_OFFSET(0); + if ( ffa_vers >= FFA_VERSION_1_2 ) + mem_access_size = sizeof(struct ffa_mem_access_1_2); + else + mem_access_size = sizeof(struct ffa_mem_access); + mem_access_offs = sizeof(struct ffa_mem_transaction_1_1); + region_offs = mem_access_offs + mem_access_size; + descr->mem_access_size = mem_access_size; + descr->mem_access_offs = mem_access_offs; - mem_access_array = buf + descr->mem_access_offs; - memset(mem_access_array, 0, sizeof(*mem_access_array)); - mem_access_array[0].access_perm.endpoint_id = shm->ep_id; - mem_access_array[0].access_perm.perm = FFA_MEM_ACC_RW; - mem_access_array[0].region_offs = REGION_OFFSET(descr->mem_access_count, 0); + if ( ffa_vers >= FFA_VERSION_1_2 ) + { + mem_access_array_1_2 = buf + mem_access_offs; + memset(mem_access_array_1_2, 0, sizeof(*mem_access_array_1_2)); + mem_access_array_1_2[0].access_perm.endpoint_id = shm->ep_id; + mem_access_array_1_2[0].access_perm.perm = FFA_MEM_ACC_RW; + mem_access_array_1_2[0].region_offs = region_offs; + memcpy(mem_access_array_1_2[0].impdef, shm->impdef, + sizeof(mem_access_array_1_2[0].impdef)); + } + else + { + mem_access_array = buf + mem_access_offs; + memset(mem_access_array, 0, sizeof(*mem_access_array)); + mem_access_array[0].access_perm.endpoint_id = shm->ep_id; + mem_access_array[0].access_perm.perm = FFA_MEM_ACC_RW; + mem_access_array[0].region_offs = region_offs; + } - region_descr = buf + mem_access_array[0].region_offs; + region_descr = buf + region_offs; memset(region_descr, 0, sizeof(*region_descr)); region_descr->total_page_count = shm->page_count; @@ -348,8 +366,9 @@ static int share_shm(struct ffa_shm_mem *shm) region_descr->address_range_count++; } - tot_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, - region_descr->address_range_count); + range_count = region_descr->address_range_count; + tot_len = region_offs + sizeof(*region_descr) + + range_count * sizeof(struct ffa_address_range); if ( tot_len > max_frag_len ) { ret = FFA_RET_NOT_SUPPORTED; @@ -445,6 +464,12 @@ static int read_mem_transaction(uint32_t ffa_vers, const void *buf, size_t blen, if ( size * count + offs > blen ) return FFA_RET_INVALID_PARAMETERS; + if ( size < sizeof(struct ffa_mem_access) ) + return FFA_RET_INVALID_PARAMETERS; + + if ( offs & 0xF ) + return FFA_RET_INVALID_PARAMETERS; + trans->mem_reg_attr = mem_reg_attr; trans->flags = flags; trans->mem_access_size = size; @@ -461,7 +486,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) uint64_t addr = get_user_reg(regs, 3); uint32_t page_count = get_user_reg(regs, 4); const struct ffa_mem_region *region_descr; - const struct ffa_mem_access *mem_access; + const struct ffa_mem_access_1_2 *mem_access; struct ffa_mem_transaction_int trans; struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; @@ -471,9 +496,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) register_t handle_hi = 0; register_t handle_lo = 0; int ret = FFA_RET_DENIED; + uint32_t ffa_vers; uint32_t range_count; uint32_t region_offs; uint16_t dst_id; + uint8_t perm; + uint64_t impdef[2]; if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) { @@ -512,8 +540,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( frag_len > tx_size ) goto out_unlock; - ret = read_mem_transaction(ACCESS_ONCE(ctx->guest_vers), tx_buf, - frag_len, &trans); + ffa_vers = ACCESS_ONCE(ctx->guest_vers); + ret = read_mem_transaction(ffa_vers, tx_buf, frag_len, &trans); if ( ret ) goto out_unlock; @@ -542,13 +570,35 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) goto out_unlock; } + if ( trans.mem_access_size < sizeof(struct ffa_mem_access) ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + /* Check that it fits in the supplied data */ if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) goto out_unlock; mem_access = tx_buf + trans.mem_access_offs; - dst_id = ACCESS_ONCE(mem_access->access_perm.endpoint_id); + perm = ACCESS_ONCE(mem_access->access_perm.perm); + region_offs = ACCESS_ONCE(mem_access->region_offs); + + /* + * FF-A 1.2 introduced an extended mem_access descriptor with impdef + * fields, but guests can still use the 1.1 format if they don't need + * implementation-defined data. Detect which format is used based on + * the mem_access_size field rather than the negotiated FF-A version. + */ + if ( trans.mem_access_size >= sizeof(struct ffa_mem_access_1_2) ) + memcpy(impdef, mem_access->impdef, sizeof(impdef)); + else + { + impdef[0] = 0; + impdef[1] = 0; + } + if ( !FFA_ID_IS_SECURE(dst_id) ) { /* we do not support sharing with VMs */ @@ -556,13 +606,11 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) goto out_unlock; } - if ( ACCESS_ONCE(mem_access->access_perm.perm) != FFA_MEM_ACC_RW ) + if ( perm != FFA_MEM_ACC_RW ) { ret = FFA_RET_NOT_SUPPORTED; goto out_unlock; } - - region_offs = ACCESS_ONCE(mem_access->region_offs); if ( sizeof(*region_descr) + region_offs > frag_len ) { ret = FFA_RET_NOT_SUPPORTED; @@ -587,6 +635,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) } shm->sender_id = trans.sender_id; shm->ep_id = dst_id; + memcpy(shm->impdef, impdef, sizeof(shm->impdef)); /* * Check that the Composite memory region descriptor fits. @@ -602,7 +651,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) if ( ret ) goto out; - ret = share_shm(shm); + ret = share_shm(shm, ffa_fw_version); if ( ret ) goto out; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227997.1534396 (Exim 4.92) (envelope-from ) id 1vqDot-0005l5-H1; Wed, 11 Feb 2026 17:16:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227997.1534396; Wed, 11 Feb 2026 17:16:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDot-0005kL-Ch; Wed, 11 Feb 2026 17:16:07 +0000 Received: by outflank-mailman (input) for mailman id 1227997; Wed, 11 Feb 2026 17:16:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDoq-0004tt-My for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:04 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 583ec24c-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:04 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F660339; Wed, 11 Feb 2026 09:15:57 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 63DC63F63F; Wed, 11 Feb 2026 09:16:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 583ec24c-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 05/12] xen/arm: ffa: Fix PARTINFO RX release errors Date: Wed, 11 Feb 2026 18:15:29 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On PARTITION_INFO_GET error paths, Xen unconditionally called FFA_RX_RELEASE for the SPMC RX buffer. If the SPMC didn't grant RX ownership (i.e., the call failed early), this issues a spurious release that returns DENIED and produces warnings. Modify ffa_rxtx_spmc_rx_release() to return the release status and let callers choose whether to log it. Only issue FFA_RX_RELEASE after a successful PARTINFO SMC, while always releasing the local RX lock to avoid deadlocks. Update handle_partition_info_get() to only release the SPMC RX buffer after successful fw_ret checks, and ignore release errors during the error path. Functional impact: eliminates spurious FFA_RX_RELEASE calls and associated DENIED warnings when PARTITION_INFO_GET fails before obtaining SPMC RX buffer ownership. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - Rename spmc_ok to notify_fw - Add Jens R-b --- xen/arch/arm/tee/ffa_partinfo.c | 14 ++++++++++++-- xen/arch/arm/tee/ffa_private.h | 2 +- xen/arch/arm/tee/ffa_rxtx.c | 14 +++++++++----- 3 files changed, 22 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index bf906ed0c88f..015097bd4d2a 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -92,9 +92,11 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, uint32_t dst_size) { int32_t ret; + int32_t release_ret; uint32_t src_size, real_sp_count; void *src_buf; uint32_t count = 0; + bool notify_fw = false; /* We need to use the RX buffer to receive the list */ src_buf = ffa_rxtx_spmc_rx_acquire(); @@ -104,6 +106,7 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, ret = ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size); if ( ret ) goto out; + notify_fw = true; /* Validate the src_size we got */ if ( src_size < sizeof(struct ffa_partition_info_1_0) || @@ -157,7 +160,10 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, *sp_count = count; out: - ffa_rxtx_spmc_rx_release(); + release_ret = ffa_rxtx_spmc_rx_release(notify_fw); + if ( release_ret ) + gprintk(XENLOG_WARNING, + "ffa: Error releasing SPMC RX buffer: %d\n", release_ret); return ret; } @@ -507,6 +513,7 @@ bool ffa_partinfo_init(void) int32_t e; void *spmc_rx; struct ffa_uuid nil_uuid = { .val = { 0ULL, 0ULL } }; + bool notify_fw = false; if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) || !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32)) @@ -522,6 +529,7 @@ bool ffa_partinfo_init(void) printk(XENLOG_ERR "ffa: Failed to get list of SPs: %d\n", e); goto out; } + notify_fw = true; if ( count >= FFA_MAX_NUM_SP ) { @@ -533,7 +541,9 @@ bool ffa_partinfo_init(void) ret = init_subscribers(spmc_rx, count, fpi_size); out: - ffa_rxtx_spmc_rx_release(); + e = ffa_rxtx_spmc_rx_release(notify_fw); + if ( e ) + printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n", e); return ret; } diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index ccef2f7631f6..1a632983c860 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -459,7 +459,7 @@ int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, bool ffa_rxtx_spmc_init(void); void ffa_rxtx_spmc_destroy(void); void *ffa_rxtx_spmc_rx_acquire(void); -void ffa_rxtx_spmc_rx_release(void); +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw); void *ffa_rxtx_spmc_tx_acquire(void); void ffa_rxtx_spmc_tx_release(void); diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index 7d8bb4f4d031..50758fb57cdf 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -375,18 +375,22 @@ void *ffa_rxtx_spmc_rx_acquire(void) return NULL; } -void ffa_rxtx_spmc_rx_release(void) +int32_t ffa_rxtx_spmc_rx_release(bool notify_fw) { int32_t ret; ASSERT(spin_is_locked(&ffa_spmc_rx_lock)); - /* Inform the SPMC that we are done with our RX buffer */ - ret = ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); - if ( ret != FFA_RET_OK ) - printk(XENLOG_DEBUG "Error releasing SPMC RX buffer: %d\n", ret); + if ( notify_fw ) + { + /* Inform the SPMC that we are done with our RX buffer */ + ret = ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); + } + else + ret = FFA_RET_OK; spin_unlock(&ffa_spmc_rx_lock); + return ret; } void *ffa_rxtx_spmc_tx_acquire(void) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227998.1534406 (Exim 4.92) (envelope-from ) id 1vqDou-00061R-RU; Wed, 11 Feb 2026 17:16:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227998.1534406; Wed, 11 Feb 2026 17:16:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDou-0005zv-MQ; Wed, 11 Feb 2026 17:16:08 +0000 Received: by outflank-mailman (input) for mailman id 1227998; Wed, 11 Feb 2026 17:16:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDot-0004U4-1Z for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:07 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 590bddd8-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:16:05 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7DD33143D; Wed, 11 Feb 2026 09:15:58 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CC05D3F63F; Wed, 11 Feb 2026 09:16:03 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 590bddd8-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 06/12] xen/arm: ffa: Fix RX/TX map layout and errors Date: Wed, 11 Feb 2026 18:15:30 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FFA_RXTX_MAP builds a descriptor for the SPMC and the composite region offsets must be 8-byte aligned. Xen currently uses a 12-byte header size, which produces misaligned RX/TX offsets. Mapping failures also return INVALID_PARAMETERS even when the failure is due to resource exhaustion, which misreports the error condition. Round the descriptor header size up to 8 bytes before placing the RX region and derive the TX offset from the aligned RX offset. Return FFA_RET_NO_MEMORY when the TX or RX buffer mapping fails before the error paths unwind. Functional impact: RXTX_MAP now returns NO_MEMORY on mapping failures and the SPMC receives an aligned RX/TX descriptor layout. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - add Jens R-b --- xen/arch/arm/tee/ffa_rxtx.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index 50758fb57cdf..eff95a7955d7 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -119,11 +119,17 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, tx = __map_domain_page_global(tx_pg); if ( !tx ) + { + ret = FFA_RET_NO_MEMORY; goto err_put_rx_pg; + } rx = __map_domain_page_global(rx_pg); if ( !rx ) + { + ret = FFA_RET_NO_MEMORY; goto err_unmap_tx; + } /* * Transmit the RX/TX buffer information to the SPM if acquire is supported @@ -136,7 +142,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, struct ffa_mem_region *mem_reg; /* All must fit in our TX buffer */ - BUILD_BUG_ON(sizeof(*rxtx_desc) + sizeof(*mem_reg) * 2 + + BUILD_BUG_ON(ROUNDUP(sizeof(*rxtx_desc), 8) + + sizeof(*mem_reg) * 2 + sizeof(struct ffa_address_range) * 2 > FFA_MAX_RXTX_PAGE_COUNT * FFA_PAGE_SIZE); @@ -153,8 +160,8 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, */ rxtx_desc->sender_id = ffa_get_vm_id(d); rxtx_desc->reserved = 0; - rxtx_desc->rx_region_offs = sizeof(*rxtx_desc); - rxtx_desc->tx_region_offs = sizeof(*rxtx_desc) + + rxtx_desc->rx_region_offs = ROUNDUP(sizeof(*rxtx_desc), 8); + rxtx_desc->tx_region_offs = rxtx_desc->rx_region_offs + offsetof(struct ffa_mem_region, address_range_array[1]); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1227999.1534411 (Exim 4.92) (envelope-from ) id 1vqDov-00065O-6i; Wed, 11 Feb 2026 17:16:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1227999.1534411; Wed, 11 Feb 2026 17:16:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDou-00063n-Us; Wed, 11 Feb 2026 17:16:08 +0000 Received: by outflank-mailman (input) for mailman id 1227999; Wed, 11 Feb 2026 17:16:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDot-0004tt-Jc for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:07 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 59f2c27a-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:06 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 030DF339; Wed, 11 Feb 2026 09:16:00 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2857D3F63F; Wed, 11 Feb 2026 09:16:05 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 59f2c27a-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 07/12] xen/arm: ffa: Fix RXTX_UNMAP ownership race Date: Wed, 11 Feb 2026 18:15:31 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit rxtx_unmap() checks RX ownership without holding the RX/TX locks and only enforces the ownership rule when FFA_RX_ACQUIRE is supported. This allows a vCPU to acquire RX between the check and unmap, and it lets RXTX_UNMAP proceed while RX is owned when buffers are not forwarded to firmware. Hold rx_lock/tx_lock across the ownership check and unmap, and deny RXTX_UNMAP whenever RX is owned, independent of RX_ACQUIRE support. For teardown, release RX ownership under the same lock window; use FFA_RX_RELEASE directly because rx_lock is held, and clear the local flag when the firmware path is unavailable. Functional impact: RXTX_UNMAP now reliably returns DENIED while RX is owned, and teardown releases/clears ownership without a race. Signed-off-by: Bertrand Marquis --- Changes since v1: - Remove marking rx buffer as free during teardown as it is useless - Add a comment when calling rxtx_unmap during teardown to remind code readers that true is for teardown mode --- xen/arch/arm/tee/ffa_rxtx.c | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index eff95a7955d7..c4fc4c4934af 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -220,7 +220,7 @@ err_unlock_rxtx: return ret; } -static int32_t rxtx_unmap(struct domain *d) +static int32_t rxtx_unmap(struct domain *d, bool teardown) { struct ffa_ctx *ctx = d->arch.tee; int32_t ret = FFA_RET_OK; @@ -234,6 +234,32 @@ static int32_t rxtx_unmap(struct domain *d) goto err_unlock_rxtx; } + if ( !ctx->rx_is_free ) + { + if ( teardown ) + { + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) + { + int32_t rel_ret; + + /* Can't use ffa_rx_release() while holding rx_lock. */ + rel_ret = ffa_simple_call(FFA_RX_RELEASE, ctx->ffa_id, + 0, 0, 0); + if ( rel_ret ) + gdprintk(XENLOG_DEBUG, + "ffa: RX release during teardown failed: %d\n", + rel_ret); + } + } + else + { + gdprintk(XENLOG_DEBUG, + "ffa: RXTX_UNMAP denied, RX buffer owned by VM\n"); + ret = FFA_RET_DENIED; + goto err_unlock_rxtx; + } + } + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) { ret = ffa_rxtx_unmap(ffa_get_vm_id(d)); @@ -261,7 +287,7 @@ err_unlock_rxtx: int32_t ffa_handle_rxtx_unmap(void) { - return rxtx_unmap(current->domain); + return rxtx_unmap(current->domain, false); } int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) @@ -369,7 +395,7 @@ int32_t ffa_rxtx_domain_init(struct domain *d) void ffa_rxtx_domain_destroy(struct domain *d) { - rxtx_unmap(d); + rxtx_unmap(d, true /* teardown */); } void *ffa_rxtx_spmc_rx_acquire(void) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228001.1534424 (Exim 4.92) (envelope-from ) id 1vqDow-0006TW-Jn; Wed, 11 Feb 2026 17:16:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228001.1534424; Wed, 11 Feb 2026 17:16:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDow-0006T2-Fd; Wed, 11 Feb 2026 17:16:10 +0000 Received: by outflank-mailman (input) for mailman id 1228001; Wed, 11 Feb 2026 17:16:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDov-0004tt-KN for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:09 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 5aecf9a9-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:08 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88A52143D; Wed, 11 Feb 2026 09:16:01 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A31B43F63F; Wed, 11 Feb 2026 09:16:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5aecf9a9-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 08/12] xen/arm: ffa: Fix FFA_FEATURES validation Date: Wed, 11 Feb 2026 18:15:32 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FFA_FEATURES advertises several ABIs unconditionally, even when firmware support is missing or when the ABI is physical-instance-only. This can mislead guests about what Xen can actually provide and violates FF-A calling conventions. Some SPMCs (Hafnium v2.14 or earlier) also fail to report FFA_RX_ACQUIRE despite supporting it. Update FFA_FEATURES validation to match spec and firmware support: - do no check w2-w7 input registers during FFA_FEATURES as they are flagged Should Be Zero by the FF-A specification or are not used by the calls we support. - reject 64-bit calling conventions from 32-bit guests with NOT_SUPPORTED - return NOT_SUPPORTED for physical-instance-only ABIs (FFA_NOTIFICATION_BITMAP_{CREATE,DESTROY}, FFA_RX_ACQUIRE) - advertise FFA_INTERRUPT as supported - gate message ABIs on firmware support: - FFA_MSG_SEND_DIRECT_REQ_{32,64} - FFA_MSG_SEND_DIRECT_REQ2 (also requires FF-A 1.2 negotiation) - FFA_MSG_SEND2 (or VM-to-VM enabled) - report MEM_SHARE_{32,64} only when FFA_MEM_SHARE_64 is supported - stop advertising FFA_MSG_YIELD (not implemented) Update firmware probing: drop FFA_MEM_SHARE_32 checks (deprecated) and add FFA_RX_ACQUIRE to the probed set. If FFA_MSG_SEND2 is reported but FFA_RX_ACQUIRE is not, assume RX_ACQUIRE support and warn to work around the Hafnium bug. Functional impact: guests now see ABI support that reflects firmware capabilities and Xen implementation status. When SEND2 is present but RX_ACQUIRE is not reported, Xen assumes RX_ACQUIRE support. Signed-off-by: Bertrand Marquis --- Changes since v1: - remove completely w2-w7 checking as those are SBZ in the spec or unused by xen --- xen/arch/arm/tee/ffa.c | 63 +++++++++++++++++++++++++++++++++--------- 1 file changed, 50 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 23e1f408485b..cb8cd95fdafa 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -91,10 +91,10 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = { FW_ABI(FFA_PARTITION_INFO_GET), FW_ABI(FFA_NOTIFICATION_INFO_GET_64), FW_ABI(FFA_NOTIFICATION_GET), + FW_ABI(FFA_RX_ACQUIRE), FW_ABI(FFA_RX_RELEASE), FW_ABI(FFA_RXTX_MAP_64), FW_ABI(FFA_RXTX_UNMAP), - FW_ABI(FFA_MEM_SHARE_32), FW_ABI(FFA_MEM_SHARE_64), FW_ABI(FFA_MEM_RECLAIM), FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32), @@ -238,21 +238,30 @@ static void handle_features(struct cpu_user_regs *regs) uint32_t a1 = get_user_reg(regs, 1); struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; - unsigned int n; - for ( n = 2; n <= 7; n++ ) + /* + * FFA_FEATURES defines w2 as input properties only for specific + * function IDs and reserves w3-w7 as SBZ. Xen does not currently + * implement any feature that consumes w2, so ignore extra inputs. + */ + if ( !is_64bit_domain(d) && smccc_is_conv_64(a1) ) { - if ( get_user_reg(regs, n) ) - { - ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); - return; - } + /* 32bit guests should only use 32bit convention calls */ + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + return; } switch ( a1 ) { + case FFA_NOTIFICATION_BITMAP_CREATE: + case FFA_NOTIFICATION_BITMAP_DESTROY: + case FFA_RX_ACQUIRE: + /* Physical-instance-only ABIs are not exposed to VMs. */ + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; case FFA_ERROR: case FFA_VERSION: + case FFA_INTERRUPT: case FFA_SUCCESS_32: case FFA_SUCCESS_64: case FFA_FEATURES: @@ -261,16 +270,25 @@ static void handle_features(struct cpu_user_regs *regs) case FFA_RXTX_UNMAP: case FFA_MEM_RECLAIM: case FFA_PARTITION_INFO_GET: + ffa_set_regs_success(regs, 0, 0); + break; case FFA_MSG_SEND_DIRECT_REQ_32: case FFA_MSG_SEND_DIRECT_REQ_64: - case FFA_MSG_SEND2: case FFA_RUN: - case FFA_INTERRUPT: - case FFA_MSG_YIELD: - ffa_set_regs_success(regs, 0, 0); + if ( ffa_fw_supports_fid(a1) ) + ffa_set_regs_success(regs, 0, 0); + else + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; + case FFA_MSG_SEND2: + if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + ffa_set_regs_success(regs, 0, 0); + else + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); break; case FFA_MSG_SEND_DIRECT_REQ2: - if ( ACCESS_ONCE(ctx->guest_vers) >= FFA_VERSION_1_2 ) + if ( ACCESS_ONCE(ctx->guest_vers) >= FFA_VERSION_1_2 && + ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ2) ) { ffa_set_regs_success(regs, 0, 0); } @@ -281,6 +299,11 @@ static void handle_features(struct cpu_user_regs *regs) break; case FFA_MEM_SHARE_64: case FFA_MEM_SHARE_32: + if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) + { + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; + } /* * We currently don't support dynamically allocated buffers. Report * that with 0 in bit[0] of w2. @@ -688,6 +711,20 @@ static bool ffa_probe_fw(void) ffa_fw_abi_needed[i].name); } + /* + * Hafnium v2.14 or earlier does not report FFA_RX_ACQUIRE in + * FFA_FEATURES even though it supports it. + */ + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) && + ffa_fw_supports_fid(FFA_MSG_SEND2) ) + { + printk(XENLOG_WARNING + "ARM FF-A Firmware reports FFA_MSG_SEND2 without FFA_RX_ACQUIRE\n"); + printk(XENLOG_WARNING + "ffa: assuming RX_ACQUIRE support (workaround)\n"); + set_bit(FFA_ABI_BITNUM(FFA_RX_ACQUIRE), ffa_fw_abi_supported); + } + if ( !ffa_rxtx_spmc_init() ) { printk(XENLOG_ERR "ffa: Error during RXTX buffer init\n"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228002.1534435 (Exim 4.92) (envelope-from ) id 1vqDoy-0006pk-1C; Wed, 11 Feb 2026 17:16:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228002.1534435; Wed, 11 Feb 2026 17:16:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDox-0006of-Sb; Wed, 11 Feb 2026 17:16:11 +0000 Received: by outflank-mailman (input) for mailman id 1228002; Wed, 11 Feb 2026 17:16:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDow-0004tt-K6 for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:10 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 5bcb4448-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:10 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 17284339; Wed, 11 Feb 2026 09:16:03 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 455793F63F; Wed, 11 Feb 2026 09:16:08 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5bcb4448-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 09/12] xen/arm: ffa: Fix SEND2 SP support gating Date: Wed, 11 Feb 2026 18:15:33 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Xen only maps a VM RX/TX buffer into the SPMC when firmware supports FFA_RX_ACQUIRE. Without that mapping, the SPMC cannot access the VM TX buffer to relay FFA_MSG_SEND2 to a secure partition. Advertise FFA_MSG_SEND2 to guests only when VM-to-VM is enabled or when the firmware supports both FFA_MSG_SEND2 and FFA_RX_ACQUIRE, and reject SEND2 to a secure partition otherwise. Add comments to document the mapping/ownership dependency. Functional impact: SEND2 to a secure partition is reported as NOT_SUPPORTED when FFA_RX_ACQUIRE is absent. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - Add Jens R-b --- xen/arch/arm/tee/ffa.c | 8 +++++++- xen/arch/arm/tee/ffa_msg.c | 11 +++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index cb8cd95fdafa..ab02eafdb376 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -281,7 +281,13 @@ static void handle_features(struct cpu_user_regs *regs) ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); break; case FFA_MSG_SEND2: - if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + /* + * Forwarding SEND2 to an SP requires the SPMC to see the VM TX buffer. + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is supported. + */ + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) || + (ffa_fw_supports_fid(FFA_MSG_SEND2) && + ffa_fw_supports_fid(FFA_RX_ACQUIRE)) ) ffa_set_regs_success(regs, 0, 0); else ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 10856fddcbc4..928f269f6c3a 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -274,6 +274,17 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = FFA_RET_NOT_SUPPORTED; goto out; } + /* + * The SPMC needs access to the VM TX buffer to relay SEND2. + * We only map VM RX/TX into the SPMC when RX_ACQUIRE is supported. + */ + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) + { + ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 to SP requires RX_ACQUIRE\n"); + goto out; + } ret = ffa_simple_call(FFA_MSG_SEND2, ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0, 0, 0); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:16:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:16:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228006.1534446 (Exim 4.92) (envelope-from ) id 1vqDp0-0007JR-MD; Wed, 11 Feb 2026 17:16:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228006.1534446; Wed, 11 Feb 2026 17:16:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDp0-0007J7-I1; Wed, 11 Feb 2026 17:16:14 +0000 Received: by outflank-mailman (input) for mailman id 1228006; Wed, 11 Feb 2026 17:16:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDoz-0004U4-Au for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:13 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 5c99d597-076d-11f1-9ccf-f158ae23cfc8; Wed, 11 Feb 2026 18:16:11 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 65924497; Wed, 11 Feb 2026 09:16:04 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B11743F63F; Wed, 11 Feb 2026 09:16:09 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5c99d597-076d-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 10/12] xen/arm: ffa: Reduce logging noise Date: Wed, 11 Feb 2026 18:15:34 +0100 Message-ID: <95e4051cbf4f3e1ba1a23273521407da5733a174.1770826406.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Several FF-A paths log warnings for expected or recoverable conditions, leading to noisy logs during normal operation. Reduce log noise by: - demoting unhandled FID warnings to debug - ratelimiting notification and VM teardown failures - printing the bit-15 convention warning once per boot - adjusting log prefixes for hypervisor-only events - adding debug diagnostics for RX/TX acquire failures, with busy cases ratelimited No functional changes. Reviewed-by: Jens Wiklander Signed-off-by: Bertrand Marquis --- Changes since v1: - Add Jens R-b --- xen/arch/arm/tee/ffa.c | 11 ++++++----- xen/arch/arm/tee/ffa_notif.c | 11 ++++++----- xen/arch/arm/tee/ffa_partinfo.c | 15 ++++++++------- xen/arch/arm/tee/ffa_rxtx.c | 21 +++++++++++++++++++-- 4 files changed, 39 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index ab02eafdb376..aa43ae2595d7 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -450,7 +450,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) break; default: - gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); + gdprintk(XENLOG_DEBUG, "ffa: unhandled fid 0x%x\n", fid); e = FFA_RET_NOT_SUPPORTED; break; } @@ -570,7 +570,8 @@ static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time) if ( retry ) { - printk(XENLOG_G_INFO "%pd: ffa: Remaining cleanup, retrying\n", ctx->teardown_d); + printk(XENLOG_G_DEBUG "%pd: ffa: Remaining cleanup, retrying\n", + ctx->teardown_d); ctx->teardown_expire = NOW() + FFA_CTX_TEARDOWN_DELAY; @@ -611,7 +612,7 @@ static void ffa_teardown_timer_callback(void *arg) if ( ctx ) ffa_domain_teardown_continue(ctx, false /* !first_time */); else - printk(XENLOG_G_ERR "%s: teardown list is empty\n", __func__); + printk(XENLOG_ERR "%s: teardown list is empty\n", __func__); } /* This function is supposed to undo what ffa_domain_init() has done */ @@ -673,7 +674,7 @@ static bool ffa_probe_fw(void) if ( !ffa_get_version(&vers) ) { - gprintk(XENLOG_ERR, "Cannot retrieve the FFA version\n"); + printk(XENLOG_ERR "ffa: Cannot retrieve the FFA version\n"); goto err_no_fw; } @@ -713,7 +714,7 @@ static bool ffa_probe_fw(void) set_bit(FFA_ABI_BITNUM(ffa_fw_abi_needed[i].id), ffa_fw_abi_supported); else - printk(XENLOG_INFO "ARM FF-A Firmware does not support %s\n", + printk(XENLOG_WARNING "ARM FF-A Firmware does not support %s\n", ffa_fw_abi_needed[i].name); } diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c index 37b05747cd21..186e72641237 100644 --- a/xen/arch/arm/tee/ffa_notif.c +++ b/xen/arch/arm/tee/ffa_notif.c @@ -292,8 +292,9 @@ static void notif_vm_pend_intr(uint16_t vm_id) break; } } - if ( !v ) - printk(XENLOG_ERR "ffa: can't inject NPI, all vCPUs offline\n"); + if ( !v && printk_ratelimit() ) + printk(XENLOG_G_DEBUG "%pd: ffa: can't inject NPI, all vCPUs offline\n", + d); out_unlock: rcu_unlock_domain(d); @@ -316,9 +317,9 @@ static void notif_sri_action(void *unused) res = ffa_get_ret_code(&resp); if ( res ) { - if ( res != FFA_RET_NO_DATA ) - printk(XENLOG_ERR "ffa: notification info get failed: error %d\n", - res); + if ( res != FFA_RET_NO_DATA && printk_ratelimit() ) + printk(XENLOG_WARNING + "ffa: notification info get failed: error %d\n", res); return; } diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index 015097bd4d2a..fdb03dae9a0c 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -461,9 +461,11 @@ static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_size) */ if ( !FFA_ID_IS_SECURE(fpi->id) ) { - printk(XENLOG_ERR "ffa: Firmware is not using bit 15 convention for IDs !!\n" - "ffa: Secure partition with id 0x%04x cannot be used\n", - fpi->id); + printk_once(XENLOG_ERR + "ffa: Firmware is not using bit 15 convention for IDs !!\n"); + printk(XENLOG_ERR + "ffa: Secure partition with id 0x%04x cannot be used\n", + fpi->id); } else { @@ -632,11 +634,10 @@ bool ffa_partinfo_domain_destroy(struct domain *d) res = ffa_direct_req_send_vm(subscr_vm_destroyed[n], ffa_get_vm_id(d), FFA_MSG_SEND_VM_DESTROYED); - if ( res ) - { - printk(XENLOG_ERR "%pd: ffa: Failed to report destruction of vm_id %u to %u: res %d\n", + if ( res && printk_ratelimit() ) + printk(XENLOG_WARNING + "%pd: ffa: Failed to report destruction of vm_id %u to %u: res %d\n", d, ffa_get_vm_id(d), subscr_vm_destroyed[n], res); - } /* * For these two error codes the hypervisor is expected to resend diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c index c4fc4c4934af..26a04f056f7b 100644 --- a/xen/arch/arm/tee/ffa_rxtx.c +++ b/xen/arch/arm/tee/ffa_rxtx.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -82,8 +83,9 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr, if ( page_count > FFA_MAX_RXTX_PAGE_COUNT || !page_count ) { - printk(XENLOG_ERR "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n", - page_count, FFA_MAX_RXTX_PAGE_COUNT); + gdprintk(XENLOG_DEBUG, + "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n", + page_count, FFA_MAX_RXTX_PAGE_COUNT); return FFA_RET_INVALID_PARAMETERS; } @@ -299,12 +301,15 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) if ( !ctx->page_count ) { ret = FFA_RET_DENIED; + gdprintk(XENLOG_DEBUG, "ffa: RX acquire denied, no RX/TX mapped\n"); goto out; } if ( !ctx->rx_is_free ) { ret = FFA_RET_BUSY; + if ( printk_ratelimit() ) + gdprintk(XENLOG_DEBUG, "ffa: RX acquire busy\n"); goto out; } @@ -312,7 +317,10 @@ int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size) { ret = ffa_simple_call(FFA_RX_ACQUIRE, ctx->ffa_id, 0, 0, 0); if ( ret != FFA_RET_OK ) + { + gdprintk(XENLOG_DEBUG, "ffa: RX acquire failed: %d\n", ret); goto out; + } } ctx->rx_is_free = false; *buf = ctx->rx; @@ -351,13 +359,22 @@ int32_t ffa_tx_acquire(struct ffa_ctx *ctx, const void **buf, size_t *buf_size) int32_t ret = FFA_RET_DENIED; if ( !spin_trylock(&ctx->tx_lock) ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire busy\n"); return FFA_RET_BUSY; + } if ( !ctx->page_count ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, no RX/TX mapped\n"); goto err_unlock; + } if ( !ctx->tx ) + { + gdprintk(XENLOG_DEBUG, "ffa: TX acquire denied, TX buffer missing\n"); goto err_unlock; + } *buf = ctx->tx; *buf_size = ctx->page_count * FFA_PAGE_SIZE; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:17:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:17:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228066.1534456 (Exim 4.92) (envelope-from ) id 1vqDqD-0001hZ-0C; Wed, 11 Feb 2026 17:17:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228066.1534456; Wed, 11 Feb 2026 17:17:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDqC-0001hS-SP; Wed, 11 Feb 2026 17:17:28 +0000 Received: by outflank-mailman (input) for mailman id 1228066; Wed, 11 Feb 2026 17:17:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqDp1-0004tt-Lr for xen-devel@lists.xenproject.org; Wed, 11 Feb 2026 17:16:15 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 5d6d71a8-076d-11f1-b162-2bf370ae4941; Wed, 11 Feb 2026 18:16:12 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BA4F0339; Wed, 11 Feb 2026 09:16:05 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.53.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 12D563F63F; Wed, 11 Feb 2026 09:16:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5d6d71a8-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 11/12] xen/arm: ffa: Add MEM_SHARE page diagnostics Date: Wed, 11 Feb 2026 18:15:35 +0100 Message-ID: <4fa6736cbe35b060cf34b2978bbf9b3481d9266a.1770826406.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MEM_SHARE failures in get_shm_pages() are silent, which makes malformed ranges and page mapping failures hard to diagnose. Add debug logging for page validation failures: - descriptor validation failures (unaligned, range short/overflow) - per-page mapping failures (unmapped GFN, wrong p2m type) - address overflow detection in range walks Ratelimit temporary reclaim failures and log permanent reclaim failures as errors. No functional changes. Signed-off-by: Bertrand Marquis --- Changes since v1: - use one print per error case instead of the previous system using variables to classify and a single print site. --- xen/arch/arm/tee/ffa_shm.c | 39 +++++++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c index 070babce9627..3d61caaeba78 100644 --- a/xen/arch/arm/tee/ffa_shm.c +++ b/xen/arch/arm/tee/ffa_shm.c @@ -161,32 +161,62 @@ static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, addr = ACCESS_ONCE(range[n].address); if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: unaligned range %u address %#lx\n", + n, (unsigned long)addr); return FFA_RET_INVALID_PARAMETERS; + } for ( m = 0; m < page_count; m++ ) { if ( pg_idx >= shm->page_count ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: range overflow rg %u pg %u\n", + n, m); return FFA_RET_INVALID_PARAMETERS; + } if ( !ffa_safe_addr_add(addr, m) ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: addr overflow rg %u pg %u base %#lx\n", + n, m, (unsigned long)addr); return FFA_RET_INVALID_PARAMETERS; + } gaddr = addr + m * FFA_PAGE_SIZE; gfn = gaddr_to_gfn(gaddr); shm->pages[pg_idx] = get_page_from_gfn(d, gfn_x(gfn), &t, P2M_ALLOC); if ( !shm->pages[pg_idx] ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: gfn unmapped rg %u pg %u addr %#lx\n", + n, m, (unsigned long)gaddr); return FFA_RET_DENIED; + } /* Only normal RW RAM for now */ if ( t != p2m_ram_rw ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: p2m type %u rg %u pg %u addr %#lx\n", + t, n, m, (unsigned long)gaddr); return FFA_RET_DENIED; + } pg_idx++; } } /* The ranges must add up */ if ( pg_idx < shm->page_count ) + { + gdprintk(XENLOG_DEBUG, + "ffa: mem share pages invalid: range short pg %u\n", + pg_idx); return FFA_RET_INVALID_PARAMETERS; + } return FFA_RET_OK; } @@ -741,8 +771,10 @@ bool ffa_shm_domain_destroy(struct domain *d) * A temporary error that may get resolved a bit later, it's * worth retrying. */ - printk(XENLOG_G_INFO "%pd: ffa: Failed to reclaim handle %#lx : %d\n", - d, shm->handle, res); + if ( printk_ratelimit() ) + printk(XENLOG_G_WARNING + "%pd: ffa: Failed to reclaim handle %#lx : %d\n", + d, shm->handle, res); break; /* We will retry later */ default: /* @@ -754,7 +786,8 @@ bool ffa_shm_domain_destroy(struct domain *d) * FFA_RET_NO_MEMORY might be a temporary error as it it could * succeed if retried later, but treat it as permanent for now. */ - printk(XENLOG_G_INFO "%pd: ffa: Permanent failure to reclaim handle %#lx : %d\n", + printk(XENLOG_G_ERR + "%pd: ffa: Permanent failure to reclaim handle %#lx : %d\n", d, shm->handle, res); /* -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:17:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:17:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228068.1534463 (Exim 4.92) (envelope-from ) id 1vqDqD-0001km-A4; Wed, 11 Feb 2026 17:17:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228068.1534463; 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Wed, 11 Feb 2026 09:16:12 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5e4c111b-076d-11f1-b162-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH v2 12/12] xen/arm: ffa: Add message parameter diagnostics Date: Wed, 11 Feb 2026 18:15:36 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MSG_SEND2 and direct request validation failures are silent, making it hard to diagnose invalid IDs, oversized messages, or unsupported destination types. Add debug logs for parameter validation failures: - invalid endpoint IDs - oversized messages - unsupported destination types - invalid sender/receiver combinations - ratelimit MSG_SEND2 busy failures to avoid log flooding No functional changes. Signed-off-by: Bertrand Marquis --- Changes since v1: - add a comment to explain ratelimit for BUSY in send2 --- xen/arch/arm/tee/ffa_msg.c | 49 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c index 928f269f6c3a..1eadc62870f2 100644 --- a/xen/arch/arm/tee/ffa_msg.c +++ b/xen/arch/arm/tee/ffa_msg.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -100,6 +101,7 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) if ( !ffa_fw_supports_fid(fid) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, "ffa: direct req fid %#x not supported\n", fid); goto out; } @@ -108,6 +110,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) (src_dst & GENMASK(15,0)) == ffa_get_vm_id(d) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: direct req invalid src/dst %#x\n", + (uint32_t)src_dst); goto out; } @@ -115,6 +120,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: direct req to non-secure dst %#x\n", + (uint32_t)(src_dst & GENMASK(15, 0))); goto out; } @@ -166,7 +174,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, /* This is also checking that dest is not src */ ret = ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); if ( ret ) + { + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 lookup failed: dst %#x ret %d\n", + dst_id, ret); return ret; + } /* This also checks that destination has set a Rx buffer */ ret = ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); @@ -199,6 +212,16 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf, /* receiver rx buffer will be released by the receiver*/ out_unlock: + if ( ret ) + { + /** + * Always print other errors than BUSY but ratelimit BUSY prints + * to prevent large number of prints when sender retries on BUSY. + */ + if ( ret != FFA_RET_BUSY || printk_ratelimit() ) + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to %#x failed: %d\n", + dst_id, ret); + } rcu_unlock_domain(dst_d); if ( !ret ) ffa_raise_rx_buffer_full(dst_d); @@ -226,7 +249,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_tx_acquire(src_ctx, &tx_buf, &tx_size); if ( ret != FFA_RET_OK ) + { + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 TX acquire failed: %d\n", ret); return ret; + } /* create a copy of the message header */ memcpy(&src_msg, tx_buf, sizeof(src_msg)); @@ -238,6 +265,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) dst_id == ffa_get_vm_id(src_d) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid src/dst src %#x dst %#x\n", + src_id, dst_id); goto out; } @@ -246,6 +276,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) if (src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1)) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_offset %u (v1.1)\n", + src_msg.msg_offset); goto out; } /* Set uuid to Nil UUID for v1.1 guests */ @@ -255,6 +288,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) else if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_2) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_offset %u (v1.2)\n", + src_msg.msg_offset); goto out; } @@ -263,6 +299,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) src_msg.msg_size > (tx_size - src_msg.msg_offset) ) { ret = FFA_RET_INVALID_PARAMETERS; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 invalid msg_size %u offset %u tx %zu\n", + src_msg.msg_size, src_msg.msg_offset, tx_size); goto out; } @@ -272,6 +311,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) ) { ret = FFA_RET_NOT_SUPPORTED; + gdprintk(XENLOG_DEBUG, + "ffa: msg_send2 to SP not supported\n"); goto out; } /* @@ -288,6 +329,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_simple_call(FFA_MSG_SEND2, ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0, 0, 0); + if ( ret ) + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to SP failed: %d\n", ret); } else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) { @@ -295,7 +338,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs) ret = ffa_msg_send2_vm(dst_id, tx_buf, &src_msg); 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Make CONFIG_VM_EVENT select > CONFIG_WAIT, and use CONFIG_WAIT to control building it. > > Provide stubs of functions called from common code. entry.S needs an > ifdef to hide the symbol from the assembly. > > Also conditionalize .waitqueue_vcpu in struct vcpu to save space. > > Signed-off-by: Jason Andryuk I'd really rather see the API/ABI changes required to purge wait.c entirely, but I guess this will do in the short term. Two things want further thought. First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't need this infrastructure in the first place, but it looks like it's still compiled in and half wired up.  I suppose you don't notice because you compile out VM_EVENT on ARM too? Second CONFIG_WAIT isn't great name because there are many things it could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will disappear at some point. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:35:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:35:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228125.1534486 (Exim 4.92) (envelope-from ) id 1vqE7m-00061v-2A; Wed, 11 Feb 2026 17:35:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228125.1534486; Wed, 11 Feb 2026 17:35:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqE7l-00061o-VJ; Wed, 11 Feb 2026 17:35:37 +0000 Received: by outflank-mailman (input) for mailman id 1228125; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 60+g9tzT2chkD9t3UUPuxZLaqelDCqgbo7Qj1HaY+OEggt6LoUqZ6+bCTxPAftAGnEimU2IQRLlMObCSGhg8zb/YJp+wuG2a7bIwwAseexiC6w/6jZuxYtu5s7zST5raeFihFcWP/CnknHhcKNxpqkziPpY0tVLMAZxdC+4dChQU/ySFaPpsdRq17e+WGn6a6XUh8c4FIrcLvP+vLXi+Tfxafi5fQy0ppr1ZWPQOtHYJ09jk3NRafWDH6lLTdRCLri2omEgAOfT4fvf5MQaWgBCys87f+D32dsLto+PYkbSNXoy+y9Bs+wjgWGNLrpG2Zy1HZ7rq0hJUksl4BoAUpcE88D6sJ0eFHFtq3buatd7OVINYtXRGZT/uGw5IZtrCAGEUhiX9O6sUgXzNvNf4NNJOZaE5aEssrVt1MtdPB7Su6LE9UziGhjBIRejLwldP X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 17:35:26.0367 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 14c946f9-3354-4ad6-f827-08de6993f132 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4098 On Wed Feb 11, 2026 at 5:04 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/cpu/common.c >> +++ b/xen/arch/x86/cpu/common.c >> @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) >> *(u32 *)&c->x86_vendor_id[4] =3D edx; >> =20 >> c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx); >> - switch (c->x86_vendor) { >> + if ( c->x86_vendor !=3D cpu_vendor() ) > > When we introduce new functions to Linux-style files, nowadays we take > the liberty and make them Xen-style right away. In entirely Linux- > style functions the style should remain consistently Linux'es, though. > Seeing how I added the tabs I did intend to do that. Muscle memory and all. Will correct on the next one. >> + panic("CPU vendor not compiled-in: %s", >> + x86_cpuid_vendor_to_str(c->x86_vendor)); > > This will be somewhat awkward when c->x86_vendor is UNKNOWN. Which only happens on virtualised or imaginary CPUs. In either case you kno= w what you're running on and the information is not particularly useful. The important part is the "this hypervisor cannot run on your vendor. Enable it there". > > There'll also be a degenerate case, but I'll comment on that on the > earlier patch causing that. > >> --- a/xen/arch/x86/include/asm/cpufeature.h >> +++ b/xen/arch/x86/include/asm/cpufeature.h >> @@ -14,6 +14,7 @@ >> #include >> #include >> #include >> +#include > > Nit: Can the asm/-s please all stay together? Sure, I didn't notice the xen/ because of the lack of a blank line. > > Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:42:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:42:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228139.1534497 (Exim 4.92) (envelope-from ) id 1vqEE8-0007pT-NQ; Wed, 11 Feb 2026 17:42:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228139.1534497; Wed, 11 Feb 2026 17:42:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqEE8-0007pM-Ja; Wed, 11 Feb 2026 17:42:12 +0000 Received: by outflank-mailman (input) for mailman id 1228139; Wed, 11 Feb 2026 17:42:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqEE7-0007pG-Rs for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: TxWvzka+AcHt8++BqvqPSwT4TQF7DdltrcrMK8Phpj+ie0sKy+aaY/3JP+B6rIooG76sufSkhlmwWjYVBnUiUt1vGrpyNZwwknihNvPZ27RgQ+4B7bMNik4Y3pUmnmfKQ6Hgi3TH5l2WBwcAtsyJXjIqn1bleW1dSEmQgglbkQxQT7I76wKdzVcdrgljM9CDmxPwa19W2yxRQpoJXIr47giNoh4GfpFJz6627JoOZTN7Fwk142KNQUIbEFLQ8UPxYorUfUhNr57FA7GITaYx0fth+7lEQ+PNFEh8XgyJLqxnThUqTlfEEqoq9bDYpae4YhVgkpFdbO9Lk2JGTD2IDkHJV8cQqYvBcmXbYuUkaTYnMDSlhWdwLQXn3ZyMSYQ875C8BaM7qDxFX2m+2MpTI4ALK8h4x8k3q1wuJ6dCskLEo0HQ/khygQLSKWKhHKyH X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 17:42:02.8101 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b98156e-98f6-4159-26d6-08de6994ddb5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6109 On Wed Feb 11, 2026 at 4:41 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> --- a/xen/lib/x86/policy.c >> +++ b/xen/lib/x86/policy.c >> @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_p= olicy *host, >> #define FAIL_MSR(m) \ >> do { e.msr =3D (m); goto out; } while ( 0 ) >> =20 >> - if ( guest->basic.max_leaf > host->basic.max_leaf ) >> + if ( (guest->x86_vendor !=3D host->x86_vendor) || > > With the subsequent "unknown" discussion also in mind, I wonder: Should w= e > fail the request here when either side is "unknown"? That'd preclude the creation of VMs on new vendors. At that point, might as well drop support for unknown vendors altogether. I wouldn't mind that. I was thinking of comparing the x86_vendor_id bytes instead, as I answered to Roger. Then the invariant that only $VENDOR VMs run on $VENDOR hosts is preserved even if we don't know about them. Cheers, Alejandro. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pFbh4tTB/lxnIaYPHpbCoKby2i+3Z+JaIKDoXD13AegDGX6KCXQzNvfFiFB3E75A3k2oYHEOnx+o8doHwYj/6U2zKFTCrFZ5vhjh3QsySlzVhvm/NeOKMO7+3+k8NC1ZbpSUbPBScX6Q3gGrgUkSv82Mb0bYYWrm4gEUCh63pDbGX1ac6cBRiogMtpg+Pd6yf+WjtBtByKViCuGTEiXqRXvLa2IBVjQ0hbnzYfrMCIkfnD5yDa1f1CT7q+08kf06XtDHK0LyO+PWRXiW/oBE33Dd8fQqPTevJfntj6ewRGxjHzC/DXvX7RayIheRCyCRYixYcl3bRaqbpBY/esjj28OfOJ4dZj4JRATcEU19u/wd2VIXxaP481hsaLIinhjPeFa0ekDieA/y0yRkR56h+K9QnD1lKaurJa85jEWIxEwyBD/LMaVVjk2e4StLIxSU X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 17:51:45.7832 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 08f868fc-744a-43ad-1dac-08de6996392a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8344 On Wed Feb 11, 2026 at 5:06 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/Kconfig.cpu >> +++ b/xen/arch/x86/Kconfig.cpu >> @@ -19,4 +19,47 @@ config INTEL >> May be turned off in builds targetting other vendors. Otherwise, >> must be enabled for Xen to work suitably on Intel platforms. >> =20 >> +config HYGON >> + bool "Support Hygon CPUs" >> + select AMD >> + default y >> + help >> + Detection, tunings and quirks for Hygon platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Hygon platforms. >> + >> + >> +config CENTAUR >> + bool "Support Centaur CPUs" >> + select INTEL >> + default y >> + help >> + Detection, tunings and quirks for Centaur platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Centaur platforms. >> + >> +config SHANGHAI >> + bool "Support Shanghai CPUs" >> + select INTEL >> + default y >> + help >> + Detection, tunings and quirks for Shanghai platforms. >> + >> + May be turned off in builds targetting other vendors. Otherwise, >> + must be enabled for Xen to work suitably on Shanghai platforms. >> + >> +config UNKNOWN_CPU_VENDOR >> + bool "Support unknown CPU vendors" >> + default y >> + help >> + This option prevents a panic on boot when the host CPU vendor isn't >> + supported by going into a legacy compatibility mode and not applying >> + any relevant tunings or quirks. >> + >> + Not selecting this options while selecting multiple vendors doesn't = have >> + any major effect on code size, but selecting a single vendor with th= is >> + option cleared produces a much smaller build. > > Shouldn't this option's prompt be suppressed when all other vendors were > selected off? Else the degenerate case can result that I mentioned in > reply to patch 03. > > Jan You mean having the option disappear when any explicit vendor is enabled? I guess we could. It wouldn't be very obvious to the user this can be toggl= ed, but now again, if they are unticking vendors they would end up noticing. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Wed Feb 11 17:58:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 17:58:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228181.1534515 (Exim 4.92) (envelope-from ) id 1vqETM-00029z-9G; Wed, 11 Feb 2026 17:57:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228181.1534515; Wed, 11 Feb 2026 17:57:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqETM-00029s-6P; Wed, 11 Feb 2026 17:57:56 +0000 Received: by outflank-mailman (input) for mailman id 1228181; Wed, 11 Feb 2026 17:57:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqETK-00026u-Kn for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: KLarjczLkguzCnaiDdfEDmKN8/QGHfvaetbVfNzTkA8iMrx8McgubH7T1z3H48TsikDPqPumdZWwaxUJ3zfsfvUcjtjWCq/T4ZWOCJaykWULECvd7Yx6DCzHbjRxHVKMGSeC/PkqvtpTZJIdso3T3N/uXqb7dqCV5Iwb5zDymrdSGFY7tht9woWf6cbofZZyQqqTGssYiMIzK+mk90H/Nzu6bVccqV0BaSry0Ph675cnFyzlnhWd31bK9rGv81wtp8FO4XXHOe19pp/N87DPqCz3fwySWmj6AwhPGjPRQuO8cJ5URr4BWzknCWGDkpbq2BmpYvF2kRzI70APjDnuarLvskT3JO0k7WSidMoKAoRT0Q9mCmlbdCZgOrDPYP8X8QKd4VwQkxVduz+KZsyoUEtAQO0lSPWqLSXU3nVGfjH3chDHdsuG5A6Fmd0wLyQl X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 17:57:43.1165 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 19519af5-ec61-46f8-25bf-08de69970e27 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5966 On Wed Feb 11, 2026 at 6:35 PM CET, Alejandro Vallejo wrote: > On Wed Feb 11, 2026 at 5:04 PM CET, Jan Beulich wrote: >> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/cpu/common.c >>> +++ b/xen/arch/x86/cpu/common.c >>> @@ -328,7 +328,11 @@ void __init early_cpu_init(bool verbose) >>> *(u32 *)&c->x86_vendor_id[4] =3D edx; >>> =20 >>> c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx); >>> - switch (c->x86_vendor) { >>> + if ( c->x86_vendor !=3D cpu_vendor() ) >> >> When we introduce new functions to Linux-style files, nowadays we take >> the liberty and make them Xen-style right away. In entirely Linux- >> style functions the style should remain consistently Linux'es, though. >> > > Seeing how I added the tabs I did intend to do that. > > Muscle memory and all. Will correct on the next one. > >>> + panic("CPU vendor not compiled-in: %s", >>> + x86_cpuid_vendor_to_str(c->x86_vendor)); >> >> This will be somewhat awkward when c->x86_vendor is UNKNOWN. > > Which only happens on virtualised or imaginary CPUs. In either case you k= now > what you're running on and the information is not particularly useful. Th= e > important part is the "this hypervisor cannot run on your vendor. Enable = it > there". Oh, wait. You meant when we run on an unknown CPU and the unknown path was disabled? Yes, that's missing in the condition. if ((c->x86_vendor !=3D cpu_vendor()) || (!IS_ENABLED(CONFIG_UNKNOWN_CPU_VENDORS) && !c->x86_vendor)) A hunk got missed in refactors in the default case so that default_cpu got dropped when the unknown vendor was missing. That was present originally in= the RFC. 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pr=C Message-ID: <8fb08e1f-a0d4-45b5-ac7f-3b14db81b8a3@amd.com> Date: Wed, 11 Feb 2026 12:57:53 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Put wait.c behind CONFIG_WAIT To: Andrew Cooper , CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , "Michal Orzel" , Julien Grall , "Stefano Stabellini" References: <20260211170118.109946-1-jason.andryuk@amd.com> <73bf621d-0795-4fbe-b926-71be3525b4c7@citrix.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <73bf621d-0795-4fbe-b926-71be3525b4c7@citrix.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE18:EE_|DS0PR12MB7745:EE_ X-MS-Office365-Filtering-Correlation-Id: ae6b61b5-6639-4b13-1d4a-08de69971798 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ZbKVMAqpkGWLsTKwt0MA3Q5BrwzlEYBcoBXCJ8r1KlfbSINRzIkABNoEa+QOhfoavV2a9mBT5hAP04zT8wGnzcdzR8fFN12b8xeTr05QhjN920PMCxPxGp/TMJ9aekDFTlid6/a7+86U2U5DCkmYsKUNj3NvEQ/xAV5LksZ7GzVtO9JyPp/fCaj9MxE/OGfDI0Vm0XTAnIHR8cMBMBhyLY1Kca5MkgF8PUprIBVPvplbUjt2apWE4U5t+bD437iqLhurxZv9TyVT8zIoJiY6tnG2wfwaod3wTOqs05QfJqMOBkiNrU3pxk3YLns7ik8JwqYdgUUM8mWWyGCKXy4zRRjvDPNhJgGVgueuFDieW1E+s/QjzGfMVdcpn0+A41t90oBSlhLPUibexOWwAEXQQoJcaRgkOy+YzooWBF493di32Cu1/Fn0AFy+F6ZfABlu X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2026 17:57:58.8673 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ae6b61b5-6639-4b13-1d4a-08de69971798 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE18.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7745 On 2026-02-11 12:30, Andrew Cooper wrote: > On 11/02/2026 5:01 pm, Jason Andryuk wrote: >> wait.c is only used by vm_event.c. Make CONFIG_VM_EVENT select >> CONFIG_WAIT, and use CONFIG_WAIT to control building it. >> >> Provide stubs of functions called from common code. entry.S needs an >> ifdef to hide the symbol from the assembly. >> >> Also conditionalize .waitqueue_vcpu in struct vcpu to save space. >> >> Signed-off-by: Jason Andryuk > > I'd really rather see the API/ABI changes required to purge wait.c > entirely, but I guess this will do in the short term. > > Two things want further thought. > > First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't > need this infrastructure in the first place, but it looks like it's > still compiled in and half wired up.  I suppose you don't notice because > you compile out VM_EVENT on ARM too? I was focused on x86, and didn't realize this was used by ARM. I think I noticed the lack of check_wakeup_from_wait() calls on ARM. What did I not notice? Are you saying wait.c should only be built for x86? > Second CONFIG_WAIT isn't great name because there are many things it > could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without > CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will > disappear at some point. Yes. I used CONFIG_WAIT since it matched wait.c. I considered CONFIG_WAITQUEUE, but went with the shorter option. Re-using CONFIG_VM_EVENT would be fine with me. I didn't use it in this submission since the waitqueue functionality is more generic. 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> > custom_runtime_param("console_timestamps", parse_console_timestamps, > > con_timestamp_mode_upd); > > > > -/* conring_size: allows a large console ring than default (16kB). */ > > -static uint32_t __initdata opt_conring_size; > > -size_param("conring_size", opt_conring_size); > > - > > -#define _CONRING_SIZE 16384 > > -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) > > -static char __initdata _conring[_CONRING_SIZE]; > > -static char *__read_mostly conring = _conring; > > -static uint32_t __read_mostly conring_size = _CONRING_SIZE; > > -static uint32_t conringc, conringp; > > - > > static int __read_mostly sercon_handle = -1; > > > > #ifdef CONFIG_X86 > > @@ -350,6 +339,17 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) > > * ******************************************************** > > */ > > > > +/* conring_size: allows a large console ring than default (16kB). */ > > As you move the comment, s/large/larger/. Will adjust while committing. Thanks! > > > +static uint32_t __initdata opt_conring_size; > > +size_param("conring_size", opt_conring_size); > > + > > +#define _CONRING_SIZE 16384 > > +#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) > > +static char __initdata _conring[_CONRING_SIZE]; > > +static char *__read_mostly conring = _conring; > > +static uint32_t __read_mostly conring_size = _CONRING_SIZE; > > +static uint32_t conringc, conringp; > > There are several other tidying things to be done here, but I'm not going > to request that you take care of those, too. > > Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 19:48:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 19:48:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228280.1534546 (Exim 4.92) (envelope-from ) id 1vqGBw-0008LJ-Cs; Wed, 11 Feb 2026 19:48:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228280.1534546; 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> > #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) > > #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) > > static char __initdata _conring[_CONRING_SIZE]; > > -static char *__read_mostly conring = _conring; > > -static uint32_t __read_mostly conring_size = _CONRING_SIZE; > > +static char *__ro_after_init conring = _conring; > > +static uint32_t __ro_after_init conring_size = _CONRING_SIZE; > > ... the type here also changed to unsigned int (as set forth by ./CODING_STYLE). > Happy to adjust while committing. Will appreciate help here. Thanks! > > Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 11 20:07:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 11 Feb 2026 20:07:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228305.1534556 (Exim 4.92) (envelope-from ) id 1vqGUG-0002tm-0p; Wed, 11 Feb 2026 20:07:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228305.1534556; Wed, 11 Feb 2026 20:06:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqGUF-0002tf-TE; Wed, 11 Feb 2026 20:06:59 +0000 Received: by outflank-mailman (input) for mailman id 1228305; Wed, 11 Feb 2026 20:06:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqGUD-0002tZ-L8 for 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b=ed+EZSWQahnI7WcE8I/z2qGBC28VlnV+K3mElOOIHkovYxpsrH8DZbHfj5emzCC+YbB/GGGThzMgZBJBR8qATJttQR5PsRMp3PE9rNcMhMOPaC0cofK7W4ghF8fQA65MGSYK7n4BFui4NvEzgxPECy2jv2l+MB1JJciO5AYn2CzQHjL5bl7pIWZsf+WtSgTnL+Wty37Ygd3LkprvYMX+2uBScXb2EvPmZ6EYTjyS8OpZ7l+brKPvyb7MHLolB7DBbXE44X6RsxjJD60VZRW3UV/RAUvegE0TVkdbbgpj3BAT+GMrBeTNyxEWE9x2/Pb33ej4YzJAFw/hfNH+cMwElA== From: Oleksii Moisieiev To: Stefano Stabellini CC: "xen-devel@lists.xenproject.org" , Andrew Cooper , Anthony PERARD , Bertrand Marquis , Jan Beulich , Juergen Gross , Julien Grall , Michal Orzel , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Volodymyr Babchuk , Grygorii Strashko Subject: Re: [PATCH v9 4/5] xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver Thread-Topic: [PATCH v9 4/5] xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver Thread-Index: AQHckSnscogayWOoV0WYwtG2zZFEPrVp19AAgBQptQA= Date: Wed, 11 Feb 2026 20:06:38 +0000 Message-ID: <05335f27-6a47-4113-abd4-5d152503993d@epam.com> References: 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<20260212032334.1696248-1-marmarek@invisiblethingslab.com> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Archlinux just updated gcc to 15.2.1+r604+g0b99615a8aef-1 and that complains about libxl: libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 447 | endptr = strchr(str, '='); | ^ libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 452 | endptr = strchr(str, ','); | ^ libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 454 | endptr = strchr(str, 0); | ^ libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 447 | endptr = strchr(str, '='); | ^ libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 452 | endptr = strchr(str, ','); | ^ libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 454 | endptr = strchr(str, 0); | ^ cc1: all warnings being treated as errors Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const endptr still is needed, to be compatible with the second argument to strtoul(). Add second variable for this reason. Signed-off-by: Marek Marczykowski-Górecki --- When I say "just updated" I really mean it. The update hit me between my CI saying "ok" and release build few hours later. I guess Xen's CI will see that only after next refresh of the Arch container (next week?). --- tools/libs/light/libxl_cpuid.c | 19 ++++++++++--------- tools/libs/light/libxl_internal.c | 2 +- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 8420b2465f39..5fb580113d80 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -415,6 +415,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; + const char *endptrc; unsigned long value; uint32_t leaf, subleaf = XEN_CPUID_INPUT_UNUSED; struct xc_xend_cpuid *entry; @@ -444,25 +445,25 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, return 4; } value = str[1] - 'a'; - endptr = strchr(str, '='); - if (value > 3 || endptr == NULL) { + endptrc = strchr(str, '='); + if (value > 3 || endptrc == NULL) { return 4; } - str = endptr + 1; - endptr = strchr(str, ','); - if (endptr == NULL) { - endptr = strchr(str, 0); + str = endptrc + 1; + endptrc = strchr(str, ','); + if (endptrc == NULL) { + endptrc = strchr(str, 0); } - if (endptr - str != 32) { + if (endptrc - str != 32) { return 5; } entry->policy[value] = calloc(32 + 1, 1); strncpy(entry->policy[value], str, 32); entry->policy[value][32] = 0; - if (*endptr == 0) { + if (*endptrc == 0) { break; } - for (str = endptr + 1; *str == ' ' || *str == '\n'; str++); + for (str = endptrc + 1; *str == ' ' || *str == '\n'; str++); } return 0; } diff --git a/tools/libs/light/libxl_internal.c b/tools/libs/light/libxl_internal.c index 2941ca0bbd0e..d70cfed7d88f 100644 --- a/tools/libs/light/libxl_internal.c +++ b/tools/libs/light/libxl_internal.c @@ -204,7 +204,7 @@ char *libxl__strndup(libxl__gc *gc, const char *c, size_t n) char *libxl__dirname(libxl__gc *gc, const char *s) { - char *c = strrchr(s, '/'); + const char *c = strrchr(s, '/'); if (!c) return NULL; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 07:00:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 07:00:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228399.1534576 (Exim 4.92) (envelope-from ) id 1vqQgZ-00040v-W5; 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Wed, 11 Feb 2026 23:00:19 -0800 (PST) MIME-Version: 1.0 References: <2687fa1a798f002b3126cdc851812be86c4cd8f1.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <2687fa1a798f002b3126cdc851812be86c4cd8f1.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Thu, 12 Feb 2026 09:00:00 +0200 X-Gm-Features: AZwV_QgeVlFkLrWgYdX-KzHFARPfMqKPD07LMryFaSJAlC-ZHvN6vB6_p-TDU5U Message-ID: Subject: Re: [RFC PATCH 08/19] arm/gic: Keep track of GIC features To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Different versions of GICv4 may support different features. Record them > and provide functions to check for their availability. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3.c | 175 ++++++++++++++++++++----- > xen/arch/arm/include/asm/gic.h | 2 + > xen/arch/arm/include/asm/gic_v3_defs.h | 9 ++ > xen/arch/arm/include/asm/vgic.h | 9 ++ > 4 files changed, 162 insertions(+), 33 deletions(-) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 9b8b87078b..14852d18c2 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -100,6 +100,38 @@ static struct { > > static struct gic_info gicv3_info; > > +#ifdef CONFIG_GICV4 > +/* Global state */ > +static struct { > + bool has_vlpis; > + bool has_direct_lpi; > + bool has_vpend_valid_dirty; > + bool has_rvpeid; > +} gicv4 =3D { .has_vlpis =3D true, .has_direct_lpi =3D true, > + .has_vpend_valid_dirty =3D true, .has_rvpeid =3D true, }; > + > + > +bool gic_support_directLPI(void) > +{ > + return gicv4.has_direct_lpi; > +} > + > +bool gic_support_vptValidDirty(void) > +{ > + return gicv4.has_vpend_valid_dirty; > +} > + > +bool gic_has_v4_1_extension(void) > +{ > + return gicv4.has_rvpeid; > +} > + > +bool gic_is_gicv4(void) > +{ > + return gicv4.has_vlpis; gicv4.has_vlpis indicates vLPI/direct-injection support, not the GIC architecture revision. A GICv4 implementation may have no vLPIs (only pLPIs), so gic_is_gicv4() can return a false negative. If the intent is to check the arch version, please use GICD_PIDR2/GICR_PIDR2.ArchRev (e.g. ArchRev=3D=3D4). > +} > +#endif > + > /* per-cpu re-distributor base */ > static DEFINE_PER_CPU(void __iomem*, rbase); > > @@ -914,7 +946,8 @@ static bool gicv3_enable_lpis(void) > return true; > } > > -static int __init gicv3_populate_rdist(void) > +static int __init gic_iterate_rdists(int (*fn)(struct rdist_region *, > + void __iomem *)) > { > int i; > uint32_t aff; > @@ -958,40 +991,16 @@ static int __init gicv3_populate_rdist(void) > > if ( (typer >> 32) =3D=3D aff ) > { > + int ret; > + > this_cpu(rbase) =3D ptr; > > - if ( typer & GICR_TYPER_PLPIS ) > - { > - paddr_t rdist_addr; > - unsigned int procnum; > - int ret; > - > - /* > - * The ITS refers to redistributors either by their = physical > - * address or by their ID. Which one to use is an IT= S > - * choice. So determine those two values here (which= we > - * can do only here in GICv3 code) and tell the > - * ITS code about it, so it can use them later to be= able > - * to address those redistributors accordingly. > - */ > - rdist_addr =3D gicv3.rdist_regions[i].base; > - rdist_addr +=3D ptr - gicv3.rdist_regions[i].map_bas= e; > - procnum =3D (typer & GICR_TYPER_PROC_NUM_MASK); > - procnum >>=3D GICR_TYPER_PROC_NUM_SHIFT; > - > - gicv3_set_redist_address(rdist_addr, procnum); > - > - ret =3D gicv3_lpi_init_rdist(ptr); > - if ( ret && ret !=3D -ENODEV ) > - { > - printk("GICv3: CPU%d: Cannot initialize LPIs: %u= \n", > - smp_processor_id(), ret); > - break; > - } > - } nit: if we call the v4 capability update here we can avoid the extra RD iteration and most of the diff #ifdef CONFIG_GICV4 gicv4_update_lpi_properties() #endif > - > - printk("GICv3: CPU%d: Found redistributor in region %d @= %p\n", > - smp_processor_id(), i, ptr); > + ret =3D fn(gicv3.rdist_regions + i, ptr); > + if ( ret ) > + return ret; > + > + printk("GICv3: CPU%d: Found redistributor @%p\n", nit: maybe better to print correct version of GIC the same applies to other prints > + smp_processor_id(), ptr); > return 0; > } > > @@ -1010,11 +1019,107 @@ static int __init gicv3_populate_rdist(void) > } while ( !(typer & GICR_TYPER_LAST) ); > } > > + return -ENODEV; > +} > + > +static int __init __gicv3_populate_rdist(struct rdist_region *region, > + void __iomem *ptr) > +{ > + uint64_t typer; > + > + typer =3D readq_relaxed(ptr + GICR_TYPER); > + if ( typer & GICR_TYPER_PLPIS ) > + { > + paddr_t rdist_addr; > + unsigned int procnum; > + int ret; > + > + /* > + * The ITS refers to redistributors either by their physical > + * address or by their ID. Which one to use is an ITS > + * choice. So determine those two values here (which we > + * can do only here in GICv3 code) and tell the > + * ITS code about it, so it can use them later to be able > + * to address those redistributors accordingly. > + */ > + rdist_addr =3D region->base; > + rdist_addr +=3D ptr - region->map_base; > + procnum =3D (typer & GICR_TYPER_PROC_NUM_MASK); > + procnum >>=3D GICR_TYPER_PROC_NUM_SHIFT; > + > + gicv3_set_redist_address(rdist_addr, procnum); > + > + ret =3D gicv3_lpi_init_rdist(ptr); > + if ( ret && ret !=3D -ENODEV ) > + { > + printk("GICv3: CPU%d: Cannot initialize LPIs: %d\n", > + smp_processor_id(), ret); > + printk("%s %d\n", __func__, __LINE__); > + return ret; > + } > + } > + > + return 0; > +} > + > +static int __init gicv3_populate_rdist(void) > +{ > + int ret =3D gic_iterate_rdists(__gicv3_populate_rdist); > + if ( ret =3D=3D 0) > + return 0; > + > dprintk(XENLOG_ERR, "GICv3: CPU%d: mpidr 0x%"PRIregister" has no re-= distributor!\n", > smp_processor_id(), cpu_logical_map(smp_processor_id())); > + return -ENODEV; > +} > + > +#ifdef CONFIG_GICV4 > +static int __init __gicv4_update_vlpi_properties(struct rdist_region *re= gion, nit: the function updates more than vLPI properties (it also sets has_direct_lpi), so maybe rename it to include =E2=80=9Clpi=E2=80=9D rather than =E2=80= =9Cvlpi=E2=80=9D. > + void __iomem *ptr) > +{ > + uint64_t typer; > + > + typer =3D readq_relaxed(ptr + GICR_TYPER); > + gicv4.has_vlpis &=3D !!(typer & GICR_TYPER_VLPIS); Might be worth documenting that we treat these RD capabilities as global: if any Redistributor lacks a feature, we disable it system-wide. > + gicv4.has_rvpeid &=3D !!(typer & GICR_TYPER_RVPEID); > + /* RVPEID implies some form of DirectLPI. */ > + gicv4.has_direct_lpi &=3D (!!(typer & GICR_TYPER_DirectLPIS) || It was not clear to me from the comment above why we use RVPEID here: > + !!(typer & GICR_TYPER_RVPEID)); Looking at Arm IHI 0069H.b, the invalidate/sync registers are mandatory not only when GICR_TYPER.Direct* is set, but also when GICR_CTLR.IR =3D=3D 1, a= nd also whenever GICv4.1 is implemented. See 12.11.20 *GICR_INVLPIR*, =E2=80=9CAccessing the GICR_INVLPIR=E2=80=9D. RVPEID is a GICv4.1-only field, and it does not directly describe the presence of the DirectLPI/invalidate registers. My understanding from the GICR_VPENDBASER layout is that the v4.1 encoding uses a vPEID field, while the v4.0 encoding uses a VPT physical address. If that interpretation is correct, then RVPEID would always be set when GICv4.1 is present, which makes the current check somewhat redundant (and it would be good to explain that in the comment). For reference, the GIC-700 / GIC-700AE TRMs describe RVPEID as indicating whether GICR_VPENDBASER records the index (vPEID) into the vPE configuratio= n table (i.e. whether GICv4.1 support is present). Given the above, I think it would be better to also include GICR_CTLR.IR here (as the Linux kernel does), and add a short comment explaining the use of RVPEID. --- nit: we can just use gicv4.has_rvpeid here > + gicv4.has_vpend_valid_dirty &=3D !!(typer & GICR_TYPER_DIRTY); > + > + /* Detect non-sensical configurations */ > + if ( gicv4.has_rvpeid && !gicv4.has_vlpis ) > + { > + gicv4.has_direct_lpi =3D false; > + gicv4.has_vlpis =3D false; nit: 'gicv4.has_vlpis =3D false' is redundant here since the condition already has '!gicv4.has_vlpis' > + gicv4.has_rvpeid =3D false; > + } > + > + printk("GICv4: CPU%d: %sVLPI support, %sdirect LPI support, %sValid+= Dirty support, %sRVPEID support\n", nit: Xen may run on GICv3 even with CONFIG_GICV4 code enabled; please avoid hardcoding "GICv4" > + smp_processor_id(), !!(typer & GICR_TYPER_VLPIS) ? "" : "no "= , > + (!!(typer & GICR_TYPER_DirectLPIS) || > + !!(typer & GICR_TYPER_RVPEID)) ? "" : "no ", > + !!(typer & GICR_TYPER_DIRTY) ? "" : "no ", > + !!(typer & GICR_TYPER_RVPEID) ? "" : "no "); > + > + return 0; > +} > + > +static int __init gicv4_update_vlpi_properties(void) > +{ > + int ret =3D gic_iterate_rdists(__gicv4_update_vlpi_properties); > + > + if ( ret =3D=3D 0 ) > + return 0; > > return -ENODEV; > } > +#else > +static int __init gicv4_update_vlpi_properties(void) > +{ > + return 0; > +} > +#endif > > static int gicv3_cpu_init(void) > { > @@ -1024,6 +1129,10 @@ static int gicv3_cpu_init(void) > if ( gicv3_populate_rdist() ) > return -ENODEV; > > + ret =3D gicv4_update_vlpi_properties(); > + if ( ret ) > + return ret; > + > if ( gicv3_enable_redist() ) > return -ENODEV; > > diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gi= c.h > index 8e713aa477..afb1cc3751 100644 > --- a/xen/arch/arm/include/asm/gic.h > +++ b/xen/arch/arm/include/asm/gic.h > @@ -235,6 +235,8 @@ enum gic_version { > GIC_INVALID =3D 0, /* the default until explicitly set up */ > GIC_V2, > GIC_V3, > + GIC_V4, > + GIC_V4_1, > }; > > DECLARE_PER_CPU(uint64_t, lr_mask); > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/includ= e/asm/gic_v3_defs.h > index c373b94d19..3a7d18ef59 100644 > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > @@ -93,6 +93,12 @@ > > #define GICD_TYPE_LPIS (1U << 17) > > +#define GICD_TYPER2 0x000c > + > +#define GICD_TYPER2_VIL (1U << 7) > +#define GICD_TYPER2_VID GENMASK(4, 0) > +#define GICD_TYPER2_nASSGIcap (1U << 8) > + nit: GICD_TYPER2 and related bit definitions are not used anywhere in this series. Best regards, Mykola > #define GICD_CTLR_RWP (1UL << 31) > #define GICD_CTLR_ARE_NS (1U << 4) > #define GICD_CTLR_ENABLE_G1A (1U << 1) > @@ -149,7 +155,10 @@ > > #define GICR_TYPER_PLPIS (1U << 0) > #define GICR_TYPER_VLPIS (1U << 1) > +#define GICR_TYPER_DIRTY (1U << 2) > +#define GICR_TYPER_DirectLPIS (1U << 3) > #define GICR_TYPER_LAST (1U << 4) > +#define GICR_TYPER_RVPEID (1U << 7) > #define GICR_TYPER_PROC_NUM_SHIFT 8 > #define GICR_TYPER_PROC_NUM_MASK (0xffff << GICR_TYPER_PROC_NUM_SHIF= T) > > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index 360f8a968e..f12d736808 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -405,6 +405,15 @@ extern bool vgic_migrate_irq(struct vcpu *old, struc= t vcpu *new, unsigned int ir > extern void vgic_check_inflight_irqs_pending(struct vcpu *v, > unsigned int rank, uint32_t= r); > > +/* GICV4 functions */ > +#ifdef CONFIG_GICV4 > +bool gic_support_vptValidDirty(void); > +bool gic_is_gicv4(void); > +#else > +#define gic_support_vptValidDirty() (false) > +#define gic_is_gicv4() (false) > +#endif > + > #endif /* !CONFIG_NEW_VGIC */ > > /*** Common VGIC functions used by Xen arch code ****/ > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 07:16:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 07:16:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228409.1534585 (Exim 4.92) (envelope-from ) id 1vqQwC-0005lG-5x; Thu, 12 Feb 2026 07:16:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228409.1534585; Thu, 12 Feb 2026 07:16:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqQwC-0005l9-3F; Thu, 12 Feb 2026 07:16:32 +0000 Received: by outflank-mailman (input) for mailman id 1228409; Thu, 12 Feb 2026 07:16:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqQwB-0005l3-9P for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 07:16:31 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bd861207-07e2-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 08:16:25 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-47edd9024b1so77555565e9.3 for ; Wed, 11 Feb 2026 23:16:25 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 23:16:24 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 08:16:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/12] x86: Reject CPU policies with vendors other than the host's To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-2-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 18:41, Alejandro Vallejo wrote: > On Wed Feb 11, 2026 at 4:41 PM CET, Jan Beulich wrote: >> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>> --- a/xen/lib/x86/policy.c >>> +++ b/xen/lib/x86/policy.c >>> @@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, >>> #define FAIL_MSR(m) \ >>> do { e.msr = (m); goto out; } while ( 0 ) >>> >>> - if ( guest->basic.max_leaf > host->basic.max_leaf ) >>> + if ( (guest->x86_vendor != host->x86_vendor) || >> >> With the subsequent "unknown" discussion also in mind, I wonder: Should we >> fail the request here when either side is "unknown"? > > That'd preclude the creation of VMs on new vendors. At that point, might as > well drop support for unknown vendors altogether. I wouldn't mind that. > > I was thinking of comparing the x86_vendor_id bytes instead, as I answered > to Roger. Then the invariant that only $VENDOR VMs run on $VENDOR hosts is > preserved even if we don't know about them. This would be okay with me. I wonder though if we aren't getting too restrictive here at the same time (even with the above check): Hygon (Fam18) can likely run AMD Fam17 guests quite fine, for example. I wonder what Andrew's considerations here are. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 07:24:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 07:24:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228420.1534595 (Exim 4.92) (envelope-from ) id 1vqR3V-0007RD-VZ; Thu, 12 Feb 2026 07:24:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228420.1534595; Thu, 12 Feb 2026 07:24:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqR3V-0007R6-Sy; Thu, 12 Feb 2026 07:24:05 +0000 Received: by outflank-mailman (input) for mailman id 1228420; Thu, 12 Feb 2026 07:24:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqR3U-0007Qz-Gq for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 07:24:04 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ce9c4e19-07e3-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 08:24:03 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4806bf39419so11486105e9.1 for ; Wed, 11 Feb 2026 23:24:03 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 11 Feb 2026 23:24:02 -0800 (PST) Message-ID: <08f676da-69c7-41a0-8f73-0dfad1054c4f@suse.com> Date: Thu, 12 Feb 2026 08:24:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/12] x86: Add more granularity to the vendors in Kconfig To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-3-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2026 18:51, Alejandro Vallejo wrote: > On Wed Feb 11, 2026 at 5:06 PM CET, Jan Beulich wrote: >> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/Kconfig.cpu >>> +++ b/xen/arch/x86/Kconfig.cpu >>> @@ -19,4 +19,47 @@ config INTEL >>> May be turned off in builds targetting other vendors. Otherwise, >>> must be enabled for Xen to work suitably on Intel platforms. >>> >>> +config HYGON >>> + bool "Support Hygon CPUs" >>> + select AMD >>> + default y >>> + help >>> + Detection, tunings and quirks for Hygon platforms. >>> + >>> + May be turned off in builds targetting other vendors. Otherwise, >>> + must be enabled for Xen to work suitably on Hygon platforms. >>> + >>> + >>> +config CENTAUR >>> + bool "Support Centaur CPUs" >>> + select INTEL >>> + default y >>> + help >>> + Detection, tunings and quirks for Centaur platforms. >>> + >>> + May be turned off in builds targetting other vendors. Otherwise, >>> + must be enabled for Xen to work suitably on Centaur platforms. >>> + >>> +config SHANGHAI >>> + bool "Support Shanghai CPUs" >>> + select INTEL >>> + default y >>> + help >>> + Detection, tunings and quirks for Shanghai platforms. >>> + >>> + May be turned off in builds targetting other vendors. Otherwise, >>> + must be enabled for Xen to work suitably on Shanghai platforms. >>> + >>> +config UNKNOWN_CPU_VENDOR >>> + bool "Support unknown CPU vendors" >>> + default y >>> + help >>> + This option prevents a panic on boot when the host CPU vendor isn't >>> + supported by going into a legacy compatibility mode and not applying >>> + any relevant tunings or quirks. >>> + >>> + Not selecting this options while selecting multiple vendors doesn't have >>> + any major effect on code size, but selecting a single vendor with this >>> + option cleared produces a much smaller build. >> >> Shouldn't this option's prompt be suppressed when all other vendors were >> selected off? Else the degenerate case can result that I mentioned in >> reply to patch 03. > > You mean having the option disappear when any explicit vendor is enabled? No, I mean the prompt (not the option) to disappear when _no_ explicit vendor is enabled. Because of the select-s above, that could effectively be as simple as config UNKNOWN_CPU_VENDOR bool "Support unknown CPU vendors" if INTEL || AMD default y Otherwise, as indicated, the conditional around the panic() in patch 03 degenerates: The panic() would be skipped despite UNKNOWN_CPU_VENDOR=n, as with X86_ENABLED_VENDORS being 0, cpu_vendor() can't tell UNKNOWN_CPU_VENDOR=n from UNKNOWN_CPU_VENDOR=y. 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Wed, 11 Feb 2026 23:38:21 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 08:38:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Put wait.c behind CONFIG_WAIT To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org, Jason Andryuk References: <20260211170118.109946-1-jason.andryuk@amd.com> <73bf621d-0795-4fbe-b926-71be3525b4c7@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <73bf621d-0795-4fbe-b926-71be3525b4c7@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.02.2026 18:30, Andrew Cooper wrote: > On 11/02/2026 5:01 pm, Jason Andryuk wrote: >> wait.c is only used by vm_event.c. Make CONFIG_VM_EVENT select >> CONFIG_WAIT, and use CONFIG_WAIT to control building it. >> >> Provide stubs of functions called from common code. entry.S needs an >> ifdef to hide the symbol from the assembly. >> >> Also conditionalize .waitqueue_vcpu in struct vcpu to save space. >> >> Signed-off-by: Jason Andryuk > > I'd really rather see the API/ABI changes required to purge wait.c > entirely, but I guess this will do in the short term. > > Two things want further thought. > > First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't > need this infrastructure in the first place, but it looks like it's > still compiled in and half wired up.  I suppose you don't notice because > you compile out VM_EVENT on ARM too? But if we want it compiled out altogether on Arm, ... > Second CONFIG_WAIT isn't great name because there are many things it > could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without > CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will > disappear at some point. ... don't we need a separate kconfig control, for it to be selected only on x86 (or for it to be dependent on x86, and then imply-ed)? Imo CONFIG_WAITQUEUE would be okay, as long as it won't have a prompt. We'd then simply want to prevent further select-s / imply-s to appear. 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Wed, 11 Feb 2026 23:46:54 -0800 (PST) Message-ID: <308aa058-73aa-42fb-a68d-ff03ee979820@suse.com> Date: Thu, 12 Feb 2026 08:46:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] libxl: constify some local variables to appease gcc 15.2.1 To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Anthony PERARD Cc: Juergen Gross , xen-devel@lists.xenproject.org References: <20260212032334.1696248-1-marmarek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260212032334.1696248-1-marmarek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 04:23, Marek Marczykowski-Górecki wrote: > Archlinux just updated gcc to 15.2.1+r604+g0b99615a8aef-1 and that > complains about libxl: > > libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: > libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 447 | endptr = strchr(str, '='); > | ^ > libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 452 | endptr = strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 454 | endptr = strchr(str, 0); > | ^ > libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: > libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 447 | endptr = strchr(str, '='); > | ^ > libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 452 | endptr = strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 454 | endptr = strchr(str, 0); > | ^ > cc1: all warnings being treated as errors That's supposed to be happening in C23 mode only, isn't it? Looks like under tools/ we don't set the mode we want to compile in. > Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const > endptr still is needed, to be compatible with the second argument to > strtoul(). Add second variable for this reason. > > Signed-off-by: Marek Marczykowski-Górecki > --- > When I say "just updated" I really mean it. The update hit me between my > CI saying "ok" and release build few hours later. I guess Xen's CI will > see that only after next refresh of the Arch container (next week?). Hmm, and that would then affect not only stable trees, but also security- only ones. In particular there I'd wonder whether enforcing mode (to be e.g. C99) wouldn't be more appropriate. Anthony? > --- a/tools/libs/light/libxl_cpuid.c > +++ b/tools/libs/light/libxl_cpuid.c > @@ -415,6 +415,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, > const char* str) > { > char *endptr; > + const char *endptrc; Don't know what the (perhaps unwritten) policy in libxl is, but in the hypervisor I'd ask for the variable to be declared in the more narrow scope it's solely used in. > @@ -444,25 +445,25 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, > return 4; > } > value = str[1] - 'a'; > - endptr = strchr(str, '='); > - if (value > 3 || endptr == NULL) { > + endptrc = strchr(str, '='); > + if (value > 3 || endptrc == NULL) { > return 4; > } > - str = endptr + 1; > - endptr = strchr(str, ','); > - if (endptr == NULL) { > - endptr = strchr(str, 0); > + str = endptrc + 1; > + endptrc = strchr(str, ','); > + if (endptrc == NULL) { > + endptrc = strchr(str, 0); > } > - if (endptr - str != 32) { > + if (endptrc - str != 32) { > return 5; > } > entry->policy[value] = calloc(32 + 1, 1); > strncpy(entry->policy[value], str, 32); > entry->policy[value][32] = 0; > - if (*endptr == 0) { > + if (*endptrc == 0) { > break; > } > - for (str = endptr + 1; *str == ' ' || *str == '\n'; str++); > + for (str = endptrc + 1; *str == ' ' || *str == '\n'; str++); I'd further ask for the semicolon to be moved to its own line. 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Wed, 11 Feb 2026 23:52:48 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Thu, 12 Feb 2026 09:52:37 +0200 X-Gm-Features: AZwV_QhdvtBl7ySu8yV3DEgJhAblkdhJSLqMQafMSzc0Ci4YFtmE13DSegyI3uE Message-ID: Subject: Re: [RFC PATCH 10/19] arm/its: Keep track of BASER regs To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Keep all the info about BASER regs in host_its structure to be able to ea= sily > access it later. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 36 +++++++++++++++++++++------ > xen/arch/arm/include/asm/gic_v3_its.h | 14 +++++++++++ > 2 files changed, 43 insertions(+), 7 deletions(-) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index c628959f42..2328595a85 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -430,16 +430,32 @@ static void *its_map_cbaser(struct host_its *its) > /* The ITS BASE registers work with page sizes of 4K, 16K or 64K. */ > #define BASER_PAGE_BITS(sz) ((sz) * 2 + 12) > > +struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type) > +{ > + unsigned int i; > + > + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > + { > + if (GITS_BASER_TYPE(hw_its->tables[i].val) =3D=3D type) > + return &hw_its->tables[i]; > + } > + > + return NULL; > +} > + > static int its_map_baser(void __iomem *basereg, uint64_t regc, > - unsigned int nr_items) > + unsigned int nr_items, struct its_baser *baser) > { > uint64_t attr, reg; > unsigned int entry_size =3D GITS_BASER_ENTRY_SIZE(regc); > - unsigned int pagesz =3D 2; /* try 64K pages first, then go down. = */ > + unsigned int page_size[4] =3D {SZ_4K, SZ_16K, SZ_64K, SZ_64K}; > + unsigned int pagesz =3D 0; /* try 64K pages first, then go down. = */ pagesz=3D0 looks like test leftover > unsigned int table_size; > unsigned int order; > void *buffer; > + uint32_t type; > > + type =3D GITS_BASER_TYPE(regc); nit: unused > attr =3D gicv3_its_get_shareability() << GITS_BASER_SHAREABILITY_SH= IFT; > attr |=3D GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILI= TY_SHIFT; > attr |=3D gicv3_its_get_cacheability() << GITS_BASER_INNER_CACHEABIL= ITY_SHIFT; > @@ -479,6 +495,11 @@ retry: > writeq_relaxed(reg, basereg); > regc =3D readq_relaxed(basereg); > > + baser->val =3D regc; > + baser->base =3D buffer; > + baser->table_size =3D table_size; > + baser->pagesz =3D page_size[pagesz]; > + > /* The host didn't like our attributes, just use what it returned. *= / > if ( (regc & BASER_ATTR_MASK) !=3D attr ) > { > @@ -490,7 +511,7 @@ retry: > } > attr =3D regc & BASER_ATTR_MASK; > } > - if ( (regc & GITS_BASER_INNER_CACHEABILITY_MASK) <=3D GIC_BASER_CACH= E_nC ) > + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) > clean_and_invalidate_dcache_va_range(buffer, table_size); > > /* If the host accepted our page size, we are done. */ > @@ -568,26 +589,27 @@ static int gicv3_its_init_single_its(struct host_it= s *hw_its) > { > void __iomem *basereg =3D hw_its->its_base + GITS_BASER0 + i * 8= ; > unsigned int type; > + struct its_baser *baser =3D hw_its->tables + i; > > reg =3D readq_relaxed(basereg); > - type =3D (reg & GITS_BASER_TYPE_MASK) >> GITS_BASER_TYPE_SHIFT; > + type =3D GITS_BASER_TYPE(reg); > switch ( type ) > { > case GITS_BASER_TYPE_NONE: > continue; > case GITS_BASER_TYPE_DEVICE: > - ret =3D its_map_baser(basereg, reg, BIT(hw_its->devid_bits, = UL)); > + ret =3D its_map_baser(basereg, reg, BIT(hw_its->devid_bits, = UL), baser); > if ( ret ) > return ret; > break; > case GITS_BASER_TYPE_COLLECTION: > - ret =3D its_map_baser(basereg, reg, num_possible_cpus()); > + ret =3D its_map_baser(basereg, reg, num_possible_cpus(), bas= er); > if ( ret ) > return ret; > break; > /* In case this is a GICv4, provide a (dummy) vPE table as well.= */ > case GITS_BASER_TYPE_VCPU: > - ret =3D its_map_baser(basereg, reg, 1); > + ret =3D its_map_baser(basereg, reg, 32, baser); Since MAX_VPEID is introduced later in the series, could you use it here instead of the hardcoded 32 (or reorder the patches so it=E2=80=99s availab= le)? Also, if the BASER ends up indirect, the L1 sizing should be recalculated from MAX_VPEID. Best regards, Mykola > if ( ret ) > return ret; > break; > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index 973ca6acdd..bd2696f354 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -64,6 +64,7 @@ > #define GITS_BASER_INNER_CACHEABILITY_SHIFT 59 > #define GITS_BASER_TYPE_SHIFT 56 > #define GITS_BASER_TYPE_MASK (7ULL << GITS_BASER_TYPE_SHIFT) > +#define GITS_BASER_TYPE(reg) ((reg & GITS_BASER_TYPE_MASK) >>= GITS_BASER_TYPE_SHIFT) > #define GITS_BASER_OUTER_CACHEABILITY_SHIFT 53 > #define GITS_BASER_TYPE_NONE 0UL > #define GITS_BASER_TYPE_DEVICE 1UL > @@ -143,6 +144,17 @@ struct its_device { > #endif > }; > > +/* > + * The ITS_BASER structure - contains memory information, cached > + * value of BASER register configuration. > + */ > +struct its_baser { > + void *base; > + uint64_t val; > + unsigned int table_size; > + unsigned int pagesz; > +}; > + > /* data structure for each hardware ITS */ > struct host_its { > struct list_head entry; > @@ -156,6 +168,7 @@ struct host_its { > spinlock_t cmd_lock; > void *cmd_buf; > unsigned int flags; > + struct its_baser tables[GITS_BASER_NR_REGS]; > }; > > /* Map a collection for this host CPU to each host ITS. */ > @@ -259,6 +272,7 @@ struct pending_irq *gicv3_assign_guest_event(struct d= omain *d, > uint32_t virt_lpi); > void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, > uint32_t virt_lpi); > +struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type); > void lpi_write_config(uint8_t *prop_table, uint32_t lpi, uint8_t clr, > uint8_t set); > int its_send_command(struct host_its *hw_its, const void *its_cmd); > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 08:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 08:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228478.1534635 (Exim 4.92) (envelope-from ) id 1vqSDZ-0001nx-83; Thu, 12 Feb 2026 08:38:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228478.1534635; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org Subject: [PATCH 0/2] xen/xenbus: better handle backend crash Date: Thu, 12 Feb 2026 09:38:24 +0100 Message-ID: <20260212083826.136221-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-1.80 / 50.00]; BAYES_HAM(-3.00)[99.99%]; SUSPICIOUS_RECIPS(1.50)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; RCPT_COUNT_TWELVE(0.00)[16]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCVD_TLS_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_VIA_SMTP_AUTH(0.00)[]; TAGGED_RCPT(0.00)[netdev]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -1.80 X-Spam-Level: This small series fixes PV-device frontend side handling in case the backend crashed and has come up again. The old device will be discarded and the replacement can be used instead. Juergen Gross (2): xenbus: add xenbus_device parameter to xenbus_read_driver_state() xen/xenbus: better handle backend crash drivers/net/xen-netfront.c | 34 +++++++++--------- drivers/pci/xen-pcifront.c | 8 ++--- drivers/scsi/xen-scsifront.c | 2 +- drivers/xen/xen-pciback/xenbus.c | 10 +++--- drivers/xen/xenbus/xenbus_client.c | 16 +++++++-- drivers/xen/xenbus/xenbus_probe.c | 42 ++++++++++++++++++++-- drivers/xen/xenbus/xenbus_probe_frontend.c | 2 +- include/xen/xenbus.h | 4 ++- 8 files changed, 83 insertions(+), 35 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 08:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 08:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228479.1534646 (Exim 4.92) (envelope-from ) id 1vqSDf-00022C-Ev; Thu, 12 Feb 2026 08:38:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228479.1534646; Thu, 12 Feb 2026 08:38:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSDf-000225-C0; Thu, 12 Feb 2026 08:38:39 +0000 Received: by outflank-mailman (input) for mailman id 1228479; Thu, 12 Feb 2026 08:38:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSDe-00021U-05 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 08:38:38 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 385a8e97-07ee-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 09:38:35 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 1B1C33E6E8; Thu, 12 Feb 2026 08:38:35 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id A551A3EA62; Thu, 12 Feb 2026 08:38:34 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id +qE3J4qRjWmJMwAAD6G6ig (envelope-from ); Thu, 12 Feb 2026 08:38:34 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 385a8e97-07ee-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770885515; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/ASzH9qE0mBRibU9uWHl4KojtE+mVdpgEGiVGmw5TkI=; b=Gn6GWT0tpFD4Wj0aIBXIADPNbMyqxnarB7G6+MOUb7r55zoH19ifoS/6oYN98O3iKcRraw 9/gjSCt246xTx4r9GkhCsE063MzrrvxyeGrIY20vFRLxt6LIR4BvoDSJ0VCcO4dLRLaU/Z kwxe3FAh1YLhI3NjeVZLnZSoQpjmJsc= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770885515; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/ASzH9qE0mBRibU9uWHl4KojtE+mVdpgEGiVGmw5TkI=; b=Gn6GWT0tpFD4Wj0aIBXIADPNbMyqxnarB7G6+MOUb7r55zoH19ifoS/6oYN98O3iKcRraw 9/gjSCt246xTx4r9GkhCsE063MzrrvxyeGrIY20vFRLxt6LIR4BvoDSJ0VCcO4dLRLaU/Z kwxe3FAh1YLhI3NjeVZLnZSoQpjmJsc= From: Juergen Gross To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org, =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() Date: Thu, 12 Feb 2026 09:38:25 +0100 Message-ID: <20260212083826.136221-2-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212083826.136221-1-jgross@suse.com> References: <20260212083826.136221-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-5.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; URIBL_BLOCKED(0.00)[invisiblethingslab.com:email,imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:email]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; TO_DN_SOME(0.00)[]; TAGGED_RCPT(0.00)[netdev]; R_RATELIMIT(0.00)[to_ip_from(RLsote1drt81dzioaq3931x19g)]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -5.80 X-Spam-Level: In order to prepare checking the xenbus device status in xenbus_read_driver_state(), add the pointer to struct xenbus_device as a parameter. Signed-off-by: Juergen Gross Tested-by: Marek Marczykowski-Górecki --- drivers/net/xen-netfront.c | 34 +++++++++++----------- drivers/pci/xen-pcifront.c | 8 ++--- drivers/scsi/xen-scsifront.c | 2 +- drivers/xen/xen-pciback/xenbus.c | 10 +++---- drivers/xen/xenbus/xenbus_client.c | 3 +- drivers/xen/xenbus/xenbus_probe.c | 6 ++-- drivers/xen/xenbus/xenbus_probe_frontend.c | 2 +- include/xen/xenbus.h | 3 +- 8 files changed, 35 insertions(+), 33 deletions(-) diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index 0969d5c9f6b7..2c414b77dd0f 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c @@ -1646,7 +1646,7 @@ static int xennet_xdp_set(struct net_device *dev, struct bpf_prog *prog, /* avoid the race with XDP headroom adjustment */ wait_event(module_wq, - xenbus_read_driver_state(np->xbdev->otherend) == + xenbus_read_driver_state(np->xbdev, np->xbdev->otherend) == XenbusStateReconfigured); np->netfront_xdp_enabled = true; @@ -1764,9 +1764,9 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev) do { xenbus_switch_state(dev, XenbusStateInitialising); err = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) != + xenbus_read_driver_state(dev, dev->otherend) != XenbusStateClosed && - xenbus_read_driver_state(dev->otherend) != + xenbus_read_driver_state(dev, dev->otherend) != XenbusStateUnknown, XENNET_TIMEOUT); } while (!err); @@ -2627,31 +2627,31 @@ static void xennet_bus_close(struct xenbus_device *dev) { int ret; - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) return; do { xenbus_switch_state(dev, XenbusStateClosing); ret = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosing || - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosed || - xenbus_read_driver_state(dev->otherend) == - XenbusStateUnknown, - XENNET_TIMEOUT); + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosing || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosed || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateUnknown, + XENNET_TIMEOUT); } while (!ret); - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) return; do { xenbus_switch_state(dev, XenbusStateClosed); ret = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosed || - xenbus_read_driver_state(dev->otherend) == - XenbusStateUnknown, - XENNET_TIMEOUT); + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosed || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateUnknown, + XENNET_TIMEOUT); } while (!ret); } diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c index 11636634ae51..cd22bf984024 100644 --- a/drivers/pci/xen-pcifront.c +++ b/drivers/pci/xen-pcifront.c @@ -856,7 +856,7 @@ static void pcifront_try_connect(struct pcifront_device *pdev) int err; /* Only connect once */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitialised) return; @@ -876,7 +876,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) enum xenbus_state prev_state; - prev_state = xenbus_read_driver_state(pdev->xdev->nodename); + prev_state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); if (prev_state >= XenbusStateClosing) goto out; @@ -895,7 +895,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) static void pcifront_attach_devices(struct pcifront_device *pdev) { - if (xenbus_read_driver_state(pdev->xdev->nodename) == + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) == XenbusStateReconfiguring) pcifront_connect(pdev); } @@ -909,7 +909,7 @@ static int pcifront_detach_devices(struct pcifront_device *pdev) struct pci_dev *pci_dev; char str[64]; - state = xenbus_read_driver_state(pdev->xdev->nodename); + state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); if (state == XenbusStateInitialised) { dev_dbg(&pdev->xdev->dev, "Handle skipped connect.\n"); /* We missed Connected and need to initialize. */ diff --git a/drivers/scsi/xen-scsifront.c b/drivers/scsi/xen-scsifront.c index 924025305753..ef74d4da5ab0 100644 --- a/drivers/scsi/xen-scsifront.c +++ b/drivers/scsi/xen-scsifront.c @@ -1175,7 +1175,7 @@ static void scsifront_backend_changed(struct xenbus_device *dev, return; } - if (xenbus_read_driver_state(dev->nodename) == + if (xenbus_read_driver_state(dev, dev->nodename) == XenbusStateInitialised) scsifront_do_lun_hotplug(info, VSCSIFRONT_OP_ADD_LUN); diff --git a/drivers/xen/xen-pciback/xenbus.c b/drivers/xen/xen-pciback/xenbus.c index b11e401f1b1e..4bd1c7a8957e 100644 --- a/drivers/xen/xen-pciback/xenbus.c +++ b/drivers/xen/xen-pciback/xenbus.c @@ -149,12 +149,12 @@ static int xen_pcibk_attach(struct xen_pcibk_device *pdev) mutex_lock(&pdev->dev_lock); /* Make sure we only do this setup once */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitialised) goto out; /* Wait for frontend to state that it has published the configuration */ - if (xenbus_read_driver_state(pdev->xdev->otherend) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->otherend) != XenbusStateInitialised) goto out; @@ -374,7 +374,7 @@ static int xen_pcibk_reconfigure(struct xen_pcibk_device *pdev, dev_dbg(&pdev->xdev->dev, "Reconfiguring device ...\n"); mutex_lock(&pdev->dev_lock); - if (xenbus_read_driver_state(pdev->xdev->nodename) != state) + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != state) goto out; err = xenbus_scanf(XBT_NIL, pdev->xdev->nodename, "num_devs", "%d", @@ -572,7 +572,7 @@ static int xen_pcibk_setup_backend(struct xen_pcibk_device *pdev) /* It's possible we could get the call to setup twice, so make sure * we're not already connected. */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitWait) goto out; @@ -662,7 +662,7 @@ static void xen_pcibk_be_watch(struct xenbus_watch *watch, struct xen_pcibk_device *pdev = container_of(watch, struct xen_pcibk_device, be_watch); - switch (xenbus_read_driver_state(pdev->xdev->nodename)) { + switch (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename)) { case XenbusStateInitWait: xen_pcibk_setup_backend(pdev); break; diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c index 2dc874fb5506..6ed0cd8e9676 100644 --- a/drivers/xen/xenbus/xenbus_client.c +++ b/drivers/xen/xenbus/xenbus_client.c @@ -936,7 +936,8 @@ static int xenbus_unmap_ring_hvm(struct xenbus_device *dev, void *vaddr) * Returns: the state of the driver rooted at the given store path, or * XenbusStateUnknown if no state can be read. */ -enum xenbus_state xenbus_read_driver_state(const char *path) +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, + const char *path) { enum xenbus_state result; int err = xenbus_gather(XBT_NIL, path, "state", "%d", &result, NULL); diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c index 9f9011cd7447..2eed06ba5d38 100644 --- a/drivers/xen/xenbus/xenbus_probe.c +++ b/drivers/xen/xenbus/xenbus_probe.c @@ -191,7 +191,7 @@ void xenbus_otherend_changed(struct xenbus_watch *watch, return; } - state = xenbus_read_driver_state(dev->otherend); + state = xenbus_read_driver_state(dev, dev->otherend); dev_dbg(&dev->dev, "state is %d, (%s), %s, %s\n", state, xenbus_strstate(state), dev->otherend_watch.node, path); @@ -364,7 +364,7 @@ void xenbus_dev_remove(struct device *_dev) * closed. */ if (!drv->allow_rebind || - xenbus_read_driver_state(dev->nodename) == XenbusStateClosing) + xenbus_read_driver_state(dev, dev->nodename) == XenbusStateClosing) xenbus_switch_state(dev, XenbusStateClosed); } EXPORT_SYMBOL_GPL(xenbus_dev_remove); @@ -514,7 +514,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, size_t stringlen; char *tmpstring; - enum xenbus_state state = xenbus_read_driver_state(nodename); + enum xenbus_state state = xenbus_read_driver_state(NULL, nodename); if (state != XenbusStateInitialising) { /* Device is not new, so ignore it. This can happen if a diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c index f04707d1f667..ca04609730df 100644 --- a/drivers/xen/xenbus/xenbus_probe_frontend.c +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c @@ -253,7 +253,7 @@ static int print_device_status(struct device *dev, void *data) } else if (xendev->state < XenbusStateConnected) { enum xenbus_state rstate = XenbusStateUnknown; if (xendev->otherend) - rstate = xenbus_read_driver_state(xendev->otherend); + rstate = xenbus_read_driver_state(xendev, xendev->otherend); pr_warn("Timeout connecting to device: %s (local state %d, remote state %d)\n", xendev->nodename, xendev->state, rstate); } diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h index c94caf852aea..15319da65b7f 100644 --- a/include/xen/xenbus.h +++ b/include/xen/xenbus.h @@ -228,7 +228,8 @@ int xenbus_unmap_ring_vfree(struct xenbus_device *dev, void *vaddr); int xenbus_alloc_evtchn(struct xenbus_device *dev, evtchn_port_t *port); int xenbus_free_evtchn(struct xenbus_device *dev, evtchn_port_t port); -enum xenbus_state xenbus_read_driver_state(const char *path); +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, + const char *path); __printf(3, 4) void xenbus_dev_error(struct xenbus_device *dev, int err, const char *fmt, ...); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 08:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 08:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228480.1534656 (Exim 4.92) (envelope-from ) id 1vqSDi-0002HU-M5; Thu, 12 Feb 2026 08:38:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228480.1534656; Thu, 12 Feb 2026 08:38:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSDi-0002HN-Ii; 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none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770885520; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1mlAVWzzcX0ZcZSFFrXG692dbDlkJVV7Kxyt0Z92TRw=; b=BN0UQfcyL7Zi3637xHsF1/JE1ZOSjUDVXc71w6UrBirRWa93yd39XKuXPoU0cOccDiHE5z okzWaPeZUp0d6SUGz9agL10B9OPnHNnjaE3rWihiwxXFqaatNO84VIcbUssc+hpsNcfFbg LpDmohx9iJiyaj7nTeUjVp3wL893mns= From: Juergen Gross To: linux-kernel@vger.kernel.org Cc: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH 2/2] xen/xenbus: better handle backend crash Date: Thu, 12 Feb 2026 09:38:26 +0100 Message-ID: <20260212083826.136221-3-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212083826.136221-1-jgross@suse.com> References: <20260212083826.136221-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-7.30 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; ARC_NA(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,invisiblethingslab.com:email,suse.com:mid,suse.com:email,info.dev:url]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_FIVE(0.00)[6]; FROM_EQ_ENVFROM(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:email] X-Spam-Flag: NO X-Spam-Score: -7.30 X-Spam-Level: When the backend domain crashes, coordinated device cleanup is not possible (as it involves waiting for the backend state change). In that case, toolstack forcefully removes frontend xenstore entries. xenbus_dev_changed() handles this case, and triggers device cleanup. It's possible that toolstack manages to connect new device in that place, before xenbus_dev_changed() notices the old one is missing. If that happens, new one won't be probed and will forever remain in XenbusStateInitialising. Fix this by checking the frontend's state in Xenstore. In case it has been reset to XenbusStateInitialising by Xen tools, consider this being the result of an unplug+plug operation. It's important that cleanup on such unplug doesn't modify Xenstore entries (especially the "state" key) as it belong to the new device to be probed - changing it would derail establishing connection to the new backend (most likely, closing the device before it was even connected). Handle this case by setting new xenbus_device->vanished flag to true, and check it before changing state entry. And even if xenbus_dev_changed() correctly detects the device was forcefully removed, the cleanup handling is still racy. Since this whole handling doesn't happened in a single Xenstore transaction, it's possible that toolstack might put a new device there already. Avoid re-creating the state key (which in the case of loosing the race would actually close newly attached device). The problem does not apply to frontend domain crash, as this case involves coordinated cleanup. Problem originally reported at https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#t, including reproduction steps. Based-on-patch-by: Marek Marczykowski-Górecki Signed-off-by: Juergen Gross Tested-by: Marek Marczykowski-Górecki --- drivers/xen/xenbus/xenbus_client.c | 13 +++++++++-- drivers/xen/xenbus/xenbus_probe.c | 36 ++++++++++++++++++++++++++++++ include/xen/xenbus.h | 1 + 3 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c index 6ed0cd8e9676..00ee8f62c28c 100644 --- a/drivers/xen/xenbus/xenbus_client.c +++ b/drivers/xen/xenbus/xenbus_client.c @@ -226,8 +226,9 @@ __xenbus_switch_state(struct xenbus_device *dev, struct xenbus_transaction xbt; int current_state; int err, abort; + bool vanished = false; - if (state == dev->state) + if (state == dev->state || dev->vanished) return 0; again: @@ -242,6 +243,10 @@ __xenbus_switch_state(struct xenbus_device *dev, err = xenbus_scanf(xbt, dev->nodename, "state", "%d", ¤t_state); if (err != 1) goto abort; + if (current_state != dev->state && current_state == XenbusStateInitialising) { + vanished = true; + goto abort; + } err = xenbus_printf(xbt, dev->nodename, "state", "%d", state); if (err) { @@ -256,7 +261,7 @@ __xenbus_switch_state(struct xenbus_device *dev, if (err == -EAGAIN && !abort) goto again; xenbus_switch_fatal(dev, depth, err, "ending transaction"); - } else + } else if (!vanished) dev->state = state; return 0; @@ -940,6 +945,10 @@ enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, const char *path) { enum xenbus_state result; + + if (dev && dev->vanished) + return XenbusStateUnknown; + int err = xenbus_gather(XBT_NIL, path, "state", "%d", &result, NULL); if (err) result = XenbusStateUnknown; diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c index 2eed06ba5d38..eb260eceb4d2 100644 --- a/drivers/xen/xenbus/xenbus_probe.c +++ b/drivers/xen/xenbus/xenbus_probe.c @@ -444,6 +444,9 @@ static void xenbus_cleanup_devices(const char *path, struct bus_type *bus) info.dev = NULL; bus_for_each_dev(bus, NULL, &info, cleanup_dev); if (info.dev) { + dev_warn(&info.dev->dev, + "device forcefully removed from xenstore\n"); + info.dev->vanished = true; device_unregister(&info.dev->dev); put_device(&info.dev->dev); } @@ -659,6 +662,39 @@ void xenbus_dev_changed(const char *node, struct xen_bus_type *bus) return; dev = xenbus_device_find(root, &bus->bus); + /* + * Backend domain crash results in not coordinated frontend removal, + * without going through XenbusStateClosing. If this is a new instance + * of the same device Xen tools will have reset the state to + * XenbusStateInitializing. + * It might be that the backend crashed early during the init phase of + * device setup, in which case the known state would have been + * XenbusStateInitializing. So test the backend domid to match the + * saved one. In case the new backend happens to have the same domid as + * the old one, we can just carry on, as there is no inconsistency + * resulting in this case. + */ + if (dev && !strcmp(bus->root, "device")) { + enum xenbus_state state = xenbus_read_driver_state(dev, dev->nodename); + unsigned int backend = xenbus_read_unsigned(root, "backend-id", + dev->otherend_id); + + if (state == XenbusStateInitialising && + (state != dev->state || backend != dev->otherend_id)) { + /* + * State has been reset, assume the old one vanished + * and new one needs to be probed. + */ + dev_warn(&dev->dev, + "state reset occurred, reconnecting\n"); + dev->vanished = true; + } + if (dev->vanished) { + device_unregister(&dev->dev); + put_device(&dev->dev); + dev = NULL; + } + } if (!dev) xenbus_probe_node(bus, type, root); else diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h index 15319da65b7f..8ca15743af7f 100644 --- a/include/xen/xenbus.h +++ b/include/xen/xenbus.h @@ -80,6 +80,7 @@ struct xenbus_device { const char *devicetype; const char *nodename; const char *otherend; + bool vanished; int otherend_id; struct xenbus_watch otherend_watch; struct device dev; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:25:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:25:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228523.1534665 (Exim 4.92) (envelope-from ) id 1vqSwS-0000vI-6H; Thu, 12 Feb 2026 09:24:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228523.1534665; Thu, 12 Feb 2026 09:24:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSwS-0000vB-3f; Thu, 12 Feb 2026 09:24:56 +0000 Received: by outflank-mailman (input) for mailman id 1228523; Thu, 12 Feb 2026 09:24:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSwQ-0000uP-LK for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:24:54 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id afa38f32-07f4-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 10:24:52 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so30378795e9.2 for ; Thu, 12 Feb 2026 01:24:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- I would have preferred to reference the xen-announce@ posting, but the mail may still be stuck in moderation there. --- a/SUPPORT.md +++ b/SUPPORT.md @@ -11,8 +11,8 @@ Xen-Version: 4.21 Initial-Release: 2025-11-19 - Supported-Until: 2027-05-19 - Security-Support-Until: 2028-11-19 + Supported-Until: 2028-11-19 + Security-Support-Until: 2030-11-19 Release Notes : RN From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:27:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:27:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228533.1534675 (Exim 4.92) (envelope-from ) id 1vqSyX-0001QV-Gs; Thu, 12 Feb 2026 09:27:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228533.1534675; Thu, 12 Feb 2026 09:27:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSyX-0001QO-E5; Thu, 12 Feb 2026 09:27:05 +0000 Received: by outflank-mailman (input) for mailman id 1228533; Thu, 12 Feb 2026 09:27:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqSyW-0001QG-61 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:27:04 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id fd1f6fee-07f4-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 10:27:02 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-43622089851so2727617f8f.3 for ; Thu, 12 Feb 2026 01:27:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- I would have preferred to reference the xen-announce@ posting, but the mail may still be stuck in moderation there. --- a/SUPPORT.md +++ b/SUPPORT.md @@ -11,8 +11,8 @@ Xen-Version: 4.20 Initial-Release: 2025-03-05 - Supported-Until: 2026-09-05 - Security-Support-Until: 2028-03-05 + Supported-Until: 2028-03-05 + Security-Support-Until: 2030-03-05 Release Notes : RN From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:30:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:30:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228543.1534686 (Exim 4.92) (envelope-from ) id 1vqT1f-00030S-Uv; Thu, 12 Feb 2026 09:30:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228543.1534686; Thu, 12 Feb 2026 09:30:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT1f-00030L-RA; Thu, 12 Feb 2026 09:30:19 +0000 Received: by outflank-mailman (input) for mailman id 1228543; Thu, 12 Feb 2026 09:30:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT1e-00030E-66 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:30:18 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 70ee290e-07f5-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 10:30:17 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4805ef35864so65495345e9.0 for ; Thu, 12 Feb 2026 01:30:16 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- I would have preferred to reference the xen-announce@ posting, but the mail may still be stuck in moderation there. --- a/SUPPORT.md +++ b/SUPPORT.md @@ -12,7 +12,7 @@ Xen-Version: 4.19 Initial-Release: 2024-07-29 Supported-Until: 2026-01-29 - Security-Support-Until: 2027-07-29 + Security-Support-Until: 2029-07-29 Release Notes : RN From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:32:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:32:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228550.1534695 (Exim 4.92) (envelope-from ) id 1vqT3H-0003UF-8u; Thu, 12 Feb 2026 09:31:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228550.1534695; Thu, 12 Feb 2026 09:31:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT3H-0003U8-6A; Thu, 12 Feb 2026 09:31:59 +0000 Received: by outflank-mailman (input) for mailman id 1228550; Thu, 12 Feb 2026 09:31:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT3G-0003U2-Bd for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:31:58 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id acb3d512-07f5-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 10:31:57 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-483487335c2so35007885e9.2 for ; Thu, 12 Feb 2026 01:31:57 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- I would have preferred to reference the xen-announce@ posting, but the mail may still be stuck in moderation there. --- a/SUPPORT.md +++ b/SUPPORT.md @@ -12,7 +12,7 @@ Xen-Version: 4.18 Initial-Release: 2023-11-16 Supported-Until: 2025-05-16 - Security-Support-Until: 2026-11-16 + Security-Support-Until: 2028-11-16 Release Notes : RN From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:36:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:36:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228559.1534706 (Exim 4.92) (envelope-from ) id 1vqT7i-00046B-PW; Thu, 12 Feb 2026 09:36:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228559.1534706; Thu, 12 Feb 2026 09:36:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT7i-000464-MM; Thu, 12 Feb 2026 09:36:34 +0000 Received: by outflank-mailman (input) for mailman id 1228559; Thu, 12 Feb 2026 09:36:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT7i-00045y-4p for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:36:34 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4e9c4ade-07f6-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 10:36:28 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4836d4c26d3so1101245e9.2 for ; Thu, 12 Feb 2026 01:36:28 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- I would have preferred to reference the xen-announce@ posting, but the mail may still be stuck in moderation there. --- a/SUPPORT.md +++ b/SUPPORT.md @@ -12,7 +12,7 @@ Xen-Version: 4.17 Initial-Release: 2022-12-12 Supported-Until: 2024-06-12 - Security-Support-Until: 2025-12-12 + Security-Support-Until: 2027-12-12 Release Notes : RN From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:37:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:37:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228569.1534715 (Exim 4.92) (envelope-from ) id 1vqT8o-0004o1-6B; Thu, 12 Feb 2026 09:37:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228569.1534715; Thu, 12 Feb 2026 09:37:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT8o-0004nu-3U; Thu, 12 Feb 2026 09:37:42 +0000 Received: by outflank-mailman (input) for mailman id 1228569; Thu, 12 Feb 2026 09:37:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqT8m-0004nl-SU for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:37:41 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 789cd9d0-07f6-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 10:37:39 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b8f7a30515aso194770166b.0 for ; Thu, 12 Feb 2026 01:37:39 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8f6f96573dsm137202566b.2.2026.02.12.01.37.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Feb 2026 01:37:37 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 789cd9d0-07f6-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770889059; x=1771493859; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=Lti3Q4mDJraMDDpMeyfq2mxrj3EjYc2hjF2kVPl2KgM=; b=irQWK0H/enAF5GfwdgggeLskgy9GMNaSCKaJpbkNul1QxFoYWVKwZYjcqw7UbXlCUk xlTviS7HQFpk2ItJDXnthIvpF6eVRsj4fsehseOKh4YZcWsniaMtVXqnw5Ziak3DoeU3 mZQk5nGJplHksxrTZ5tzK017Spk9IAyKC0xJ7gWv8igAnbkOMcy10hrdDor29+uAAYhx lusmX69BqDnkI/oVKwyqLD0jiEa8lxLYe6ZhyjXKDt9dYT631RPFdTrO+uLmkjSOVBuj ECruvrpfPfiPKlAFZKqIVgvjBdQ+Rjo08+VrKSyxJww50PtXjpa3HaxUZXUwtCEsl3+P rVxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770889059; x=1771493859; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Lti3Q4mDJraMDDpMeyfq2mxrj3EjYc2hjF2kVPl2KgM=; b=vynph9tTOpIw1yWRsqMyRFpibSL1p8jxQ4AoiQ7TIaPLo9BCFH7LkYrBTxajMJML5w UCfBrlbsNHgzCEQmIhQVecjIJN5ugm2KcLVc0ZmBPVD1bgfKKh7lrfN8CKcuarGZaQfh wWLKalRYNkkc4OKjiSsGG3tchtDAULAtPDn6651gFCg1YlSeGFmG8eJT1MFuxl3q8kwu Jw+oPbBUbmHz3OatwD5FZm2s49esZ3/XCQt6UH05gFeaolVA3yM6HbRxs+EdLdY1mihq Nq8LMzfL6RbTf8wm64PTrvYBj8/JzimWRjNsIyYlj5AdcuIuJ5S7a6GmcUOerSU6z0Nh UitA== X-Forwarded-Encrypted: i=1; AJvYcCWdvSW/7HKvnSd/rVu4KCxknSCikTcerG3U2IjwwrcbpD8+owIN8uKkpVJCtkFwi7Z8sAtJq5T9FDc=@lists.xenproject.org X-Gm-Message-State: AOJu0YxtyrnhK9g66Z4hrE2b+cqbS5D2OEAaSkUqRD9hzWhFwuS9DDp3 MqUVED7SrrSL2Xnor8oqn2tpmyJzRHDDp1QahTM26+VcAlH/yvIB3ii6vTJKe22t X-Gm-Gg: AZuq6aLwYDbV/HKFLZK8Cep5BtEswW51O2cdfLccg6wbQhxKT5Dp1+Mcm5EUZ11z5vV KUyH1dJUY0rJfhfbY4stmEqnh/RKY+H6w3zsDskCF5XE9LXawfG2K6G0Wp2mKmlDufVPd1AMVgS l61OgBmak/aziYIX150ap91yZXKu/8I6By4BslWvUiRX2Qw6ibE5SuT5uJoIl996yo81k4IP7pO LS+xTWPO/rfB+FS7KkLzYVezeu0tjpblCxmO0UYOr1tlY7JvOddtKGuK1NKMT4BHMPcJHUFgffK ghRlsoacHgnlRalazDPTS7gr63wlXyhO7SOLqsyU1OFy52nW/CLN7+Wc/pgGjZFUx6itVnYLh1n yGhfWKGQiJ+ML1SJ2YOq+81WXd+4juNioCRzXYWIo4UyJy3M0i5EGWHK3PRgt6EK7dVpyez8U9s Ao+v7t9cji8+jLJ4ZCG9dNwWXPB0DZ/FK+khlE3V90QsEVew9lfaA78MDSmi6xkIE5L4JJ33uTZ bw= X-Received: by 2002:a17:906:c147:b0:b87:25a7:3ea0 with SMTP id a640c23a62f3a-b8f8f3ce302mr125774266b.25.1770889058170; Thu, 12 Feb 2026 01:37:38 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 10:37:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Oleksii Kurochko Subject: Re: [PATCH v3 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 To: Jan Beulich Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/11/26 3:16 PM, Jan Beulich wrote: > On 09.02.2026 17:52, Oleksii Kurochko wrote: >> Based on Linux kernel v6.16.0. >> Note that smp_wmb() is used instead of smp_mb__before_atomic() as what >> we want to guarantee that if a bit in irqs_pending_mask is obversable >> that the correspondent bit in irqs_pending is observable too. > And the counterpart of this barrier is the one encoded implicitly in > xchg()? Could do with making more explicit, e.g. by way of adding a > code comment there. I thought it would be clear from the paragraph below where xchng_acquire() is mentioned. I'll update the comment to make it more explicit. >> Add lockless tracking of pending vCPU interrupts using atomic bitops. >> Two bitmaps are introduced: >> - irqs_pending — interrupts currently pending for the vCPU >> - irqs_pending_mask — bits that have changed in irqs_pending >> >> The design follows a multi-producer, single-consumer model, where the >> consumer is the vCPU itself. Producers may set bits in >> irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is >> performed only by the consumer via xchg_acquire(). > What is xchg_acquire() in Xen? I can't spot anything like this. Rudiment from Linux. I'll change to xchng(). >> The consumer must not >> write to irqs_pending and must not act on bits that are not set in the >> mask. Otherwise, extra synchronization should be provided. >> >> On RISC-V interrupts are not injected via guest registers, so pending >> interrupts must be recorded in irqs_pending (using the new >> vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating >> HVIP before returning control to the guest. The consumer side is >> implemented in a follow-up patch. >> >> A barrier between updating irqs_pending and setting the corresponding >> mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees >> that if the consumer observes a mask bit set, the corresponding pending >> bit is also visible. This prevents missed interrupts during the flush. >> >> It is possible a guest could have pending bit not result in the hardware >> register without to be marked pending in irq_pending bitmap as: > Are there some words missing in this sentence? I find it hard to follow > the way it is. Agree, something is wrong with this sentence. I'll rephrase it to: It is possible that a guest could have pending bit in the hardware register without being marked pending in irq_pending bitmap as: ... >> According to the RISC-V ISA specification: >> Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and >> interrupt-enable bits for VS-level software interrupts. VSSIP in hip >> is an alias (writable) of the same bit in hvip. >> Additionally: >> When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only >> zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and >> hie.VSSIE. >> This means the guest may modify vsip.SSIP, which implicitly updates >> hip.VSSIP and the bit being writable with 1 would also trigger an interrupt > s/writable/written/ ? > >> as according to the RISC-V spec: >> These conditions for an interrupt trap to occur must be evaluated in a >> bounded amount of time from when an interrupt becomes, or ceases to be, >> pending in sip, and must also be evaluated immediately following the >> execution of an SRET instruction or an explicit write to a CSR on which >> these interrupt trap conditions expressly depend (including sip, sie and >> sstatus). >> What means that IRQ_VS_SOFT must be synchronized separately, what is done >> in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be >> synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as >> PMU isn't supported now. >> >> For the remaining VS-level interrupt types (IRQ_VS_TIMER and >> IRQ_VS_EXT), the specification states they cannot be modified by the guest >> and are read-only: >> Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable >> bits for VS-level external interrupts. VSEIP is read-only in hip, and is >> the logical-OR of these interrupt sources: >> • bit VSEIP of hvip; >> • the bit of hgeip selected by hstatus.VGEIN; and >> • any other platform-specific external interrupt signal directed to >> VS-level. >> Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable >> bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the >> logical-OR of hvip.VSTIP and any other platform-specific timer interrupt >> signal directed to VS-level. > In what you quote there is something being said about bits being r/o in hip, > but I can't conclude the "cannot be modified by the guest" that is being said > ahead of the quotation. I think it would be good then to add: When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. As they are aliases VS* counterparts can't be writable and also: Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable bits for supervisor-level external interrupts. If implemented, SEIP is read-only in sip, and is set and cleared by the execution environment, typically through a platform-specific interrupt controller. Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable bits for supervisor-level timer interrupts. If implemented, STIP is read-only in sip, and is set and cleared by the execution environment as SIP = VSIP for guest then guest can't update these bits too. I will update the comment with extra information. >> Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() >> and vcpu_unset_interrupt(), and flush them during the call of >> vcpu_flush_interrupts() (which is introduced in follow up patch). >> >> vcpu_sync_interrupts(), which is called just before entering the VM, >> slightly bends the rule that the irqs_pending bit must be written >> first, followed by updating the corresponding bit in irqs_pending_mask. >> However, it still respects the core guarantee that the producer never >> clears the mask and only writes to irqs_pending if it is the one that >> flipped the corresponding mask bit from 0 to 1. >> Moreover, since the consumer won't run concurrently because >> vcpu_sync_interrupts() and the consumer path are going to be invoked >> equentially immediately before VM entry, it is safe to slightly relax >> this ordering rule in vcpu_sync_interrupts(). >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v3: >> - Use smp_wb() instead of smp_mb__before_atomic(). >> - Add explanation of the change above in the commit message. >> - Move vcpu_sync_interrupts() here to producers side. >> - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() >> is called. >> --- >> Changes in V2: >> - Move the patch before an introduction of vtimer. >> - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as >> vcpu structure starts out all zeros. >> - Drop const for irq argument of vcpu_{un}set_interrupt(). >> - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it >> could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. >> - Drop IRQ_LOCAL_MAX as there is no usage for it now. >> --- >> xen/arch/riscv/domain.c | 70 +++++++++++++++++++++++++++++ >> xen/arch/riscv/include/asm/domain.h | 24 ++++++++++ >> xen/arch/riscv/traps.c | 8 ++++ >> 3 files changed, 102 insertions(+) >> >> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >> index af9586a4eb0d..4513f778cdc4 100644 >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -5,6 +5,7 @@ >> #include >> #include >> >> +#include >> #include >> #include >> #include >> @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) >> { >> vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); >> } >> + >> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* >> + * We only allow VS-mode software, timer, and external >> + * interrupts when irq is one of the local interrupts >> + * defined by RISC-V privilege specification. >> + */ > What is "when irq is one ..." intended to be telling me? There's no ... > >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; > ... corresponding code (anymore), afaict. That part should be removed, there is no any sense for it anymore. > Further, who are the prospected callers of this function and its sibling > below? If they're all internal (i.e. not reachable via hypercalls or > emulation on behalf of the guest), this may want to be assertions. Considering your further reply: Having seen a use in patch 08, I should clarify the "reachable" part here: It's not the "reachable" alone, but whether the guest has control over the "irq" value passed. For the example in patch 08 this isn't the case. I think I did not fully understand the part about “the guest has control over the ‘irq’ value passed”, but at the moment I do not have any plans for the guest to pass the irq value directly. (Do you have any examples where it should be needed?). All the use cases I have in mind are similar to the vtimer case: intercepting the SBI call and then, inside the handler, calling vcpu_(un)set_interrupt(). >> + set_bit(irq, v->arch.irqs_pending); >> + smp_wmb(); >> + set_bit(irq, v->arch.irqs_pending_mask); >> + >> + vcpu_kick(v); > Shouldn't this be conditional upon the pending_mask bit going from 0 to > 1? It makes sense to do. I will do that in the following way: if ( !test_and_set_bit(irq, v->arch.irqs_pending_mask) ) vcpu_kick(v); > >> +void vcpu_sync_interrupts(struct vcpu *v) >> +{ >> + unsigned long hvip; >> + >> + /* Read current HVIP and VSIE CSRs */ >> + v->arch.vsie = csr_read(CSR_VSIE); >> + >> + /* Sync-up HVIP.VSSIP bit changes done by Guest */ >> + hvip = csr_read(CSR_HVIP); >> + if ( (v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL) && > Nit: Parentheses please around an & expression when used in an && > one. > >> --- a/xen/arch/riscv/include/asm/domain.h >> +++ b/xen/arch/riscv/include/asm/domain.h >> @@ -54,6 +54,25 @@ struct arch_vcpu { >> register_t henvcfg; >> register_t hideleg; >> register_t hstateen0; >> + register_t hvip; >> + >> + register_t vsie; >> + >> + /* >> + * VCPU interrupts >> + * >> + * We have a lockless approach for tracking pending VCPU interrupts >> + * implemented using atomic bitops. The irqs_pending bitmap represent >> + * pending interrupts whereas irqs_pending_mask represent bits changed >> + * in irqs_pending. Our approach is modeled around multiple producer >> + * and single consumer problem where the consumer is the VCPU itself. >> + * >> + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts >> + * on RV32 host. >> + */ >> +#define RISCV_VCPU_NR_IRQS 64 > What is this 64 deriving from? IOW - can it be some kind of expression, > helping the reader? Originally it derives from the width of mideleg, mie, mvien, mvip, and mip (and their counterpars for other modes) what means that RV32 will have no more then 32 local interrutps, but considering that RISC-V AIA spec tells ...: Table 2.1 lists both the CSRs added for machine level and existing machine-level CSRs whose size is changed by the Advanced Interrupt Architecture. Existing CSRs mie, mip, and mideleg are widended to 64 bits to support a total of 64 interrupt causes. For RV32, the high-half CSRs listed in the table allow access to the upper 32 bits of registers mideleg, mie, mvien, mvip, and mip. The Advanced Interrupt Architecture requires that these high-half CSRs exist for RV32, but the bits they access may all be merely read-only zeros. ... that for RV32 it was widened to 64, so 64 appears here. I haven't used some AIA specific name for constant 64 as in case if AIA isn't used it is more then enough to cover PLIC case, for example. >> --- a/xen/arch/riscv/traps.c >> +++ b/xen/arch/riscv/traps.c >> @@ -169,6 +169,11 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) >> die(); >> } >> >> +static void check_for_pcpu_work(void) >> +{ >> + vcpu_sync_interrupts(current); >> +} > Is this really a helpful wrapper? Or is there going to be more stuff in here > later on? Yes, as you noticed in the further patches vcpu_sync_interrupts() won't be the only one stuff to be called in it. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:40:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:40:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228578.1534725 (Exim 4.92) (envelope-from ) id 1vqTAr-0005Q8-Ho; Thu, 12 Feb 2026 09:39:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228578.1534725; Thu, 12 Feb 2026 09:39:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTAr-0005Q1-F0; Thu, 12 Feb 2026 09:39:49 +0000 Received: by outflank-mailman (input) for mailman id 1228578; Thu, 12 Feb 2026 09:39:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTAq-0005Pv-AS for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 09:39:48 +0000 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [2a00:1450:4864:20::535]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c478b830-07f6-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 10:39:46 +0100 (CET) Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-6581234d208so10591802a12.3 for ; Thu, 12 Feb 2026 01:39:46 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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It isn't needed when we don't clear the flag. >>> >>> Furthermore, one side of the barrier being in common code, the other would >>> better be, too. This way, all architectures are covered (beyond any >>> specific needs they may have). >> Don't we want then move ... >> >>> Signed-off-by: Jan Beulich >>> >>> --- a/xen/arch/arm/domain.c >>> +++ b/xen/arch/arm/domain.c >>> @@ -333,17 +333,7 @@ void sync_local_execstate(void) >>> >>> void sync_vcpu_execstate(struct vcpu *v) >>> { >>> - /* >>> - * We don't support lazy switching. >>> - * >>> - * However the context may have been saved from a remote pCPU so we >>> - * need a barrier to ensure it is observed before continuing. >>> - * >>> - * Per vcpu_context_saved(), the context can be observed when >>> - * v->is_running is false (the caller should check it before calling >>> - * this function). >>> - */ >>> - smp_rmb(); >>> + /* Nothing to do -- no lazy switching */ >>> } >> ... to common code with ability to re-define sync_vcpu_execstate() by arch >> as only x86 does something inside this function? > Indeed this was considered already, as a possible next step. Oh, I missed that you wrote that in Arm-connected patch. Sorry for the noise then. Then this patch looks good to me: Reviewed-by: Oleksii Kurochko ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 09:54:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 09:54:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228593.1534735 (Exim 4.92) (envelope-from ) id 1vqTP9-0008Ke-Nc; Thu, 12 Feb 2026 09:54:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228593.1534735; Thu, 12 Feb 2026 09:54:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTP9-0008KX-Kw; Thu, 12 Feb 2026 09:54:35 +0000 Received: by outflank-mailman (input) for mailman id 1228593; Thu, 12 Feb 2026 09:54:33 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTP7-0008KQ-UE for xen-devel@lists.xenproject.org; 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Thu, 12 Feb 2026 09:54:30 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d3fbcfd0-07f8-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770890071; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=LxtsReFboMwCCMbjgL/hhFV3riAXKanj5BA7Uy+zhpg=; b=OOr0cC+XJGEuuIfgEy5BMDZ6STxBtSoworJyUPlmRlmjRGcPRxrFzGdIDG0I+trzSJbwbJ DofxZZLrmZDgdJVX7jruqpymOB7eS1q30vFOdgJ+EH9AwIanOKTHgITa50TlQh7lU4nCL4 rNOPD42yLkPRNi/27DwYSJpV0Wb4M5M= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=gvaVZe6t DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1770890070; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=LxtsReFboMwCCMbjgL/hhFV3riAXKanj5BA7Uy+zhpg=; b=gvaVZe6tODZ2wr19weMpOjL3cUzDZPhSg+4Dw2HqKQ72yLXSTYScpmH9VGYqon8TMff13q u8rZ7qv+wBf4R36Y66bARP9gQLY6pNWWCj7KvUxe3llJ8ui67yVaJUrGgvy3JEDf/+DTnJ AxN0ja5a8HsbSnRT4jr5rcGqF2jtYd8= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Julien Grall , Anthony PERARD Subject: [PATCH] tools/xenstored: fix live update Date: Thu, 12 Feb 2026 10:54:27 +0100 Message-ID: <20260212095427.143177-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; 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This will leave priv_domid and store_domid set as invalid. Fix that by calling init_domains() in live update case, too. In case of live update skip introducing any found domains, as this will be done when reading the live update state. Fixes: e5b0a940557 ("tools/xenstored: Auto-introduce domains") Signed-off-by: Juergen Gross --- tools/xenstored/core.c | 3 ++- tools/xenstored/domain.c | 20 +++++++++++++------- tools/xenstored/domain.h | 2 +- 3 files changed, 16 insertions(+), 9 deletions(-) diff --git a/tools/xenstored/core.c b/tools/xenstored/core.c index 64c478a801..d509736c32 100644 --- a/tools/xenstored/core.c +++ b/tools/xenstored/core.c @@ -2763,7 +2763,7 @@ int main(int argc, char *argv[]) /* Listen to hypervisor. */ if (!live_update) { domain_init(-1); - init_domains(); + init_domains(false); } /* redirect to /dev/null now we're ready to accept connections */ @@ -3109,6 +3109,7 @@ void read_state_global(const void *ctx, const void *state) set_socket_fd(glb->socket_fd); domain_init(glb->evtchn_fd); + init_domains(true); } static void add_buffered_data(struct buffered_data *bdata, diff --git a/tools/xenstored/domain.c b/tools/xenstored/domain.c index 10ac1c1a8f..e453b3061f 100644 --- a/tools/xenstored/domain.c +++ b/tools/xenstored/domain.c @@ -1344,7 +1344,7 @@ static bool init_domain(unsigned int domid) return true; } -void init_domains(void) +void init_domains(bool live_update) { unsigned int *domids = NULL; unsigned int nr_domids = 0; @@ -1356,12 +1356,15 @@ void init_domains(void) while (!xenmanage_poll_changed_domain(xm_handle, &domid, &state, &caps, &unique_id)) { - nr_domids++; - domids = talloc_realloc(NULL, domids, unsigned int, nr_domids); - if (!domids) - barf_perror("Failed to reallocate domids"); - - domids[nr_domids - 1] = domid; + if (!live_update) { + nr_domids++; + domids = talloc_realloc(NULL, domids, + unsigned int, nr_domids); + if (!domids) + barf_perror("Failed to reallocate domids"); + + domids[nr_domids - 1] = domid; + } if (caps & XENMANAGE_GETDOMSTATE_CAP_CONTROL) { /* @@ -1397,6 +1400,9 @@ void init_domains(void) snprintf(store_domain_path, sizeof(store_domain_path), "/local/domain/%u", store_domid); + if (live_update) + return; + /* * Privileged domid must be first to setup structures for firing the * special watches. diff --git a/tools/xenstored/domain.h b/tools/xenstored/domain.h index 3b1fce74cf..28186ccac0 100644 --- a/tools/xenstored/domain.h +++ b/tools/xenstored/domain.h @@ -92,7 +92,7 @@ int do_set_feature(const void *ctx, struct connection *conn, void domain_early_init(void); void domain_init(int evtfd); -void init_domains(void); +void init_domains(bool live_update); void stubdom_init(bool live_update); void domain_deinit(void); void ignore_connection(struct connection *conn, unsigned int err); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:00:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:00:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228608.1534745 (Exim 4.92) (envelope-from ) id 1vqTV2-0001o2-E3; Thu, 12 Feb 2026 10:00:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228608.1534745; Thu, 12 Feb 2026 10:00:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTV2-0001nv-BF; Thu, 12 Feb 2026 10:00:40 +0000 Received: by outflank-mailman (input) for mailman id 1228608; Thu, 12 Feb 2026 10:00:39 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTV1-0001np-Gj for xen-devel@lists.xenproject.org; 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Message-ID: Date: Thu, 12 Feb 2026 10:00:34 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] sched: move vCPU exec state barriers To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Juergen Gross , Dario Faggioli , George Dunlap References: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> Content-Language: en-US From: Julien Grall In-Reply-To: <1e2df446-b116-4861-a396-b87895a96c67@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Jan, On 05/02/2026 11:33, Jan Beulich wrote: > The barrier in vcpu_context_saved() is specifically about the clearing of > ->is_running. It isn't needed when we don't clear the flag. > > Furthermore, one side of the barrier being in common code, the other would > better be, too. This way, all architectures are covered (beyond any > specific needs they may have). > > Signed-off-by: Jan Beulich Acked-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:03:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:03:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228616.1534755 (Exim 4.92) (envelope-from ) id 1vqTXv-0002Kj-RT; Thu, 12 Feb 2026 10:03:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228616.1534755; Thu, 12 Feb 2026 10:03:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTXv-0002Kc-Ob; Thu, 12 Feb 2026 10:03:39 +0000 Received: by outflank-mailman (input) for mailman id 1228616; Thu, 12 Feb 2026 10:03:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTXu-0002KV-9r for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 10:03:38 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 189936f4-07fa-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 11:03:36 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4806cc07ce7so29136185e9.1 for ; Thu, 12 Feb 2026 02:03:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 02:03:35 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 11:03:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.02.2026 17:36, Oleksii Kurochko wrote: > Introduce flush_tlb_guest_local() to perform a local TLB flush of the guest's > address space for the current hart. This leverages the RISC-V HFENCE.VVMA > instruction, which is used to invalidate translations in the VS-stage of > address translation. > > As for RISC-V binutils >= 2.39 is choosen, we can use hfence.vvma mnemonics > instead of defining hfence.vvma using .insn. > > Although it would be possible to use sbi_remote_hfence_vvma() for this purpose, > it is unnecessary in this context since the flush is required only on the > local hart. Using the SBI call would introduce additional overhead without > benefit, resulting in unnecessary performance loss. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:17:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:17:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228634.1534765 (Exim 4.92) (envelope-from ) id 1vqTkl-0004HZ-Vk; Thu, 12 Feb 2026 10:16:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228634.1534765; Thu, 12 Feb 2026 10:16:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTkl-0004HS-T9; Thu, 12 Feb 2026 10:16:55 +0000 Received: by outflank-mailman (input) for mailman id 1228634; Thu, 12 Feb 2026 10:16:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTkk-0004HM-Rg for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 10:16:54 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f3d65157-07fb-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 11:16:53 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4801eb2c0a5so73668675e9.3 for ; Thu, 12 Feb 2026 02:16:53 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 02:16:52 -0800 (PST) Message-ID: <7cec918c-bd58-4013-9ec2-d43ff7afcd7c@suse.com> Date: Thu, 12 Feb 2026 11:16:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.02.2026 17:36, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1434,3 +1434,126 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > > return get_page(page, p2m->domain) ? page : NULL; > } > + > +void p2m_ctxt_switch_from(struct vcpu *p) > +{ > + if ( is_idle_vcpu(p) ) > + return; > + > + /* > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value what will be done in > + * p2m_handle_vmenter(). > + */ > + p->arch.vsatp = csr_swap(CSR_VSATP, 0); > + > + /* > + * Nothing to do with HGATP as it is constructed each time when > + * p2m_handle_vmenter() is called. > + */ > +} > + > +void p2m_ctxt_switch_to(struct vcpu *n) > +{ > + if ( is_idle_vcpu(n) ) > + return; > + > + n->domain->arch.p2m.is_ctxt_switch_finished = false; How can the context switch of a vCPU affect domain-wide state? > + /* > + * Nothing to do with HGATP or VSATP, they will be set in > + * p2_handle_vmenter() > + */ Why can this not be done here? > +} > + > +void p2m_handle_vmenter(void) > +{ > + struct p2m_domain *p2m = ¤t->domain->arch.p2m; To save yourself (or others) future work, please never open-code p2m_get_hostp2m() (applies further up as well, as I notice only now). > + struct vcpu_vmid *p_vmid = ¤t->arch.vmid; > + uint16_t old_vmid, new_vmid; > + bool need_flush; > + register_t vsatp_old = 0; > + > + BUG_ON(is_idle_vcpu(current)); This is the 3rd use of current - latch into a local variable? > + /* > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value > + * > + * CSR_VSATP is already set to 0 in p2m_ctxt_switch_from() in the > + * case when n->arch.is_p2m_switch_finished = false. Also, there is > + * BUG_ON() below to verify that. > + */ > + if ( p2m->is_ctxt_switch_finished ) > + vsatp_old = csr_swap(CSR_VSATP, 0); This shouldn't be needed when ... > + old_vmid = p_vmid->vmid; > + need_flush = vmid_handle_vmenter(p_vmid); > + new_vmid = p_vmid->vmid; ... the VMID doesn't change. Imo you want to drop is_ctxt_switch_finished again, handle things normally in p2m_ctxt_switch_to(), and deal with merely a changing VMID here. > +#ifdef P2M_DEBUG > + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", > + current, old_vmid, new_vmid, need_flush); > +#endif > + > + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), > + new_vmid)); Bad indentation - new_vmid isn't an argument to csr_write(). Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:19:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:19:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228643.1534776 (Exim 4.92) (envelope-from ) id 1vqTnM-00051g-Bx; Thu, 12 Feb 2026 10:19:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228643.1534776; Thu, 12 Feb 2026 10:19:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTnM-00051Z-8r; Thu, 12 Feb 2026 10:19:36 +0000 Received: by outflank-mailman (input) for mailman id 1228643; Thu, 12 Feb 2026 10:19:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTnK-00051S-9u for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 10:19:34 +0000 Received: from mail132-5.atl131.mandrillapp.com (mail132-5.atl131.mandrillapp.com [198.2.132.5]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4b9d01d7-07fc-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 11:19:21 +0100 (CET) Received: from pmta09.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail132-5.atl131.mandrillapp.com (Mailchimp) with ESMTP id 4fBWVv5fM0zG0CJtv for ; Thu, 12 Feb 2026 10:19:19 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 4effd200d4e64029b1b1b96a0c77e9ae; Thu, 12 Feb 2026 10:19:19 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4b9d01d7-07fc-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770891559; x=1771161559; bh=OAK8E+uWN2N6eP/o8FIa5Egn7ZKGqrRAkCdePJxkJlI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ADsUKPBkIfXpf/LA5yCiBF4HUMSBwajPGyV2MT2scwTsH0oXRz/H4pvKuJLK2HQqD xPyOLsfhS30eoeZefs588ENSXvIe3318CSn0mXKSxkKU9ZM5TnsxN0EsRgL/10h6CV xGlOrDYgn35miWW39PnPCFYcIaO89YikZtRoyx18hLmYH4XbVycZJlXTnZaOaHbZ0X U5Aw8a1rra8iVKyiKeMiEw+XxS1hP+ViRLkB1smoJ6z60IX+ryOdlfqr1ZfnLEhvDm sEP8n5meQP4tpz+oc1UG3rXPehlczVoLAmhQU2SOWukZ8in1q54r8n35lNfQ70HDDk SMe94Qjbym/Gg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770891559; x=1771152059; i=teddy.astie@vates.tech; bh=OAK8E+uWN2N6eP/o8FIa5Egn7ZKGqrRAkCdePJxkJlI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=FCqv1SxF5ebM52kJDAlHNcNFDTjYDS0cIUkXN9BdQ5nhHybjyj5ZVSYiF4tLX30yx N6/IH8vvWJFW9azBBJbwJHyoaiPtd1de+M329LSb4tT207kBUoXxEGhszJteZJgBJO sFma/bJ99ey8SC2E6pCVK5cxT9XMaTzAIdrCRBgD8c0kcb3MR/ThdKzeGA6nU2SI50 XyCb1CsmadTyV6HkXML4vasnNggl7O3W7JlYwuGQ/gjl2WqmCsBUk9pX2y8ZLyZYYf rIkk/lx4cX4jkMWADQ8bB/qL6i9uh5xGvwbteH6IgQxW/omsX6GdD75uGFKP8bXP/V i5X7+l1zAgBEg== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v6]=20xenpm:=20Add=20get-intel-temp=20subcommand?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770891558847 Message-Id: To: "Jan Beulich" Cc: "Oleksii Kurochko" , "Community Manager" , "Anthony PERARD" , xen-devel@lists.xenproject.org References: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> <7064136b-38f1-4bbe-9ff4-14774c88f016@suse.com> In-Reply-To: <7064136b-38f1-4bbe-9ff4-14774c88f016@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.4effd200d4e64029b1b1b96a0c77e9ae?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260212:md Date: Thu, 12 Feb 2026 10:19:19 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 09/02/2026 =C3=A0 15:21, Jan Beulich a =C3=A9crit=C2=A0: > On 09.02.2026 11:31, Teddy Astie wrote: >> @@ -93,6 +96,7 @@ void show_help(void) >> " units default = to \"us\" if unspecified.\n" >> " truncates un-r= epresentable values.\n" >> " 0 lets the har= dware decide.\n" >> + " get-intel-temp [cpuid] get Intel CPU tempera= ture of or all\n" > > Sorry, thinking about it only now: Do we really want to build in the vend= or > name to a command? "get-temp" would allow for adding an AMD implementatio= n > later on? > AMD CPUs expose a PCI device that can be interacted with to get temperatures; which is then exposed in hwmon interface of Linux. That wouldn't be practical to implement hwmon interfaces in xenpm. >> @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) >> errno, strerror(errno)); >> } >> >> +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package= , int *temp) >> +{ >> + xc_resource_entry_t entries[] =3D { >> + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_= STATUS }, >> + { .idx =3D MSR_TEMPERATURE_TARGET }, >> + }; >> + struct xc_resource_op ops =3D { >> + .cpu =3D cpu, >> + .entries =3D entries, >> + .nr_entries =3D ARRAY_SIZE(entries), >> + }; >> + int tjmax; >> + >> + int ret =3D xc_resource_op(xch, 1, &ops); >> + >> + switch ( ret ) >> + { >> + case -1: >> + /* xc_resource_op returns -1 in out of memory scenarios */ >> + errno =3D -ENOMEM; > > And xc_resource_op() doesn't itself set / inherit a properly set errno? > We don't want to override what the C library may have set. > I'm not sure what to do then. I guess we want to reset errno before entering xc_resource_op (so we won't report stale errno), but we would still need to consider cases where xc_resource_op returns failure without errno having being set ? >> + return -1; >> + >> + case 0: >> + /* This CPU isn't online or can't query this MSR */ >> + errno =3D -ENODATA; >> + return -1; > > Here we "synthesize" an error, so errno indeed needs setting. However, > doesn't errno want setting to positive E... values? > Ah right, I overlooked that >> + case 1: >> + { >> + /* >> + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it= 's 100 >> + * which is correct aside a few selected Atom CPUs. Check Linux >> + * kernel's coretemp.c for more information. >> + */ >> + static bool has_reported_once =3D false; >> + >> + if ( !has_reported_once ) >> + { >> + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, a= ssume " >> + "tjmax =3D 100, readings may be incorrect.\= n"); >> + has_reported_once =3D true; >> + } >> + >> + tjmax =3D 100; >> + break; >> + } >> + >> + case 2: >> + tjmax =3D (entries[1].val >> 16) & 0xff; >> + break; >> + >> + default: >> + if ( ret > 0 ) >> + { >> + fprintf(stderr, "Got unexpected xc_resource_op return value= : %d", ret); >> + errno =3D -EINVAL; >> + } >> + else >> + errno =3D ret; > > Why would this be? How do you know "ret" holds a value suitable for putti= ng > in errno? > Aside -1 in out of memory situations when xc_resource_op returns -1, in other failure cases, it returns a hypercall (e.g multicall_op) return code, which is supposed to match a errno. But actually here, it would want to be -ret (due to errno wanting to be positive, and ret being negative) > Jan > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:24:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:24:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228653.1534785 (Exim 4.92) (envelope-from ) id 1vqTrn-0006Wk-Ro; Thu, 12 Feb 2026 10:24:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228653.1534785; Thu, 12 Feb 2026 10:24:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTrn-0006Wd-Ot; Thu, 12 Feb 2026 10:24:11 +0000 Received: by outflank-mailman (input) for mailman id 1228653; Thu, 12 Feb 2026 10:24:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqTrl-0006WV-OU for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 10:24:09 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f6deba8d-07fc-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 11:24:08 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso25941995e9.0 for ; Thu, 12 Feb 2026 02:24:08 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 02:24:07 -0800 (PST) Message-ID: <276d4b09-bf67-423e-b824-467405c5866d@suse.com> Date: Thu, 12 Feb 2026 11:24:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 10:37, Oleksii Kurochko wrote: > On 2/11/26 3:16 PM, Jan Beulich wrote: >> On 09.02.2026 17:52, Oleksii Kurochko wrote: >>> Based on Linux kernel v6.16.0. >>> Note that smp_wmb() is used instead of smp_mb__before_atomic() as what >>> we want to guarantee that if a bit in irqs_pending_mask is obversable >>> that the correspondent bit in irqs_pending is observable too. >> And the counterpart of this barrier is the one encoded implicitly in >> xchg()? Could do with making more explicit, e.g. by way of adding a >> code comment there. > > I thought it would be clear from the paragraph below where xchng_acquire() > is mentioned. I'll update the comment to make it more explicit. I'm confused. The (bogus) mentioning of xchg_acquire() is in the patch description, whereas I suggested a code comment. >>> @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) >>> { >>> vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); >>> } >>> + >>> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >>> +{ >>> + /* >>> + * We only allow VS-mode software, timer, and external >>> + * interrupts when irq is one of the local interrupts >>> + * defined by RISC-V privilege specification. >>> + */ >> What is "when irq is one ..." intended to be telling me? There's no ... >> >>> + if ( irq != IRQ_VS_SOFT && >>> + irq != IRQ_VS_TIMER && >>> + irq != IRQ_VS_EXT ) >>> + return -EINVAL; >> ... corresponding code (anymore), afaict. > > That part should be removed, there is no any sense for it anymore. > >> Further, who are the prospected callers of this function and its sibling >> below? If they're all internal (i.e. not reachable via hypercalls or >> emulation on behalf of the guest), this may want to be assertions. > > Considering your further reply: > Having seen a use in patch 08, I should clarify the "reachable" part here: > It's not the "reachable" alone, but whether the guest has control over the > "irq" value passed. For the example in patch 08 this isn't the case. > > I think I did not fully understand the part about “the guest has control over > the ‘irq’ value passed”, but at the moment I do not have any plans for the guest > to pass the irq value directly. (Do you have any examples where it should be > needed?). No, I don't. This is all for you to sort out. >>> --- a/xen/arch/riscv/include/asm/domain.h >>> +++ b/xen/arch/riscv/include/asm/domain.h >>> @@ -54,6 +54,25 @@ struct arch_vcpu { >>> register_t henvcfg; >>> register_t hideleg; >>> register_t hstateen0; >>> + register_t hvip; >>> + >>> + register_t vsie; >>> + >>> + /* >>> + * VCPU interrupts >>> + * >>> + * We have a lockless approach for tracking pending VCPU interrupts >>> + * implemented using atomic bitops. The irqs_pending bitmap represent >>> + * pending interrupts whereas irqs_pending_mask represent bits changed >>> + * in irqs_pending. Our approach is modeled around multiple producer >>> + * and single consumer problem where the consumer is the VCPU itself. >>> + * >>> + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts >>> + * on RV32 host. >>> + */ >>> +#define RISCV_VCPU_NR_IRQS 64 >> What is this 64 deriving from? IOW - can it be some kind of expression, >> helping the reader? > > Originally it derives from the width of mideleg, mie, mvien, mvip, and mip (and > their counterpars for other modes) what means that RV32 will have no more then > 32 local interrutps, but considering that RISC-V AIA spec tells ...: > > Table 2.1 lists both the CSRs added for machine level and existing machine-level > CSRs whose size is changed by the Advanced Interrupt Architecture. Existing CSRs > mie, mip, and mideleg are widended to 64 bits to support a total of 64 interrupt > causes. > For RV32, the high-half CSRs listed in the table allow access to the upper 32 > bits of registers mideleg, mie, mvien, mvip, and mip. The Advanced Interrupt > Architecture requires that these high-half CSRs exist for RV32, but the bits they > access may all be merely read-only zeros. > > ... that for RV32 it was widened to 64, so 64 appears here. I haven't used some AIA > specific name for constant 64 as in case if AIA isn't used it is more then enough > to cover PLIC case, for example. Thing is that with RV128 in mind I wonder whether 64 is correct, or whether it e.g. wants to be max(BITS_PER_LONG, 64). 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Thu, 12 Feb 2026 02:28:22 -0800 (PST) Message-ID: <4553d4f8-89a9-4ef0-9b56-f3a04d8d7d67@suse.com> Date: Thu, 12 Feb 2026 11:28:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6] xenpm: Add get-intel-temp subcommand To: Teddy Astie Cc: Oleksii Kurochko , Community Manager , Anthony PERARD , xen-devel@lists.xenproject.org References: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> <7064136b-38f1-4bbe-9ff4-14774c88f016@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 11:19, Teddy Astie wrote: > Le 09/02/2026 à 15:21, Jan Beulich a écrit : >> On 09.02.2026 11:31, Teddy Astie wrote: >>> @@ -93,6 +96,7 @@ void show_help(void) >>> " units default to \"us\" if unspecified.\n" >>> " truncates un-representable values.\n" >>> " 0 lets the hardware decide.\n" >>> + " get-intel-temp [cpuid] get Intel CPU temperature of or all\n" >> >> Sorry, thinking about it only now: Do we really want to build in the vendor >> name to a command? "get-temp" would allow for adding an AMD implementation >> later on? > > AMD CPUs expose a PCI device that can be interacted with to get > temperatures; which is then exposed in hwmon interface of Linux. That > wouldn't be practical to implement hwmon interfaces in xenpm. You understand though that AMD only was an example (the most natural one)? >>> @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) >>> errno, strerror(errno)); >>> } >>> >>> +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, int *temp) >>> +{ >>> + xc_resource_entry_t entries[] = { >>> + { .idx = package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS }, >>> + { .idx = MSR_TEMPERATURE_TARGET }, >>> + }; >>> + struct xc_resource_op ops = { >>> + .cpu = cpu, >>> + .entries = entries, >>> + .nr_entries = ARRAY_SIZE(entries), >>> + }; >>> + int tjmax; >>> + >>> + int ret = xc_resource_op(xch, 1, &ops); >>> + >>> + switch ( ret ) >>> + { >>> + case -1: >>> + /* xc_resource_op returns -1 in out of memory scenarios */ >>> + errno = -ENOMEM; >> >> And xc_resource_op() doesn't itself set / inherit a properly set errno? >> We don't want to override what the C library may have set. > > I'm not sure what to do then. I guess we want to reset errno before > entering xc_resource_op (so we won't report stale errno), but we would > still need to consider cases where xc_resource_op returns failure > without errno having being set ? Should xc_resource_op() perhaps better be corrected to behave consistently wrt the setting of errno? >>> + case 1: >>> + { >>> + /* >>> + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's 100 >>> + * which is correct aside a few selected Atom CPUs. Check Linux >>> + * kernel's coretemp.c for more information. >>> + */ >>> + static bool has_reported_once = false; >>> + >>> + if ( !has_reported_once ) >>> + { >>> + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assume " >>> + "tjmax = 100, readings may be incorrect.\n"); >>> + has_reported_once = true; >>> + } >>> + >>> + tjmax = 100; >>> + break; >>> + } >>> + >>> + case 2: >>> + tjmax = (entries[1].val >> 16) & 0xff; >>> + break; >>> + >>> + default: >>> + if ( ret > 0 ) >>> + { >>> + fprintf(stderr, "Got unexpected xc_resource_op return value: %d", ret); >>> + errno = -EINVAL; >>> + } >>> + else >>> + errno = ret; >> >> Why would this be? How do you know "ret" holds a value suitable for putting >> in errno? > > Aside -1 in out of memory situations when xc_resource_op returns -1, in > other failure cases, it returns a hypercall (e.g multicall_op) return > code, which is supposed to match a errno. As above - generally all layers want to deal with errno in a consistent manner. If bugs in lower layers are too intrusive to fix right away, such workarounds will at least want commenting upon (so it is easy to determine at what point they can be removed again). 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Thu, 12 Feb 2026 02:49:44 -0800 (PST) Message-ID: <109c3379-7066-4ad9-93aa-57e87deba81f@suse.com> Date: Thu, 12 Feb 2026 11:49:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/12] x86: Migrate spec_ctrl vendor checks to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-6-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-6-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > @@ -738,11 +738,10 @@ static bool __init retpoline_calculations(void) > unsigned int ucode_rev = this_cpu(cpu_sig).rev; > bool safe = false; > > - if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) > + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) > return true; > > - if ( boot_cpu_data.vendor != X86_VENDOR_INTEL || > - boot_cpu_data.family != 6 ) > + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != 6 ) > return false; At the example of this (applies throughout this patch): With the panic() in patch 03 the transformation looks correct. Without that panic(), or without being explicitly aware of it, this gives the impression of explicitly doing an unsafe thing: Even though by way of boot_cpu_data.vendor we know what vendor's CPU we're on, we're acting as if we didn't know. I'm really uncertain whether such changes are worth it with the mere goal of reducing code size. Even beyond the concern raised, this feels like it might be increasing the risk of introducing subtle bugs. I wonder what Andrew and Roger think in this regard. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 10:52:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 10:52:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228693.1534816 (Exim 4.92) (envelope-from ) id 1vqUJL-0003Mw-Gs; Thu, 12 Feb 2026 10:52:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228693.1534816; Thu, 12 Feb 2026 10:52:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqUJL-0003Mp-E9; Thu, 12 Feb 2026 10:52:39 +0000 Received: by outflank-mailman (input) for mailman id 1228693; Thu, 12 Feb 2026 10:52:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqUJK-0003Me-4J for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 10:52:38 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f10fab12-0800-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 11:52:36 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-43767807cf3so3365094f8f.1 for ; Thu, 12 Feb 2026 02:52:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 02:52:35 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 11:52:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/12] x86: Add cpu_vendor() as a wrapper for the host's CPU vendor To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-4-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-4-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > Introduces various optimisations that rely on constant folding, Value > Range Propagation (VRP), and Dead Code Elimination (DCE) to aggressively > eliminate code surrounding the uses of the function. > > * For single-vendor+no-unknown-vendor builds returns a compile-time > constant. > * For all other cases it ANDs the result with the mask of compiled > vendors, with the effect of performing DCE in switch cases, removing > dead conditionals, etc. > > It's difficult to reason about codegen in general in a project this big, > but in this case the ANDed constant combines with the values typically > checked against, folding into a comparison against zero. Thus, it's better > for codegen to AND its result with the desired compared-against vendor, > rather than using (in)equality operators. That way the comparison is > always against zero. > > "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" > > turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + > cmp with zero). Whereas this... > > "cpu_vendor() == X86_VENDOR_AMD" > > forces cpu_vendor() to be ANDed and then compared to a non-zero value. Coming back to this: How does the value compared against being zero or non-zero matter here? As long as cpu_vendor() yields a compile-time constant, the compiler should be able to leverage that for DCE? And even if it's not a compile time constant, bits masked off in principle allow the compiler to leverage that, too. It may of course be that even up-to-date compilers fall short of doing so. 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Thu, 12 Feb 2026 03:07:01 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 12:06:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 06/12] x86: Migrate switch vendor checks to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-7-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-7-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c > +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c > @@ -133,7 +133,7 @@ static int __init cf_check cpufreq_driver_init(void) > > ret = -ENOENT; > > - switch ( boot_cpu_data.x86_vendor ) > + switch( cpu_vendor() ) Nit: Please avoid screwing up style. > @@ -141,12 +141,10 @@ static int __init cf_check cpufreq_driver_init(void) > switch ( cpufreq_xen_opts[i] ) > { > case CPUFREQ_xen: > - ret = IS_ENABLED(CONFIG_INTEL) ? > - acpi_cpufreq_register() : -ENODEV; > + ret = acpi_cpufreq_register(); > break; > case CPUFREQ_hwp: > - ret = IS_ENABLED(CONFIG_INTEL) ? > - hwp_register_driver() : -ENODEV; > + ret = hwp_register_driver(); > break; > case CPUFREQ_none: > ret = 0; This of course is a neat (side) effect. > @@ -165,7 +163,6 @@ static int __init cf_check cpufreq_driver_init(void) > > case X86_VENDOR_AMD: > case X86_VENDOR_HYGON: > -#ifdef CONFIG_AMD > for ( i = 0; i < cpufreq_xen_cnt; i++ ) > { > switch ( cpufreq_xen_opts[i] ) > @@ -191,9 +188,6 @@ static int __init cf_check cpufreq_driver_init(void) > if ( !ret || ret == -EBUSY ) > break; > } > -#else > - ret = -ENODEV; > -#endif /* CONFIG_AMD */ > break; > > default: There's a change to the function's return value, though: When reaching default:, -ENOENT will result, when previously -ENODEV would have been returned for compiled-out cases. It may well be that there is a dependency somewhere on the particular return value - did you thoroughly check that? Of course this may well apply elsewhere as well; I did not go through and check every of the switch()es you alter. > --- a/xen/arch/x86/cpu/mcheck/mce.h > +++ b/xen/arch/x86/cpu/mcheck/mce.h > @@ -137,7 +137,7 @@ void x86_mcinfo_dump(struct mc_info *mi); > > static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr) > { > - switch (boot_cpu_data.x86_vendor) { > + switch (cpu_vendor()) { Would be nice if style was updated while touching such. > --- a/xen/arch/x86/cpu/vpmu.c > +++ b/xen/arch/x86/cpu/vpmu.c > @@ -815,7 +815,7 @@ static struct notifier_block cpu_nfb = { > > static int __init cf_check vpmu_init(void) > { > - int vendor = current_cpu_data.x86_vendor; > + int vendor = cpu_vendor(); It is only seeing the plain int here that I notice that cpu_vendor() returns uint8_t. I don't think that's necessary, and hence as per ./CODING_STYLE it should rather be unsigned int. Which is then waht would want using here as well. > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -319,7 +319,7 @@ void domain_cpu_policy_changed(struct domain *d) > if ( cpu_has_htt ) > edx |= cpufeat_mask(X86_FEATURE_HTT); > > - switch ( boot_cpu_data.x86_vendor ) > + switch( cpu_vendor() ) > { > case X86_VENDOR_INTEL: > /* > @@ -427,7 +427,7 @@ void domain_cpu_policy_changed(struct domain *d) > if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) > edx &= ~CPUID_COMMON_1D_FEATURES; > > - switch ( boot_cpu_data.x86_vendor ) > + switch( cpu_vendor() ) As they recur, I wonder where these bogus style adjustments are coming from. It's not like ... > --- a/xen/arch/x86/guest/xen/xen.c > +++ b/xen/arch/x86/guest/xen/xen.c > @@ -63,7 +63,7 @@ void asmlinkage __init early_hypercall_setup(void) > x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); > } > > - switch ( boot_cpu_data.x86_vendor ) > + switch ( cpu_vendor() ) ... you would have used a bad sed pattern globally, as here style remains intact. Further down it breaks again. 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Could do with making more explicit, e.g. by way of adding a >>> code comment there. >> I thought it would be clear from the paragraph below where xchng_acquire() >> is mentioned. I'll update the comment to make it more explicit. > I'm confused. The (bogus) mentioning of xchg_acquire() is in the patch > description, whereas I suggested a code comment. Oh, I see. I'll add the a code comment. > >>>> @@ -124,3 +125,72 @@ void arch_vcpu_destroy(struct vcpu *v) >>>> { >>>> vfree((char *)v->arch.cpu_info + sizeof(struct cpu_info) - STACK_SIZE); >>>> } >>>> + >>>> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >>>> +{ >>>> + /* >>>> + * We only allow VS-mode software, timer, and external >>>> + * interrupts when irq is one of the local interrupts >>>> + * defined by RISC-V privilege specification. >>>> + */ >>> What is "when irq is one ..." intended to be telling me? There's no ... >>> >>>> + if ( irq != IRQ_VS_SOFT && >>>> + irq != IRQ_VS_TIMER && >>>> + irq != IRQ_VS_EXT ) >>>> + return -EINVAL; >>> ... corresponding code (anymore), afaict. >> That part should be removed, there is no any sense for it anymore. >> >>> Further, who are the prospected callers of this function and its sibling >>> below? If they're all internal (i.e. not reachable via hypercalls or >>> emulation on behalf of the guest), this may want to be assertions. >> Considering your further reply: >> Having seen a use in patch 08, I should clarify the "reachable" part here: >> It's not the "reachable" alone, but whether the guest has control over the >> "irq" value passed. For the example in patch 08 this isn't the case. >> >> I think I did not fully understand the part about “the guest has control over >> the ‘irq’ value passed”, but at the moment I do not have any plans for the guest >> to pass the irq value directly. (Do you have any examples where it should be >> needed?). > No, I don't. This is all for you to sort out. > >>>> --- a/xen/arch/riscv/include/asm/domain.h >>>> +++ b/xen/arch/riscv/include/asm/domain.h >>>> @@ -54,6 +54,25 @@ struct arch_vcpu { >>>> register_t henvcfg; >>>> register_t hideleg; >>>> register_t hstateen0; >>>> + register_t hvip; >>>> + >>>> + register_t vsie; >>>> + >>>> + /* >>>> + * VCPU interrupts >>>> + * >>>> + * We have a lockless approach for tracking pending VCPU interrupts >>>> + * implemented using atomic bitops. The irqs_pending bitmap represent >>>> + * pending interrupts whereas irqs_pending_mask represent bits changed >>>> + * in irqs_pending. Our approach is modeled around multiple producer >>>> + * and single consumer problem where the consumer is the VCPU itself. >>>> + * >>>> + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts >>>> + * on RV32 host. >>>> + */ >>>> +#define RISCV_VCPU_NR_IRQS 64 >>> What is this 64 deriving from? IOW - can it be some kind of expression, >>> helping the reader? >> Originally it derives from the width of mideleg, mie, mvien, mvip, and mip (and >> their counterpars for other modes) what means that RV32 will have no more then >> 32 local interrutps, but considering that RISC-V AIA spec tells ...: >> >> Table 2.1 lists both the CSRs added for machine level and existing machine-level >> CSRs whose size is changed by the Advanced Interrupt Architecture. Existing CSRs >> mie, mip, and mideleg are widended to 64 bits to support a total of 64 interrupt >> causes. >> For RV32, the high-half CSRs listed in the table allow access to the upper 32 >> bits of registers mideleg, mie, mvien, mvip, and mip. The Advanced Interrupt >> Architecture requires that these high-half CSRs exist for RV32, but the bits they >> access may all be merely read-only zeros. >> >> ... that for RV32 it was widened to 64, so 64 appears here. I haven't used some AIA >> specific name for constant 64 as in case if AIA isn't used it is more then enough >> to cover PLIC case, for example. > Thing is that with RV128 in mind I wonder whether 64 is correct, or whether it > e.g. wants to be max(BITS_PER_LONG, 64). If to look at registers which are used now in hypervisor [1][Table 3] and are connected to the bitmask (or their counterparts mentioned in the quote [2][Table 1]) are hard-coded to 64 and it doesn't dependent on architecture bit-ness. And this is true for AIA. But on the other hand in RISC-V privilege spec the length of hvip is defined as HSXLEN which could be 128 in the case of RV128 and to not depend only on AIA spec likely it would be better to use suggested by you way to define RISCV_VCPU_NR_IRQS. [1] https://github.com/riscv/riscv-aia/blob/main/src/CSRs.adoc#hypervisor-and-vs-csrs [2] https://github.com/riscv/riscv-aia/blob/main/src/CSRs.adoc#machine-level-csrs Thanks. ~ Oleksii > > Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 11:26:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 11:26:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228794.1534897 (Exim 4.92) (envelope-from ) id 1vqUqK-0003AP-R5; Thu, 12 Feb 2026 11:26:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228794.1534897; Thu, 12 Feb 2026 11:26:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqUqK-0003AI-Mr; Thu, 12 Feb 2026 11:26:44 +0000 Received: by outflank-mailman (input) for mailman id 1228794; Thu, 12 Feb 2026 11:26:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqUqJ-0003AC-Q7 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 11:26:43 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b3ffc496-0805-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 12:26:41 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-43622089851so2847337f8f.3 for ; Thu, 12 Feb 2026 03:26:41 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 03:26:40 -0800 (PST) Message-ID: <100f63bf-cc79-43c3-a0f6-147d2dff080d@suse.com> Date: Thu, 12 Feb 2026 12:26:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/12] x86: Have x86_emulate/ implement the single-vendor optimisation To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-8-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-8-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > Open code the vendor check through the policy as a one-off. The emulator > embeds amd_like() in macros and is called in MANY places. Using a > local variable (cp->x86_vendor) makes it a lot smaller (300-400 bytes > smaller). So treat this as the exception it is and let it use the policy > rather than boot_cpu_data. As elsewhere you mainly discuss benefits for the single-vendor case, is the above about the opposite situation? Else why would codegen suffer this much here? Using cp also is preferable for test and fuzzing harnesses, which don't even know boot_cpu_data. > @@ -30,8 +31,15 @@ void BUG(void); > # define X86EMUL_NO_SIMD > # endif > > +/* intentionally avoid cpu_vendor(), as it produces much worse codegen */ Nit (style): Capital letter wanted at the start. > +# define x86emul_cpu(cp) ((X86_ENABLED_VENDORS == \ > + ISOLATE_LSB(X86_ENABLED_VENDORS)) \ > + ? X86_ENABLED_VENDORS \ > + : ((cp)->x86_vendor & X86_ENABLED_VENDORS)) Nit: Indentation. The ? and : want to align with the controlling expression. Further, is this a good name, without "vendor" in it? And then I'm of two minds here as to the use of the macro parameter: On one hand we can be pretty certain what is passed in won't have side effects. Otoh in a hypothetical odd case (seeing that this lives in a header file, not local to an isolated piece of code) where there would be one, the argument being evaluated unreliably could cause an unpleasant surprise. The more ... > #else /* !__XEN__ */ > # include "x86-emulate.h" > +# define x86emul_cpu(cp) ((cp)->x86_vendor) ... that the same wouldn't be observable in the fuzzing or test harnesses. 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Thu, 12 Feb 2026 03:31:11 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 12:31:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/12] x86: Migrate x86_emulate/ to use cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-9-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-9-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > ... but keep the current behaviour of using the policy vendor when > compiled for userspace, where cross-vendor configurations are expected. > > Not a functional change. > > Signed-off-by: Alejandro Vallejo Hmm, ... > --- a/xen/arch/x86/x86_emulate/private.h > +++ b/xen/arch/x86/x86_emulate/private.h > @@ -15,6 +15,7 @@ > # include > > # include > +# include > # include > # include > # include > @@ -30,8 +31,11 @@ void BUG(void); > # define X86EMUL_NO_SIMD > # endif > > +# define x86emul_cpu(cp) ({ (void)(cp); cpu_vendor(); }) > + > #else /* !__XEN__ */ > # include "x86-emulate.h" > +# define x86emul_cpu(cp) ((cp)->x86_vendor) > #endif ... this looked familiar, yet different at the same time. It was only after some eyebrow raising that I noticed that patch 07/12 appears twice in the series, with different titles. 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Thu, 12 Feb 2026 03:52:25 -0800 (PST) Message-ID: <3504e0eb-973c-427f-98ac-27801819e175@suse.com> Date: Thu, 12 Feb 2026 12:52:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/12] x86/acpi: Migrate vendor checks to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-10-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-10-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/arch/x86/acpi/cpu_idle.c > +++ b/xen/arch/x86/acpi/cpu_idle.c > @@ -178,7 +178,7 @@ static void cf_check do_get_hw_residencies(void *arg) > struct cpuinfo_x86 *c = ¤t_cpu_data; > struct hw_residencies *hw_res = arg; > > - if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 ) > + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || c->x86 != 6 ) > return; > > switch ( c->x86_model ) > @@ -915,8 +915,7 @@ void cf_check acpi_dead_idle(void) > mwait(cx->address, 0); > } > } > - else if ( (current_cpu_data.x86_vendor & > - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && > + else if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) && While we certainly make that assumption, shouldn't you add explicit checks that APs' vendors match the BSP's, in order to be able to also replace current_cpu_data uses? Or do we have such a check, and I'm merely overlooking it? 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Hence, to prevent speculative execution causing one >> + * guest’s VS-stage translations to be cached under another guest’s >> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >> + * finally write the new vsatp value what will be done in >> + * p2m_handle_vmenter(). >> + */ >> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >> + >> + /* >> + * Nothing to do with HGATP as it is constructed each time when >> + * p2m_handle_vmenter() is called. >> + */ >> +} >> + >> +void p2m_ctxt_switch_to(struct vcpu *n) >> +{ >> + if ( is_idle_vcpu(n) ) >> + return; >> + >> + n->domain->arch.p2m.is_ctxt_switch_finished = false; > How can the context switch of a vCPU affect domain-wide state? It is wrong to have is_ctxt_switch_finished per domain, it should be vCPU field. > >> + /* >> + * Nothing to do with HGATP or VSATP, they will be set in >> + * p2_handle_vmenter() >> + */ > Why can this not be done here? As VMID should be calculated on VM enter. We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), but then it is possible when vmid_handle_vmenter() will be called before VM entry VMID could be changed and it will be needed again to update HGATP and VSATP what will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one in p2m_handle_vmenter()). This is also an answer to ... > >> +} >> + >> +void p2m_handle_vmenter(void) >> +{ >> + struct p2m_domain *p2m = ¤t->domain->arch.p2m; > To save yourself (or others) future work, please never open-code p2m_get_hostp2m() > (applies further up as well, as I notice only now). > >> + struct vcpu_vmid *p_vmid = ¤t->arch.vmid; >> + uint16_t old_vmid, new_vmid; >> + bool need_flush; >> + register_t vsatp_old = 0; >> + >> + BUG_ON(is_idle_vcpu(current)); > This is the 3rd use of current - latch into a local variable? > >> + /* >> + * No mechanism is provided to atomically change vsatp and hgatp >> + * together. Hence, to prevent speculative execution causing one >> + * guest’s VS-stage translations to be cached under another guest’s >> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >> + * finally write the new vsatp value >> + * >> + * CSR_VSATP is already set to 0 in p2m_ctxt_switch_from() in the >> + * case when n->arch.is_p2m_switch_finished = false. Also, there is >> + * BUG_ON() below to verify that. >> + */ >> + if ( p2m->is_ctxt_switch_finished ) >> + vsatp_old = csr_swap(CSR_VSATP, 0); > This shouldn't be needed when ... > >> + old_vmid = p_vmid->vmid; >> + need_flush = vmid_handle_vmenter(p_vmid); >> + new_vmid = p_vmid->vmid; > ... the VMID doesn't change. Imo you want to drop is_ctxt_switch_finished > again, handle things normally in p2m_ctxt_switch_to(), and deal with merely > a changing VMID here. ... (check the answer above) If it is okay to have potential double VS TLB flush and double update of HGATP and VSATP when old_vmid != new_vmid then we can do in this way. > >> +#ifdef P2M_DEBUG >> + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", >> + current, old_vmid, new_vmid, need_flush); >> +#endif >> + >> + csr_write(CSR_HGATP, construct_hgatp(p2m_get_hostp2m(current->domain), >> + new_vmid)); > Bad indentation - new_vmid isn't an argument to csr_write(). Oh, sure, I will update that. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 12:03:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 12:03:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1228856.1534953 (Exim 4.92) (envelope-from ) id 1vqVPS-0001t8-Fb; Thu, 12 Feb 2026 12:03:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1228856.1534953; Thu, 12 Feb 2026 12:03:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqVPS-0001t1-B2; Thu, 12 Feb 2026 12:03:02 +0000 Received: by outflank-mailman (input) for mailman id 1228856; Thu, 12 Feb 2026 12:03:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqVPR-0001sv-0z for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 12:03:01 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c5bbbfe3-080a-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 13:02:58 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4806e0f6b69so61517665e9.3 for ; Thu, 12 Feb 2026 04:02:58 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 04:02:58 -0800 (PST) Message-ID: <18795ddc-c558-4a51-9b61-717e96bf5150@suse.com> Date: Thu, 12 Feb 2026 13:02:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/12] x86/mcheck: Migrate vendor checks to use cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-12-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-12-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > @@ -862,7 +861,7 @@ static void x86_mcinfo_apei_save( > memset(&m, 0, sizeof(struct mce)); > > m.cpu = mc_global->mc_coreid; > - m.cpuvendor = boot_cpu_data.x86_vendor; > + m.cpuvendor = cpu_vendor(); > m.cpuid = cpuid_eax(1); > m.socketid = mc_global->mc_socketid; > m.apicid = mc_global->mc_apicid; > @@ -964,7 +963,7 @@ static void cf_check __maybe_unused do_mc_get_cpu_info(void *v) > &xcp->mc_ncores_active, &xcp->mc_nthreads); > xcp->mc_cpuid_level = c->cpuid_level; > xcp->mc_family = c->x86; > - xcp->mc_vendor = c->x86_vendor; > + xcp->mc_vendor = cpu_vendor(); > xcp->mc_model = c->x86_model; > xcp->mc_step = c->x86_mask; > xcp->mc_cache_size = c->x86_cache_size; What we do internally is one thing. But what we report to the outside shouldn't be inaccurate, imo. > @@ -1122,7 +1121,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci) > > if ( IS_MCA_BANKREG(reg, mci->mcinj_cpunr) ) > { > - if ( c->x86_vendor == X86_VENDOR_AMD ) > + if ( (cpu_vendor() & X86_VENDOR_AMD) ) Nit: No need for the extra parentheses here. > --- a/xen/arch/x86/cpu/mcheck/mce_amd.c > +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c > @@ -160,7 +160,7 @@ mcequirk_lookup_amd_quirkdata(const struct cpuinfo_x86 *c) > { > unsigned int i; > > - BUG_ON(c->x86_vendor != X86_VENDOR_AMD); > + BUG_ON(!(cpu_vendor() & X86_VENDOR_AMD)); > > for ( i = 0; i < ARRAY_SIZE(mce_amd_quirks); i++ ) > { > @@ -291,7 +291,7 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp) > uint32_t i; > enum mcequirk_amd_flags quirkflag = 0; > > - if ( c->x86_vendor != X86_VENDOR_HYGON ) > + if ( !(cpu_vendor() & X86_VENDOR_HYGON) ) > quirkflag = mcequirk_lookup_amd_quirkdata(c); I wonder if this wasn't better switched to the positive for (checking for AMD). This would the render the BUG_ON() above useless. > --- a/xen/arch/x86/cpu/mcheck/mce_intel.c > +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c > @@ -711,8 +711,8 @@ static bool mce_is_broadcast(struct cpuinfo_x86 *c) > * DisplayFamily_DisplayModel encoding of 06H_EH and above, > * a MCA signal is broadcast to all logical processors in the system > */ > - if ( c->x86_vendor == X86_VENDOR_INTEL && c->x86 == 6 && > - c->x86_model >= 0xe ) > + if ( (cpu_vendor() & X86_VENDOR_INTEL) && > + c->x86 == 6 && c->x86_model >= 0xe ) Nit: Why the re-wrapping of lines? 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Thu, 12 Feb 2026 04:21:14 -0800 (PST) Message-ID: <38288209-7344-4982-872f-01684bbecb94@suse.com> Date: Thu, 12 Feb 2026 13:21:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/12] x86/mcheck: Migrate vendor checks to use cpu_vendor() From: Jan Beulich To: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Jason Andryuk , xen-devel@lists.xenproject.org, Alejandro Vallejo References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-12-alejandro.garciavallejo@amd.com> <18795ddc-c558-4a51-9b61-717e96bf5150@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <18795ddc-c558-4a51-9b61-717e96bf5150@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 13:02, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> @@ -862,7 +861,7 @@ static void x86_mcinfo_apei_save( >> memset(&m, 0, sizeof(struct mce)); >> >> m.cpu = mc_global->mc_coreid; >> - m.cpuvendor = boot_cpu_data.x86_vendor; >> + m.cpuvendor = cpu_vendor(); >> m.cpuid = cpuid_eax(1); >> m.socketid = mc_global->mc_socketid; >> m.apicid = mc_global->mc_apicid; >> @@ -964,7 +963,7 @@ static void cf_check __maybe_unused do_mc_get_cpu_info(void *v) >> &xcp->mc_ncores_active, &xcp->mc_nthreads); >> xcp->mc_cpuid_level = c->cpuid_level; >> xcp->mc_family = c->x86; >> - xcp->mc_vendor = c->x86_vendor; >> + xcp->mc_vendor = cpu_vendor(); >> xcp->mc_model = c->x86_model; >> xcp->mc_step = c->x86_mask; >> xcp->mc_cache_size = c->x86_cache_size; > > What we do internally is one thing. But what we report to the outside shouldn't > be inaccurate, imo. There may be an underlying issue here: For the former case, struct mce is an entirely private definition, having in particular: uint8_t cpuvendor; /* cpu vendor as encoded in system.h */ which pretty clearly was inherited from Linux, and hence was broken when we disconnected our X86_VENDOR_* values from Linux'es (in 4.9). For the latter case, xen_mc_logical_cpu_t is part of the Xen ABI, and hence it got screwed not only as per above, but another time when we converted X86_VENDOR_* values from enumeration-like to bitfield-like (in 4.13). Question of course is - if there were any consumers, they may have followed our breaking of things. So it's hard to tell whether fixing might do more bad than good. (I'll make a fix nevertheless, just in case). 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Thu, 12 Feb 2026 04:56:43 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 13:56:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> <7cec918c-bd58-4013-9ec2-d43ff7afcd7c@suse.com> <099768df-ec44-454f-8a9e-4897d81309f9@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <099768df-ec44-454f-8a9e-4897d81309f9@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 12:57, Oleksii Kurochko wrote: > On 2/12/26 11:16 AM, Jan Beulich wrote: >> On 10.02.2026 17:36, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/p2m.c >>> +++ b/xen/arch/riscv/p2m.c >>> @@ -1434,3 +1434,126 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>> >>> return get_page(page, p2m->domain) ? page : NULL; >>> } >>> + >>> +void p2m_ctxt_switch_from(struct vcpu *p) >>> +{ >>> + if ( is_idle_vcpu(p) ) >>> + return; >>> + >>> + /* >>> + * No mechanism is provided to atomically change vsatp and hgatp >>> + * together. Hence, to prevent speculative execution causing one >>> + * guest’s VS-stage translations to be cached under another guest’s >>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>> + * finally write the new vsatp value what will be done in >>> + * p2m_handle_vmenter(). >>> + */ >>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>> + >>> + /* >>> + * Nothing to do with HGATP as it is constructed each time when >>> + * p2m_handle_vmenter() is called. >>> + */ >>> +} >>> + >>> +void p2m_ctxt_switch_to(struct vcpu *n) >>> +{ >>> + if ( is_idle_vcpu(n) ) >>> + return; >>> + >>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >> How can the context switch of a vCPU affect domain-wide state? > > It is wrong to have is_ctxt_switch_finished per domain, it should be > vCPU field. > >> >>> + /* >>> + * Nothing to do with HGATP or VSATP, they will be set in >>> + * p2_handle_vmenter() >>> + */ >> Why can this not be done here? > > As VMID should be calculated on VM enter. And I didn't suggest to calculate a new one here. > We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), > but then it is possible when vmid_handle_vmenter() will be called before VM entry > VMID could be changed and it will be needed again to update HGATP and VSATP what > will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one > in p2m_handle_vmenter()). Is this a concern resulting from particular logic you expect to appear in the window between context switch and entering the guest, or is this merely an abstract concern? > This is also an answer to ... > >> >>> +} >>> + >>> +void p2m_handle_vmenter(void) >>> +{ >>> + struct p2m_domain *p2m = ¤t->domain->arch.p2m; >> To save yourself (or others) future work, please never open-code p2m_get_hostp2m() >> (applies further up as well, as I notice only now). >> >>> + struct vcpu_vmid *p_vmid = ¤t->arch.vmid; >>> + uint16_t old_vmid, new_vmid; >>> + bool need_flush; >>> + register_t vsatp_old = 0; >>> + >>> + BUG_ON(is_idle_vcpu(current)); >> This is the 3rd use of current - latch into a local variable? >> >>> + /* >>> + * No mechanism is provided to atomically change vsatp and hgatp >>> + * together. Hence, to prevent speculative execution causing one >>> + * guest’s VS-stage translations to be cached under another guest’s >>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>> + * finally write the new vsatp value >>> + * >>> + * CSR_VSATP is already set to 0 in p2m_ctxt_switch_from() in the >>> + * case when n->arch.is_p2m_switch_finished = false. Also, there is >>> + * BUG_ON() below to verify that. >>> + */ >>> + if ( p2m->is_ctxt_switch_finished ) >>> + vsatp_old = csr_swap(CSR_VSATP, 0); >> This shouldn't be needed when ... >> >>> + old_vmid = p_vmid->vmid; >>> + need_flush = vmid_handle_vmenter(p_vmid); >>> + new_vmid = p_vmid->vmid; >> ... the VMID doesn't change. Imo you want to drop is_ctxt_switch_finished >> again, handle things normally in p2m_ctxt_switch_to(), and deal with merely >> a changing VMID here. > > ... (check the answer above) > > If it is okay to have potential double VS TLB flush and double update of > HGATP and VSATP when old_vmid != new_vmid then we can do in this way. I think the simpler, straightforward approach should be used initially, with improvements made once a performance issue was actually determined, or once a less ugly (sorry) approach was found. For example, assuming CSR reads aren't overly expensive, it looks to me as if during VM entry - vsatp only needs writing when vsatp.MODE is zero, - hgatp only needs writing when vsatp.MODE is zero or when the VMID needs updating. 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Thu, 12 Feb 2026 05:17:15 -0800 (PST) Message-ID: <2401ecf5-132b-41ac-b288-68c31db8c906@suse.com> Date: Thu, 12 Feb 2026 14:17:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/12] x86/cpu: Migrate vendor checks to use cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-13-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-13-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > --- a/xen/arch/x86/cpu/intel_cacheinfo.c > +++ b/xen/arch/x86/cpu/intel_cacheinfo.c > @@ -168,9 +168,8 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) > * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for > * trace cache > */ > - if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1 && > - c->x86_vendor != X86_VENDOR_SHANGHAI) > - { > + if (((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) && > + (!(cpu_vendor() & X86_VENDOR_SHANGHAI))) { Nit: Again, no need for the extra parentheses (here: around the !()). Nor do I see a need to alter the first line at all. > --- a/xen/arch/x86/cpu/mtrr/generic.c > +++ b/xen/arch/x86/cpu/mtrr/generic.c > @@ -218,9 +218,8 @@ static void __init print_mtrr_state(const char *level) > printk("%s %u disabled\n", level, i); > } > > - if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD && > - boot_cpu_data.x86 >= 0xf) || > - boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { > + if (((cpu_vendor() & X86_VENDOR_AMD) && boot_cpu_data.x86 >= 0xf) || > + (cpu_vendor() & X86_VENDOR_HYGON)) { Perhaps easier as if ((cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && boot_cpu_data.x86 >= 0xf) { , seeing that there's no Hygon hardware lower than Fam18? > --- a/xen/arch/x86/cpu/vpmu.c > +++ b/xen/arch/x86/cpu/vpmu.c > @@ -398,7 +398,6 @@ int vpmu_load(struct vcpu *v, bool from_guest) > static int vpmu_arch_initialise(struct vcpu *v) > { > struct vpmu_struct *vpmu = vcpu_vpmu(v); > - uint8_t vendor = current_cpu_data.x86_vendor; > int ret; > > BUILD_BUG_ON(sizeof(struct xen_pmu_intel_ctxt) > XENPMU_CTXT_PAD_SZ); > @@ -418,7 +417,7 @@ static int vpmu_arch_initialise(struct vcpu *v) > if ( vpmu_mode != XENPMU_MODE_OFF ) > { > printk(XENLOG_G_WARNING "VPMU: Unknown CPU vendor %d. " > - "Disabling VPMU\n", vendor); > + "Disabling VPMU\n", cpu_vendor()); Why would you want to make the log message less useful? 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Thu, 12 Feb 2026 05:29:38 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 14:29:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 12/12] x86: Migrate every remaining raw vendor check to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-14-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206161539.209922-14-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 17:15, Alejandro Vallejo wrote: > @@ -424,7 +423,7 @@ void domain_cpu_policy_changed(struct domain *d) > * If not emulating AMD or Hygon, clear the duplicated features > * in e1d. > */ > - if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) > + if ( cpu_vendor() & ~(X86_VENDOR_AMD | X86_VENDOR_HYGON) ) > edx &= ~CPUID_COMMON_1D_FEATURES; The usual transformation here would have been to simply replace p->x86_vendor by cpu_vendor(). Such an unusual pattern, if indeed necessary, imo wants explaining in the description. As this is entirely unexpected, I now wonder whether I overlooked any other unmentioned unusual transformations. > --- a/xen/arch/x86/e820.c > +++ b/xen/arch/x86/e820.c > @@ -426,7 +426,7 @@ static uint64_t __init mtrr_top_of_ram(void) > > /* By default we check only Intel systems. */ > if ( e820_mtrr_clip == -1 ) > - e820_mtrr_clip = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL; > + e820_mtrr_clip = cpu_vendor() == X86_VENDOR_INTEL; Unexpectedly retaining == here? > --- a/xen/arch/x86/i8259.c > +++ b/xen/arch/x86/i8259.c > @@ -419,9 +419,8 @@ void __init init_IRQ(void) > * the interrupt. > */ > cpumask_copy(desc->arch.cpu_mask, > - (boot_cpu_data.x86_vendor & > - (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all > - : cpumask_of(cpu))); > + ((cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) > + ? &cpumask_all : cpumask_of(cpu))); Nit: Indentation again, and apparently also excess parentheses. > --- a/xen/arch/x86/irq.c > +++ b/xen/arch/x86/irq.c > @@ -2011,8 +2011,7 @@ void do_IRQ(struct cpu_user_regs *regs) > * interrupts have been delivered to CPUs > * different than the BSP. > */ > - (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | > - X86_VENDOR_HYGON))) && > + cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && Whereas here parentheses look to be missing (to isolate from the || not visible in context). > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -1406,8 +1406,7 @@ void asmlinkage __init noreturn __start_xen(void) > * CPUs with this addressed enumerate CET-SSS to indicate that > * supervisor shadow stacks are now safe to use. > */ > - bool cpu_has_bug_shstk_fracture = > - boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && > + bool cpu_has_bug_shstk_fracture = (cpu_vendor() & X86_VENDOR_INTEL) && > !boot_cpu_has(X86_FEATURE_CET_SSS); I think retaining the prior wrapping would be better here. When done like you do, really it should become bool cpu_has_bug_shstk_fracture = (cpu_vendor() & X86_VENDOR_INTEL) && !boot_cpu_has(X86_FEATURE_CET_SSS); Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:05:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:05:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229033.1535069 (Exim 4.92) (envelope-from ) id 1vqXJI-0002tv-8O; Thu, 12 Feb 2026 14:04:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229033.1535069; Thu, 12 Feb 2026 14:04:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXJI-0002to-5k; Thu, 12 Feb 2026 14:04:48 +0000 Received: by outflank-mailman (input) for mailman id 1229033; Thu, 12 Feb 2026 14:04:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXJG-0002sv-DN for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 14:04:46 +0000 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c70d5595-081b-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 15:04:43 +0100 (CET) Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2026 06:04:40 -0800 Received: from igk-lkp-server01.igk.intel.com (HELO e5404a91d123) ([10.211.93.152]) by orviesa003.jf.intel.com with ESMTP; 12 Feb 2026 06:04:37 -0800 Received: from kbuild by e5404a91d123 with local (Exim 4.98.2) (envelope-from ) id 1vqXJ4-000000001Kr-2rHR; Thu, 12 Feb 2026 14:04:34 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c70d5595-081b-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770905084; x=1802441084; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=hC83cy9I+QvOHq44fYtXM6qMN9P2fhKYqhqqNyaPhiw=; b=Lie3jEI5jY4FJqeqtEdunHEoQc+iZq2K5A7IN6gDD/n8sg2XSjOs/4Px oI1Li9P1cRaNV7cgiQeaq8YWE+I4k7LS6iMdas4DmjTFF+wmVa+9C8KDU A/7Uj6rPDK6U2Wvx6rNOY5hzqHaD8rhsAyVcJ3bjKCX0ZgTlx5UnjkONy 40Wqs0TWYoDRj7f89sWlPcRJpEexp0g/63oo7g+/QgxujDqOEmAOC2w8X LTLX1iQGg4m4I5fw1hqC/w4xx3YZ7yDXH4W1oREdiDCVLoPzRDIgS8gPv 2ED05nmk5r2z8uvwd7pIBkz2rff0A/jZtB2aKT04tb/In5ixdQCCenoHY w==; X-CSE-ConnectionGUID: hjFT8ebsSdyv09SIaZiwHQ== X-CSE-MsgGUID: K/ALXR6JT62AoEObuW8rDw== X-IronPort-AV: E=McAfee;i="6800,10657,11699"; a="83443606" X-IronPort-AV: E=Sophos;i="6.21,286,1763452800"; d="scan'208";a="83443606" X-CSE-ConnectionGUID: TUgDl26jTP25Gm4vGa+Q2g== X-CSE-MsgGUID: TXT8PHAFRqu/SXTEK+WepQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,286,1763452800"; d="scan'208";a="216763664" Date: Thu, 12 Feb 2026 15:04:02 +0100 From: kernel test robot To: Juergen Gross , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-scsi@vger.kernel.org Cc: oe-kbuild-all@lists.linux.dev, Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Andrew Lunn , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org, Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= Subject: Re: [PATCH 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() Message-ID: <202602121525.xsMivuEv-lkp@intel.com> References: <20260212083826.136221-2-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260212083826.136221-2-jgross@suse.com> Hi Juergen, kernel test robot noticed the following build warnings: [auto build test WARNING on xen-tip/linux-next] [also build test WARNING on linus/master v6.19 next-20260211] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/xenbus-add-xenbus_device-parameter-to-xenbus_read_driver_state/20260212-164134 base: https://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git linux-next patch link: https://lore.kernel.org/r/20260212083826.136221-2-jgross%40suse.com patch subject: [PATCH 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() config: x86_64-rhel-9.4-ltp (https://download.01.org/0day-ci/archive/20260212/202602121525.xsMivuEv-lkp@intel.com/config) compiler: gcc-14 (Debian 14.2.0-19) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260212/202602121525.xsMivuEv-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202602121525.xsMivuEv-lkp@intel.com/ All warnings (new ones prefixed by >>): >> Warning: drivers/xen/xenbus/xenbus_client.c:940 function parameter 'dev' not described in 'xenbus_read_driver_state' >> Warning: drivers/xen/xenbus/xenbus_client.c:940 function parameter 'dev' not described in 'xenbus_read_driver_state' -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:22:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:22:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229064.1535080 (Exim 4.92) (envelope-from ) id 1vqXZt-0005gm-L4; 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Thu, 12 Feb 2026 06:21:49 -0800 (PST) MIME-Version: 1.0 References: <5189cce4272700616ff5a39870566abc72a1acd2.1770826406.git.bertrand.marquis@arm.com> In-Reply-To: <5189cce4272700616ff5a39870566abc72a1acd2.1770826406.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Thu, 12 Feb 2026 15:21:37 +0100 X-Gm-Features: AZwV_QjVAk-V_PvYUdiIzB30hBZsiWN4A82btvhLaiZ12FBzJDPJj7YphZzSoDk Message-ID: Subject: Re: [PATCH v2 03/12] xen/arm: ffa: Harden shm page parsing To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > get_shm_pages() uses unchecked address arithmetic and does not enforce > alignment, so malformed descriptors can cause overflow or slip through > validation. The reclaim path also repeats handle-to-shm-mem conversion > in multiple places, duplicating error handling. > > Harden page parsing and reclaim handling: > - add ffa_safe_addr_add() and use it to detect address overflows > - enforce alignment checks in get_shm_pages() and return FF-A errors > - introduce ffa_secure_reclaim() and use it for MEM_RECLAIM and teardown > - simplify ffa_mem_share() argument handling and allow max page count > > While there rename ffa_mem_share to ffa_spmc_share and ffa_mem_reclaim > to ffa_spmc_reclaim to have coherent names with other parts of ffa > implementation for SMC wrappers to the SPMC. > > Functional impact: invalid or misaligned memory ranges now fail earlier > with proper error codes; behavior for valid descriptors is unchanged. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - rename ffa_mem_share to ffa_spmc_share and ffa_mem_reclaim to > ffa_spmc_reclaim > - remove unused frag_len > --- > xen/arch/arm/tee/ffa_private.h | 11 +++++++ > xen/arch/arm/tee/ffa_shm.c | 60 ++++++++++++++++------------------ > 2 files changed, 40 insertions(+), 31 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index b625f1c72914..58562d8e733c 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -632,4 +632,15 @@ static inline void ffa_uuid_set(struct ffa_uuid *id,= uint32_t val0, > id->val[1] =3D ((uint64_t)val3 << 32U) | val2; > } > > +/* > + * Common overflow-safe helper to verify that adding a number of pages t= o an > + * address will not wrap around. > + */ > +static inline bool ffa_safe_addr_add(uint64_t addr, uint64_t pages) > +{ > + uint64_t off =3D pages * FFA_PAGE_SIZE; > + > + return (off / FFA_PAGE_SIZE) =3D=3D pages && addr <=3D UINT64_MAX - = off; > +} > + > #endif /*__FFA_PRIVATE_H__*/ > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 90800e44a86a..adc7e645a1c7 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -96,16 +96,14 @@ struct ffa_shm_mem { > struct page_info *pages[]; > }; > > -static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, > - register_t addr, uint32_t pg_count, > - uint64_t *handle) > +static int32_t ffa_spmc_share(uint32_t tot_len, uint64_t *handle) > { > struct arm_smccc_1_2_regs arg =3D { > .a0 =3D FFA_MEM_SHARE_64, > .a1 =3D tot_len, > - .a2 =3D frag_len, > - .a3 =3D addr, > - .a4 =3D pg_count, > + .a2 =3D tot_len, > + .a3 =3D 0, > + .a4 =3D 0, > }; > struct arm_smccc_1_2_regs resp; > > @@ -131,12 +129,16 @@ static int32_t ffa_mem_share(uint32_t tot_len, uint= 32_t frag_len, > } > } > > -static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, > - uint32_t flags) > +static int32_t ffa_spmc_reclaim(struct ffa_shm_mem *shm, uint32_t flags) > { > + register_t handle_hi; > + register_t handle_lo; > + > if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) > return FFA_RET_NOT_SUPPORTED; > > + uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); > + > return ffa_simple_call(FFA_MEM_RECLAIM, handle_lo, handle_hi, flags,= 0); > } > > @@ -145,7 +147,7 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, ui= nt32_t handle_hi, > * this function fails then the caller is still expected to call > * put_shm_pages() as a cleanup. > */ > -static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, > +static int32_t get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, > const struct ffa_address_range *range, > uint32_t range_count) > { > @@ -156,17 +158,26 @@ static int get_shm_pages(struct domain *d, struct f= fa_shm_mem *shm, > p2m_type_t t; > uint64_t addr; > uint64_t page_count; > + uint64_t gaddr; > > for ( n =3D 0; n < range_count; n++ ) > { > page_count =3D ACCESS_ONCE(range[n].page_count); > addr =3D ACCESS_ONCE(range[n].address); > + > + if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) > + return FFA_RET_INVALID_PARAMETERS; > + > for ( m =3D 0; m < page_count; m++ ) > { > if ( pg_idx >=3D shm->page_count ) > return FFA_RET_INVALID_PARAMETERS; > > - gfn =3D gaddr_to_gfn(addr + m * FFA_PAGE_SIZE); > + if ( !ffa_safe_addr_add(addr, m) ) > + return FFA_RET_INVALID_PARAMETERS; > + > + gaddr =3D addr + m * FFA_PAGE_SIZE; > + gfn =3D gaddr_to_gfn(gaddr); > shm->pages[pg_idx] =3D get_page_from_gfn(d, gfn_x(gfn), &t, > P2M_ALLOC); > if ( !shm->pages[pg_idx] ) > @@ -180,7 +191,7 @@ static int get_shm_pages(struct domain *d, struct ffa= _shm_mem *shm, > > /* The ranges must add up */ > if ( pg_idx < shm->page_count ) > - return FFA_RET_INVALID_PARAMETERS; > + return FFA_RET_INVALID_PARAMETERS; > > return FFA_RET_OK; > } > @@ -198,15 +209,11 @@ static void put_shm_pages(struct ffa_shm_mem *shm) > > static bool inc_ctx_shm_count(struct domain *d, struct ffa_ctx *ctx) > { > - bool ret =3D true; > + bool ret =3D false; > > spin_lock(&ctx->lock); > > - if ( ctx->shm_count >=3D FFA_MAX_SHM_COUNT ) > - { > - ret =3D false; > - } > - else > + if ( ctx->shm_count < FFA_MAX_SHM_COUNT ) > { > /* > * If this is the first shm added, increase the domain reference > @@ -217,6 +224,7 @@ static bool inc_ctx_shm_count(struct domain *d, struc= t ffa_ctx *ctx) > get_knownalive_domain(d); > > ctx->shm_count++; > + ret =3D true; > } > > spin_unlock(&ctx->lock); > @@ -251,7 +259,7 @@ static struct ffa_shm_mem *alloc_ffa_shm_mem(struct d= omain *d, > struct ffa_ctx *ctx =3D d->arch.tee; > struct ffa_shm_mem *shm; > > - if ( page_count >=3D FFA_MAX_SHM_PAGE_COUNT ) > + if ( page_count > FFA_MAX_SHM_PAGE_COUNT ) > return NULL; > if ( !inc_ctx_shm_count(d, ctx) ) > return NULL; > @@ -297,7 +305,6 @@ static int share_shm(struct ffa_shm_mem *shm) > struct ffa_address_range *addr_range; > struct ffa_mem_region *region_descr; > const unsigned int region_count =3D 1; > - uint32_t frag_len; > uint32_t tot_len; > paddr_t last_pa; > unsigned int n; > @@ -350,7 +357,6 @@ static int share_shm(struct ffa_shm_mem *shm) > } > > addr_range =3D region_descr->address_range_array; > - frag_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_count= , 1); > last_pa =3D page_to_maddr(shm->pages[0]); > init_range(addr_range, last_pa); > for ( n =3D 1; n < shm->page_count; last_pa =3D pa, n++ ) > @@ -362,12 +368,11 @@ static int share_shm(struct ffa_shm_mem *shm) > continue; > } > > - frag_len +=3D sizeof(*addr_range); > addr_range++; > init_range(addr_range, pa); > } > > - ret =3D ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle); > + ret =3D ffa_spmc_share(tot_len, &shm->handle); > > out: > ffa_rxtx_spmc_tx_release(); > @@ -637,8 +642,6 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint3= 2_t flags) > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > struct ffa_shm_mem *shm; > - register_t handle_hi; > - register_t handle_lo; > int32_t ret; > > if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) ) > @@ -652,8 +655,7 @@ int32_t ffa_handle_mem_reclaim(uint64_t handle, uint3= 2_t flags) > if ( !shm ) > return FFA_RET_INVALID_PARAMETERS; > > - uint64_to_regpair(&handle_hi, &handle_lo, handle); > - ret =3D ffa_mem_reclaim(handle_lo, handle_hi, flags); > + ret =3D ffa_spmc_reclaim(shm, flags); > > if ( ret ) > { > @@ -677,11 +679,7 @@ bool ffa_shm_domain_destroy(struct domain *d) > > list_for_each_entry_safe(shm, tmp, &ctx->shm_list, list) > { > - register_t handle_hi; > - register_t handle_lo; > - > - uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); > - res =3D ffa_mem_reclaim(handle_lo, handle_hi, 0); > + res =3D ffa_spmc_reclaim(shm, 0); > switch ( res ) { > case FFA_RET_OK: > printk(XENLOG_G_DEBUG "%pd: ffa: Reclaimed handle %#lx\n", > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:33:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:33:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229080.1535090 (Exim 4.92) (envelope-from ) id 1vqXky-0007MH-JD; Thu, 12 Feb 2026 14:33:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229080.1535090; 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This is > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > Linux 6.17.9 in this test. > The result is rather sad: > https://openqa.qubes-os.org/tests/166691#step/simple_gui_apps/30 > or > https://openqa.qubes-os.org/tests/166700#step/desktop_linux_manager_config/42 > > The black windows are mapped from a domU (using grant tables). But if > you watch the video (in the "logs&assets" tab), login window of dom0 is > affected too (background is rendered significantly later than its text > and widgets). > > I didn't found any relevant errors in kernel (or Xen) messages. Just in > case, full dumps: > https://openqa.qubes-os.org/tests/166700/file/desktop_linux_manager_config-journalctl.log > https://openqa.qubes-os.org/tests/166700/file/desktop_linux_manager_config-xl-dmesg.log > > Some user reported similar issue with Intel Arc Pro B50, which also uses > "xe" driver: > https://github.com/QubesOS/qubes-issues/issues/10661 > > I tested also Linux 6.19-rc8, no improvements. > > My previous tests of the xe driver on older systems (Meteor Lake, Raptor > Lake) resulted in similar behavior, while i915 works fine there. But there > I needed to use force_probe parameter, and blamed the issue on xe not > officially supporting those platforms. I wanted to compare with i915 on > LNL, but i915 doesn't support that model at all (and if I force it, I > get kernel panic in i915_pci_probe...). > > Interestingly, it appears to work just fine on Qubes OS 4.2 (Xen 4.17.6, > same Linux dom0 version). I did not tested with Xen 4.21. > > In both cases, our Xen has the patch to use Linux's PAT layout applied. > That's a workaround for > https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7648, which is > fixed now, but apparently similar bug is still present in a few other > drivers (including binary nvidia one...). > > The same Linux kernel started without Xen works just fine. > > Any ideas? > > Having good and a bad version, I can try to bisect this one, but given > it requires rebuilding Xen toolstack each time too (due to bisection > across releases), I'd rather avoid it if possible... > > I'm CC-ing also intel-xe list, maybe somebody there have some ideas how > to debug this. Unfortunately I'm afraid we don't have any good advice here. First I thought about trying to isolate Mesa version in the Qubes OS version, but the fact that it works in bare metal makes this a silly option. It looks more a cache management indeed, and I'm afraid we will only find the definite spot after the bisect :( > > -- > Best Regards, > Marek Marczykowski-Grecki > Invisible Things Lab From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:36:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:36:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229095.1535100 (Exim 4.92) (envelope-from ) id 1vqXnp-00080N-4V; Thu, 12 Feb 2026 14:36:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229095.1535100; Thu, 12 Feb 2026 14:36:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXnp-00080G-1Q; Thu, 12 Feb 2026 14:36:21 +0000 Received: by outflank-mailman (input) for mailman id 1229095; Thu, 12 Feb 2026 14:36:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXnn-00080A-Nl for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 4vS9YXpMm3w7trPJOaVqDgu4c4qOBI7JMRSNhsTsqMwSHJ7RogBAJ5IavUGxBjmtu6lcixdgfjY6yVAntKzAVCR27ioqN3mlNCluJpwWXRJUECqAj6NkgkJgNnL7TEN3QcDNZjpU/PNFdDGx1xn8EXaChNs7HS6+lW2PYUpqxc2Sf7omPs4wenA2mrRu2d8/aP5i+sHMwiMsWnVu7aTM0vcGK1VdZO1jyjnDz2QRJucZXlhCZgDY7RR5BOFeCsGj58354riJoiJBCXDMHH5dZbG5aeN37H6YCSfeteh/CU3M8QN94WjLfebCsBlzUlgwZKESxjM6DN9tAhNWN/1zi3JE33g7YAy6f0twv+oLbOgjRGSme7IOIvezut+nthrdn8+DgQgZfmDFVHOz5HCKoCIdTcd2gA4RUZzDYPDocffL9kSoADKQfhS/V+VRFM+5 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 14:36:07.9140 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c0c829b-3a6d-4927-0187-08de6a440f4a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PR12MB9670 On Thu Feb 12, 2026 at 11:52 AM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> Introduces various optimisations that rely on constant folding, Value >> Range Propagation (VRP), and Dead Code Elimination (DCE) to aggressively >> eliminate code surrounding the uses of the function. >>=20 >> * For single-vendor+no-unknown-vendor builds returns a compile-time >> constant. >> * For all other cases it ANDs the result with the mask of compiled >> vendors, with the effect of performing DCE in switch cases, removing >> dead conditionals, etc. >>=20 >> It's difficult to reason about codegen in general in a project this big, >> but in this case the ANDed constant combines with the values typically >> checked against, folding into a comparison against zero. Thus, it's bett= er >> for codegen to AND its result with the desired compared-against vendor, >> rather than using (in)equality operators. That way the comparison is >> always against zero. >>=20 >> "cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON)" >>=20 >> turns into (cpu_vendor() & X86_VENDOR_AMD) in AMD-only builds (AND + >> cmp with zero). Whereas this... >>=20 >> "cpu_vendor() =3D=3D X86_VENDOR_AMD" >>=20 >> forces cpu_vendor() to be ANDed and then compared to a non-zero value. > > Coming back to this: How does the value compared against being zero or > non-zero matter here? As long as cpu_vendor() yields a compile-time > constant, the compiler should be able to leverage that for DCE? And Yes, for true single-vendor cases it doesn't matter. It matters on multiven= dor cases where some vendors are off and cpu_vendor() is not a constant. > even if it's not a compile time constant, bits masked off in principle > allow the compiler to leverage that, too. It may of course be that > even up-to-date compilers fall short of doing so. There might be some of that, but there's also a non-avoidable codegen hurdl= e unless you can tell the compiler your variable is a power of 2 or 0 in multivendor cases. cpu_vendor() =3D=3D X86_VENDOR_AMD, which expands to (boot_cpu_data.vendor & X86_ENABLED_VENDORS) =3D=3D X86_VENDOR_AMD, which e= xpands to (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_INTEL) =3D=3D X86_VEND= OR_AMD which produces a lot worse codegen, because now the compiler must AND the variable with the AMD|INTEL mask, and then compare to the AMD mask, whereas having & instead of =3D=3D means the compiler can simply do a comparison wi= th zero and call it a day (due to the masks being folded together). I tried creating unreachable paths in cpu_vendor() to assist the VRP pass in noticing the variable invariant, but it just doesn't. It doesn't seem to be sufficiently aggressive in range tracking. Bummer, because VRP is a very unobstrusive technique for DCE that could be great if we could reliably tea= ch it invariants we know are held by certain variables as part of their accessors= .. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:37:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:37:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229104.1535111 (Exim 4.92) (envelope-from ) id 1vqXpI-00004u-IV; Thu, 12 Feb 2026 14:37:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229104.1535111; Thu, 12 Feb 2026 14:37:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXpI-0008WQ-CM; Thu, 12 Feb 2026 14:37:52 +0000 Received: by outflank-mailman (input) for mailman id 1229104; Thu, 12 Feb 2026 14:37:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXpG-0008WI-F8 for xen-devel@lists.xenproject.org; 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Thu, 12 Feb 2026 06:37:38 -0800 (PST) MIME-Version: 1.0 References: <8ddb97095d8f7f4140e660d2ff13ec2ccc82cc62.1770826406.git.bertrand.marquis@arm.com> In-Reply-To: <8ddb97095d8f7f4140e660d2ff13ec2ccc82cc62.1770826406.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Thu, 12 Feb 2026 15:37:26 +0100 X-Gm-Features: AZwV_QhoAEZFgArmZCSkiRmg19U5O9SyYZ7iGDtS4Y4Q7uEda3KUzxIT8lCehoY Message-ID: Subject: Re: [PATCH v2 04/12] xen/arm: ffa: Add FF-A 1.2 endpoint memory access descriptors To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > FF-A 1.2 extends the endpoint memory access descriptor (EMAD) from > 16 to 32 bytes, adding implementation-defined (IMPDEF) fields and > reserved space. The MEM_SHARE path currently assumes the 1.1 EMAD > size and rejects the 1.2 layout. > > Add FF-A 1.2 EMAD support to MEM_SHARE: > - define ffa_mem_access_1_2 and store IMPDEF payload in ffa_shm_mem > - emit 1.2 EMADs to the SPMC for FF-A 1.2 guests, forwarding IMPDEF > - refactor header parsing into read_mem_transaction() for 1.0/1.1+ > - detect EMAD format by mem_access_size to allow 1.1 on 1.2 guests > > Export ffa_fw_version to build memory descriptors according to the > firware version to relay share memory requests and remove unused offset firmware > macros. > > Functional impact: MEM_SHARE supports FF-A 1.2 EMADs. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - export ffa_fw_version and use it to construct descriptors according to > firmware version > - remove unused offset macros > --- > xen/arch/arm/tee/ffa.c | 2 +- > xen/arch/arm/tee/ffa_private.h | 1 + > xen/arch/arm/tee/ffa_shm.c | 121 +++++++++++++++++++++++---------- > 3 files changed, 87 insertions(+), 37 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index 6de2b9f8ac8e..23e1f408485b 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -70,7 +70,7 @@ > #include "ffa_private.h" > > /* Negotiated FF-A version to use with the SPMC, 0 if not there or suppo= rted */ > -static uint32_t __ro_after_init ffa_fw_version; > +uint32_t __ro_after_init ffa_fw_version; > > /* Features supported by the SPMC or secure world when present */ > DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE); > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 58562d8e733c..ccef2f7631f6 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -436,6 +436,7 @@ struct ffa_ctx { > }; > > extern DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE); > +extern uint32_t __ro_after_init ffa_fw_version; > > extern struct list_head ffa_ctx_head; > extern rwlock_t ffa_ctx_list_rwlock; > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index adc7e645a1c7..070babce9627 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -30,6 +30,14 @@ struct ffa_mem_access { > uint64_t reserved; > }; > > +/* Endpoint memory access descriptor (FF-A 1.2) */ > +struct ffa_mem_access_1_2 { > + struct ffa_mem_access_perm access_perm; > + uint32_t region_offs; > + uint8_t impdef[16]; > + uint8_t reserved[8]; > +}; > + > /* Lend, donate or share memory transaction descriptor */ > struct ffa_mem_transaction_1_0 { > uint16_t sender_id; > @@ -55,25 +63,10 @@ struct ffa_mem_transaction_1_1 { > uint8_t reserved[12]; > }; > > -/* Calculate offset of struct ffa_mem_access from start of buffer */ > -#define MEM_ACCESS_OFFSET(access_idx) \ > - ( sizeof(struct ffa_mem_transaction_1_1) + \ > - ( access_idx ) * sizeof(struct ffa_mem_access) ) > - > -/* Calculate offset of struct ffa_mem_region from start of buffer */ > -#define REGION_OFFSET(access_count, region_idx) \ > - ( MEM_ACCESS_OFFSET(access_count) + \ > - ( region_idx ) * sizeof(struct ffa_mem_region) ) > - > -/* Calculate offset of struct ffa_address_range from start of buffer */ > -#define ADDR_RANGE_OFFSET(access_count, region_count, range_idx) \ > - ( REGION_OFFSET(access_count, region_count) + \ > - ( range_idx ) * sizeof(struct ffa_address_range) ) > - > /* > * The parts needed from struct ffa_mem_transaction_1_0 or struct > * ffa_mem_transaction_1_1, used to provide an abstraction of difference= in > - * data structures between version 1.0 and 1.1. This is just an internal > + * data structures between version 1.0 and 1.2. This is just an internal > * interface and can be changed without changing any ABI. > */ > struct ffa_mem_transaction_int { > @@ -92,6 +85,8 @@ struct ffa_shm_mem { > uint16_t sender_id; > uint16_t ep_id; /* endpoint, the one lending */ > uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ > + /* Endpoint memory access descriptor IMPDEF value (FF-A 1.2). */ > + uint64_t impdef[2]; > unsigned int page_count; > struct page_info *pages[]; > }; > @@ -297,16 +292,20 @@ static void init_range(struct ffa_address_range *ad= dr_range, > * This function uses the ffa_spmc tx buffer to transmit the memory tran= saction > * descriptor. > */ > -static int share_shm(struct ffa_shm_mem *shm) > +static int share_shm(struct ffa_shm_mem *shm, uint32_t ffa_vers) > { > const uint32_t max_frag_len =3D FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE; > struct ffa_mem_access *mem_access_array; > + struct ffa_mem_access_1_2 *mem_access_array_1_2; > struct ffa_mem_transaction_1_1 *descr; > struct ffa_address_range *addr_range; > struct ffa_mem_region *region_descr; > - const unsigned int region_count =3D 1; > uint32_t tot_len; > + uint32_t mem_access_size; > + uint32_t mem_access_offs; > + uint32_t region_offs; > paddr_t last_pa; > + uint32_t range_count; > unsigned int n; > paddr_t pa; > int32_t ret; > @@ -325,16 +324,35 @@ static int share_shm(struct ffa_shm_mem *shm) > descr->handle =3D shm->handle; > descr->mem_reg_attr =3D FFA_NORMAL_MEM_REG_ATTR; > descr->mem_access_count =3D 1; > - descr->mem_access_size =3D sizeof(*mem_access_array); > - descr->mem_access_offs =3D MEM_ACCESS_OFFSET(0); > + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > + mem_access_size =3D sizeof(struct ffa_mem_access_1_2); > + else > + mem_access_size =3D sizeof(struct ffa_mem_access); > + mem_access_offs =3D sizeof(struct ffa_mem_transaction_1_1); > + region_offs =3D mem_access_offs + mem_access_size; > + descr->mem_access_size =3D mem_access_size; > + descr->mem_access_offs =3D mem_access_offs; > > - mem_access_array =3D buf + descr->mem_access_offs; > - memset(mem_access_array, 0, sizeof(*mem_access_array)); > - mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > - mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > - mem_access_array[0].region_offs =3D REGION_OFFSET(descr->mem_access_= count, 0); > + if ( ffa_vers >=3D FFA_VERSION_1_2 ) > + { > + mem_access_array_1_2 =3D buf + mem_access_offs; > + memset(mem_access_array_1_2, 0, sizeof(*mem_access_array_1_2)); > + mem_access_array_1_2[0].access_perm.endpoint_id =3D shm->ep_id; > + mem_access_array_1_2[0].access_perm.perm =3D FFA_MEM_ACC_RW; > + mem_access_array_1_2[0].region_offs =3D region_offs; > + memcpy(mem_access_array_1_2[0].impdef, shm->impdef, > + sizeof(mem_access_array_1_2[0].impdef)); > + } > + else > + { > + mem_access_array =3D buf + mem_access_offs; > + memset(mem_access_array, 0, sizeof(*mem_access_array)); > + mem_access_array[0].access_perm.endpoint_id =3D shm->ep_id; > + mem_access_array[0].access_perm.perm =3D FFA_MEM_ACC_RW; > + mem_access_array[0].region_offs =3D region_offs; > + } > > - region_descr =3D buf + mem_access_array[0].region_offs; > + region_descr =3D buf + region_offs; > memset(region_descr, 0, sizeof(*region_descr)); > region_descr->total_page_count =3D shm->page_count; > > @@ -348,8 +366,9 @@ static int share_shm(struct ffa_shm_mem *shm) > region_descr->address_range_count++; > } > > - tot_len =3D ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, > - region_descr->address_range_count); > + range_count =3D region_descr->address_range_count; > + tot_len =3D region_offs + sizeof(*region_descr) + > + range_count * sizeof(struct ffa_address_range); > if ( tot_len > max_frag_len ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > @@ -445,6 +464,12 @@ static int read_mem_transaction(uint32_t ffa_vers, c= onst void *buf, size_t blen, > if ( size * count + offs > blen ) > return FFA_RET_INVALID_PARAMETERS; > > + if ( size < sizeof(struct ffa_mem_access) ) > + return FFA_RET_INVALID_PARAMETERS; > + > + if ( offs & 0xF ) > + return FFA_RET_INVALID_PARAMETERS; > + > trans->mem_reg_attr =3D mem_reg_attr; > trans->flags =3D flags; > trans->mem_access_size =3D size; > @@ -461,7 +486,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > uint64_t addr =3D get_user_reg(regs, 3); > uint32_t page_count =3D get_user_reg(regs, 4); > const struct ffa_mem_region *region_descr; > - const struct ffa_mem_access *mem_access; > + const struct ffa_mem_access_1_2 *mem_access; > struct ffa_mem_transaction_int trans; > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > @@ -471,9 +496,12 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs= ) > register_t handle_hi =3D 0; > register_t handle_lo =3D 0; > int ret =3D FFA_RET_DENIED; > + uint32_t ffa_vers; > uint32_t range_count; > uint32_t region_offs; > uint16_t dst_id; > + uint8_t perm; > + uint64_t impdef[2]; > > if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) > { > @@ -512,8 +540,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > if ( frag_len > tx_size ) > goto out_unlock; > > - ret =3D read_mem_transaction(ACCESS_ONCE(ctx->guest_vers), tx_buf, > - frag_len, &trans); > + ffa_vers =3D ACCESS_ONCE(ctx->guest_vers); > + ret =3D read_mem_transaction(ffa_vers, tx_buf, frag_len, &trans); > if ( ret ) > goto out_unlock; > > @@ -542,13 +570,35 @@ void ffa_handle_mem_share(struct cpu_user_regs *reg= s) > goto out_unlock; > } > > + if ( trans.mem_access_size < sizeof(struct ffa_mem_access) ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out_unlock; > + } > + > /* Check that it fits in the supplied data */ > if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) > goto out_unlock; > > mem_access =3D tx_buf + trans.mem_access_offs; > - > dst_id =3D ACCESS_ONCE(mem_access->access_perm.endpoint_id); > + perm =3D ACCESS_ONCE(mem_access->access_perm.perm); > + region_offs =3D ACCESS_ONCE(mem_access->region_offs); > + > + /* > + * FF-A 1.2 introduced an extended mem_access descriptor with impdef > + * fields, but guests can still use the 1.1 format if they don't nee= d > + * implementation-defined data. Detect which format is used based on > + * the mem_access_size field rather than the negotiated FF-A version= . > + */ > + if ( trans.mem_access_size >=3D sizeof(struct ffa_mem_access_1_2) ) > + memcpy(impdef, mem_access->impdef, sizeof(impdef)); > + else > + { > + impdef[0] =3D 0; > + impdef[1] =3D 0; > + } > + > if ( !FFA_ID_IS_SECURE(dst_id) ) > { > /* we do not support sharing with VMs */ > @@ -556,13 +606,11 @@ void ffa_handle_mem_share(struct cpu_user_regs *reg= s) > goto out_unlock; > } > > - if ( ACCESS_ONCE(mem_access->access_perm.perm) !=3D FFA_MEM_ACC_RW ) > + if ( perm !=3D FFA_MEM_ACC_RW ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > goto out_unlock; > } > - > - region_offs =3D ACCESS_ONCE(mem_access->region_offs); > if ( sizeof(*region_descr) + region_offs > frag_len ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > @@ -587,6 +635,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > } > shm->sender_id =3D trans.sender_id; > shm->ep_id =3D dst_id; > + memcpy(shm->impdef, impdef, sizeof(shm->impdef)); > > /* > * Check that the Composite memory region descriptor fits. > @@ -602,7 +651,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs) > if ( ret ) > goto out; > > - ret =3D share_shm(shm); > + ret =3D share_shm(shm, ffa_fw_version); > if ( ret ) > goto out; > > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:40:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:40:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229115.1535121 (Exim 4.92) (envelope-from ) id 1vqXrT-0001da-2p; Thu, 12 Feb 2026 14:40:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229115.1535121; Thu, 12 Feb 2026 14:40:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXrS-0001dT-U7; Thu, 12 Feb 2026 14:40:06 +0000 Received: by outflank-mailman (input) for mailman id 1229115; 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Thu, 12 Feb 2026 06:40:03 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Thu, 12 Feb 2026 15:39:51 +0100 X-Gm-Features: AZwV_QgI9DMUe8oOKn84WovEZj87WwTVaaQmHE3bYBcWwG5w8FoXjOz2U_773Jc Message-ID: Subject: Re: [PATCH v2 07/12] xen/arm: ffa: Fix RXTX_UNMAP ownership race To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > rxtx_unmap() checks RX ownership without holding the RX/TX locks and > only enforces the ownership rule when FFA_RX_ACQUIRE is supported. This > allows a vCPU to acquire RX between the check and unmap, and it lets > RXTX_UNMAP proceed while RX is owned when buffers are not forwarded to > firmware. > > Hold rx_lock/tx_lock across the ownership check and unmap, and deny > RXTX_UNMAP whenever RX is owned, independent of RX_ACQUIRE support. For > teardown, release RX ownership under the same lock window; use > FFA_RX_RELEASE directly because rx_lock is held, and clear the local > flag when the firmware path is unavailable. > > Functional impact: RXTX_UNMAP now reliably returns DENIED while RX is > owned, and teardown releases/clears ownership without a race. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - Remove marking rx buffer as free during teardown as it is useless > - Add a comment when calling rxtx_unmap during teardown to remind code > readers that true is for teardown mode > --- > xen/arch/arm/tee/ffa_rxtx.c | 32 +++++++++++++++++++++++++++++--- > 1 file changed, 29 insertions(+), 3 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c > index eff95a7955d7..c4fc4c4934af 100644 > --- a/xen/arch/arm/tee/ffa_rxtx.c > +++ b/xen/arch/arm/tee/ffa_rxtx.c > @@ -220,7 +220,7 @@ err_unlock_rxtx: > return ret; > } > > -static int32_t rxtx_unmap(struct domain *d) > +static int32_t rxtx_unmap(struct domain *d, bool teardown) > { > struct ffa_ctx *ctx =3D d->arch.tee; > int32_t ret =3D FFA_RET_OK; > @@ -234,6 +234,32 @@ static int32_t rxtx_unmap(struct domain *d) > goto err_unlock_rxtx; > } > > + if ( !ctx->rx_is_free ) > + { > + if ( teardown ) > + { > + if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) > + { > + int32_t rel_ret; > + > + /* Can't use ffa_rx_release() while holding rx_lock. */ > + rel_ret =3D ffa_simple_call(FFA_RX_RELEASE, ctx->ffa_id, > + 0, 0, 0); > + if ( rel_ret ) > + gdprintk(XENLOG_DEBUG, > + "ffa: RX release during teardown failed: %d= \n", > + rel_ret); > + } > + } > + else > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: RXTX_UNMAP denied, RX buffer owned by VM\n"); > + ret =3D FFA_RET_DENIED; > + goto err_unlock_rxtx; > + } > + } > + > if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) ) > { > ret =3D ffa_rxtx_unmap(ffa_get_vm_id(d)); > @@ -261,7 +287,7 @@ err_unlock_rxtx: > > int32_t ffa_handle_rxtx_unmap(void) > { > - return rxtx_unmap(current->domain); > + return rxtx_unmap(current->domain, false); > } > > int32_t ffa_rx_acquire(struct ffa_ctx *ctx, void **buf, size_t *buf_size= ) > @@ -369,7 +395,7 @@ int32_t ffa_rxtx_domain_init(struct domain *d) > > void ffa_rxtx_domain_destroy(struct domain *d) > { > - rxtx_unmap(d); > + rxtx_unmap(d, true /* teardown */); > } > > void *ffa_rxtx_spmc_rx_acquire(void) > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:43:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:43:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229127.1535129 (Exim 4.92) (envelope-from ) id 1vqXuO-0002GK-E0; Thu, 12 Feb 2026 14:43:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229127.1535129; Thu, 12 Feb 2026 14:43:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXuO-0002GC-BB; Thu, 12 Feb 2026 14:43:08 +0000 Received: by outflank-mailman (input) for mailman id 1229127; Thu, 12 Feb 2026 14:43:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXuN-0002G6-G8 for xen-devel@lists.xenproject.org; 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Thu, 12 Feb 2026 06:43:03 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Thu, 12 Feb 2026 15:42:52 +0100 X-Gm-Features: AZwV_Qg1llTUgkAa7Rqj4ful2P_gxsUqKr43vL-NKJaZbYr_RswNIAUV5FJG3eM Message-ID: Subject: Re: [PATCH v2 08/12] xen/arm: ffa: Fix FFA_FEATURES validation To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > FFA_FEATURES advertises several ABIs unconditionally, even when firmware > support is missing or when the ABI is physical-instance-only. This can > mislead guests about what Xen can actually provide and violates FF-A > calling conventions. Some SPMCs (Hafnium v2.14 or earlier) also fail to > report FFA_RX_ACQUIRE despite supporting it. > > Update FFA_FEATURES validation to match spec and firmware support: > - do no check w2-w7 input registers during FFA_FEATURES as they are > flagged Should Be Zero by the FF-A specification or are not used by > the calls we support. > - reject 64-bit calling conventions from 32-bit guests with NOT_SUPPORTED > - return NOT_SUPPORTED for physical-instance-only ABIs > (FFA_NOTIFICATION_BITMAP_{CREATE,DESTROY}, FFA_RX_ACQUIRE) > - advertise FFA_INTERRUPT as supported > - gate message ABIs on firmware support: > - FFA_MSG_SEND_DIRECT_REQ_{32,64} > - FFA_MSG_SEND_DIRECT_REQ2 (also requires FF-A 1.2 negotiation) > - FFA_MSG_SEND2 (or VM-to-VM enabled) > - report MEM_SHARE_{32,64} only when FFA_MEM_SHARE_64 is supported > - stop advertising FFA_MSG_YIELD (not implemented) > > Update firmware probing: drop FFA_MEM_SHARE_32 checks (deprecated) and > add FFA_RX_ACQUIRE to the probed set. If FFA_MSG_SEND2 is reported but > FFA_RX_ACQUIRE is not, assume RX_ACQUIRE support and warn to work > around the Hafnium bug. > > Functional impact: guests now see ABI support that reflects firmware > capabilities and Xen implementation status. When SEND2 is present but > RX_ACQUIRE is not reported, Xen assumes RX_ACQUIRE support. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - remove completely w2-w7 checking as those are SBZ in the spec or > unused by xen > --- > xen/arch/arm/tee/ffa.c | 63 +++++++++++++++++++++++++++++++++--------- > 1 file changed, 50 insertions(+), 13 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index 23e1f408485b..cb8cd95fdafa 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -91,10 +91,10 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = =3D { > FW_ABI(FFA_PARTITION_INFO_GET), > FW_ABI(FFA_NOTIFICATION_INFO_GET_64), > FW_ABI(FFA_NOTIFICATION_GET), > + FW_ABI(FFA_RX_ACQUIRE), > FW_ABI(FFA_RX_RELEASE), > FW_ABI(FFA_RXTX_MAP_64), > FW_ABI(FFA_RXTX_UNMAP), > - FW_ABI(FFA_MEM_SHARE_32), > FW_ABI(FFA_MEM_SHARE_64), > FW_ABI(FFA_MEM_RECLAIM), > FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32), > @@ -238,21 +238,30 @@ static void handle_features(struct cpu_user_regs *r= egs) > uint32_t a1 =3D get_user_reg(regs, 1); > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > - unsigned int n; > > - for ( n =3D 2; n <=3D 7; n++ ) > + /* > + * FFA_FEATURES defines w2 as input properties only for specific > + * function IDs and reserves w3-w7 as SBZ. Xen does not currently > + * implement any feature that consumes w2, so ignore extra inputs. > + */ > + if ( !is_64bit_domain(d) && smccc_is_conv_64(a1) ) > { > - if ( get_user_reg(regs, n) ) > - { > - ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > - return; > - } > + /* 32bit guests should only use 32bit convention calls */ > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + return; > } > > switch ( a1 ) > { > + case FFA_NOTIFICATION_BITMAP_CREATE: > + case FFA_NOTIFICATION_BITMAP_DESTROY: > + case FFA_RX_ACQUIRE: > + /* Physical-instance-only ABIs are not exposed to VMs. */ > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > case FFA_ERROR: > case FFA_VERSION: > + case FFA_INTERRUPT: > case FFA_SUCCESS_32: > case FFA_SUCCESS_64: > case FFA_FEATURES: > @@ -261,16 +270,25 @@ static void handle_features(struct cpu_user_regs *r= egs) > case FFA_RXTX_UNMAP: > case FFA_MEM_RECLAIM: > case FFA_PARTITION_INFO_GET: > + ffa_set_regs_success(regs, 0, 0); > + break; > case FFA_MSG_SEND_DIRECT_REQ_32: > case FFA_MSG_SEND_DIRECT_REQ_64: > - case FFA_MSG_SEND2: > case FFA_RUN: > - case FFA_INTERRUPT: > - case FFA_MSG_YIELD: > - ffa_set_regs_success(regs, 0, 0); > + if ( ffa_fw_supports_fid(a1) ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > + case FFA_MSG_SEND2: > + if ( ffa_fw_supports_fid(a1) || IS_ENABLED(CONFIG_FFA_VM_TO_VM) = ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_MSG_SEND_DIRECT_REQ2: > - if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > + if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 && > + ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ2) ) > { > ffa_set_regs_success(regs, 0, 0); > } > @@ -281,6 +299,11 @@ static void handle_features(struct cpu_user_regs *re= gs) > break; > case FFA_MEM_SHARE_64: > case FFA_MEM_SHARE_32: > + if ( !ffa_fw_supports_fid(FFA_MEM_SHARE_64) ) > + { > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > + } > /* > * We currently don't support dynamically allocated buffers. Rep= ort > * that with 0 in bit[0] of w2. > @@ -688,6 +711,20 @@ static bool ffa_probe_fw(void) > ffa_fw_abi_needed[i].name); > } > > + /* > + * Hafnium v2.14 or earlier does not report FFA_RX_ACQUIRE in > + * FFA_FEATURES even though it supports it. > + */ > + if ( !ffa_fw_supports_fid(FFA_RX_ACQUIRE) && > + ffa_fw_supports_fid(FFA_MSG_SEND2) ) > + { > + printk(XENLOG_WARNING > + "ARM FF-A Firmware reports FFA_MSG_SEND2 without FFA_RX_A= CQUIRE\n"); > + printk(XENLOG_WARNING > + "ffa: assuming RX_ACQUIRE support (workaround)\n"); > + set_bit(FFA_ABI_BITNUM(FFA_RX_ACQUIRE), ffa_fw_abi_supported); > + } > + > if ( !ffa_rxtx_spmc_init() ) > { > printk(XENLOG_ERR "ffa: Error during RXTX buffer init\n"); > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:45:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229137.1535140 (Exim 4.92) (envelope-from ) id 1vqXwe-0002oH-RW; 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Thu, 12 Feb 2026 06:45:24 -0800 (PST) MIME-Version: 1.0 References: <4fa6736cbe35b060cf34b2978bbf9b3481d9266a.1770826406.git.bertrand.marquis@arm.com> In-Reply-To: <4fa6736cbe35b060cf34b2978bbf9b3481d9266a.1770826406.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Thu, 12 Feb 2026 15:45:12 +0100 X-Gm-Features: AZwV_QgOut5rCLJNUhhFg5tR5m71EHGai87vMWyWZN1fOx7VKE5YuNQZWPVD29o Message-ID: Subject: Re: [PATCH v2 11/12] xen/arm: ffa: Add MEM_SHARE page diagnostics To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > MEM_SHARE failures in get_shm_pages() are silent, which makes malformed > ranges and page mapping failures hard to diagnose. > > Add debug logging for page validation failures: > - descriptor validation failures (unaligned, range short/overflow) > - per-page mapping failures (unmapped GFN, wrong p2m type) > - address overflow detection in range walks > > Ratelimit temporary reclaim failures and log permanent reclaim failures > as errors. > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - use one print per error case instead of the previous system using > variables to classify and a single print site. > --- > xen/arch/arm/tee/ffa_shm.c | 39 +++++++++++++++++++++++++++++++++++--- > 1 file changed, 36 insertions(+), 3 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c > index 070babce9627..3d61caaeba78 100644 > --- a/xen/arch/arm/tee/ffa_shm.c > +++ b/xen/arch/arm/tee/ffa_shm.c > @@ -161,32 +161,62 @@ static int32_t get_shm_pages(struct domain *d, stru= ct ffa_shm_mem *shm, > addr =3D ACCESS_ONCE(range[n].address); > > if ( !IS_ALIGNED(addr, FFA_PAGE_SIZE) ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: unaligned range %u a= ddress %#lx\n", > + n, (unsigned long)addr); > return FFA_RET_INVALID_PARAMETERS; > + } > > for ( m =3D 0; m < page_count; m++ ) > { > if ( pg_idx >=3D shm->page_count ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: range overflow r= g %u pg %u\n", > + n, m); > return FFA_RET_INVALID_PARAMETERS; > + } > > if ( !ffa_safe_addr_add(addr, m) ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: addr overflow rg= %u pg %u base %#lx\n", > + n, m, (unsigned long)addr); > return FFA_RET_INVALID_PARAMETERS; > + } > > gaddr =3D addr + m * FFA_PAGE_SIZE; > gfn =3D gaddr_to_gfn(gaddr); > shm->pages[pg_idx] =3D get_page_from_gfn(d, gfn_x(gfn), &t, > P2M_ALLOC); > if ( !shm->pages[pg_idx] ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: gfn unmapped rg = %u pg %u addr %#lx\n", > + n, m, (unsigned long)gaddr); > return FFA_RET_DENIED; > + } > /* Only normal RW RAM for now */ > if ( t !=3D p2m_ram_rw ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: p2m type %u rg %= u pg %u addr %#lx\n", > + t, n, m, (unsigned long)gaddr); > return FFA_RET_DENIED; > + } > pg_idx++; > } > } > > /* The ranges must add up */ > if ( pg_idx < shm->page_count ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: mem share pages invalid: range short pg %u\n", > + pg_idx); > return FFA_RET_INVALID_PARAMETERS; > + } > > return FFA_RET_OK; > } > @@ -741,8 +771,10 @@ bool ffa_shm_domain_destroy(struct domain *d) > * A temporary error that may get resolved a bit later, it's > * worth retrying. > */ > - printk(XENLOG_G_INFO "%pd: ffa: Failed to reclaim handle %#l= x : %d\n", > - d, shm->handle, res); > + if ( printk_ratelimit() ) > + printk(XENLOG_G_WARNING > + "%pd: ffa: Failed to reclaim handle %#lx : %d\n", > + d, shm->handle, res); > break; /* We will retry later */ > default: > /* > @@ -754,7 +786,8 @@ bool ffa_shm_domain_destroy(struct domain *d) > * FFA_RET_NO_MEMORY might be a temporary error as it it cou= ld > * succeed if retried later, but treat it as permanent for n= ow. > */ > - printk(XENLOG_G_INFO "%pd: ffa: Permanent failure to reclaim= handle %#lx : %d\n", > + printk(XENLOG_G_ERR > + "%pd: ffa: Permanent failure to reclaim handle %#lx := %d\n", > d, shm->handle, res); > > /* > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229151.1535150 (Exim 4.92) (envelope-from ) id 1vqXxd-0003Lc-7l; Thu, 12 Feb 2026 14:46:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229151.1535150; Thu, 12 Feb 2026 14:46:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXxd-0003LV-4a; Thu, 12 Feb 2026 14:46:29 +0000 Received: by outflank-mailman (input) for mailman id 1229151; Thu, 12 Feb 2026 14:46:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXxb-0003LH-BZ for xen-devel@lists.xenproject.org; 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Patches 4 and 5 introduce some Cirrus-CI testing to do cross-builds from macOS, plus it also introduces some basic smoke testing of the x86 builds using the XTF selftest, just like it's currently done for the FreeBSD builds. A result of the updated Cirrus-CI pipeline can be seen at: https://cirrus-ci.com/build/6723050642604032 Thanks, Roger. Roger Pau Monne (5): xen/x86: always consider '/' as a division in assembly xen/tools: remove usages of `stat -c` in check-endbr.sh xen/tools: fix grep reporting 'illegal byte sequence' in check-endbr.sh cirrus-ci: add x86 and arm64 macOS hypervisor builds cirrus-ci: add x86 XTF self-tests for macOS build .cirrus.yml | 51 ++++++++++++++++++++++++++++++++++------ xen/arch/x86/arch.mk | 5 ++++ xen/tools/check-endbr.sh | 18 +++++++------- 3 files changed, 58 insertions(+), 16 deletions(-) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229152.1535160 (Exim 4.92) (envelope-from ) id 1vqXxf-0003ad-F1; Thu, 12 Feb 2026 14:46:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229152.1535160; Thu, 12 Feb 2026 14:46:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXxf-0003aV-C1; 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From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 1/5] xen/x86: always consider '/' as a division in assembly Date: Thu, 12 Feb 2026 15:46:14 +0100 Message-ID: <20260212144618.43200-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260212144618.43200-1-roger.pau@citrix.com> References: <20260212144618.43200-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MA3P292CA0029.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:47::16) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|CH5PR03MB7838:EE_ X-MS-Office365-Filtering-Correlation-Id: 3adfb911-633b-44f0-8a4e-08de6a457fbb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aWF4Q2NsbXpocmk0NklDSm9XVFlHanVrS2cvSlhXcWVoNGRoY25ZVUJhMEU5?= =?utf-8?B?QnZ5TWExTi85Sm1yU1ArNjJXekIyK2NCY3A0SmthWDZuMGo4Q1dPZlNkU2Vo?= =?utf-8?B?bXA4MW4yRVhYSFBFT0l3N3NTeC8zN09LYU5wS0hSZllqTHRkN3pQSFQ0bVA1?= =?utf-8?B?NUFSOE50d3VNT0tYNW5GV0hiYVoxeFZkd2dWSE9UOStJa0lOc3hNaHFzSFdY?= =?utf-8?B?bVpkSTFjNXlwYkVwbWdxcm43d1JBZ1RnZFFIYVF1N3ZvVDNyTndJSS9xM0JY?= =?utf-8?B?VjgxY09HQ3hORmh2ZFZzeUwxNHBqUm9Nc0FaRXV5TnViZ29lTVpNTHZWOHhT?= =?utf-8?B?NXJuOGEyTnRiRTZ2TWRqUElKTERKT05Ia2xDZWtwZGhlN3ZBZ3hUS0gzVXk4?= =?utf-8?B?QkRUU1ZveEdXTkF4K2VSSGFRZGRqUDdldmhaY3pzdlFNSVNjQ2tMekRLK0lS?= =?utf-8?B?TFJuK2U3b2dvdklkNFZUcXZOYXNEdEY2dmlBSmt0S3lWQ25aZ3BZR3pkK0ZE?= =?utf-8?B?c0tYL0V0cWhHVFE5aHRRVXRibzB1a2dFM09FQzFJOGpNSGt1anNMWGlyb1ZW?= =?utf-8?B?NEtTQ1NiSkdHZWR3S3g3UENsRnVvUFFqazlvWEUzS2wyd2FVSHZoL28vT1o4?= =?utf-8?B?eWd0RFQyYlFib2lpS000ZHdLMzBQR3pvZGZ4NzBZWTdqL0d3K0orZUpETkJh?= =?utf-8?B?TnQxR1Q1Y3FpckZvY3krNVE1TEhnYkRiMUl6STY4Y3VNeW4zOEdQYUlGRkVU?= =?utf-8?B?RHFRa3c2VVdhNVpMMlZUcStxU25RQS9sMWV0UDFVSUMzeWxwZGNKSkI0NUJk?= =?utf-8?B?WmhJUnRRdktuRUQ3ZG5VWjMzL2lWNmVPbkJGQ2d4Y01lQkQ2MFI2QnNSQWxu?= =?utf-8?B?N3QvekNxYTlkR3JEc2FsSkZGQys1eTZ4bnppbm9LekV2dGs2STdwdHBPZjF5?= =?utf-8?B?ckN5SEpCU01KNkl5MDJKckRBZWhyMXBBVFNUaUJaUmMzeTNWRmlkRFBrdUN4?= =?utf-8?B?YW14dkVPUlNNdjVPN0JPS0Z0MVVyd29yUkxaK3FNalNJYzY2LzBEMzk5WTVx?= =?utf-8?B?VDNNWGRBbGk0ZnFXckExUUVEQmw5dDJrMGxOK0ZhZkZzRE5OL1VwUDIzWEVI?= =?utf-8?B?ZU1TK1FUZXVianRHeldsN3NzMDFseHFBZnBMVnQxU0pKTXk2citTQmxNeXN3?= =?utf-8?B?Ulh0VWlzdkJ1N1NGVHo5cUQ1K2I4WGg0bjAzdnRtZU52RllUUU8vVnQwYlFG?= =?utf-8?B?dU1CQ0VGUjI2bFFwelRHdkR6cGZuSVFheGFWQzNpVzd1Ukc1a2tBZFRiR0lE?= =?utf-8?B?QWNLV3M1aXZ2ZGRZTnFqZ2VzNjlycTFoV05CcjU0QlhrWVdFcHBvSHZ2dGRC?= =?utf-8?B?NFJ4ajhMUG9qVnpDSkJ4ZVJkZXN1dzNxcjhZL21yT2UyOVduOTdrQ2NJQ1FH?= =?utf-8?B?bnRkdVpjcGVXVFlJYUg4MURrWWFnbmpCdUFpenpKWWFVcXpkNjkxckVNb3gr?= =?utf-8?B?b0JHTjZteUcwZkJpZXdjNVUvOWhZUXlFaUY5MUhjSFEyL1ZqMTdBOE9JTWhs?= =?utf-8?B?YzJtNU9OSCtWT0FydDYwUk40NjdWUFNlcm8vYzBnOVlQaTRDQi9nN1pBeWVm?= =?utf-8?B?Mkd0QldyQWFMdmtsdFB2WDR3eFFoZUR5SUpRU1JzR3FIZkZ2QllqSEhNUmc3?= =?utf-8?B?QzJrTmJKQ3I3S25vbmV6bHVPNi9CZWhrRG1RSkNxUmYrNk1OcGJEWGJnVE5Z?= =?utf-8?B?VEcyd1NOS2hMTm1PeDFEaDhWbzczNlhsQjk4SU1kMUlDT2ExeXIvMkk0MGpB?= =?utf-8?B?cU5LWWg0R3pQMlorZUV2eW1oL0V2MFZiejRGeU4veHlUaWhTYjVZNy85Ri8v?= =?utf-8?B?ZFVnb2pBZVNJSUQvMUY1WTM4QTBHaEw2dTJvVjIzeFJqVlhsUXZhZGtyUnZJ?= =?utf-8?B?aWVCY0kwQk1xWS9jYUZlajllY0pBMjVhTy93Wk8vWjR3YnJkYkE5OFlTSHZy?= =?utf-8?B?cTRWZmlWQnFnMExrYnRUMDhJK2MzVzIzZjluVm5lQXBjNHR1a3pqOTcyUHJa?= =?utf-8?B?NDU4bVZQOGNZUy95RzZkcGcweVNhUkJiQVhweHBzZTNGT2h2UnNPTlQrNld0?= =?utf-8?Q?ZVIk=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(376014)(366016);DIR:OUT;SFP:1101; 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This is incorrect with Xen's usage, which does use '/' in assembly files as a mathematical operator. The behavior of the assembler can be altered by passing the --divide option; unconditionally pass this option when available to force the expected behavior. Reported-by: Jan Beulich Signed-off-by: Roger Pau Monné --- Changes since v1: - Move option add to x86 specific makefile. --- xen/arch/x86/arch.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 0203138a819a..2e06ae2582dc 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -123,3 +123,8 @@ endif # Set up the assembler include path properly for older toolchains. CFLAGS += -Wa,-I$(objtree)/include -Wa,-I$(srctree)/include + +# The GNU assembler will interpret '/' as a comment start marker instead of a +# divide for some ELF targets. Pass --divide when when available to signal '/' +# is always used as an operator in assembly. +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--divide) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229153.1535170 (Exim 4.92) (envelope-from ) id 1vqXxg-0003oq-OB; Thu, 12 Feb 2026 14:46:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229153.1535170; Thu, 12 Feb 2026 14:46:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXxg-0003of-KD; Thu, 12 Feb 2026 14:46:32 +0000 Received: by outflank-mailman (input) for mailman id 1229153; Thu, 12 Feb 2026 14:46:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXxf-0003LH-Vk for xen-devel@lists.xenproject.org; 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mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/Neh6QaVEtW9q3mlfrOk5GxOs2RNXIp81nmsab9QjLs=; b=iHAuGoPwCLPoXenWgigi2WM2oaF3g6eYhXNwdMh+/BpNY/fsY3EgKIl11bEqJv74H7jC1P/OWnNwPTjQYiJ0MeC/QVWRfkRaht8cuvAAcl0S74nciVPc641cyfvckhmOTkGEmqWdw3KzX8fDRs4S9swzmir80ZSaQ+YjPNFHiec= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , Stefano Stabellini , Bertrand Marquis Subject: [PATCH v2 2/5] xen/tools: remove usages of `stat -c` in check-endbr.sh Date: Thu, 12 Feb 2026 15:46:15 +0100 Message-ID: <20260212144618.43200-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260212144618.43200-1-roger.pau@citrix.com> References: <20260212144618.43200-1-roger.pau@citrix.com> Content-Type: text/plain; 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The first instance of `stat -c` can be removed by fetching the section size from the output of objdump itself, which the script already parses to get the VMA values. The other two instances can be replaced by counting the lines in the respective files. Those files contain list of addresses, so the size in bytes is not strictly needed, we can count the number of lines instead. Suggested-by: Bertrand Marquis Signed-off-by: Roger Pau Monné Acked-by: Bertrand Marquis --- Changes since v1: - Use $(()) to convert from hex to decimal. --- xen/tools/check-endbr.sh | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/xen/tools/check-endbr.sh b/xen/tools/check-endbr.sh index bf153a570db4..aaaa9ebe6bd7 100755 --- a/xen/tools/check-endbr.sh +++ b/xen/tools/check-endbr.sh @@ -92,14 +92,13 @@ ${OBJDUMP} -j .text $1 -d -w | grep ' endbr64 *$' | cut -f 1 -d ':' > $VALID & # check nevertheless. # eval $(${OBJDUMP} -j .text $1 -h | - $AWK '$2 == ".text" {printf "vma_hi=%s\nvma_lo=%s\n", substr($4, 1, 9), substr($4, 10, 16)}') + $AWK '$2 == ".text" {printf "bin_sz=%s\nvma_hi=%s\nvma_lo=%s\n", "0x" $3, substr($4, 1, 9), substr($4, 10, 16)}') -${OBJCOPY} -j .text $1 -O binary $TEXT_BIN - -bin_sz=$(stat -c '%s' $TEXT_BIN) -[ "$bin_sz" -ge $(((1 << 28) - $vma_lo)) ] && +[ "$(($bin_sz))" -ge $(((1 << 28) - $vma_lo)) ] && { echo "$MSG_PFX Error: .text offsets must not exceed 256M" >&2; exit 1; } +${OBJCOPY} -j .text $1 -O binary $TEXT_BIN + # instruction: hex: oct: # endbr64 f3 0f 1e fa 363 017 036 372 # endbr32 f3 0f 1e fb 363 017 036 373 @@ -116,8 +115,8 @@ fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > wait # Sanity check $VALID and $ALL, in case the string parsing bitrots -val_sz=$(stat -c '%s' $VALID) -all_sz=$(stat -c '%s' $ALL) +val_sz=$(wc -l < $VALID) +all_sz=$(wc -l < $ALL) [ "$val_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty valid-addrs" >&2; exit 1; } [ "$all_sz" -eq 0 ] && { echo "$MSG_PFX Error: Empty all-addrs" >&2; exit 1; } [ "$all_sz" -lt "$val_sz" ] && { echo "$MSG_PFX Error: More valid-addrs than all-addrs" >&2; exit 1; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229154.1535181 (Exim 4.92) (envelope-from ) id 1vqXxm-00049R-5U; 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The binary encoding used by the grep matching pattern is not valid when processed as UTF-8. Switch the local to C just for the grep invocation to use the binary match pattern correctly. Suggested-by: Bertrand Marquis Signed-off-by: Roger Pau Monné Reviewed-by: Bertrand Marquis --- xen/tools/check-endbr.sh | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/tools/check-endbr.sh b/xen/tools/check-endbr.sh index aaaa9ebe6bd7..9346fe95c791 100755 --- a/xen/tools/check-endbr.sh +++ b/xen/tools/check-endbr.sh @@ -107,8 +107,9 @@ if $perl_re then LC_ALL=C grep -aobP '\xf3\x0f\x1e(\xfa|\xfb)|\x66\x0f\x1f\x01' $TEXT_BIN else - grep -aob -e "$(printf '\363\17\36\372')" -e "$(printf '\363\17\36\373')" \ - -e "$(printf '\146\17\37\1')" $TEXT_BIN + LC_ALL=C grep -aob -e "$(printf '\363\17\36\372')" \ + -e "$(printf '\363\17\36\373')" \ + -e "$(printf '\146\17\37\1')" $TEXT_BIN fi | $AWK -F':' '{printf "%s%07x\n", "'$vma_hi'", int('$((0x$vma_lo))') + $1}' > $ALL # Wait for $VALID to become complete -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229155.1535189 (Exim 4.92) (envelope-from ) id 1vqXxn-0004OO-Bz; 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Thu, 12 Feb 2026 06:46:33 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Thu, 12 Feb 2026 15:46:21 +0100 X-Gm-Features: AZwV_QjEdI2-za8UIiLcMsNddFXfzchzJxx4MlgMROAMdBQ_0PUzMzl7tXN62_8 Message-ID: Subject: Re: [PATCH v2 12/12] xen/arm: ffa: Add message parameter diagnostics To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 11, 2026 at 6:16=E2=80=AFPM Bertrand Marquis wrote: > > MSG_SEND2 and direct request validation failures are silent, making it > hard to diagnose invalid IDs, oversized messages, or unsupported > destination types. > > Add debug logs for parameter validation failures: > - invalid endpoint IDs > - oversized messages > - unsupported destination types > - invalid sender/receiver combinations > - ratelimit MSG_SEND2 busy failures to avoid log flooding > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - add a comment to explain ratelimit for BUSY in send2 > --- > xen/arch/arm/tee/ffa_msg.c | 49 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c > index 928f269f6c3a..1eadc62870f2 100644 > --- a/xen/arch/arm/tee/ffa_msg.c > +++ b/xen/arch/arm/tee/ffa_msg.c > @@ -4,6 +4,7 @@ > */ > > #include > +#include > #include > #include > > @@ -100,6 +101,7 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > if ( !ffa_fw_supports_fid(fid) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: direct req fid %#x not supported\n"= , fid); > goto out; > } > > @@ -108,6 +110,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > (src_dst & GENMASK(15,0)) =3D=3D ffa_get_vm_id(d) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: direct req invalid src/dst %#x\n", > + (uint32_t)src_dst); > goto out; > } > > @@ -115,6 +120,9 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_r= egs *regs, uint32_t fid) > if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, > + "ffa: direct req to non-secure dst %#x\n", > + (uint32_t)(src_dst & GENMASK(15, 0))); > goto out; > } > > @@ -166,7 +174,12 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, con= st void *src_buf, > /* This is also checking that dest is not src */ > ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > if ( ret ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 lookup failed: dst %#x ret %d\n", > + dst_id, ret); > return ret; > + } > > /* This also checks that destination has set a Rx buffer */ > ret =3D ffa_rx_acquire(dst_ctx , &rx_buf, &rx_size); > @@ -199,6 +212,16 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, con= st void *src_buf, > /* receiver rx buffer will be released by the receiver*/ > > out_unlock: > + if ( ret ) > + { > + /** > + * Always print other errors than BUSY but ratelimit BUSY prints > + * to prevent large number of prints when sender retries on BUSY= . > + */ > + if ( ret !=3D FFA_RET_BUSY || printk_ratelimit() ) > + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to %#x failed: %d\n", > + dst_id, ret); > + } > rcu_unlock_domain(dst_d); > if ( !ret ) > ffa_raise_rx_buffer_full(dst_d); > @@ -226,7 +249,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *r= egs) > > ret =3D ffa_tx_acquire(src_ctx, &tx_buf, &tx_size); > if ( ret !=3D FFA_RET_OK ) > + { > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 TX acquire failed: %d\n", ret); > return ret; > + } > > /* create a copy of the message header */ > memcpy(&src_msg, tx_buf, sizeof(src_msg)); > @@ -238,6 +265,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > dst_id =3D=3D ffa_get_vm_id(src_d) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid src/dst src %#x dst %#x\n", > + src_id, dst_id); > goto out; > } > > @@ -246,6 +276,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > if (src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1)) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_offset %u (v1.1)\n", > + src_msg.msg_offset); > goto out; > } > /* Set uuid to Nil UUID for v1.1 guests */ > @@ -255,6 +288,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > else if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_2) = ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_offset %u (v1.2)\n", > + src_msg.msg_offset); > goto out; > } > > @@ -263,6 +299,9 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > src_msg.msg_size > (tx_size - src_msg.msg_offset) ) > { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 invalid msg_size %u offset %u tx %zu\n"= , > + src_msg.msg_size, src_msg.msg_offset, tx_size); > goto out; > } > > @@ -272,6 +311,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 to SP not supported\n"); > goto out; > } > /* > @@ -288,6 +329,8 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *re= gs) > > ret =3D ffa_simple_call(FFA_MSG_SEND2, > ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0,= 0, 0); > + if ( ret ) > + gdprintk(XENLOG_DEBUG, "ffa: msg_send2 to SP failed: %d\n", = ret); > } > else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > @@ -295,7 +338,11 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *r= egs) > ret =3D ffa_msg_send2_vm(dst_id, tx_buf, &src_msg); > } > else > + { > ret =3D FFA_RET_INVALID_PARAMETERS; > + gdprintk(XENLOG_DEBUG, > + "ffa: msg_send2 to VM disabled (dst %#x)\n", dst_id); > + } > > out: > ffa_tx_release(src_ctx); > @@ -311,6 +358,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint3= 2_t fid) > if ( !ffa_fw_supports_fid(fid) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: run fid %#x not supported\n", fid); > goto out; > } > > @@ -322,6 +370,7 @@ void ffa_handle_run(struct cpu_user_regs *regs, uint3= 2_t fid) > if ( !FFA_ID_IS_SECURE(dst >> 16) ) > { > ret =3D FFA_RET_NOT_SUPPORTED; > + gdprintk(XENLOG_DEBUG, "ffa: run to non-secure dst %#x\n", dst); > goto out; > } > > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229157.1535200 (Exim 4.92) (envelope-from ) id 1vqXxp-0004g5-Jh; Thu, 12 Feb 2026 14:46:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229157.1535200; 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Those build the hypervisor using the elf cross-toolchain from Homebrew for both x86 and arm64. Signed-off-by: Roger Pau Monné --- I haven't added any randconfig jobs, we can consider adding those later on if the builds are stable. --- .cirrus.yml | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/.cirrus.yml b/.cirrus.yml index 7bbb4f1c5c6c..b9608e71cca7 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -1,3 +1,5 @@ +## FreeBSD Build Jobs + # https://cirrus-ci.org/guide/tips-and-tricks/#sharing-configuration-between-tasks freebsd_versions: &FREEBSD_VERSIONS env: @@ -122,7 +124,41 @@ task: path: xtf/tests/selftest/test-*-selftest type: application/octet-stream -# Test jobs +## macOS Build Jobs + +task: + name: 'macOS: hypervisor build' + + env: + matrix: + ARCH: x86_64 + ARCH: aarch64 + + alias: macos-$ARCH + macos_instance: + image: ghcr.io/cirruslabs/macos-runner:sonoma + + environment: + CIRRUS_CLONE_DEPTH: 1 + CIRRUS_LOG_TIMESTAMP: true + + install_script: + - brew install $ARCH-elf-gcc $ARCH-elf-binutils + + build_script: + - make -j`sysctl -n hw.ncpu` + XEN_TARGET_ARCH=`echo $ARCH | sed -e s/aarch64/arm64/` + CROSS_COMPILE=$ARCH-elf- HOSTCC=clang -C xen + + xen_artifacts: + path: xen/xen + type: application/octet-stream + + debug_artifacts: + path: xen/xen-syms + type: application/octet-stream + +## Test Jobs task: name: 'FreeBSD: XTF selftest' -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:46:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:46:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229158.1535210 (Exim 4.92) (envelope-from ) id 1vqXxs-0004yl-4r; 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Note this is only done for the x86 build, there's no ARM support in XTF yet. Signed-off-by: Roger Pau Monné --- .cirrus.yml | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index b9608e71cca7..839c25149c9e 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -161,18 +161,19 @@ task: ## Test Jobs task: - name: 'FreeBSD: XTF selftest' + name: 'XTF selftest' << : *FREEBSD_ENV_PRODUCTION env: matrix: - FREEBSD_BUILD: $FREEBSD_LEGACY - FREEBSD_BUILD: $FREEBSD_PRODUCTION - FREEBSD_BUILD: $FREEBSD_CURRENT + BUILD: freebsd_full_$FREEBSD_LEGACY + BUILD: freebsd_full_$FREEBSD_PRODUCTION + BUILD: freebsd_full_$FREEBSD_CURRENT + BUILD: macos-x86_64 depends_on: - - freebsd_full_$FREEBSD_BUILD + - $BUILD - xtf install_script: pkg install -y qemu-nox11 expect @@ -187,7 +188,7 @@ task: fetch_script: - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/xtf/xtf.zip - - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/freebsd_full_$FREEBSD_BUILD/xen.zip + - fetch https://api.cirrus-ci.com/v1/artifact/build/$CIRRUS_BUILD_ID/$BUILD/xen.zip - unzip xtf.zip - unzip xen.zip -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:56:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:56:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229227.1535220 (Exim 4.92) (envelope-from ) id 1vqY6z-00006c-VA; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rDiotymAFtt/W5dC/iqt+paUAHGjcz/j4Bg5UTnAsXcNZPgeKrvWUjL1g3D09UeeUuOErWo96VT0vf/9aBe9roS2t2/w7Ub/+TZmZPYu3JQYe+OH1XHzEd8/KA3xcaAdWrC/ko6iz6KW0zwfAvi/LZQxsduMNTeJYKLF9axoRb+q6Lx1JrCrepvyccQKKy7nsCE5d+IADn9BdXF+jeRLkkjSA/F9/hMGkmyq5EoAPjf0hyaQT1DN6rX8FgNgJ3/ndy5/R+2ufaH6LSF785Pgmdq8N9kWw4uyTwaGPoo4OQf+5WZelcED5y7Z6rhVQ7Q/ud3UerOUod4QeZBzU2+yL86Dpcg6VsSjkWnE1WnPx4n0M/H7eB8XECZwkye3dU2kVxSC+36+RrEWS+131Mfz+EVhcy2AF8gARIyZT0JTbxy7DqTnj3aYutG5TjZY78qE X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 14:56:00.5006 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 66037592-3c73-4911-98c2-08de6a46d61c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4079 On Thu Feb 12, 2026 at 11:49 AM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> @@ -738,11 +738,10 @@ static bool __init retpoline_calculations(void) >> unsigned int ucode_rev =3D this_cpu(cpu_sig).rev; >> bool safe =3D false; >> =20 >> - if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) >> + if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) >> return true; >> =20 >> - if ( boot_cpu_data.vendor !=3D X86_VENDOR_INTEL || >> - boot_cpu_data.family !=3D 6 ) >> + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || boot_cpu_data.family != =3D 6 ) >> return false; > > At the example of this (applies throughout this patch): With the panic() = in > patch 03 the transformation looks correct. Without that panic(), or witho= ut > being explicitly aware of it, this gives the impression of explicitly doi= ng > an unsafe thing: These patches wouldn't be functional changes without the X86_ENABLED_VENDOR= S mask at cpu_vendor() or the single-vendor optimisation. I could split it th= at way. Introduce the cpu_vendor() macro early. Transform the entire tree, and= then apply the optimisations. > being explicitly aware of it, this gives the impression of explicitly doi= ng > an unsafe thing: Without the panic, it'd indeed be (intentionally) doing an unsafe thing. Removing the panic can't be safe, it's not just a matter of features missin= g. It'd imply printing a banner saying the current configuration is unsupporte= d. > Even though by way of boot_cpu_data.vendor we know what > vendor's CPU we're on, we're acting as if we didn't know. Not with the panic in place, which is partially why I put it there. > I'm really > uncertain whether such changes are worth it with the mere goal of reducin= g > code size. It is unreachable code, and in a safety context every line of unreachable c= ode must be either removed or justified. And justifications cost time, effort a= nd are difficult to maintain. > Even beyond the concern raised, this feels like it might be > increasing the risk of introducing subtle bugs. I would've agreed with you with x86_vendor_is(), which is why for v1 I took= a step back to make cpu_vendor(). That macro was complex. Too complex and it = took many trial and errors to fine tune it. cpu_vendor() is comparatively trivia= l and relies on the compiler doing the heavy lifting. In the single-vendor case i= t's a constant and it's hopefully uncontroversially fine to remove unreachable = code then. In the multivendor case, the complexity amounts to a mask of available vend= ors. I don't think there's an inherent danger in removing unreachable code, so l= ong as we can prove at boot time the reachability preconditions can't be met. > > I wonder what Andrew and Roger think in this regard. +1 Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Feb 12 14:57:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 14:57:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229239.1535229 (Exim 4.92) (envelope-from ) id 1vqY8h-0000nD-96; Thu, 12 Feb 2026 14:57:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229239.1535229; Thu, 12 Feb 2026 14:57:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqY8h-0000n6-6V; Thu, 12 Feb 2026 14:57:55 +0000 Received: by outflank-mailman (input) for mailman id 1229239; Thu, 12 Feb 2026 14:57:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqXyc-0003LH-IS for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 14:47:30 +0000 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [2a00:1450:4864:20::630]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c16f0aff-0821-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 15:47:29 +0100 (CET) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-b885e8c6700so1295979866b.0 for ; Thu, 12 Feb 2026 06:47:29 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Hence, to prevent speculative execution causing one >>>> + * guest’s VS-stage translations to be cached under another guest’s >>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>> + * finally write the new vsatp value what will be done in >>>> + * p2m_handle_vmenter(). >>>> + */ >>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>> + >>>> + /* >>>> + * Nothing to do with HGATP as it is constructed each time when >>>> + * p2m_handle_vmenter() is called. >>>> + */ >>>> +} >>>> + >>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>>> +{ >>>> + if ( is_idle_vcpu(n) ) >>>> + return; >>>> + >>>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >>> How can the context switch of a vCPU affect domain-wide state? >> It is wrong to have is_ctxt_switch_finished per domain, it should be >> vCPU field. >> >>>> + /* >>>> + * Nothing to do with HGATP or VSATP, they will be set in >>>> + * p2_handle_vmenter() >>>> + */ >>> Why can this not be done here? >> As VMID should be calculated on VM enter. > And I didn't suggest to calculate a new one here. > >> We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), >> but then it is possible when vmid_handle_vmenter() will be called before VM entry >> VMID could be changed and it will be needed again to update HGATP and VSATP what >> will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one >> in p2m_handle_vmenter()). > Is this a concern resulting from particular logic you expect to appear > in the window between context switch and entering the guest, or is this > merely an abstract concern? If we will have VS TLB flush unconditionally in VM entry then it is merely an abstract concern. Otherwise, considering that speculation could happen between context switch and VM entry what could lead to that some entries were added to VS TLB flush with old VMID in the case if then in VM entry vCPU might receive new VMID. > >> This is also an answer to ... >> >>>> +} >>>> + >>>> +void p2m_handle_vmenter(void) >>>> +{ >>>> + struct p2m_domain *p2m = ¤t->domain->arch.p2m; >>> To save yourself (or others) future work, please never open-code p2m_get_hostp2m() >>> (applies further up as well, as I notice only now). >>> >>>> + struct vcpu_vmid *p_vmid = ¤t->arch.vmid; >>>> + uint16_t old_vmid, new_vmid; >>>> + bool need_flush; >>>> + register_t vsatp_old = 0; >>>> + >>>> + BUG_ON(is_idle_vcpu(current)); >>> This is the 3rd use of current - latch into a local variable? >>> >>>> + /* >>>> + * No mechanism is provided to atomically change vsatp and hgatp >>>> + * together. Hence, to prevent speculative execution causing one >>>> + * guest’s VS-stage translations to be cached under another guest’s >>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>> + * finally write the new vsatp value >>>> + * >>>> + * CSR_VSATP is already set to 0 in p2m_ctxt_switch_from() in the >>>> + * case when n->arch.is_p2m_switch_finished = false. Also, there is >>>> + * BUG_ON() below to verify that. >>>> + */ >>>> + if ( p2m->is_ctxt_switch_finished ) >>>> + vsatp_old = csr_swap(CSR_VSATP, 0); >>> This shouldn't be needed when ... >>> >>>> + old_vmid = p_vmid->vmid; >>>> + need_flush = vmid_handle_vmenter(p_vmid); >>>> + new_vmid = p_vmid->vmid; >>> ... the VMID doesn't change. Imo you want to drop is_ctxt_switch_finished >>> again, handle things normally in p2m_ctxt_switch_to(), and deal with merely >>> a changing VMID here. >> ... (check the answer above) >> >> If it is okay to have potential double VS TLB flush and double update of >> HGATP and VSATP when old_vmid != new_vmid then we can do in this way. > I think the simpler, straightforward approach should be used initially, > with improvements made once a performance issue was actually determined, or > once a less ugly (sorry) approach was found. For example, assuming CSR > reads aren't overly expensive, it looks to me as if during VM entry > - vsatp only needs writing when vsatp.MODE is zero, > - hgatp only needs writing when vsatp.MODE is zero or when the VMID needs > updating. Do you mean to do that only in p2m_handle_vmenter() and having p2m_ctxt_switch_to() does nothing (or just dropped)? If yes then it could be an option. I thought about such approach but decided to go with an introduction of is_ctxt_switch_finished as it looked to me that it is better for potential TLB flushing optimization. But I am okay to start with suggested way and re-work it once a performance issue will be actually determined. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:07:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:07:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229260.1535239 (Exim 4.92) (envelope-from ) id 1vqYHG-0002kV-8N; Thu, 12 Feb 2026 15:06:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229260.1535239; Thu, 12 Feb 2026 15:06:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYHG-0002kO-5q; Thu, 12 Feb 2026 15:06:46 +0000 Received: by outflank-mailman (input) for mailman id 1229260; Thu, 12 Feb 2026 15:06:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYHF-0002jg-MY for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jnz87LzrstBU9XnBUXhZuAOJnDJbh6XY8si3Bqu/1hjyyLeT3H3gfBdmMOgrao+h5LhXmeBtfNGrXp9N0r+jyvBYnq3ayIJMkdan30hwtPJb1zjArThxvsJsvudAm5b6EEvbtx9PX+o1fMvgUKZ25Ppj0hMizynMQKmAI1Qd/qBxXtnVw38Ip96Bfl73n/O9ceS17rZHzIefZ6Kr3fs81b2ZDnHEhsRPB0H38d6Tmc+wBAsEyDgL+Hjwv6W3Mk3EF27AVxhlwEM78QFfJMMwNd5IJCm31Xctdfxk9y9JzYujkonON37Nl15lsdQ4Bzy6uvq8K4UxwVJeqd1gyxpYHTa+OrLsoAFXFK+OP41UsMN5ucMssLuBi7N28y6+uKJ3rVq5+kZzEAgVgvRzDjnQDw0dwK0GiPhgxHiNFI7L5h6rT+A1sjBp+wDW3jwqOzhW X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 15:06:39.7079 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d683e7dc-97de-4c3c-6844-08de6a48531a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7557 On Thu Feb 12, 2026 at 12:06 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c >> +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c >> @@ -133,7 +133,7 @@ static int __init cf_check cpufreq_driver_init(void) >> =20 >> ret =3D -ENOENT; >> =20 >> - switch ( boot_cpu_data.x86_vendor ) >> + switch( cpu_vendor() ) > > Nit: Please avoid screwing up style. bah, yes. > >> @@ -141,12 +141,10 @@ static int __init cf_check cpufreq_driver_init(voi= d) >> switch ( cpufreq_xen_opts[i] ) >> { >> case CPUFREQ_xen: >> - ret =3D IS_ENABLED(CONFIG_INTEL) ? >> - acpi_cpufreq_register() : -ENODEV; >> + ret =3D acpi_cpufreq_register(); >> break; >> case CPUFREQ_hwp: >> - ret =3D IS_ENABLED(CONFIG_INTEL) ? >> - hwp_register_driver() : -ENODEV; >> + ret =3D hwp_register_driver(); >> break; >> case CPUFREQ_none: >> ret =3D 0; > > This of course is a neat (side) effect. > >> @@ -165,7 +163,6 @@ static int __init cf_check cpufreq_driver_init(void) >> =20 >> case X86_VENDOR_AMD: >> case X86_VENDOR_HYGON: >> -#ifdef CONFIG_AMD >> for ( i =3D 0; i < cpufreq_xen_cnt; i++ ) >> { >> switch ( cpufreq_xen_opts[i] ) >> @@ -191,9 +188,6 @@ static int __init cf_check cpufreq_driver_init(void) >> if ( !ret || ret =3D=3D -EBUSY ) >> break; >> } >> -#else >> - ret =3D -ENODEV; >> -#endif /* CONFIG_AMD */ >> break; >> =20 >> default: > > There's a change to the function's return value, though: When reaching de= fault:, > -ENOENT will result, when previously -ENODEV would have been returned for > compiled-out cases. It may well be that there is a dependency somewhere o= n the > particular return value - did you thoroughly check that? It's a presmp_initcall. The specific ret value is inconsequential. > > Of course this may well apply elsewhere as well; I did not go through and= check > every of the switch()es you alter. It may. I did check, but that doesn't mean I didn't miss any. > >> --- a/xen/arch/x86/cpu/mcheck/mce.h >> +++ b/xen/arch/x86/cpu/mcheck/mce.h >> @@ -137,7 +137,7 @@ void x86_mcinfo_dump(struct mc_info *mi); >> =20 >> static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t ms= r) >> { >> - switch (boot_cpu_data.x86_vendor) { >> + switch (cpu_vendor()) { > > Would be nice if style was updated while touching such. sure. > >> --- a/xen/arch/x86/cpu/vpmu.c >> +++ b/xen/arch/x86/cpu/vpmu.c >> @@ -815,7 +815,7 @@ static struct notifier_block cpu_nfb =3D { >> =20 >> static int __init cf_check vpmu_init(void) >> { >> - int vendor =3D current_cpu_data.x86_vendor; >> + int vendor =3D cpu_vendor(); > > It is only seeing the plain int here that I notice that cpu_vendor() retu= rns > uint8_t. I don't think that's necessary, and hence as per ./CODING_STYLE = it > should rather be unsigned int. Which is then waht would want using here a= s > well. Hmm, I need to check whether it affects codegen. Probably not seeing how it= s all inline. Will do unless it has terrible side effects. > >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -319,7 +319,7 @@ void domain_cpu_policy_changed(struct domain *d) >> if ( cpu_has_htt ) >> edx |=3D cpufeat_mask(X86_FEATURE_HTT); >> =20 >> - switch ( boot_cpu_data.x86_vendor ) >> + switch( cpu_vendor() ) >> { >> case X86_VENDOR_INTEL: >> /* >> @@ -427,7 +427,7 @@ void domain_cpu_policy_changed(struct domain *d) >> if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))= ) >> edx &=3D ~CPUID_COMMON_1D_FEATURES; >> =20 >> - switch ( boot_cpu_data.x86_vendor ) >> + switch( cpu_vendor() ) > As they recur, I wonder where these bogus style adjustments are coming fr= om. > It's not like ... > >> --- a/xen/arch/x86/guest/xen/xen.c >> +++ b/xen/arch/x86/guest/xen/xen.c >> @@ -63,7 +63,7 @@ void asmlinkage __init early_hypercall_setup(void) >> x86_cpuid_vendor_to_str(boot_cpu_data.x86_vendor)); >> } >> =20 >> - switch ( boot_cpu_data.x86_vendor ) >> + switch ( cpu_vendor() ) > > ... you would have used a bad sed pattern globally, as here style remains > intact. Further down it breaks again. This patch used to be several. One of the primordial commits seems to suffe= r from this. Will fix globally. Thanks. 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This is > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > Linux 6.17.9 in this test. Not sure it's going to help a lot, but does using a PVH dom0 make any difference? Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 68g1ex/LTSr/oMJeRY/iBmY9CEzYmUUT3lX9TvsKeOQWpZxuv4sz5mlDEvOc3BnJozCw3y2BMxoThqNz3dnRtC4wN7ixi/fRnkMGgT9N7vQ/4AI2OYXUHcox3aBP6iBJT97HoDQKGqm1F4XYY57Ter5b9jttoEnhV97SNaVNjKZflptsz1/7x0xiaEkT6+VeXEv7vMtXUQPPJfmqnr6khQu8JnHMJinEYtSFgc7zN2WStDPVIUbPRyyyoOt6b5k4k/ipW6A7tQ6xUeamD1VnSSU83bxlnF2brYHcQAgMkShHKttgAznM9xAe+T1GzOCrqt+E2N1Fg0Xs81aZSGyvn6MefyVujmzuetvLcCm+FSGiopazzHre8TUTGwaPvdIYtDvM3E2p9Yy2rbJSRz4lZWz7eiTFfcDZ5HS1duXdX76QZk1cBUn9FjoKAWbWtZLI X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 15:29:19.4349 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 900b0578-414d-4fd2-a787-08de6a4b7d8e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B077.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB7072 On Thu Feb 12, 2026 at 12:26 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> Open code the vendor check through the policy as a one-off. The emulator >> embeds amd_like() in macros and is called in MANY places. Using a >> local variable (cp->x86_vendor) makes it a lot smaller (300-400 bytes >> smaller). So treat this as the exception it is and let it use the policy >> rather than boot_cpu_data. > > As elsewhere you mainly discuss benefits for the single-vendor case, is t= he > above about the opposite situation? Else why would codegen suffer this mu= ch > here? In single-vendor it doesn't matter. A constant is a constant. It matters in multivendor. And it matters for 2 reasons. 1. The x86_emulate() function is HUGE. 2. The x86_emulate() function has LOTS of amd_like() invocations. When amd_like() uses the policy it has an advantage over using the global. Namely, the policy is already cached in a register, so codegen simply has t= o pull the vendor from an offset into a register. When we go for a global var= iable we need to reach out and pull the variable from its 64bit address (because = we compile with model=3Dlarge). It normally evens out with the codegen reducti= ons cpu_vendor() encourages you to have, but in here it just doesn't. There's w= ay too many accesses to global state and .text suffers. The fix for this is caching the vendor somewhere else. A "bool amd_like" in= a local variable would shrink code substantially (by having rsp-relative acce= ss to the solution of the question amd_like() asks, and by avoiding the masking).= This optimisation is worth doing with or without this patch in place. Alas, I didn't test that, because this series was sufficiently complicated as-is. > > Using cp also is preferable for test and fuzzing harnesses, which don't > even know boot_cpu_data. They don't now, which is why I made the x86emul_cpu() macro. New subsystems added to a userlevel testing ground could simply have a boot_cpu_data with = the desired policy as part of their harness' global state. > >> @@ -30,8 +31,15 @@ void BUG(void); >> # define X86EMUL_NO_SIMD >> # endif >> =20 >> +/* intentionally avoid cpu_vendor(), as it produces much worse codegen = */ > > Nit (style): Capital letter wanted at the start. > >> +# define x86emul_cpu(cp) ((X86_ENABLED_VENDORS =3D=3D \ >> + ISOLATE_LSB(X86_ENABLED_VENDORS)) \ >> + ? X86_ENABLED_VENDORS \ >> + : ((cp)->x86_vendor & X86_ENABLED_VENDOR= S)) > > Nit: Indentation. The ? and : want to align with the controlling expressi= on. sure. > > Further, is this a good name, without "vendor" in it? x86emul_cpu_vendor() is fine with me too. > > And then I'm of two minds here as to the use of the macro parameter: On o= ne > hand we can be pretty certain what is passed in won't have side effects. > Otoh in a hypothetical odd case (seeing that this lives in a header file, > not local to an isolated piece of code) where there would be one, the > argument being evaluated unreliably could cause an unpleasant surprise. > The more ... > >> #else /* !__XEN__ */ >> # include "x86-emulate.h" >> +# define x86emul_cpu(cp) ((cp)->x86_vendor) > > ... that the same wouldn't be observable in the fuzzing or test harnesses= . I can turn this into a static inline to avoid such worries. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CQICf4Epo80p+5+lSWkI88QMX4W64pNCYHNVv+6qC+mcf/z7fOELVAyo2dqcprBSdjvenzQRj18MCo/MeOrfqASfe5oEkfXNNWz8hIaSjkx8FX8ZnsiSlofmFrvEtYJKaM5GwCEB5xovitBrXF9iy3qgCYDiGZeRKjgSYKQPgUllTH6Bc2hM7LyyZVzxlV9Nq/ftEKWceTddwlltM47v03N73Ac8/s0Svpz08lneYnMqrEctQj6A14I65oPWdlLZxarvQTgiXDgz09KVOBAh1GdOh1p6S5GPeqyXGmtS2jRZ2wKp24z2wNCRzz1XLLMKvR9tzyVE+hQt04bHT7F6sOR5n1flFVVPt5ZBfxqHFdOpPhtYzC9EemGpMzUMPyfB6J7ii3AXBtj1Yp6k2ivDG1T4tp7Qmtk4rwlISgvEpJV1xmyHJBYB8P1uw1cFwLgY X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 15:30:43.7508 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c35425b-8fb3-4089-0eec-08de6a4bafea X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B076.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4094 On Thu Feb 12, 2026 at 12:31 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> ... but keep the current behaviour of using the policy vendor when >> compiled for userspace, where cross-vendor configurations are expected. >>=20 >> Not a functional change. >>=20 >> Signed-off-by: Alejandro Vallejo > > Hmm, ... > >> --- a/xen/arch/x86/x86_emulate/private.h >> +++ b/xen/arch/x86/x86_emulate/private.h >> @@ -15,6 +15,7 @@ >> # include >> =20 >> # include >> +# include >> # include >> # include >> # include >> @@ -30,8 +31,11 @@ void BUG(void); >> # define X86EMUL_NO_SIMD >> # endif >> =20 >> +# define x86emul_cpu(cp) ({ (void)(cp); cpu_vendor(); }) >> + >> #else /* !__XEN__ */ >> # include "x86-emulate.h" >> +# define x86emul_cpu(cp) ((cp)->x86_vendor) >> #endif > > ... this looked familiar, yet different at the same time. It was only aft= er > some eyebrow raising that I noticed that patch 07/12 appears twice in the > series, with different titles. > > Jan Arg. Leftover patch in my patches folder. Please, ignore this patch, and apologies. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:33:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:33:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229316.1535280 (Exim 4.92) (envelope-from ) id 1vqYgj-0000Cf-0l; Thu, 12 Feb 2026 15:33:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229316.1535280; Thu, 12 Feb 2026 15:33:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYgi-0000CY-TA; Thu, 12 Feb 2026 15:33:04 +0000 Received: by outflank-mailman (input) for mailman id 1229316; Thu, 12 Feb 2026 15:33:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYgh-0000CR-34 for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="vmipi+t4vizlqmlG" Content-Disposition: inline In-Reply-To: --vmipi+t4vizlqmlG Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 12 Feb 2026 16:32:56 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: xen-devel , intel-xe@lists.freedesktop.org Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: > On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3recki= wrote: > > Hi, > >=20 > > Recently I started testing compatibility with Intel Lunar Lake. This is > > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > > Linux 6.17.9 in this test. >=20 > Not sure it's going to help a lot, but does using a PVH dom0 make any > difference? Yes, it makes a difference. I end up with black screen as soon as dom0 starts... And due to unrelated bug (in xhci console code?), I don't have kernel messages :/ --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --vmipi+t4vizlqmlG Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmN8qgACgkQ24/THMrX 1yzIigf8DClXXn/Ct3Uin0Vtdqw1ArhHRlBp17Xrhbde9xjRAMtiof9tkY8P+Fd8 /bDr68vAmiMoUQhIQXEuO8gwC9aYa+j4U3oArcf56dxInnH2T5HCEnC/YA/WVmn5 rp3NK/m7pTeUiWxuISi18zi9du+ifpR+BclQcAOq/zJft3OhpxWxknFs7Z4rpN7B KiCSpHYPAZmi9Pevh/ewooN5Zw5FWAXmX15M+zNArIBTu+R2LhzDN6lhEHF5SBZw mWlUK5ad18B1LJEAMhD17V5mxPlD1Msh4dJqtB2Zd/vGv6ExA7E8QKCY6QcF1Vm/ CylDBDUSU/eQtzGvCk/kgwfOKxf/tw== =zCHo -----END PGP SIGNATURE----- --vmipi+t4vizlqmlG-- From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:34:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:34:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229326.1535290 (Exim 4.92) (envelope-from ) id 1vqYiS-0000kU-C5; Thu, 12 Feb 2026 15:34:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229326.1535290; Thu, 12 Feb 2026 15:34:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYiS-0000kN-8I; Thu, 12 Feb 2026 15:34:52 +0000 Received: by outflank-mailman (input) for mailman id 1229326; Thu, 12 Feb 2026 15:34:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYiR-0000kF-Ou for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 15:34:51 +0000 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [2a00:1450:4864:20::443]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5e0f75a9-0828-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 16:34:49 +0100 (CET) Received: by mail-wr1-x443.google.com with SMTP id ffacd0b85a97d-4362197d174so2237410f8f.3 for ; Thu, 12 Feb 2026 07:34:49 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 07:34:48 -0800 (PST) Message-ID: <2e0d0b4f-cc5d-4ab1-9132-04ab84a222f5@suse.com> Date: Thu, 12 Feb 2026 16:34:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/5] xen/x86: always consider '/' as a division in assembly To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20260212144618.43200-1-roger.pau@citrix.com> <20260212144618.43200-2-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260212144618.43200-2-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 15:46, Roger Pau Monne wrote: > On x86 GNU assembler will consider '/' as the start of comment marker for > some ELF targets. This is incorrect with Xen's usage, which does use '/' > in assembly files as a mathematical operator. > > The behavior of the assembler can be altered by passing the --divide > option; unconditionally pass this option when available to force the > expected behavior. > > Reported-by: Jan Beulich > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:35:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:35:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229327.1535300 (Exim 4.92) (envelope-from ) id 1vqYia-00010Z-In; Thu, 12 Feb 2026 15:35:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229327.1535300; Thu, 12 Feb 2026 15:35:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYia-00010S-FC; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Zc5cCPFlS9iZudKhUu+WC8ZG2hm0gHBo75+RohcYbhtxnz2viukv+U4tP0H84xAm/fnH61oxtPmgrKFij92vsWuYkUzP2sbTFNlPmjAqCxmrXY0TKIqvGKe0wCQpdL4GEw4mmQRP7Jh1vqQhNOrorD6Xz+uLZ7vyj3U8oWp43xoLD3ctj65oAfo6hLstD8qcRU6fzu9tw/mAh1ABXnyQ4rUXIHhojEkqa4AfJF+WOIbbGeWzVCTOotdvkcsS3mHmGzYDSy7widMi0pbQ2uc7rVLiLyFxRRHxlsY5E7sNVNKZTxX+nnWopp1Hq7Rilw3Mxl8dIypJ7OjyxFQHkSMpDz3+UTy5lTW0F/PyocdLbFbBEV2wMBAWwuY0kkZHyKNBlUSPkYZC4XXumiKw7WhBf3J881PfJsBN91fHk55xBRwutgtjDIofebeLfF/JW9MF X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 15:34:44.1469 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc402a00-004b-4520-d021-08de6a4c3f19 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F68.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7673 On Thu Feb 12, 2026 at 12:52 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/acpi/cpu_idle.c >> +++ b/xen/arch/x86/acpi/cpu_idle.c >> @@ -178,7 +178,7 @@ static void cf_check do_get_hw_residencies(void *arg= ) >> struct cpuinfo_x86 *c =3D ¤t_cpu_data; >> struct hw_residencies *hw_res =3D arg; >> =20 >> - if ( c->x86_vendor !=3D X86_VENDOR_INTEL || c->x86 !=3D 6 ) >> + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || c->x86 !=3D 6 ) >> return; >> =20 >> switch ( c->x86_model ) >> @@ -915,8 +915,7 @@ void cf_check acpi_dead_idle(void) >> mwait(cx->address, 0); >> } >> } >> - else if ( (current_cpu_data.x86_vendor & >> - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && >> + else if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) && > > While we certainly make that assumption, shouldn't you add explicit check= s > that APs' vendors match the BSP's, in order to be able to also replace > current_cpu_data uses? Or do we have such a check, and I'm merely overloo= king > it? > > Jan In generic_identify() c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx); if (boot_cpu_data.x86_vendor !=3D c->x86_vendor) printk(XENLOG_ERR "CPU%u vendor %u mismatch against BSP %u\n", smp_processor_id(), c->x86_vendor, boot_cpu_data.x86_vendor); But I'm not sure why this is not a panic() (I thought it was). Such check triggering can only mean a Hypervisor bug and a security hole. Do you see a problem with s/printk/panic/ here? Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:37:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:37:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229345.1535310 (Exim 4.92) (envelope-from ) id 1vqYkk-0001oP-17; Thu, 12 Feb 2026 15:37:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229345.1535310; Thu, 12 Feb 2026 15:37:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYkj-0001oI-Uf; Thu, 12 Feb 2026 15:37:13 +0000 Received: by outflank-mailman (input) for mailman id 1229345; Thu, 12 Feb 2026 15:37:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYki-0001oA-QW for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 15:37:12 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b281e31e-0828-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 16:37:11 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4836f363d0dso3314835e9.3 for ; Thu, 12 Feb 2026 07:37:11 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 07:37:10 -0800 (PST) Message-ID: <534c2e55-e5ec-4045-b08e-26916a18366e@suse.com> Date: Thu, 12 Feb 2026 16:37:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/5] xen/tools: remove usages of `stat -c` in check-endbr.sh To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , xen-devel@lists.xenproject.org References: <20260212144618.43200-1-roger.pau@citrix.com> <20260212144618.43200-3-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260212144618.43200-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 15:46, Roger Pau Monne wrote: > The `-c` option to stat is not POSIX compatible, and hence prevents the > check-endbr.sh script from running reliably. > > The first instance of `stat -c` can be removed by fetching the section size > from the output of objdump itself, which the script already parses to get > the VMA values. > > The other two instances can be replaced by counting the lines in the > respective files. Those files contain list of addresses, so the size in > bytes is not strictly needed, we can count the number of lines instead. > > Suggested-by: Bertrand Marquis > Signed-off-by: Roger Pau Monné > Acked-by: Bertrand Marquis Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:43:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:43:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229360.1535320 (Exim 4.92) (envelope-from ) id 1vqYqE-0003dd-KO; Thu, 12 Feb 2026 15:42:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229360.1535320; Thu, 12 Feb 2026 15:42:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYqE-0003dW-Gr; Thu, 12 Feb 2026 15:42:54 +0000 Received: by outflank-mailman (input) for mailman id 1229360; Thu, 12 Feb 2026 15:42:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYqD-0003dQ-Jv for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 15:42:53 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7b4bdcb3-0829-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 16:42:48 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-43638a3330dso13311f8f.0 for ; Thu, 12 Feb 2026 07:42:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 12 Feb 2026 07:42:47 -0800 (PST) Message-ID: <45e8aa5a-842b-49d0-8744-71295cf0a0b6@suse.com> Date: Thu, 12 Feb 2026 16:42:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> <7cec918c-bd58-4013-9ec2-d43ff7afcd7c@suse.com> <099768df-ec44-454f-8a9e-4897d81309f9@gmail.com> <4f9953ae-8722-4971-a214-6c40f7f5859a@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4f9953ae-8722-4971-a214-6c40f7f5859a@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 15:47, Oleksii Kurochko wrote: > > On 2/12/26 1:56 PM, Jan Beulich wrote: >> On 12.02.2026 12:57, Oleksii Kurochko wrote: >>> On 2/12/26 11:16 AM, Jan Beulich wrote: >>>> On 10.02.2026 17:36, Oleksii Kurochko wrote: >>>>> --- a/xen/arch/riscv/p2m.c >>>>> +++ b/xen/arch/riscv/p2m.c >>>>> @@ -1434,3 +1434,126 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>>>> >>>>> return get_page(page, p2m->domain) ? page : NULL; >>>>> } >>>>> + >>>>> +void p2m_ctxt_switch_from(struct vcpu *p) >>>>> +{ >>>>> + if ( is_idle_vcpu(p) ) >>>>> + return; >>>>> + >>>>> + /* >>>>> + * No mechanism is provided to atomically change vsatp and hgatp >>>>> + * together. Hence, to prevent speculative execution causing one >>>>> + * guest’s VS-stage translations to be cached under another guest’s >>>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>>> + * finally write the new vsatp value what will be done in >>>>> + * p2m_handle_vmenter(). >>>>> + */ >>>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>>> + >>>>> + /* >>>>> + * Nothing to do with HGATP as it is constructed each time when >>>>> + * p2m_handle_vmenter() is called. >>>>> + */ >>>>> +} >>>>> + >>>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>>>> +{ >>>>> + if ( is_idle_vcpu(n) ) >>>>> + return; >>>>> + >>>>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >>>> How can the context switch of a vCPU affect domain-wide state? >>> It is wrong to have is_ctxt_switch_finished per domain, it should be >>> vCPU field. >>> >>>>> + /* >>>>> + * Nothing to do with HGATP or VSATP, they will be set in >>>>> + * p2_handle_vmenter() >>>>> + */ >>>> Why can this not be done here? >>> As VMID should be calculated on VM enter. >> And I didn't suggest to calculate a new one here. >> >>> We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), >>> but then it is possible when vmid_handle_vmenter() will be called before VM entry >>> VMID could be changed and it will be needed again to update HGATP and VSATP what >>> will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one >>> in p2m_handle_vmenter()). >> Is this a concern resulting from particular logic you expect to appear >> in the window between context switch and entering the guest, or is this >> merely an abstract concern? > > If we will have VS TLB flush unconditionally in VM entry then it is merely an > abstract concern. Why would we want to flush unconditionally? > Otherwise, considering that speculation could happen between > context switch and VM entry what could lead to that some entries were added to > VS TLB flush with old VMID in the case if then in VM entry vCPU might receive new > VMID. I don't understand: Context switch leaves vsatp.MODE at zero. Nothing can end up in the VS TLB in that case, aiui. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:44:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:44:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229370.1535338 (Exim 4.92) (envelope-from ) id 1vqYrl-0004Dz-2u; Thu, 12 Feb 2026 15:44:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229370.1535338; Thu, 12 Feb 2026 15:44:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYrk-0004Ds-V9; Thu, 12 Feb 2026 15:44:28 +0000 Received: by outflank-mailman (input) for mailman id 1229370; Thu, 12 Feb 2026 15:44:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYrj-0004Dm-P4 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 15:44:27 +0000 Received: from mail187-15.suw11.mandrillapp.com (mail187-15.suw11.mandrillapp.com [198.2.187.15]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b2e3915f-0829-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 16:44:22 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-15.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fBfjw4qZQzPm0pyQ for ; Thu, 12 Feb 2026 15:44:20 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id fc5e567fc2294e1f9457945a1f3e5574; Thu, 12 Feb 2026 15:44:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b2e3915f-0829-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770911060; x=1771181060; bh=Q5ghv+I1XhWpNNj+huOmGZQuMdeAGane7kLnRjHTz8w=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=U3a8NcsBvA89mA7G4i8+I1PhLPlfMLY90Gi+US2gM/l1diZdpOibbpLKIeZdP5Zbj P++Ux8F4pN0BRv7plHwCv3+LmXblnh9AXKL72PF5IhGiu9GLpnvukjQDf5LGWVeyql FKi/R4p/skwRgnPgbzS6MZ6C2zlbyxRAkFM23TmvgcZt9phqGNYCbaMccvs99XvIG7 e14Wjx1jC8xrGH4hftWr1y+vzYXFVxAU/ReMtT9YKyVSawjFDz2dwgM6lbR9svao0O 36eXsKEWZI3tc//LQvQv8oMmopkSNB00sWdsG7nivsZZ2YXpTeAp10KKO8bNqgErtw dzi+p3PyDAMOQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770911060; x=1771171560; i=teddy.astie@vates.tech; bh=Q5ghv+I1XhWpNNj+huOmGZQuMdeAGane7kLnRjHTz8w=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=EPNGfiVnFpaHnuOmbeiCbRb4F7E5OstOnJxi5NvNHj5aMXzxq+a+yUXpdeCEqnzU4 16A6EoafxsaempndyL3atNuryExGWbWgnWz346NsPOyx54c0qBbYAyedBGWIVmUt98 y7NHXAoxR9dUqgU9kVBlxlLfOdP3cgN5IpNfcXUgmvBQWDBa6juEE9/aEai69F8G88 JezMVCFmb0gZiRMzAudTKFIY8HhYdnrKr2HuhwANBF+tMorYn5dHimjTz2JvwYo52L 9pAleSHsxvXNIEcBcLNdo/2CYCAcoxFKTXmpYwTlB4QSYMKvqF5G+9laTZkmhsmD9V do/4HqI2AxIAg== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v6]=20xenpm:=20Add=20get-intel-temp=20subcommand?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770911059944 Message-Id: <6f0d897a-2e65-47ec-a97e-24b8c19b19fc@vates.tech> To: "Jan Beulich" Cc: "Oleksii Kurochko" , "Community Manager" , "Anthony PERARD" , xen-devel@lists.xenproject.org References: <489a4decf4367a9983a63fb4987d8c5f6267ed9f.1770632848.git.teddy.astie@vates.tech> <7064136b-38f1-4bbe-9ff4-14774c88f016@suse.com> <4553d4f8-89a9-4ef0-9b56-f3a04d8d7d67@suse.com> In-Reply-To: <4553d4f8-89a9-4ef0-9b56-f3a04d8d7d67@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.fc5e567fc2294e1f9457945a1f3e5574?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260212:md Date: Thu, 12 Feb 2026 15:44:20 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 12/02/2026 =C3=A0 11:30, Jan Beulich a =C3=A9crit=C2=A0: > On 12.02.2026 11:19, Teddy Astie wrote: >> Le 09/02/2026 =C3=A0 15:21, Jan Beulich a =C3=A9crit=C2=A0: >>> On 09.02.2026 11:31, Teddy Astie wrote: >>>> @@ -93,6 +96,7 @@ void show_help(void) >>>> " units defau= lt to \"us\" if unspecified.\n" >>>> " truncates u= n-representable values.\n" >>>> " 0 lets the = hardware decide.\n" >>>> + " get-intel-temp [cpuid] get Intel CPU tempe= rature of or all\n" >>> >>> Sorry, thinking about it only now: Do we really want to build in the ve= ndor >>> name to a command? "get-temp" would allow for adding an AMD implementat= ion >>> later on? >> >> AMD CPUs expose a PCI device that can be interacted with to get >> temperatures; which is then exposed in hwmon interface of Linux. That >> wouldn't be practical to implement hwmon interfaces in xenpm. > > You understand though that AMD only was an example (the most natural one)= ? > Yes, though having a generic name (e.g get-cpu-temp) could suggest that it is expected to work for all vendors; while it will here only work for Intel. >>>> @@ -1354,6 +1358,131 @@ void enable_turbo_mode(int argc, char *argv[]) >>>> errno, strerror(errno)); >>>> } >>>> >>>> +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool packa= ge, int *temp) >>>> +{ >>>> + xc_resource_entry_t entries[] =3D { >>>> + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THER= M_STATUS }, >>>> + { .idx =3D MSR_TEMPERATURE_TARGET }, >>>> + }; >>>> + struct xc_resource_op ops =3D { >>>> + .cpu =3D cpu, >>>> + .entries =3D entries, >>>> + .nr_entries =3D ARRAY_SIZE(entries), >>>> + }; >>>> + int tjmax; >>>> + >>>> + int ret =3D xc_resource_op(xch, 1, &ops); >>>> + >>>> + switch ( ret ) >>>> + { >>>> + case -1: >>>> + /* xc_resource_op returns -1 in out of memory scenarios */ >>>> + errno =3D -ENOMEM; >>> >>> And xc_resource_op() doesn't itself set / inherit a properly set errno? >>> We don't want to override what the C library may have set. >> >> I'm not sure what to do then. I guess we want to reset errno before >> entering xc_resource_op (so we won't report stale errno), but we would >> still need to consider cases where xc_resource_op returns failure >> without errno having being set ? > > Should xc_resource_op() perhaps better be corrected to behave consistentl= y > wrt the setting of errno? > that could be something to consider >>>> + case 1: >>>> + { >>>> + /* >>>> + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume = it's 100 >>>> + * which is correct aside a few selected Atom CPUs. Check Lin= ux >>>> + * kernel's coretemp.c for more information. >>>> + */ >>>> + static bool has_reported_once =3D false; >>>> + >>>> + if ( !has_reported_once ) >>>> + { >>>> + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported,= assume " >>>> + "tjmax =3D 100, readings may be incorrect= .\n"); >>>> + has_reported_once =3D true; >>>> + } >>>> + >>>> + tjmax =3D 100; >>>> + break; >>>> + } >>>> + >>>> + case 2: >>>> + tjmax =3D (entries[1].val >> 16) & 0xff; >>>> + break; >>>> + >>>> + default: >>>> + if ( ret > 0 ) >>>> + { >>>> + fprintf(stderr, "Got unexpected xc_resource_op return val= ue: %d", ret); >>>> + errno =3D -EINVAL; >>>> + } >>>> + else >>>> + errno =3D ret; >>> >>> Why would this be? How do you know "ret" holds a value suitable for put= ting >>> in errno? >> >> Aside -1 in out of memory situations when xc_resource_op returns -1, in >> other failure cases, it returns a hypercall (e.g multicall_op) return >> code, which is supposed to match a errno. > > As above - generally all layers want to deal with errno in a consistent > manner. If bugs in lower layers are too intrusive to fix right away, such > workarounds will at least want commenting upon (so it is easy to determin= e > at what point they can be removed again). > I think once xc_resource_op returns consistent values, things would be simpler to deal with here. > Jan > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 12 15:47:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 15:47:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229378.1535348 (Exim 4.92) (envelope-from ) id 1vqYu7-0004mY-IV; Thu, 12 Feb 2026 15:46:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229378.1535348; Thu, 12 Feb 2026 15:46:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqYu7-0004mR-DM; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Vxh1TZT8s/f+YGlQuFDUJZXiON2YcIQsno4/sQQcICwb2RJLibQs/cX7dgG0X+Fz7FkefqRrgkYP3tkmgVJqjPULGq0HIS70xXgbneMQpZ01QBV/mXb3R+zDPSfVV1Nt91AHEEDzYq5o++zDAntAVDWAEF1vVJAYK6URURTLhUtaHlvJjPYDmZFTUdtZMMaOY3NmJXaOmIfryojn007C8dJ618lsxLJDIygAcm4gRvy2GrrGVdm3iC6oHFB9ziWwq6gnX68DlMWz+nZLr3OpTItnW5uktOpokYQIF7xpX1cEYfRqaWPwHYBuvKjFRz+yba6znshmmfFSbFRDhlsBVutDUiiFUlGbRXviu7Dr/dcilwVu1CxaD2eyhV+MBOqKJg+Z9ocTTSGJYZML3xFonBJjeplbR6Api+MyYe+il67gJGMCpOevV1PkOXEmNckl X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 15:46:47.1592 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 55848d6d-4b97-4c7b-b741-08de6a4dee0b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06E.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5780 On Thu Feb 12, 2026 at 1:02 PM CET, Jan Beulich wrote: > On 06.02.2026 17:15, Alejandro Vallejo wrote: >> @@ -862,7 +861,7 @@ static void x86_mcinfo_apei_save( >> memset(&m, 0, sizeof(struct mce)); >> =20 >> m.cpu =3D mc_global->mc_coreid; >> - m.cpuvendor =3D boot_cpu_data.x86_vendor; >> + m.cpuvendor =3D cpu_vendor(); >> m.cpuid =3D cpuid_eax(1); >> m.socketid =3D mc_global->mc_socketid; >> m.apicid =3D mc_global->mc_apicid; >> @@ -964,7 +963,7 @@ static void cf_check __maybe_unused do_mc_get_cpu_in= fo(void *v) >> &xcp->mc_ncores_active, &xcp->mc_nthreads); >> xcp->mc_cpuid_level =3D c->cpuid_level; >> xcp->mc_family =3D c->x86; >> - xcp->mc_vendor =3D c->x86_vendor; >> + xcp->mc_vendor =3D cpu_vendor(); >> xcp->mc_model =3D c->x86_model; >> xcp->mc_step =3D c->x86_mask; >> xcp->mc_cache_size =3D c->x86_cache_size; > > What we do internally is one thing. But what we report to the outside sho= uldn't > be inaccurate, imo. I agree. There's also zero benefit. > >> @@ -1122,7 +1121,7 @@ static bool __maybe_unused x86_mc_msrinject_verify= (struct xen_mc_msrinject *mci) >> =20 >> if ( IS_MCA_BANKREG(reg, mci->mcinj_cpunr) ) >> { >> - if ( c->x86_vendor =3D=3D X86_VENDOR_AMD ) >> + if ( (cpu_vendor() & X86_VENDOR_AMD) ) > > Nit: No need for the extra parentheses here. ack. > >> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c >> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c >> @@ -160,7 +160,7 @@ mcequirk_lookup_amd_quirkdata(const struct cpuinfo_x= 86 *c) >> { >> unsigned int i; >> =20 >> - BUG_ON(c->x86_vendor !=3D X86_VENDOR_AMD); >> + BUG_ON(!(cpu_vendor() & X86_VENDOR_AMD)); >> =20 >> for ( i =3D 0; i < ARRAY_SIZE(mce_amd_quirks); i++ ) >> { >> @@ -291,7 +291,7 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bs= p) >> uint32_t i; >> enum mcequirk_amd_flags quirkflag =3D 0; >> =20 >> - if ( c->x86_vendor !=3D X86_VENDOR_HYGON ) >> + if ( !(cpu_vendor() & X86_VENDOR_HYGON) ) >> quirkflag =3D mcequirk_lookup_amd_quirkdata(c); > > I wonder if this wasn't better switched to the positive for (checking for= AMD). > This would the render the BUG_ON() above useless. > >> --- a/xen/arch/x86/cpu/mcheck/mce_intel.c >> +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c >> @@ -711,8 +711,8 @@ static bool mce_is_broadcast(struct cpuinfo_x86 *c) >> * DisplayFamily_DisplayModel encoding of 06H_EH and above, >> * a MCA signal is broadcast to all logical processors in the syste= m >> */ >> - if ( c->x86_vendor =3D=3D X86_VENDOR_INTEL && c->x86 =3D=3D 6 && >> - c->x86_model >=3D 0xe ) >> + if ( (cpu_vendor() & X86_VENDOR_INTEL) && >> + c->x86 =3D=3D 6 && c->x86_model >=3D 0xe ) > > Nit: Why the re-wrapping of lines? No good reason. I find it marginally easier to read. I can restore it's pre= vious state. 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Thu, 12 Feb 2026 07:52:52 -0800 (PST) Message-ID: <36d3244d-c1cb-4b55-ae7e-9dfa7c632a43@suse.com> Date: Thu, 12 Feb 2026 16:52:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/12] x86/acpi: Migrate vendor checks to cpu_vendor() To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20260206161539.209922-1-alejandro.garciavallejo@amd.com> <20260206161539.209922-10-alejandro.garciavallejo@amd.com> <3504e0eb-973c-427f-98ac-27801819e175@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 16:34, Alejandro Vallejo wrote: > On Thu Feb 12, 2026 at 12:52 PM CET, Jan Beulich wrote: >> On 06.02.2026 17:15, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/acpi/cpu_idle.c >>> +++ b/xen/arch/x86/acpi/cpu_idle.c >>> @@ -178,7 +178,7 @@ static void cf_check do_get_hw_residencies(void *arg) >>> struct cpuinfo_x86 *c = ¤t_cpu_data; >>> struct hw_residencies *hw_res = arg; >>> >>> - if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 ) >>> + if ( !(cpu_vendor() & X86_VENDOR_INTEL) || c->x86 != 6 ) >>> return; >>> >>> switch ( c->x86_model ) >>> @@ -915,8 +915,7 @@ void cf_check acpi_dead_idle(void) >>> mwait(cx->address, 0); >>> } >>> } >>> - else if ( (current_cpu_data.x86_vendor & >>> - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && >>> + else if ( cpu_vendor() & (X86_VENDOR_AMD | X86_VENDOR_HYGON) && >> >> While we certainly make that assumption, shouldn't you add explicit checks >> that APs' vendors match the BSP's, in order to be able to also replace >> current_cpu_data uses? Or do we have such a check, and I'm merely overlooking >> it? > > In generic_identify() > > c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); > if (boot_cpu_data.x86_vendor != c->x86_vendor) > printk(XENLOG_ERR "CPU%u vendor %u mismatch against BSP %u\n", > smp_processor_id(), c->x86_vendor, > boot_cpu_data.x86_vendor); > > But I'm not sure why this is not a panic() (I thought it was). Such check > triggering can only mean a Hypervisor bug and a security hole. > > Do you see a problem with s/printk/panic/ here? Well, yes and no. If we settle on the other panic() to remain, maybe this one would be okay-ish, too. Otoh anything in AP bringup would better not panic, but simply fail onlining that particular CPU. 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Hence, to prevent speculative execution causing one >>>>>> + * guest’s VS-stage translations to be cached under another guest’s >>>>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>>>> + * finally write the new vsatp value what will be done in >>>>>> + * p2m_handle_vmenter(). >>>>>> + */ >>>>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>>>> + >>>>>> + /* >>>>>> + * Nothing to do with HGATP as it is constructed each time when >>>>>> + * p2m_handle_vmenter() is called. >>>>>> + */ >>>>>> +} >>>>>> + >>>>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>>>>> +{ >>>>>> + if ( is_idle_vcpu(n) ) >>>>>> + return; >>>>>> + >>>>>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >>>>> How can the context switch of a vCPU affect domain-wide state? >>>> It is wrong to have is_ctxt_switch_finished per domain, it should be >>>> vCPU field. >>>> >>>>>> + /* >>>>>> + * Nothing to do with HGATP or VSATP, they will be set in >>>>>> + * p2_handle_vmenter() >>>>>> + */ >>>>> Why can this not be done here? >>>> As VMID should be calculated on VM enter. >>> And I didn't suggest to calculate a new one here. >>> >>>> We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), >>>> but then it is possible when vmid_handle_vmenter() will be called before VM entry >>>> VMID could be changed and it will be needed again to update HGATP and VSATP what >>>> will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one >>>> in p2m_handle_vmenter()). >>> Is this a concern resulting from particular logic you expect to appear >>> in the window between context switch and entering the guest, or is this >>> merely an abstract concern? >> If we will have VS TLB flush unconditionally in VM entry then it is merely an >> abstract concern. > Why would we want to flush unconditionally? To guarantee that a guest sees a clean switch with no possibilities of using a stale entry. For example, if VMID changed between context switch and VM entry we want to have flush, but considering your reply here ... > >> Otherwise, considering that speculation could happen between >> context switch and VM entry what could lead to that some entries were added to >> VS TLB flush with old VMID in the case if then in VM entry vCPU might receive new >> VMID. > I don't understand: Context switch leaves vsatp.MODE at zero. Nothing can end > up in the VS TLB in that case, aiui ... we just have different implementation in mind for p2m_ctxt_switch_to(). I thought that your suggestion is to set both HGATP and VSATP in p2m_ctx_switch_to() while calculate VMID in p2m_handle_vmenter() (with potential update of HGATP and VSATP if needed) and with such approach VSATP won't be zero after p2m_ctx_switch_to() and speculation could happen between context switch and VM entry. So just to clarify your expectations are: 1. p2m_ctxt_switch_from(p): p.vsatp = VSATP VSATP = 0 2. p2m_ctxt_swith_to(n): HGATP = construct_hgatp(...) 3. p2m_handle_vmenter(n): update VMID if necessary recalculate HGATP if necessary (c) update VSATP with n.VSATP if we here from context switch or with hardware VSATP if it wasn't context switch. do necessary flushes And at step (c) we can't base on that if VSATP is zero or not to understand that it is from context switch as it could that guest at the moment of trap (lets say some SBI call was requested by guest and Xen just handles it and return back to guest) also had VSTAP = 0. So it is needed to distinguish if context switch happened or not to properly deal with VSATP (and it was one of the reson to have introduced in this patch is_ctxt_switch_finished). ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:16:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:16:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229436.1535392 (Exim 4.92) (envelope-from ) id 1vqZN7-0003AU-TY; Thu, 12 Feb 2026 16:16:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229436.1535392; Thu, 12 Feb 2026 16:16:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZN7-0003AM-OS; Thu, 12 Feb 2026 16:16:53 +0000 Received: by outflank-mailman (input) for mailman id 1229436; Thu, 12 Feb 2026 16:16:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZN6-0002rO-Cb for xen-devel@lists.xenproject.org; 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This is > > > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > > > Linux 6.17.9 in this test. > > > > Not sure it's going to help a lot, but does using a PVH dom0 make any > > difference? > > Yes, it makes a difference. I end up with black screen as soon as dom0 > starts... And due to unrelated bug (in xhci console code?), I don't have > kernel messages :/ Hm, that's ... very helpful. We should fix the xhci stuff so we know what's going on there. Is the xhci bug also PVH only, or PV is equally affected? Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:17:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:17:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229443.1535401 (Exim 4.92) (envelope-from ) id 1vqZNS-0003dq-2z; Thu, 12 Feb 2026 16:17:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229443.1535401; Thu, 12 Feb 2026 16:17:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZNS-0003dj-0M; Thu, 12 Feb 2026 16:17:14 +0000 Received: by outflank-mailman (input) for mailman id 1229443; Thu, 12 Feb 2026 16:17:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZNQ-0002rO-Lq for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:17:12 +0000 Received: from mail145-20.atl61.mandrillapp.com (mail145-20.atl61.mandrillapp.com [198.2.145.20]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 48b1ac74-082e-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 17:17:11 +0100 (CET) Received: from pmta06.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail145-20.atl61.mandrillapp.com (Mailchimp) with ESMTP id 4fBgRn51QqzCf9RlL for ; Thu, 12 Feb 2026 16:17:09 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 61d738ca8a0c4527adf5a44c6489444c; Thu, 12 Feb 2026 16:17:09 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 48b1ac74-082e-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1770913029; x=1771183029; bh=RvnTYXu3DgG7UhKJGem5f0CYTeaphpS9JGOHjURlsz0=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=j40j2jQjy8tvKdEuQeYFU5qDZOTdAIw/8vz9GvP3OZv7iUPg8IioLAOgPLccuHT+V wP0P8hppBX5oyR8b+l6caAaazZuAkhN428Uvts247/yheZu02nP7k4tan5wSw61nNp ISlJSPiC7EUjw5YWtmJHPAdKq0CVytwmssJ8vU2RhczSUHLymOtlWSJ2OgTDMpUa9W Uco9XVAkj4EhQIK56pP5RIzYO+IyHo8WZ4yHRJ69nOJpFzciFnYlHVpduqFr1odg2Q qWD09ajLYBC8U7G+w1J8zuXgUpKXEdpaxuC2mmXUWWmpNC8f2VX/EGZqDnH1haQ0Rs JXWKtn/hveE2g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1770913029; x=1771173529; i=anthony.perard@vates.tech; bh=RvnTYXu3DgG7UhKJGem5f0CYTeaphpS9JGOHjURlsz0=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=wzEbBRR596oEjsVnW0ldvf8Khol7NmEjd0x/aasDqOkN3ytcfmOHuH6EH0FIsqBJE K64kMxLEYEtiQBpeUr151NirPHhNyEVz9t6pxdt3OOfHdIjkcpGiefVaz+JfazquBR gDtvwq9/j0BbQz7UoAfd4bHOsL0Oh+qvDYSFBxPbyZ5wSNOscydPSVdzOz1IRb3yV7 gnBL/pzarF9MGM0bIzZIuxtLYexZp3ZgxDxPkE2DV8B69qDtLaQFMA/vE3wtGvgD+a ua6aI6S3rwTI5XWx3Z+M/+VXokKK+yZbCZw3dWRFhC40255iraKGt5tMr6MEg2xlzl jYpyuNnd94i/Q== From: "Anthony PERARD" Subject: =?utf-8?Q?[XEN=20PATCH]=20libxl:=20Use=20fdset=20to=20provide=20migration=20saved=20state=20file?= X-Mailer: git-send-email 2.47.3 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1770913029109 To: xen-devel@lists.xenproject.org Cc: "Anthony PERARD" , "Juergen Gross" Message-Id: <20260212161700.35472-1-anthony.perard@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.61d738ca8a0c4527adf5a44c6489444c?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260212:md Date: Thu, 12 Feb 2026 16:17:09 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Since QEMU 11.0, `-incoming fd:` doesn't accept file descriptors of plain file, only sockets and pipe are accepted. This has been deprecated since QEMU 9.1 Instead, switch to use `-incoming file:` with an fdset. `incoming file:` schema seems to have been only introduced in QEMU 8.2. And `-incoming` isn't present in `query-command-line-options` QMP command output, so we'll use a check based on QEMU version instead. QEMU keep the FD open when added as a fdset, so close it in postconfig. And now we have two optional set QMP command to run after starting QEMU, for VNC and for migration. Signed-off-by: Anthony PERARD --- tools/libs/light/libxl_dm.c | 98 ++++++++++++++++++++++++++++--- tools/libs/light/libxl_internal.h | 1 + 2 files changed, 90 insertions(+), 9 deletions(-) diff --git a/tools/libs/light/libxl_dm.c b/tools/libs/light/libxl_dm.c index 511ec76a65..0fdeded92b 100644 --- a/tools/libs/light/libxl_dm.c +++ b/tools/libs/light/libxl_dm.c @@ -24,6 +24,8 @@ #include #include +#define QEMU_FDSET_SAVED_STATE 1 + static const char *libxl_tapif_script(libxl__gc *gc) { #if defined(__linux__) || defined(__FreeBSD__) @@ -1546,8 +1548,21 @@ static int libxl__build_device_model_args_new(libxl__gc *gc, } else { /* This file descriptor is meant to be used by QEMU */ *dm_state_fd = open(state->saved_state, O_RDONLY); - flexarray_append(dm_args, "-incoming"); - flexarray_append(dm_args, GCSPRINTF("fd:%d",*dm_state_fd)); + if (qemu_opts->use_incoming_file) { + flexarray_append_pair(dm_args, "-add-fd", + GCSPRINTF("fd=%d,set="STR(QEMU_FDSET_SAVED_STATE) + ",opaque=\"saved_state\"", + *dm_state_fd)); + flexarray_append_pair(dm_args, "-incoming", + "file:/dev/fdset/1"); + } else { + /* + * Passing a file descriptor of a plain file to `fd:` has + * been deprecated in QEMU 9.1. + */ + flexarray_append(dm_args, "-incoming"); + flexarray_append(dm_args, GCSPRINTF("fd:%d", *dm_state_fd)); + } } } for (i = 0; b_info->extra && b_info->extra[i] != NULL; i++) @@ -2631,6 +2646,12 @@ static void device_model_launch(libxl__egc *egc, libxl__dm_spawn_state *dmss, int rc); static void device_model_postconfig_chardev(libxl__egc *egc, libxl__ev_qmp *qmp, const libxl__json_object *response, int rc); +static void device_model_postconfig_do_remove_fdset(libxl__egc *egc, + libxl__ev_qmp *qmp, int rc); +static void device_model_postconfig_removed_fdset(libxl__egc *egc, + libxl__ev_qmp *qmp, const libxl__json_object *response, int rc); +static void device_model_postconfig_do_vnc(libxl__egc *egc, + libxl__ev_qmp *qmp, int rc); static void device_model_postconfig_vnc(libxl__egc *egc, libxl__ev_qmp *qmp, const libxl__json_object *response, int rc); static void device_model_postconfig_vnc_passwd(libxl__egc *egc, @@ -2832,6 +2853,13 @@ static void device_model_probe_cmdline(libxl__egc *egc, } } + /* + * Other checks based on QEMU's version + */ + if (libxl__qmp_ev_qemu_compare_version(qmp, 9, 1, 0) >= 0) { + dmss->qemu_opts.use_incoming_file = true; + } + qmp->callback = device_model_probe_quit; rc = libxl__ev_qmp_send(egc, qmp, "quit", NULL); if (rc) goto out; @@ -3152,7 +3180,6 @@ static void device_model_postconfig_chardev(libxl__egc *egc, { EGC_GC; libxl__dm_spawn_state *dmss = CONTAINER_OF(qmp, *dmss, qmp); - const libxl_vnc_info *vnc = libxl__dm_vnc(dmss->guest_config); const libxl__json_object *item = NULL; const libxl__json_object *o = NULL; int i = 0; @@ -3210,12 +3237,7 @@ static void device_model_postconfig_chardev(libxl__egc *egc, if (rc) goto out; } - if (!vnc) - goto out; - - qmp->callback = device_model_postconfig_vnc; - rc = libxl__ev_qmp_send(egc, qmp, "query-vnc", NULL); - if (rc) goto out; + device_model_postconfig_do_remove_fdset(egc, qmp, rc); /* must be last */ return; protocol_error: @@ -3227,6 +3249,64 @@ static void device_model_postconfig_chardev(libxl__egc *egc, device_model_postconfig_done(egc, dmss, rc); /* must be last */ } +static void device_model_postconfig_do_remove_fdset(libxl__egc *egc, + libxl__ev_qmp *qmp, int rc) +{ + EGC_GC; + libxl__dm_spawn_state *dmss = CONTAINER_OF(qmp, *dmss, qmp); + + /* + * If we used -add-fd for the `saved_state`, ask QEMU to close it. + */ + if (dmss->qemu_opts.use_incoming_file && dmss->build_state->saved_state) { + libxl__json_object *args = NULL; + qmp->callback = device_model_postconfig_removed_fdset; + libxl__qmp_param_add_integer(gc, &args, "fdset-id", + QEMU_FDSET_SAVED_STATE); + rc = libxl__ev_qmp_send(egc, qmp, "remove-fd", args); + if (rc) goto out; + return; + } + + device_model_postconfig_do_vnc(egc, qmp, rc); /* must be last */ + return; + +out: + device_model_postconfig_done(egc, dmss, rc); /* must be last */ +} + +static void device_model_postconfig_removed_fdset(libxl__egc *egc, + libxl__ev_qmp *qmp, const libxl__json_object *response, int rc) +{ + libxl__dm_spawn_state *dmss = CONTAINER_OF(qmp, *dmss, qmp); + + if (rc) goto out; + + device_model_postconfig_do_vnc(egc, qmp, rc); /* must be last */ + return; + +out: + device_model_postconfig_done(egc, dmss, rc); /* must be last */ +} + +static void device_model_postconfig_do_vnc(libxl__egc *egc, + libxl__ev_qmp *qmp, int rc) +{ + EGC_GC; + libxl__dm_spawn_state *dmss = CONTAINER_OF(qmp, *dmss, qmp); + const libxl_vnc_info *vnc = libxl__dm_vnc(dmss->guest_config); + + if (vnc) { + qmp->callback = device_model_postconfig_vnc; + rc = libxl__ev_qmp_send(egc, qmp, "query-vnc", NULL); + if (rc) goto out; + return; + } + +out: + device_model_postconfig_done(egc, dmss, rc); /* must be last */ +} + static void device_model_postconfig_vnc(libxl__egc *egc, libxl__ev_qmp *qmp, const libxl__json_object *response, int rc) { diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index b65e0064b9..7d916ee64a 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4094,6 +4094,7 @@ typedef struct libxl__qemu_available_opts libxl__qemu_available_opts; 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Thu, 12 Feb 2026 08:20:30 -0800 (PST) Message-ID: <67e6cdb3-33d1-44aa-94ea-8e26def9f8e8@suse.com> Date: Thu, 12 Feb 2026 17:20:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0e6f450d64ce17f504d73c3429c8e8a9ced0cf06.1770739000.git.oleksii.kurochko@gmail.com> <7cec918c-bd58-4013-9ec2-d43ff7afcd7c@suse.com> <099768df-ec44-454f-8a9e-4897d81309f9@gmail.com> <4f9953ae-8722-4971-a214-6c40f7f5859a@gmail.com> <45e8aa5a-842b-49d0-8744-71295cf0a0b6@suse.com> <909969c1-1d75-4f45-a96b-54c1c28839df@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <909969c1-1d75-4f45-a96b-54c1c28839df@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 17:16, Oleksii Kurochko wrote: > > On 2/12/26 4:42 PM, Jan Beulich wrote: >> On 12.02.2026 15:47, Oleksii Kurochko wrote: >>> On 2/12/26 1:56 PM, Jan Beulich wrote: >>>> On 12.02.2026 12:57, Oleksii Kurochko wrote: >>>>> On 2/12/26 11:16 AM, Jan Beulich wrote: >>>>>> On 10.02.2026 17:36, Oleksii Kurochko wrote: >>>>>>> --- a/xen/arch/riscv/p2m.c >>>>>>> +++ b/xen/arch/riscv/p2m.c >>>>>>> @@ -1434,3 +1434,126 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>>>>>> >>>>>>> return get_page(page, p2m->domain) ? page : NULL; >>>>>>> } >>>>>>> + >>>>>>> +void p2m_ctxt_switch_from(struct vcpu *p) >>>>>>> +{ >>>>>>> + if ( is_idle_vcpu(p) ) >>>>>>> + return; >>>>>>> + >>>>>>> + /* >>>>>>> + * No mechanism is provided to atomically change vsatp and hgatp >>>>>>> + * together. Hence, to prevent speculative execution causing one >>>>>>> + * guest’s VS-stage translations to be cached under another guest’s >>>>>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>>>>> + * finally write the new vsatp value what will be done in >>>>>>> + * p2m_handle_vmenter(). >>>>>>> + */ >>>>>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>>>>> + >>>>>>> + /* >>>>>>> + * Nothing to do with HGATP as it is constructed each time when >>>>>>> + * p2m_handle_vmenter() is called. >>>>>>> + */ >>>>>>> +} >>>>>>> + >>>>>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>>>>>> +{ >>>>>>> + if ( is_idle_vcpu(n) ) >>>>>>> + return; >>>>>>> + >>>>>>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >>>>>> How can the context switch of a vCPU affect domain-wide state? >>>>> It is wrong to have is_ctxt_switch_finished per domain, it should be >>>>> vCPU field. >>>>> >>>>>>> + /* >>>>>>> + * Nothing to do with HGATP or VSATP, they will be set in >>>>>>> + * p2_handle_vmenter() >>>>>>> + */ >>>>>> Why can this not be done here? >>>>> As VMID should be calculated on VM enter. >>>> And I didn't suggest to calculate a new one here. >>>> >>>>> We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), >>>>> but then it is possible when vmid_handle_vmenter() will be called before VM entry >>>>> VMID could be changed and it will be needed again to update HGATP and VSATP what >>>>> will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one >>>>> in p2m_handle_vmenter()). >>>> Is this a concern resulting from particular logic you expect to appear >>>> in the window between context switch and entering the guest, or is this >>>> merely an abstract concern? >>> If we will have VS TLB flush unconditionally in VM entry then it is merely an >>> abstract concern. >> Why would we want to flush unconditionally? > > To guarantee that a guest sees a clean switch with no possibilities of > using a stale entry. For example, if VMID changed between context switch > and VM entry we want to have flush, but considering your reply here ... > >> >>> Otherwise, considering that speculation could happen between >>> context switch and VM entry what could lead to that some entries were added to >>> VS TLB flush with old VMID in the case if then in VM entry vCPU might receive new >>> VMID. >> I don't understand: Context switch leaves vsatp.MODE at zero. Nothing can end >> up in the VS TLB in that case, aiui > > ... we just have different implementation in mind for p2m_ctxt_switch_to(). > > I thought that your suggestion is to set both HGATP and VSATP in p2m_ctx_switch_to() > while calculate VMID in p2m_handle_vmenter() (with potential update of HGATP and VSATP > if needed) and with such approach VSATP won't be zero after p2m_ctx_switch_to() and > speculation could happen between context switch and VM entry. > > So just to clarify your expectations are: So just to clarify from my side that I don't have any expectations; I merely want to suggest to start with as simple a model as possible, for its correctness to be easy to prove. Jan > 1. p2m_ctxt_switch_from(p): > p.vsatp = VSATP > VSATP = 0 > > 2. p2m_ctxt_swith_to(n): > HGATP = construct_hgatp(...) > > 3. p2m_handle_vmenter(n): > update VMID if necessary > > recalculate HGATP if necessary > > (c) update VSATP with n.VSATP if we here from context switch > or with hardware VSATP if it wasn't context switch. > > do necessary flushes > > And at step (c) we can't base on that if VSATP is zero or not to understand that > it is from context switch as it could that guest at the moment of trap (lets say > some SBI call was requested by guest and Xen just handles it and return back > to guest) also had VSTAP = 0. > So it is needed to distinguish if context switch happened or not to properly deal > with VSATP (and it was one of the reson to have introduced in this patch > is_ctxt_switch_finished). > > ~ Oleksii > From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229473.1535422 (Exim 4.92) (envelope-from ) id 1vqZRQ-0006GG-TA; Thu, 12 Feb 2026 16:21:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229473.1535422; Thu, 12 Feb 2026 16:21:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRQ-0006G8-OE; Thu, 12 Feb 2026 16:21:20 +0000 Received: by outflank-mailman (input) for mailman id 1229473; Thu, 12 Feb 2026 16:21:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRO-0006Fi-O2 for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:18 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id db408425-082e-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 17:21:16 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-4376acce52eso35131f8f.1 for ; Thu, 12 Feb 2026 08:21:16 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Generally it is indepenent patch series from [1] and [2] but depends on which patches will go first it could be some merge conflicts. At the moment, patch series is rebased on top of [2]: staging -> [1] -> [2] -> current patch series. [1] https://lore.kernel.org/xen-devel/cover.1770650552.git.oleksii.kurochko@gmail.com/T/#t [2] https://lore.kernel.org/xen-devel/cover.1770739000.git.oleksii.kurochko@gmail.com/T/#t Oleksii Kurochko (6): xen/riscv: implement get_page_from_gfn() xen/riscv: implement copy_to_guest_phys() xen/riscv: add zImage kernel loading support xen: move declaration of fw_unreserved_regions() to common header xen: move domain_use_host_layout() to common header xen/riscv: enable DOMAIN_BUILD_HELPERS xen/arch/arm/include/asm/domain.h | 14 -- xen/arch/arm/include/asm/setup.h | 3 - xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/Makefile | 2 + xen/arch/riscv/guestcopy.c | 112 ++++++++++++++++ xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/include/asm/guest_access.h | 7 + xen/arch/riscv/include/asm/p2m.h | 11 +- xen/arch/riscv/kernel.c | 156 ++++++++++++++++++++++ xen/arch/riscv/p2m.c | 34 +++++ xen/include/public/arch-riscv.h | 8 ++ xen/include/xen/bootinfo.h | 4 + xen/include/xen/domain.h | 16 +++ 13 files changed, 358 insertions(+), 23 deletions(-) create mode 100644 xen/arch/riscv/guestcopy.c create mode 100644 xen/arch/riscv/kernel.c -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229474.1535427 (Exim 4.92) (envelope-from ) id 1vqZRR-0006ID-4V; Thu, 12 Feb 2026 16:21:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229474.1535427; Thu, 12 Feb 2026 16:21:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRQ-0006Gx-Vf; Thu, 12 Feb 2026 16:21:20 +0000 Received: by outflank-mailman (input) for mailman id 1229474; Thu, 12 Feb 2026 16:21:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRP-0006Fi-Dy for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:19 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id dbe61651-082e-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 17:21:17 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-4359108fd24so27355f8f.2 for ; Thu, 12 Feb 2026 08:21:17 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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For translated guests, this is implemented as a wrapper around p2m_get_page_from_gfn(). For DOMID_XEN, which is not auto-translated, provide a 1:1 RAM/MMIO mapping and perform the required validation and reference counting. The function is implemented out-of-line rather than as a static inline, to avoid header ordering issues where struct domain is incomplete when asm/p2m.h is included, leading to build failures: In file included from ./arch/riscv/include/asm/domain.h:10, from ./include/xen/domain.h:16, from ./include/xen/sched.h:11, from ./include/xen/event.h:12, from common/cpu.c:3: ./arch/riscv/include/asm/p2m.h: In function 'get_page_from_gfn': ./arch/riscv/include/asm/p2m.h:50:33: error: invalid use of undefined type 'struct domain' 50 | #define p2m_get_hostp2m(d) (&(d)->arch.p2m) | ^~ ./arch/riscv/include/asm/p2m.h:180:38: note: in expansion of macro 'p2m_get_hostp2m' 180 | return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); | ^~~~~~~~~~~~~~~ make[2]: *** [Rules.mk:253: common/cpu.o] Error 1 make[1]: *** [build.mk:72: common] Error 2 make: *** [Makefile:623: xen] Error 2 Signed-off-by: Oleksii Kurochko --- Does it make sense to make this function almost fully generic? It looks like most of the logic here is architecture-independent and identical across architectures, except for the following points: 1. ``` if ( likely(d != dom_xen) ) ``` This could be made generic by introducing paging_mode_translate() for ARM and defining it as `(d != dom_xen)` there. 2. ``` if ( t ) *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; ``` Here, only `p2m_mmio_direct_io` appears to be architecture-specific. This could be abstracted via a helper such as `dom_io_p2m_type()` and used here instead. --- --- xen/arch/riscv/include/asm/p2m.h | 8 ++------ xen/arch/riscv/p2m.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 0cdd3dc44683..c68494593fd9 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -171,12 +171,8 @@ typedef unsigned int p2m_query_t; #define P2M_ALLOC (1u<<0) /* Populate PoD and paged-out entries */ #define P2M_UNSHARE (1u<<1) /* Break CoW sharing */ -static inline struct page_info *get_page_from_gfn( - struct domain *d, unsigned long gfn, p2m_type_t *t, p2m_query_t q) -{ - BUG_ON("unimplemented"); - return NULL; -} +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, + p2m_type_t *t, p2m_query_t q); static inline void memory_type_changed(struct domain *d) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 275c38020ae2..f5b03e1e3264 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) flush_tlb_guest_local(); } } + +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, + p2m_type_t *t, p2m_query_t q) +{ + struct page_info *page; + + /* + * Special case for DOMID_XEN as it is the only domain so far that is + * not auto-translated. + */ + if ( likely(d != dom_xen) ) + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); + + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ + + if ( t ) + *t = p2m_invalid; + + page = mfn_to_page(_mfn(gfn)); + + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) + return NULL; + + if ( t ) + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; + + return page; +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229475.1535433 (Exim 4.92) (envelope-from ) id 1vqZRR-0006MV-EP; Thu, 12 Feb 2026 16:21:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229475.1535433; Thu, 12 Feb 2026 16:21:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRR-0006Ku-60; Thu, 12 Feb 2026 16:21:21 +0000 Received: by outflank-mailman (input) for mailman id 1229475; Thu, 12 Feb 2026 16:21:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRQ-0006Fi-Kf for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:20 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id dc8a1bbe-082e-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 17:21:18 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so32425e9.2 for ; Thu, 12 Feb 2026 08:21:18 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Add a generic copy_guest() helper for copying to and from guest physical (and potentially virtual addresses in the future), and implement translate_get_page() to translate a guest physical address into a struct page_info via the domain p2m. Compared to the Arm code: - Drop COPY_flush_dcache(), as no such use cases exist on RISC-V. - Do not implement the linear mapping case, which is currently unused. - Use PAGE_OFFSET() to initialize the local offset variable in copy_guest(). Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/guestcopy.c | 112 ++++++++++++++++++++++ xen/arch/riscv/include/asm/guest_access.h | 7 ++ 3 files changed, 120 insertions(+) create mode 100644 xen/arch/riscv/guestcopy.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 7439d029cc45..90210799e038 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -3,6 +3,7 @@ obj-y += cpufeature.o obj-y += domain.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o +obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o diff --git a/xen/arch/riscv/guestcopy.c b/xen/arch/riscv/guestcopy.c new file mode 100644 index 000000000000..19b681c30b1b --- /dev/null +++ b/xen/arch/riscv/guestcopy.c @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#define COPY_from_guest (0U << 0) +#define COPY_to_guest (1U << 0) +#define COPY_ipa (0U << 1) +#define COPY_linear (1U << 1) + +typedef union +{ + struct + { + struct vcpu *v; + } gva; + + struct + { + struct domain *d; + } gpa; +} copy_info_t; + +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) + +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, + bool linear, bool write) +{ + p2m_type_t p2mt; + struct page_info *page; + + if ( linear ) + BUG_ON("unimplemeted\n"); + + page = get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_ALLOC); + + if ( !page ) + return NULL; + + if ( !p2m_is_ram(p2mt) ) + { + put_page(page); + return NULL; + } + + return page; +} + +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, + copy_info_t info, unsigned int flags) +{ + unsigned int offset = PAGE_OFFSET(addr); + + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); + + while ( len ) + { + void *p; + unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset); + struct page_info *page; + + page = translate_get_page(info, addr, flags & COPY_linear, + flags & COPY_to_guest); + if ( page == NULL ) + return len; + + p = __map_domain_page(page); + p += offset; + if ( flags & COPY_to_guest ) + { + /* + * buf will be NULL when the caller request to zero the + * guest memory. + */ + if ( buf ) + memcpy(p, buf, size); + else + memset(p, 0, size); + } + else + memcpy(buf, p, size); + + unmap_domain_page(p - offset); + put_page(page); + len -= size; + buf += size; + addr += size; + + /* + * After the first iteration, guest virtual address is correctly + * aligned to PAGE_SIZE. + */ + offset = 0; + } + + return 0; +} + +unsigned long copy_to_guest_phys(struct domain *d, + paddr_t gpa, + void *buf, + unsigned int len) +{ + return copy_guest(buf, gpa, len, GPA_INFO(d), + COPY_to_guest | COPY_ipa); +} diff --git a/xen/arch/riscv/include/asm/guest_access.h b/xen/arch/riscv/include/asm/guest_access.h index 7cd51fbbdead..024e29b4c9f9 100644 --- a/xen/arch/riscv/include/asm/guest_access.h +++ b/xen/arch/riscv/include/asm/guest_access.h @@ -2,6 +2,10 @@ #ifndef ASM__RISCV__GUEST_ACCESS_H #define ASM__RISCV__GUEST_ACCESS_H +#include + +struct domain; + unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len); unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len); unsigned long raw_clear_guest(void *to, unsigned int len); @@ -18,6 +22,9 @@ unsigned long raw_clear_guest(void *to, unsigned int len); #define guest_handle_okay(hnd, nr) (1) #define guest_handle_subrange_okay(hnd, first, last) (1) +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned int len); + #endif /* ASM__RISCV__GUEST_ACCESS_H */ /* * Local variables: -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229476.1535450 (Exim 4.92) (envelope-from ) id 1vqZRS-0006rv-In; Thu, 12 Feb 2026 16:21:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229476.1535450; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43783e5c635sm13938426f8f.37.2026.02.12.08.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Feb 2026 08:21:18 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: dd4090f0-082e-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770913279; x=1771518079; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uZVTmyjQ+cfxWV4H5phu2iSv8MlikEWciPmm+cING7w=; b=mGB4J1ukpJXKn/SE8tfC/OH2RlYPGzz3CgXzDysajvgU7PFByVsBppUYMmvbydeHRE QUtU0tRlSLqo3r8mdmeA+o2qmfHChj06KZLy5mgP8cFTEs8J77PiWb8H5iipFC/5HyG6 OfZp4nGbd6nRRaWTH9wie7cBaBhzIrXrhjEIbaEftHmWZYIBo+wJSLOaOC8gnNXZsbQU 5afFTUqyGPSgGYJ0Oj5FxP0ky9v3xbEiadf4ygbi64fBoSaUOhZ3V16P9JwMo872wy9P IUKLM6sO59JuQ73BUYVMIucP0bXgYnGUSQZHqvboYWoPLOOSIaGfiebUnaYh21AzfYL7 CFIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770913279; x=1771518079; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=uZVTmyjQ+cfxWV4H5phu2iSv8MlikEWciPmm+cING7w=; b=jawL4XaYggIpdgV4D6NGdVQU4H+lcjkbXA7zrfQUNfp5tpyAZnM2VFrExc3e3QeQx1 UJto1/42m6odPQo+2L8NGfopL3QgvBRCYLlC0ijiwGj7QFza/OmNHmgX/1fr5wVm8gVU IfKFgg3AD9MxpZIypsrB+pC5HK2Wy7Z+4qYM3D1y+ZixaEgoh+D4bBKFC/f3/zC/pMQ8 VwF1VW60oX1W3kQrdezu69F+Xr71tfOkRzZZc/7wt8Lyuz+2KTVcjTgWVk7jEI4jvJy1 g//lwuMEQVKVjPAxosJVBpZee7Bk3CbNwv+RcCJeDTPL3UsDsWtJvCipNwEA3sav1/X9 7ciA== X-Gm-Message-State: AOJu0YwsrVtfL+OTIzeXfoJjayExBR8pvLF3SWL1ZUhP4CEOwN6IVX5Q iSCSkrxxtKzlzFkxhxvTIMjRdKvb+CUqkbWqa9VNoVuOFLqS0KUsvWZqDRlNpQar X-Gm-Gg: AZuq6aILfi1pU5GfgQPqhYe7ivUxDdKMewDnW3rT4PzKBbjbcPtmCZyDvAFbpPZ2UxJ d6tQAlxfmWbiLsHh7YQyVEZyAZyNlulLm2lThOHUqhCxq91Qx5kbGBwOkDbRgQnuZqSuEXLh9Y6 cpwDw5f4Zmfg0+Muxn1Dizwv5N7pHG0wguvvJcpSyPBWuT/0awzuS0ZfJy+z25rUIpuAOwg9jiP aA7kCQAisI9WY/i4bb2FzUJCMscGDN19K+tGK1kBuIoTbQdkZrsH3n/INdoE1feFjHKFAcCiCGS D4mPquzmSd6P2D5dQarOyEB2xqideO69elpXAPIgOahDMcyhgKvWp7j6u7EErbk9P2Ss3op5HIt 892zxT6iil8BnwnKGdOl0JXkPAW5loKdwKBhVB3BCJN99c5yfBasVjjKGxfKiiHLD542mDO6U4N qa3ESSk7FTzp2sc9hCIys/eanR0mOYnnk0fAjVWPuMKUW/WvGH1In0t0EebFH7oGNwVA== X-Received: by 2002:a05:600c:83c8:b0:46e:4a13:e6c6 with SMTP id 5b1f17b1804b1-4836570ec0cmr40317005e9.19.1770913278999; Thu, 12 Feb 2026 08:21:18 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 3/6] xen/riscv: add zImage kernel loading support Date: Thu, 12 Feb 2026 17:21:04 +0100 Message-ID: <308c5bc1de15b23c643d48f975799739f44dde8d.1770821989.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce support for loading a Linux zImage kernel on RISC-V. Note that if panic() is used instead of returning an error as common code doesn't expect to have return code and it is something that should be done separately. This prepares the RISC-V port for booting Linux guests using the common domain build infrastructure. The code is based on Xen Arm code. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/config.h | 13 +++ xen/arch/riscv/kernel.c | 156 ++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 xen/arch/riscv/kernel.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 90210799e038..2e15f894fdd4 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -7,6 +7,7 @@ obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o +obj-y += kernel.o obj-y += mm.o obj-y += p2m.o obj-y += paging.o diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 86a95df018b5..d24b54d656b8 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -152,6 +152,19 @@ extern unsigned long phys_offset; /* = load_start - XEN_VIRT_START */ #endif +/* + * KERNEL_LOAD_ADDR_ALIGNMENT is defined based on paragraph of + * "Kernel location" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + */ +#if defined(CONFIG_RISCV_32) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(4) +#elif defined(CONFIG_RISCV_64) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(2) +#else +#error "Define KERNEL_LOAD_ADDR_ALIGNMENT" +#endif + #endif /* ASM__RISCV__CONFIG_H */ /* * Local variables: diff --git a/xen/arch/riscv/kernel.c b/xen/arch/riscv/kernel.c new file mode 100644 index 000000000000..f91e9ada8a9c --- /dev/null +++ b/xen/arch/riscv/kernel.c @@ -0,0 +1,156 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define ZIMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ + +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, + paddr_t kernend) +{ + const struct boot_module *mod = info->bd.initrd; + + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), MB(2)); + const paddr_t modsize = initrd_len + dtb_len; + + const paddr_t ramsize = info->mem.bank[0].size; + const paddr_t kernsize = ROUNDUP(kernend, MB(2)) - kernbase; + + if ( modsize + kernsize > ramsize ) + panic("Not enough memory in the first bank for the kernel+dtb+initrd\n"); + + info->dtb_paddr = ROUNDUP(kernend, MB(2)); + + info->initrd_paddr = info->dtb_paddr + dtb_len; +} + +static paddr_t __init kernel_zimage_place(struct kernel_info *info) +{ + paddr_t load_addr; + + /* + * At the moment, RISC-V's Linux kernel should be always position + * independent based on "Per-MMU execution" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution + * + * But just for the case when RISC-V's Linux kernel isn't position + * indepenet it is needed to take load address from + * info->zimage.start. + * + * If `start` is zero, the zImage is position independent. */ + if ( likely(!info->zimage.start) ) + /* + * According to boot.rst kernel load address should be properly + * aligned: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + */ + load_addr = ROUNDUP(info->mem.bank[0].start, KERNEL_LOAD_ADDR_ALIGNMENT); + else + load_addr = info->zimage.start; + + return load_addr; +} + +static void __init kernel_zimage_load(struct kernel_info *info) +{ + int rc; + paddr_t load_addr = kernel_zimage_place(info); + paddr_t paddr = info->zimage.kernel_addr; + paddr_t len = info->zimage.len; + void *kernel; + + info->entry = load_addr; + + place_modules(info, load_addr, load_addr + len); + + printk("Loading zImage from %"PRIpaddr" to %"PRIpaddr"-%"PRIpaddr"\n", + paddr, load_addr, load_addr + len); + + kernel = ioremap_wc(paddr, len); + + if ( !kernel ) + panic("Unable to map kernel\n"); + + /* Move kernel to proper location in guest phys map */ + rc = copy_to_guest_phys(info->bd.d, load_addr, kernel, len); + + if ( rc ) + panic("Unable to copy kernel to proper guest location\n"); + + iounmap(kernel); +} + +/* Check if the image is a 64-bit Image */ +static int __init kernel_zimage64_probe(struct kernel_info *info, + paddr_t addr, paddr_t size) +{ + /* riscv/boot-image-header.rst */ + struct { + u32 code0; /* Executable code */ + u32 code1; /* Executable code */ + u64 text_offset; /* Image load offset, little endian */ + u64 image_size; /* Effective Image size, little endian */ + u64 flags; /* kernel flags, little endian */ + u32 version; /* Version of this header */ + u32 res1; /* Reserved */ + u64 res2; /* Reserved */ + u64 magic; /* Deprecated: Magic number, little endian, "RISCV" */ + u32 magic2; /* Magic number 2, little endian, "RSC\x05" */ + u32 res3; /* Reserved for PE COFF offset */ + } zimage; + uint64_t start, end; + + if ( size < sizeof(zimage) ) + return -EINVAL; + + copy_from_paddr(&zimage, addr, sizeof(zimage)); + + /* Magic v1 is deprecated and may be removed. Only use v2 */ + if ( zimage.magic2 != ZIMAGE64_MAGIC_V2 ) + return -EINVAL; + + /* Currently there is no length in the header, so just use the size */ + start = 0; + end = size; + + /* + * Given the above this check is a bit pointless, but leave it + * here in case someone adds a length field in the future. + */ + if ( (end - start) > size ) + return -EINVAL; + + info->zimage.kernel_addr = addr; + info->zimage.len = end - start; + info->zimage.text_offset = zimage.text_offset; + info->zimage.start = 0; + + info->load = kernel_zimage_load; + + return 0; +} + +int __init kernel_zimage_probe(struct kernel_info *info, paddr_t addr, + paddr_t size) +{ + int rc; + +#ifdef CONFIG_RISCV_64 + rc = kernel_zimage64_probe(info, addr, size); + if (rc < 0) +#endif + panic("only RISC-V 64 is supported\n"); + + return rc; +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229477.1535462 (Exim 4.92) (envelope-from ) id 1vqZRU-0007DA-8q; Thu, 12 Feb 2026 16:21:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229477.1535462; Thu, 12 Feb 2026 16:21:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRU-0007D3-3K; Thu, 12 Feb 2026 16:21:24 +0000 Received: by outflank-mailman (input) for mailman id 1229477; Thu, 12 Feb 2026 16:21:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRR-0005jV-QO for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:21 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id dded50a9-082e-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 17:21:21 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4376de3f128so41886f8f.0 for ; Thu, 12 Feb 2026 08:21:21 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Signed-off-by: Oleksii Kurochko --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/bootinfo.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index 899e33925ca4..0d29b46ea52b 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -43,9 +43,6 @@ int acpi_make_efi_nodes(void *fdt, struct membank tbl_add[]); void create_dom0(void); void discard_initial_modules(void); -void fw_unreserved_regions(paddr_t s, paddr_t e, - void (*cb)(paddr_t ps, paddr_t pe), - unsigned int first); void init_pdx(void); void setup_mm(void); diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index f834f1957155..dbf492c2e36e 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -210,4 +210,8 @@ static inline struct membanks *membanks_xzalloc(unsigned int nr, return banks; } +void fw_unreserved_regions(paddr_t s, paddr_t e, + void (*cb)(paddr_t ps, paddr_t pe), + unsigned int first); + #endif /* XEN_BOOTINFO_H */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229478.1535466 (Exim 4.92) (envelope-from ) id 1vqZRU-0007Ef-HJ; Thu, 12 Feb 2026 16:21:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229478.1535466; Thu, 12 Feb 2026 16:21:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRU-0007E5-Bf; Thu, 12 Feb 2026 16:21:24 +0000 Received: by outflank-mailman (input) for mailman id 1229478; Thu, 12 Feb 2026 16:21:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRT-0006Fi-Su for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:23 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id de98d959-082e-11f1-9ccf-f158ae23cfc8; Thu, 12 Feb 2026 17:21:22 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4834826e555so63095e9.2 for ; Thu, 12 Feb 2026 08:21:22 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Wrap domain_use_host_layout() with "#ifndef domain_use_host_layout" to allow architectures to override it if needed. No functional change. Signed-off-by: Oleksii Kurochko --- xen/arch/arm/include/asm/domain.h | 14 -------------- xen/include/xen/domain.h | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index 758ad807e461..1a04fe658c97 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -29,20 +29,6 @@ enum domain_type { #define is_64bit_domain(d) (0) #endif -/* - * Is the domain using the host memory layout? - * - * Direct-mapped domain will always have the RAM mapped with GFN == MFN. - * To avoid any trouble finding space, it is easier to force using the - * host memory layout. - * - * The hardware domain will use the host layout regardless of - * direct-mapped because some OS may rely on a specific address ranges - * for the devices. - */ -#define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ - is_hardware_domain(d)) - struct vtimer { struct vcpu *v; int irq; diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 93c0fd00c1d7..40487825ad91 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -62,6 +62,22 @@ void domid_free(domid_t domid); #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) +/* + * Is the domain using the host memory layout? + * + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. + * To avoid any trouble finding space, it is easier to force using the + * host memory layout. + * + * The hardware domain will use the host layout regardless of + * direct-mapped because some OS may rely on a specific address ranges + * for the devices. + */ +#ifndef domain_use_host_layout +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ + is_hardware_domain(d)) +#endif + /* * Arch-specifics. */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:21:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:21:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229479.1535481 (Exim 4.92) (envelope-from ) id 1vqZRV-0007dM-QV; Thu, 12 Feb 2026 16:21:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229479.1535481; Thu, 12 Feb 2026 16:21:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRV-0007ce-Lh; Thu, 12 Feb 2026 16:21:25 +0000 Received: by outflank-mailman (input) for mailman id 1229479; Thu, 12 Feb 2026 16:21:24 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqZRU-0005jV-1g for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 16:21:24 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id df39c846-082e-11f1-b162-2bf370ae4941; Thu, 12 Feb 2026 17:21:23 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-4359a16a400so40458f8f.1 for ; Thu, 12 Feb 2026 08:21:23 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43783e5c635sm13938426f8f.37.2026.02.12.08.21.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Feb 2026 08:21:22 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: df39c846-082e-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770913282; x=1771518082; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=boVLzqeW8TB014ODFlHRq6lW2fSrAobM0ZB96ecUZjQ=; b=YhKYtxRHG6R5fVNwC1+ZSp1sWgFvijRu81Nvhx3JxTN6mC3olsA4TK2uwBJC3btsOp vSqTySyl9A9cajYipCRYQS+FlBPkYQdvI8KaNXtAcd/+5xxs0uAx6nTc19i/Z1Sd5dLB xzwnLBhFqdLgKuH48oLHxJzRSWnWWn7WZRL1Z2h6rdPF/ZD863dyqTVCCku6vaMVE/Ad BD4Oa09xgmoE/Or8TYiwrE0YEy+MggzXdi8cPl39I5+bEk1FORw3pndAdqLZ/Yukons7 CggRiFEdCVqpF1KxrQsINUBlmQyqIURpZxHjhPXDArZpOHWQJn6O4F9pwdotjtUgEAkR kzjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770913282; x=1771518082; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=boVLzqeW8TB014ODFlHRq6lW2fSrAobM0ZB96ecUZjQ=; b=gxPlZBDVsvL67LBff53g9AvO1Qzxhi2RnbUubvqKqGCgL16b1DAxXeNfYqUYkx4/zf w8PtRF5FsRUkPiw7XB6/9OxrgbDSkx1VvRKyFyxnr+lGlTuLuxhMEjvycZzA983dh6q6 kOnwW022brsAvQaOtxriIOBPgLd1KGfj5Se3Jw+kmMGHeVI2F3UG29TmxImZAJ1dbYoP lfDrT2TG8L+M/UU1oVchhBTQINAWQO3kclHfknz7HW9pLk4neAUWEjEyBRWpSO1Q+Qvt 7UAc+YH8mqm5f93UASFSBXFxKzLZwdY4agSmbEQ1fTq+TqoEAVTWLkzGnmXeVU/tbHjx Z9bw== X-Gm-Message-State: AOJu0YxHaF3TYkuO6smXdj6DoQtzrvjbU+IyRa26auFfXoUcCi1hJTHU K+qtL+chfSId9G4QQcMcMHm5f/snslOBOC73hOFStSYwGZxC97Dyqt7XmZEGzklR X-Gm-Gg: AZuq6aKMjh8m0hcXrpX0i5UL/fFjlykWpPX2wIYVfd8DTryMejky9g+OF2klZrXgs0S q7bPcS9ztiILJvOKueMhc/4QhrUDJuwmtc6Lhn6KfyATyoRjAtcJktb48ZYEsGxpQQTkbIjcu8T SdVSHs6cPb2nLIHEpi1oF2ctSZD1lRF2P3msx8RX8PuagZbgU9cWff0q6UTGuM0yKTkIZhENKCD vJw/xlJAzhu9ZbpXWV3FHmidqR8nZIyeumAS26/SfyQU4LKz6WmdYRF91shVabha/z4tiSqGGiB DaA18GDYIx/Tu8YpqqW5C/xd36ix63okGIUvJNZxPG63PPBK5c1sgW4+BtAEgm2p85je3wVoqKg nWQrQWQtcU7oMWZ5ilW/vJUxVYR9CXpphggzvqPHtfP5Xy3wmLigZ/teGCfxZK/gHU4odSsBOfw f0mECVVi7cv2ZfJ3B5+XljxlVQJxw1OJ2FmJXEHApulefolKeFiPsUygOtzgsjze95j3Mx3mIeo e8I X-Received: by 2002:a5d:5d8a:0:b0:436:3732:cfa6 with SMTP id ffacd0b85a97d-4378f16d7ffmr5166470f8f.53.1770913282360; Thu, 12 Feb 2026 08:21:22 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 6/6] xen/riscv: enable DOMAIN_BUILD_HELPERS Date: Thu, 12 Feb 2026 17:21:07 +0100 Message-ID: <6ab04f3584e45795dc82c25f62a6c950913f5c7d.1770821989.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To enable DOMAIN_BUILD_HELPERS for RISC-V the following is introduced: - Add a global p2m_ipa_bits variable, initialized to PADDR_BITS, to represent the maximum supported IPA size as find_unallocated_memory() requires it. - Define default guest RAM layout parameters in the public RISC-V header as it is required by allocate_memory(). Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/include/asm/p2m.h | 3 +++ xen/arch/riscv/p2m.c | 6 ++++++ xen/include/public/arch-riscv.h | 8 ++++++++ 4 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 89876b32175d..12b337365f1f 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME select GENERIC_UART_INIT diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index c68494593fd9..083549ef9640 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -44,6 +44,9 @@ #define P2M_LEVEL_MASK(p2m, lvl) \ (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) +/* Holds the bit size of IPAs in p2m tables */ +extern unsigned int p2m_ipa_bits; + #define paddr_bits PADDR_BITS /* Get host p2m table */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index f5b03e1e3264..62bd8a2f602f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -51,6 +51,12 @@ static struct gstage_mode_desc __ro_after_init max_gstage_mode = { .name = "Bare", }; +/* + * Set to the maximum configured support for IPA bits, so the number of IPA bits can be + * restricted by external entity (e.g. IOMMU). + */ +unsigned int __read_mostly p2m_ipa_bits = PADDR_BITS; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); static inline void p2m_free_metadata_page(struct p2m_domain *p2m, diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 360d8e6871ba..91cee3096041 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -50,6 +50,14 @@ typedef uint64_t xen_ulong_t; #if defined(__XEN__) || defined(__XEN_TOOLS__) +#define GUEST_RAM_BANKS 1 + +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) + +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } + struct vcpu_guest_context { }; typedef struct vcpu_guest_context vcpu_guest_context_t; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:22:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229520.1535492 (Exim 4.92) (envelope-from ) id 1vqZSk-0001LS-8v; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="jRRBc1ZgOtYQSbU+" Content-Disposition: inline In-Reply-To: --jRRBc1ZgOtYQSbU+ Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 12 Feb 2026 17:22:34 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: xen-devel , intel-xe@lists.freedesktop.org Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 On Thu, Feb 12, 2026 at 05:16:45PM +0100, Roger Pau Monn=C3=A9 wrote: > On Thu, Feb 12, 2026 at 04:32:56PM +0100, Marek Marczykowski-G=C3=B3recki= wrote: > > On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: > > > On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3r= ecki wrote: > > > > Hi, > > > >=20 > > > > Recently I started testing compatibility with Intel Lunar Lake. Thi= s is > > > > the first one that uses "xe" instead of "i915" Linux driver for iGP= U. > > > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 runn= ing > > > > Linux 6.17.9 in this test. > > >=20 > > > Not sure it's going to help a lot, but does using a PVH dom0 make any > > > difference? > >=20 > > Yes, it makes a difference. I end up with black screen as soon as dom0 > > starts... And due to unrelated bug (in xhci console code?), I don't have > > kernel messages :/ >=20 > Hm, that's ... very helpful. We should fix the xhci stuff so we know > what's going on there. Is the xhci bug also PVH only, or PV is > equally affected? XHCI console works just fine with PV dom0. But I just noticed I had older Xen binary there today, will re-test on the same 4.19.4 again. And then will submit separate bug report (even if that's likely be me fixing it anyway). --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --jRRBc1ZgOtYQSbU+ Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmN/koACgkQ24/THMrX 1yx49wf+NBy2A+DagwA6RfHlLXBvuP5r2FQy2upo0kdOI6l/8Tr45/jVBb0i7QNj UBqM2W+itJigC+a8e/2CsOZZOH8KzEB6zesumNG64EMvP8p4a64Y2x/yqRxj3/My Hvuq27dKpCSoLNsKHDr+kuXPGni0TbZxA/Hp2+qjhzlMy9GhKhl4GmwtWyFVKWD3 k5X9TDN2G51ajwcGLDV100UqYqhg0VH1uWPNS4Z2OzZRahv0uWHyf1Xzm4P04lrP yvQsgL7SEDCxr1H6hodnIblaERsyu3AhERIMqJ8jl7IeYOjDE2Xsd7hWGt65FZhI Vim+as2uFZmL2+Lp9GIoIa8c85NeOQ== =zQiG -----END PGP SIGNATURE----- --jRRBc1ZgOtYQSbU+-- From xen-devel-bounces@lists.xenproject.org Thu Feb 12 16:35:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 16:35:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229571.1535503 (Exim 4.92) (envelope-from ) id 1vqZf0-0003c1-Bt; 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This is > > > > > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > > > > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > > > > > Linux 6.17.9 in this test. > > > > > > > > Not sure it's going to help a lot, but does using a PVH dom0 make any > > > > difference? > > > > > > Yes, it makes a difference. I end up with black screen as soon as dom0 > > > starts... And due to unrelated bug (in xhci console code?), I don't have > > > kernel messages :/ > > > > Hm, that's ... very helpful. We should fix the xhci stuff so we know > > what's going on there. Is the xhci bug also PVH only, or PV is > > equally affected? > > XHCI console works just fine with PV dom0. But I just noticed I had > older Xen binary there today, will re-test on the same 4.19.4 again. And > then will submit separate bug report (even if that's likely be me fixing > it anyway). OK, could you also post whatever output you get when using a PVH dom0 with `sync_console` added to the Xen command line? Thanks, Roger. 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Thu, 12 Feb 2026 08:39:17 -0800 (PST) Message-ID: Date: Thu, 12 Feb 2026 17:39:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 6/6] xen/riscv: enable DOMAIN_BUILD_HELPERS To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <6ab04f3584e45795dc82c25f62a6c950913f5c7d.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6ab04f3584e45795dc82c25f62a6c950913f5c7d.1770821989.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 17:21, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -44,6 +44,9 @@ > #define P2M_LEVEL_MASK(p2m, lvl) \ > (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) > > +/* Holds the bit size of IPAs in p2m tables */ > +extern unsigned int p2m_ipa_bits; Hmm, I can spot a declaration and ... > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -51,6 +51,12 @@ static struct gstage_mode_desc __ro_after_init max_gstage_mode = { > .name = "Bare", > }; > > +/* > + * Set to the maximum configured support for IPA bits, so the number of IPA bits can be > + * restricted by external entity (e.g. IOMMU). > + */ > +unsigned int __read_mostly p2m_ipa_bits = PADDR_BITS; ... a definition, but neither a use nor a place where the variable would be set. Hmm, yes, I see common/device-tree/domain-build.c uses it. Then the following questions arise: - What does "ipa" stand for? Is this a term sensible in RISC-V context at all? Judging from the comment at the decl, isn't it PPN width (plus PAGE_SHIFT) that it describes? - With there not being anyone writing to the variable, why is it not const (or even a #define), or at the very least __ro_after_init? And no, "Arm has it like this" doesn't count as an answer. Considering all the review comments you've got so far you should know by now that you shouldn't copy things blindly. > --- a/xen/include/public/arch-riscv.h > +++ b/xen/include/public/arch-riscv.h > @@ -50,6 +50,14 @@ typedef uint64_t xen_ulong_t; > > #if defined(__XEN__) || defined(__XEN_TOOLS__) > > +#define GUEST_RAM_BANKS 1 > + > +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ > +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) > + > +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } > +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } Hmm, does RISC-V really want to go with compile-time constants here? And if so, why would guests be limited to just 2 Gb? That may more efficiently be RV32 guests then, with perhaps just an RV32 hypervisor. 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Hence, to prevent speculative execution causing one >>>>>>>> + * guest’s VS-stage translations to be cached under another guest’s >>>>>>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>>>>>> + * finally write the new vsatp value what will be done in >>>>>>>> + * p2m_handle_vmenter(). >>>>>>>> + */ >>>>>>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>>>>>> + >>>>>>>> + /* >>>>>>>> + * Nothing to do with HGATP as it is constructed each time when >>>>>>>> + * p2m_handle_vmenter() is called. >>>>>>>> + */ >>>>>>>> +} >>>>>>>> + >>>>>>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>>>>>>> +{ >>>>>>>> + if ( is_idle_vcpu(n) ) >>>>>>>> + return; >>>>>>>> + >>>>>>>> + n->domain->arch.p2m.is_ctxt_switch_finished = false; >>>>>>> How can the context switch of a vCPU affect domain-wide state? >>>>>> It is wrong to have is_ctxt_switch_finished per domain, it should be >>>>>> vCPU field. >>>>>> >>>>>>>> + /* >>>>>>>> + * Nothing to do with HGATP or VSATP, they will be set in >>>>>>>> + * p2_handle_vmenter() >>>>>>>> + */ >>>>>>> Why can this not be done here? >>>>>> As VMID should be calculated on VM enter. >>>>> And I didn't suggest to calculate a new one here. >>>>> >>>>>> We can update HGATP and VSATP here with VMID stored before in p2m_ctxt_switch_from(), >>>>>> but then it is possible when vmid_handle_vmenter() will be called before VM entry >>>>>> VMID could be changed and it will be needed again to update HGATP and VSATP what >>>>>> will lead to flushing of VS TLB twice (one in p2m_ctxt_switch_to() and another one >>>>>> in p2m_handle_vmenter()). >>>>> Is this a concern resulting from particular logic you expect to appear >>>>> in the window between context switch and entering the guest, or is this >>>>> merely an abstract concern? >>>> If we will have VS TLB flush unconditionally in VM entry then it is merely an >>>> abstract concern. >>> Why would we want to flush unconditionally? >> To guarantee that a guest sees a clean switch with no possibilities of >> using a stale entry. For example, if VMID changed between context switch >> and VM entry we want to have flush, but considering your reply here ... >> >>>> Otherwise, considering that speculation could happen between >>>> context switch and VM entry what could lead to that some entries were added to >>>> VS TLB flush with old VMID in the case if then in VM entry vCPU might receive new >>>> VMID. >>> I don't understand: Context switch leaves vsatp.MODE at zero. Nothing can end >>> up in the VS TLB in that case, aiui >> ... we just have different implementation in mind for p2m_ctxt_switch_to(). >> >> I thought that your suggestion is to set both HGATP and VSATP in p2m_ctx_switch_to() >> while calculate VMID in p2m_handle_vmenter() (with potential update of HGATP and VSATP >> if needed) and with such approach VSATP won't be zero after p2m_ctx_switch_to() and >> speculation could happen between context switch and VM entry. >> >> So just to clarify your expectations are: > So just to clarify from my side that I don't have any expectations; I > merely want to suggest to start with as simple a model as possible, > for its correctness to be easy to prove. Got you. Then it seems like the easiest approach is to follow what is in this patch until ... >> 1. p2m_ctxt_switch_from(p): >> p.vsatp = VSATP >> VSATP = 0 >> >> 2. p2m_ctxt_swith_to(n): >> HGATP = construct_hgatp(...) >> >> 3. p2m_handle_vmenter(n): >> update VMID if necessary >> >> recalculate HGATP if necessary >> >> (c) update VSATP with n.VSATP if we here from context switch >> or with hardware VSATP if it wasn't context switch. >> >> do necessary flushes >> >> And at step (c) we can't base on that if VSATP is zero or not to understand that >> it is from context switch as it could that guest at the moment of trap (lets say >> some SBI call was requested by guest and Xen just handles it and return back >> to guest) also had VSTAP = 0. >> So it is needed to distinguish if context switch happened or not to properly deal >> with VSATP (and it was one of the reson to have introduced in this patch >> is_ctxt_switch_finished). ... we could find a better way to detect if context switch happened before entering VM entry path or not without introduction of its ugly bool variable is_ctxt_switch_finished as I mentioned above it seems to me it is not enough just to check if VSATP is zero or not as guest could had VSATP equal to 0 before trap. That is why the approach suggested earlier: For example, assuming CSR reads aren't overly expensive, it looks to me as if during VM entry - vsatp only needs writing when vsatp.MODE is zero, - hgatp only needs writing when vsatp.MODE is zero or when the VMID needs updating. as it isn't clear with what should be updated vsatp (vsatp only needs writing when vsatp.MODE is zero) with what it was written before we were in a guest or with what ve saved in vcpu->arch.vsatp during context switch. Am I missing something obvious? Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu Feb 12 17:38:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 17:38:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229680.1535532 (Exim 4.92) (envelope-from ) id 1vqadf-0004m6-Bd; Thu, 12 Feb 2026 17:38:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229680.1535532; Thu, 12 Feb 2026 17:38:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqadf-0004lz-8i; Thu, 12 Feb 2026 17:38:03 +0000 Received: by outflank-mailman (input) for mailman id 1229680; Thu, 12 Feb 2026 17:38:01 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqadd-0004lt-Jj for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <49fd6b8c-5a6e-4914-a3e4-80ede233ac93@amd.com> Date: Thu, 12 Feb 2026 17:37:34 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] arm/mpu: implement setup_virt_paging for MPU system To: Harry Ramsey , CC: , Penny Zheng , "Stefano Stabellini" , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Wei Chen" , Hari Limaye References: <20260206090155.68466-1-harry.ramsey@arm.com> <20260206090155.68466-2-harry.ramsey@arm.com> Content-Language: en-US From: "Halder, Ayan Kumar" In-Reply-To: <20260206090155.68466-2-harry.ramsey@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001505:EE_|SJ2PR12MB9113:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e1b4cd6-94b9-4d51-2c79-08de6a5d697e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|82310400026|1800799024|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QfTJAdHi8+M6pBWDCw3obvzUMO9N3d9w4QnCTfwqV80+42Cdt9Gh/WGg5wGLmISASV0SAwPWoJlmgdhsEMeLRJQlFxlgVr9ow4VictWUJxo6iTHZ1j2RQ7Iu3QB+KlGcgbzu89oJglmYUwXzfoe6A6c+gOuluPn3aa6iDO48/K6iPFlQz41ZW/J0ZWc/k9ib9TkcK/GsmqQpruG6S810aDICPUYEJsUITF8cE1Ps+8hD48rehCyw/atZtknoMDAgWK2hM3CWFZaNqMihKxr3bKFSNFX3NZGmomv+KMUL60b6iRuX/XWeD+BSQKjG/frdmtOOlL3DgGDrWukRTropEMdIkkpP3Vp9wr7NACff23XJ8XjFhdLlyspLKE0oEnTC0pmduKPBhwXrWxsEcWdi7k/7DBwNXl29vbqenf1vIFfjmmkipqmtXHJV/e+hs8rj X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 17:37:36.6814 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e1b4cd6-94b9-4d51-2c79-08de6a5d697e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001505.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9113 Hi Harry, On 06/02/2026 09:01, Harry Ramsey wrote: > From: Penny Zheng > > For MMU system, setup_virt_paging is used to configure stage 2 address > translation regime, like IPA bits, VMID allocator set up, etc. > Some could be inherited in MPU system, like VMID allocator set up, etc. > > For MPU system, we could have the following memory translation regime: > - PMSAv8-64 at both EL1/EL0 and EL2 (default) > - VMSAv8-64 at EL1/EL0 and PMSAv8-64 at EL2 (enabled with device tree > proprty v8r_el1_msa) > > Signed-off-by: Penny Zheng > Signed-off-by: Wei Chen > Signed-off-by: Luca Fancellu > Signed-off-by: Hari Limaye > Signed-off-by: Harry Ramsey > --- > xen/arch/arm/arm64/mpu/p2m.c | 67 +++++++++++++++++++++++- > xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ > xen/arch/arm/include/asm/cpufeature.h | 13 +++-- > xen/arch/arm/include/asm/mpu/p2m.h | 12 +++++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/include/asm/processor.h | 11 ++++ > 6 files changed, 108 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c > index b6d8b2777b..da8f0553c1 100644 > --- a/xen/arch/arm/arm64/mpu/p2m.c > +++ b/xen/arch/arm/arm64/mpu/p2m.c > @@ -2,11 +2,76 @@ > > #include > #include > +#include > #include > > void __init setup_virt_paging(void) > { > - BUG_ON("unimplemented"); > + uint64_t vtcr_el2 = READ_SYSREG(VTCR_EL2), I think this register is redefined for R82 . See https://developer.arm.com/documentation/102670/0301/AArch64-registers/AArch64-register-descriptions/AArch64-Generic-System-control-register-description/VTCR-EL2--Virtualization-Translation-Control-Register?lang=en . So > vstcr_el2 = READ_SYSREG(VSTCR_EL2); > + > + /* PA size */ > + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, > + /* Invalid */}; > + > + /* > + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured > + * with IPA bits == PA bits, compare against "pabits". > + */ > + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) > + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; > + > + /* > + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output > + * address space to access the Secure PA space as Armv8r only implements > + * secure state. > + */ > + vtcr_el2 &= ~VTCR_NSA; But the TRM says this This bit behaves as 1 for all purposes other than reading back the value of the bit when the value of AArch64-VSTCR_EL2.SA is 1. So shouldn't we keep it as 1. > + > + /* > + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the > + * memory system configurations supported. In Armv8-R AArch64, the > + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. > + */ > + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) > + goto fault; > + > + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ > + if ( system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_NONE_SUPPORT ) > + goto fault; > + > + /* > + * cpuinfo sanitization makes sure we support 16bits VMID only if all cores > + * are supporting it. > + */ > + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) > + max_vmid = MAX_VMID_16_BIT; > + > + /* Set the VS bit only if 16 bit VMID is supported. */ > + if ( max_vmid == MAX_VMID_16_BIT ) > + vtcr_el2 |= VTCR_VS; this field does not exist. > + > + p2m_vmid_allocator_init(); > + > + WRITE_SYSREG(vtcr_el2, VTCR_EL2); > + > + /* > + * VSTCR_EL2.SA defines secure stage 2 translation output address space. > + * To make sure that all stage 2 translations for the Secure PA space access > + * the Secure PA space, we keep SA bit as 0. > + * > + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS > + * configuration is checked against stage 1 NS configuration in EL1&0 > + * translation regime for the given address, and generates a fault if they > + * are different, we set SC bit 1. > + */ > + vstcr_el2 &= ~VSTCR_EL2_SA; > + vstcr_el2 |= VSTCR_EL2_SC; > + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); > + > + return; > + > + fault: > + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); > } > > /* > diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h > index 19d409d3eb..a4b6eef181 100644 > --- a/xen/arch/arm/include/asm/arm64/sysregs.h > +++ b/xen/arch/arm/include/asm/arm64/sysregs.h > @@ -462,6 +462,10 @@ > #define ZCR_ELx_LEN_SIZE 9 > #define ZCR_ELx_LEN_MASK 0x1ff > > +/* Virtualization Secure Translation Control Register */ > +#define VSTCR_EL2_SA (_AC(0x1,UL)<<30) > +#define VSTCR_EL2_SC (_AC(0x1,UL)<<20) > + > #ifdef CONFIG_MPU > /* > * The Armv8-R AArch64 architecture always executes code in Secure > diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h > index 13353c8e1a..bf902a3970 100644 > --- a/xen/arch/arm/include/asm/cpufeature.h > +++ b/xen/arch/arm/include/asm/cpufeature.h > @@ -248,6 +248,12 @@ struct cpuinfo_arm { > unsigned long tgranule_16K:4; > unsigned long tgranule_64K:4; > unsigned long tgranule_4K:4; > +#ifdef CONFIG_MPU > + unsigned long __res0:16; > + unsigned long msa:4; > + unsigned long msa_frac:4; > + unsigned long __res1:8; > +#else > unsigned long tgranule_16k_2:4; > unsigned long tgranule_64k_2:4; > unsigned long tgranule_4k_2:4; > @@ -255,6 +261,7 @@ struct cpuinfo_arm { > unsigned long __res0:8; > unsigned long fgt:4; > unsigned long ecv:4; > +#endif > > /* MMFR1 */ > unsigned long hafdbs:4; > @@ -267,13 +274,13 @@ struct cpuinfo_arm { > unsigned long xnx:4; > unsigned long twed:4; > unsigned long ets:4; > - unsigned long __res1:4; > + unsigned long __res2:4; > unsigned long afp:4; > - unsigned long __res2:12; > + unsigned long __res3:12; > unsigned long ecbhb:4; > > /* MMFR2 */ > - unsigned long __res3:64; > + unsigned long __res4:64; > }; > } mm64; > > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a..d165585d4e 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -5,6 +5,18 @@ > > struct p2m_domain; > > +/* > + * The architecture allows at most 255 EL2 MPU memory regions. The size of the > + * MPU structure entry (pr_t) is 32 Bytes on AArch64 (requiring two 4KB pages) > + * and 16 bytes on AArch32 (requiring one 4KB page). > + */ > +#ifdef CONFIG_ARM_64 > +#define P2M_ROOT_ORDER 1 > +#else > +#define P2M_ROOT_ORDER 0 > +#endif > + > +/* Not used on MPU system */ > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9eb..ed1b6dd40f 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; This exist only for Arm64 MPU. Should we enclose this in ARM_64  ? > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h > index 1a48c9ff3b..7344aa094b 100644 > --- a/xen/arch/arm/include/asm/processor.h > +++ b/xen/arch/arm/include/asm/processor.h > @@ -403,6 +403,10 @@ > > #define VTCR_RES1 (_AC(1,UL)<<31) > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > +#define VTCR_NSA (_AC(0x1,UL)<<30) > +#endif > + > /* HCPTR Hyp. Coprocessor Trap Register */ > #define HCPTR_TAM ((_AC(1,U)<<30)) > #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ > @@ -464,6 +468,13 @@ > #define MM64_VMID_16_BITS_SUPPORT 0x2 > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > +#define MM64_MSA_PMSA_SUPPORT 0xf > +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 > +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 > +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 > +#endif > + > #ifndef __ASSEMBLER__ > > extern register_t __cpu_logical_map[]; Rest LGTM - Ayan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 17:48:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 17:48:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229694.1535542 (Exim 4.92) (envelope-from ) id 1vqanQ-0006Td-Cb; Thu, 12 Feb 2026 17:48:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229694.1535542; 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action=none header.from=citrix.com; Message-ID: <61a3f852-915c-4d9f-8dde-01d000aa4fe7@citrix.com> Date: Thu, 12 Feb 2026 17:58:13 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: Re: [PATCH v2 0/5] darwin: expand cross-builds to also support x86 and testing To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260212144618.43200-1-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <20260212144618.43200-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO3P265CA0008.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:bb::13) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|PH7PR03MB7002:EE_ X-MS-Office365-Filtering-Correlation-Id: 25e24695-4e8f-40c4-8ce9-08de6a604c83 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=?utf-8?B?OVY5ejlzRi9DUUxEeDZOMEM0U2drU1p5MHJ3L1g3Rnd3UTQ4OU5yUT09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 25e24695-4e8f-40c4-8ce9-08de6a604c83 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 17:58:16.7059 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: S3sAztED5wt+fJ8yRGL8LtltXM1mcwmrT4em2XYQPCQgiCQeoZGVAMQhZEgrOHbblbsrfnroZVJDqfTlqNYlvnl24c93vGgXNC5UMV9eQyQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR03MB7002 On 12/02/2026 2:46 pm, Roger Pau Monne wrote: > Hello, > > This series expands the recently introduced Darwin hypervisor build > support to also allow cross-building an x86 hypervisor, that's done in > patches 1 to 3. Patches 4 and 5 introduce some Cirrus-CI testing to do > cross-builds from macOS, plus it also introduces some basic smoke > testing of the x86 builds using the XTF selftest, just like it's > currently done for the FreeBSD builds. > > A result of the updated Cirrus-CI pipeline can be seen at: > > https://cirrus-ci.com/build/6723050642604032 > > Thanks, Roger. > > Roger Pau Monne (5): > xen/x86: always consider '/' as a division in assembly > xen/tools: remove usages of `stat -c` in check-endbr.sh > xen/tools: fix grep reporting 'illegal byte sequence' in > check-endbr.sh > cirrus-ci: add x86 and arm64 macOS hypervisor builds > cirrus-ci: add x86 XTF self-tests for macOS build Acked-by: Andrew Cooper The CI tests passing makes this a fairly obvious one to take. But, some further observations from https://cirrus-ci.com/task/4903778798796800 [10:09:34.952] INIT_O arch/x86/acpi/boot.init.o [10:09:34.971]   LD      arch/x86/acpi/built_in.o [10:09:34.975] x86_64-elf-ld: warning: arch/x86/acpi/boot.init.o: missing .note.GNU-stack section implies executable stack [10:09:34.975] x86_64-elf-ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker ... [10:09:35.720] LD arch/x86/boot/built_in.o [10:09:35.724] CC common/hypfs.o [10:09:35.727] x86_64-elf-ld: warning: arch/x86/boot/reloc-trampoline.o: missing .note.GNU-stack section implies executable stack [10:09:35.727] x86_64-elf-ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker ... [10:09:40.836]   LD      arch/x86/hvm/svm/built_in.o [10:09:40.840] x86_64-elf-ld: warning: arch/x86/hvm/svm/vmcb.o: missing .note.GNU-stack section implies executable stack [10:09:40.840] x86_64-elf-ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker and various other examples too.  The warning comes when linking built_in.o's, and while I could believe there's something weird about *.init.o and/or reloc-trampoline.o, the complaint about vmcb.o is weird because that's just a plain C file. The other impacted (non built_in.o) objects look to be: arch/x86/hvm/vmx/vvmx.o arch/x86/pv/dom0_build.init.o arch/x86/x86_64/cpufreq.o common/unzstd.init.o and it's not obvious what these have in common to be the (only) objects lacking .note.GNU-stack. Also, during the final link steps for xen.efi, we twice get: [10:09:57.995] Warning: relocation to r/o section .text:00000048 [10:09:57.995] Warning: relocation to r/o section .text:00000090 which smells like the multiboot header. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Feb 12 18:00:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 18:00:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229720.1535562 (Exim 4.92) (envelope-from ) id 1vqazl-0001KZ-Nr; Thu, 12 Feb 2026 18:00:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229720.1535562; Thu, 12 Feb 2026 18:00:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqazl-0001KS-L3; Thu, 12 Feb 2026 18:00:53 +0000 Received: by outflank-mailman (input) for mailman id 1229720; Thu, 12 Feb 2026 18:00:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqazk-0001KM-Mv for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Thu, 12 Feb 2026 18:00:34 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Harry Ramsey , CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <20260206090155.68466-1-harry.ramsey@arm.com> <20260206090155.68466-3-harry.ramsey@arm.com> Content-Language: en-US From: "Halder, Ayan Kumar" In-Reply-To: <20260206090155.68466-3-harry.ramsey@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06E:EE_|BY5PR12MB4257:EE_ X-MS-Office365-Filtering-Correlation-Id: 3e3ccb43-7b96-489b-51fb-08de6a60a061 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?OXdBRXZpbXF4dk0vK1NFSVFFd3dOL1dIeUF0QzRic05CUU1OYit0clNUQW9a?= =?utf-8?B?Y0JFMDAzRW1DRkhPM3hlNU8vOXdMRmRON0RmUE1obnNCSjFzQ1RrSHR5amR4?= =?utf-8?B?YkpSRU44cFRkMXRFT1c4NWc5TnZTdlFqM1VXNlk4YXZXMjVOdzBWeS83cnY4?= =?utf-8?B?MWkrSnQxajFONnVSRzlyMi81WHJHZDRvQXhGTG5xZmUydy9UcWdVRTVJTEVY?= =?utf-8?B?RVhrUjY1RzJxdFdIK0M5WEUveGFqd1MxUHBKWHBZaVgzY1Y3dzZaVndBMG80?= =?utf-8?B?alVyRmR5ZWZINEk5MGFnK28zTjJRRkdvT0pnc1FRV0dheUJKcXVVc0FvWHhj?= =?utf-8?B?MXF6YnJuZktkOUVlcTVnaldnY0F4NVV0dis3WjdpZ2V3blNYR1BYNmF3SG91?= =?utf-8?B?azh4NFA5T3NVcHQ2M1dYaWRLeEhaZW9xZHE0b1RUMmtjL2k0L3Vib1hNT09E?= =?utf-8?B?MFNvWmk0dUlMLzJzZ1lVSlc4eTI2MERNa2JENUFGeExqMjdLMVVtcllCRVFU?= =?utf-8?B?UFFsaG5QMEJRR0F2VmowN0prSzRuNndLaFZXR1Z5WWE0azdYelVvSTBpSGlw?= =?utf-8?B?elJXMGhSbkR3MnpUbWdYU1pXWjhDWndzMEE0aFNtcVFFMmtNWEozMk84N0g2?= =?utf-8?B?azVnZUdwaVU4aG5LNEhvWndub1gySVhoNUVoU1JjMTM0VTAwUjR5VytZZkll?= =?utf-8?B?U2xYOGEreElZMzc4dmRDQVZBK1haUGdZM0tFcTZFUkM3Nzl6bzYyY1BXMkRJ?= =?utf-8?B?NDRlQUtFM2JyVEFFck5qbVZ2aG1qR3d0NDJiWFpGR1dlSXZ6bWw3dXBpQW9o?= =?utf-8?B?TVRQSVZ3VGQvTnZaQ1lSM09ZMXhML2h3VGF6TVhPMG9ORUpIamprVHlTYk9W?= =?utf-8?B?Z000YmpvazZzZXp6bXBkanZwdWxFSVBKMExENFExK3F4VlVaUHRDRTIrNCtx?= =?utf-8?B?L2RhZE1FSmV1K2dVbmdLQng1TWZaa1lzSWI3SU4rbWVrS3lMN3IvbW5lNGRU?= =?utf-8?B?RUJzUXZ1Qi9CTExWekJqQ1BBVG1tU1ArZTNnU1pKSlNrWXk3ci9oV2xuSWZK?= =?utf-8?B?dllwZ1g0ZzNnSXFnTlNvU3BERFAwSDBQZzBXRDBQWVFaTkhBRHRPNmd4djVI?= =?utf-8?B?emNYQlF1K2FscVdsNUNuSlluekd1YWs1a2p5NEllVkJxZjNzQk9xNTM4b2lY?= =?utf-8?B?QUw4aHBESnZ5eDRZeEFaSVVSd0JQaDNhbEFrd0NKNWU0VnAxbG1OaGZDNUZG?= =?utf-8?B?TjlGcmozQUJSSmFpQ0hFT2xOMTllTHp2dm1MY3ZxWms4ZmF2YjltN3JVOXZG?= =?utf-8?B?dVVwcnoxaW5mdjlPQ3VkRDQ0dkpzRmJteC83WVlKa01waWNhN2hmQ2NlVjRJ?= =?utf-8?B?akRTbHJ3TmJsTDlrL3VhZmU4ekhXWEsrcmlyS2J1TWRjSXd3R3BkMDNiY1h0?= =?utf-8?B?OUxMZDl5VGJ4SWY3Tk8xM09VZGFRaWpUTDJWSGx2Z2E4bnM3OWVicmhISXp2?= =?utf-8?B?azhGcGlEWTM1amt6R280MEdqbm50bWRiSnVoenViUmNBSDhTR1MwcDR3NVRG?= =?utf-8?B?dDZBSnhJZkIyVFpxdENDV2puTDI4L1ExK0g2VHh6dmxoM3VYZmR4eUJmMnhz?= =?utf-8?B?QmpseUZSSVRyRkplak5MYlo0ZU9kVzNiZldlZkpMR3VZSHlvRnpkZmxiTHlU?= =?utf-8?B?ZEU3VHpIQ3prMXJ1eXpyUTJCMkhGR3VZVGUwQUU0ZnVqMnNqZnI4MnRhNVZV?= =?utf-8?B?YkxBT25xN2pWNVNmVFNkdXFDemNkVlNtU1pXTjdXV0VQeUtabkZqOHJaUkQv?= =?utf-8?B?TE8zSFNRRHFMMFdNZDlrVHhMVGRmbUVuVHhQYk0vMUtHZ1llS25VNEFmQmpJ?= =?utf-8?B?VElRc1ZSbmxtK040N3BxSm9yZDlIV1psL2RNdno4clU5NGV3b1hENWdoK3NH?= =?utf-8?B?MDUwVitpUk50M2x0bzBXMVpGU3hlL1NzeVdqWnhGMG5uWUxVMExpNlhiWlB0?= =?utf-8?B?ZWp6MHlSOFp6SkczNG1zd1JQVnZDT3ZXb0oxM2FOOEtMdlNLSDNTL005Y2pX?= =?utf-8?B?bWdydkNqTlgrY0xSUjIxR1EydGRZL1FuRzh2REMzcDJFUTlOSUx5bHptZ2Qr?= =?utf-8?B?WEJsbnhYR3Nhc0VtTHdTWjNodTJPaHF6V0dmVGxhWGlsUmJyWTZaUUw2QnNp?= =?utf-8?B?SWUzajEvMWREU3FBSlBjaGQ0eFRDUWlSL0R5cHl4VW43SFJHM2pOUnc1S2dR?= =?utf-8?B?alBvMGZKdVR1QlFkOXFaaVd5YXF3PT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024)(7053199007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QuS2B44L4oQFQZbkTryBnQIE15l99Of9mtOwfdO93GPo1tGCJfkVEpGgxnHfi7aPCXO8KbCB772fbiHoKOAqZb+1iTpmMZ6gY79GACA6AWapfcrEJT7edr260xMfL8J3w5gk5Sol0bvbCOROFLcDBL4OG160FJdX/WOuAsZVXV3F/j4PUeqrsKsIyLkCp38uHWhoO2yMXivEA5OnfHdCN5pK7a/YpCwEVugLXKi5KyVLlWX9cli7cyJqkGldGiVUQMkYTMsmqomiCWGq8t/0xpNCdlcuLajfIZepoYlksYZ27R+dEVREWtaI18IHhsrjzcyzI3nej5DaSeGssRK4JZeJOGdf6R4pRwHDE+TukqeecibWWNNJafcYDUWam4hibiblYICbslmyAFq8WF3bYRAAVjflHzu81EAyuUYltJG9TjZ6eUwgz9Y7G+/7Bo44 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 18:00:37.2913 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e3ccb43-7b96-489b-51fb-08de6a60a061 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06E.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4257 Hi Harry, Just a suggestion. Please feel free to disagree. On 06/02/2026 09:01, Harry Ramsey wrote: > Add a new device tree property `v8r_el1_msa` to enable/disable the > PMSAv8-64 translation regime at EL1. > > Signed-off-by: Harry Ramsey > --- > docs/misc/arm/device-tree/booting.txt | 11 +++++++++++ > xen/arch/arm/dom0less-build.c | 25 +++++++++++++++++++++++++ > xen/arch/arm/domain.c | 16 ++++++++++++++++ > xen/arch/arm/include/asm/domain.h | 9 +++++++++ > xen/include/public/arch-arm.h | 4 ++++ > 5 files changed, 65 insertions(+) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 977b428608..431d285b6e 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -322,6 +322,17 @@ with the following properties: > Should be used together with scmi-smc-passthrough Xen command line > option. > > +- v8r_el1_msa > + > + A string property specifying whether, on Armv8-R aarch64 systems, a domain > + should use PMSAv8-64 (MPU) at EL1 or VMSAv8-64 (MMU) at EL1. > + > + - "mmu" > + Enables VMSAv8-64 at EL1. > + > + - "mpu" > + Enables PMSAv8-64 at EL1. We can reuse this property for arm32 although there is no mmu. This may help to keep the code common between arm64 and arm32 for v8-R. So, the changes I suggest are > + > Under the "xen,domain" compatible node, one or more sub-nodes are present > for the DomU kernel and ramdisk. > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 4181c10538..41f538fb50 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -315,6 +315,7 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > struct xen_domctl_createdomain *d_cfg = &bd->create_cfg; > unsigned int flags = bd->create_flags; > uint32_t val; > + const char *v8r_el1_msa; > > d_cfg->arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE; > d_cfg->flags |= XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap; > @@ -322,6 +323,30 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > if ( domu_dt_sci_parse(node, d_cfg) ) > panic("Error getting SCI configuration\n"); > > + if (!dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa)) > + { > +#if defined(CONFIG_MPU) #if > defined(CONFIG_ARM_64) > + if ( !strcmp(v8r_el1_msa, "mmu") ) > + { > + if ( system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT ) > + panic("Platform does not support VMSA at EL1 (v8r_el1_msa)\n"); > + d_cfg->arch.v8r_el1_msa = MPU_EL1_VMSA; > + } #endif > + else if ( !strcmp(v8r_el1_msa, "mpu") ) if ( !strcmp( .... > + { > + d_cfg->arch.v8r_el1_msa = MPU_EL1_PMSA; > + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > + panic("PMSA is not valid for domain without static allocation" > + " and direct map (v8r_el1_msa)\n"); > + } > + else > + panic("Invalid device tree option for v8r_el1_msa\n"); > +#else > + panic("'v8r_el1_msa' property requires CONFIG_MPU and CONFIG_ARM_64 to " > + "be selected\n"); > +#endif > + } > + > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) > { > int vpl011_virq = GUEST_VPL011_SPI; > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 2eca2b913d..fc4c7ae734 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -35,6 +35,18 @@ > > DEFINE_PER_CPU(struct vcpu *, curr_vcpu); > > +/* If this domain should use PMSAv8-64 translation regime (MPU) at EL1. */ > +static inline bool is_mpu_domain(struct domain *d) > +{ > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) #if defined(CONFIG_MPU) > + return d->arch.v8r_el1_msa == MPU_EL1_PMSA; #else             return false; #endif Further if we can set `v8r_el1_msa = mmu` by default for everyone (Armv8-A, Armv8-R) , then we can reduce further if-def. > +#elif defined(CONFIG_MPU) > + return true; > +#else > + return false; > +#endif > +} > + > static void do_idle(void) > { > unsigned int cpu = smp_processor_id(); > @@ -731,6 +743,10 @@ int arch_domain_create(struct domain *d, > if ( (rc = sci_domain_init(d, config)) != 0 ) > goto fail; > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; > +#endif > + > return 0; > > fail: > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h > index 758ad807e4..1387adc0e9 100644 > --- a/xen/arch/arm/include/asm/domain.h > +++ b/xen/arch/arm/include/asm/domain.h > @@ -29,6 +29,11 @@ enum domain_type { > #define is_64bit_domain(d) (0) > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > +#define MPU_EL1_PMSA 0 > +#define MPU_EL1_VMSA 1 > +#endif > + > /* > * Is the domain using the host memory layout? > * > @@ -126,6 +131,10 @@ struct arch_domain > void *sci_data; > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + uint8_t v8r_el1_msa; > +#endif > + > } __cacheline_aligned; > > struct arch_vcpu > diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h > index cd563cf706..0ef445a273 100644 > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -355,6 +355,10 @@ struct xen_arch_domainconfig { > uint32_t clock_frequency; > /* IN */ > uint8_t arm_sci_type; > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + /* IN */ > + uint8_t v8r_el1_msa; > +#endif > }; > #endif /* __XEN__ || __XEN_TOOLS__ */ > LGTM. - Ayan From xen-devel-bounces@lists.xenproject.org Thu Feb 12 18:30:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 18:30:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229772.1535573 (Exim 4.92) (envelope-from ) id 1vqbS8-0005Nf-UL; Thu, 12 Feb 2026 18:30:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229772.1535573; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wZ0l0eQELZE2fpdmk9X8juLMTeA8semYcwsSCfyDu8rzQU0RqZCyHvvSikK1XdA8U0X0MIF4zHguAaAIQy26KN6U2/F9KStHHkOo3H//bsgNXGSyHGnrrtu5gabJnhMkZPFFLLJu2L5KfgLZsJeQ+nB5BEZXx9EHa70CktVLr77sY/C4JSJpX6tF9j3hDH8Un/PbZKXTjSNmGuvX3Qt5NUjO9AkI2W6TvNwH13r3a8xgqVnR7cAxYkz6FwPiN9rmHYvYKdGDwYsuUf0Zg4QRIlU6ESLKB4YZEzyPe13Wh79w5etIshFGpR94+yXB/AmO9TAwCazIbX7NzHdS10N+Zc7qZVAkNiNbX4zALXoo0vlKYbgL3vvZm0qZnWxbKjpUOq6c6VNs3mOneBd4KBsBwpibTs2tIejaLPwdJ7vTsJznBc0db8YugeehQcKK4Y/h X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 18:29:58.3965 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 20f572ce-c7e7-44f7-df3e-08de6a64ba14 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6093 On Wed Jan 28, 2026 at 3:35 PM CET, Jason Andryuk wrote: > On 2025-04-01 06:58, Jan Beulich wrote: >> Leverage the new infrastructure in xen/linkage.h to also switch to per- >> function sections (when configured), deriving the specific name from the >> "base" section in use at the time FUNC() is invoked. >>=20 >> Signed-off-by: Jan Beulich >> Tested-by: Luca Fancellu # arm I don't seem to have the original patch in my inbox, so I'll just answer he= re. About the assembly modifications on the exception entry points: With split sections the linker is free to reorder all of them as it sees fi= t, which probably means we want int3 after every jump to prevent straight-line speculation from allocating an XSA number for us. It's possible the linker = might inject them, but it might also not. Better to err on the side of caution. Though more generally, I'd just keep all exception entry points in the same section. They'd never get GC'ed anyway and we're paying an extra branch in = the #PF path for no reason. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dl5l8VWK1c8XWrDJYkZ5C5knU/PPCtEgOeMcQcPTDH+CICygLrrdBq7bRNyw//UmrCL12SsYWQg0w+9N1j6feZPnYUMl6NkSPvvrEKZWGf1XkKOd/eP6yYcR+EEBAGutpH2bnZ3nDWSKY6B/axsaZYfORyuCt5YRAoWjiYOAaBT7i35RTtbdI5CsDHyzhpF2poUEVeeD7aA/Iw+UxEu0FwWpe7NvLzPOIiGlz0EdnvCuW4LHnU7gCT6knR54cJE+VESX6q/Qi28btC/FK3bNHQn8N5YaL4V5k7EFQco7y8aqNy6iLm/nQaWB87E3iYsLS4Cuwr9hSzXqsNVaFHEW2Toa5W56m5mcCyqmCoHi3Wh1yCCUYE7qGxStMbliOjiBgNHWR6dgDkqMtQjly5yDhSiPaVthxZoHjGGMKBCUP0Wyydni9VdnbV5Rxs6Ck7wb X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 18:31:52.7610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89b903d6-0158-4a0e-a9a0-08de6a64fe3e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001504.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8889 On 2026-02-12 04:54, Juergen Gross wrote: > Commit e5b0a940557 ("tools/xenstored: Auto-introduce domains") broke > xenstored live update, as init_domains() will be skipped when live > update is detected to have happened. This will leave priv_domid and > store_domid set as invalid. > > Fix that by calling init_domains() in live update case, too. In case > of live update skip introducing any found domains, as this will be done > when reading the live update state. > > Fixes: e5b0a940557 ("tools/xenstored: Auto-introduce domains") > Signed-off-by: Juergen Gross Reviewed-by: Jason Andryuk From xen-devel-bounces@lists.xenproject.org Thu Feb 12 19:15:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 12 Feb 2026 19:15:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229831.1535592 (Exim 4.92) (envelope-from ) id 1vqc9g-0002uR-D7; Thu, 12 Feb 2026 19:15:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229831.1535592; Thu, 12 Feb 2026 19:15:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqc9g-0002uK-9B; Thu, 12 Feb 2026 19:15:12 +0000 Received: by outflank-mailman (input) for mailman id 1229831; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: O1LjFUPaCAYCL2OMX6uParAVAke29eF973w6lEC4t33i9ICyreO613jYlxmJ6xC/3pESNYFMC36VzzL1XrgAfSObHh3Ca2IYf75j6AUopXZduIEqhk8eANp54GTWG4dcFzDUzo95jzv4AWCTNiO9GkmMdNEp1nYWDM3f/PO5Kl2W6tc8Q+nfH6TS1m0Ge6wubpHYUFANFipkAh16/lu3mjy9YobEk8K75coJndPDD4dWfCVLlidT1MaBqbKDJAee4q8kk/7llci3mvemg/L4edOu2eWc6VzWfLNhYUOG5282OvCFNFIy1p+yicfrK8kV7aiA6k5e2HKe3szVYvUhstgO1AfKKZcVSMhXfOq7uuFXaLhA8v97b4M5GJCBFPVq8VIKq4KWStyNYE1P6xt9KHDD9bRQl6GbE2cMdP5iN6oegd8nziGc9YtJJVdVJVrk X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2026 19:15:03.6724 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6577d237-81fc-455b-e434-08de6a6b0693 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPF06C91DA0C On 2026-02-12 02:38, Jan Beulich wrote: > On 11.02.2026 18:30, Andrew Cooper wrote: >> On 11/02/2026 5:01 pm, Jason Andryuk wrote: >>> wait.c is only used by vm_event.c. Make CONFIG_VM_EVENT select >>> CONFIG_WAIT, and use CONFIG_WAIT to control building it. >>> >>> Provide stubs of functions called from common code. entry.S needs an >>> ifdef to hide the symbol from the assembly. >>> >>> Also conditionalize .waitqueue_vcpu in struct vcpu to save space. >>> >>> Signed-off-by: Jason Andryuk >> >> I'd really rather see the API/ABI changes required to purge wait.c >> entirely, but I guess this will do in the short term. >> >> Two things want further thought. >> >> First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't >> need this infrastructure in the first place, but it looks like it's >> still compiled in and half wired up.  I suppose you don't notice because >> you compile out VM_EVENT on ARM too? > > But if we want it compiled out altogether on Arm, ... > >> Second CONFIG_WAIT isn't great name because there are many things it >> could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without >> CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will >> disappear at some point. > > ... don't we need a separate kconfig control, for it to be selected only > on x86 (or for it to be dependent on x86, and then imply-ed)? Imo > CONFIG_WAITQUEUE would be okay, as long as it won't have a prompt. We'd > then simply want to prevent further select-s / imply-s to appear. ARM VM_EVENT=y won't link without wait.o. Undefined references to: wake_up_nr prepare_to_wait finish_wait destroy_waitqueue_head init_waitqueue_head So I think that points to re-using my original patch, but with either CONFIG_WAITQUEUE or CONFIG_VM_EVENT. Since CONFIG_VM_EVENT is the only user, and we don't want further uses, I would use that. But I am open to either. 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Fix the missing comma in the XTF test arguments. Fixes: 150c6ef45922 ("CI: add argo x86 XTF test") Signed-off-by: Denis Mukhin --- CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323076582 --- automation/scripts/include/xtf-runner | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner index 43ff2d4d88c7..d1ef888465c3 100644 --- a/automation/scripts/include/xtf-runner +++ b/automation/scripts/include/xtf-runner @@ -69,7 +69,7 @@ function xtf_build_cmdline() local xtf_name=$2 declare -a cmdline=() declare -A per_test_args=( - [argo]="argo=1 mac-permissive=1" + [argo]="argo=1,mac-permissive=1" ) cmdline+=("${XEN_CMDLINE}") -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 00:40:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 00:40:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230029.1535633 (Exim 4.92) (envelope-from ) id 1vqhE8-00005C-I5; Fri, 13 Feb 2026 00:40:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230029.1535633; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="9/b+4XTVAfR7TSOW" Content-Disposition: inline In-Reply-To: <20230915074347.94712-1-roger.pau@citrix.com> --9/b+4XTVAfR7TSOW Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 01:39:56 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau Monne Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Wei Liu Subject: Re: [PATCH v2] x86/shutdown: change default reboot method preference On Fri, Sep 15, 2023 at 09:43:47AM +0200, Roger Pau Monne wrote: > The current logic to chose the preferred reboot method is based on the mo= de Xen > has been booted into, so if the box is booted from UEFI, the preferred re= boot > method will be to use the ResetSystem() run time service call. >=20 > However, that method seems to be widely untested, and quite often leads t= o a > result similar to: >=20 > Hardware Dom0 shutdown: rebooting machine > ----[ Xen-4.18-unstable x86_64 debug=3Dy Tainted: C ]---- > CPU: 0 > RIP: e008:[<0000000000000017>] 0000000000000017 > RFLAGS: 0000000000010202 CONTEXT: hypervisor > [...] > Xen call trace: > [<0000000000000017>] R 0000000000000017 > [] S ffff83207eff7b50 > [] F machine_restart+0x1da/0x261 > [] F apic_wait_icr_idle+0/0x37 > [] F smp_call_function_interrupt+0xc7/0xcb > [] F call_function_interrupt+0x20/0x34 > [] F do_IRQ+0x150/0x6f3 > [] F common_interrupt+0x132/0x140 > [] F arch/x86/acpi/cpu_idle.c#acpi_idle_do_entry+0x1= 13/0x129 > [] F arch/x86/acpi/cpu_idle.c#acpi_processor_idle+0x= 3eb/0x5f7 > [] F arch/x86/domain.c#idle_loop+0xec/0xee >=20 > **************************************** > Panic on CPU 0: > FATAL TRAP: vector =3D 6 (invalid opcode) > **************************************** >=20 > Which in most cases does lead to a reboot, however that's unreliable. It's not relevant anymore, but posting just for the posterity: I just found yet another system where EFI ResetSystem() crashes. What's interesting about it, it's rather new system - NUC 14 with Lunar Lake. It crashes as follows: (XEN) ----[ Xen-4.17.6 x86_64 debug=3Dn Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[<0000000063907504>] 0000000063907504 (XEN) RFLAGS: 0000000000010246 CONTEXT: hypervisor (XEN) rax: 000000006ff4da98 rbx: 000000006ff4dad0 rcx: 000000000000= 0001 (XEN) rdx: 000000000311100a rsi: 0000000000000000 rdi: 000000006ffb= 5080 (XEN) rbp: 0000000000000001 rsp: ffff82d0403ef958 r8: 000000000000= 0000 (XEN) r9: 000000006ffb5080 r10: 0000000000000836 r11: 000000000000= 0835 (XEN) r12: 0000000000000000 r13: 000000000311100a r14: 000000006ffb= 5080 (XEN) r15: 000000000000001f cr0: 0000000080050033 cr4: 0000000000d5= 26e0 (XEN) cr3: 000000046d4e5000 cr2: 0000000063907504 (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 000000000000= 0000 (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 (XEN) Xen code around <0000000063907504> (0000000063907504): (XEN) 00 00 00 00 00 00 00 00 <00> 00 00 00 00 00 00 00 00 00 00 00 00= 00 00 00 (XEN) Xen stack trace from rsp=3Dffff82d0403ef958: (XEN) 000000006fff5b56 ffff82d04059c400 ffff83046f90eed0 00000000000= 00000 (XEN) 0000000000000014 0000000000000000 0000000000000002 00000000000= 00000 (XEN) 0000000000000086 0000000000000000 0000000000000001 00000000000= 00000 (XEN) ffff82d0403efb00 000000006ffb5080 000000006fff5bde ffff82d0000= 00001 (XEN) 0000000000000000 000000000311100a 0000000000000000 00000000000= 00000 (XEN) ffff83046d500770 ffff83046d44d1f8 0000000000000000 00000000000= 00000 (XEN) 000000006ffb4844 0000000000000000 0000000000000000 00000000000= 00000 (XEN) 0000000000000000 0000000000000000 0000000000000000 00000000000= 00000 (XEN) 000000006ffb4498 0000000000000001 0000000000000001 00000000000= 00046 (XEN) ffff83046f90ef84 0000000000000000 0000000000000000 00000000000= 00000 (XEN) 000000006ffad650 0000000000000000 0000000000000000 00000000000= 00000 (XEN) ffff82d0403efb00 0000000000000000 ffff82d0402884c9 ffff8300000= 00000 (XEN) ffff82d0402888ac 0000000000000000 ffff82d0403efb40 00000000000= 00004 (XEN) 000000046d4e5000 000000005484f000 0000000000000004 ffff82d0404= 44b20 (XEN) 0000000000000046 ffff82d040317b76 ffff82d040317c85 00000000000= 00000 (XEN) 0000000000000065 ffff83046d44d000 ffff82d0403172e7 00001388403= efb58 (XEN) 000082d0403efb60 0000000000000000 0000000000000003 ffff83046d4= 4d000 (XEN) 0000000000000003 ffff83046d44d1f8 0000000000000000 ffff82d0402= 277d5 (XEN) ffff82d040227851 ffff82d040206c27 ffff83046d44d000 00000000000= 54894 (XEN) 0000000000000000 0000000000054894 ffff82d0402d0a58 00000000004= 6bb48 (XEN) Xen call trace: (XEN) [<0000000063907504>] R 0000000063907504 (XEN) [<000000006fff5b56>] S 000000006fff5b56 (XEN) [] S runtime.c#efi_rs_enter.part.0+0xc9/0x120 (XEN) [] S efi_reset_system+0x4c/0x90 (XEN) [] S __stop_this_cpu+0x16/0x40 (XEN) [] S smp_send_stop+0xc5/0xe0 (XEN) [] S machine_restart+0x247/0x330 (XEN) [] S shutdown.c#maybe_reboot+0x35/0x40 (XEN) [] S hwdom_shutdown+0x71/0xc0 (XEN) [] S domain_shutdown+0x47/0x100 (XEN) [] S p2m_add_page+0x4f8/0x7d0 (XEN) [] S dom0_construct_pvh+0x3b4/0x1300 (XEN) [] S xhci-dbc.c#dbc_uart_flush+0x50/0x60 (XEN) [] S timer.c#add_entry+0x4f/0xc0 (XEN) [] S time.c#read_counter+0x1b/0x40 (XEN) [] S time.c#platform_time_calibration+0x1c/0= x90 (XEN) [] S construct_dom0+0x63/0xe0 (XEN) [] S __start_xen+0x21a7/0x264a (XEN) [] S __high_start+0x94/0xa0 (XEN)=20 (XEN) Pagetable walk from 0000000063907504: (XEN) L4[0x000] =3D 000000046d4e4063 ffffffffffffffff (XEN) L3[0x001] =3D 0000000054848063 ffffffffffffffff (XEN) L2[0x11c] =3D 80000000638001e3 ffffffffffffffff (PSE) (XEN)=20 (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) FATAL PAGE FAULT (XEN) [error_code=3D0011] (XEN) Faulting linear address: 0000000063907504 (XEN) **************************************** --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --9/b+4XTVAfR7TSOW Content-Type: application/pgp-signature; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="MJFPgzPlR2IWv8LA" Content-Disposition: inline In-Reply-To: --MJFPgzPlR2IWv8LA Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 02:23:06 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: xen-devel , intel-xe@lists.freedesktop.org Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: > On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3recki= wrote: > > Hi, > >=20 > > Recently I started testing compatibility with Intel Lunar Lake. This is > > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > > Linux 6.17.9 in this test. >=20 > Not sure it's going to help a lot, but does using a PVH dom0 make any > difference? Ok, now with the correct Xen version, it's better with PVH dom0. At least on the login screen and few applications (from both dom0 and domU) I don't see the glitches anymore. I can't do a full test, because PCI passthrough doesn't seem to work with PVH dom0 on Xen 4.19 - and I need it to start most VMs. So, if the above test is representative, it's only about PV dom0. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --MJFPgzPlR2IWv8LA Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmOfPoACgkQ24/THMrX 1yx9uwf/XS1nu9msraXWwrAMCdrtTwvbrC3EzRQbNtvAkRdYBmKEkWORstNdMyjM ULC9BQ/a2vlknFIfmG0/PQc89oB3DZC2/TZQZmLM1uAq/bBiRPII3/a7pPB4NFm0 28CrVQCkckQ5Qo+yykB5KJk7cf8xeujC6eshJqSVHAPM3fJBclRJVAmHhe1QAjs5 1BFyUKVWkgZoUmuomJlg3VF3oJyyuBYsKmDyLreYrdJMH4pmKhOCJjTQ9Fe3zwM6 NkyIrCleg4BU2HBUy9Fk0RsD/MhD9F00br4ABOeXAUU+6Xfgs8Ape/RB6OYwonLq +k+WMHfhYbPTGaWvgQZeEULXTVfEDw== =ak9C -----END PGP SIGNATURE----- --MJFPgzPlR2IWv8LA-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:50:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:50:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230085.1535656 (Exim 4.92) (envelope-from ) id 1vqjG8-00070i-NG; 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Patch 1 contains assorted fixups for the domid Makefile. Patch 2 adds a new fragment for auto-generating test harness dependencies. Patch 3 adds some prerequisite changes for vPCI test (patch 4). Patch 4 switches the vPCI unit test to the new common fragment. Patch 5 switches the PDX unit test to the new common fragment. [1] Link to v2: https://lore.kernel.org/xen-devel/20260111041145.553673-1-dmukhin@ford.com/ [2] CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323352235 Denis Mukhin (5): tests: fixup domid make fragment tests: use unit test fragment in domid test xen/include: customize headers for host builds tests: use unit test fragment in vPCI test tests: use unit test fragment in PDX test tools/tests/Rules.mk | 106 ++++++++++++++++++++++++++++++++++++ tools/tests/domid/Makefile | 68 ++--------------------- tools/tests/pdx/.gitignore | 2 +- tools/tests/pdx/Makefile | 59 ++++++-------------- tools/tests/pdx/harness.h | 2 +- tools/tests/pdx/test-pdx.c | 2 - tools/tests/vpci/.gitignore | 2 + tools/tests/vpci/Makefile | 52 ++++++------------ tools/tests/vpci/emul.h | 50 ++++++----------- tools/tests/vpci/main.c | 2 - xen/common/pdx.c | 3 +- xen/include/xen/irq.h | 2 + xen/include/xen/list.h | 2 + xen/include/xen/numa.h | 2 + xen/include/xen/pci.h | 2 + xen/include/xen/pdx.h | 2 + xen/include/xen/pfn.h | 2 + xen/include/xen/spinlock.h | 2 + xen/include/xen/types.h | 4 ++ 19 files changed, 185 insertions(+), 181 deletions(-) create mode 100644 tools/tests/Rules.mk create mode 100644 tools/tests/vpci/.gitignore -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:50:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:50:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230088.1535692 (Exim 4.92) (envelope-from ) id 1vqjGB-0007rl-Tj; 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Add ability to pass custom CFLAGS for mock code and object file suffix. Move earlier in xen/common/pdx.c to ensure harness.h is included before triggering the #ifndef MAX_PFN_RANGES check when building a unit test. Additionally, use real in harness.h instead of a locally copied version. Update .gitignore to exclude generated test build-time dependencies. Signed-off-by: Denis Mukhin --- Changes since v2: - added lost -DCONFIG_PDX_OFFSET_COMPRESSION test --- tools/tests/Rules.mk | 19 ++++++++---- tools/tests/pdx/.gitignore | 2 +- tools/tests/pdx/Makefile | 59 +++++++++++--------------------------- tools/tests/pdx/harness.h | 2 +- tools/tests/pdx/test-pdx.c | 2 -- xen/common/pdx.c | 3 +- xen/include/xen/pdx.h | 2 ++ 7 files changed, 36 insertions(+), 53 deletions(-) diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk index e8a9e82320cf..dc16926f0591 100644 --- a/tools/tests/Rules.mk +++ b/tools/tests/Rules.mk @@ -16,11 +16,13 @@ prepare-harness: # Generate mock environment by replicating header file hierarchy; # each mock header file will point to a harness header. # +# NB: double-colon rule for mocking environment for multiple tests. +# # $1 Hypervisor header. # $2 Test harness header. define emit-harness-nested-rule -$(1): prepare-harness $(2) - set -e; \ +$(1):: prepare-harness $(2) + @set -e; \ mkdir -p $$(@D); \ [ -e $$@ ] || ln -s $(2) $$@ @@ -30,16 +32,19 @@ endef # # $1 Hypervisor filename. # $2 Harness filename. +# $3 Extra CFLAGS. +# $4 Object file suffix. define emit-harness-deps $(eval c-file := $(abspath $(1))) $(eval c-name := $(notdir $(c-file))) $(eval c-headers := $(call list-c-headers,$(c-file))) $(eval c-deps := $(addprefix $(CURDIR)/generated/,$(c-headers))) +$(eval c-obj := $(if $(strip $(4)),-$(strip $(4)),)) $(foreach x,$(c-headers),$(call emit-harness-nested-rule,\ $(addprefix $(CURDIR)/generated/,$(x)),\ $(2))) -$(c-name:%.c=%.o): $(c-file) $(c-deps) - $(CC) $(CFLAGS) -o $$@ -c $$(firstword $$^) +$(c-name:%.c=%$(c-obj).o): $(c-file) $(c-deps) + $(CC) $(3) $(CFLAGS) -o $$@ -c $$(firstword $$^) endef @@ -48,10 +53,14 @@ endef # $1 Hypervisor filename. # $2 Hypervisor source path. # $3 Harness header filename (optional). +# $4 Extra CFLAGS (optional). +# $5 Object file suffix (optional). define vpath-with-harness-deps vpath $(1) $(2) $(call emit-harness-deps,$(addprefix $(2),$(1)),\ - $(strip $(or $(3),$(CURDIR)/harness.h))) + $(strip $(or $(3),$(CURDIR)/harness.h)),\ + $(4),\ + $(5)) endef .PHONY: all diff --git a/tools/tests/pdx/.gitignore b/tools/tests/pdx/.gitignore index 1202a531a7fd..1bf9c05985c4 100644 --- a/tools/tests/pdx/.gitignore +++ b/tools/tests/pdx/.gitignore @@ -1,3 +1,3 @@ -/pdx.h +/generated /test-pdx-mask /test-pdx-offset diff --git a/tools/tests/pdx/Makefile b/tools/tests/pdx/Makefile index 3c431d7c7822..fa0bea8e1035 100644 --- a/tools/tests/pdx/Makefile +++ b/tools/tests/pdx/Makefile @@ -1,50 +1,23 @@ -XEN_ROOT=$(CURDIR)/../../.. -include $(XEN_ROOT)/tools/Rules.mk +# SPDX-License-Identifier: GPL-2.0-only +# +# Unit tests for PDX (Page inDeX). +# -TARGETS := test-pdx-mask test-pdx-offset +TESTS := test-pdx-mask test-pdx-offset -.PHONY: all -all: $(TARGETS) +XEN_ROOT = $(CURDIR)/../../.. -.PHONY: run -run: $(TARGETS) -ifeq ($(CC),$(HOSTCC)) - set -e; \ - for test in $? ; do \ - ./$$test ; \ - done -else - $(warning HOSTCC != CC, will not run test) -endif +include $(XEN_ROOT)/tools/tests/Rules.mk -.PHONY: clean -clean: - $(RM) -- *.o $(TARGETS) $(DEPS_RM) pdx.h +CFLAGS += -I $(XEN_ROOT)/xen/include/ -.PHONY: distclean -distclean: clean - $(RM) -- *~ +$(eval $(call vpath-with-harness-deps,pdx.c,$(XEN_ROOT)/xen/common/,,-DCONFIG_PDX_MASK_COMPRESSION,mask)) +test-pdx-mask.o: test-pdx.c + $(CC) -DCONFIG_PDX_MASK_COMPRESSION $(CFLAGS) -o $@ -c $^ -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests +$(eval $(call vpath-with-harness-deps,pdx.c,$(XEN_ROOT)/xen/common/,,-DCONFIG_PDX_OFFSET_COMPRESSION,offset)) +test-pdx-offset.o: test-pdx.c + $(CC) -DCONFIG_PDX_OFFSET_COMPRESSION $(CFLAGS) -o $@ -c $^ -.PHONY: uninstall -uninstall: - $(RM) -- $(patsubst %,$(DESTDIR)$(LIBEXEC)/tests/%,$(TARGETS)) - -pdx.h: $(XEN_ROOT)/xen/include/xen/pdx.h - sed -e '/^#[[:space:]]*include/d' <$< >$@ - -CFLAGS += -D__XEN_TOOLS__ -CFLAGS += $(APPEND_CFLAGS) -CFLAGS += $(CFLAGS_xeninclude) - -test-pdx-mask: CFLAGS += -DCONFIG_PDX_MASK_COMPRESSION -test-pdx-offset: CFLAGS += -DCONFIG_PDX_OFFSET_COMPRESSION - -test-pdx-%: test-pdx.c pdx.h - $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) -o $@ $< $(APPEND_CFLAGS) - --include $(DEPS_INCLUDE) +test-pdx-%: test-pdx-%.o pdx-%.o + $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) diff --git a/tools/tests/pdx/harness.h b/tools/tests/pdx/harness.h index e49d6bcf92c2..4cdda931feb2 100644 --- a/tools/tests/pdx/harness.h +++ b/tools/tests/pdx/harness.h @@ -84,7 +84,7 @@ typedef uint64_t paddr_t; qsort(elem, nr, size, cmp); \ }) -#include "pdx.h" +#include #endif diff --git a/tools/tests/pdx/test-pdx.c b/tools/tests/pdx/test-pdx.c index eefd54c76815..3633c231abaa 100644 --- a/tools/tests/pdx/test-pdx.c +++ b/tools/tests/pdx/test-pdx.c @@ -7,8 +7,6 @@ #include "harness.h" -#include "../../xen/common/pdx.c" - struct range { /* Ranges are defined as [start, end). */ unsigned long start, end; diff --git a/xen/common/pdx.c b/xen/common/pdx.c index 7e070ff962e8..068a2098b41b 100644 --- a/xen/common/pdx.c +++ b/xen/common/pdx.c @@ -15,11 +15,12 @@ * along with this program; If not, see . */ +#include + /* Trim content when built for the test harness. */ #ifdef __XEN__ #include #include -#include #include #include #include diff --git a/xen/include/xen/pdx.h b/xen/include/xen/pdx.h index 856fc3e8a0e6..8b4a8701a25f 100644 --- a/xen/include/xen/pdx.h +++ b/xen/include/xen/pdx.h @@ -199,7 +199,9 @@ static inline paddr_t directmapoff_to_maddr_xlate(unsigned long offset) #elif defined(CONFIG_PDX_OFFSET_COMPRESSION) /* CONFIG_PDX_MASK_COMPRESSION */ +#ifdef __XEN__ #include +#endif #define CONFIG_PDX_NR_LOOKUP (1UL << CONFIG_PDX_OFFSET_TBL_ORDER) #define PDX_TBL_MASK (CONFIG_PDX_NR_LOOKUP - 1) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:50:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:50:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230086.1535672 (Exim 4.92) (envelope-from ) id 1vqjGA-0007Pc-2f; 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Add new prepare-harness target to tests/Rules.mk as an optional step for setting up mocked environment for building a test. Add ability to override the test harness header file. Fix hypervisor headers used to compile vpci.c against host environment where necessary. Fixup emul.h by adding missing mocks to account for new unit test infra. Update .gitignore to exclude generated test build-time dependencies. Signed-off-by: Denis Mukhin --- Changes since v2: - moved hypervisor headers changes to a separate patch --- tools/tests/Rules.mk | 8 ++++-- tools/tests/vpci/.gitignore | 2 ++ tools/tests/vpci/Makefile | 52 ++++++++++++------------------------- tools/tests/vpci/emul.h | 50 +++++++++++++---------------------- tools/tests/vpci/main.c | 2 -- 5 files changed, 42 insertions(+), 72 deletions(-) create mode 100644 tools/tests/vpci/.gitignore diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk index 8c4881e35da1..e8a9e82320cf 100644 --- a/tools/tests/Rules.mk +++ b/tools/tests/Rules.mk @@ -10,13 +10,16 @@ $(shell sed -n \ 's/^[ \t]*# *include[ \t]*[<"]\([^">]*\)[">].*/\1/p' $(1) 2>/dev/null) endef +.PHONY: prepare-harness +prepare-harness: + # Generate mock environment by replicating header file hierarchy; # each mock header file will point to a harness header. # # $1 Hypervisor header. # $2 Test harness header. define emit-harness-nested-rule -$(1): $(2) +$(1): prepare-harness $(2) set -e; \ mkdir -p $$(@D); \ [ -e $$@ ] || ln -s $(2) $$@ @@ -44,10 +47,11 @@ endef # # $1 Hypervisor filename. # $2 Hypervisor source path. +# $3 Harness header filename (optional). define vpath-with-harness-deps vpath $(1) $(2) $(call emit-harness-deps,$(addprefix $(2),$(1)),\ - $(CURDIR)/harness.h) + $(strip $(or $(3),$(CURDIR)/harness.h))) endef .PHONY: all diff --git a/tools/tests/vpci/.gitignore b/tools/tests/vpci/.gitignore new file mode 100644 index 000000000000..d66c2cd56be6 --- /dev/null +++ b/tools/tests/vpci/.gitignore @@ -0,0 +1,2 @@ +/generated +test-vpci diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile index 97359ff67f86..a885ce41b73e 100644 --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -1,43 +1,23 @@ -XEN_ROOT=$(CURDIR)/../../.. -include $(XEN_ROOT)/tools/Rules.mk +# SPDX-License-Identifier: GPL-2.0-only +# +# Unit tests for vPCI. +# -TARGET := test_vpci +TESTS := test-vpci -.PHONY: all -all: $(TARGET) +XEN_ROOT = $(CURDIR)/../../.. +CFLAGS += -DCONFIG_HAS_VPCI -.PHONY: run -run: $(TARGET) -ifeq ($(CC),$(HOSTCC)) - ./$(TARGET) -else - $(warning HOSTCC != CC, will not run test) -endif +include $(XEN_ROOT)/tools/tests/Rules.mk -$(TARGET): vpci.c vpci.h list.h main.c emul.h - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c +# Do not mock xen/vpci.h header for the test +prepare-harness: + set -e; mkdir -p $(CURDIR)/generated/xen; \ + ln -sf $(XEN_ROOT)/xen/include/xen/vpci.h $(CURDIR)/generated/xen -.PHONY: clean -clean: - rm -rf $(TARGET) *.o *~ vpci.h vpci.c list.h +CFLAGS += -I $(XEN_ROOT)/xen/include/ -.PHONY: distclean -distclean: clean +$(eval $(call vpath-with-harness-deps,vpci.c,$(XEN_ROOT)/xen/drivers/vpci/,$(CURDIR)/emul.h)) -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) - -vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c - # Remove includes and add the test harness header - sed -e '/#include/d' -e '1s/^/#include "emul.h"/' <$< >$@ - -list.h: $(XEN_ROOT)/xen/include/xen/list.h -vpci.h: $(XEN_ROOT)/xen/include/xen/vpci.h -list.h vpci.h: - sed -e '/#include/d' <$< >$@ +test-vpci: vpci.o main.o + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ diff --git a/tools/tests/vpci/emul.h b/tools/tests/vpci/emul.h index dd048cffbf9d..979e86e2692e 100644 --- a/tools/tests/vpci/emul.h +++ b/tools/tests/vpci/emul.h @@ -34,8 +34,16 @@ #define ASSERT(x) assert(x) #define __must_check __attribute__((__warn_unused_result__)) #define cf_check +#define always_inline inline -#include "list.h" +typedef int64_t s_time_t; +typedef uint8_t nodeid_t; +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; +typedef uint64_t u64; + +#include typedef bool rwlock_t; @@ -43,10 +51,6 @@ struct domain { rwlock_t pci_lock; }; -struct pci_dev { - struct vpci *vpci; -}; - struct vcpu { struct domain *domain; @@ -57,35 +61,17 @@ extern const struct pci_dev test_pdev; typedef bool spinlock_t; #define spin_lock_init(l) (*(l) = false) -#define spin_lock(l) (*(l) = true) -#define spin_unlock(l) (*(l) = false) -#define read_lock(l) (*(l) = true) -#define read_unlock(l) (*(l) = false) -#define write_lock(l) (*(l) = true) -#define write_unlock(l) (*(l) = false) +#define spin_lock(l) (assert(!*(l)), *(l) = true) +#define spin_unlock(l) (assert(*(l)), *(l) = false) +#define read_lock(l) (assert(!*(l)), *(l) = true) +#define read_unlock(l) (assert(*(l)), *(l) = false) +#define write_lock(l) (assert(!*(l)), *(l) = true) +#define write_unlock(l) (assert(*(l)), *(l) = false) -typedef union { - uint32_t sbdf; - struct { - union { - uint16_t bdf; - struct { - union { - struct { - uint8_t func : 3, - dev : 5; - }; - uint8_t extfunc; - }; - uint8_t bus; - }; - }; - uint16_t seg; - }; -} pci_sbdf_t; +#define lock_evaluate_nospec(l) (l) +#define block_lock_speculation() -#define CONFIG_HAS_VPCI -#include "vpci.h" +#include #define __hwdom_init diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c index 2ef8d4e03f1d..3753417e866d 100644 --- a/tools/tests/vpci/main.c +++ b/tools/tests/vpci/main.c @@ -189,8 +189,6 @@ main(int argc, char **argv) uint32_t r24 = 0; uint8_t r28, r30; struct mask_data r32; - unsigned int i; - int rc; INIT_LIST_HEAD(&vpci.handlers); spin_lock_init(&vpci.lock); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:50:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:50:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230089.1535699 (Exim 4.92) (envelope-from ) id 1vqjGC-0007vD-Bt; Fri, 13 Feb 2026 02:50:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230089.1535699; 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Signed-off-by: Denis Mukhin --- Changes since v2: - new patch --- xen/include/xen/irq.h | 2 ++ xen/include/xen/list.h | 2 ++ xen/include/xen/numa.h | 2 ++ xen/include/xen/pci.h | 2 ++ xen/include/xen/pfn.h | 2 ++ xen/include/xen/spinlock.h | 2 ++ xen/include/xen/types.h | 4 ++++ 7 files changed, 16 insertions(+) diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h index 6071b00f621e..f7fa1d0fa29b 100644 --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -1,5 +1,6 @@ #ifndef __XEN_IRQ_H__ #define __XEN_IRQ_H__ +#ifdef __XEN__ #include #include @@ -208,4 +209,5 @@ unsigned int arch_hwdom_irqs(const struct domain *d); void arch_evtchn_bind_pirq(struct domain *d, int pirq); #endif +#endif /* __XEN__ */ #endif /* __XEN_IRQ_H__ */ diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h index 98d8482daba1..06d2fa3aed15 100644 --- a/xen/include/xen/list.h +++ b/xen/include/xen/list.h @@ -7,8 +7,10 @@ #ifndef __XEN_LIST_H__ #define __XEN_LIST_H__ +#ifdef __XEN__ #include #include +#endif /* * These are non-NULL pointers that will result in faults under normal diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index f6c1f27ca105..80d60fd49178 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -1,5 +1,6 @@ #ifndef _XEN_NUMA_H #define _XEN_NUMA_H +#ifdef __XEN__ #include @@ -152,4 +153,5 @@ static inline nodeid_t mfn_to_nid(mfn_t mfn) #define page_to_nid(pg) mfn_to_nid(page_to_mfn(pg)) +#endif /* __XEN__ */ #endif /* _XEN_NUMA_H */ diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index afb6bbf50d05..f52dc7875e16 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -14,7 +14,9 @@ #include #include #include +#ifdef __XEN__ #include +#endif /* * The PCI interface treats multi-function devices as independent diff --git a/xen/include/xen/pfn.h b/xen/include/xen/pfn.h index 1ca9b095e0df..98ff669d7def 100644 --- a/xen/include/xen/pfn.h +++ b/xen/include/xen/pfn.h @@ -1,7 +1,9 @@ #ifndef __XEN_PFN_H__ #define __XEN_PFN_H__ +#ifdef __XEN__ #include +#endif #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) diff --git a/xen/include/xen/spinlock.h b/xen/include/xen/spinlock.h index ca9d8c7ec0a1..ad5094c4eb92 100644 --- a/xen/include/xen/spinlock.h +++ b/xen/include/xen/spinlock.h @@ -1,5 +1,6 @@ #ifndef __SPINLOCK_H__ #define __SPINLOCK_H__ +#ifdef __XEN__ #include #include @@ -360,4 +361,5 @@ static always_inline void nrspin_lock_irq(rspinlock_t *l) #define nrspin_unlock_irqrestore(l, f) _nrspin_unlock_irqrestore(l, f) #define nrspin_unlock_irq(l) _nrspin_unlock_irq(l) +#endif /* __XEN__ */ #endif /* __SPINLOCK_H__ */ diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h index 73ddccbbd5dc..e5d702b48ac0 100644 --- a/xen/include/xen/types.h +++ b/xen/include/xen/types.h @@ -4,6 +4,7 @@ #include #include +#ifdef __XEN__ /* Linux inherited types which are being phased out */ typedef uint8_t u8; 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Use the new make fragment to generate test harness code for the domain ID allocator unit test. Introduce CFLAGS dedicated for find-next-bit.c only to avoid contaminating global CFLAGS. Signed-off-by: Denis Mukhin --- Changes since v2: - honor LDFLAGS --- tools/tests/Rules.mk | 93 +++++++++++++++++++++++++++++++++++++ tools/tests/domid/Makefile | 95 ++------------------------------------ 2 files changed, 98 insertions(+), 90 deletions(-) create mode 100644 tools/tests/Rules.mk diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk new file mode 100644 index 000000000000..8c4881e35da1 --- /dev/null +++ b/tools/tests/Rules.mk @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Common unit test fragment. +# + +include $(XEN_ROOT)/tools/Rules.mk + +define list-c-headers +$(shell sed -n \ + 's/^[ \t]*# *include[ \t]*[<"]\([^">]*\)[">].*/\1/p' $(1) 2>/dev/null) +endef + +# Generate mock environment by replicating header file hierarchy; +# each mock header file will point to a harness header. +# +# $1 Hypervisor header. +# $2 Test harness header. +define emit-harness-nested-rule +$(1): $(2) + set -e; \ + mkdir -p $$(@D); \ + [ -e $$@ ] || ln -s $(2) $$@ + +endef + +# Helper function to emit mock hypervisor code dependencies. +# +# $1 Hypervisor filename. +# $2 Harness filename. +define emit-harness-deps +$(eval c-file := $(abspath $(1))) +$(eval c-name := $(notdir $(c-file))) +$(eval c-headers := $(call list-c-headers,$(c-file))) +$(eval c-deps := $(addprefix $(CURDIR)/generated/,$(c-headers))) +$(foreach x,$(c-headers),$(call emit-harness-nested-rule,\ + $(addprefix $(CURDIR)/generated/,$(x)),\ + $(2))) +$(c-name:%.c=%.o): $(c-file) $(c-deps) + $(CC) $(CFLAGS) -o $$@ -c $$(firstword $$^) + +endef + +# Emit dependencies for mock hypervisor code. +# +# $1 Hypervisor filename. +# $2 Hypervisor source path. +define vpath-with-harness-deps +vpath $(1) $(2) +$(call emit-harness-deps,$(addprefix $(2),$(1)),\ + $(CURDIR)/harness.h) +endef + +.PHONY: all +all: $(TESTS) + +.PHONY: run +run: $(TESTS) +ifeq ($(CC),$(HOSTCC)) + set -e; $(foreach t,$(TESTS),./$(t);) +else + $(warning HOSTCC != CC, will not run test) +endif + +.PHONY: clean +clean: + $(RM) -r generated + $(RM) -- *.o $(TESTS) $(DEPS_RM) + +.PHONY: distclean +distclean: clean + $(RM) -- *~ + +.PHONY: install +install: all + $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests + set -e; $(foreach t,$(TESTS),$(INSTALL_PROG) $t $(DESTDIR)$(LIBEXEC)/tests;) + +.PHONY: uninstall +uninstall: + set -e; $(foreach t,$(TESTS),$(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$t;) + +CFLAGS += -D__XEN_TOOLS__ + +# Honor mock hypervisor headers over tools/include/xen +CFLAGS += -I$(CURDIR)/generated/ +CFLAGS += $(CFLAGS_xeninclude) +CFLAGS += $(APPEND_CFLAGS) + +LDFLAGS += $(APPEND_LDFLAGS) + +ifeq ($(filter clean distclean,$(MAKECMDGOALS)),) +-include $(DEPS_INCLUDE) +endif diff --git a/tools/tests/domid/Makefile b/tools/tests/domid/Makefile index 74cadab25b2e..b6ba0c4e14ee 100644 --- a/tools/tests/domid/Makefile +++ b/tools/tests/domid/Makefile @@ -4,101 +4,20 @@ # # Copyright 2025 Ford Motor Company -XEN_ROOT=$(CURDIR)/../../.. -include $(XEN_ROOT)/tools/Rules.mk - TESTS := test-domid -define list-c-headers -$(shell sed -n \ - 's/^[ \t]*# *include[ \t]*[<"]\([^">]*\)[">].*/\1/p' $(1) 2>/dev/null) -endef - -# Generate mock environment by replicating header file hierarchy; -# each mock header file will point to a harness header. -# -# $1 Hypervisor header. -# $2 Test harness header. -define emit-harness-nested-rule -$(1): $(2) - set -e; \ - mkdir -p $$(@D); \ - [ -e $$@ ] || ln -s $(2) $$@ - -endef - -# Helper function to emit mock hypervisor code dependencies. -# -# $1 Hypervisor filename. -# $2 Harness filename. -define emit-harness-deps -$(eval c-file := $(abspath $(1))) -$(eval c-name := $(notdir $(c-file))) -$(eval c-headers := $(call list-c-headers,$(c-file))) -$(eval c-deps := $(addprefix $(CURDIR)/generated/,$(c-headers))) -$(foreach x,$(c-headers),$(call emit-harness-nested-rule,\ - $(addprefix $(CURDIR)/generated/,$(x)),\ - $(2))) -$(c-name:%.c=%.o): $(c-file) $(c-deps) - $(CC) $(CFLAGS) -o $$@ -c $$(firstword $$^) - -endef - -# Emit dependencies for mock hypervisor code. -# -# $1 Hypervisor filename. -# $2 Hypervisor source path. -define vpath-with-harness-deps -vpath $(1) $(2) -$(call emit-harness-deps,$(addprefix $(2),$(1)),\ - $(CURDIR)/harness.h) -endef - -.PHONY: all -all: $(TESTS) - -.PHONY: run -run: $(TESTS) -ifeq ($(CC),$(HOSTCC)) - set -e; $(foreach t,$(TESTS),./$(t);) -else - $(warning HOSTCC != CC, will not run test) -endif - -.PHONY: clean -clean: - $(RM) -r generated - $(RM) -- *.o $(TESTS) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - set -e; $(foreach t,$(TESTS),$(INSTALL_PROG) $t $(DESTDIR)$(LIBEXEC)/tests;) - -.PHONY: uninstall -uninstall: - set -e; $(foreach t,$(TESTS),$(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$t;) +XEN_ROOT = $(CURDIR)/../../.. +include $(XEN_ROOT)/tools/tests/Rules.mk # find-next-bit.c -CFLAGS += '-DEXPORT_SYMBOL(x)=' \ +CFLAGS-find-next-bit.c += '-DEXPORT_SYMBOL(x)=' \ -Dfind_first_bit \ -Dfind_first_zero_bit \ -Dfind_next_bit \ -Dfind_next_bit_le \ -Dfind_next_zero_bit_le -CFLAGS += -D__XEN_TOOLS__ - -# Honor mock hypervisor headers over tools/include/xen -CFLAGS += -I$(CURDIR)/generated/ -CFLAGS += $(CFLAGS_xeninclude) -CFLAGS += $(APPEND_CFLAGS) - -LDFLAGS += $(APPEND_LDFLAGS) +find-next-bit.o: CFLAGS += $(CFLAGS-find-next-bit.c) vpath find-next-bit.c $(XEN_ROOT)/xen/lib/ @@ -108,8 +27,4 @@ vpath find-next-bit.c $(XEN_ROOT)/xen/lib/ $(eval $(call vpath-with-harness-deps,domid.c,$(XEN_ROOT)/xen/common/)) test-domid: domid.o find-next-bit.o test-domid.o - $(CC) $^ -o $@ $(LDFLAGS) - -ifeq ($(filter clean distclean,$(MAKECMDGOALS)),) --include $(DEPS_INCLUDE) -endif + $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:50:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:50:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230087.1535676 (Exim 4.92) (envelope-from ) id 1vqjGA-0007SX-CM; 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Account for multiple test targets in install and uninstall make targets. Honor mocked hypervisor header over tools/include/xen symlinks. Finally, add some clarifications for the functions and do some cleanup. Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") Signed-off-by: Denis Mukhin --- Changes since v2: - fixed emit-harness-nested-rule - honor LDFLAGS_APPEND --- tools/tests/domid/Makefile | 59 +++++++++++++++++++++++++++----------- 1 file changed, 43 insertions(+), 16 deletions(-) diff --git a/tools/tests/domid/Makefile b/tools/tests/domid/Makefile index 753129029ed9..74cadab25b2e 100644 --- a/tools/tests/domid/Makefile +++ b/tools/tests/domid/Makefile @@ -14,26 +14,44 @@ $(shell sed -n \ 's/^[ \t]*# *include[ \t]*[<"]\([^">]*\)[">].*/\1/p' $(1) 2>/dev/null) endef -# NB: $1 cannot be a list +# Generate mock environment by replicating header file hierarchy; +# each mock header file will point to a harness header. +# +# $1 Hypervisor header. +# $2 Test harness header. define emit-harness-nested-rule -$(1): $(CURDIR)/harness.h - mkdir -p $$(@D); - ln -sf $$< $$@; +$(1): $(2) + set -e; \ + mkdir -p $$(@D); \ + [ -e $$@ ] || ln -s $(2) $$@ endef -define emit-harness-rules -$(foreach x,$(2),$(call emit-harness-nested-rule,$(CURDIR)/generated/$(x))) -$(1:.c=.o): $(addprefix $(CURDIR)/generated/,$(2)) -endef - +# Helper function to emit mock hypervisor code dependencies. +# +# $1 Hypervisor filename. +# $2 Harness filename. define emit-harness-deps -$(if $(strip $(2)),$(call emit-harness-rules,$1,$2),) +$(eval c-file := $(abspath $(1))) +$(eval c-name := $(notdir $(c-file))) +$(eval c-headers := $(call list-c-headers,$(c-file))) +$(eval c-deps := $(addprefix $(CURDIR)/generated/,$(c-headers))) +$(foreach x,$(c-headers),$(call emit-harness-nested-rule,\ + $(addprefix $(CURDIR)/generated/,$(x)),\ + $(2))) +$(c-name:%.c=%.o): $(c-file) $(c-deps) + $(CC) $(CFLAGS) -o $$@ -c $$(firstword $$^) + endef +# Emit dependencies for mock hypervisor code. +# +# $1 Hypervisor filename. +# $2 Hypervisor source path. define vpath-with-harness-deps vpath $(1) $(2) -$(call emit-harness-deps,$(1),$(call list-c-headers,$(2)$(1))) +$(call emit-harness-deps,$(addprefix $(2),$(1)),\ + $(CURDIR)/harness.h) endef .PHONY: all @@ -41,7 +59,11 @@ all: $(TESTS) .PHONY: run run: $(TESTS) +ifeq ($(CC),$(HOSTCC)) set -e; $(foreach t,$(TESTS),./$(t);) +else + $(warning HOSTCC != CC, will not run test) +endif .PHONY: clean clean: @@ -55,13 +77,12 @@ distclean: clean .PHONY: install install: all $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) test-domid $(DESTDIR)$(LIBEXEC)/tests + set -e; $(foreach t,$(TESTS),$(INSTALL_PROG) $t $(DESTDIR)$(LIBEXEC)/tests;) .PHONY: uninstall uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/test-domid + set -e; $(foreach t,$(TESTS),$(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$t;) -CFLAGS += -D__XEN_TOOLS__ # find-next-bit.c CFLAGS += '-DEXPORT_SYMBOL(x)=' \ -Dfind_first_bit \ @@ -69,9 +90,13 @@ CFLAGS += '-DEXPORT_SYMBOL(x)=' \ -Dfind_next_bit \ -Dfind_next_bit_le \ -Dfind_next_zero_bit_le -CFLAGS += $(APPEND_CFLAGS) + +CFLAGS += -D__XEN_TOOLS__ + +# Honor mock hypervisor headers over tools/include/xen +CFLAGS += -I$(CURDIR)/generated/ CFLAGS += $(CFLAGS_xeninclude) -CFLAGS += -I./generated/ +CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(APPEND_LDFLAGS) @@ -85,4 +110,6 @@ $(eval $(call vpath-with-harness-deps,domid.c,$(XEN_ROOT)/xen/common/)) test-domid: domid.o find-next-bit.o test-domid.o $(CC) $^ -o $@ $(LDFLAGS) +ifeq ($(filter clean distclean,$(MAKECMDGOALS)),) -include $(DEPS_INCLUDE) +endif -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 02:58:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 02:58:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1229976.1535711 (Exim 4.92) (envelope-from ) id 1vqjNt-00022C-62; Fri, 13 Feb 2026 02:58:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1229976.1535711; Fri, 13 Feb 2026 02:58:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqjNt-000225-3P; Fri, 13 Feb 2026 02:58:21 +0000 Received: by outflank-mailman (input) for mailman id 1229976; Thu, 12 Feb 2026 22:40:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqfMj-0002IR-Db for xen-devel@lists.xenproject.org; Thu, 12 Feb 2026 22:40:53 +0000 Received: from mail-qk1-x72e.google.com (mail-qk1-x72e.google.com [2607:f8b0:4864:20::72e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id dd87a2ca-0863-11f1-b163-2bf370ae4941; Thu, 12 Feb 2026 23:40:45 +0100 (CET) Received: by mail-qk1-x72e.google.com with SMTP id af79cd13be357-8c713a6a6f8so37934285a.0 for ; Thu, 12 Feb 2026 14:40:44 -0800 (PST) Received: from security.cs.northwestern.edu (security.cs.northwestern.edu. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: "Andrew J . Bennieston" , xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Ziyi Guo Subject: [PATCH net] xen-netback: reject zero-queue configuration from guest Date: Thu, 12 Feb 2026 22:40:40 +0000 Message-Id: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit A malicious or buggy Xen guest can write "0" to the xenbus key "multi-queue-num-queues". The connect() function in the backend only validates the upper bound (requested_num_queues > xenvif_max_queues) but not zero, allowing requested_num_queues=0 to reach vzalloc(array_size(0, sizeof(struct xenvif_queue))), which triggers WARN_ON_ONCE(!size) in __vmalloc_node_range(). On systems with panic_on_warn=1, this allows a guest-to-host denial of service. The Xen network interface specification requires the queue count to be "greater than zero". Add a zero check to match the validation already present in xen-blkback, which has included this guard since its multi-queue support was added. Fixes: 8d3d53b3e433 ("xen-netback: Add support for multiple queues") Signed-off-by: Ziyi Guo --- drivers/net/xen-netback/xenbus.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/xen-netback/xenbus.c b/drivers/net/xen-netback/xenbus.c index a78a25b87240..2ef59b08ae21 100644 --- a/drivers/net/xen-netback/xenbus.c +++ b/drivers/net/xen-netback/xenbus.c @@ -735,10 +735,11 @@ static void connect(struct backend_info *be) */ requested_num_queues = xenbus_read_unsigned(dev->otherend, "multi-queue-num-queues", 1); - if (requested_num_queues > xenvif_max_queues) { + if (requested_num_queues > xenvif_max_queues || + requested_num_queues == 0) { /* buggy or malicious guest */ xenbus_dev_fatal(dev, -EINVAL, - "guest requested %u queues, exceeding the maximum of %u.", + "guest requested %u queues, but valid range is 1 - %u.", requested_num_queues, xenvif_max_queues); return; } -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 03:18:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 03:18:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230148.1535721 (Exim 4.92) (envelope-from ) id 1vqjh8-0005FZ-NH; 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charset=UTF-8 Content-Transfer-Encoding: 8bit add_one_user_rmrr() operates on inclusive [start,end] range, which means the end page needs to be calculated as (start + page_count - 1). This off-by-one error resulted in one extra pages being mapped in IOMMU context, but not marked as reserved in the memory map. This in turns confused PVH dom0 code, resulting in the following crash: (XEN) [ 3.934848] d0: GFN 0x5475c (0x5475c,5,3) -> (0x46a0f4,0,7) not permitted (0x20) (XEN) [ 3.969657] domain_crash called from arch/x86/mm/p2m.c:695 (XEN) [ 3.972568] Domain 0 reported crashed by domain 32767 on cpu#0: (XEN) [ 3.975527] Hardware Dom0 crashed: rebooting machine in 5 seconds. (XEN) [ 8.986353] Resetting with ACPI MEMORY or I/O RESET_REG. I checked other parts of this API and it was the only error like this. Other places: - iommu_get_extra_reserved_device_memory() -> reserve_e820_ram() - this function expects exclusive range, so the code is correct - add_one_extra_ivmd() - this operates on start address and memory length Signed-off-by: Marek Marczykowski-Górecki --- xen/drivers/passthrough/vtd/dmar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index 91c22b833043..3da0854e6d91 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -1065,7 +1065,7 @@ static int __init add_user_rmrr(void) static int __init cf_check add_one_extra_rmrr(xen_pfn_t start, xen_ulong_t nr, u32 id, void *ctxt) { u32 sbdf_array[] = { id }; - return add_one_user_rmrr(start, start+nr, 1, sbdf_array); + return add_one_user_rmrr(start, start + nr - 1, 1, sbdf_array); } static int __init add_extra_rmrr(void) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 03:19:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 03:19:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230155.1535733 (Exim 4.92) (envelope-from ) id 1vqji0-0005if-1P; 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Message-ID: <7548efa7-2157-4e80-89e1-6a7c58c4bffd@epam.com> Date: Fri, 13 Feb 2026 04:18:57 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/20] Add SMMUv3 Stage 1 Support for XEN guests From: Milan Djokic To: Julien Grall Cc: Julien Grall , "xen-devel@lists.xenproject.org" , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Michal Orzel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Nick Rosbrook , George Dunlap , Juergen Gross , Andrew Cooper , Volodymyr Babchuk References: <12ba4388-ee23-4e17-910f-9702271865ad@epam.com> <87v7m93bo0.fsf@epam.com> <6c80a929-8139-4461-b11c-e6ac67c3d2e4@epam.com> <875xe6ytyk.fsf@epam.com> <65727710-0a88-4fff-bb5b-9cf34106833c@epam.com> <5df30dbf-17a2-446f-83f9-0e4468622917@epam.com> <485a8166-5079-4c0e-a6bf-f6aee8af991d@xen.org> <2d07bef7-a7a1-4458-9da6-43bf2956d7d8@xen.org> <9c07b1b6-4543-41ba-b58e-1494654a0425@epam.com> Content-Language: en-US In-Reply-To: <9c07b1b6-4543-41ba-b58e-1494654a0425@epam.com> Content-Type: text/plain; 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Considering single vIOMMU model limitation pointed out by >>>>> Volodymyr (SID overlaps), vIOMMU-per-pIOMMU model turned out to be the >>>>> only proper solution. >>> >>> > Does this means in your solution you will end up with multiple >>> > vPCI as well and then map pBDF == vBDF? (this because the SID have to be >>> > fixed at boot) >>> > >>> >>> To answer your question, yes we will have multiple vPCI nodes with this >>> model, establishing 1-1 vSID-pSID mapping (same iommu-map range between >>> pPCI-vPCI). >>> For pBDF to vBDF 1-1 mapping, I'm not sure if this is necessary. My >>> understanding is that vBDF->pBDF mapping does not affect vSID->pSID >>> mapping. Am I wrong here? >> >> From my understanding, the mapping between a vBDF and vSID is setup at >> domain creation (as this is described in ACPI/Device-Tree). As PCI >> devices can be hotplug, if you want to enforce vSID == pSID, then you >> indirectly need to enforce vBDF == pBDF. >> > > I was not aware of that. I will have to do a detailed analysis on this > and come back with a solution. Right now I'm not sure how and if > enumeration will work with multi vIOMMU/vPCI model. If that's not > possible, we will have to introduce a mapping layer for vSID->pSID and > go back to single vPCI/vIOMMU model. > >> [...] >> I have updated the vIOMMU design following our previous discussion on this topic and some additional usecases which we had in a meantime. I have changed the implementation which now provides a single vIOMMU to guest, with a Xen mapping layer which translates it into physical IOMMU layout. This design supports multiple physical IOMMUs and also aligns with the ongoing vPCI/PCI passthrough work. New vIOMMU design is provided below, could you please review the updated design? Changes comparing to previous design version: - Switched from N-N to 1-N vIOMMU-pIOMMU model, with the addition of vSID->pSID mapping layer - Added some details related to vIOMMU emulation flow (commands, events) and the new vSID->pSID mapping layer - Assumptions and constraints for vPCI compatibility. PCI support is not yet complete, planned to be implemented in alignment with the ongoing PCI passthrough work - Removed security considerations which are not directly related to vIOMMU (xl, libfdt) - Expanded mitigations for scheduling-related risks - Added initial performance measurements for the Renesas R-Car platform (to be extended with future PCI support work) ========================================================== Design Proposal: Add SMMUv3 Stage-1 Support for XEN Guests ========================================================== :Author: Milan Djokic :Date: 2026-02-13 :Status: Draft Introduction ============ The SMMUv3 supports two stages of translation. Each stage of translation can be independently enabled. An incoming address is logically translated from VA to IPA in stage 1, then the IPA is input to stage 2 which translates the IPA to the output PA. Stage 1 translation support is required to provide isolation between different devices within OS. XEN already supports Stage 2 translation but there is no support for Stage 1 translation. This design proposal outlines the introduction of Stage-1 SMMUv3 support in Xen for ARM guests. Motivation ========== ARM systems utilizing SMMUv3 require stage-1 address translation to ensure secure DMA and guest managed I/O memory mappings. With stage-1 enabled, guest manages IOVA to IPA mappings through its own IOMMU driver. This feature enables: - Stage-1 translation for the guest domain - Device passthrough with per-device I/O address space Design Overview =============== These changes provide emulated SMMUv3 support: - **SMMUv3 Stage-1 Translation**: stage-1 and nested translation support in SMMUv3 driver. - **vIOMMU Abstraction**: Virtual IOMMU framework for guest stage-1 handling. - **Register/Command Emulation**: SMMUv3 register emulation and command queue handling. - **Device Tree Extensions**: Adds `iommus` and virtual SMMUv3 nodes to device trees for dom0 and dom0less scenarios. - **Runtime Configuration**: Introduces a `viommu` boot parameter for dynamic enablement. A single vIOMMU device is exposed to the guest and mapped to one or more physical IOMMUs through a Xen-managed translation layer. The vIOMMU feature provides a generic framework together with a backend implementation specific to the target IOMMU type. The backend is responsible for implementing the hardware-specific data structures and command handling logic (currently only SMMUv3 is supported). This modular design allows the stage-1 support to be reused for other IOMMU architectures in the future. vIOMMU architecture =================== Responsibilities: Guest: - Configures stage-1 via vIOMMU commands. - Handles stage-1 faults received from Xen. Xen: - Emulates the IOMMU interface (registers, commands, events). - Provides vSID->pSID mappings. - Programs stage-1/stage-2 configuration in the physical IOMMU. - Propagate stage-1 faults to guest. vIOMMU commands and faults are transmitted between guest and Xen via command and event queues (one command/event queue created per guest). vIOMMU command Flow: :: Guest: smmu_cmd(vSID, IOVA -> IPA) Xen: trap MMIO read/write translate vSID->pSID store stage-1 state program pIOMMU for (pSID, IPA -> PA) All hardware programming of the physical IOMMU is performed exclusively by Xen. vIOMMU Stage-1 fault handling flow: :: Xen: receives stage-1 fault triggers vIOMMU callback injects virtual fault Guest: receives and handles fault vSID Mapping Layer ------------------ Each guest-visible Stream ID (vSID) is mapped by Xen to a physical Stream ID (pSID). The mapping is maintained per-domain. The allocation policy guarantees vSID uniqueness within a domain while allowing reuse of pSIDs for different pIOMMUs. * Platform devices receive individually allocated vSIDs. * PCI devices receive a contiguous vSID range derived from RID space. Supported Device Model ====================== Currently, the vIOMMU framework supports only devices described via the Device Tree (DT) model. This includes platform devices and basic PCI devices support instantiated through the vPCI DT node. ACPI-described devices are not supported. Guest assigned platform devices are mapped via `iommus` property: :: <&pIOMMU pSID> -> <&vIOMMU vSID> PCI devices use RID-based mapping via the root complex `iommu-map`: :: PCI Topology Assumptions and Constraints: - RID space must be contiguous - Pre-defined continuous pSID space (0-0x1000) - No runtime PCI reconfiguration - Single root complex assumed - Mapping is fixed at guest DT construction Constraints for PCI devices will be addressed as part of the future work on this feature. Security Considerations ======================= Stage-1 translation provides isolation between guest devices by enforcing a per-device I/O address space, preventing unauthorized DMA. With the introduction of emulated IOMMU, additional protection mechanisms are required to minimize security risks. 1. Observation: --------------- Support for Stage-1 translation in SMMUv3 introduces new data structures (`s1_cfg` alongside `s2_cfg`) and logic to write both Stage-1 and Stage-2 entries in the Stream Table Entry (STE), including an `abort` field to handle partial configuration states. **Risk:** Without proper handling, a partially applied configuration might leave guest DMA mappings in an inconsistent state, potentially enabling unauthorized access or causing cross-domain interference. **Mitigation:** *(Handled by design)* This feature introduces logic that writes both `s1_cfg` and `s2_cfg` to STE and manages the `abort` field - only considering configuration if fully attached. This ensures incomplete or invalid device configurations are safely ignored by the hypervisor. 2. Observation: --------------- Guests can now invalidate Stage-1 caches; invalidation needs forwarding to SMMUv3 hardware to maintain coherence. **Risk:** Failing to propagate cache invalidation could allow stale mappings, enabling access to old mappings and possibly data leakage or misrouting between devices assigned to the same guest. **Mitigation:** The guest must issue appropriate invalidation commands whenever its stage-1 I/O mappings are modified to ensure that translation caches remain coherent. 3. Observation: --------------- Introducing optional per-guest enabled features (`viommu` argument in xl guest config) means some guests may opt-out. **Risk:** Guests without vIOMMU enabled (stage-2 only) could potentially dominate access to the physical command and event queues, since they bypass the emulation layer and processing is faster comparing to vIOMMU-enabled guests. **Mitigation:** Audit the impact of emulation overhead effect on IOMMU processing fairness in a multi-guest environment. Consider enabling/disabling stage-1 on a system level, instead of per-domain. 4. Observation: --------------- Guests have the ability to issue Stage-1 IOMMU commands like cache invalidation, stream table entries configuration, etc. An adversarial guest may issue a high volume of commands in rapid succession. **Risk:** Excessive commands requests can cause high hypervisor CPU consumption and disrupt scheduling, leading to degraded system responsiveness and potential denial-of-service scenarios. **Mitigation:** - Implement vIOMMU commands execution restart and continuation support: - Introduce processing budget with only a limited amount of commands handled per invocation. - If additional commands remain pending after the budget is exhausted, defer further processing and resume it asynchronously, e.g. via a per-domain tasklet. - Batch multiple commands of same type to reduce emulation overhead: - Inspect the command queue and group commands that can be processed together (e.g. multiple successive invalidation requests or STE updates for the same SID). - Execute the entire batch in one go, reducing repeated accesses to guest memory and emulation overhead per command. - This reduces CPU time spent in the vIOMMU command processing loop. The optimization is applicable only when consecutive commands of the same type operate on the same SID/context. 5. Observation: --------------- Some guest commands issued towards vIOMMU are propagated to pIOMMU command queue (e.g. TLB invalidate). **Risk:** Excessive commands requests from abusive guest can cause flooding of physical IOMMU command queue, leading to degraded pIOMMU responsiveness on commands issued from other guests. **Mitigation:** - Batch commands that are propagated to the pIOMMU command queue and implement batch execution pause/continuation. Rely on the same mechanisms as in the previous observation (command continuation and batching of pIOMMU-related commands of the same type and context). - If possible, implement domain penalization by adding a per-domain budget for vIOMMU/pIOMMU usage: - Apply per-domain dynamic budgeting of allowed IOMMU commands to execute per invocation, reducing the budget for guests with excessive command requests over a longer period of time - Combine with command continuation mechanism 6. Observation: --------------- The vIOMMU feature includes an event queue used to forward IOMMU events to the guest (e.g. translation faults, invalid Stream IDs, permission errors). A malicious guest may misconfigure its IOMMU state or intentionally trigger faults at a high rate. **Risk:** Occurrence of IOMMU events with high frequency can cause Xen to flood the event queue and disrupt scheduling with high hypervisor CPU load for events handling. **Mitigation:** - Implement fail-safe state by disabling events forwarding when faults are occurred with high frequency and not processed by guest: - Introduce a per-domain pending event counter. - Stop forwarding events to the guest once the number of unprocessed events reaches a predefined threshold. - Consider disabling the emulated event queue for untrusted guests. - Note that this risk is more general and may also apply to stage-2-only guests. This section addresses mitigations in the emulated IOMMU layer only. Mitigation of physical event queue flooding should also be considered in the target pIOMMU driver. Performance Impact ================== With iommu stage-1 and nested translation inclusion, performance overhead is introduced comparing to existing, stage-2 only usage in Xen. Once mappings are established, translations should not introduce significant overhead. Emulated paths may introduce moderate overhead, primarily affecting device initialization and event/command handling. Testing is performed on Renesas R-Car platform. Performance is mostly impacted by emulated vIOMMU operations, results shown in the following table. +-------------------------------+---------------------------------+ | vIOMMU Operation | Execution time in guest | +===============================+=================================+ | Reg read | median: 645ns, worst-case: 2mμs | +-------------------------------+---------------------------------+ | Reg write | median: 630ns, worst-case: 1μs | +-------------------------------+---------------------------------+ | Invalidate TLB | median: 2μs, worst-case: 10μs | +-------------------------------+---------------------------------+ | Invalidate STE | median: 5μs worst_case: 100μs | +-------------------------------+---------------------------------+ With vIOMMU exposed to guest, guest OS has to initialize IOMMU device and configure stage-1 mappings for the devices attached to it. Following table shows initialization stages which impact stage-1 enabled guest boot time and compares it with stage-1 disabled guest. NOTE: Device probe execution time varies depending on device complexity. A USB host controller was selected as the test case due to its extensive use of dynamic DMA allocations and IOMMU mappings, making it a representative workload for evaluating stage-1 vIOMMU behavior. +---------------------+-----------------------+------------------------+ | Stage | Stage-1 Enabled Guest | Stage-1 Disabled Guest | +=====================+=======================+========================+ | IOMMU Init | ~10ms | / | +---------------------+-----------------------+------------------------+ | Dev Attach / Mapping| ~100ms | ~90ms | +---------------------+-----------------------+------------------------+ For devices configured with dynamic DMA mappings, DMA allocate/map/unmap operations performance is also impacted on stage-1 enabled guests. Dynamic DMA mapping operation trigger emulated IOMMU functions like mmio write/read and TLB invalidation. +---------------+---------------------------+--------------------------+ | DMA Op | Stage-1 Enabled Guest | Stage-1 Disabled Guest | +===============+===========================+==========================+ | dma_alloc | median: 20µs, worst: 80µs | median: 8µs, worst: 60µs | +---------------+---------------------------+--------------------------+ | dma_free | median: 15µs, worst: 60µs | median: 6µs, worst: 30µs | +---------------+---------------------------+--------------------------+ | dma_map | median: 12µs, worst: 60µs | median: 3µs, worst: 20µs | +---------------+---------------------------+--------------------------+ | dma_unmap | median: 15µs, worst: 70µs | median: 3µs, worst: 20µs | +---------------+---------------------------+--------------------------+ Testing ======= - QEMU-based ARM system tests for Stage-1 translation. - Actual hardware validation to ensure compatibility with real SMMUv3 implementations. - Unit/Functional tests validating correct translations (not implemented). Migration and Compatibility =========================== This optional feature defaults to disabled (`viommu=""`) for backward compatibility. Future improvements =================== - Implement the proposed mitigations to address security risks that are not covered by the current design (events batching, commands execution continuation) - PCI support - Support for other IOMMU HW (Renesas, RISC-V, etc.) References ========== - Original feature implemented by Rahul Singh: https://patchwork.kernel.org/project/xen-devel/cover/cover.1669888522.git.rahul.singh@arm.com/ - SMMUv3 architecture documentation - Existing vIOMMU code patterns (KVM, QEMU) Best regards, Milan From xen-devel-bounces@lists.xenproject.org Fri Feb 13 04:02:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 04:02:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230184.1535742 (Exim 4.92) (envelope-from ) id 1vqkO6-0003nr-48; Fri, 13 Feb 2026 04:02:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230184.1535742; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="rAuO+Q0Dl2rqoauD" Content-Disposition: inline --rAuO+Q0Dl2rqoauD Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 05:02:30 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: xen-devel Subject: Cannot boot PVH dom0 with big initrd Hi, After fixing the xhci crash, I hit another issue - booting with 236MB initrd doesn't work, I get: (XEN) [ 3.151856] *** Building a PVH Dom0 *** ... (XEN) [ 3.593940] Unable to allocate memory with order 0! (XEN) [ 3.597110] Failed to setup Dom0 physical memory map (XEN) [ 3.599884]=20 (XEN) [ 3.602482] **************************************** (XEN) [ 3.605272] Panic on CPU 0: (XEN) [ 3.607928] Could not construct d0 (XEN) [ 3.610692] **************************************** (XEN) [ 3.613463]=20 (XEN) [ 3.616035] Reboot in five seconds... (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_REG. Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f289978175= 5762f565 If I skip initrd, then it boots just fine (but dom0 is not happy about that). 164MB initrd failed too, but 13MB started ok. Just in case, I tried skipping XHCI console, but it didn't change anything. Host has 16GB of memory, and there is no dom0_mem=3D parameter. Xen is started from GRUB, using MB2+EFI. When it works (12MB initrd), I get the following info: (XEN) [ 4.123843] Dom0 memory allocation stats: (XEN) [ 4.126636] order 0 allocations: 4 (XEN) [ 4.129278] order 1 allocations: 3 (XEN) [ 4.132027] order 2 allocations: 4 (XEN) [ 4.134776] order 3 allocations: 3 (XEN) [ 4.137527] order 4 allocations: 3 (XEN) [ 4.140252] order 5 allocations: 3 (XEN) [ 4.142966] order 7 allocations: 2 (XEN) [ 4.145663] order 8 allocations: 3 (XEN) [ 4.148358] order 9 allocations: 3 (XEN) [ 4.151035] order 10 allocations: 4 (XEN) [ 4.153709] order 11 allocations: 7 (XEN) [ 4.156277] order 12 allocations: 9 (XEN) [ 4.158940] order 13 allocations: 6 (XEN) [ 4.161604] order 14 allocations: 6 (XEN) [ 4.164251] order 15 allocations: 7 (XEN) [ 4.166892] order 16 allocations: 6 (XEN) [ 4.169521] order 17 allocations: 4 (XEN) [ 4.172048] order 18 allocations: 10 (XEN) [ 4.994309] ELF: phdr: paddr=3D0x200000 memsz=3D0x1ff3928 (XEN) [ 4.997011] ELF: phdr: paddr=3D0x2200000 memsz=3D0x1c00000 (XEN) [ 4.999686] ELF: memory: 0x200000 -> 0x3e00000 (XEN) [ 5.002404] ELF: note: PHYS32_RELOC align: 0x200000 min: 0x200= 000 max: 0x3fffffff (XEN) [ 5.005451] ELF: note: PHYS32_ENTRY =3D 0x16a2ca0 (XEN) [ 5.008519] ELF: note: GUEST_OS =3D "linux" (XEN) [ 5.011562] ELF: note: GUEST_VERSION =3D "2.6" (XEN) [ 5.014634] ELF: note: XEN_VERSION =3D "xen-3.0" (XEN) [ 5.017712] ELF: note: VIRT_BASE =3D 0xffffffff80000000 (XEN) [ 5.020795] ELF: note: INIT_P2M =3D 0x8000000000 (XEN) [ 5.023856] ELF: note: ENTRY =3D 0xffffffff82d3c160 (XEN) [ 5.026924] ELF: note: FEATURES =3D "!writable_page_tables" (XEN) [ 5.029976] ELF: note: PAE_MODE =3D "yes" (XEN) [ 5.032882] ELF: note: L1_MFN_VALID (XEN) [ 5.035516] ELF: note: MOD_START_PFN =3D 0x1 (XEN) [ 5.038442] ELF: note: PADDR_OFFSET =3D 0 (XEN) [ 5.041250] ELF: note: SUPPORTED_FEATURES =3D 0x8801 (XEN) [ 5.044169] ELF: note: LOADER =3D "generic" (XEN) [ 5.047048] ELF: note: SUSPEND_CANCEL =3D 0x1 (XEN) [ 5.049931] ELF: Found PVH image (XEN) [ 5.052712] ELF: addresses: (XEN) [ 5.055090] virt_base =3D 0x0 (XEN) [ 5.057552] elf_paddr_offset =3D 0x0 (XEN) [ 5.060007] virt_offset =3D 0x0 (XEN) [ 5.062476] virt_kstart =3D 0x200000 (XEN) [ 5.064924] virt_kend =3D 0x3e00000 (XEN) [ 5.067380] virt_entry =3D 0x16a2ca0 (XEN) [ 5.069841] p2m_base =3D 0x8000000000 (XEN) [ 5.072319] ELF: phdr 0 at 0x200000 -> 0x21f3928 (XEN) [ 5.080076] ELF: phdr 1 at 0x2200000 -> 0x3e00000 (XEN) [ 5.090182] Dom0 memory map: (XEN) [ 5.092531] [0000000000000000, 000000000009efff] (usable) (XEN) [ 5.095086] [000000000009f000, 00000000000fffff] (reserved) (XEN) [ 5.097625] [0000000000100000, 000000005471afff] (usable) (XEN) [ 5.100156] [000000005471b000, 000000005475bfff] (reserved) (XEN) [ 5.102704] [000000005475c000, 0000000063c2dfff] (usable) (XEN) [ 5.105259] [0000000063c2e000, 000000006d17afff] (reserved) (XEN) [ 5.107853] [000000006d17b000, 000000006d22bfff] (ACPI data) (XEN) [ 5.110459] [000000006d22c000, 000000006d2ebfff] (ACPI NVS) (XEN) [ 5.113082] [000000006d2ec000, 000000006fffefff] (reserved) (XEN) [ 5.115726] [000000006ffff000, 000000006ffffdcb] (usable) (XEN) [ 5.118388] [000000006ffffdcc, 000000006ffffe97] (ACPI data) (XEN) [ 5.121080] [0000000070000000, 00000000807fffff] (reserved) (XEN) [ 5.123776] [00000000c0000000, 00000000cfffffff] (reserved) (XEN) [ 5.126498] [00000000fe000000, 00000000fe010fff] (reserved) (XEN) [ 5.129244] [00000000fec00000, 00000000fec00fff] (reserved) (XEN) [ 5.132001] [00000000fed00000, 00000000fed00fff] (reserved) (XEN) [ 5.134797] [00000000fed20000, 00000000fed7ffff] (reserved) (XEN) [ 5.137619] [00000000fee00000, 00000000fee00fff] (reserved) (XEN) [ 5.140436] [00000000ff000000, 00000001023fffff] (reserved) (XEN) [ 5.143271] [0000000102400000, 0000000468b34fff] (usable) (XEN) [ 5.146131] [0000000468b35000, 000000047f7fffff] (unusable) (XEN) [ 5.149015] Initial low memory virq threshold set at 0x4000 pa= ges. (XEN) [ 5.151852] Scrubbing Free RAM in background (XEN) [ 5.154667] Std. Loglevel: All (XEN) [ 5.157465] Guest Loglevel: All (XEN) [ 5.160250] Xen is relinquishing VGA console. (XEN) [ 5.166762] *** Serial input to DOM0 (type 'CTRL-a' three time= s to switch input) (XEN) [ 5.167550] Re-running stub recovery selftests... (XEN) [ 5.167692] Fixup #UD[0000]: ffff82d07fffe044 [ffff82d07fffe04= 4] -> ffff82d0403b8753 (XEN) [ 5.167914] Fixup #GP[0000]: ffff82d07fffe045 [ffff82d07fffe04= 5] -> ffff82d0403b8753 (XEN) [ 5.168139] Fixup #SS[0000]: ffff82d07fffe044 [ffff82d07fffe04= 4] -> ffff82d0403b8753 (XEN) [ 5.168359] Fixup #BP[0000]: ffff82d07fffe045 [ffff82d07fffe04= 5] -> ffff82d0403b8753 (XEN) [ 5.168662] Freed 720kB init memory (XEN) [ 6.884758] d0v0: upcall vector f3 Interestingly, this appear to have worked on Xen 4.19.3. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --rAuO+Q0Dl2rqoauD Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmOolYACgkQ24/THMrX 1yxVqwf9GfdG0bARTV/AM84KSWr2FdWr+RIUpTDW5FUr3OgWnwPokbO+StETmk+6 8rreqys8ODYbXaS+IWsJWosin7mA5B1tJcU4I7lvT4pAmbuT7nR/wPYmsBl0PTCB dYSeI7b0OmXl/1XR0gTW5MPBLHSRmlLWHPdOR+KCPbxb20BWldSPlOqoIwfBT0aL +3VwojIi1WBNNgiSKJ3x1REW/JAOuCwvtsC7rHmlHc4QaeuWhIv6/CN63q6fl+3o I0dUfiR8w8F//6iyGFh1e9kT2kGrG53Pti0AGu9PTWJu1KKEiSoT40W2Ph7NOcqY ImKublw9WKg/B4XfjxDjYpbZzZGN1A== =+ykz -----END PGP SIGNATURE----- --rAuO+Q0Dl2rqoauD-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 05:32:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 05:32:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230211.1535752 (Exim 4.92) (envelope-from ) id 1vqlmY-0006K2-BP; Fri, 13 Feb 2026 05:31:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230211.1535752; Fri, 13 Feb 2026 05:31:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqlmY-0006Jv-7w; Fri, 13 Feb 2026 05:31:58 +0000 Received: by outflank-mailman (input) for mailman id 1230211; Fri, 13 Feb 2026 05:31:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqlmW-0006Jp-Sb for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 05:31:57 +0000 Received: from mail-yx1-xb133.google.com (mail-yx1-xb133.google.com [2607:f8b0:4864:20::b133]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4e066a7d-089d-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 06:31:54 +0100 (CET) Received: by mail-yx1-xb133.google.com with SMTP id 956f58d0204a3-64acd19e1dfso530995d50.0 for ; Thu, 12 Feb 2026 21:31:54 -0800 (PST) Received: from [10.138.34.110] (h69-131-216-128.cncrtn.broadband.dynamic.tds.net. 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Thu, 12 Feb 2026 21:31:52 -0800 (PST) Message-ID: Date: Fri, 13 Feb 2026 00:31:47 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel , intel-xe@lists.freedesktop.org References: Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------jOg7GeT3X3YVR5VOQBiQ2OhK" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------jOg7GeT3X3YVR5VOQBiQ2OhK Content-Type: multipart/mixed; boundary="------------Y0BYarGPpLAyvgRCH0CQV6AR"; protected-headers="v1" Message-ID: Date: Fri, 13 Feb 2026 00:31:47 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel , intel-xe@lists.freedesktop.org References: Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: Autocrypt-Gossip: addr=marmarek@invisiblethingslab.com; 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boundary="------------EdX0l0OYn0TsjuKSh4OjZtQf" --------------EdX0l0OYn0TsjuKSh4OjZtQf Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/12/26 20:23, Marek Marczykowski-G=C3=B3recki wrote: > On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: >> On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3re= cki wrote: >>> Hi, >>> >>> Recently I started testing compatibility with Intel Lunar Lake. This = is >>> the first one that uses "xe" instead of "i915" Linux driver for iGPU.= >>> I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 runnin= g >>> Linux 6.17.9 in this test. >> >> Not sure it's going to help a lot, but does using a PVH dom0 make any >> difference? >=20 > Ok, now with the correct Xen version, it's better with PVH dom0. At > least on the login screen and few applications (from both dom0 and domU= ) > I don't see the glitches anymore. I can't do a full test, because PCI > passthrough doesn't seem to work with PVH dom0 on Xen 4.19 - and I need= > it to start most VMs. >=20 > So, if the above test is representative, it's only about PV dom0. This reminds me of a problem that I helped debug a while back, and which also affected Qubes OS. That one was due to some part of Linux core MM clobbering the high bit of the PAT part of PTEs. As a result, a PTE that should have referenced entry X in the PAT wound up referencing entry (X & 3). On native Linux, the bug was mostly harmless, which is why nobody found it earlier. However, on Xen PV, the different PAT caused memory to be cached that should not be. The resulting symptoms were very similar to what Marek described, though a bit less dramatic. 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(jpms-ob02.noc.sony.co.jp [2001:cf8:ace:41::5]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 368f5d6e-08af-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 08:40:09 +0100 (CET) Received: from unknown (HELO jpmta-ob02.noc.sony.co.jp) ([IPv6:2001:cf8:0:6e7::7]) by jpms-ob02.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2026 16:40:03 +0900 Received: from unknown (HELO JPC00244420) ([IPv6:2001:cf8:1:573:0:dddd:6b3e:119e]) by jpmta-ob02.noc.sony.co.jp with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2026 16:40:03 +0900 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 368f5d6e-08af-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sony.com; s=s1jp; t=1770968409; x=1802504409; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=Pzfx5lLFbK5d4r8P3rsCdaD/raTj07tQWAB1fg3LiRQ=; b=m8oBftKTNKpoVopC53ILft1JMewZ008YyIHcBkiQr5WLrs0RLwllFRUw jXS847f/RSdw/jvD4L5xqmewkpP6riUiqtamPr2FOrvFBgUSU7vrR3YyL kmdMSDFsi6ztKlIdL34CkJ3203LqyiorcGGSeIITFyycoGH+flS4T2RfD DoJkpWZBpXLy2lKbydxWpGhNn1QXZP5mgaZWxAqFHq5i9jE8ORboeepIs 7rTDzFKbdarphlrc1ODP1fd1AeW04aDRiwx+4V3WvZw8Os5RxKyWoQQHD /xoGycue3IM/9PZWY8i/C5095o8RFRRXEhM4klKD6qEjr47GpMrVWj5DJ Q==; X-IronPort-AV: E=Sophos;i="6.21,288,1763391600"; d="scan'208";a="581327796" Date: Fri, 13 Feb 2026 16:39:59 +0900 From: Shashank Balaji To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Suresh Siddha , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Jan Kiszka , Paolo Bonzini , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky Cc: Ingo Molnar , linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, jailhouse-dev@googlegroups.com, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, Rahul Bukte , Daniel Palmer , Tim Bird , Sohil Mehta Subject: Re: [PATCH 3/3] x86/virt: rename x2apic_available to x2apic_without_ir_available Message-ID: References: <20260202-x2apic-fix-v1-0-71c8f488a88b@sony.com> <20260202-x2apic-fix-v1-3-71c8f488a88b@sony.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260202-x2apic-fix-v1-3-71c8f488a88b@sony.com> Hi x86 and virt folks, I'd like some feedback on this patch. I realise that just updating the name to x2apic_without_ir_available() with no indication in the code suggesting that the hypervisor implementations may not be answering the question "is x2apic availalble without IR?" is bad. I suppose the options are: 1. Check seven hypervisor's x2apic_available() implementation to see if the "x2apic_without_ir_available" semantic matches, and then do the renaming Problem is, I don't know enough about the hypervisors to check the implementations. Some help from the virt folks would be great! 2. Add TODOs on the hypervisor implementations, hoping they'll be audited in the future There's a chance the TODOs will just sit there rotting. It's ugly, even I don't like it So how do we proceed? On Mon, Feb 02, 2026 at 06:51:04PM +0900, Shashank Balaji wrote: > No functional change. > > x86_init.hyper.x2apic_available is used only in try_to_enable_x2apic to check if > x2apic needs to be disabled if interrupt remapping support isn't present. But > the name x2apic_available doesn't reflect that usage. > > This is what x2apic_available is set to for various hypervisors: > > acrn boot_cpu_has(X86_FEATURE_X2APIC) > mshyperv boot_cpu_has(X86_FEATURE_X2APIC) > xen boot_cpu_has(X86_FEATURE_X2APIC) or false > vmware vmware_legacy_x2apic_available > kvm kvm_cpuid_base() != 0 > jailhouse x2apic_enabled() > bhyve true > default false > > Bare metal and vmware correctly check if x2apic is available without interrupt > remapping. The rest of them check if x2apic is enabled/supported, and kvm just > checks if the kernel is running on kvm. The other hypervisors may have to have > their checks audited. > > Also fix the backwards pr_info message printed on disabling x2apic because of > lack of irq remapping support. > > Compile tested with all the hypervisor guest support enabled. > > Co-developed-by: Rahul Bukte > Signed-off-by: Rahul Bukte > Signed-off-by: Shashank Balaji > --- > arch/x86/include/asm/x86_init.h | 4 ++-- > arch/x86/kernel/apic/apic.c | 4 ++-- > arch/x86/kernel/cpu/acrn.c | 2 +- > arch/x86/kernel/cpu/bhyve.c | 2 +- > arch/x86/kernel/cpu/mshyperv.c | 2 +- > arch/x86/kernel/cpu/vmware.c | 2 +- > arch/x86/kernel/jailhouse.c | 2 +- > arch/x86/kernel/kvm.c | 2 +- > arch/x86/kernel/x86_init.c | 12 ++++++------ > arch/x86/xen/enlighten_hvm.c | 4 ++-- > 10 files changed, 18 insertions(+), 18 deletions(-) > > diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h > index 6c8a6ead84f6..b270d9eed755 100644 > --- a/arch/x86/include/asm/x86_init.h > +++ b/arch/x86/include/asm/x86_init.h > @@ -116,7 +116,7 @@ struct x86_init_pci { > * struct x86_hyper_init - x86 hypervisor init functions > * @init_platform: platform setup > * @guest_late_init: guest late init > - * @x2apic_available: X2APIC detection > + * @x2apic_without_ir_available: is x2apic available without irq remap? > * @msi_ext_dest_id: MSI supports 15-bit APIC IDs > * @init_mem_mapping: setup early mappings during init_mem_mapping() > * @init_after_bootmem: guest init after boot allocator is finished > @@ -124,7 +124,7 @@ struct x86_init_pci { > struct x86_hyper_init { > void (*init_platform)(void); > void (*guest_late_init)(void); > - bool (*x2apic_available)(void); > + bool (*x2apic_without_ir_available)(void); > bool (*msi_ext_dest_id)(void); > void (*init_mem_mapping)(void); > void (*init_after_bootmem)(void); > diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c > index cc64d61f82cf..8820b631f8a2 100644 > --- a/arch/x86/kernel/apic/apic.c > +++ b/arch/x86/kernel/apic/apic.c > @@ -1836,8 +1836,8 @@ static __init void try_to_enable_x2apic(int remap_mode) > * Using X2APIC without IR is not architecturally supported > * on bare metal but may be supported in guests. > */ > - if (!x86_init.hyper.x2apic_available()) { > - pr_info("x2apic: IRQ remapping doesn't support X2APIC mode\n"); > + if (!x86_init.hyper.x2apic_without_ir_available()) { > + pr_info("x2apic: Not supported without IRQ remapping\n"); > x2apic_disable(); > return; > } > diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c > index 2c5b51aad91a..9204b98d4786 100644 > --- a/arch/x86/kernel/cpu/acrn.c > +++ b/arch/x86/kernel/cpu/acrn.c > @@ -77,5 +77,5 @@ const __initconst struct hypervisor_x86 x86_hyper_acrn = { > .detect = acrn_detect, > .type = X86_HYPER_ACRN, > .init.init_platform = acrn_init_platform, > - .init.x2apic_available = acrn_x2apic_available, > + .init.x2apic_without_ir_available = acrn_x2apic_available, > }; > diff --git a/arch/x86/kernel/cpu/bhyve.c b/arch/x86/kernel/cpu/bhyve.c > index f1a8ca3dd1ed..91a90a7459ce 100644 > --- a/arch/x86/kernel/cpu/bhyve.c > +++ b/arch/x86/kernel/cpu/bhyve.c > @@ -61,6 +61,6 @@ const struct hypervisor_x86 x86_hyper_bhyve __refconst = { > .name = "Bhyve", > .detect = bhyve_detect, > .init.init_platform = x86_init_noop, > - .init.x2apic_available = bhyve_x2apic_available, > + .init.x2apic_without_ir_available = bhyve_x2apic_available, > .init.msi_ext_dest_id = bhyve_ext_dest_id, > }; > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c > index 579fb2c64cfd..61458855094a 100644 > --- a/arch/x86/kernel/cpu/mshyperv.c > +++ b/arch/x86/kernel/cpu/mshyperv.c > @@ -760,7 +760,7 @@ const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { > .name = "Microsoft Hyper-V", > .detect = ms_hyperv_platform, > .type = X86_HYPER_MS_HYPERV, > - .init.x2apic_available = ms_hyperv_x2apic_available, > + .init.x2apic_without_ir_available = ms_hyperv_x2apic_available, > .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id, > .init.init_platform = ms_hyperv_init_platform, > .init.guest_late_init = ms_hyperv_late_init, > diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c > index cb3f900c46fc..46d325818797 100644 > --- a/arch/x86/kernel/cpu/vmware.c > +++ b/arch/x86/kernel/cpu/vmware.c > @@ -585,7 +585,7 @@ const __initconst struct hypervisor_x86 x86_hyper_vmware = { > .detect = vmware_platform, > .type = X86_HYPER_VMWARE, > .init.init_platform = vmware_platform_setup, > - .init.x2apic_available = vmware_legacy_x2apic_available, > + .init.x2apic_without_ir_available = vmware_legacy_x2apic_available, > #ifdef CONFIG_AMD_MEM_ENCRYPT > .runtime.sev_es_hcall_prepare = vmware_sev_es_hcall_prepare, > .runtime.sev_es_hcall_finish = vmware_sev_es_hcall_finish, > diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c > index 9e9a591a5fec..84a0bbe15989 100644 > --- a/arch/x86/kernel/jailhouse.c > +++ b/arch/x86/kernel/jailhouse.c > @@ -291,6 +291,6 @@ const struct hypervisor_x86 x86_hyper_jailhouse __refconst = { > .name = "Jailhouse", > .detect = jailhouse_detect, > .init.init_platform = jailhouse_init_platform, > - .init.x2apic_available = jailhouse_x2apic_available, > + .init.x2apic_without_ir_available = jailhouse_x2apic_available, > .ignore_nopv = true, > }; > diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c > index 37dc8465e0f5..709eba87d58e 100644 > --- a/arch/x86/kernel/kvm.c > +++ b/arch/x86/kernel/kvm.c > @@ -1042,7 +1042,7 @@ const __initconst struct hypervisor_x86 x86_hyper_kvm = { > .detect = kvm_detect, > .type = X86_HYPER_KVM, > .init.guest_late_init = kvm_guest_init, > - .init.x2apic_available = kvm_para_available, > + .init.x2apic_without_ir_available = kvm_para_available, > .init.msi_ext_dest_id = kvm_msi_ext_dest_id, > .init.init_platform = kvm_init_platform, > #if defined(CONFIG_AMD_MEM_ENCRYPT) > diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c > index ebefb77c37bb..9ddf8c901ac6 100644 > --- a/arch/x86/kernel/x86_init.c > +++ b/arch/x86/kernel/x86_init.c > @@ -112,12 +112,12 @@ struct x86_init_ops x86_init __initdata = { > }, > > .hyper = { > - .init_platform = x86_init_noop, > - .guest_late_init = x86_init_noop, > - .x2apic_available = bool_x86_init_noop, > - .msi_ext_dest_id = bool_x86_init_noop, > - .init_mem_mapping = x86_init_noop, > - .init_after_bootmem = x86_init_noop, > + .init_platform = x86_init_noop, > + .guest_late_init = x86_init_noop, > + .x2apic_without_ir_available = bool_x86_init_noop, > + .msi_ext_dest_id = bool_x86_init_noop, > + .init_mem_mapping = x86_init_noop, > + .init_after_bootmem = x86_init_noop, > }, > > .acpi = { > diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c > index fe57ff85d004..42f3d21f313d 100644 > --- a/arch/x86/xen/enlighten_hvm.c > +++ b/arch/x86/xen/enlighten_hvm.c > @@ -311,7 +311,7 @@ static uint32_t __init xen_platform_hvm(void) > * detect PVH and panic there. > */ > h->init_platform = x86_init_noop; > - h->x2apic_available = bool_x86_init_noop; > + h->x2apic_without_ir_available = bool_x86_init_noop; > h->init_mem_mapping = x86_init_noop; > h->init_after_bootmem = x86_init_noop; > h->guest_late_init = xen_hvm_guest_late_init; > @@ -325,7 +325,7 @@ struct hypervisor_x86 x86_hyper_xen_hvm __initdata = { > .detect = xen_platform_hvm, > .type = X86_HYPER_XEN_HVM, > .init.init_platform = xen_hvm_guest_init, > - .init.x2apic_available = xen_x2apic_available, > + .init.x2apic_without_ir_available = xen_x2apic_available, > .init.init_mem_mapping = xen_hvm_init_mem_mapping, > .init.guest_late_init = xen_hvm_guest_late_init, > .init.msi_ext_dest_id = msi_ext_dest_id, > > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Fri Feb 13 07:54:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 07:54:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230271.1535772 (Exim 4.92) (envelope-from ) id 1vqo0k-0006cw-7g; Fri, 13 Feb 2026 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X-MS-Exchange-CrossTenant-Network-Message-Id: 1558ad22-dc0a-4037-a8c9-08de6ad52312 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 07:54:38.5521 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2t0zbjyHhJAJ7ixcOLhNLHwcFMiUi3O6A9GiFw6TdKtayPGLBIhW02bDPckmPAIsS1nCXl5Y8BCvwV7d61pLkQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB5902 On Fri, Feb 13, 2026 at 01:39:56AM +0100, Marek Marczykowski-Górecki wrote: > On Fri, Sep 15, 2023 at 09:43:47AM +0200, Roger Pau Monne wrote: > > The current logic to chose the preferred reboot method is based on the mode Xen > > has been booted into, so if the box is booted from UEFI, the preferred reboot > > method will be to use the ResetSystem() run time service call. > > > > However, that method seems to be widely untested, and quite often leads to a > > result similar to: > > > > Hardware Dom0 shutdown: rebooting machine > > ----[ Xen-4.18-unstable x86_64 debug=y Tainted: C ]---- > > CPU: 0 > > RIP: e008:[<0000000000000017>] 0000000000000017 > > RFLAGS: 0000000000010202 CONTEXT: hypervisor > > [...] > > Xen call trace: > > [<0000000000000017>] R 0000000000000017 > > [] S ffff83207eff7b50 > > [] F machine_restart+0x1da/0x261 > > [] F apic_wait_icr_idle+0/0x37 > > [] F smp_call_function_interrupt+0xc7/0xcb > > [] F call_function_interrupt+0x20/0x34 > > [] F do_IRQ+0x150/0x6f3 > > [] F common_interrupt+0x132/0x140 > > [] F arch/x86/acpi/cpu_idle.c#acpi_idle_do_entry+0x113/0x129 > > [] F arch/x86/acpi/cpu_idle.c#acpi_processor_idle+0x3eb/0x5f7 > > [] F arch/x86/domain.c#idle_loop+0xec/0xee > > > > **************************************** > > Panic on CPU 0: > > FATAL TRAP: vector = 6 (invalid opcode) > > **************************************** > > > > Which in most cases does lead to a reboot, however that's unreliable. > > It's not relevant anymore, but posting just for the posterity: I > just found yet another system where EFI ResetSystem() crashes. What's > interesting about it, it's rather new system - NUC 14 with Lunar Lake. > It crashes as follows: Interesting, all the NUC systems I owned had what seemed like proper UEFI implementations. However those are the Intel ones. Lunar Lake is made by ASUS. Thanks, Roger. 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Fri, 13 Feb 2026 00:13:00 -0800 (PST) Message-ID: <66d789ce-8a71-4115-a2f5-356dbcb4a82a@suse.com> Date: Fri, 13 Feb 2026 09:12:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9] common: honor CONFIG_CC_SPLIT_SECTIONS also for assembly functions To: Alejandro Vallejo Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk , Oleksii Kurochko , Xen-devel , Jason Andryuk , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 19:29, Alejandro Vallejo wrote: > On Wed Jan 28, 2026 at 3:35 PM CET, Jason Andryuk wrote: >> On 2025-04-01 06:58, Jan Beulich wrote: >>> Leverage the new infrastructure in xen/linkage.h to also switch to per- >>> function sections (when configured), deriving the specific name from the >>> "base" section in use at the time FUNC() is invoked. >>> >>> Signed-off-by: Jan Beulich >>> Tested-by: Luca Fancellu # arm > > I don't seem to have the original patch in my inbox, so I'll just answer here. > > About the assembly modifications on the exception entry points: > > With split sections the linker is free to reorder all of them as it sees fit, > which probably means we want int3 after every jump to prevent straight-line > speculation from allocating an XSA number for us. It's possible the linker might > inject them, but it might also not. Better to err on the side of caution. We're lacking such INT3 elsewhere, hence why this is the topic of separate (existing) work. See how, for example, we're also not using -mharden-sls=all. See e.g. [1] for a very old posting. Even in my outbox I can't find newer postings covering more stuff. Intermediately some of this was posted to security@ only, but there clearly was the plan to have all of this in public. > Though more generally, I'd just keep all exception entry points in the same > section. They'd never get GC'ed anyway and we're paying an extra branch in the > #PF path for no reason. Inserting a branch there was, iirc, asked for by someone independent of this work. But yes, suppressing too fine grained section splits is an option. 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This in turns > confused PVH dom0 code, resulting in the following crash: > > (XEN) [ 3.934848] d0: GFN 0x5475c (0x5475c,5,3) -> (0x46a0f4,0,7) not permitted (0x20) > (XEN) [ 3.969657] domain_crash called from arch/x86/mm/p2m.c:695 > (XEN) [ 3.972568] Domain 0 reported crashed by domain 32767 on cpu#0: > (XEN) [ 3.975527] Hardware Dom0 crashed: rebooting machine in 5 seconds. > (XEN) [ 8.986353] Resetting with ACPI MEMORY or I/O RESET_REG. > > I checked other parts of this API and it was the only error like this. > Other places: > - iommu_get_extra_reserved_device_memory() -> reserve_e820_ram() - this > function expects exclusive range, so the code is correct > - add_one_extra_ivmd() - this operates on start address and memory > length > You possibly want: Fixes: 2d9b3699136d ("IOMMU/VT-d: wire common device reserved memory API") > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Roger Pau Monné > --- > xen/drivers/passthrough/vtd/dmar.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c > index 91c22b833043..3da0854e6d91 100644 > --- a/xen/drivers/passthrough/vtd/dmar.c > +++ b/xen/drivers/passthrough/vtd/dmar.c > @@ -1065,7 +1065,7 @@ static int __init add_user_rmrr(void) > static int __init cf_check add_one_extra_rmrr(xen_pfn_t start, xen_ulong_t nr, u32 id, void *ctxt) > { > u32 sbdf_array[] = { id }; > - return add_one_user_rmrr(start, start+nr, 1, sbdf_array); > + return add_one_user_rmrr(start, start + nr - 1, 1, sbdf_array); While here, would you mind if we add a newline between the sbdf_array definition and the return? Thanks, Roger. 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Fri, 13 Feb 2026 00:18:45 -0800 (PST) Message-ID: <50a017e9-700d-487c-a04b-8a2ef5e7b3b3@suse.com> Date: Fri, 13 Feb 2026 09:18:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Put wait.c behind CONFIG_WAIT To: Jason Andryuk Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org, Andrew Cooper References: <20260211170118.109946-1-jason.andryuk@amd.com> <73bf621d-0795-4fbe-b926-71be3525b4c7@citrix.com> <37fd63a2-786c-497e-9bf9-de9ea9708509@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <37fd63a2-786c-497e-9bf9-de9ea9708509@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.02.2026 20:14, Jason Andryuk wrote: > On 2026-02-12 02:38, Jan Beulich wrote: >> On 11.02.2026 18:30, Andrew Cooper wrote: >>> On 11/02/2026 5:01 pm, Jason Andryuk wrote: >>>> wait.c is only used by vm_event.c. Make CONFIG_VM_EVENT select >>>> CONFIG_WAIT, and use CONFIG_WAIT to control building it. >>>> >>>> Provide stubs of functions called from common code. entry.S needs an >>>> ifdef to hide the symbol from the assembly. >>>> >>>> Also conditionalize .waitqueue_vcpu in struct vcpu to save space. >>>> >>>> Signed-off-by: Jason Andryuk >>> >>> I'd really rather see the API/ABI changes required to purge wait.c >>> entirely, but I guess this will do in the short term. >>> >>> Two things want further thought. >>> >>> First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't >>> need this infrastructure in the first place, but it looks like it's >>> still compiled in and half wired up.  I suppose you don't notice because >>> you compile out VM_EVENT on ARM too? >> >> But if we want it compiled out altogether on Arm, ... >> >>> Second CONFIG_WAIT isn't great name because there are many things it >>> could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without >>> CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will >>> disappear at some point. >> >> ... don't we need a separate kconfig control, for it to be selected only >> on x86 (or for it to be dependent on x86, and then imply-ed)? Imo >> CONFIG_WAITQUEUE would be okay, as long as it won't have a prompt. We'd >> then simply want to prevent further select-s / imply-s to appear. > > ARM VM_EVENT=y won't link without wait.o. Undefined references to: > wake_up_nr > prepare_to_wait > finish_wait > destroy_waitqueue_head > init_waitqueue_head Hmm, okay, assuming that then also actually works, ... > So I think that points to re-using my original patch, but with either > CONFIG_WAITQUEUE or CONFIG_VM_EVENT. Since CONFIG_VM_EVENT is the only > user, and we don't want further uses, I would use that. ... please do. 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Fri, 13 Feb 2026 00:22:25 -0800 (PST) Message-ID: <1a98f22d-ef9e-4df2-aa87-585713cd3989@suse.com> Date: Fri, 13 Feb 2026 09:22:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/5] darwin: expand cross-builds to also support x86 and testing To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260212144618.43200-1-roger.pau@citrix.com> <61a3f852-915c-4d9f-8dde-01d000aa4fe7@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <61a3f852-915c-4d9f-8dde-01d000aa4fe7@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 18:58, Andrew Cooper wrote: > Also, during the final link steps for xen.efi, we twice get: > > [10:09:57.995] Warning: relocation to r/o section .text:00000048 > [10:09:57.995] Warning: relocation to r/o section .text:00000090 > > which smells like the multiboot header. It is. These diagnostics are seen only when older ld is in use, but the issue exists in all cases. It should really already be on someone's todo list wrt fully secure boot conformant xen.efi, as we did discuss this in the past. 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Make CONFIG_VM_EVENT select > > > > CONFIG_WAIT, and use CONFIG_WAIT to control building it. > > > > > > > > Provide stubs of functions called from common code. entry.S needs an > > > > ifdef to hide the symbol from the assembly. > > > > > > > > Also conditionalize .waitqueue_vcpu in struct vcpu to save space. > > > > > > > > Signed-off-by: Jason Andryuk > > > > > > I'd really rather see the API/ABI changes required to purge wait.c > > > entirely, but I guess this will do in the short term. > > > > > > Two things want further thought. > > > > > > First, because ARM uses per-vCPU stacks not per-pCPU stacks, it doesn't > > > need this infrastructure in the first place, but it looks like it's > > > still compiled in and half wired up.  I suppose you don't notice because > > > you compile out VM_EVENT on ARM too? > > > > But if we want it compiled out altogether on Arm, ... > > > > > Second CONFIG_WAIT isn't great name because there are many things it > > > could be.  I'd be tempted to just reuse CONFIG_VM_EVENT and go without > > > CONFIG_WAIT.  I do not want to see any new users of wait.c, and it will > > > disappear at some point. > > > > ... don't we need a separate kconfig control, for it to be selected only > > on x86 (or for it to be dependent on x86, and then imply-ed)? Imo > > CONFIG_WAITQUEUE would be okay, as long as it won't have a prompt. We'd > > then simply want to prevent further select-s / imply-s to appear. > > ARM VM_EVENT=y won't link without wait.o. Undefined references to: > wake_up_nr > prepare_to_wait > finish_wait > destroy_waitqueue_head > init_waitqueue_head > > So I think that points to re-using my original patch, but with either > CONFIG_WAITQUEUE or CONFIG_VM_EVENT. Since CONFIG_VM_EVENT is the only > user, and we don't want further uses, I would use that. But I am open to > either. I think hiding behind CONFIG_VM_EVENT is better, we want to avoid new instances of waitqueue (at least in it's current state), so not sure it makes a lot of sense to add it under a different Kconfig option if our intention is for waitqueue to only be used with VM events. Thanks, Roger. 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Fri, 13 Feb 2026 00:56:43 -0800 (PST) Message-ID: <440f94be-77c0-4b28-b107-6efc3623a92f@suse.com> Date: Fri, 13 Feb 2026 09:56:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Cannot boot PVH dom0 with big initrd To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: Content-Language: en-US Cc: xen-devel From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 05:02, Marek Marczykowski-Górecki wrote: > Hi, > > After fixing the xhci crash, I hit another issue - booting with 236MB > initrd doesn't work, I get: > > (XEN) [ 3.151856] *** Building a PVH Dom0 *** > ... > (XEN) [ 3.593940] Unable to allocate memory with order 0! > (XEN) [ 3.597110] Failed to setup Dom0 physical memory map > (XEN) [ 3.599884] > (XEN) [ 3.602482] **************************************** > (XEN) [ 3.605272] Panic on CPU 0: > (XEN) [ 3.607928] Could not construct d0 > (XEN) [ 3.610692] **************************************** > (XEN) [ 3.613463] > (XEN) [ 3.616035] Reboot in five seconds... > (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_REG. > > Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f2899781755762f565 > > If I skip initrd, then it boots just fine (but dom0 is not happy about > that). 164MB initrd failed too, but 13MB started ok. > Just in case, I tried skipping XHCI console, but it didn't change > anything. > > Host has 16GB of memory, and there is no dom0_mem= parameter. Xen is > started from GRUB, using MB2+EFI. Hmm, yes, there's an ordering issue: Of course we free initrd space (as used for passing from the boot loader to Xen) only after copying to the designated guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in its calculation (adding initial_images_nrpages()'s return value). PV Dom0 isn't affected because to load huge initrd there, the kernel has to request the initrd to not be mapped into the initial allocation. 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=?utf-8?B?VWcrcTR2WXp3N3B6a3dnWitmMmpDRm5UR1dETXU3MzVCNVI4SXpjWFJTalBN?= =?utf-8?B?NkVyclFpbDY2UmtJUEYzbW9YSlZVM2s1UGMrcWxCaXJCSUdLVUV3Q29WMDcr?= =?utf-8?B?eVdDRWcwS2hhRmNpNkxCM0ZVdGtyS2w5d0JNb2pPcTF6aWRIUTVodz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7854f834-f0a0-4f4b-6e41-08de6ae13389 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 09:21:00.0681 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: wjm9Hwlo//ynYn9b9L9aB5nqqaanjA2NGOaQRH3Fm7LCzCTC5pUr0Z4AiCJRJmzJ1XsGSjx/C0XYjt25bZbdOA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR03MB5151 On Fri, Feb 13, 2026 at 09:22:24AM +0100, Jan Beulich wrote: > On 12.02.2026 18:58, Andrew Cooper wrote: > > Also, during the final link steps for xen.efi, we twice get: > > > > [10:09:57.995] Warning: relocation to r/o section .text:00000048 > > [10:09:57.995] Warning: relocation to r/o section .text:00000090 > > > > which smells like the multiboot header. > > It is. These diagnostics are seen only when older ld is in use, but the > issue exists in all cases. Oh, it took me a while to figure that out. Newer ld generates the relocations itself, and hence we no longer use mkreloc that would print those warnings. However ld generated relocations will still be against read-execute section, and hence as you say the issue also exists there. However the ld version on Darwin is: GNU ld (GNU Binutils) 2.45.1 So the issue is not with the version of ld using in the Darwin build being too old, but rather the checking done in efi-nr-fixups not working well with BSD grep. It needs to be adjusted to use -E, otherwise [[:blank:]] is not recognized. I will send a patch. > It should really already be on someone's todo > list wrt fully secure boot conformant xen.efi, as we did discuss this in > the past. I did start on it: https://lore.kernel.org/xen-devel/20250401130840.72119-1-roger.pau@citrix.com/ However at the time I did this, the XenServer Secure Boot implementation was doing something that would have been incompatible with this work, and hence I set it on the side. Later on, the XenServer implementation changed and picked up most of this work internally. I however never got back to this work, neither the people that internally worked on Secure Boot send an updated version of the patches. I will see whether I can make some progress on this. Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ziXe6TQXeOtq11FYvCZThdABBZzcFmiCgg57utx/Gq1CEBrBnsb3FTThnzJzrncF+qMQyppcAeS+gZuW7qTOZgGuR7AV+EtKjknBhjY5x7euvzwhEdoYJk47UfNaIegRk8xmG4WgR1rdY9FetNT4mU73piHL+4PIsd9BzNkCksZhbGEdoFjny9QnyKMZoIUgtO1KrfAO9VOmyLHWCqlSUvZSrwbYg0neW9GS2WlXIkwJpyZNfulBYR9qbhg1oLZvtH9m5mHATrjhCcMBGuYe2wFhCYYBC5XCk2Zi1fX3yGXbO1VpCEIczkS6eeDN4KJYhELQqHnC3fAZPGg/Y9AKJsrkwJ1SKRi/yC919KgfWN1LZH65Mj8V8sHnurgVYg/PgiWWsohfaflTIrXN4yBXxc0BF2Ed0qYyW/9tNsWY0hsue7F+5axFZmj0gY0x5HYA X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 09:21:39.2161 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fd74df21-0f2d-41cb-2346-08de6ae14b17 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF00039231.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA6PR08MB10489 Hi Ayan, >=20 > Further if we can set `v8r_el1_msa =3D mmu` by default for everyone (Armv= 8-A, Armv8-R) , then we can reduce further if-def. >=20 This was Michal suggestion to have mpu by default, so I would wait for his = reply before proceeding further on this. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:37:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:37:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230396.1535872 (Exim 4.92) (envelope-from ) id 1vqpcU-00086I-QI; Fri, 13 Feb 2026 09:37:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230396.1535872; Fri, 13 Feb 2026 09:37:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpcU-00086B-MP; Fri, 13 Feb 2026 09:37:50 +0000 Received: by outflank-mailman (input) for mailman id 1230396; Fri, 13 Feb 2026 09:37:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpcT-000865-7i for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="XXKrUVNUniWo3GsC" Content-Disposition: inline In-Reply-To: --XXKrUVNUniWo3GsC Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 10:37:40 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper Subject: Re: [PATCH] VT-d: fix off-by-one when handling extra RMRR ranges On Fri, Feb 13, 2026 at 09:16:50AM +0100, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 13, 2026 at 04:17:48AM +0100, Marek Marczykowski-G=C3=B3recki= wrote: > > add_one_user_rmrr() operates on inclusive [start,end] range, which means > > the end page needs to be calculated as (start + page_count - 1). > > This off-by-one error resulted in one extra pages being mapped in IOMMU > > context, but not marked as reserved in the memory map. This in turns > > confused PVH dom0 code, resulting in the following crash: > >=20 > > (XEN) [ 3.934848] d0: GFN 0x5475c (0x5475c,5,3) -> (0x46a0f4,0,7= ) not permitted (0x20) > > (XEN) [ 3.969657] domain_crash called from arch/x86/mm/p2m.c:695 > > (XEN) [ 3.972568] Domain 0 reported crashed by domain 32767 on c= pu#0: > > (XEN) [ 3.975527] Hardware Dom0 crashed: rebooting machine in 5 = seconds. > > (XEN) [ 8.986353] Resetting with ACPI MEMORY or I/O RESET_REG. > >=20 > > I checked other parts of this API and it was the only error like this. > > Other places: > > - iommu_get_extra_reserved_device_memory() -> reserve_e820_ram() - this > > function expects exclusive range, so the code is correct > > - add_one_extra_ivmd() - this operates on start address and memory > > length > >=20 >=20 > You possibly want: >=20 > Fixes: 2d9b3699136d ("IOMMU/VT-d: wire common device reserved memory API") Yes, indeed. > > Signed-off-by: Marek Marczykowski-G=C3=B3recki >=20 > Reviewed-by: Roger Pau Monn=C3=A9 Thanks. > > --- > > xen/drivers/passthrough/vtd/dmar.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > >=20 > > diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrou= gh/vtd/dmar.c > > index 91c22b833043..3da0854e6d91 100644 > > --- a/xen/drivers/passthrough/vtd/dmar.c > > +++ b/xen/drivers/passthrough/vtd/dmar.c > > @@ -1065,7 +1065,7 @@ static int __init add_user_rmrr(void) > > static int __init cf_check add_one_extra_rmrr(xen_pfn_t start, xen_ulo= ng_t nr, u32 id, void *ctxt) > > { > > u32 sbdf_array[] =3D { id }; > > - return add_one_user_rmrr(start, start+nr, 1, sbdf_array); > > + return add_one_user_rmrr(start, start + nr - 1, 1, sbdf_array); >=20 > While here, would you mind if we add a newline between the sbdf_array > definition and the return? Yes, while at it makes sense to fix that too. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --XXKrUVNUniWo3GsC Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmO8OQACgkQ24/THMrX 1ywCxgf/bGKYMGlcdlyqDYa5ob12UgsT44Rv6U90lG+SGmN/zimsfxN51MGt1f0B JfP4EWlYSFbJcrWSZw2khZuFAnxUwIBdRjIlPmL9tIcmGHJwZnDwY1ZPesMmxtL9 4CnmWbfaw/XI1Op2Fy2bkT1eJ8QkT1Pwpnvf52Jz1cNVbXRE8zGH3fdVJwv1v35L L92pEQLDHINNaYwsYmyecZdOWTkLdSvIIX02WHGaOxdINr7STlUduTHEawY12rYz xXHZes0vfiCHCY7TusODEcBCHCXdCE8KysgyHagrdMp8jcxpsLns53xN5USeGzvZ FJtBU24jw3GyH7b3MZjuKagTlE71gg== =Kncn -----END PGP SIGNATURE----- --XXKrUVNUniWo3GsC-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230414.1535881 (Exim 4.92) (envelope-from ) id 1vqpoF-0001PC-Si; Fri, 13 Feb 2026 09:49:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230414.1535881; Fri, 13 Feb 2026 09:49:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoF-0001P5-Q8; Fri, 13 Feb 2026 09:49:59 +0000 Received: by outflank-mailman (input) for mailman id 1230414; Fri, 13 Feb 2026 09:49:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoE-0001Na-Ct for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 09:49:58 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 59a45184-08c1-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 10:49:56 +0100 (CET) Received: from mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-204-UO1G8VWWM5-a0I864hO_Mw-1; Fri, 13 Feb 2026 04:49:47 -0500 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4BFFD196C419; Fri, 13 Feb 2026 09:49:41 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 108D3195419A; Fri, 13 Feb 2026 09:49:39 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 59a45184-08c1-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976194; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=IXmpt2l7PcSQ+AKwEbUfhSafyH2QKeY5bZPxnsfgnEU=; b=JcrdQ+styHtjuer3cHDC4cTK5ZH6zx4BofHqQU2hMdYFoh9t9Yzl9qaRSe+Tvc3PutxIzK ZI/g7Yn7vaIRElF2rSr2fLS6Gh7R9P02+jnPM1XR6ogePa/MGVMwEHnAy8I7U0dVkDln5r p5mB+C8NBVQb+1ls9RsDr4WNQxLt1Vc= X-MC-Unique: UO1G8VWWM5-a0I864hO_Mw-1 X-Mimecast-MFC-AGG-ID: UO1G8VWWM5-a0I864hO_Mw_1770976184 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault Subject: [PULL v2 00/15] Char patches Date: Fri, 13 Feb 2026 10:49:19 +0100 Message-ID: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: mh_euurqAZLu2kyuwWdAjTCNrM2_O1B_lYBjV1qNMpI_1770976184 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit From: Marc-André Lureau The following changes since commit 4ed6a7f2fdc09d9fc3411e83e278da0085122016: Merge tag 'pull-block-jobs-2026-02-12' of https://gitlab.com/vsementsov/qemu into staging (2026-02-12 14:35:18 +0000) are available in the Git repository at: https://gitlab.com/marcandre.lureau/qemu.git tags/char-pull-request for you to fetch changes up to 98ba0e479771a391137119264156e9661508bbc7: baum: Add copy/paste bindings (2026-02-13 10:45:07 +0100) ---------------------------------------------------------------- chardev patches ---------------------------------------------------------------- Eric K (1): char-udp: Fix initial backend open status Samuel Thibault (1): baum: Add copy/paste bindings Vladimir Sementsov-Ogievskiy (13): ui/spice: Require spice-server >= 0.15.0 ui/spice: drop SPICE_HAS_ATTACHED_WORKER macro chardev: ChardevClass: consistent naming for handlers chardev: consistent naming for ChardevClass handlers implementations chardev: .chr_open(): drop be_opened parameter chardev: .chr_open(): add boolean return value chardev/char-pty: store pty_name into PtyChardev state chardev: introduce .chr_get_pty_name() handler chardev: rework filename handling chardev/char: qemu_char_open(): add return value char: qemu_chr_write_log() use qemu_write_full() error-report: make real_time_iso8601() public chardev: add logtimestamp option meson.build | 2 +- qapi/char.json | 6 +- include/chardev/char.h | 23 ++- include/qemu/error-report.h | 6 + include/ui/qemu-spice.h | 6 - chardev/baum.c | 50 ++++++- chardev/char-console.c | 10 +- chardev/char-fe.c | 8 +- chardev/char-file.c | 26 ++-- chardev/char-hub.c | 27 ++-- chardev/char-mux.c | 30 ++-- chardev/char-null.c | 9 +- chardev/char-parallel.c | 41 +++--- chardev/char-pipe.c | 30 ++-- chardev/char-pty.c | 56 ++++--- chardev/char-ringbuf.c | 20 +-- chardev/char-serial.c | 39 ++--- chardev/char-socket.c | 73 ++++------ chardev/char-stdio.c | 30 ++-- chardev/char-udp.c | 18 +-- chardev/char-win-stdio.c | 25 ++-- chardev/char.c | 137 ++++++++++++------ chardev/msmouse.c | 13 +- chardev/spice.c | 52 +++---- chardev/wctablet.c | 10 +- gdbstub/system.c | 12 +- hw/char/xen_console.c | 7 +- hw/display/qxl.c | 23 +-- hw/misc/ivshmem-pci.c | 7 +- tests/unit/test-char.c | 2 + ui/console-vc.c | 12 +- ui/dbus-chardev.c | 16 +- ui/dbus.c | 4 +- ui/gtk.c | 14 +- ui/spice-app.c | 18 +-- ui/spice-display.c | 19 +-- ui/vdagent.c | 17 +-- util/error-report.c | 3 +- .../codeconverter/test_regexps.py | 2 +- 39 files changed, 473 insertions(+), 430 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230415.1535893 (Exim 4.92) (envelope-from ) id 1vqpoI-0001na-Ac; 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Fri, 13 Feb 2026 04:49:56 -0500 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 1714C185FCC3; Fri, 13 Feb 2026 09:49:49 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id E4B161800465; Fri, 13 Feb 2026 09:49:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5b9a622a-08c1-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976198; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kwUJ3BjGqSrzivArY1rYym7qexid2kYuXoU98jIvc3E=; b=b4RadeaXix8GGAc1IMDIzQmWa5NH+wfN0Cj3XiKaTiQeZH8bErT43QMLAkOflDAaQdPj2o PKx1bbni4A/1t4ftcEncbFS9FV0u5G7Rs1DwyGTK6CG8KfWunyPjsYe52L7/bAq+PTHUu7 aApywLqHyGXVF7N3FV6NplOFzXb0ycI= X-MC-Unique: aMc26E4sPAy9t4jQ84TMZQ-1 X-Mimecast-MFC-AGG-ID: aMc26E4sPAy9t4jQ84TMZQ_1770976194 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 02/15] ui/spice: Require spice-server >= 0.15.0 Date: Fri, 13 Feb 2026 10:49:21 +0100 Message-ID: <20260213094938.4074478-3-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: Q7ektW2NuJtINGMSgzTHvWLZs-ZcH9gOAmEZ1r_z2HE_1770976194 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy For major distributions we have now: Debian 13: 0.15.2 Ubuntu 22.04: 0.15.0 RHEL-9/CentOS Stream 9: SPICE is removed Fedora 42: 0.15.1 OpenSUSE Leap 15.4: 0.15.0 Time to update the dependancy in QEMU and drop almost all SPICE_SERVER_VERSION checks. Suggested-by: Marc-André Lureau Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-2-vsementsov@yandex-team.ru> --- meson.build | 2 +- include/ui/qemu-spice.h | 4 ---- chardev/spice.c | 6 ------ hw/display/qxl.c | 11 ++--------- ui/spice-display.c | 8 ++------ 5 files changed, 5 insertions(+), 26 deletions(-) diff --git a/meson.build b/meson.build index e8fd77aac00..4af32c3e1f2 100644 --- a/meson.build +++ b/meson.build @@ -1326,7 +1326,7 @@ if get_option('spice') \ .require(pixman.found(), error_message: 'cannot enable SPICE if pixman is not available') \ .allowed() - spice = dependency('spice-server', version: '>=0.14.0', + spice = dependency('spice-server', version: '>=0.15.0', required: get_option('spice'), method: 'pkg-config') endif diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h index b7d493742c4..8e5e6b2a744 100644 --- a/include/ui/qemu-spice.h +++ b/include/ui/qemu-spice.h @@ -34,11 +34,7 @@ int qemu_spice_add_display_interface(QXLInstance *qxlin, QemuConsole *con); int qemu_spice_migrate_info(const char *hostname, int port, int tls_port, const char *subject); -#if SPICE_SERVER_VERSION >= 0x000f00 /* release 0.15.0 */ #define SPICE_HAS_ATTACHED_WORKER 1 -#else -#define SPICE_HAS_ATTACHED_WORKER 0 -#endif #else /* CONFIG_SPICE */ diff --git a/chardev/spice.c b/chardev/spice.c index db53b49da26..39b79d60fb4 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -278,12 +278,6 @@ static void qemu_chr_open_spice_vmc(Chardev *chr, } *be_opened = false; -#if SPICE_SERVER_VERSION < 0x000e02 - /* Spice < 0.14.2 doesn't explicitly open smartcard chardev */ - if (strcmp(type, "smartcard") == 0) { - *be_opened = true; - } -#endif chr_open(chr, type); } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index f29b736722c..fbba02113f7 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -261,11 +261,6 @@ static void qxl_spice_monitors_config_async(PCIQXLDevice *qxl, int replay) QXL_COOKIE_TYPE_POST_LOAD_MONITORS_CONFIG, 0)); } else { -#if SPICE_SERVER_VERSION < 0x000e02 /* release 0.14.2 */ - if (qxl->max_outputs) { - spice_qxl_set_max_monitors(&qxl->ssd.qxl, qxl->max_outputs); - } -#endif qxl->guest_monitors_config = qxl->ram->monitors_config; spice_qxl_monitors_config_async(&qxl->ssd.qxl, qxl->ram->monitors_config, @@ -2109,6 +2104,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) uint8_t* config = qxl->pci.config; uint32_t pci_device_rev; uint32_t io_size; + Error *err = NULL; + char device_address[256] = ""; qemu_spice_display_init_common(&qxl->ssd); qxl->mode = QXL_MODE_UNDEFINED; @@ -2208,9 +2205,6 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) return; } -#if SPICE_SERVER_VERSION >= 0x000e02 /* release 0.14.2 */ - Error *err = NULL; - char device_address[256] = ""; if (qemu_console_fill_device_address(qxl->vga.con, device_address, sizeof(device_address), &err)) { @@ -2221,7 +2215,6 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) } else { error_report_err(err); } -#endif qemu_add_vm_change_state_handler(qxl_vm_change_state_handler, qxl); diff --git a/ui/spice-display.c b/ui/spice-display.c index db71e866f89..f2304bb0ce2 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -689,13 +689,11 @@ static int interface_client_monitors_config(QXLInstance *sin, if (mc->num_of_monitors > head) { info.width = mc->monitors[head].width; info.height = mc->monitors[head].height; -#if SPICE_SERVER_VERSION >= 0x000e04 /* release 0.14.4 */ if (mc->flags & VD_AGENT_CONFIG_MONITORS_FLAG_PHYSICAL_SIZE) { VDAgentMonitorMM *mm = (void *)&mc->monitors[mc->num_of_monitors]; info.width_mm = mm[head].width; info.height_mm = mm[head].height; } -#endif } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); @@ -1393,6 +1391,8 @@ static const DisplayGLCtxOps gl_ctx_ops = { static void qemu_spice_display_init_one(QemuConsole *con) { SimpleSpiceDisplay *ssd = g_new0(SimpleSpiceDisplay, 1); + Error *err = NULL; + char device_address[256] = ""; qemu_spice_display_init_common(ssd); @@ -1414,9 +1414,6 @@ static void qemu_spice_display_init_one(QemuConsole *con) ssd->qxl.base.sif = &dpy_interface.base; qemu_spice_add_display_interface(&ssd->qxl, con); -#if SPICE_SERVER_VERSION >= 0x000e02 /* release 0.14.2 */ - Error *err = NULL; - char device_address[256] = ""; if (qemu_console_fill_device_address(con, device_address, 256, &err)) { spice_qxl_set_device_info(&ssd->qxl, device_address, @@ -1425,7 +1422,6 @@ static void qemu_spice_display_init_one(QemuConsole *con) } else { error_report_err(err); } -#endif qemu_spice_create_host_memslot(ssd); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230417.1535902 (Exim 4.92) (envelope-from ) id 1vqpoT-0002wj-FM; Fri, 13 Feb 2026 09:50:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230417.1535902; Fri, 13 Feb 2026 09:50:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoT-0002wY-Ce; Fri, 13 Feb 2026 09:50:13 +0000 Received: by outflank-mailman (input) for mailman id 1230417; Fri, 13 Feb 2026 09:50:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoS-0001Ng-1N for xen-devel@lists.xenproject.org; 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Fri, 13 Feb 2026 09:49:50 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 60faf46a-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976207; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=y3G7pz3JVMFqRvpJ05R+kBwpJ0ObSQg4ak0FyKLiTE8=; b=G+mQl2AUGuUBzR5vWxQqJhu/G71R6+jIPPPjTMvtsjLXFpGoxP8uiYEJd4ADqI5OC3I6W6 Va1zjWvNeAOGppPGhPBiBrlzhXpI/D4cY6WyLDZYTraD819I5ziODGkzXVU7uMF4LB0wq1 ZEMZAsVZ69baXYg7t/sPOWHQsVG0VYA= X-MC-Unique: spO-09MoPhGoxKEqBmvdqQ-1 X-Mimecast-MFC-AGG-ID: spO-09MoPhGoxKEqBmvdqQ_1770976201 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 03/15] ui/spice: drop SPICE_HAS_ATTACHED_WORKER macro Date: Fri, 13 Feb 2026 10:49:22 +0100 Message-ID: <20260213094938.4074478-4-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: vLQEj4W-CvBrrGrZbfDdVQkLxQ7uBQ6Dz0OolyuNfps_1770976201 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Since previous commit it is always 1. Let's just drop it. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-3-vsementsov@yandex-team.ru> --- include/ui/qemu-spice.h | 2 -- hw/display/qxl.c | 12 ------------ ui/spice-display.c | 11 ----------- 3 files changed, 25 deletions(-) diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h index 8e5e6b2a744..111a09ceca3 100644 --- a/include/ui/qemu-spice.h +++ b/include/ui/qemu-spice.h @@ -34,8 +34,6 @@ int qemu_spice_add_display_interface(QXLInstance *qxlin, QemuConsole *con); int qemu_spice_migrate_info(const char *hostname, int port, int tls_port, const char *subject); -#define SPICE_HAS_ATTACHED_WORKER 1 - #else /* CONFIG_SPICE */ #include "qemu/error-report.h" diff --git a/hw/display/qxl.c b/hw/display/qxl.c index fbba02113f7..0551b38230b 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -530,13 +530,6 @@ static void interface_attached_worker(QXLInstance *sin) trace_qxl_interface_attach_worker(qxl->id); } -#if !(SPICE_HAS_ATTACHED_WORKER) -static void interface_attach_worker(QXLInstance *sin, QXLWorker *qxl_worker) -{ - interface_attached_worker(sin); -} -#endif - static void interface_set_compression_level(QXLInstance *sin, int level) { PCIQXLDevice *qxl = container_of(sin, PCIQXLDevice, ssd.qxl); @@ -1131,12 +1124,7 @@ static const QXLInterface qxl_interface = { .base.major_version = SPICE_INTERFACE_QXL_MAJOR, .base.minor_version = SPICE_INTERFACE_QXL_MINOR, -#if SPICE_HAS_ATTACHED_WORKER .attached_worker = interface_attached_worker, -#else - .attache_worker = interface_attach_worker, -#endif - .set_compression_level = interface_set_compression_level, .get_init_info = interface_get_init_info, diff --git a/ui/spice-display.c b/ui/spice-display.c index f2304bb0ce2..28399f8a817 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -507,17 +507,10 @@ void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) /* spice display interface callbacks */ -#if SPICE_HAS_ATTACHED_WORKER static void interface_attached_worker(QXLInstance *sin) { /* nothing to do */ } -#else -static void interface_attach_worker(QXLInstance *sin, QXLWorker *qxl_worker) -{ - /* nothing to do */ -} -#endif static void interface_set_compression_level(QXLInstance *sin, int level) { @@ -707,11 +700,7 @@ static const QXLInterface dpy_interface = { .base.major_version = SPICE_INTERFACE_QXL_MAJOR, .base.minor_version = SPICE_INTERFACE_QXL_MINOR, -#if SPICE_HAS_ATTACHED_WORKER .attached_worker = interface_attached_worker, -#else - .attache_worker = interface_attach_worker, -#endif .set_compression_level = interface_set_compression_level, .get_init_info = interface_get_init_info, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230419.1535908 (Exim 4.92) (envelope-from ) id 1vqpoT-0002zy-SJ; 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s=mimecast20190719; t=1770976195; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LGj9xk/Pm83KB03G6LVj5ElLZzoxkSGN+CQtNgApbDQ=; b=iCbKUNEFIbstVJGW8rrDn1zDuLlcsZLSLnR4GLsh4DsKfrEFjYwYLeLbe6a+wS3uZ1V1JI c5TFoziv0o0+Uo4hjEEUyIE4SewPZt50Q2zGUdrqu7RPbnl9DTSwgEMyhXZW5oQ5T2U5GK cc/6dC+Py2egf2PVJ+samBWotQFUKFs= X-MC-Unique: qdD6mjHEOhySnGIcF1UXMg-1 X-Mimecast-MFC-AGG-ID: qdD6mjHEOhySnGIcF1UXMg_1770976189 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Eric K Subject: [PULL v2 01/15] char-udp: Fix initial backend open status Date: Fri, 13 Feb 2026 10:49:20 +0100 Message-ID: <20260213094938.4074478-2-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: HHKQAw6KNaeTwwnxzeeCCq3ZF3rMm1DGWMyjTY3iz8w_1770976189 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Eric K This patch removes the `*be_opened = false` override for the UDP chardev backend. Since UDP is connectionless it never sends a `CHR_EVENT_OPENED` so it is never marked open. This causes some frontends (e.g. virtio-serial) to never perform any operations on the socket. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2993 Signed-off-by: Eric K Reviewed-by: Marc-André Lureau Message-Id: <20251208225849.705554-1-erickra@cs.utexas.edu> --- chardev/char-udp.c | 2 -- tests/unit/test-char.c | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 572fab0ad13..1025f577a0d 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -215,8 +215,6 @@ static void qmp_chardev_open_udp(Chardev *chr, g_free(name); s->ioc = QIO_CHANNEL(sioc); - /* be isn't opened until we get a connection */ - *be_opened = false; } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/tests/unit/test-char.c b/tests/unit/test-char.c index 8a98e42cad0..2869c4e09df 100644 --- a/tests/unit/test-char.c +++ b/tests/unit/test-char.c @@ -1012,6 +1012,8 @@ static void char_udp_test_internal(Chardev *reuse_chr, int sock) qemu_chr_fe_init(fe, chr, &error_abort); } + g_assert(chr->be_open); + d.chr = chr; qemu_chr_fe_set_handlers(fe, socket_can_read_hello, socket_read_hello, NULL, NULL, &d, NULL, true); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230420.1535922 (Exim 4.92) (envelope-from ) id 1vqpoV-0003Mz-29; Fri, 13 Feb 2026 09:50:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230420.1535922; Fri, 13 Feb 2026 09:50:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoU-0003Lt-T5; Fri, 13 Feb 2026 09:50:14 +0000 Received: by outflank-mailman (input) for mailman id 1230420; Fri, 13 Feb 2026 09:50:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoT-0001Na-Fw for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 09:50:13 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 633ae963-08c1-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 10:50:12 +0100 (CET) Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-136-Bh-00Ep0N_SO-0gTINRxQA-1; Fri, 13 Feb 2026 04:50:06 -0500 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 81A0B1884EDC; Fri, 13 Feb 2026 09:49:56 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 5DA40180066E; Fri, 13 Feb 2026 09:49:54 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 633ae963-08c1-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976210; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=K/EYv/wOL3z8Ia2Topl38iZZVA139L2JWNE4O9fOHA4=; b=bhWACr+pTKP8Xnu904RCUk6br1Nsx5OoZaAwEXSK4jI305fB5ngrIPytXbT0fiX7Yafk6s A7vViJ5NdrK1KqRc7R8JhnRw5M5W13RrbVE0yOPTppC8z5QQ+xdFSaC/1UszXULFFMRnLa GouXu2I2c7IG5c/XvAVLaRtU5laXOhg= X-MC-Unique: Bh-00Ep0N_SO-0gTINRxQA-1 X-Mimecast-MFC-AGG-ID: Bh-00Ep0N_SO-0gTINRxQA_1770976205 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 04/15] chardev: ChardevClass: consistent naming for handlers Date: Fri, 13 Feb 2026 10:49:23 +0100 Message-ID: <20260213094938.4074478-5-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: P8uDSV4blFUsz4Q9ncgJZnfmgVT5WoPYLXkK8sQW8lI_1770976205 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Most handlers have name prefixed with "chr_". That's a good practice which helps to grep them. Convert the rest: .parse, .open, get/set_msgfds. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-4-vsementsov@yandex-team.ru> --- include/chardev/char.h | 8 ++++---- chardev/baum.c | 2 +- chardev/char-console.c | 2 +- chardev/char-fe.c | 8 ++++---- chardev/char-file.c | 4 ++-- chardev/char-hub.c | 4 ++-- chardev/char-mux.c | 4 ++-- chardev/char-null.c | 2 +- chardev/char-parallel.c | 4 ++-- chardev/char-pipe.c | 4 ++-- chardev/char-pty.c | 4 ++-- chardev/char-ringbuf.c | 4 ++-- chardev/char-serial.c | 4 ++-- chardev/char-socket.c | 8 ++++---- chardev/char-stdio.c | 4 ++-- chardev/char-udp.c | 4 ++-- chardev/char-win-stdio.c | 2 +- chardev/char.c | 8 ++++---- chardev/msmouse.c | 2 +- chardev/spice.c | 8 ++++---- chardev/wctablet.c | 2 +- gdbstub/system.c | 2 +- ui/console-vc.c | 4 ++-- ui/dbus-chardev.c | 8 ++++---- ui/dbus.c | 4 ++-- ui/gtk.c | 2 +- ui/spice-app.c | 6 +++--- ui/vdagent.c | 4 ++-- scripts/codeconverter/codeconverter/test_regexps.py | 2 +- 29 files changed, 62 insertions(+), 62 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index 192cad67d41..d33833b6c02 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -257,10 +257,10 @@ struct ChardevClass { bool supports_yank; /* parse command line options and populate QAPI @backend */ - void (*parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); + void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*open)(Chardev *chr, ChardevBackend *backend, + void (*chr_open)(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp); /* write buf to the backend */ @@ -282,10 +282,10 @@ struct ChardevClass { int (*chr_ioctl)(Chardev *s, int cmd, void *arg); /* get ancillary-received fds during last read */ - int (*get_msgfds)(Chardev *s, int* fds, int num); + int (*chr_get_msgfds)(Chardev *s, int* fds, int num); /* set ancillary fds to be sent with next write */ - int (*set_msgfds)(Chardev *s, int *fds, int num); + int (*chr_set_msgfds)(Chardev *s, int *fds, int num); /* accept the given fd */ int (*chr_add_client)(Chardev *chr, int fd); diff --git a/chardev/baum.c b/chardev/baum.c index 157f8b95195..75e41965c11 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -676,7 +676,7 @@ static void char_braille_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = baum_chr_open; + cc->chr_open = baum_chr_open; cc->chr_write = baum_chr_write; cc->chr_accept_input = baum_chr_accept_input; } diff --git a/chardev/char-console.c b/chardev/char-console.c index 7e1bf642ebd..9a2e012d53f 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -38,7 +38,7 @@ static void char_console_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = qemu_chr_open_win_con; + cc->chr_open = qemu_chr_open_win_con; } static const TypeInfo char_console_type_info = { diff --git a/chardev/char-fe.c b/chardev/char-fe.c index 34b83fc1c4a..a44f2673731 100644 --- a/chardev/char-fe.c +++ b/chardev/char-fe.c @@ -130,8 +130,8 @@ int qemu_chr_fe_get_msgfds(CharFrontend *c, int *fds, int len) return -1; } - return CHARDEV_GET_CLASS(s)->get_msgfds ? - CHARDEV_GET_CLASS(s)->get_msgfds(s, fds, len) : -1; + return CHARDEV_GET_CLASS(s)->chr_get_msgfds ? + CHARDEV_GET_CLASS(s)->chr_get_msgfds(s, fds, len) : -1; } int qemu_chr_fe_set_msgfds(CharFrontend *c, int *fds, int num) @@ -142,8 +142,8 @@ int qemu_chr_fe_set_msgfds(CharFrontend *c, int *fds, int num) return -1; } - return CHARDEV_GET_CLASS(s)->set_msgfds ? - CHARDEV_GET_CLASS(s)->set_msgfds(s, fds, num) : -1; + return CHARDEV_GET_CLASS(s)->chr_set_msgfds ? + CHARDEV_GET_CLASS(s)->chr_set_msgfds(s, fds, num) : -1; } void qemu_chr_fe_accept_input(CharFrontend *c) diff --git a/chardev/char-file.c b/chardev/char-file.c index 1f7adf592ff..1e293e7054a 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -133,8 +133,8 @@ static void char_file_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_file_out; - cc->open = qmp_chardev_open_file; + cc->chr_parse = qemu_chr_parse_file_out; + cc->chr_open = qmp_chardev_open_file; } static const TypeInfo char_file_type_info = { diff --git a/chardev/char-hub.c b/chardev/char-hub.c index d0967c22336..082baa84ab8 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -276,8 +276,8 @@ static void char_hub_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_hub; - cc->open = qemu_chr_open_hub; + cc->chr_parse = qemu_chr_parse_hub; + cc->chr_open = qemu_chr_open_hub; cc->chr_write = hub_chr_write; cc->chr_add_watch = hub_chr_add_watch; /* We handle events from backends only */ diff --git a/chardev/char-mux.c b/chardev/char-mux.c index db9e89f441d..c82c2da56dd 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -451,8 +451,8 @@ static void char_mux_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_mux; - cc->open = qemu_chr_open_mux; + cc->chr_parse = qemu_chr_parse_mux; + cc->chr_open = qemu_chr_open_mux; cc->chr_write = mux_chr_write; cc->chr_accept_input = mux_chr_accept_input; cc->chr_add_watch = mux_chr_add_watch; diff --git a/chardev/char-null.c b/chardev/char-null.c index 89cb85da792..674603b3807 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -38,7 +38,7 @@ static void char_null_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = null_chr_open; + cc->chr_open = null_chr_open; } static const TypeInfo char_null_type_info = { diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 62a44b2f969..a0839b784b8 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -274,8 +274,8 @@ static void char_parallel_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_parallel; - cc->open = qmp_chardev_open_parallel; + cc->chr_parse = qemu_chr_parse_parallel; + cc->chr_open = qmp_chardev_open_parallel; cc->chr_ioctl = pp_ioctl; } diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index e9f3bb82904..a2cd322efe6 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -182,8 +182,8 @@ static void char_pipe_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_pipe; - cc->open = qemu_chr_open_pipe; + cc->chr_parse = qemu_chr_parse_pipe; + cc->chr_open = qemu_chr_open_pipe; } static const TypeInfo char_pipe_type_info = { diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 652b0bd9e73..1a15082b025 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -394,8 +394,8 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = char_pty_parse; - cc->open = char_pty_open; + cc->chr_parse = char_pty_parse; + cc->chr_open = char_pty_open; cc->chr_write = char_pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 98aadb6acfb..6d5ba667bb4 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -227,8 +227,8 @@ static void char_ringbuf_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_ringbuf; - cc->open = qemu_chr_open_ringbuf; + cc->chr_parse = qemu_chr_parse_ringbuf; + cc->chr_open = qemu_chr_open_ringbuf; cc->chr_write = ringbuf_chr_write; } diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 4c6ca713eb1..97ed7adf736 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -305,8 +305,8 @@ static void char_serial_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_serial; - cc->open = qmp_chardev_open_serial; + cc->chr_parse = qemu_chr_parse_serial; + cc->chr_open = qmp_chardev_open_serial; #ifndef _WIN32 cc->chr_ioctl = tty_serial_ioctl; #endif diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 3f45dd2ecdc..149a6d8cc15 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1585,14 +1585,14 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->supports_yank = true; - cc->parse = qemu_chr_parse_socket; - cc->open = qmp_chardev_open_socket; + cc->chr_parse = qemu_chr_parse_socket; + cc->chr_open = qmp_chardev_open_socket; cc->chr_wait_connected = tcp_chr_wait_connected; cc->chr_write = tcp_chr_write; cc->chr_sync_read = tcp_chr_sync_read; cc->chr_disconnect = tcp_chr_disconnect; - cc->get_msgfds = tcp_get_msgfds; - cc->set_msgfds = tcp_set_msgfds; + cc->chr_get_msgfds = tcp_get_msgfds; + cc->chr_set_msgfds = tcp_set_msgfds; cc->chr_add_client = tcp_chr_add_client; cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index 2568164a108..b7e9af1388f 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -142,9 +142,9 @@ static void char_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_stdio; + cc->chr_parse = qemu_chr_parse_stdio; #ifndef _WIN32 - cc->open = qemu_chr_open_stdio; + cc->chr_open = qemu_chr_open_stdio; cc->chr_set_echo = qemu_chr_set_echo_stdio; #endif } diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 1025f577a0d..71b8d8b37df 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -221,8 +221,8 @@ static void char_udp_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_udp; - cc->open = qmp_chardev_open_udp; + cc->chr_parse = qemu_chr_parse_udp; + cc->chr_open = qmp_chardev_open_udp; cc->chr_write = udp_chr_write; cc->chr_update_read_handler = udp_chr_update_read_handler; } diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index fb802a00b13..26e67aef1ca 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -260,7 +260,7 @@ static void char_win_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = qemu_chr_open_stdio; + cc->chr_open = qemu_chr_open_stdio; cc->chr_write = win_stdio_write; cc->chr_set_echo = qemu_chr_set_echo_win_stdio; } diff --git a/chardev/char.c b/chardev/char.c index 3e432195a5a..df37d1df161 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -267,8 +267,8 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, } } - if (cc->open) { - cc->open(chr, backend, be_opened, errp); + if (cc->chr_open) { + cc->chr_open(chr, backend, be_opened, errp); } } @@ -604,8 +604,8 @@ ChardevBackend *qemu_chr_parse_opts(QemuOpts *opts, Error **errp) backend = g_new0(ChardevBackend, 1); backend->type = CHARDEV_BACKEND_KIND_NULL; - if (cc->parse) { - cc->parse(opts, backend, &local_err); + if (cc->chr_parse) { + cc->chr_parse(opts, backend, &local_err); if (local_err) { error_propagate(errp, local_err); qapi_free_ChardevBackend(backend); diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 1a55755d397..84050164893 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -271,7 +271,7 @@ static void char_msmouse_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = msmouse_chr_open; + cc->chr_open = msmouse_chr_open; cc->chr_write = msmouse_chr_write; cc->chr_accept_input = msmouse_chr_accept_input; cc->chr_ioctl = msmouse_ioctl; diff --git a/chardev/spice.c b/chardev/spice.c index 39b79d60fb4..61caa6d0efe 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -364,8 +364,8 @@ static void char_spicevmc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_spice_vmc; - cc->open = qemu_chr_open_spice_vmc; + cc->chr_parse = qemu_chr_parse_spice_vmc; + cc->chr_open = qemu_chr_open_spice_vmc; cc->chr_set_fe_open = spice_vmc_set_fe_open; } @@ -380,8 +380,8 @@ static void char_spiceport_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = qemu_chr_parse_spice_port; - cc->open = qemu_chr_open_spice_port; + cc->chr_parse = qemu_chr_parse_spice_port; + cc->chr_open = qemu_chr_open_spice_port; cc->chr_set_fe_open = spice_port_set_fe_open; } diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 0dc6ef08f59..8285a56e7bc 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -346,7 +346,7 @@ static void wctablet_chr_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = wctablet_chr_open; + cc->chr_open = wctablet_chr_open; cc->chr_write = wctablet_chr_write; cc->chr_ioctl = wctablet_chr_ioctl; cc->chr_accept_input = wctablet_chr_accept_input; diff --git a/gdbstub/system.c b/gdbstub/system.c index 8ec8b7ea336..29b9e16a908 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -244,7 +244,7 @@ static void char_gdb_class_init(ObjectClass *oc, const void *data) ChardevClass *cc = CHARDEV_CLASS(oc); cc->internal = true; - cc->open = gdb_monitor_open; + cc->chr_open = gdb_monitor_open; cc->chr_write = gdb_monitor_write; } diff --git a/ui/console-vc.c b/ui/console-vc.c index 830842064d6..931068d43ab 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1185,8 +1185,8 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = vc_chr_parse; - cc->open = vc_chr_open; + cc->chr_parse = vc_chr_parse; + cc->chr_open = vc_chr_open; cc->chr_write = vc_chr_write; cc->chr_accept_input = vc_chr_accept_input; cc->chr_set_echo = vc_chr_set_echo; diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index d05dddaf81b..f6c426e2209 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -205,12 +205,12 @@ dbus_chr_open(Chardev *chr, ChardevBackend *backend, opts = qemu_opts_create(qemu_find_opts("chardev"), NULL, 0, &error_abort); qemu_opt_set(opts, "server", "on", &error_abort); qemu_opt_set(opts, "wait", "off", &error_abort); - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->parse( + CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_parse( opts, be, errp); if (*errp) { return; } - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->open( + CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( chr, be, be_opened, errp); } @@ -274,8 +274,8 @@ char_dbus_class_init(ObjectClass *oc, const void *data) DBusChardevClass *klass = DBUS_CHARDEV_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = dbus_chr_parse; - cc->open = dbus_chr_open; + cc->chr_parse = dbus_chr_parse; + cc->chr_open = dbus_chr_open; cc->chr_set_fe_open = dbus_chr_set_fe_open; cc->chr_set_echo = dbus_chr_set_echo; klass->parent_chr_be_event = cc->chr_be_event; diff --git a/ui/dbus.c b/ui/dbus.c index d2dff332585..31f6eb1189f 100644 --- a/ui/dbus.c +++ b/ui/dbus.c @@ -451,8 +451,8 @@ dbus_vc_class_init(ObjectClass *oc, const void *data) DBusVCClass *klass = DBUS_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - klass->parent_parse = cc->parse; - cc->parse = dbus_vc_parse; + klass->parent_parse = cc->chr_parse; + cc->chr_parse = dbus_vc_parse; } static const TypeInfo dbus_vc_type_info = { diff --git a/ui/gtk.c b/ui/gtk.c index e83a3666258..6217e9552e3 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1985,7 +1985,7 @@ static void char_gd_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->open = gd_vc_open; + cc->chr_open = gd_vc_open; cc->chr_write = gd_vc_chr_write; cc->chr_accept_input = gd_vc_chr_accept_input; cc->chr_set_echo = gd_vc_chr_set_echo; diff --git a/ui/spice-app.c b/ui/spice-app.c index 24f78f305c4..ea0b62a22b7 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -106,10 +106,10 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) VCChardevClass *vc = CHARDEV_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - vc->parent_open = cc->open; + vc->parent_open = cc->chr_open; - cc->parse = vc_chr_parse; - cc->open = vc_chr_open; + cc->chr_parse = vc_chr_parse; + cc->chr_open = vc_chr_open; cc->chr_set_echo = vc_chr_set_echo; } diff --git a/ui/vdagent.c b/ui/vdagent.c index 142a3691ac9..090771ab171 100644 --- a/ui/vdagent.c +++ b/ui/vdagent.c @@ -924,8 +924,8 @@ static void vdagent_chr_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->parse = vdagent_chr_parse; - cc->open = vdagent_chr_open; + cc->chr_parse = vdagent_chr_parse; + cc->chr_open = vdagent_chr_open; cc->chr_write = vdagent_chr_write; cc->chr_set_fe_open = vdagent_chr_set_fe_open; cc->chr_accept_input = vdagent_chr_accept_input; diff --git a/scripts/codeconverter/codeconverter/test_regexps.py b/scripts/codeconverter/codeconverter/test_regexps.py index b00e9ef15b2..d3a5cc3ad38 100644 --- a/scripts/codeconverter/codeconverter/test_regexps.py +++ b/scripts/codeconverter/codeconverter/test_regexps.py @@ -57,7 +57,7 @@ def fullmatch(regexp, s): print(RE_TYPEINFO_START) assert re.search(RE_TYPEINFO_START, r''' - cc->open = qmp_chardev_open_file; + cc->chr_open = qmp_chardev_open_file; } static const TypeInfo char_file_type_info = { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230426.1535932 (Exim 4.92) (envelope-from ) id 1vqpob-0003us-EE; Fri, 13 Feb 2026 09:50:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230426.1535932; Fri, 13 Feb 2026 09:50:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpob-0003ui-As; Fri, 13 Feb 2026 09:50:21 +0000 Received: by outflank-mailman (input) for mailman id 1230426; Fri, 13 Feb 2026 09:50:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoZ-0001Ng-AI for xen-devel@lists.xenproject.org; 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Fri, 13 Feb 2026 09:49:58 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 65fc6758-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976215; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6UIUvqKAVHmKYMD5HBaon7fRgToMxwvi5ehZIc//TG8=; b=Diru8wy8UmGdGHkmzA3sKSWRbKcOUfcFN75EFdvR5+YthNY0LEJAjTzmgqYS56XAZouRtc eKMUo1YJ7b/psfkb+jCBkMaEjYVW/uTZUA2FyrHH8zy6D1MxjWbPy6mAKdWOSSsYfTwZ00 OnUEOztVoq6D3xv7c61+gZFmippkY2Q= X-MC-Unique: D7FCKESLPA-4l4K5JjB0Zw-1 X-Mimecast-MFC-AGG-ID: D7FCKESLPA-4l4K5JjB0Zw_1770976208 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 05/15] chardev: consistent naming for ChardevClass handlers implementations Date: Fri, 13 Feb 2026 10:49:24 +0100 Message-ID: <20260213094938.4074478-6-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: 4M6VHeNRn85MQvw2A7rQRZIwSVUwlTyGZw7U4NPkW9I_1770976208 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Most handlers implementations has name like {unit_name}_{handler_name}, which is usual and well-recognized pattern. Convert the rest (especially with useless qemu_ prefixes and misleading qmp_ prefixes) to the common pattern. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-5-vsementsov@yandex-team.ru> --- chardev/char-console.c | 10 ++--- chardev/char-file.c | 16 ++++---- chardev/char-hub.c | 15 ++++--- chardev/char-mux.c | 15 ++++--- chardev/char-parallel.c | 28 ++++++------- chardev/char-pipe.c | 24 +++++------ chardev/char-pty.c | 19 +++++---- chardev/char-ringbuf.c | 16 ++++---- chardev/char-serial.c | 28 ++++++------- chardev/char-socket.c | 25 ++++++------ chardev/char-stdio.c | 22 +++++----- chardev/char-udp.c | 15 ++++--- chardev/char-win-stdio.c | 20 +++++----- chardev/msmouse.c | 4 +- chardev/spice.c | 40 +++++++++---------- gdbstub/system.c | 8 ++-- ui/gtk.c | 4 +- .../codeconverter/test_regexps.py | 2 +- 18 files changed, 153 insertions(+), 158 deletions(-) diff --git a/chardev/char-console.c b/chardev/char-console.c index 9a2e012d53f..f3ef1a7748c 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -26,10 +26,10 @@ #include "chardev/char-win.h" #include "qemu/module.h" -static void qemu_chr_open_win_con(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void console_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); } @@ -38,7 +38,7 @@ static void char_console_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = qemu_chr_open_win_con; + cc->chr_open = console_chr_open; } static const TypeInfo char_console_type_info = { diff --git a/chardev/char-file.c b/chardev/char-file.c index 1e293e7054a..568600bb7c4 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,10 +34,10 @@ #include "chardev/char-fd.h" #endif -static void qmp_chardev_open_file(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void file_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -102,8 +102,8 @@ static void qmp_chardev_open_file(Chardev *chr, #endif } -static void qemu_chr_parse_file_out(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *path = qemu_opt_get(opts, "path"); const char *inpath = qemu_opt_get(opts, "input-path"); @@ -133,8 +133,8 @@ static void char_file_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_file_out; - cc->chr_open = qmp_chardev_open_file; + cc->chr_parse = file_chr_parse; + cc->chr_open = file_chr_open; } static const TypeInfo char_file_type_info = { diff --git a/chardev/char-hub.c b/chardev/char-hub.c index 082baa84ab8..11556dfa72b 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,10 +203,10 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void qemu_chr_open_hub(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void hub_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -245,8 +245,7 @@ static void qemu_chr_open_hub(Chardev *chr, *be_opened = false; } -static void qemu_chr_parse_hub(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { ChardevHub *hub; strList **tail; @@ -276,8 +275,8 @@ static void char_hub_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_hub; - cc->chr_open = qemu_chr_open_hub; + cc->chr_parse = hub_chr_parse; + cc->chr_open = hub_chr_open; cc->chr_write = hub_chr_write; cc->chr_add_watch = hub_chr_add_watch; /* We handle events from backends only */ diff --git a/chardev/char-mux.c b/chardev/char-mux.c index c82c2da56dd..f38d66b21f1 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,10 +361,10 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void qemu_chr_open_mux(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void mux_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -384,8 +384,7 @@ static void qemu_chr_open_mux(Chardev *chr, qemu_chr_fe_init(&d->chr, drv, errp); } -static void qemu_chr_parse_mux(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *chardev = qemu_opt_get(opts, "chardev"); ChardevMux *mux; @@ -451,8 +450,8 @@ static void char_mux_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_mux; - cc->chr_open = qemu_chr_open_mux; + cc->chr_parse = mux_chr_parse; + cc->chr_open = mux_chr_open; cc->chr_write = mux_chr_write; cc->chr_accept_input = mux_chr_accept_input; cc->chr_add_watch = mux_chr_add_watch; diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index a0839b784b8..1be1ef46292 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -70,7 +70,7 @@ static int pp_hw_mode(ParallelChardev *s, uint16_t mode) return 1; } -static int pp_ioctl(Chardev *chr, int cmd, void *arg) +static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); int fd = drv->fd; @@ -157,7 +157,7 @@ static int pp_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qemu_chr_open_pp_fd(Chardev *chr, +static void parallel_chr_open_fd(Chardev *chr, int fd, bool *be_opened, Error **errp) @@ -185,7 +185,7 @@ typedef struct { #define PARALLEL_CHARDEV(obj) \ OBJECT_CHECK(ParallelChardev, (obj), TYPE_CHARDEV_PARALLEL) -static int pp_ioctl(Chardev *chr, int cmd, void *arg) +static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); uint8_t b; @@ -227,7 +227,7 @@ static int pp_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qemu_chr_open_pp_fd(Chardev *chr, +static void parallel_chr_open_fd(Chardev *chr, int fd, bool *be_opened, Error **errp) @@ -239,10 +239,10 @@ static void qemu_chr_open_pp_fd(Chardev *chr, #endif #ifdef HAVE_CHARDEV_PARALLEL -static void qmp_chardev_open_parallel(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void parallel_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *parallel = backend->u.parallel.data; int fd; @@ -251,11 +251,11 @@ static void qmp_chardev_open_parallel(Chardev *chr, if (fd < 0) { return; } - qemu_chr_open_pp_fd(chr, fd, be_opened, errp); + parallel_chr_open_fd(chr, fd, be_opened, errp); } -static void qemu_chr_parse_parallel(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *parallel; @@ -274,9 +274,9 @@ static void char_parallel_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_parallel; - cc->chr_open = qmp_chardev_open_parallel; - cc->chr_ioctl = pp_ioctl; + cc->chr_parse = parallel_chr_parse; + cc->chr_open = parallel_chr_open; + cc->chr_ioctl = parallel_chr_ioctl; } static void char_parallel_finalize(Object *obj) diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index a2cd322efe6..e84492d42b6 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,10 +103,10 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void qemu_chr_open_pipe(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; @@ -118,10 +118,10 @@ static void qemu_chr_open_pipe(Chardev *chr, #else -static void qemu_chr_open_pipe(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -162,8 +162,8 @@ static void qemu_chr_open_pipe(Chardev *chr, #endif /* !_WIN32 */ -static void qemu_chr_parse_pipe(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void pipe_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *dev; @@ -182,8 +182,8 @@ static void char_pipe_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_pipe; - cc->chr_open = qemu_chr_open_pipe; + cc->chr_parse = pipe_chr_parse; + cc->chr_open = pipe_chr_open; } static const TypeInfo char_pipe_type_info = { diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 1a15082b025..909ab01f5f2 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -105,7 +105,7 @@ static void pty_chr_update_read_handler(Chardev *chr) } } -static int char_pty_chr_write(Chardev *chr, const uint8_t *buf, int len) +static int pty_chr_write(Chardev *chr, const uint8_t *buf, int len) { PtyChardev *s = PTY_CHARDEV(chr); GPollFD pfd; @@ -331,10 +331,10 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void char_pty_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pty_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -378,8 +378,7 @@ static void char_pty_open(Chardev *chr, } } -static void char_pty_parse(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *path = qemu_opt_get(opts, "path"); ChardevPty *pty; @@ -394,9 +393,9 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = char_pty_parse; - cc->chr_open = char_pty_open; - cc->chr_write = char_pty_chr_write; + cc->chr_parse = pty_chr_parse; + cc->chr_open = pty_chr_open; + cc->chr_write = pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; } diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 6d5ba667bb4..19652fe2b3a 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -92,10 +92,10 @@ static void char_ringbuf_finalize(Object *obj) g_free(d->cbuf); } -static void qemu_chr_open_ringbuf(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void ringbuf_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevRingbuf *opts = backend->u.ringbuf.data; RingBufChardev *d = RINGBUF_CHARDEV(chr); @@ -206,8 +206,8 @@ char *qmp_ringbuf_read(const char *device, int64_t size, return data; } -static void qemu_chr_parse_ringbuf(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void ringbuf_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { int val; ChardevRingbuf *ringbuf; @@ -227,8 +227,8 @@ static void char_ringbuf_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_ringbuf; - cc->chr_open = qemu_chr_open_ringbuf; + cc->chr_parse = ringbuf_chr_parse; + cc->chr_open = ringbuf_chr_open; cc->chr_write = ringbuf_chr_write; } diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 97ed7adf736..54c2b3935cf 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,10 +41,10 @@ #ifdef _WIN32 -static void qmp_chardev_open_serial(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *serial = backend->u.serial.data; @@ -176,7 +176,7 @@ static void tty_serial_init(int fd, int speed, tcsetattr(fd, TCSANOW, &tty); } -static int tty_serial_ioctl(Chardev *chr, int cmd, void *arg) +static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) { FDChardev *s = FD_CHARDEV(chr); QIOChannelFile *fioc = QIO_CHANNEL_FILE(s->ioc_in); @@ -258,10 +258,10 @@ static int tty_serial_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void qmp_chardev_open_serial(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -285,8 +285,8 @@ static void qmp_chardev_open_serial(Chardev *chr, #endif /* __linux__ || __sun__ */ #ifdef HAVE_CHARDEV_SERIAL -static void qemu_chr_parse_serial(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void serial_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *device = qemu_opt_get(opts, "path"); ChardevHostdev *serial; @@ -305,10 +305,10 @@ static void char_serial_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_serial; - cc->chr_open = qmp_chardev_open_serial; + cc->chr_parse = serial_chr_parse; + cc->chr_open = serial_chr_open; #ifndef _WIN32 - cc->chr_ioctl = tty_serial_ioctl; + cc->chr_ioctl = serial_chr_ioctl; #endif } diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 149a6d8cc15..a3203f2f97b 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -222,7 +222,7 @@ static void tcp_chr_process_IAC_bytes(Chardev *chr, *size = j; } -static int tcp_get_msgfds(Chardev *chr, int *fds, int num) +static int tcp_chr_get_msgfds(Chardev *chr, int *fds, int num) { SocketChardev *s = SOCKET_CHARDEV(chr); @@ -248,7 +248,7 @@ static int tcp_get_msgfds(Chardev *chr, int *fds, int num) return to_copy; } -static int tcp_set_msgfds(Chardev *chr, int *fds, int num) +static int tcp_chr_set_msgfds(Chardev *chr, int *fds, int num) { SocketChardev *s = SOCKET_CHARDEV(chr); @@ -367,7 +367,7 @@ static void tcp_chr_free_connection(Chardev *chr) remove_hup_source(s); - tcp_set_msgfds(chr, NULL, 0); + tcp_chr_set_msgfds(chr, NULL, 0); remove_fd_in_watch(chr); if (s->registered_yank && (s->state == TCP_CHARDEV_STATE_CONNECTING @@ -1365,10 +1365,10 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void qmp_chardev_open_socket(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void tcp_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1456,8 +1456,7 @@ static void qmp_chardev_open_socket(Chardev *chr, } } -static void qemu_chr_parse_socket(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *path = qemu_opt_get(opts, "path"); const char *host = qemu_opt_get(opts, "host"); @@ -1585,14 +1584,14 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->supports_yank = true; - cc->chr_parse = qemu_chr_parse_socket; - cc->chr_open = qmp_chardev_open_socket; + cc->chr_parse = tcp_chr_parse; + cc->chr_open = tcp_chr_open; cc->chr_wait_connected = tcp_chr_wait_connected; cc->chr_write = tcp_chr_write; cc->chr_sync_read = tcp_chr_sync_read; cc->chr_disconnect = tcp_chr_disconnect; - cc->chr_get_msgfds = tcp_get_msgfds; - cc->chr_set_msgfds = tcp_set_msgfds; + cc->chr_get_msgfds = tcp_chr_get_msgfds; + cc->chr_set_msgfds = tcp_chr_set_msgfds; cc->chr_add_client = tcp_chr_add_client; cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index b7e9af1388f..f0920a23faa 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -56,7 +56,7 @@ static void term_exit(void) } } -static void qemu_chr_set_echo_stdio(Chardev *chr, bool echo) +static void stdio_chr_set_echo(Chardev *chr, bool echo) { struct termios tty; @@ -82,13 +82,13 @@ static void qemu_chr_set_echo_stdio(Chardev *chr, bool echo) static void term_stdio_handler(int sig) { /* restore echo after resume from suspend. */ - qemu_chr_set_echo_stdio(NULL, stdio_echo_state); + stdio_chr_set_echo(NULL, stdio_echo_state); } -static void qemu_chr_open_stdio(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void stdio_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; @@ -122,11 +122,11 @@ static void qemu_chr_open_stdio(Chardev *chr, sigaction(SIGCONT, &act, NULL); stdio_allow_signal = !opts->has_signal || opts->signal; - qemu_chr_set_echo_stdio(chr, false); + stdio_chr_set_echo(chr, false); } #endif -static void qemu_chr_parse_stdio(QemuOpts *opts, ChardevBackend *backend, +static void stdio_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { ChardevStdio *stdio; @@ -142,10 +142,10 @@ static void char_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_stdio; + cc->chr_parse = stdio_chr_parse; #ifndef _WIN32 - cc->chr_open = qemu_chr_open_stdio; - cc->chr_set_echo = qemu_chr_set_echo_stdio; + cc->chr_open = stdio_chr_open; + cc->chr_set_echo = stdio_chr_set_echo; #endif } diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 71b8d8b37df..18f4322408a 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -131,8 +131,7 @@ static void char_udp_finalize(Object *obj) qemu_chr_be_event(chr, CHR_EVENT_CLOSED); } -static void qemu_chr_parse_udp(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) { const char *host = qemu_opt_get(opts, "host"); const char *port = qemu_opt_get(opts, "port"); @@ -189,10 +188,10 @@ static void qemu_chr_parse_udp(QemuOpts *opts, ChardevBackend *backend, } } -static void qmp_chardev_open_udp(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void upd_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -221,8 +220,8 @@ static void char_udp_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_udp; - cc->chr_open = qmp_chardev_open_udp; + cc->chr_parse = udp_chr_parse; + cc->chr_open = upd_chr_open; cc->chr_write = udp_chr_write; cc->chr_update_read_handler = udp_chr_update_read_handler; } diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 26e67aef1ca..866f3a20398 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -128,7 +128,7 @@ static void win_stdio_thread_wait_func(void *opaque) SetEvent(stdio->hInputDoneEvent); } -static void qemu_chr_set_echo_win_stdio(Chardev *chr, bool echo) +static void win_stiod_chr_set_echo(Chardev *chr, bool echo) { WinStdioChardev *stdio = WIN_STDIO_CHARDEV(chr); DWORD dwMode = 0; @@ -142,10 +142,10 @@ static void qemu_chr_set_echo_win_stdio(Chardev *chr, bool echo) } } -static void qemu_chr_open_stdio(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void win_stdio_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevStdio *opts = backend->u.stdio.data; bool stdio_allow_signal = !opts->has_signal || opts->signal; @@ -206,7 +206,7 @@ static void qemu_chr_open_stdio(Chardev *chr, SetConsoleMode(stdio->hStdIn, dwMode); - qemu_chr_set_echo_win_stdio(chr, false); + win_stiod_chr_set_echo(chr, false); return; @@ -237,7 +237,7 @@ static void char_win_stdio_finalize(Object *obj) } } -static int win_stdio_write(Chardev *chr, const uint8_t *buf, int len) +static int win_stdio_chr_write(Chardev *chr, const uint8_t *buf, int len) { HANDLE hStdOut = GetStdHandle(STD_OUTPUT_HANDLE); DWORD dwSize; @@ -260,9 +260,9 @@ static void char_win_stdio_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = qemu_chr_open_stdio; - cc->chr_write = win_stdio_write; - cc->chr_set_echo = qemu_chr_set_echo_win_stdio; + cc->chr_open = win_stdio_chr_open; + cc->chr_write = win_stdio_chr_write; + cc->chr_set_echo = win_stiod_chr_set_echo; } static const TypeInfo char_win_stdio_type_info = { diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 84050164893..d07cd998cb5 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -178,7 +178,7 @@ static const QemuInputHandler msmouse_handler = { .sync = msmouse_input_sync, }; -static int msmouse_ioctl(Chardev *chr, int cmd, void *arg) +static int msmouse_chr_ioctl(Chardev *chr, int cmd, void *arg) { MouseChardev *mouse = MOUSE_CHARDEV(chr); int c, i, j; @@ -274,7 +274,7 @@ static void char_msmouse_class_init(ObjectClass *oc, const void *data) cc->chr_open = msmouse_chr_open; cc->chr_write = msmouse_chr_write; cc->chr_accept_input = msmouse_chr_accept_input; - cc->chr_ioctl = msmouse_ioctl; + cc->chr_ioctl = msmouse_chr_ioctl; } static const TypeInfo char_msmouse_type_info = { diff --git a/chardev/spice.c b/chardev/spice.c index 61caa6d0efe..3ea25706653 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -215,7 +215,7 @@ static void char_spice_finalize(Object *obj) g_free((char *)s->sin.portname); } -static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) +static void spice_vmc_chr_set_fe_open(struct Chardev *chr, int fe_open) { SpiceChardev *s = SPICE_CHARDEV(chr); if (fe_open) { @@ -225,7 +225,7 @@ static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) } } -static void spice_port_set_fe_open(struct Chardev *chr, int fe_open) +static void spice_port_chr_set_fe_open(struct Chardev *chr, int fe_open) { SpiceChardev *s = SPICE_CHARDEV(chr); @@ -251,10 +251,10 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void qemu_chr_open_spice_vmc(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void spice_vmc_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; const char *type = spicevmc->type; @@ -281,10 +281,10 @@ static void qemu_chr_open_spice_vmc(Chardev *chr, chr_open(chr, type); } -static void qemu_chr_open_spice_port(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void spice_port_chr_open(Chardev *chr, + ChardevBackend *backend, + bool *be_opened, + Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; const char *name = spiceport->fqdn; @@ -309,8 +309,8 @@ static void qemu_chr_open_spice_port(Chardev *chr, vmc_register_interface(s); } -static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void spice_vmc_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *name = qemu_opt_get(opts, "name"); ChardevSpiceChannel *spicevmc; @@ -325,8 +325,8 @@ static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend, spicevmc->type = g_strdup(name); } -static void qemu_chr_parse_spice_port(QemuOpts *opts, ChardevBackend *backend, - Error **errp) +static void spice_port_chr_parse(QemuOpts *opts, ChardevBackend *backend, + Error **errp) { const char *name = qemu_opt_get(opts, "name"); ChardevSpicePort *spiceport; @@ -364,9 +364,9 @@ static void char_spicevmc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_spice_vmc; - cc->chr_open = qemu_chr_open_spice_vmc; - cc->chr_set_fe_open = spice_vmc_set_fe_open; + cc->chr_parse = spice_vmc_chr_parse; + cc->chr_open = spice_vmc_chr_open; + cc->chr_set_fe_open = spice_vmc_chr_set_fe_open; } static const TypeInfo char_spicevmc_type_info = { @@ -380,9 +380,9 @@ static void char_spiceport_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_parse = qemu_chr_parse_spice_port; - cc->chr_open = qemu_chr_open_spice_port; - cc->chr_set_fe_open = spice_port_set_fe_open; + cc->chr_parse = spice_port_chr_parse; + cc->chr_open = spice_port_chr_open; + cc->chr_set_fe_open = spice_port_chr_set_fe_open; } static const TypeInfo char_spiceport_type_info = { diff --git a/gdbstub/system.c b/gdbstub/system.c index 29b9e16a908..e161b14485b 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -225,7 +225,7 @@ static void gdb_sigterm_handler(int signal) } #endif -static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len) +static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) { g_autoptr(GString) hex_buf = g_string_new("O"); gdb_memtohex(hex_buf, buf, len); @@ -233,7 +233,7 @@ static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_monitor_open(Chardev *chr, ChardevBackend *backend, +static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp) { *be_opened = false; @@ -244,8 +244,8 @@ static void char_gdb_class_init(ObjectClass *oc, const void *data) ChardevClass *cc = CHARDEV_CLASS(oc); cc->internal = true; - cc->chr_open = gdb_monitor_open; - cc->chr_write = gdb_monitor_write; + cc->chr_open = gdb_chr_open; + cc->chr_write = gdb_chr_write; } #define TYPE_CHARDEV_GDB "chardev-gdb" diff --git a/ui/gtk.c b/ui/gtk.c index 6217e9552e3..acf55cdfce2 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,7 +1963,7 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_open(Chardev *chr, +static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, bool *be_opened, Error **errp) @@ -1985,7 +1985,7 @@ static void char_gd_vc_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); - cc->chr_open = gd_vc_open; + cc->chr_open = gd_vc_chr_open; cc->chr_write = gd_vc_chr_write; cc->chr_accept_input = gd_vc_chr_accept_input; cc->chr_set_echo = gd_vc_chr_set_echo; diff --git a/scripts/codeconverter/codeconverter/test_regexps.py b/scripts/codeconverter/codeconverter/test_regexps.py index d3a5cc3ad38..2b9f5b80111 100644 --- a/scripts/codeconverter/codeconverter/test_regexps.py +++ b/scripts/codeconverter/codeconverter/test_regexps.py @@ -57,7 +57,7 @@ def fullmatch(regexp, s): print(RE_TYPEINFO_START) assert re.search(RE_TYPEINFO_START, r''' - cc->chr_open = qmp_chardev_open_file; + cc->chr_open = file_chr_open; } static const TypeInfo char_file_type_info = { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230436.1535941 (Exim 4.92) (envelope-from ) id 1vqpoi-0004c6-QY; Fri, 13 Feb 2026 09:50:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230436.1535941; Fri, 13 Feb 2026 09:50:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoi-0004bN-NQ; Fri, 13 Feb 2026 09:50:28 +0000 Received: by outflank-mailman (input) for mailman id 1230436; Fri, 13 Feb 2026 09:50:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoh-0001Na-EI for xen-devel@lists.xenproject.org; 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Fri, 13 Feb 2026 09:50:17 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6b54863f-08c1-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976224; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4feRG+PIqLPyCpVStJ7uIxka6xWW9klU080X9xA3hKo=; b=ZtYvv9lRqrfvms3O2pnTmSTd3GaLHIMimzX4B+mycX+G/DG48o95urPreWUOxEJ3SodZrz CnCYZdz1C+aKFjj1KXSFE4FdczXVaWwQ2qGSUNnJDAPGoI/w6GvJC3FVn6GxDGWAXaXL+4 UnLEVdwuLBWRVrG+dExu52ittsePetQ= X-MC-Unique: v2J-xh5zMnCpIbMpJcyfKg-1 X-Mimecast-MFC-AGG-ID: v2J-xh5zMnCpIbMpJcyfKg_1770976218 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 11/15] chardev/char: qemu_char_open(): add return value Date: Fri, 13 Feb 2026 10:49:30 +0100 Message-ID: <20260213094938.4074478-12-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: _Q4kEXEFw4oxyI3z4g7l1GiV77eou9QjTH3cW5J-Ubk_1770976218 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Accordingly with recommendations in include/qapi/error.h accompany errp by boolean return value and get rid of error propagation. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-11-vsementsov@yandex-team.ru> --- chardev/char.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/chardev/char.c b/chardev/char.c index 3373c9b61f8..5d00cac2f31 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -246,7 +246,7 @@ int qemu_chr_add_client(Chardev *s, int fd) CHARDEV_GET_CLASS(s)->chr_add_client(s, fd) : -1; } -static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevClass *cc = CHARDEV_GET_CLASS(chr); /* Any ChardevCommon member would work */ @@ -262,13 +262,15 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) } chr->logfd = qemu_create(common->logfile, flags, 0666, errp); if (chr->logfd < 0) { - return; + return false; } } - if (cc->chr_open) { - cc->chr_open(chr, backend, errp); + if (!cc->chr_open) { + return true; } + + return cc->chr_open(chr, backend, errp); } static void char_init(Object *obj) @@ -1006,7 +1008,6 @@ static Chardev *chardev_new(const char *id, const char *typename, { Object *obj; Chardev *chr = NULL; - Error *local_err = NULL; assert(g_str_has_prefix(typename, "chardev-")); assert(id); @@ -1017,9 +1018,7 @@ static Chardev *chardev_new(const char *id, const char *typename, chr->label = g_strdup(id); chr->gcontext = gcontext; - qemu_char_open(chr, backend, &local_err); - if (local_err) { - error_propagate(errp, local_err); + if (!qemu_char_open(chr, backend, errp)) { object_unref(obj); return NULL; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:50:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:50:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230437.1535946 (Exim 4.92) (envelope-from ) id 1vqpoj-0004gV-6u; Fri, 13 Feb 2026 09:50:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230437.1535946; Fri, 13 Feb 2026 09:50:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoj-0004eq-0p; Fri, 13 Feb 2026 09:50:29 +0000 Received: by outflank-mailman (input) for mailman id 1230437; Fri, 13 Feb 2026 09:50:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoi-0001Na-EU for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 09:50:28 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6c54edcd-08c1-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 10:50:27 +0100 (CET) Received: from mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-524-qJo4xogmOe6TKqmwW-010Q-1; Fri, 13 Feb 2026 04:50:23 -0500 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 230C2196C402; Fri, 13 Feb 2026 09:50:21 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 4F8FC180067C; Fri, 13 Feb 2026 09:50:20 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6c54edcd-08c1-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976226; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tpYjeot8p53E9hbudpSJPO+xYO8RwO13MoSHQweyb84=; b=YsvJpCaydBJzkf+9rxNZdtmIwLukSZCSHwvi7kmGLLS5TvmtdJOAfvxDsN7+x/SHtJcefi hAwqlxiiyD3pidiGFV3EliNnKpduRvEhSa3+PEiZc64xJWf5c1/T9TsXZOlD64uRLiGSGv 0K3nSG042/Cbb6R1+kapqPQ2fuCWU+o= X-MC-Unique: qJo4xogmOe6TKqmwW-010Q-1 X-Mimecast-MFC-AGG-ID: qJo4xogmOe6TKqmwW-010Q_1770976221 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 12/15] char: qemu_chr_write_log() use qemu_write_full() Date: Fri, 13 Feb 2026 10:49:31 +0100 Message-ID: <20260213094938.4074478-13-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: 8c7XE562pWIRUZ4y5wlRy4cWwJO6hBNaO7ItS3QihEU_1770976221 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy logfd is blocking, so we don't need to care about EAGAIN. Let's simply use qemu_write_full(). Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-2-vsementsov@yandex-team.ru> --- chardev/char.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/chardev/char.c b/chardev/char.c index 5d00cac2f31..4b285baf029 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -82,29 +82,17 @@ void qemu_chr_be_event(Chardev *s, QEMUChrEvent event) CHARDEV_GET_CLASS(s)->chr_be_event(s, event); } -/* Not reporting errors from writing to logfile, as logs are - * defined to be "best effort" only */ static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) { - size_t done = 0; - ssize_t ret; - if (s->logfd < 0) { return; } - while (done < len) { - retry: - ret = write(s->logfd, buf + done, len - done); - if (ret == -1 && errno == EAGAIN) { - g_usleep(100); - goto retry; - } - - if (ret <= 0) { - return; - } - done += ret; + if (qemu_write_full(s->logfd, buf, len) < len) { + /* + * qemu_write_full() is defined with G_GNUC_WARN_UNUSED_RESULT, + * but logging is best‑effort, we do ignore errors. + */ } } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:57:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:57:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230483.1535982 (Exim 4.92) (envelope-from ) id 1vqpvY-00078X-HT; Fri, 13 Feb 2026 09:57:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230483.1535982; Fri, 13 Feb 2026 09:57:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpvY-00078N-Eo; Fri, 13 Feb 2026 09:57:32 +0000 Received: by outflank-mailman (input) for mailman id 1230483; Fri, 13 Feb 2026 09:57:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpog-0001Ng-Bm for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 09:50:26 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68947748-08c1-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 10:50:21 +0100 (CET) Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-36-txG-vcI2NLC0ek1FXKCV6A-1; Fri, 13 Feb 2026 04:50:15 -0500 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4D33B18ADBC0; Fri, 13 Feb 2026 09:50:10 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 51E2419560B9; Fri, 13 Feb 2026 09:50:09 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68947748-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976219; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=47+h7KsUk4pIeVRSrl5x3R/+mYPfTcUJPXIJdzZh/Nw=; b=Gmrwr6LovzbEz24zQ/+0phBuxED7DWZGdMryrf7D1jFzzdc4hvv0mE7KBkYXzKAsp99n/S OIDFYqABl09F6bB3UlMCdiEX1hQ2KGLzyk3KxgBBiMcDrXcx2gXzxsGYlmi+ncRd8FLDVT aMYVOQTWSzlagpUOHt7TbjW0ITpSxvk= X-MC-Unique: txG-vcI2NLC0ek1FXKCV6A-1 X-Mimecast-MFC-AGG-ID: txG-vcI2NLC0ek1FXKCV6A_1770976213 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 08/15] chardev/char-pty: store pty_name into PtyChardev state Date: Fri, 13 Feb 2026 10:49:27 +0100 Message-ID: <20260213094938.4074478-9-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: Y8-80kxtKYmgd9d1QoiaeAHp1_MGiqZ_VzPITehyhrQ_1770976213 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy We'll use it in following commit. Note the bonus: stop use blind strcpy(). Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-8-vsementsov@yandex-team.ru> --- chardev/char-pty.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 9e26e97baf5..a582aa7bc73 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -43,6 +43,7 @@ struct PtyChardev { int connected; GSource *timer_src; char *path; + char *pty_name; }; typedef struct PtyChardev PtyChardev; @@ -303,7 +304,7 @@ static void cfmakeraw (struct termios *termios_p) #endif /* like openpty() but also makes it raw; return master fd */ -static int qemu_openpty_raw(int *aslave, char *pty_name) +static int qemu_openpty_raw(int *aslave, char **pty_name) { int amaster; struct termios tty; @@ -324,9 +325,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) cfmakeraw(&tty); tcsetattr(*aslave, TCSAFLUSH, &tty); - if (pty_name) { - strcpy(pty_name, q_ptsname(amaster)); - } + *pty_name = g_strdup(q_ptsname(amaster)); return amaster; } @@ -335,11 +334,12 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; - char pty_name[PATH_MAX]; char *name; char *path = backend->u.pty.data->path; - master_fd = qemu_openpty_raw(&slave_fd, pty_name); + s = PTY_CHARDEV(chr); + + master_fd = qemu_openpty_raw(&slave_fd, &s->pty_name); if (master_fd < 0) { error_setg_errno(errp, errno, "Failed to create PTY"); return false; @@ -351,11 +351,10 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) return false; } - chr->filename = g_strdup_printf("pty:%s", pty_name); + chr->filename = g_strdup_printf("pty:%s", s->pty_name); qemu_printf("char device redirected to %s (label %s)\n", - pty_name, chr->label); + s->pty_name, chr->label); - s = PTY_CHARDEV(chr); s->ioc = QIO_CHANNEL(qio_channel_file_new_fd(master_fd)); name = g_strdup_printf("chardev-pty-%s", chr->label); qio_channel_set_name(s->ioc, name); @@ -364,7 +363,7 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) /* create symbolic link */ if (path) { - int res = symlink(pty_name, path); + int res = symlink(s->pty_name, path); if (res != 0) { error_setg_errno(errp, errno, "Failed to create PTY symlink"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:57:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:57:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230481.1535963 (Exim 4.92) (envelope-from ) id 1vqpvV-0006fX-V4; Fri, 13 Feb 2026 09:57:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230481.1535963; Fri, 13 Feb 2026 09:57:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpvV-0006fQ-RA; Fri, 13 Feb 2026 09:57:29 +0000 Received: by outflank-mailman (input) for mailman id 1230481; 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Fri, 13 Feb 2026 09:50:04 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 41D371800352; Fri, 13 Feb 2026 09:50:01 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 67e8b4d0-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976218; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ARe11uBwUQtZK+r/LyMwdLX8qnRbouC5icUkGH7AqSA=; b=WQa1r+2FdcFqyB5PqgACKawat4bEiD8Pv2OnY5Ky7AW+1kxqlcxSHcUQBm0i2k3J8pBNNy enOpsIKedRJvInxLHiRqB095BNq2QLbvgNR7muzOZ8gjGYFPFG/ltIFdtfCKeh/3reC7O/ RNyNY/dALEJdu1ONZB8uI5patPHRwAo= X-MC-Unique: ccQBv4M4MaqY0leUR4BYzQ-1 X-Mimecast-MFC-AGG-ID: ccQBv4M4MaqY0leUR4BYzQ_1770976212 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 06/15] chardev: .chr_open(): drop be_opened parameter Date: Fri, 13 Feb 2026 10:49:25 +0100 Message-ID: <20260213094938.4074478-7-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: uCOmXi8NH7_Uecwobt1chg8CJBtEtF3iAesT6ZbHjyc_1770976212 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy The logic around the parameter is rather tricky. Let's instead explicitly send CHR_EVENT_OPENED in all backends where needed. Signed-off-by: Vladimir Sementsov-Ogievskiy [ Marc-André - add CHR_EVENT_OPENED in udp_chr_open() ] Signed-off-by: Marc-André Lureau Message-Id: <20260115144606.233252-6-vsementsov@yandex-team.ru> --- include/chardev/char.h | 3 +-- chardev/baum.c | 7 +++---- chardev/char-console.c | 5 ++--- chardev/char-file.c | 7 +++---- chardev/char-hub.c | 11 +++++------ chardev/char-mux.c | 19 +++++++++++-------- chardev/char-null.c | 7 ++----- chardev/char-parallel.c | 15 ++++----------- chardev/char-pipe.c | 14 ++++++-------- chardev/char-pty.c | 6 +----- chardev/char-ringbuf.c | 3 ++- chardev/char-serial.c | 18 +++++++++--------- chardev/char-socket.c | 10 +++------- chardev/char-stdio.c | 7 +++---- chardev/char-udp.c | 6 ++---- chardev/char-win-stdio.c | 2 +- chardev/char.c | 11 +++-------- chardev/msmouse.c | 4 ++-- chardev/spice.c | 10 ++-------- chardev/wctablet.c | 5 ++--- gdbstub/system.c | 5 ++--- ui/console-vc.c | 7 ++----- ui/dbus-chardev.c | 6 ++---- ui/gtk.c | 9 +++------ ui/spice-app.c | 10 +++------- ui/vdagent.c | 3 +-- 26 files changed, 80 insertions(+), 130 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index d33833b6c02..aa42e01b8a3 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -260,8 +260,7 @@ struct ChardevClass { void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*chr_open)(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp); + void (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); /* write buf to the backend */ int (*chr_write)(Chardev *s, const uint8_t *buf, int len); diff --git a/chardev/baum.c b/chardev/baum.c index 75e41965c11..4b97d630ffb 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -642,10 +642,7 @@ static void char_braille_finalize(Object *obj) } } -static void baum_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { BaumChardev *baum = BAUM_CHARDEV(chr); brlapi_handle_t *handle; @@ -670,6 +667,8 @@ static void baum_chr_open(Chardev *chr, * as an integer, but in practice it seems to work */ qemu_set_fd_handler(baum->brlapi_fd, baum_chr_read, NULL, baum); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_braille_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-console.c b/chardev/char-console.c index f3ef1a7748c..423f0f4cc4e 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -26,12 +26,11 @@ #include "chardev/char-win.h" #include "qemu/module.h" -static void console_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void console_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_console_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-file.c b/chardev/char-file.c index 568600bb7c4..34ef386abc5 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,10 +34,7 @@ #include "chardev/char-fd.h" #endif -static void file_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -100,6 +97,8 @@ static void file_chr_open(Chardev *chr, return; } #endif + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-hub.c b/chardev/char-hub.c index 11556dfa72b..aa6058c2f6f 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,10 +203,7 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void hub_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -241,8 +238,10 @@ static void hub_chr_open(Chardev *chr, list = list->next; } - /* Closed until an explicit event from backend */ - *be_opened = false; + /* + * Closed until an explicit event from backend, so we don't + * send CHR_EVENT_OPENED now. + */ } static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-mux.c b/chardev/char-mux.c index f38d66b21f1..7210df431fc 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,10 +361,7 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void mux_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -377,11 +374,17 @@ static void mux_chr_open(Chardev *chr, } d->focus = -1; - /* only default to opened state if we've realized the initial - * set of muxes + if (!qemu_chr_fe_init(&d->chr, drv, errp)) { + return; + } + + /* + * Only move to opened state if we've realized + * the initial set of muxes: */ - *be_opened = muxes_opened; - qemu_chr_fe_init(&d->chr, drv, errp); + if (muxes_opened) { + qemu_chr_be_event(chr, CHR_EVENT_OPENED); + } } static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-null.c b/chardev/char-null.c index 674603b3807..900b5febb6c 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -26,12 +26,9 @@ #include "chardev/char.h" #include "qemu/module.h" -static void null_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - *be_opened = false; + /* do not send CHR_EVENT_OPENED */ } static void char_null_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 1be1ef46292..359efa3c9c8 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -157,10 +157,7 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, - int fd, - bool *be_opened, - Error **errp) +static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); @@ -172,6 +169,7 @@ static void parallel_chr_open_fd(Chardev *chr, } drv->mode = IEEE1284_MODE_COMPAT; + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* __linux__ */ @@ -227,21 +225,16 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, - int fd, - bool *be_opened, - Error **errp) +static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); drv->fd = fd; - *be_opened = false; } #endif #ifdef HAVE_CHARDEV_PARALLEL static void parallel_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevHostdev *parallel = backend->u.parallel.data; @@ -251,7 +244,7 @@ static void parallel_chr_open(Chardev *chr, if (fd < 0) { return; } - parallel_chr_open_fd(chr, fd, be_opened, errp); + parallel_chr_open_fd(chr, fd, errp); } static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index e84492d42b6..2f26372dfc9 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,10 +103,7 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void pipe_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; @@ -114,14 +111,13 @@ static void pipe_chr_open(Chardev *chr, if (win_chr_pipe_init(chr, filename, errp) < 0) { return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #else -static void pipe_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -158,6 +154,8 @@ static void pipe_chr_open(Chardev *chr, } return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* !_WIN32 */ diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 909ab01f5f2..d4d69a29a95 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -331,10 +331,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void pty_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -364,7 +361,6 @@ static void pty_chr_open(Chardev *chr, qio_channel_set_name(s->ioc, name); g_free(name); s->timer_src = NULL; - *be_opened = false; /* create symbolic link */ if (path) { diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 19652fe2b3a..30b17a96d3a 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -94,7 +94,6 @@ static void char_ringbuf_finalize(Object *obj) static void ringbuf_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevRingbuf *opts = backend->u.ringbuf.data; @@ -111,6 +110,8 @@ static void ringbuf_chr_open(Chardev *chr, d->prod = 0; d->cons = 0; d->cbuf = g_malloc0(d->size); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } void qmp_ringbuf_write(const char *device, const char *data, diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 54c2b3935cf..9995f184258 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,14 +41,15 @@ #ifdef _WIN32 -static void serial_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; + int ret = win_chr_serial_init(chr, serial->device, errp); + if (ret < 0) { + return; + } - win_chr_serial_init(chr, serial->device, errp); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #elif defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ @@ -258,10 +259,7 @@ static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void serial_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -281,6 +279,8 @@ static void serial_chr_open(Chardev *chr, close(fd); return; } + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif /* __linux__ || __sun__ */ diff --git a/chardev/char-socket.c b/chardev/char-socket.c index a3203f2f97b..2951b2ec9be 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1365,10 +1365,7 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void tcp_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1439,9 +1436,6 @@ static void tcp_chr_open(Chardev *chr, } s->registered_yank = true; - /* be isn't opened until we get a connection */ - *be_opened = false; - update_disconnected_filename(s); if (s->is_listen) { @@ -1454,6 +1448,8 @@ static void tcp_chr_open(Chardev *chr, return; } } + + /* be isn't opened until we get a connection */ } static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index f0920a23faa..534f6ed5658 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -85,10 +85,7 @@ static void term_stdio_handler(int sig) stdio_chr_set_echo(NULL, stdio_echo_state); } -static void stdio_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; @@ -123,6 +120,8 @@ static void stdio_chr_open(Chardev *chr, stdio_allow_signal = !opts->has_signal || opts->signal; stdio_chr_set_echo(chr, false); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } #endif diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 18f4322408a..4c81c95e656 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -188,10 +188,7 @@ static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) } } -static void upd_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -214,6 +211,7 @@ static void upd_chr_open(Chardev *chr, g_free(name); s->ioc = QIO_CHANNEL(sioc); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 866f3a20398..0535960ff1b 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -144,7 +144,6 @@ static void win_stiod_chr_set_echo(Chardev *chr, bool echo) static void win_stdio_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; @@ -208,6 +207,7 @@ static void win_stdio_chr_open(Chardev *chr, win_stiod_chr_set_echo(chr, false); + qemu_chr_be_event(chr, CHR_EVENT_OPENED); return; err3: diff --git a/chardev/char.c b/chardev/char.c index df37d1df161..44bfed36272 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -246,8 +246,7 @@ int qemu_chr_add_client(Chardev *s, int fd) CHARDEV_GET_CLASS(s)->chr_add_client(s, fd) : -1; } -static void qemu_char_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevClass *cc = CHARDEV_GET_CLASS(chr); /* Any ChardevCommon member would work */ @@ -268,7 +267,7 @@ static void qemu_char_open(Chardev *chr, ChardevBackend *backend, } if (cc->chr_open) { - cc->chr_open(chr, backend, be_opened, errp); + cc->chr_open(chr, backend, errp); } } @@ -1009,7 +1008,6 @@ static Chardev *chardev_new(const char *id, const char *typename, Object *obj; Chardev *chr = NULL; Error *local_err = NULL; - bool be_opened = true; assert(g_str_has_prefix(typename, "chardev-")); assert(id); @@ -1020,7 +1018,7 @@ static Chardev *chardev_new(const char *id, const char *typename, chr->label = g_strdup(id); chr->gcontext = gcontext; - qemu_char_open(chr, backend, &be_opened, &local_err); + qemu_char_open(chr, backend, &local_err); if (local_err) { error_propagate(errp, local_err); object_unref(obj); @@ -1030,9 +1028,6 @@ static Chardev *chardev_new(const char *id, const char *typename, if (!chr->filename) { chr->filename = g_strdup(typename + 8); } - if (be_opened) { - qemu_chr_be_event(chr, CHR_EVENT_OPENED); - } return chr; } diff --git a/chardev/msmouse.c b/chardev/msmouse.c index d07cd998cb5..9dc04e3b3ec 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -255,16 +255,16 @@ static void char_msmouse_finalize(Object *obj) static void msmouse_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { MouseChardev *mouse = MOUSE_CHARDEV(chr); - *be_opened = false; mouse->hs = qemu_input_handler_register((DeviceState *)mouse, &msmouse_handler); mouse->tiocm = 0; fifo8_create(&mouse->outbuf, MSMOUSE_BUF_SZ); + + /* Never send CHR_EVENT_OPENED */ } static void char_msmouse_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/spice.c b/chardev/spice.c index 3ea25706653..f5b1f585eb1 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -251,9 +251,7 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void spice_vmc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; @@ -277,13 +275,10 @@ static void spice_vmc_chr_open(Chardev *chr, return; } - *be_opened = false; chr_open(chr, type); } -static void spice_port_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, +static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; @@ -302,7 +297,6 @@ static void spice_port_chr_open(Chardev *chr, chr_open(chr, "port"); - *be_opened = false; s = SPICE_CHARDEV(chr); s->sin.portname = g_strdup(name); diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 8285a56e7bc..65b2ceb58c9 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -326,13 +326,10 @@ static void wctablet_chr_finalize(Object *obj) static void wctablet_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) { TabletChardev *tablet = WCTABLET_CHARDEV(chr); - *be_opened = true; - /* init state machine */ memcpy(tablet->outbuf, WC_FULL_CONFIG_STRING, WC_FULL_CONFIG_STRING_LENGTH); tablet->outlen = WC_FULL_CONFIG_STRING_LENGTH; @@ -340,6 +337,8 @@ static void wctablet_chr_open(Chardev *chr, tablet->hs = qemu_input_handler_register((DeviceState *)tablet, &wctablet_handler); + + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void wctablet_chr_class_init(ObjectClass *oc, const void *data) diff --git a/gdbstub/system.c b/gdbstub/system.c index e161b14485b..982857f314a 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -233,10 +233,9 @@ static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - *be_opened = false; + /* Never send CHR_EVENT_OPENED */ } static void char_gdb_class_init(ObjectClass *oc, const void *data) diff --git a/ui/console-vc.c b/ui/console-vc.c index 931068d43ab..4c8ea4c1485 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1093,10 +1093,7 @@ void qemu_text_console_update_size(QemuTextConsole *c) dpy_text_resize(QEMU_CONSOLE(c), c->width, c->height); } -static void vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevVC *vc = backend->u.vc.data; VCChardev *drv = VC_CHARDEV(chr); @@ -1144,7 +1141,7 @@ static void vc_chr_open(Chardev *chr, drv->t_attrib = TEXT_ATTRIBUTES_DEFAULT; } - *be_opened = true; + qemu_chr_be_event(chr, CHR_EVENT_OPENED); } static void vc_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index f6c426e2209..3e471f84cd8 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -176,9 +176,7 @@ dbus_chr_send_break( return DBUS_METHOD_INVOCATION_HANDLED; } -static void -dbus_chr_open(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp) +static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ERRP_GUARD(); @@ -211,7 +209,7 @@ dbus_chr_open(Chardev *chr, ChardevBackend *backend, return; } CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( - chr, be, be_opened, errp); + chr, be, errp); } static void diff --git a/ui/gtk.c b/ui/gtk.c index acf55cdfce2..44b2b868ec9 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,10 +1963,7 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { if (nb_vcs == MAX_VCS) { error_setg(errp, "Maximum number of consoles reached"); @@ -1975,10 +1972,10 @@ static void gd_vc_chr_open(Chardev *chr, vcs[nb_vcs++] = chr; - /* console/chardev init sometimes completes elsewhere in a 2nd + /* + * console/chardev init sometimes completes elsewhere in a 2nd * stage, so defer OPENED events until they are fully initialized */ - *be_opened = false; } static void char_gd_vc_class_init(ObjectClass *oc, const void *data) diff --git a/ui/spice-app.c b/ui/spice-app.c index ea0b62a22b7..7ac9ae4e78d 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -49,8 +49,7 @@ struct VCChardev { struct VCChardevClass { ChardevClass parent; - void (*parent_open)(Chardev *chr, ChardevBackend *backend, - bool *be_opened, Error **errp); + void (*parent_open)(Chardev *chr, ChardevBackend *backend, Error **errp); }; #define TYPE_CHARDEV_VC "chardev-vc" @@ -67,10 +66,7 @@ chr_spice_backend_new(void) return be; } -static void vc_chr_open(Chardev *chr, - ChardevBackend *backend, - bool *be_opened, - Error **errp) +static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VCChardevClass *vc = CHARDEV_VC_GET_CLASS(chr); ChardevBackend *be; @@ -87,7 +83,7 @@ static void vc_chr_open(Chardev *chr, be = chr_spice_backend_new(); be->u.spiceport.data->fqdn = fqdn ? g_strdup(fqdn) : g_strdup_printf("org.qemu.console.%s", chr->label); - vc->parent_open(chr, be, be_opened, errp); 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s=mimecast20190719; t=1770976217; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EkOuQwE7r/+vSW05dfY0N0e0q7f2IkqD8VkbkpDWQVE=; b=XVppd7MxhpuVWlIVBTlGGdn5080P3qAy6/Adly38HdfVZMxLYw45Get7XjqJ1RuWTxx6u2 Ip07UR0J1vrGawcJdIkC7QFIrsao6QWxAR/okwlFq/o/Ss+xhT71DwNSJFMrLpv2/7mNBH E/5qT3Ii/ddYWIyra9PL3c+dx8Qtp4I= X-MC-Unique: lSjxDuI5MUSzo8WKgT3dYw-1 X-Mimecast-MFC-AGG-ID: lSjxDuI5MUSzo8WKgT3dYw_1770976211 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 07/15] chardev: .chr_open(): add boolean return value Date: Fri, 13 Feb 2026 10:49:26 +0100 Message-ID: <20260213094938.4074478-8-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: BGZ-s7A-vwswVRRIFhJ8xs3eN2l3mxAq39dLY7Km4YA_1770976211 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Add boolean return value to follow common recommendations for functions with errrp in include/qapi/error.h Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-7-vsementsov@yandex-team.ru> --- include/chardev/char.h | 2 +- chardev/baum.c | 5 +++-- chardev/char-console.c | 3 ++- chardev/char-file.c | 13 +++++++------ chardev/char-hub.c | 11 ++++++----- chardev/char-mux.c | 8 +++++--- chardev/char-null.c | 4 ++-- chardev/char-parallel.c | 14 ++++++++------ chardev/char-pipe.c | 12 +++++++----- chardev/char-pty.c | 9 ++++++--- chardev/char-ringbuf.c | 5 +++-- chardev/char-serial.c | 15 +++++++++------ chardev/char-socket.c | 17 +++++++++-------- chardev/char-stdio.c | 11 ++++++----- chardev/char-udp.c | 5 +++-- chardev/char-win-stdio.c | 7 ++++--- chardev/msmouse.c | 3 ++- chardev/spice.c | 12 +++++++----- chardev/wctablet.c | 3 ++- gdbstub/system.c | 3 ++- ui/console-vc.c | 3 ++- ui/dbus-chardev.c | 6 +++--- ui/gtk.c | 5 +++-- ui/spice-app.c | 10 ++++++---- ui/vdagent.c | 10 +++++----- 25 files changed, 113 insertions(+), 83 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index aa42e01b8a3..e1bf97222b8 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -260,7 +260,7 @@ struct ChardevClass { void (*chr_parse)(QemuOpts *opts, ChardevBackend *backend, Error **errp); /* called after construction, open/starts the backend */ - void (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); + bool (*chr_open)(Chardev *chr, ChardevBackend *backend, Error **errp); /* write buf to the backend */ int (*chr_write)(Chardev *s, const uint8_t *buf, int len); diff --git a/chardev/baum.c b/chardev/baum.c index 4b97d630ffb..1219963656b 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -642,7 +642,7 @@ static void char_braille_finalize(Object *obj) } } -static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { BaumChardev *baum = BAUM_CHARDEV(chr); brlapi_handle_t *handle; @@ -656,7 +656,7 @@ static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) brlapi_strerror(brlapi_error_location())); g_free(handle); baum->brlapi = NULL; - return; + return false; } baum->deferred_init = 0; @@ -669,6 +669,7 @@ static void baum_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) qemu_set_fd_handler(baum->brlapi_fd, baum_chr_read, NULL, baum); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_braille_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-console.c b/chardev/char-console.c index 423f0f4cc4e..0739c9c94a3 100644 --- a/chardev/char-console.c +++ b/chardev/char-console.c @@ -26,11 +26,12 @@ #include "chardev/char-win.h" #include "qemu/module.h" -static void console_chr_open(Chardev *chr, ChardevBackend *backend, +static bool console_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { win_chr_set_file(chr, GetStdHandle(STD_OUTPUT_HANDLE), true); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_console_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-file.c b/chardev/char-file.c index 34ef386abc5..b0dd9d5f870 100644 --- a/chardev/char-file.c +++ b/chardev/char-file.c @@ -34,7 +34,7 @@ #include "chardev/char-fd.h" #endif -static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevFile *file = backend->u.file.data; #ifdef _WIN32 @@ -44,7 +44,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (file->in) { error_setg(errp, "input file not supported"); - return; + return false; } if (file->has_append && file->append) { @@ -61,7 +61,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) FILE_ATTRIBUTE_NORMAL, NULL); if (out == INVALID_HANDLE_VALUE) { error_setg(errp, "open %s failed", file->out); - return; + return false; } win_chr_set_file(chr, out, false); @@ -77,7 +77,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) out = qmp_chardev_open_file_source(file->out, flags, errp); if (out < 0) { - return; + return false; } if (file->in) { @@ -85,7 +85,7 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) in = qmp_chardev_open_file_source(file->in, flags, errp); if (in < 0) { qemu_close(out); - return; + return false; } } @@ -94,11 +94,12 @@ static void file_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (in >= 0) { qemu_close(in); } - return; + return false; } #endif qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void file_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-hub.c b/chardev/char-hub.c index aa6058c2f6f..05cf722b5b0 100644 --- a/chardev/char-hub.c +++ b/chardev/char-hub.c @@ -203,7 +203,7 @@ static void hub_chr_update_read_handlers(Chardev *chr) } } -static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHub *hub = backend->u.hub.data; HubChardev *d = HUB_CHARDEV(chr); @@ -213,7 +213,7 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (list == NULL) { error_setg(errp, "hub: 'chardevs' list is not defined"); - return; + return false; } while (list) { @@ -223,17 +223,17 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (s == NULL) { error_setg(errp, "hub: chardev can't be found by id '%s'", list->value); - return; + return false; } if (CHARDEV_IS_HUB(s) || CHARDEV_IS_MUX(s)) { error_setg(errp, "hub: multiplexers and hub devices can't be " "stacked, check chardev '%s', chardev should not " "be a hub device or have 'mux=on' enabled", list->value); - return; + return false; } if (!hub_chr_attach_chardev(d, s, errp)) { - return; + return false; } list = list->next; } @@ -242,6 +242,7 @@ static void hub_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) * Closed until an explicit event from backend, so we don't * send CHR_EVENT_OPENED now. */ + return true; } static void hub_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-mux.c b/chardev/char-mux.c index 7210df431fc..881443d869d 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -361,7 +361,7 @@ void mux_set_focus(Chardev *chr, unsigned int focus) mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); } -static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevMux *mux = backend->u.mux.data; Chardev *drv; @@ -370,12 +370,12 @@ static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) drv = qemu_chr_find(mux->chardev); if (drv == NULL) { error_setg(errp, "mux: base chardev %s not found", mux->chardev); - return; + return false; } d->focus = -1; if (!qemu_chr_fe_init(&d->chr, drv, errp)) { - return; + return false; } /* @@ -385,6 +385,8 @@ static void mux_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (muxes_opened) { qemu_chr_be_event(chr, CHR_EVENT_OPENED); } + + return true; } static void mux_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-null.c b/chardev/char-null.c index 900b5febb6c..d5a101178bb 100644 --- a/chardev/char-null.c +++ b/chardev/char-null.c @@ -26,9 +26,9 @@ #include "chardev/char.h" #include "qemu/module.h" -static void null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool null_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { - /* do not send CHR_EVENT_OPENED */ + return true; } static void char_null_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-parallel.c b/chardev/char-parallel.c index 359efa3c9c8..cbf87e660da 100644 --- a/chardev/char-parallel.c +++ b/chardev/char-parallel.c @@ -157,7 +157,7 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) +static bool parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); @@ -165,11 +165,12 @@ static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) if (ioctl(fd, PPCLAIM) < 0) { error_setg_errno(errp, errno, "not a parallel port"); - return; + return false; } drv->mode = IEEE1284_MODE_COMPAT; qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* __linux__ */ @@ -225,15 +226,16 @@ static int parallel_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) +static bool parallel_chr_open_fd(Chardev *chr, int fd, Error **errp) { ParallelChardev *drv = PARALLEL_CHARDEV(chr); drv->fd = fd; + return true; } #endif #ifdef HAVE_CHARDEV_PARALLEL -static void parallel_chr_open(Chardev *chr, +static bool parallel_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -242,9 +244,9 @@ static void parallel_chr_open(Chardev *chr, fd = qmp_chardev_open_file_source(parallel->device, O_RDWR, errp); if (fd < 0) { - return; + return false; } - parallel_chr_open_fd(chr, fd, errp); + return parallel_chr_open_fd(chr, fd, errp); } static void parallel_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/char-pipe.c b/chardev/char-pipe.c index 2f26372dfc9..472b3e0801f 100644 --- a/chardev/char-pipe.c +++ b/chardev/char-pipe.c @@ -103,21 +103,22 @@ static int win_chr_pipe_init(Chardev *chr, const char *filename, return -1; } -static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; const char *filename = opts->device; if (win_chr_pipe_init(chr, filename, errp) < 0) { - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #else -static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *opts = backend->u.pipe.data; int fd_in, fd_out; @@ -143,7 +144,7 @@ static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) ); if (fd_in < 0) { error_setg_file_open(errp, errno, filename); - return; + return false; } } @@ -152,10 +153,11 @@ static void pipe_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (fd_out != fd_in) { close(fd_out); } - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* !_WIN32 */ diff --git a/chardev/char-pty.c b/chardev/char-pty.c index d4d69a29a95..9e26e97baf5 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -331,7 +331,7 @@ static int qemu_openpty_raw(int *aslave, char *pty_name) return amaster; } -static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { PtyChardev *s; int master_fd, slave_fd; @@ -342,13 +342,13 @@ static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) master_fd = qemu_openpty_raw(&slave_fd, pty_name); if (master_fd < 0) { error_setg_errno(errp, errno, "Failed to create PTY"); - return; + return false; } close(slave_fd); if (!qemu_set_blocking(master_fd, false, errp)) { close(master_fd); - return; + return false; } chr->filename = g_strdup_printf("pty:%s", pty_name); @@ -368,10 +368,13 @@ static void pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (res != 0) { error_setg_errno(errp, errno, "Failed to create PTY symlink"); + return false; } else { s->path = g_strdup(path); } } + + return true; } static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-ringbuf.c b/chardev/char-ringbuf.c index 30b17a96d3a..8f998d26a49 100644 --- a/chardev/char-ringbuf.c +++ b/chardev/char-ringbuf.c @@ -92,7 +92,7 @@ static void char_ringbuf_finalize(Object *obj) g_free(d->cbuf); } -static void ringbuf_chr_open(Chardev *chr, +static bool ringbuf_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -104,7 +104,7 @@ static void ringbuf_chr_open(Chardev *chr, /* The size must be power of 2 */ if (d->size & (d->size - 1)) { error_setg(errp, "size of ringbuf chardev must be power of two"); - return; + return false; } d->prod = 0; @@ -112,6 +112,7 @@ static void ringbuf_chr_open(Chardev *chr, d->cbuf = g_malloc0(d->size); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } void qmp_ringbuf_write(const char *device, const char *data, diff --git a/chardev/char-serial.c b/chardev/char-serial.c index 9995f184258..0c73bafc545 100644 --- a/chardev/char-serial.c +++ b/chardev/char-serial.c @@ -41,15 +41,17 @@ #ifdef _WIN32 -static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int ret = win_chr_serial_init(chr, serial->device, errp); if (ret < 0) { - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + + return true; } #elif defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ @@ -259,7 +261,7 @@ static int serial_chr_ioctl(Chardev *chr, int cmd, void *arg) return 0; } -static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevHostdev *serial = backend->u.serial.data; int fd; @@ -267,20 +269,21 @@ static void serial_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) fd = qmp_chardev_open_file_source(serial->device, O_RDWR | O_NONBLOCK, errp); if (fd < 0) { - return; + return false; } if (!qemu_set_blocking(fd, false, errp)) { close(fd); - return; + return false; } tty_serial_init(fd, 115200, 'N', 8, 1); if (!qemu_chr_open_fd(chr, fd, fd, errp)) { close(fd); - return; + return false; } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif /* __linux__ || __sun__ */ diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 2951b2ec9be..908bbdbc124 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1365,7 +1365,7 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, } -static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { SocketChardev *s = SOCKET_CHARDEV(chr); ChardevSocket *sock = backend->u.socket.data; @@ -1390,7 +1390,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (!creds) { error_setg(errp, "No TLS credentials with id '%s'", sock->tls_creds); - return; + return false; } s->tls_creds = (QCryptoTLSCreds *) object_dynamic_cast(creds, @@ -1398,7 +1398,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (!s->tls_creds) { error_setg(errp, "Object with id '%s' is not TLS credentials", sock->tls_creds); - return; + return false; } object_ref(OBJECT(s->tls_creds)); if (!qcrypto_tls_creds_check_endpoint(s->tls_creds, @@ -1406,7 +1406,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) ? QCRYPTO_TLS_CREDS_ENDPOINT_SERVER : QCRYPTO_TLS_CREDS_ENDPOINT_CLIENT, errp)) { - return; + return false; } } s->tls_authz = g_strdup(sock->tls_authz); @@ -1414,7 +1414,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s->addr = addr = socket_address_flatten(sock->addr); if (!qmp_chardev_validate_socket(sock, addr, errp)) { - return; + return false; } qemu_chr_set_feature(chr, QEMU_CHAR_FEATURE_RECONNECTABLE); @@ -1431,7 +1431,7 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) */ if (!chr->handover_yank_instance) { if (!yank_register_instance(CHARDEV_YANK_INSTANCE(chr->label), errp)) { - return; + return false; } } s->registered_yank = true; @@ -1441,15 +1441,16 @@ static void tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) if (s->is_listen) { if (qmp_chardev_open_socket_server(chr, is_telnet || is_tn3270, is_waitconnect, errp) < 0) { - return; + return false; } } else { if (qmp_chardev_open_socket_client(chr, reconnect_ms, errp) < 0) { - return; + return false; } } /* be isn't opened until we get a connection */ + return true; } static void tcp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c index 534f6ed5658..fe1cbb2d880 100644 --- a/chardev/char-stdio.c +++ b/chardev/char-stdio.c @@ -85,19 +85,19 @@ static void term_stdio_handler(int sig) stdio_chr_set_echo(NULL, stdio_echo_state); } -static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevStdio *opts = backend->u.stdio.data; struct sigaction act; if (is_daemonized()) { error_setg(errp, "cannot use stdio with -daemonize"); - return; + return false; } if (stdio_in_use) { error_setg(errp, "cannot use stdio by multiple character devices"); - return; + return false; } stdio_in_use = true; @@ -105,11 +105,11 @@ static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) old_fd1_flags = fcntl(1, F_GETFL); tcgetattr(0, &oldtty); if (!qemu_set_blocking(0, false, errp)) { - return; + return false; } if (!qemu_chr_open_fd(chr, 0, 1, errp)) { - return; + return false; } atexit(term_exit); @@ -122,6 +122,7 @@ static void stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) stdio_chr_set_echo(chr, false); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } #endif diff --git a/chardev/char-udp.c b/chardev/char-udp.c index 4c81c95e656..423000832ff 100644 --- a/chardev/char-udp.c +++ b/chardev/char-udp.c @@ -188,7 +188,7 @@ static void udp_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) } } -static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevUdp *udp = backend->u.udp.data; SocketAddress *local_addr = socket_address_flatten(udp->local); @@ -203,7 +203,7 @@ static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) qapi_free_SocketAddress(remote_addr); if (ret < 0) { object_unref(OBJECT(sioc)); - return; + return false; } name = g_strdup_printf("chardev-udp-%s", chr->label); @@ -212,6 +212,7 @@ static void upd_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s->ioc = QIO_CHANNEL(sioc); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void char_udp_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/char-win-stdio.c b/chardev/char-win-stdio.c index 0535960ff1b..bb9c195a8b1 100644 --- a/chardev/char-win-stdio.c +++ b/chardev/char-win-stdio.c @@ -142,7 +142,7 @@ static void win_stiod_chr_set_echo(Chardev *chr, bool echo) } } -static void win_stdio_chr_open(Chardev *chr, +static bool win_stdio_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -155,7 +155,7 @@ static void win_stdio_chr_open(Chardev *chr, stdio->hStdIn = GetStdHandle(STD_INPUT_HANDLE); if (stdio->hStdIn == INVALID_HANDLE_VALUE) { error_setg(errp, "cannot open stdio: invalid handle"); - return; + return false; } is_console = GetConsoleMode(stdio->hStdIn, &dwMode) != 0; @@ -208,7 +208,7 @@ static void win_stdio_chr_open(Chardev *chr, win_stiod_chr_set_echo(chr, false); qemu_chr_be_event(chr, CHR_EVENT_OPENED); - return; + return true; err3: qemu_del_wait_object(stdio->hInputReadyEvent, NULL, NULL); @@ -217,6 +217,7 @@ err2: CloseHandle(stdio->hInputDoneEvent); err1: qemu_del_wait_object(stdio->hStdIn, NULL, NULL); + return false; } static void char_win_stdio_finalize(Object *obj) diff --git a/chardev/msmouse.c b/chardev/msmouse.c index 9dc04e3b3ec..365f04546e9 100644 --- a/chardev/msmouse.c +++ b/chardev/msmouse.c @@ -253,7 +253,7 @@ static void char_msmouse_finalize(Object *obj) fifo8_destroy(&mouse->outbuf); } -static void msmouse_chr_open(Chardev *chr, +static bool msmouse_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -265,6 +265,7 @@ static void msmouse_chr_open(Chardev *chr, fifo8_create(&mouse->outbuf, MSMOUSE_BUF_SZ); /* Never send CHR_EVENT_OPENED */ + return true; } static void char_msmouse_class_init(ObjectClass *oc, const void *data) diff --git a/chardev/spice.c b/chardev/spice.c index f5b1f585eb1..ad97d98ac6b 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -251,7 +251,7 @@ static void chr_open(Chardev *chr, const char *subtype) s->sin.subtype = g_strdup(subtype); } -static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, +static bool spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpiceChannel *spicevmc = backend->u.spicevmc.data; @@ -272,13 +272,14 @@ static void spice_vmc_chr_open(Chardev *chr, ChardevBackend *backend, subtypes); g_free(subtypes); - return; + return false; } chr_open(chr, type); + return true; } -static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, +static bool spice_port_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevSpicePort *spiceport = backend->u.spiceport.data; @@ -287,12 +288,12 @@ static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, if (name == NULL) { error_setg(errp, "missing name parameter"); - return; + return false; } if (!using_spice) { error_setg(errp, "spice not enabled"); - return; + return false; } chr_open(chr, "port"); @@ -301,6 +302,7 @@ static void spice_port_chr_open(Chardev *chr, ChardevBackend *backend, s->sin.portname = g_strdup(name); vmc_register_interface(s); + return true; } static void spice_vmc_chr_parse(QemuOpts *opts, ChardevBackend *backend, diff --git a/chardev/wctablet.c b/chardev/wctablet.c index 65b2ceb58c9..214d5ca2e28 100644 --- a/chardev/wctablet.c +++ b/chardev/wctablet.c @@ -324,7 +324,7 @@ static void wctablet_chr_finalize(Object *obj) } } -static void wctablet_chr_open(Chardev *chr, +static bool wctablet_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { @@ -339,6 +339,7 @@ static void wctablet_chr_open(Chardev *chr, &wctablet_handler); qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void wctablet_chr_class_init(ObjectClass *oc, const void *data) diff --git a/gdbstub/system.c b/gdbstub/system.c index 982857f314a..e86c5870abc 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -233,9 +233,10 @@ static int gdb_chr_write(Chardev *chr, const uint8_t *buf, int len) return len; } -static void gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool gdb_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { /* Never send CHR_EVENT_OPENED */ + return true; } static void char_gdb_class_init(ObjectClass *oc, const void *data) diff --git a/ui/console-vc.c b/ui/console-vc.c index 4c8ea4c1485..f22806fed79 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -1093,7 +1093,7 @@ void qemu_text_console_update_size(QemuTextConsole *c) dpy_text_resize(QEMU_CONSOLE(c), c->width, c->height); } -static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ChardevVC *vc = backend->u.vc.data; VCChardev *drv = VC_CHARDEV(chr); @@ -1142,6 +1142,7 @@ static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) } qemu_chr_be_event(chr, CHR_EVENT_OPENED); + return true; } static void vc_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/ui/dbus-chardev.c b/ui/dbus-chardev.c index 3e471f84cd8..9442b475517 100644 --- a/ui/dbus-chardev.c +++ b/ui/dbus-chardev.c @@ -176,7 +176,7 @@ dbus_chr_send_break( return DBUS_METHOD_INVOCATION_HANDLED; } -static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { ERRP_GUARD(); @@ -206,9 +206,9 @@ static void dbus_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_parse( opts, be, errp); if (*errp) { - return; + return false; } - CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( + return CHARDEV_CLASS(object_class_by_name(TYPE_CHARDEV_SOCKET))->chr_open( chr, be, errp); } diff --git a/ui/gtk.c b/ui/gtk.c index 44b2b868ec9..9ebe7e8df0d 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1963,11 +1963,11 @@ static void gd_vc_chr_set_echo(Chardev *chr, bool echo) static int nb_vcs; static Chardev *vcs[MAX_VCS]; -static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { if (nb_vcs == MAX_VCS) { error_setg(errp, "Maximum number of consoles reached"); - return; + return false; } vcs[nb_vcs++] = chr; @@ -1976,6 +1976,7 @@ static void gd_vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) * console/chardev init sometimes completes elsewhere in a 2nd * stage, so defer OPENED events until they are fully initialized */ + return true; } static void char_gd_vc_class_init(ObjectClass *oc, const void *data) diff --git a/ui/spice-app.c b/ui/spice-app.c index 7ac9ae4e78d..9e55f273715 100644 --- a/ui/spice-app.c +++ b/ui/spice-app.c @@ -49,7 +49,7 @@ struct VCChardev { struct VCChardevClass { ChardevClass parent; - void (*parent_open)(Chardev *chr, ChardevBackend *backend, Error **errp); + bool (*parent_init)(Chardev *chr, ChardevBackend *backend, Error **errp); }; #define TYPE_CHARDEV_VC "chardev-vc" @@ -66,11 +66,12 @@ chr_spice_backend_new(void) return be; } -static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) +static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VCChardevClass *vc = CHARDEV_VC_GET_CLASS(chr); ChardevBackend *be; const char *fqdn = NULL; + bool ok; if (strstart(chr->label, "serial", NULL)) { fqdn = "org.qemu.console.serial.0"; @@ -83,8 +84,9 @@ static void vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) be = chr_spice_backend_new(); be->u.spiceport.data->fqdn = fqdn ? g_strdup(fqdn) : g_strdup_printf("org.qemu.console.%s", chr->label); - vc->parent_open(chr, be, errp); + ok = vc->parent_init(chr, be, errp); qapi_free_ChardevBackend(be); + return ok; } static void vc_chr_set_echo(Chardev *chr, bool echo) @@ -102,7 +104,7 @@ static void char_vc_class_init(ObjectClass *oc, const void *data) VCChardevClass *vc = CHARDEV_VC_CLASS(oc); ChardevClass *cc = CHARDEV_CLASS(oc); - vc->parent_open = cc->chr_open; + vc->parent_init = cc->chr_open; cc->chr_parse = vc_chr_parse; cc->chr_open = vc_chr_open; diff --git a/ui/vdagent.c b/ui/vdagent.c index 644e9acaaeb..7ff0861f3e9 100644 --- a/ui/vdagent.c +++ b/ui/vdagent.c @@ -660,8 +660,7 @@ static void vdagent_chr_recv_clipboard(VDAgentChardev *vd, VDAgentMessage *msg) /* ------------------------------------------------------------------ */ /* chardev backend */ -static void vdagent_chr_open(Chardev *chr, - ChardevBackend *backend, +static bool vdagent_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) { VDAgentChardev *vd = QEMU_VDAGENT_CHARDEV(chr); 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s=mimecast20190719; t=1770976221; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NawPSV0+R7Z6iBTNYDG41PH3COFdnG/VW+iZ15ECL/g=; b=hMOvy3uyQGFRNGiO0tP2eqVKtTfPFsvxr6cTbleSYm0UVAn82IdM+70MBfa8h8hbbPqKnf IAvYBqvcAk1o6ptKHBrlFa2lFDMgoPGme3q2CEDbZ+uxfPzORJrXDFVNmf00YCehdJxdd5 nGUeLO5EIfW4Uyk8qJOI14bCGS9wVBc= X-MC-Unique: -Y17YsGYPkOtZeaIxLcQjw-1 X-Mimecast-MFC-AGG-ID: -Y17YsGYPkOtZeaIxLcQjw_1770976216 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 10/15] chardev: rework filename handling Date: Fri, 13 Feb 2026 10:49:29 +0100 Message-ID: <20260213094938.4074478-11-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: ScG_YMMlG99cRkEqrNtcvDGyB_9Mi3CZXXDai16vwYQ_1770976216 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Instead of checking, did backend set the filename state or not, let's be stateless: filename is needed rarely, so, let's just have a generic function (with optional implementation by backends) to get it. Signed-off-by: Vladimir Sementsov-Ogievskiy [ Marc-André - fix leak in ivshmem-pci.c ] Signed-off-by: Marc-André Lureau Message-Id: <20260115144606.233252-10-vsementsov@yandex-team.ru> --- include/chardev/char.h | 5 ++++- chardev/char-pty.c | 8 +++++++- chardev/char-socket.c | 31 ++++++++++++------------------- chardev/char.c | 21 +++++++++++++++------ hw/misc/ivshmem-pci.c | 7 ++++--- 5 files changed, 42 insertions(+), 30 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index ada5529fa6c..81bc0cbdf2a 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -62,7 +62,6 @@ struct Chardev { QemuMutex chr_write_lock; CharFrontend *fe; char *label; - char *filename; int logfd; int be_open; /* used to coordinate the chardev-change special-case: */ @@ -309,6 +308,9 @@ struct ChardevClass { /* return PTY name if available */ char *(*chr_get_pty_name)(Chardev *s); + + /* get filename for reporting */ + char *(*chr_get_filename)(Chardev *s); }; Chardev *qemu_chardev_new(const char *id, const char *typename, @@ -324,5 +326,6 @@ void suspend_mux_open(void); void resume_mux_open(void); char *qemu_chr_get_pty_name(Chardev *chr); +char *qemu_chr_get_filename(Chardev *chr); #endif diff --git a/chardev/char-pty.c b/chardev/char-pty.c index 047aade09e5..7e95132cdbb 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -351,7 +351,6 @@ static bool pty_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) return false; } - chr->filename = g_strdup_printf("pty:%s", s->pty_name); qemu_printf("char device redirected to %s (label %s)\n", s->pty_name, chr->label); @@ -393,6 +392,12 @@ static char *pty_chr_get_pty_name(Chardev *chr) return g_strdup(s->pty_name); } +static char *pty_chr_get_filename(Chardev *chr) +{ + PtyChardev *s = PTY_CHARDEV(chr); + return g_strdup_printf("pty:%s", s->pty_name); +} + static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); @@ -403,6 +408,7 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; cc->chr_get_pty_name = pty_chr_get_pty_name; + cc->chr_get_filename = pty_chr_get_filename; } static const TypeInfo char_pty_type_info = { diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 908bbdbc124..5adeb908659 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -40,6 +40,7 @@ static gboolean socket_reconnect_timeout(gpointer opaque); static void tcp_chr_telnet_init(Chardev *chr); +static char *qemu_chr_compute_filename(SocketChardev *s); static void tcp_chr_change_state(SocketChardev *s, TCPChardevState state) { @@ -384,8 +385,6 @@ static void tcp_chr_free_connection(Chardev *chr) s->sioc = NULL; object_unref(OBJECT(s->ioc)); s->ioc = NULL; - g_free(chr->filename); - chr->filename = NULL; tcp_chr_change_state(s, TCP_CHARDEV_STATE_DISCONNECTED); } @@ -439,16 +438,17 @@ static char *qemu_chr_socket_address(SocketChardev *s, const char *prefix) } } -static void update_disconnected_filename(SocketChardev *s) +static char *tcp_chr_get_filename(Chardev *chr) { - Chardev *chr = CHARDEV(s); + SocketChardev *s = SOCKET_CHARDEV(chr); - g_free(chr->filename); - if (s->addr) { - chr->filename = qemu_chr_socket_address(s, "disconnected:"); - } else { - chr->filename = g_strdup("disconnected:socket"); + if (s->state == TCP_CHARDEV_STATE_CONNECTED) { + return qemu_chr_compute_filename(s); + } else if (s->addr) { + return qemu_chr_socket_address(s, "disconnected:"); } + + return g_strdup("disconnected:socket"); } /* NB may be called even if tcp_chr_connect has not been @@ -468,7 +468,6 @@ static void tcp_chr_disconnect_locked(Chardev *chr) qio_net_listener_set_client_func_full(s->listener, tcp_chr_accept, chr, NULL, chr->gcontext); } - update_disconnected_filename(s); if (emit_close) { qemu_chr_be_event(chr, CHR_EVENT_CLOSED); } @@ -639,9 +638,6 @@ static void tcp_chr_connect(void *opaque) Chardev *chr = CHARDEV(opaque); SocketChardev *s = SOCKET_CHARDEV(opaque); - g_free(chr->filename); - chr->filename = qemu_chr_compute_filename(s); - tcp_chr_change_state(s, TCP_CHARDEV_STATE_CONNECTED); update_ioc_handlers(s); qemu_chr_be_event(chr, CHR_EVENT_OPENED); @@ -1000,8 +996,8 @@ static void tcp_chr_accept_server_sync(Chardev *chr) { SocketChardev *s = SOCKET_CHARDEV(chr); QIOChannelSocket *sioc; - info_report("QEMU waiting for connection on: %s", - chr->filename); + g_autofree char *filename = qemu_chr_get_filename(chr); + info_report("QEMU waiting for connection on: %s", filename); tcp_chr_change_state(s, TCP_CHARDEV_STATE_CONNECTING); sioc = qio_net_listener_wait_client(s->listener); tcp_chr_set_client_ioc_name(chr, sioc); @@ -1258,8 +1254,6 @@ static int qmp_chardev_open_socket_server(Chardev *chr, s->addr = qio_net_listener_get_local_address(s->listener, 0, errp); skip_listen: - update_disconnected_filename(s); - if (is_waitconnect) { tcp_chr_accept_server_sync(chr); } else { @@ -1436,8 +1430,6 @@ static bool tcp_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) } s->registered_yank = true; - update_disconnected_filename(s); - if (s->is_listen) { if (qmp_chardev_open_socket_server(chr, is_telnet || is_tn3270, is_waitconnect, errp) < 0) { @@ -1593,6 +1585,7 @@ static void char_socket_class_init(ObjectClass *oc, const void *data) cc->chr_add_watch = tcp_chr_add_watch; cc->chr_update_read_handler = tcp_chr_update_read_handler; cc->chr_listener_cleanup = tcp_chr_listener_cleanup; + cc->chr_get_filename = tcp_chr_get_filename; object_class_property_add(oc, "addr", "SocketAddress", char_socket_get_addr, NULL, diff --git a/chardev/char.c b/chardev/char.c index 0dc792b88f7..3373c9b61f8 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -309,7 +309,6 @@ static void char_finalize(Object *obj) if (chr->fe) { chr->fe->chr = NULL; } - g_free(chr->filename); g_free(chr->label); if (chr->logfd != -1) { close(chr->logfd); @@ -796,7 +795,7 @@ static int qmp_query_chardev_foreach(Object *obj, void *data) ChardevInfo *value = g_malloc0(sizeof(*value)); value->label = g_strdup(chr->label); - value->filename = g_strdup(chr->filename); + value->filename = qemu_chr_get_filename(chr); value->frontend_open = chr->fe && chr->fe->fe_is_open; QAPI_LIST_PREPEND(*list, value); @@ -1025,10 +1024,6 @@ static Chardev *chardev_new(const char *id, const char *typename, return NULL; } - if (!chr->filename) { - chr->filename = g_strdup(typename + 8); - } - return chr; } @@ -1110,6 +1105,20 @@ char *qemu_chr_get_pty_name(Chardev *chr) return NULL; } +char *qemu_chr_get_filename(Chardev *chr) +{ + ChardevClass *cc = CHARDEV_GET_CLASS(chr); + const char *typename; + + if (cc->chr_get_filename) { + return cc->chr_get_filename(chr); + } + + typename = object_get_typename(OBJECT(chr)); + assert(g_str_has_prefix(typename, "chardev-")); + return g_strdup(typename + 8); +} + ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, Error **errp) { diff --git a/hw/misc/ivshmem-pci.c b/hw/misc/ivshmem-pci.c index b9162589a02..a3a43f53bd1 100644 --- a/hw/misc/ivshmem-pci.c +++ b/hw/misc/ivshmem-pci.c @@ -873,10 +873,11 @@ static void ivshmem_common_realize(PCIDevice *dev, Error **errp) host_memory_backend_set_mapped(s->hostmem, true); } else { Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr); - assert(chr); + g_autofree char *filename = NULL; - IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", - chr->filename); + assert(chr); + filename = qemu_chr_get_filename(chr); + IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", filename); /* we allocate enough space for 16 peers and grow as needed */ resize_peers(s, 16); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:57:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:57:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230490.1536002 (Exim 4.92) (envelope-from ) id 1vqpvk-0007sm-4X; Fri, 13 Feb 2026 09:57:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230490.1536002; Fri, 13 Feb 2026 09:57:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpvk-0007sb-0Q; Fri, 13 Feb 2026 09:57:44 +0000 Received: by outflank-mailman (input) for mailman id 1230490; Fri, 13 Feb 2026 09:57:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoq-0001Ng-OA for xen-devel@lists.xenproject.org; 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Fri, 13 Feb 2026 09:50:25 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 70e2de29-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976233; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oafPsMhhX2LYktt1mZytvPrd7reHuMI6cpisN3UVjHk=; b=U08krfvegiL65nsu0RehDPCFg62OvCBxJ9DbgBz0b9ldMbq1LbIxezXmS9tm0W6AikEnmO vtIR0T7G0LUGEf+TUcs+2rxyZYZlXCmhLzNeZHKoaVCx1JWr04dAEFkttRXnwcCB+qe4uv O6aCD0wB3scvn5UNQCASgGMH0Q1LxAw= X-MC-Unique: kDbAhiIkMMOtDe9wMvjVCw-1 X-Mimecast-MFC-AGG-ID: kDbAhiIkMMOtDe9wMvjVCw_1770976227 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 14/15] chardev: add logtimestamp option Date: Fri, 13 Feb 2026 10:49:33 +0100 Message-ID: <20260213094938.4074478-15-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: GijAItyDuPpb8SBXGgONmNZESViSMh0ybdEy3SGOZ6U_1770976227 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Add an option to inject timestamps into serial log file. That simplifies debugging a lot, when you can simply compare QEMU logs with guest console logs. Signed-off-by: Vladimir Sementsov-Ogievskiy Acked-by: Markus Armbruster Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-4-vsementsov@yandex-team.ru> --- qapi/char.json | 6 +++- include/chardev/char.h | 2 ++ chardev/char.c | 63 ++++++++++++++++++++++++++++++++++++++---- 3 files changed, 65 insertions(+), 6 deletions(-) diff --git a/qapi/char.json b/qapi/char.json index 140614f82c3..a4abafa6803 100644 --- a/qapi/char.json +++ b/qapi/char.json @@ -197,11 +197,15 @@ # @logappend: true to append instead of truncate (default to false to # truncate) # +# @logtimestamp: true to insert timestamps into logfile +# (default false) (since 11.0) +# # Since: 2.6 ## { 'struct': 'ChardevCommon', 'data': { '*logfile': 'str', - '*logappend': 'bool' } } + '*logappend': 'bool', + '*logtimestamp': 'bool' } } ## # @ChardevFile: diff --git a/include/chardev/char.h b/include/chardev/char.h index 81bc0cbdf2a..c2c42e4b7a3 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -63,6 +63,8 @@ struct Chardev { CharFrontend *fe; char *label; int logfd; + bool logtimestamp; + bool log_line_start; int be_open; /* used to coordinate the chardev-change special-case: */ bool handover_yank_instance; diff --git a/chardev/char.c b/chardev/char.c index 4b285baf029..48b326d57b9 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -82,12 +82,8 @@ void qemu_chr_be_event(Chardev *s, QEMUChrEvent event) CHARDEV_GET_CLASS(s)->chr_be_event(s, event); } -static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) +static void do_write_log(Chardev *s, const uint8_t *buf, size_t len) { - if (s->logfd < 0) { - return; - } - if (qemu_write_full(s->logfd, buf, len) < len) { /* * qemu_write_full() is defined with G_GNUC_WARN_UNUSED_RESULT, @@ -96,6 +92,55 @@ static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) } } +static void do_write_log_timestamps(Chardev *s, const uint8_t *buf, size_t len) +{ + g_autofree char *timestr = NULL; + + while (len) { + size_t i; + + if (s->log_line_start) { + if (!timestr) { + timestr = real_time_iso8601(); + } + do_write_log(s, (const uint8_t *)timestr, strlen(timestr)); + do_write_log(s, (const uint8_t *)" ", 1); + s->log_line_start = false; + } + + for (i = 0; i < len; i++) { + if (buf[i] == '\n') { + break; + } + } + + if (i == len) { + /* not found \n */ + do_write_log(s, buf, len); + return; + } + + i += 1; + do_write_log(s, buf, i); + buf += i; + len -= i; + s->log_line_start = true; + } +} + +static void qemu_chr_write_log(Chardev *s, const uint8_t *buf, size_t len) +{ + if (s->logfd < 0) { + return; + } + + if (s->logtimestamp) { + do_write_log_timestamps(s, buf, len); + } else { + do_write_log(s, buf, len); + } +} + static int qemu_chr_write_buffer(Chardev *s, const uint8_t *buf, int len, int *offset, bool write_all) @@ -248,6 +293,7 @@ static bool qemu_char_open(Chardev *chr, ChardevBackend *backend, Error **errp) } else { flags |= O_TRUNC; } + chr->logtimestamp = common->has_logtimestamp && common->logtimestamp; chr->logfd = qemu_create(common->logfile, flags, 0666, errp); if (chr->logfd < 0) { return false; @@ -267,6 +313,7 @@ static void char_init(Object *obj) chr->handover_yank_instance = false; chr->logfd = -1; + chr->log_line_start = true; qemu_mutex_init(&chr->chr_write_lock); /* @@ -505,6 +552,9 @@ void qemu_chr_parse_common(QemuOpts *opts, ChardevCommon *backend) backend->logfile = g_strdup(logfile); backend->has_logappend = true; backend->logappend = qemu_opt_get_bool(opts, "logappend", false); + + backend->has_logtimestamp = true; + backend->logtimestamp = qemu_opt_get_bool(opts, "logtimestamp", false); } static const ChardevClass *char_get_class(const char *driver, Error **errp) @@ -956,6 +1006,9 @@ QemuOptsList qemu_chardev_opts = { },{ .name = "logappend", .type = QEMU_OPT_BOOL, + },{ + .name = "logtimestamp", + .type = QEMU_OPT_BOOL, },{ .name = "mouse", .type = QEMU_OPT_BOOL, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:57:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:57:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230509.1536012 (Exim 4.92) (envelope-from ) id 1vqpvy-0000TG-Cd; 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s=mimecast20190719; t=1770976234; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VbW6jTOEG9iYTux9Gled281r+tDrauM450W3fBHk0XQ=; b=LQUAgaWEVACgPTWW6ZrzeGB0CI0sE9XLv3E/JaHctbxq3Zu7ZpveyGVW6vx8SKLegoJsJN Y3+JaGwt1K1nYQ0FxlrStNyvSOK9T0jiJS1J64/mn0bXGcuHUcTUDohfmftHJXEu6mQ1an ASeU3K/SIQbRz2l8zI+bL5Bo07/rBZk= X-MC-Unique: _JVeCy1lOY-Y9S-Du_iKbw-1 X-Mimecast-MFC-AGG-ID: _JVeCy1lOY-Y9S-Du_iKbw_1770976229 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault Subject: [PULL v2 15/15] baum: Add copy/paste bindings Date: Fri, 13 Feb 2026 10:49:34 +0100 Message-ID: <20260213094938.4074478-16-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: tvSfgGXtg1qXtVBXDKvuIhJHVaF6d_cPunGplMYsK7s_1770976229 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Samuel Thibault Brltty interprets - TL1 (i.e. Display1) + routing as clip new - TL2 (i.e. Display2) + routing as clip add - TR1 (i.e. Display4) + routing as copy line - TR2 (i.e. Display5) + routing as copy rect https://github.com/brltty/brltty/blob/master/Tables/Input/bm/routing6.kti - BAUM_TL1+BAUM_TL2+BAUM_TL3+BAUM_TR1 (i.e. Display1+Display2+Display3+Display4) as paste https://github.com/brltty/brltty/blob/master/Tables/Input/bm/d6.kti Signed-off-by: Samuel Thibault [ Marc-André - style fixes ] Signed-off-by: Marc-André Lureau Message-ID: <20260213000551.2446777-1-samuel.thibault@ens-lyon.org> --- chardev/baum.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/chardev/baum.c b/chardev/baum.c index 1219963656b..ac1e535ba8e 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -1,7 +1,7 @@ /* * QEMU Baum Braille Device * - * Copyright (c) 2008, 2010-2011, 2016-2017 Samuel Thibault + * Copyright (c) 2008, 2010-2011, 2016-2017, 2026 Samuel Thibault * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -561,9 +561,38 @@ static void baum_chr_read(void *opaque) case BRLAPI_KEY_TYPE_CMD: switch (code & BRLAPI_KEY_CMD_BLK_MASK) { case BRLAPI_KEY_CMD_ROUTE: - baum_send_key(baum, BAUM_RSP_RoutingKey, (code & BRLAPI_KEY_CMD_ARG_MASK)+1); + baum_send_key(baum, BAUM_RSP_RoutingKey, + (code & BRLAPI_KEY_CMD_ARG_MASK) + 1); baum_send_key(baum, BAUM_RSP_RoutingKey, 0); break; + case BRLAPI_KEY_CMD_CLIP_NEW: + baum_send_key(baum, BAUM_RSP_TopKeys, BAUM_TL1); + baum_send_key(baum, BAUM_RSP_RoutingKey, + (code & BRLAPI_KEY_CMD_ARG_MASK) + 1); + baum_send_key(baum, BAUM_RSP_RoutingKey, 0); + baum_send_key(baum, BAUM_RSP_TopKeys, 0); + break; + case BRLAPI_KEY_CMD_CLIP_ADD: + baum_send_key(baum, BAUM_RSP_TopKeys, BAUM_TL2); + baum_send_key(baum, BAUM_RSP_RoutingKey, + (code & BRLAPI_KEY_CMD_ARG_MASK) + 1); + baum_send_key(baum, BAUM_RSP_RoutingKey, 0); + baum_send_key(baum, BAUM_RSP_TopKeys, 0); + break; + case BRLAPI_KEY_CMD_COPY_LINE: + baum_send_key(baum, BAUM_RSP_TopKeys, BAUM_TR1); + baum_send_key(baum, BAUM_RSP_RoutingKey, + (code & BRLAPI_KEY_CMD_ARG_MASK) + 1); + baum_send_key(baum, BAUM_RSP_RoutingKey, 0); + baum_send_key(baum, BAUM_RSP_TopKeys, 0); + break; + case BRLAPI_KEY_CMD_COPY_RECT: + baum_send_key(baum, BAUM_RSP_TopKeys, BAUM_TR2); + baum_send_key(baum, BAUM_RSP_RoutingKey, + (code & BRLAPI_KEY_CMD_ARG_MASK) + 1); + baum_send_key(baum, BAUM_RSP_RoutingKey, 0); + baum_send_key(baum, BAUM_RSP_TopKeys, 0); + break; case 0: switch (code & BRLAPI_KEY_CMD_ARG_MASK) { case BRLAPI_KEY_CMD_FWINLT: @@ -606,6 +635,11 @@ static void baum_chr_read(void *opaque) baum_send_key(baum, BAUM_RSP_TopKeys, BAUM_TL1|BAUM_TL3|BAUM_TR1); baum_send_key(baum, BAUM_RSP_TopKeys, 0); break; + case BRLAPI_KEY_CMD_PASTE: + baum_send_key(baum, BAUM_RSP_TopKeys, + BAUM_TL1 | BAUM_TL2 | BAUM_TL3 | BAUM_TR1); + baum_send_key(baum, BAUM_RSP_TopKeys, 0); + break; } } break; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:58:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:58:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230530.1536021 (Exim 4.92) (envelope-from ) id 1vqpwC-0001IE-OR; Fri, 13 Feb 2026 09:58:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230530.1536021; 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s=mimecast20190719; t=1770976229; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jM55cKZhaLYd8jeB1eDli6p7CvLSuDmkHDqz2KhxR1g=; b=h3UVB8tNDRf3MDzi1oenT3Bo/ty4GP17r+RukgshcugBaqH39+Km2wG2s6+iZjETgYjzJt /tzQ7q6+jkmk6AK4EJQqg28LgNzo0sG0cqtPoii4z2r/Mhz8xxXTWaspdRS7Jsl4BifNeg Sr/HTvy4HW4nmWOpCkCdNXwKDy4qLgc= X-MC-Unique: HKw9Op8PPjWopkCu_sg3xA-1 X-Mimecast-MFC-AGG-ID: HKw9Op8PPjWopkCu_sg3xA_1770976224 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 13/15] error-report: make real_time_iso8601() public Date: Fri, 13 Feb 2026 10:49:32 +0100 Message-ID: <20260213094938.4074478-14-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-MFC-PROC-ID: OzU2S9aB7JYJK05V94Oazw0IKUz2EC_qwiyZ9FVDBgo_1770976224 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy To be reused in the following commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Markus Armbruster Reviewed-by: Marc-André Lureau Message-ID: <20260201173633.413934-3-vsementsov@yandex-team.ru> --- include/qemu/error-report.h | 6 ++++++ util/error-report.c | 3 +-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/qemu/error-report.h b/include/qemu/error-report.h index 3ae2357fda5..dc423d36071 100644 --- a/include/qemu/error-report.h +++ b/include/qemu/error-report.h @@ -74,4 +74,10 @@ extern bool message_with_timestamp; extern bool error_with_guestname; extern const char *error_guest_name; +/* + * Return current datetime in ISO 8601 format. + * Caller is responsible to g_free() the returned string. + */ +char *real_time_iso8601(void); + #endif diff --git a/util/error-report.c b/util/error-report.c index 1b17c11de19..d6b7448183a 100644 --- a/util/error-report.c +++ b/util/error-report.c @@ -169,8 +169,7 @@ static void print_loc(void) } } -static char * -real_time_iso8601(void) +char *real_time_iso8601(void) { g_autoptr(GDateTime) dt = g_date_time_new_now_utc(); return g_date_time_format_iso8601(dt); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 09:58:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 09:58:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230534.1536027 (Exim 4.92) (envelope-from ) id 1vqpwD-0001Lb-3H; Fri, 13 Feb 2026 09:58:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230534.1536027; Fri, 13 Feb 2026 09:58:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpwC-0001LR-U1; Fri, 13 Feb 2026 09:58:12 +0000 Received: by outflank-mailman (input) for mailman id 1230534; Fri, 13 Feb 2026 09:58:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqpoe-0001Ng-BA for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 09:50:24 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 67d2588b-08c1-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 10:50:20 +0100 (CET) Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-6-E-7BdYCROJiGwt4vzl-fbA-1; Fri, 13 Feb 2026 04:50:14 -0500 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2FB631800464; Fri, 13 Feb 2026 09:50:13 +0000 (UTC) Received: from localhost (unknown [10.44.22.41]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 6388D1955D85; Fri, 13 Feb 2026 09:50:12 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 67d2588b-08c1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770976218; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F4BORkMGuDDVLyTEyiaLb3JWHa0y/2ix01bD3RCQTgw=; b=DTB/f11JvDAW32jwY28HpFQyy+21UoulcgB9WG0rEc/QFndGjCjYs4Nk5vanqwFQ7epUQj gjtAUDFE1LOYr1JFOYD0JtcaSdOPNEqENrFqSelB3VetKv8MPKPZfV0R8JkiYiDhKWN7bx vWQ7K/cuxr7dM5slo6TY1nzkBNj3+hc= X-MC-Unique: E-7BdYCROJiGwt4vzl-fbA-1 X-Mimecast-MFC-AGG-ID: E-7BdYCROJiGwt4vzl-fbA_1770976213 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E. Iglesias" , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault , Vladimir Sementsov-Ogievskiy Subject: [PULL v2 09/15] chardev: introduce .chr_get_pty_name() handler Date: Fri, 13 Feb 2026 10:49:28 +0100 Message-ID: <20260213094938.4074478-10-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: 34Cjv_Tjie3G1IaRWUbtSM_r3DMCdcPR6JsVfEzKp6M_1770976213 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Vladimir Sementsov-Ogievskiy Currently we do two wrong things: 1. Abuse s->filename to get pty_name from it 2. Violate layering with help of CHARDEV_IS_PTY() Let's get rid of both, and introduce correct way to get pty name in generic code, if available. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Marc-André Lureau Message-Id: <20260115144606.233252-9-vsementsov@yandex-team.ru> --- include/chardev/char.h | 7 +++++-- chardev/char-pty.c | 7 +++++++ chardev/char.c | 19 +++++++++++++------ hw/char/xen_console.c | 7 ++++--- 4 files changed, 29 insertions(+), 11 deletions(-) diff --git a/include/chardev/char.h b/include/chardev/char.h index e1bf97222b8..ada5529fa6c 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -247,8 +247,6 @@ OBJECT_DECLARE_TYPE(Chardev, ChardevClass, CHARDEV) #define CHARDEV_IS_RINGBUF(chr) \ object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_RINGBUF) -#define CHARDEV_IS_PTY(chr) \ - object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_PTY) struct ChardevClass { ObjectClass parent_class; @@ -308,6 +306,9 @@ struct ChardevClass { void (*chr_be_event)(Chardev *s, QEMUChrEvent event); void (*chr_listener_cleanup)(Chardev *chr); + + /* return PTY name if available */ + char *(*chr_get_pty_name)(Chardev *s); }; Chardev *qemu_chardev_new(const char *id, const char *typename, @@ -322,4 +323,6 @@ GSource *qemu_chr_timeout_add_ms(Chardev *chr, guint ms, void suspend_mux_open(void); void resume_mux_open(void); +char *qemu_chr_get_pty_name(Chardev *chr); + #endif diff --git a/chardev/char-pty.c b/chardev/char-pty.c index a582aa7bc73..047aade09e5 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -387,6 +387,12 @@ static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp) pty->path = g_strdup(path); } +static char *pty_chr_get_pty_name(Chardev *chr) +{ + PtyChardev *s = PTY_CHARDEV(chr); + return g_strdup(s->pty_name); +} + static void char_pty_class_init(ObjectClass *oc, const void *data) { ChardevClass *cc = CHARDEV_CLASS(oc); @@ -396,6 +402,7 @@ static void char_pty_class_init(ObjectClass *oc, const void *data) cc->chr_write = pty_chr_write; cc->chr_update_read_handler = pty_chr_update_read_handler; cc->chr_add_watch = pty_chr_add_watch; + cc->chr_get_pty_name = pty_chr_get_pty_name; } static const TypeInfo char_pty_type_info = { diff --git a/chardev/char.c b/chardev/char.c index 44bfed36272..0dc792b88f7 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -1090,9 +1090,7 @@ ChardevReturn *qmp_chardev_add(const char *id, ChardevBackend *backend, } ret = g_new0(ChardevReturn, 1); - if (CHARDEV_IS_PTY(chr)) { - ret->pty = g_strdup(chr->filename + 4); - } + ret->pty = qemu_chr_get_pty_name(chr); return ret; @@ -1101,6 +1099,17 @@ err: return NULL; } +char *qemu_chr_get_pty_name(Chardev *chr) +{ + ChardevClass *cc = CHARDEV_GET_CLASS(chr); + + if (cc->chr_get_pty_name) { + return cc->chr_get_pty_name(chr); + } + + return NULL; +} + ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, Error **errp) { @@ -1192,9 +1201,7 @@ ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, object_unref(OBJECT(chr_new)); ret = g_new0(ChardevReturn, 1); - if (CHARDEV_IS_PTY(chr_new)) { - ret->pty = g_strdup(chr_new->filename + 4); - } + ret->pty = qemu_chr_get_pty_name(chr_new); return ret; } diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c index 8ee098d9ad4..bdeb76dc870 100644 --- a/hw/char/xen_console.c +++ b/hw/char/xen_console.c @@ -418,6 +418,7 @@ static void xen_console_realize(XenDevice *xendev, Error **errp) XenConsole *con = XEN_CONSOLE_DEVICE(xendev); Chardev *cs = qemu_chr_fe_get_driver(&con->chr); unsigned int u; + g_autofree char *pty_name = NULL; if (!cs) { error_setg(errp, "no backing character device"); @@ -450,9 +451,9 @@ static void xen_console_realize(XenDevice *xendev, Error **errp) trace_xen_console_realize(con->dev, object_get_typename(OBJECT(cs))); - if (CHARDEV_IS_PTY(cs)) { - /* Strip the leading 'pty:' */ - xen_device_frontend_printf(xendev, "tty", "%s", cs->filename + 4); + pty_name = qemu_chr_get_pty_name(cs); + if (pty_name) { + xen_device_frontend_printf(xendev, "tty", "%s", pty_name); } /* No normal PV driver initialization for the primary console under Xen */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 10:11:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 10:11:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230571.1536041 (Exim 4.92) (envelope-from ) id 1vqq8f-0006G6-42; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1VzUvyQrkS+9GL5G+uJgbx7nwRmY7OXeNNdOA7DeFmgN7R3kEkpKn71LYEwFaJXy8jbMEUv7eZgp2E/+8MgiZMs2Jonhyq9ubUXhOJaNp4iTWux2hMGqcPwNvZrfGxSLT7FK6hPl5Oc3EsFlcFb8zpw9EWXG1XUkRXRPpMsOpAJ9ySPocyUwOfrEg0XaJPjGp52H880St/r8ev/Nh3KhouBtu+0vYKbhZL9jrIDZD8dYra29xQimbJnzagHQgfbjkKBlPyTf2nFifWgG7E6by95WJV9P0Sl0xkoN5E4Cd3MyIfSnZJ7E/QrfItE9Xfsbg5JLHu7L8Cvasu9/GS7D2V6ilcohhKjoOhL2l4ISnbkz+kqAuaBGeeC1YubkC+oRP9pwkss/7Rpz3xY/5SYsAnzirsnDbZURgv0QgpEWWo57kuAv6OeT4huiI53aq//M X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 10:10:56.5736 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3fbf2ec1-d3e5-43b2-2b05-08de6ae82dc6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9700 On Fri Feb 13, 2026 at 9:12 AM CET, Jan Beulich wrote: > On 12.02.2026 19:29, Alejandro Vallejo wrote: >> On Wed Jan 28, 2026 at 3:35 PM CET, Jason Andryuk wrote: >>> On 2025-04-01 06:58, Jan Beulich wrote: >>>> Leverage the new infrastructure in xen/linkage.h to also switch to per= - >>>> function sections (when configured), deriving the specific name from t= he >>>> "base" section in use at the time FUNC() is invoked. >>>> >>>> Signed-off-by: Jan Beulich >>>> Tested-by: Luca Fancellu # arm >>=20 >> I don't seem to have the original patch in my inbox, so I'll just answer= here. >>=20 >> About the assembly modifications on the exception entry points: >>=20 >> With split sections the linker is free to reorder all of them as it sees= fit, >> which probably means we want int3 after every jump to prevent straight-l= ine >> speculation from allocating an XSA number for us. It's possible the link= er might >> inject them, but it might also not. Better to err on the side of caution= . > > We're lacking such INT3 elsewhere, hence why this is the topic of separat= e > (existing) work. Maybe so, but split sections changes things qualitatively in that now you d= on't really know what's after the exception entry point. Previously, if the CPU = was to speculate ahead in most exception they'd eventually hit the spec mitigat= ions of entry_DF before being able to reach anywhere truly dangerous. entry_PF's straight line led to the mitigations too. Same with NMI... Having them all in separate sections shuffled at the linker's will is way t= oo dangerous, IMO. We clearly need individual function markers for livepatchin= g, but section-wise it's fine to put everything that can't possibly be GCd in = a single section. > See how, for example, we're also not using -mharden-sls=3Dall. Hmm. I can see how -mharden-sls=3Dall might impact perf in places we don't = want, but surely -mharden-sls=3Dreturn can only be good? > See e.g. [1] for a very old posting. Even in my outbox I can't find newer > postings covering more stuff. Intermediately some of this was posted to > security@ only, but there clearly was the plan to have all of this in pub= lic. Thanks for the context. That'd address the speculation problem, but we'd still suffer branches in avoidable places. It'd be nice to have a general means preventing dangerous SLS, but that's largely orthogonal to the new challenges that arise with split sections, I think. > >> Though more generally, I'd just keep all exception entry points in the s= ame >> section. They'd never get GC'ed anyway and we're paying an extra branch = in the >> #PF path for no reason. > > Inserting a branch there was, iirc, asked for by someone independent of t= his > work. But yes, suppressing too fine grained section splits is an option. My .02 is that splitting that which cannot be GCd serves no purpose and increases the cognitive burden of an already very complex system. > > Jan > > [1] https://lists.xenproject.org/archives/html/xen-devel/2020-11/msg01542= .html Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Fri Feb 13 10:19:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 10:19:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230583.1536051 (Exim 4.92) (envelope-from ) id 1vqqGo-0007km-SJ; Fri, 13 Feb 2026 10:19:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230583.1536051; Fri, 13 Feb 2026 10:19:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqqGo-0007kf-PX; Fri, 13 Feb 2026 10:19:30 +0000 Received: by outflank-mailman (input) for mailman id 1230583; Fri, 13 Feb 2026 10:19:29 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqqGn-0007kZ-Lj for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 10:19:29 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vqqGn-006pK4-1D; Fri, 13 Feb 2026 10:19:29 +0000 Received: from [2a01:e0a:1da:8420:b77:bd5:6e45:7633] (helo=l14..) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vqqGm-006GRm-21; Fri, 13 Feb 2026 10:19:29 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version: Message-ID:Date:Subject:Cc:To:From; bh=OhxTuNBvsGrgpoOFLyTruEhn44xNVgI26+k4zgLjXkY=; b=FgvMcaimOz4vE30mQvOjjCy6Nc ShP407LFcKYVvP2V6G2owEdvIT8P6w/Z3AUlKJ3o7Ql91TuBH1f1MbYPGyOfhS10EI2hJlMj2fZfy V1ifsbM+9EaqfHpgpFhgN55hndCHji+/uXiwJBUTlFkF/bxTqvlLKbLIeA6dIeb4cT4k=; From: Anthony PERARD To: xen-devel@lists.xenproject.org Cc: Anthony PERARD , Doug Goldstein , Stefano Stabellini Subject: [XEN PATCH] CI: Remove `brctl` from Arch Linux container Date: Fri, 13 Feb 2026 11:19:21 +0100 Message-ID: <20260213101921.61888-1-anthony@xenproject.org> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Anthony PERARD Package "bridge-utils" have been removed from the official repos, it contained `brctl`. That utility is used by network hotplug scripts, but they already check if it is available and switch to use "iproute2" (`ip`) when not. Signed-off-by: Anthony PERARD --- automation/build/archlinux/current.dockerfile | 1 - 1 file changed, 1 deletion(-) diff --git a/automation/build/archlinux/current.dockerfile b/automation/build/archlinux/current.dockerfile index 4e53c835fa..a257027772 100644 --- a/automation/build/archlinux/current.dockerfile +++ b/automation/build/archlinux/current.dockerfile @@ -6,7 +6,6 @@ LABEL maintainer.name="The Xen Project" \ RUN pacman-key --init RUN pacman -S --refresh --sysupgrade --noconfirm --noprogressbar --needed \ - bridge-utils \ bzip2 \ cpio \ discount \ -- Anthony PERARD From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:12:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:12:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230622.1536062 (Exim 4.92) (envelope-from ) id 1vqr65-0004hK-Of; Fri, 13 Feb 2026 11:12:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230622.1536062; Fri, 13 Feb 2026 11:12:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqr65-0004hD-L2; Fri, 13 Feb 2026 11:12:29 +0000 Received: by outflank-mailman (input) for mailman id 1230622; Fri, 13 Feb 2026 11:12:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqr64-0004h7-26 for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 11:12:28 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e109eed8-08cc-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 12:12:27 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b8f8f2106f1so103416566b.2 for ; Fri, 13 Feb 2026 03:12:26 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5b:2f01:4042:c03:ce4d:a5a1? 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: "Andrew J . Bennieston" , xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------rmAWL2OMeeZDohi0r3FMp00n" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------rmAWL2OMeeZDohi0r3FMp00n Content-Type: multipart/mixed; boundary="------------fzXF7bXgc7rK1nb40SukhLSf"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Ziyi Guo , Wei Liu , Paul Durrant , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: "Andrew J . Bennieston" , xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Message-ID: <02459674-58f9-407c-b151-39374a6cf81a@suse.com> Subject: Re: [PATCH net] xen-netback: reject zero-queue configuration from guest References: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> In-Reply-To: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> --------------fzXF7bXgc7rK1nb40SukhLSf Content-Type: multipart/mixed; boundary="------------oPkhdrcLI3DudRxu4wTLSAHY" --------------oPkhdrcLI3DudRxu4wTLSAHY Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMTIuMDIuMjYgMjM6NDAsIFppeWkgR3VvIHdyb3RlOg0KPiBBIG1hbGljaW91cyBvciBi dWdneSBYZW4gZ3Vlc3QgY2FuIHdyaXRlICIwIiB0byB0aGUgeGVuYnVzIGtleQ0KPiAibXVs dGktcXVldWUtbnVtLXF1ZXVlcyIuIFRoZSBjb25uZWN0KCkgZnVuY3Rpb24gaW4gdGhlIGJh Y2tlbmQgb25seQ0KPiB2YWxpZGF0ZXMgdGhlIHVwcGVyIGJvdW5kIChyZXF1ZXN0ZWRfbnVt X3F1ZXVlcyA+IHhlbnZpZl9tYXhfcXVldWVzKQ0KPiBidXQgbm90IHplcm8sIGFsbG93aW5n IHJlcXVlc3RlZF9udW1fcXVldWVzPTAgdG8gcmVhY2gNCj4gdnphbGxvYyhhcnJheV9zaXpl KDAsIHNpemVvZihzdHJ1Y3QgeGVudmlmX3F1ZXVlKSkpLCB3aGljaCB0cmlnZ2Vycw0KPiBX QVJOX09OX09OQ0UoIXNpemUpIGluIF9fdm1hbGxvY19ub2RlX3JhbmdlKCkuDQo+IA0KPiBP biBzeXN0ZW1zIHdpdGggcGFuaWNfb25fd2Fybj0xLCB0aGlzIGFsbG93cyBhIGd1ZXN0LXRv LWhvc3QgZGVuaWFsDQo+IG9mIHNlcnZpY2UuDQo+IA0KPiBUaGUgWGVuIG5ldHdvcmsgaW50 ZXJmYWNlIHNwZWNpZmljYXRpb24gcmVxdWlyZXMNCj4gdGhlIHF1ZXVlIGNvdW50IHRvIGJl ICJncmVhdGVyIHRoYW4gemVybyIuDQo+IA0KPiBBZGQgYSB6ZXJvIGNoZWNrIHRvIG1hdGNo IHRoZSB2YWxpZGF0aW9uIGFscmVhZHkgcHJlc2VudA0KPiBpbiB4ZW4tYmxrYmFjaywgd2hp Y2ggaGFzIGluY2x1ZGVkIHRoaXMNCj4gZ3VhcmQgc2luY2UgaXRzIG11bHRpLXF1ZXVlIHN1 cHBvcnQgd2FzIGFkZGVkLg0KPiANCj4gRml4ZXM6IDhkM2Q1M2IzZTQzMyAoInhlbi1uZXRi YWNrOiBBZGQgc3VwcG9ydCBmb3IgbXVsdGlwbGUgcXVldWVzIikNCj4gU2lnbmVkLW9mZi1i eTogWml5aSBHdW8gPG43bDhtNEB1Lm5vcnRod2VzdGVybi5lZHU+DQoNClJldmlld2VkLWJ5 OiBKdWVyZ2VuIEdyb3NzIDxqZ3Jvc3NAc3VzZS5jb20+DQoNCg0KSnVlcmdlbg0K --------------oPkhdrcLI3DudRxu4wTLSAHY Content-Type: application/pgp-keys; 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Fri, 13 Feb 2026 03:36:36 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Fri, 13 Feb 2026 13:36:25 +0200 X-Gm-Features: AZwV_QhZbu1_s2_uBAxrZJ4m0u6FTsZie8gSw-eJfjm7NKqnTFcavWWjyl6yqII Message-ID: Subject: Re: [RFC PATCH 00/19] GICv4 Support for Xen To: Bertrand Marquis Cc: Mykyta Poturai , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Mykyta, Thank you for this patch series. I'll go through it and follow up with comments shortly. On Tue, Feb 3, 2026 at 12:02=E2=80=AFPM Bertrand Marquis wrote: > > Hi Mykyta, > > We have a number of series from you which have not been merged yet and > reviewing them all in parallel might be challenging. > > Would you mind giving us a status and maybe priorities on them. > > I could list the following series: > - GICv4 > - CPU Hotplug on arm > - PCI enumeration on arm > - IPMMU for pci on arm > - dom0less for pci passthrough on arm > - SR-IOV for pvh > - SMMU for pci on arm > - MSI injection on arm > - suspend to ram on arm > > There might be others feel free to complete the list. > > On GICv4... > > > On 2 Feb 2026, at 17:14, Mykyta Poturai wrote= : > > > > This series introduces GICv4 direct LPI injection for Xen. > > > > Direct LPI injection relies on the GIC tracking the mapping between phy= sical and > > virtual CPUs. Each VCPU requires a VPE that is created and registered w= ith the > > GIC via the `VMAPP` ITS command. The GIC is then informed of the curren= t > > VPE-to-PCPU placement by programming `VPENDBASER` and `VPROPBASER` in t= he > > appropriate redistributor. LPIs are associated with VPEs through the `V= MAPTI` > > ITS command, after which the GIC handles delivery without trapping into= the > > hypervisor for each interrupt. > > > > When a VPE is not scheduled but has pending interrupts, the GIC raises = a per-VPE > > doorbell LPI. Doorbells are owned by the hypervisor and prompt reschedu= ling so > > the VPE can drain its pending LPIs. > > > > Because GICv4 lacks a native doorbell invalidation mechanism, this seri= es > > includes a helper that invalidates doorbell LPIs via synthetic =E2=80= =9Cproxy=E2=80=9D devices, > > following the approach used until GICv4.1. > > > > All of this work is mostly based on the work of Penny Zheng > > and Luca Fancellu . And al= so from > > Linux patches by Mark Zyngier. > > > > Some patches are still a little rough and need some styling fixes and m= ore > > testing, as all of them needed to be carved line by line from a giant ~= 4000 line > > patch. This RFC is directed mostly to get a general idea if the propose= d > > approach is suitable and OK with everyone. And there is still an open q= uestion > > of how to handle Signed-off-by lines for Penny and Luca, since they hav= e not > > indicated their preference yet. > > I would like to ask how much performance benefits you could > have with this. > Adding GICv4 support is adding a lot of code which will have to be mainta= ined > and tested and there should be a good improvement to justify this. > > Did you do some benchmarks ? what are the results ? One more benchmarking note (and rationale): for meaningful performance testing it may be necessary to disable WFI trapping (boot Xen with `vwfi=3Dnative`). If WFI is trapped, each guest idle instruction causes a VM-exit, and Xen typically deschedules the vCPU. This makes the vCPU become "non-resident" more often, so subsequent wakeups (e.g. vSGI/vLPI) tend to go through a slower host-mediated path (waking the vCPU thread via the scheduler and performing extra state transitions) instead of letting th= e hardware wake and deliver to a running guest quickly. For this reason it may be worth conditionally recommending (or even auto-selecting) `vwfi=3Dnative` when direct injection is enabled for a vCPU, so measurements reflect the actual delivery fast-path rather than exit/scheduling overhead. --- One more suggestion: it may be worth adding this as a small patch in the series (or at least documenting it prominently). When direct injection is enabled for a vCPU, trapping WFI can skew both behaviour and benchmarks by pushing the vCPU into a "non-resident" state more often and forcing wakeups to go through the host/scheduler path. A conditional recommendation (or even auto-selecting `vwfi=3Dnative` in that mode) would help keep the fast-path measurable and predictable. Best regards, Mykola > > At the time where we started to work on that at Arm, we ended up in the c= onclusion > that the complexity in Xen compared to the benefit was not justifying it = hence why > this work was stopped in favor of other features that we thought would be= more > beneficial to Xen (like PCI passthrough or SMMUv3)> > Cheers > Bertrand > From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230653.1536081 (Exim 4.92) (envelope-from ) id 1vqrU0-0001i1-OQ; Fri, 13 Feb 2026 11:37:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230653.1536081; Fri, 13 Feb 2026 11:37:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrU0-0001hu-Lh; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4d4f8e32-550c-467a-1a23-08de6af43637 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Feb 2026 11:37:04.6804 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fgnW42zm1c5rxDMBuiGTXvPpyYX1N0Mj+SjZtGFiSnZwjL30WFnC6pjda2nY8V7JRJC4cKZQwa+yoOITF/5sadn9K4EwYIgCukk8/P8g3L0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7615 According to the "7.1 Return Codes" section of DEN0028 [1] INVALID_PARAMETER code (-3) is returned when one of the call parameters has a non-supported value. Adding this error code to the common smccc header file. [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6 Signed-off-by: Oleksii Moisieiev --- xen/arch/arm/include/asm/smccc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/sm= ccc.h index 441b3ab65d..478444fb09 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -381,6 +381,7 @@ void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs = *args, 0x3FFF) =20 /* SMCCC error codes */ +#define ARM_SMCCC_INVALID_PARAMETER (-3) #define ARM_SMCCC_NOT_REQUIRED (-2) #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1) #define ARM_SMCCC_NOT_SUPPORTED (-1) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230654.1536089 (Exim 4.92) (envelope-from ) id 1vqrU1-0001lb-4E; Fri, 13 Feb 2026 11:37:13 +0000 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The generic prototypes live in io.h so other architectures can provide their own implementations. These helpers handle alignment safely by using ordered byte accesses for any leading/trailing unaligned bytes and ordered 32-bit accesses for the aligned bulk transfer. Using the ordered `readb/readl` and `writeb/writel` accessors avoids unintended endianness conversion while respecting device ordering requirements on ARM32/ARM64 hardware that may not support 64-bit MMIO atomically. The interface lives in the generic header so other architectures can provide their own implementations (as macros or functions). The ARM implementation is placed under `arch/arm/lib/` (mirroring the x86 reference layout) and is split into separate compilation units added via the architecture-specific lib Makefile. Signed-off-by: Oleksii Moisieiev --- Changes in v10: - removed extra include in memcpy-{to/from}io.c files Changes in v9: - reword commit description to refer to memcpy_fromio and memcpy_toio - ordering obj-y in Makefile - rename ALL_LIBS to ARCH_LIBS - drop io.h and move definitions to the common header, fix comments to be arch neutral - update comments for memcpy_{from/to}io implementation Changes in v8: - switched to ordered accessors to address the ordering and barrier concerns. - updated the documentation to match the implementation and explicitly state the supported access sizes and granularity. - rename memcpy_* implementation files to memcpu-* to follow naming convension - fix indentation to match Xen style - fix intendation to match Xen style - move memcpy-{from/to}io to more convenient library place Changes in v7: - x86 guidance: removed the speculative note; header now just says each arch supplies its own implementation or macro. - name spacing: dropped the double-underscore; the helpers are now memcpy_fromio / memcpy_toio. The header also explicitly allows an arch to define these as macros before including it. - updated io.c to keep 32-bit transfers safe on arm32 - moved to __raw_read*/__raw_write* accessors to avoid endianness conversio= n. - split the helpers into separate compilation units Changes in v6: - sorted objs in Makefile alhabetically - added newline at the end of Makefile - used uint{N}_t intead of u{N} - add comment about why 32 bit IO operations were used - updated cast opertaions to avoid dropping constness which is wrong - move function definitions to generic place so the could be reused by other arch - add SPDX tag to io.c Changes in v5: - move memcpy_toio/fromio to the generic place xen/arch/arm/Makefile | 1 + xen/arch/arm/arch.mk | 1 + xen/arch/arm/lib/Makefile | 2 ++ xen/arch/arm/lib/memcpy-fromio.c | 55 ++++++++++++++++++++++++++++++++ xen/arch/arm/lib/memcpy-toio.c | 55 ++++++++++++++++++++++++++++++++ xen/include/xen/io.h | 10 ++++++ 6 files changed, 124 insertions(+) create mode 100644 xen/arch/arm/lib/Makefile create mode 100644 xen/arch/arm/lib/memcpy-fromio.c create mode 100644 xen/arch/arm/lib/memcpy-toio.c diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 7494a0f926..5b8e170e01 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -8,6 +8,7 @@ ifneq ($(CONFIG_NO_PLAT),y) obj-y +=3D platforms/ endif obj-y +=3D firmware/ +obj-y +=3D lib/ obj-$(CONFIG_TEE) +=3D tee/ obj-$(CONFIG_HAS_VPCI) +=3D vpci.o =20 diff --git a/xen/arch/arm/arch.mk b/xen/arch/arm/arch.mk index dea8dbd18a..009bb22c45 100644 --- a/xen/arch/arm/arch.mk +++ b/xen/arch/arm/arch.mk @@ -2,6 +2,7 @@ # arm-specific definitions =20 ARCH_LIBS-y +=3D arch/arm/$(ARCH)/lib/lib.a +ARCH_LIBS-y +=3D arch/arm/lib/lib.a =20 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) diff --git a/xen/arch/arm/lib/Makefile b/xen/arch/arm/lib/Makefile new file mode 100644 index 0000000000..07a0d9186c --- /dev/null +++ b/xen/arch/arm/lib/Makefile @@ -0,0 +1,2 @@ +lib-y +=3D memcpy-fromio.o +lib-y +=3D memcpy-toio.o diff --git a/xen/arch/arm/lib/memcpy-fromio.c b/xen/arch/arm/lib/memcpy-fro= mio.c new file mode 100644 index 0000000000..3b27ab2949 --- /dev/null +++ b/xen/arch/arm/lib/memcpy-fromio.c @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +/* + * Arm implementation notes / limitations: + * - Uses ordered 8-bit for leading/trailing unaligned bytes and ordered + * 32-bit accesses for the aligned bulk; no wider accesses are issued. + * - Only suitable for devices that tolerate 8-bit and 32-bit accesses; + * do not use with devices requiring strictly 16-bit or 64-bit accesses. + * - MMIO must be mapped with appropriate device attributes to preserve + * ordering; no extra barriers beyond the ordered accessors are added. + * - If source or destination is misaligned, leading bytes are copied + * byte-by-byte until both sides are 32-bit aligned, then bulk copy uses + * 32-bit accesses. + */ + +void memcpy_fromio(void *to, const volatile void __iomem *from, + size_t count) +{ + while ( count && (!IS_ALIGNED((unsigned long)from, 4) || + !IS_ALIGNED((unsigned long)to, 4)) ) + { + *(uint8_t *)to =3D readb(from); + from++; + to++; + count--; + } + + while ( count >=3D 4 ) + { + *(uint32_t *)to =3D readl(from); + from +=3D 4; + to +=3D 4; + count -=3D 4; + } + + while ( count ) + { + *(uint8_t *)to =3D readb(from); + from++; + to++; + count--; + } +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 8 + * tab-width: 8 + * indent-tabs-mode: t + * End: + */ diff --git a/xen/arch/arm/lib/memcpy-toio.c b/xen/arch/arm/lib/memcpy-toio.= c new file mode 100644 index 0000000000..a6ad08b805 --- /dev/null +++ b/xen/arch/arm/lib/memcpy-toio.c @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +/* + * Arm implementation notes / limitations: + * - Uses ordered 8-bit for leading/trailing unaligned bytes and ordered + * 32-bit accesses for the aligned bulk; no wider accesses are issued. + * - Only suitable for devices that tolerate 8-bit and 32-bit accesses; + * do not use with devices requiring strictly 16-bit or 64-bit accesses. + * - MMIO must be mapped with appropriate device attributes to preserve + * ordering; no extra barriers beyond the ordered accessors are added. + * - If source or destination is misaligned, leading bytes are copied + * byte-by-byte until both sides are 32-bit aligned, then bulk copy uses + * 32-bit accesses. + */ + +void memcpy_toio(volatile void __iomem *to, const void *from, + size_t count) +{ + while ( count && (!IS_ALIGNED((unsigned long)to, 4) || + !IS_ALIGNED((unsigned long)from, 4)) ) + { + writeb(*(const uint8_t *)from, to); + from++; + to++; + count--; + } + + while ( count >=3D 4 ) + { + writel(*(const uint32_t *)from, to); + from +=3D 4; + to +=3D 4; + count -=3D 4; + } + + while ( count ) + { + writeb(*(const uint8_t *)from, to); + from++; + to++; + count--; + } +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 8 + * tab-width: 8 + * indent-tabs-mode: t + * End: + */ diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h index 164a20c5d7..1bb164b6ef 100644 --- a/xen/include/xen/io.h +++ b/xen/include/xen/io.h @@ -67,4 +67,14 @@ static inline bool write_mmio(volatile void __iomem *mem= , unsigned long data, return true; } =20 +/* + * Copy between regular memory and MMIO space. Implementations are + * architecture-specific and must use appropriate MMIO accessors for + * their memory and I/O models. + */ +void memcpy_fromio(void *to, const volatile void __iomem *from, + size_t count); +void memcpy_toio(volatile void __iomem *to, const void *from, + size_t count); + #endif /* XEN_IO_H */ --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230656.1536112 (Exim 4.92) (envelope-from ) id 1vqrU4-0002RX-3e; Fri, 13 Feb 2026 11:37:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230656.1536112; Fri, 13 Feb 2026 11:37:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrU3-0002RM-VY; Fri, 13 Feb 2026 11:37:15 +0000 Received: by outflank-mailman (input) for mailman id 1230656; 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Fri, 13 Feb 2026 11:37:05 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 560a2eeb-08d0-11f1-b163-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=sI/T76UX96QdVshTpxVLgYmfDQGXvCrbyyxB/PYK/pzwcbSTGV8MsBhc6PKqSznIfE2delNrmNcjnLkFktVXBotpDdOin3DmSEQaVaDL6WcMcCHYHqjlykEchrCPY+MMbrOdq7+y+7CIXGzVZAnELS8CR6T7ziZTdiVuAksshNF0OKeqPQc1GVwretbcQKCwpL6/ZLdlCfgz7JopwyYgHBYPd8S8BjW49pZVFZWY7biTICTAMrhegAnH2E6i2vaYR72alueCEIhgsvHy7yGBrr9Y+GBu/lHrgOkimc4LDtpOgv8BphP82fYPUWvZ+gdQkUlCFsqH2ZSOKw7R1xZ9vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8a494df7-fe33-402d-81ea-08de6af436bc X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Feb 2026 11:37:05.5210 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DtyLhkcK01ROSJepZ1ZZJhrF/weZ0OEN2R3eC9Z4xxFFm6ysDwaTV8uJfVPONuXAEuEYHEdo0c41iTAMUnBa51XuwJKQlgb74y1oZprnW8I= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7615 This patch introduces SCI driver to support for ARM EL3 Trusted Firmware-A (TF-A) which provides SCMI interface with multi-agent support, as shown below. +-----------------------------------------+ | | | EL3 TF-A SCMI | +-------+--+-------+--+-------+--+-------++ |shmem1 | |shmem0 | |shmem2 | |shmemX | +-----+-+ +---+---+ +--+----+ +---+---+ smc-id1 | | | | agent1 | | | | +-----v--------+---------+-----------+----+ | | | | | | | | | | +--------------+---------+-----------+----+ smc-id0 | smc-id2| smc-idX| agent0 | agent2 | agentX | | | | +----v---+ +--v-----+ +--v-----+ | | | | | | | Dom0 | | Dom1 | | DomX | | | | | | | | | | | | | +--------+ +--------+ +--------+ The EL3 SCMI multi-agent firmware is expected to provide SCMI SMC shared memory transport for every Agent in the system. The SCMI Agent transport channel defined by pair: - smc-id: SMC id used for Doorbell - shmem: shared memory for messages transfer, Xen page aligned. Shared memort is mapped with the following flags: MT_DEVICE_nGnRE. The follwoing SCMI Agents are expected to be defined by SCMI FW to enable S= CMI multi-agent functionality under Xen: - Xen management agent: trusted agents that accesses to the Base Protocol commands to configure agent specific permissions - OSPM VM agents: non-trusted agent, one for each Guest domain which is allowed direct HW access. At least one OSPM VM agent has to be provided by FW if HW is handled only by Dom0 or Driver Domain. The EL3 SCMI FW is expected to implement following Base protocol messages: - BASE_DISCOVER_AGENT (optional if agent_id was provided) - BASE_RESET_AGENT_CONFIGURATION (optional) - BASE_SET_DEVICE_PERMISSIONS (optional) The SCI SCMI SMC multi-agent driver implements following functionality: - The driver is initialized from the Xen SCMI container ``xen_scmi_config`` (compatible ``xen,sci``) placed under ``/chosen/xen``. Only the ``arm,scmi-smc`` node that is a child of this container will bind to Xen; other SCMI nodes (for example under ``/firmware``) are ignored to avoid stealing the host OSPM instance. scmi_shm_1: sram@47ff1000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff1000 0x0 0x1000>; }; scmi_xen: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000003>; <--- Xen management agent smc-id #address-cells =3D < 1>; #size-cells =3D < 0>; #access-controller-cells =3D < 1>; shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem }; - The driver obtains Xen specific SCMI Agent's configuration from the Host DT, probes Agents and builds SCMI Agents list. The Agents configuration is taken from "scmi-secondary-agents" property where first item is "arm,smc-id", second - "arm,scmi-shmem" phandle and third is optional "agent_id": / { chosen { xen { ranges; xen_scmi_config { compatible =3D "xen,sci"; #address-cells =3D <2>; #size-cells =3D <2>; ranges; scmi_shm_0: sram@47ff0000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff0000 0x0 0x1000>; }; /* Xen SCMI management channel */ scmi_shm_1: sram@47ff1000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff1000 0x0 0x1000>; }; scmi_shm_2: sram@47ff2000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff2000 0x0 0x1000>; }; scmi_shm_3: sram@47ff3000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff3000 0x0 0x1000>; }; scmi-secondary-agents =3D < 0x82000002 &scmi_shm_0 0 0x82000004 &scmi_shm_2 2 0x82000005 &scmi_shm_3 3>; <--- func_id, shmem, agent_id #scmi-secondary-agents-cells =3D <3>; xen,dom0-sci-agent-id =3D <0>; scmi_xen: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000003>; <--- Xen management agent func_id #address-cells =3D <1>; #size-cells =3D <0>; #access-controller-cells =3D <1>; shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem }; }; }; }; }; / { /* * Host SCMI OSPM channel - provided to the Dom0 as is if SCMI * enabled for it, ignored by Xen multi-agent mediator */ scmi_shm: sram@47ff0000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff0000 0x0 0x1000>; }; firmware { scmi: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000002>; <--- Host OSPM agent smc-id #address-cells =3D < 1>; #size-cells =3D < 0>; shmem =3D <&scmi_shm>; <--- Host OSPM agent shmem protocol@X{ }; }; }; }; This approach allows defining multiple SCMI Agents by adding Xen-specific properties under the ``/chosen`` node to the Host Device Tree, leaving the main part unchanged. The Host DT SCMI channel will be passed to Dom0. The Xen management agent is described as a ``scmi_xen`` node under the ``xen,sci`` comaptible node, which is used by Xen to control other SCMI Agents in the system. All secondary agents' configurations are provided in the ``scmi-secondary-agents`` property with an optional ``agent_id`` field. The ``agent_id`` from the ``scmi-secondary-agents`` property is used to identify the agent in the system and can be omitted by setting ``#scmi-secondary-agents-cells =3D <2>``, so the Secondary Agents configuration will look like this: / { chosen { xen { xen_scmi_config { compatible =3D "xen,sci"; #address-cells =3D <2>; #size-cells =3D <2>; ranges; /* Shared memory nodes as defined earlier */ scmi-secondary-agents =3D < 0x82000003 &scmi_shm_0 0x82000004 &scmi_shm_2 0x82000005 &scmi_shm_3 0x82000006 &scmi_shm_4>; #scmi-secondary-agents-cells =3D <2>; }; }; }; } In this case, Xen will use the ``SCMI_BASE_DISCOVER_AGENT`` call to discover the ``agent_id`` for each secondary agent. Providing the ``agent_id`` in the ``scmi-secondary-agents`` property allows skipping the discovery call, which is useful when the secondary agent's shared memory is not accessible by Xen or when boot time is important because it allows skipping the agent discovery procedure. Note that Xen is the only one entry in the system which need to know about SCMI multi-agent support. SMC ID Configuration and SCMI Connection Compatibility: The configuration allows the same device tree to work for both baremetal Linux and Linux Dom0. This is achieved because: - Baremetal Linux uses: func_id 0x82000002, scmi-shmem 0x47ff0000 - Dom0 Linux uses: func_id 0x82000002, scmi-shmem 0x47ff0000 - Xen management uses: func_id 0x82000003, scmi-shmem 0x47ff1000 This works because the privileged SCMI connection in EL3 firmware is not tied exclusively to func_id 0x82000002. The EL3 firmware supports multiple SCMI agents with different SMC IDs and shared memory regions. Each agent (Dom0 via 0x82000002, Xen via 0x82000003, other domains via additional func_ids) has an independent communication channel to the firmware. The key distinction is that Xen's management channel (0x82000003) is used for privileged operations like agent configuration and device permissions (BASE_SET_DEVICE_PERMISSIONS, BASE_RESET_AGENT_CONFIGURATION), while Dom0's channel (0x82000002) is used for standard SCMI protocol operations (power, clock, sensor management, etc.). The firmware enforces different permission levels for each agent based on their agent_id, not the SMC ID. Therefore, there is no conflict: Linux Dom0 retains its standard SCMI connection for hardware management, while Xen uses its separate privileged channel for mediating access between multiple domains. - It implements the SCI subsystem interface required for configuring and enabling SCMI functionality for Dom0/hwdom and Guest domains. To enable SCMI functionality for domain it has to be configured with unique supported SCMI Agent_id and use corresponding SCMI SMC shared memory transport [smc-id, shmem] defined for this SCMI Agent_id. - Once Xen domain is configured it can communicate with EL3 SCMI FW: -- zero-copy, the guest domain puts SCMI message in shmem; -- the guest triggers SMC exception with smc-id (doorbell); -- the Xen driver catches exception, do checks and synchronously forwards it to EL3 FW. - the Xen driver sends BASE_RESET_AGENT_CONFIGURATION message to Xen management agent channel on domain destroy event. This allows to reset resources used by domain and so implement use-case like domain reboot. Dom0 Enable SCMI SMC: - set xen,dom0-sci-agent-id=3D under the xen,sci container in the Host DT. If the property is absent, SCMI is disabled for Dom0 and all SCMI nodes are removed from the Dom0 DT. The driver updates the Dom0 DT SCMI node "arm,smc-id" value and fixes up the shmem node according to the assigned agent_id. - pass dom0=3Dsci-agent-id=3D in Xen command line. if not provid= ed SCMI will be disabled for Dom0 and all SCMI nodes removed from Dom0 DT. The driver updates Dom0 DT SCMI node "arm,smc-id" value and fix up shmem node according to assigned agent_id. Guest domains enable SCMI SMC: - xl.cfg: add configuration option as below arm_sci =3D "type=3Dscmi_smc_multiagent,agent_id=3D2" - xl.cfg: enable access to the "arm,scmi-shmem" which should correspond assigned agent_id for the domain, for example: iomem =3D [ "47ff2,1@22001", ] - DT: add SCMI nodes to the Driver domain partial device tree as in the below example. The "arm,smc-id" should correspond assigned agent_id for the domain: passthrough { scmi_shm_0: sram@22001000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x22001000 0x0 0x1000>; }; firmware { compatible =3D "simple-bus"; scmi: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000004>; shmem =3D <&scmi_shm_0>; ... } } } SCMI "4.2.1.1 Device specific access control" The XEN SCI SCMI SMC multi-agent driver performs "access-controller" provider function in case EL3 SCMI FW implements SCMI "4.2.1.1 Device specific access control" and provides the BASE_SET_DEVICE_PERMISSIONS command to configure the devices that an agents have access to. The DT SCMI node should "#access-controller-cells=3D<1>" property and DT devices should be bound to the Xen SCMI. &i2c1 { access-controllers =3D <&scmi 0>; }; The Dom0 and dom0less domains DT devices will be processed automatically through sci_assign_dt_device() call, but to assign SCMI devices from toolstack the xl.cfg:"dtdev" property shall be used: dtdev =3D [ "/soc/i2c@e6508000", ] xl.cfg:dtdev will contain all nodes which are under SCMI management (not only those which are behind IOMMU). Additionally, this patch adds documentation for the pre-existing scmi-smc-passthrough command line option, which was previously undocumented. [0] https://developer.arm.com/documentation/den0056 [1] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/= tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml [2] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/= tree/Documentation/devicetree/bindings/access-controllers/access-controller= s.yaml Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v10: - Fix tabs in MAINTAINERS file - remove duplicate SPDX tag from scmi-shmem.c - add cast to ARM_SMCCC_INVALID_PARAMETER to settle the sign since ARM_SMCCC_INVALID_PARAMETER is -3 which is part of the spec and resp is the default smccc call structure. - update free_channel_list. Add spinlock to avoid race condition and a comment with a description of the function work - preserve error of smc_create_channel in scmi_probe - check scmi shmem address alignment as wel as it is done for size - check for d->arch.sci_data !=3D NULL in scmi_handle_call - use SCMI_SHMEM_MAPPED size for iomem_permit_access - change len type to unsigned in shmem_{get|put}_message - rename shmem_channel_is_free to shmem_channel_status - add comment about skipping message status when getting message response - Set correct agent_id ranges for dom0less and a toolstack. Agent_id 0 is not binded for dom0 so can be reused. Also mentioned that UINT8_MAX (255) is treated as invalid agent_id. - Split hypervisor and toolstack changes into separate commits - move init list and spin init after initial checks in probe call - fix typo in comments - clean resources when sci_register returns an error. Changes in v9: - sort and refactor MAINTAINERS enties - remove Spurious changes - add extra check to avoid ASSERT when calling unmap_channel_memory from assign device method - set correct tx flag to SCMI_BASE_AGENT_PERMISSIONS_RESET when freeing resources. Flag should be set to 1 according to the section 4.2.2.12 [0]. - fix dt node copmaring - moved channel->shmem check from ASSERT in unmap_memory_channel to "if" statement. This will prevent firing ASSERT if unmap_channel_memory was called twice on the same channel. Changes in v8: - update xen_scmi func_id in commit description - updated documentation with the new DT format - updated opt_dom0_scmi_agent_id setting to avoid it to be equal SCMI_AGENT_ID_INVALID. - changed SCMI_AGENT_ID_INVALID from 0xff to UINT8_MAX which makes code more clear showing that UINT8_MAX is theated like invalid agent_id and couldn't be used. Also excluded SCMI_AGENT_ID_INVALID from acceptable value range - remove outdated xen,config property ignore, added xen,sci compatible to skip_matches in handle_node - add documentation for pre-existing scmi-smc-passthrough command line option in alphabetically correct location (in 's' section) - add note to commit description about documentation for previously undocumented scmi-smc-passthrough - Fix SMC IDs in DT examples (Xen management uses 0x82000003, Dom0 uses 0x8= 2000002) - Add explicit note explaining why Dom0 and Xen channels do not conflict - Document dom0less multi-agent configuration example (xen,sci_type / xen,s= ci-agent-id) - Add scmi_xen node to agent-discovery example with #scmi-secondary-agents-= cells =3D 2 - Drop dom0=3Dsci-agent-id command line handling; Dom0 SCMI is now enabled = via xen,dom0-sci-agent-id in the xen,sci DT container - Refresh docs and examples to mention the DT property instead of the cmdli= ne option Changes in v7: - rework scmi nodes for xen to match on compatible string instead of the direct path Changes in v6: - updated scmi-shmem to use io.h from generic location - update scmi_agent_id parameter to be provided inside dom0=3D parameter list and have the following format "dom0=3Dsci-agent-id=3D0" This change was done as a response for Stefano comment and requires a lot of code changes, but produces much cleaner solution that's why I've added it to the code. - fix file comments and return codes - fix lenght checks in shmem_{get,put}_message to use offsetof - remove len member from scmi_channel structure as it is not used - set scmi-secondary-agents property to be mandatory since if no secondary agents were provided then there is no sence to enable scmi when no secondary agents are populated to the Domains - update documentation in booting.txt, added xen_scmi node to the example - adjust d->arch.sci_enabled value in scmi_domain_destroy - fix lock management in smc_create_channel call - avoid extra map_channel_memory command for Xen management channel because collect_agent_id call unmaps memory if DOMID_XEN is not set. So for Xen management channel we can init domain_id ad DOMID_XEN before calling collect_agent_id so memory shouldn't be unmapped. Changes in v5: - fix device-tree example format in booting.txt, added ";" after "}". - update define in scmi-proto.h - update define in scmi-shmem.h file - scmi_assign_device - do not ignore -EOPNOTSUPP return code of the do_smc_xfer - remove overwriting agent_channel->agent_id after SCMI_BASE_DISCOVER_AGENT call - add multi-agent files to the MAINTAINERS - add SCMI multi-agent description to the SUPPORT.md - handle ARM_SMCCC_INVALID_PARAMETER return code and return -EINVAL for smc call - updated collect_agents function. Set agent_id parameter as optional in scmi-secondary-agents device-tree property - introduce "#scmi-secondary-agents-cells" parameter to set if agent_id was provided - reanme xen,scmi-secondary-agents property to scmi-secondary-agents - move memcpu_toio/fromio for the generic place - update Xen to get management channel from /chosen/xen,config node - get hypervisor channnel from node instead of using hardcoded - update handling scmi and shmem nodes for the domain - Set multi-agent driver to support only Arm64 Changes in v4: - toolstack comments from Anthony PERARD - added dom0less support - added doc for "xen,scmi-secondary-agents" MAINTAINERS | 1 + SUPPORT.md | 11 + docs/misc/arm/device-tree/booting.txt | 197 +++++ xen/arch/arm/dom0less-build.c | 11 + xen/arch/arm/domain_build.c | 39 + xen/arch/arm/firmware/Kconfig | 12 + xen/arch/arm/firmware/Makefile | 1 + xen/arch/arm/firmware/scmi-proto.h | 164 ++++ xen/arch/arm/firmware/scmi-shmem.c | 118 +++ xen/arch/arm/firmware/scmi-shmem.h | 45 ++ xen/arch/arm/firmware/scmi-smc-multiagent.c | 830 ++++++++++++++++++++ xen/include/public/arch-arm.h | 3 + 12 files changed, 1432 insertions(+) create mode 100644 xen/arch/arm/firmware/scmi-proto.h create mode 100644 xen/arch/arm/firmware/scmi-shmem.c create mode 100644 xen/arch/arm/firmware/scmi-shmem.h create mode 100644 xen/arch/arm/firmware/scmi-smc-multiagent.c diff --git a/MAINTAINERS b/MAINTAINERS index bf00be928c..def49c327e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -529,6 +529,7 @@ SCI MEDIATORS R: Oleksii Moisieiev S: Supported F: xen/arch/arm/firmware/sci.c +F: xen/arch/arm/firmware/scmi-*.[ch] F: xen/arch/arm/include/asm/firmware/sci.h =20 SEABIOS UPSTREAM diff --git a/SUPPORT.md b/SUPPORT.md index d441bccf37..03e3985da2 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -956,6 +956,17 @@ by hwdom. Some platforms use SCMI for access to system= -level resources. =20 Status: Supported =20 +### Arm: SCMI SMC multi-agent support + +Enable support for the multi-agent configuration of the EL3 Firmware, whic= h +allows Xen to provide an SCMI interface to the Domains. +Xen manages access permissions to the HW resources and provides an SCMI in= terface +to the Domains. Each Domain is represented as a separate Agent, which can +communicate with EL3 Firmware using a dedicated shared memory region, and +notifications are passed through by Xen. + + Status, ARM64: Tech Preview + ### ARM: Guest PSCI support =20 Emulated PSCI interface exposed to guests. We support all mandatory diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-t= ree/booting.txt index 977b428608..f0d1c458c9 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,21 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. =20 + - "scmi_smc_multiagent" + + Enables ARM SCMI SMC multi-agent support for the guest by enabling SCM= I over + SMC calls forwarding from domain to the EL3 firmware (like ARM + Trusted Firmware-A) with a multi SCMI OSPM agent support. + The SCMI agent_id should be specified for the guest with "xen,sci-agen= t-id" + property. + +- "xen,sci-agent-id" + + Specifies ARM SCMI agent id for the guest. This option is mandatory if= the + SCMI SMC "scmi_smc_multiagent" support is enabled for the guest. The a= gent ids + of guest must be unique and in the range [0..254]. UINT8_MAX (255) is + treated as invalid. + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. =20 @@ -824,3 +839,185 @@ The automatically allocated static shared memory will= get mapped at 0x80000000 in DomU1 guest physical address space, and at 0x90000000 in Dom= U2 guest physical address space. DomU1 is explicitly defined as the owner dom= ain, and DomU2 is the borrower domain. + +SCMI SMC multi-agent support +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D + +For enabling the ARM SCMI SMC multi-agent support (enabled by CONFIG_SCMI_= SMC_MA) +the Xen specific SCMI Agent's configuration shall be provided in the Host = DT +according to the SCMI compliant EL3 Firmware specification with ARM SMC/HV= C +transport. The SCMI configuration must live under the Xen SCMI container +"xen,sci" beneath "/chosen" (for example "/chosen/xen/xen_scmi_config/scmi= "). The +Xen SCMI mediator will bind only to the "arm,scmi-smc" node that is a chil= d of +this "xen,sci" container; any other "arm,scmi-smc" nodes (for example unde= r +"/firmware") are ignored to avoid stealing the host's SCMI OSPM instance. + +- scmi-secondary-agents + + Defines a set of SCMI agents configuration supported by SCMI EL3 FW an= d + available for Xen. Each Agent defined as triple consisting of: + SMC/HVC function_id assigned for the agent transport ("arm,smc-id"), + phandle to SCMI SHM assigned for the agent transport ("arm,scmi-shmem"= ), + SCMI agent_id (optional) if not set - Xen will determine Agent ID for + each provided channel using BASE_DISCOVER_AGENT message. + +- xen,dom0-sci-agent-id + + Optional. Specifies the Dom0/hwdom SCMI agent_id inside the ``xen,sci`= ` + container. When provided, Dom0 will be configured for SCMI multi-agent + support; when omitted, SCMI remains disabled for Dom0. The value must + match the ``func_id`` and shmem pairing that EL3 firmware exposes for + Dom0 (for example via ``/firmware/scmi``). + +As an example: + +/ { + chosen { + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + scmi_shm_0: sram@47ff0000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff0000 0x0 0x1000>; + }; + + /* Xen SCMI management channel */ + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + scmi_shm_2: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + + scmi_shm_3: sram@47ff3000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff3000 0x0 0x1000>; + }; + + xen,dom0-sci-agent-id =3D <0>; <--- dom0 agent id + scmi-secondary-agents =3D < + 0x82000002 &scmi_shm_0 0 + 0x82000004 &scmi_shm_2 2 + 0x82000005 &scmi_shm_3 3>; <--- func_id, shmem, agent_= id + #scmi-secondary-agents-cells =3D <3>; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; <--- Xen management agent= func_id + #address-cells =3D <1>; + #size-cells =3D <0>; + #access-controller-cells =3D <1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shm= em + }; + }; + }; + }; +}; + +Note: This example keeps the Host DT unchanged for Dom0 and baremetal Linu= x +by using func_id 0x82000002 / shmem 0x47ff0000 for Dom0, while Xen uses a +separate privileged channel func_id 0x82000003 / shmem 0x47ff1000. EL3 +firmware enforces permissions per agent_id, so there is no conflict betwee= n +Dom0 and Xen channels. + +- #scmi-secondary-agents-cells + + Defines whether Agent_id is set in the "scmi-secondary-agents" propert= y. + Possible values are: 2, 3. + When set to 3 (the default), expect agent_id to be present in the seco= ndary + agents list. + When set to 2, agent_id will be discovered for each channel using + BASE_DISCOVER_AGENT message. + + +Example: + +/ { + chosen { + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* Shared memory nodes as in the previous example */ + + scmi-secondary-agents =3D < + 0x82000002 &scmi_shm_0 + 0x82000004 &scmi_shm_2 + 0x82000005 &scmi_shm_3 + 0x82000006 &scmi_shm_4>; + #scmi-secondary-agents-cells =3D <2>; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; <--- Xen management agent= func_id + #address-cells =3D <1>; + #size-cells =3D <0>; + #access-controller-cells =3D <1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shm= em + }; + }; + }; + }; +}; + +Dom0less example (multi-agent) +------------------------------- + +Below is a minimal dom0less configuration showing how to enable SCMI SMC +multi-agent for a pre-defined guest domain using xen,sci_type and +xen,sci-agent-id, together with the Xen SCMI container: + +chosen { + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* Xen management channel shared memory */ + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + scmi_shm_domu: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + + scmi-secondary-agents =3D < + 0x82000004 &scmi_shm_domu 2>; + #scmi-secondary-agents-cells =3D <3>; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; + #address-cells =3D <1>; + #size-cells =3D <0>; + #access-controller-cells =3D <1>; + shmem =3D <&scmi_shm_1>; + }; + }; + }; + + xen,domain@1 { + compatible =3D "xen,domain"; + xen,sci_type =3D "scmi_smc_multiagent"; + xen,sci-agent-id =3D <2>; + /* Additional domain properties (memory, cpus, kernels, etc.) */ + }; +}; diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c10538..1f8c1d851d 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -299,6 +299,17 @@ static int __init domu_dt_sci_parse(struct dt_device_n= ode *node, d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE; else if ( !strcmp(sci_type, "scmi_smc") ) d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; + else if ( !strcmp(sci_type, "scmi_smc_multiagent") ) + { + uint32_t agent_id =3D 0; + + if ( !dt_property_read_u32(node, "xen,sci-agent-id", &agent_id) || + agent_id >=3D UINT8_MAX ) + return -EINVAL; + + d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA= ; + d_cfg->arch.arm_sci_agent_id =3D agent_id; + } else { printk(XENLOG_ERR "xen,sci_type in not valid (%s) for domain %s\n"= , diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 986a456f17..c09f50040e 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -86,6 +86,37 @@ int __init parse_arch_dom0_param(const char *s, const ch= ar *e) return -EINVAL; } =20 +/* SCMI agent ID for dom0 obtained from xen,sci container */ +#define SCMI_AGENT_ID_INVALID UINT8_MAX + +static uint8_t __init get_dom0_scmi_agent_id(void) +{ + const struct dt_device_node *config_node; + u32 val; + const struct dt_property *prop; + + config_node =3D dt_find_compatible_node(NULL, NULL, "xen,sci"); + if ( !config_node ) + return SCMI_AGENT_ID_INVALID; + + prop =3D dt_find_property(config_node, "xen,dom0-sci-agent-id", NULL); + if ( !prop ) + return SCMI_AGENT_ID_INVALID; + + if ( !dt_property_read_u32(config_node, "xen,dom0-sci-agent-id", &val)= ) + return SCMI_AGENT_ID_INVALID; + + if ( val >=3D SCMI_AGENT_ID_INVALID ) + { + printk(XENLOG_WARNING + "Invalid xen,dom0-sci-agent-id=3D%u, SCMI disabled for Dom0\n= ", + val); + return SCMI_AGENT_ID_INVALID; + } + + return val; +} + /* Override macros from asm/page.h to make them work with mfn_t */ #undef virt_to_mfn #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) @@ -1459,6 +1490,7 @@ static int __init handle_node(struct domain *d, struc= t kernel_info *kinfo, DT_MATCH_TYPE("memory"), /* The memory mapped timer is not supported by Xen. */ DT_MATCH_COMPATIBLE("arm,armv7-timer-mem"), + DT_MATCH_COMPATIBLE("xen,sci"), { /* sentinel */ }, }; static const struct dt_device_match timer_matches[] __initconst =3D @@ -1947,6 +1979,13 @@ void __init create_dom0(void) dom0_cfg.arch.tee_type =3D tee_get_type(); dom0_cfg.max_vcpus =3D dom0_max_vcpus(); =20 + /* Set up SCMI agent ID if provided in the xen,sci container */ + dom0_cfg.arch.arm_sci_agent_id =3D get_dom0_scmi_agent_id(); + dom0_cfg.arch.arm_sci_type =3D (dom0_cfg.arch.arm_sci_agent_id !=3D + SCMI_AGENT_ID_INVALID) ? + XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA : + XEN_DOMCTL_CONFIG_ARM_SCI_NONE; + if ( iommu_enabled ) dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu; =20 diff --git a/xen/arch/arm/firmware/Kconfig b/xen/arch/arm/firmware/Kconfig index 5c5f0880c4..972cd9b173 100644 --- a/xen/arch/arm/firmware/Kconfig +++ b/xen/arch/arm/firmware/Kconfig @@ -29,6 +29,18 @@ config SCMI_SMC driver domain. Use with EL3 firmware which supports only single SCMI OSPM agent. =20 +config SCMI_SMC_MA + bool "Enable ARM SCMI SMC multi-agent driver" + depends on ARM_64 + select ARM_SCI + help + Enables SCMI SMC/HVC multi-agent in XEN to pass SCMI requests from Doma= ins + to EL3 firmware (TF-A) which supports multi-agent feature. + This feature allows to enable SCMI per Domain using unique SCMI agent_i= d, + so Domain is identified by EL3 firmware as an SCMI Agent and can access + allowed platform resources through dedicated SMC/HVC Shared memory base= d + transport. + endchoice =20 endmenu diff --git a/xen/arch/arm/firmware/Makefile b/xen/arch/arm/firmware/Makefil= e index 71bdefc24a..37927e690e 100644 --- a/xen/arch/arm/firmware/Makefile +++ b/xen/arch/arm/firmware/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_ARM_SCI) +=3D sci.o obj-$(CONFIG_SCMI_SMC) +=3D scmi-smc.o +obj-$(CONFIG_SCMI_SMC_MA) +=3D scmi-shmem.o scmi-smc-multiagent.o diff --git a/xen/arch/arm/firmware/scmi-proto.h b/xen/arch/arm/firmware/scm= i-proto.h new file mode 100644 index 0000000000..49f63cfc0a --- /dev/null +++ b/xen/arch/arm/firmware/scmi-proto.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Arm System Control and Management Interface definitions + * Version 3.0 (DEN0056C) + * + * Copyright (c) 2025 EPAM Systems + */ + +#ifndef ARM_FIRMWARE_SCMI_PROTO_H_ +#define ARM_FIRMWARE_SCMI_PROTO_H_ + +#include + +#define SCMI_SHORT_NAME_MAX_SIZE 16 + +/* SCMI status codes. See section 4.1.4 */ +#define SCMI_SUCCESS 0 +#define SCMI_NOT_SUPPORTED (-1) +#define SCMI_INVALID_PARAMETERS (-2) +#define SCMI_DENIED (-3) +#define SCMI_NOT_FOUND (-4) +#define SCMI_OUT_OF_RANGE (-5) +#define SCMI_BUSY (-6) +#define SCMI_COMMS_ERROR (-7) +#define SCMI_GENERIC_ERROR (-8) +#define SCMI_HARDWARE_ERROR (-9) +#define SCMI_PROTOCOL_ERROR (-10) + +/* Protocol IDs */ +#define SCMI_BASE_PROTOCOL 0x10 + +/* Base protocol message IDs */ +#define SCMI_BASE_PROTOCOL_VERSION 0x0 +#define SCMI_BASE_PROTOCOL_ATTIBUTES 0x1 +#define SCMI_BASE_PROTOCOL_MESSAGE_ATTRIBUTES 0x2 +#define SCMI_BASE_DISCOVER_AGENT 0x7 +#define SCMI_BASE_SET_DEVICE_PERMISSIONS 0x9 +#define SCMI_BASE_RESET_AGENT_CONFIGURATION 0xB + +typedef struct scmi_msg_header { + uint8_t id; + uint8_t type; + uint8_t protocol; + uint32_t status; +} scmi_msg_header_t; + +/* Table 2 Message header format */ +#define SCMI_HDR_ID GENMASK(7, 0) +#define SCMI_HDR_TYPE GENMASK(9, 8) +#define SCMI_HDR_PROTO GENMASK(17, 10) + +#define SCMI_FIELD_GET(_mask, _reg) = \ + ((typeof(_mask))(((_reg) & (_mask)) >> (ffs64(_mask) - 1))) +#define SCMI_FIELD_PREP(_mask, _val) = \ + (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask)) + +static inline uint32_t pack_scmi_header(scmi_msg_header_t *hdr) +{ + return SCMI_FIELD_PREP(SCMI_HDR_ID, hdr->id) | + SCMI_FIELD_PREP(SCMI_HDR_TYPE, hdr->type) | + SCMI_FIELD_PREP(SCMI_HDR_PROTO, hdr->protocol); +} + +static inline void unpack_scmi_header(uint32_t msg_hdr, scmi_msg_header_t = *hdr) +{ + hdr->id =3D SCMI_FIELD_GET(SCMI_HDR_ID, msg_hdr); + hdr->type =3D SCMI_FIELD_GET(SCMI_HDR_TYPE, msg_hdr); + hdr->protocol =3D SCMI_FIELD_GET(SCMI_HDR_PROTO, msg_hdr); +} + +static inline int scmi_to_xen_errno(int scmi_status) +{ + if ( scmi_status =3D=3D SCMI_SUCCESS ) + return 0; + + switch ( scmi_status ) + { + case SCMI_NOT_SUPPORTED: + return -EOPNOTSUPP; + case SCMI_INVALID_PARAMETERS: + return -EINVAL; + case SCMI_DENIED: + return -EACCES; + case SCMI_NOT_FOUND: + return -ENOENT; + case SCMI_OUT_OF_RANGE: + return -ERANGE; + case SCMI_BUSY: + return -EBUSY; + case SCMI_COMMS_ERROR: + return -ENOTCONN; + case SCMI_GENERIC_ERROR: + return -EIO; + case SCMI_HARDWARE_ERROR: + return -ENXIO; + case SCMI_PROTOCOL_ERROR: + return -EBADMSG; + default: + return -EINVAL; + } +} + +/* PROTOCOL_VERSION */ +#define SCMI_VERSION_MINOR GENMASK(15, 0) +#define SCMI_VERSION_MAJOR GENMASK(31, 16) + +struct scmi_msg_prot_version_p2a { + uint32_t version; +} __packed; + +/* BASE PROTOCOL_ATTRIBUTES */ +#define SCMI_BASE_ATTR_NUM_PROTO GENMASK(7, 0) +#define SCMI_BASE_ATTR_NUM_AGENT GENMASK(15, 8) + +struct scmi_msg_base_attributes_p2a { + uint32_t attributes; +} __packed; + +/* + * BASE_DISCOVER_AGENT + */ +#define SCMI_BASE_AGENT_ID_OWN 0xFFFFFFFF + +struct scmi_msg_base_discover_agent_a2p { + uint32_t agent_id; +} __packed; + +struct scmi_msg_base_discover_agent_p2a { + uint32_t agent_id; + char name[SCMI_SHORT_NAME_MAX_SIZE]; +} __packed; + +/* + * BASE_SET_DEVICE_PERMISSIONS + */ +#define SCMI_BASE_DEVICE_ACCESS_ALLOW BIT(0, UL) + +struct scmi_msg_base_set_device_permissions_a2p { + uint32_t agent_id; + uint32_t device_id; + uint32_t flags; +} __packed; + +/* + * BASE_RESET_AGENT_CONFIGURATION + */ +#define SCMI_BASE_AGENT_PERMISSIONS_RESET BIT(0, UL) + +struct scmi_msg_base_reset_agent_cfg_a2p { + uint32_t agent_id; + uint32_t flags; +} __packed; + +#endif /* ARM_FIRMWARE_SCMI_PROTO_H_ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-shmem.c b/xen/arch/arm/firmware/scm= i-shmem.c new file mode 100644 index 0000000000..e36745a85e --- /dev/null +++ b/xen/arch/arm/firmware/scmi-shmem.c @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SMC/HVC shmem transport implementation used by + * SCI SCMI multi-agent driver. + * + * Oleksii Moisieiev + * Copyright (c) 2025 EPAM Systems + */ + +#include +#include +#include + +#include "scmi-proto.h" +#include "scmi-shmem.h" + +static inline int +shmem_channel_status(const volatile struct scmi_shared_mem __iomem *shmem) +{ + return (readl(&shmem->channel_status) & + SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE) ? 0 : -EBUSY; +} + +int shmem_put_message(volatile struct scmi_shared_mem __iomem *shmem, + scmi_msg_header_t *hdr, void *data, unsigned int len= ) +{ + int ret; + + if ( (len + offsetof(struct scmi_shared_mem, msg_payload)) > + SCMI_SHMEM_MAPPED_SIZE ) + { + printk(XENLOG_ERR "scmi: Wrong size of smc message. Data is invali= d\n"); + return -EINVAL; + } + + ret =3D shmem_channel_status(shmem); + if ( ret ) + return ret; + + writel_relaxed(0x0, &shmem->channel_status); + /* Writing 0x0 right now, but "shmem"_FLAG_INTR_ENABLED can be set */ + writel_relaxed(0x0, &shmem->flags); + writel_relaxed(sizeof(shmem->msg_header) + len, &shmem->length); + writel(pack_scmi_header(hdr), &shmem->msg_header); + + if ( len > 0 && data ) + memcpy_toio(shmem->msg_payload, data, len); + + return 0; +} + +int shmem_get_response(const volatile struct scmi_shared_mem __iomem *shme= m, + scmi_msg_header_t *hdr, void *data, unsigned int le= n) +{ + int recv_len; + int ret; + /* + * First word of msg_payload carries the returned status; exclude it f= rom + * recv_len so only the protocol payload is copied back to the caller. + */ + int pad =3D sizeof(hdr->status); + + if ( len >=3D SCMI_SHMEM_MAPPED_SIZE - + offsetof(struct scmi_shared_mem, msg_payload) ) + { + printk(XENLOG_ERR + "scmi: Wrong size of input smc message. Data may be invalid= \n"); + return -EINVAL; + } + + ret =3D shmem_channel_status(shmem); + if ( ret ) + return ret; + + recv_len =3D readl(&shmem->length) - sizeof(shmem->msg_header); + + if ( recv_len < 0 ) + { + printk(XENLOG_ERR + "scmi: Wrong size of smc message. Data may be invalid\n"); + return -EINVAL; + } + + unpack_scmi_header(readl(&shmem->msg_header), hdr); + + hdr->status =3D readl(&shmem->msg_payload); + recv_len =3D recv_len > pad ? recv_len - pad : 0; + + ret =3D scmi_to_xen_errno(hdr->status); + if ( ret ) + { + printk(XENLOG_DEBUG "scmi: Error received: %d\n", ret); + return ret; + } + + if ( recv_len > len ) + { + printk(XENLOG_ERR + "scmi: Not enough buffer for message %d, expecting %d\n", + recv_len, len); + return -EINVAL; + } + + if ( recv_len > 0 ) + memcpy_fromio(data, shmem->msg_payload + pad, recv_len); + + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-shmem.h b/xen/arch/arm/firmware/scm= i-shmem.h new file mode 100644 index 0000000000..722263aa77 --- /dev/null +++ b/xen/arch/arm/firmware/scmi-shmem.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Arm System Control and Management Interface definitions + * Version 3.0 (DEN0056C) + * Shared Memory based Transport + * + * Copyright (c) 2024 EPAM Systems + */ + +#ifndef ARM_FIRMWARE_SCMI_SHMEM_H_ +#define ARM_FIRMWARE_SCMI_SHMEM_H_ + +#include + +#define SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE BIT(0, UL) +#define SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR BIT(1, UL) + +struct scmi_shared_mem { + uint32_t reserved; + uint32_t channel_status; + uint32_t reserved1[2]; + uint32_t flags; + uint32_t length; + uint32_t msg_header; + uint8_t msg_payload[]; +}; + +#define SCMI_SHMEM_MAPPED_SIZE PAGE_SIZE + +int shmem_put_message(volatile struct scmi_shared_mem __iomem *shmem, + scmi_msg_header_t *hdr, void *data, unsigned int len= ); + +int shmem_get_response(const volatile struct scmi_shared_mem __iomem *shme= m, + scmi_msg_header_t *hdr, void *data, unsigned int le= n); +#endif /* ARM_FIRMWARE_SCMI_SHMEM_H_ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-smc-multiagent.c b/xen/arch/arm/fir= mware/scmi-smc-multiagent.c new file mode 100644 index 0000000000..113af22ec3 --- /dev/null +++ b/xen/arch/arm/firmware/scmi-smc-multiagent.c @@ -0,0 +1,830 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SCI SCMI multi-agent driver, using SMC/HVC shmem as transport. + * + * Oleksii Moisieiev + * Copyright (c) 2025 EPAM Systems + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "scmi-proto.h" +#include "scmi-shmem.h" + +#define SCMI_SECONDARY_AGENTS "scmi-secondary-agents" + +struct scmi_channel { + uint32_t agent_id; + uint32_t func_id; + domid_t domain_id; + uint64_t paddr; + struct scmi_shared_mem __iomem *shmem; + spinlock_t lock; + struct list_head list; +}; + +struct scmi_data { + struct list_head channel_list; + spinlock_t channel_list_lock; + uint32_t func_id; + bool initialized; + uint32_t shmem_phandle; + uint32_t hyp_channel_agent_id; + struct dt_device_node *dt_dev; +}; + +static struct scmi_data scmi_data; + +static bool scmi_is_under_xen_sci(const struct dt_device_node *node) +{ + const struct dt_device_node *p; + + for ( p =3D node->parent; p; p =3D p->parent ) + if ( dt_device_is_compatible(p, "xen,sci") ) + return true; + + return false; +} + +static int send_smc_message(struct scmi_channel *chan_info, + scmi_msg_header_t *hdr, void *data, int len) +{ + struct arm_smccc_res resp; + int ret; + + ret =3D shmem_put_message(chan_info->shmem, hdr, data, len); + if ( ret ) + return ret; + + arm_smccc_1_1_smc(chan_info->func_id, 0, 0, 0, 0, 0, 0, 0, &resp); + + if ( resp.a0 =3D=3D (unsigned long)ARM_SMCCC_INVALID_PARAMETER ) + return -EINVAL; + + if ( resp.a0 ) + return -EOPNOTSUPP; + + return 0; +} + +static int do_smc_xfer(struct scmi_channel *chan_info, scmi_msg_header_t *= hdr, + void *tx_data, int tx_size, void *rx_data, int rx_s= ize) +{ + int ret =3D 0; + + ASSERT(chan_info && chan_info->shmem); + + if ( !hdr ) + return -EINVAL; + + spin_lock(&chan_info->lock); + + printk(XENLOG_DEBUG + "scmi: agent_id =3D %d msg_id =3D %x type =3D %d, proto =3D %x\= n", + chan_info->agent_id, hdr->id, hdr->type, hdr->protocol); + + ret =3D send_smc_message(chan_info, hdr, tx_data, tx_size); + if ( ret ) + goto clean; + + ret =3D shmem_get_response(chan_info->shmem, hdr, rx_data, rx_size); + +clean: + printk(XENLOG_DEBUG + "scmi: get smc response agent_id =3D %d msg_id =3D %x proto =3D= %x res=3D%d\n", + chan_info->agent_id, hdr->id, hdr->protocol, ret); + + spin_unlock(&chan_info->lock); + + return ret; +} + +static struct scmi_channel *get_channel_by_id(uint32_t agent_id) +{ + struct scmi_channel *curr; + bool found =3D false; + + spin_lock(&scmi_data.channel_list_lock); + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + found =3D true; + break; + } + } + + spin_unlock(&scmi_data.channel_list_lock); + if ( found ) + return curr; + + return NULL; +} + +static struct scmi_channel *acquire_scmi_channel(struct domain *d, + uint32_t agent_id) +{ + struct scmi_channel *curr; + struct scmi_channel *ret =3D ERR_PTR(-ENOENT); + + spin_lock(&scmi_data.channel_list_lock); + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + if ( curr->domain_id !=3D DOMID_INVALID ) + { + ret =3D ERR_PTR(-EEXIST); + break; + } + + curr->domain_id =3D d->domain_id; + ret =3D curr; + break; + } + } + + spin_unlock(&scmi_data.channel_list_lock); + + return ret; +} + +static void relinquish_scmi_channel(struct scmi_channel *channel) +{ + ASSERT(channel !=3D NULL); + + spin_lock(&scmi_data.channel_list_lock); + channel->domain_id =3D DOMID_INVALID; + spin_unlock(&scmi_data.channel_list_lock); +} + +static int map_channel_memory(struct scmi_channel *channel) +{ + ASSERT(channel && channel->paddr); + channel->shmem =3D ioremap_nocache(channel->paddr, SCMI_SHMEM_MAPPED_S= IZE); + if ( !channel->shmem ) + return -ENOMEM; + + channel->shmem->channel_status =3D SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE; + printk(XENLOG_DEBUG "scmi: Got shmem %lx after vmap %p\n", channel->pa= ddr, + channel->shmem); + + return 0; +} + +static void unmap_channel_memory(struct scmi_channel *channel) +{ + ASSERT(channel); + + if ( !channel->shmem ) + return; + + iounmap(channel->shmem); + channel->shmem =3D NULL; +} + +static struct scmi_channel *smc_create_channel(uint32_t agent_id, + uint32_t func_id, uint64_t = addr) +{ + struct scmi_channel *channel, *curr; + + spin_lock(&scmi_data.channel_list_lock); + + /* Check if channel already exists while holding the lock */ + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + spin_unlock(&scmi_data.channel_list_lock); + return ERR_PTR(-EEXIST); + } + } + + channel =3D xmalloc(struct scmi_channel); + if ( !channel ) + { + spin_unlock(&scmi_data.channel_list_lock); + return ERR_PTR(-ENOMEM); + } + + spin_lock_init(&channel->lock); + channel->agent_id =3D agent_id; + channel->func_id =3D func_id; + channel->domain_id =3D DOMID_INVALID; + channel->shmem =3D NULL; + channel->paddr =3D addr; + list_add_tail(&channel->list, &scmi_data.channel_list); + + spin_unlock(&scmi_data.channel_list_lock); + return channel; +} + +static void free_channel_list(void) +{ + struct scmi_channel *curr, *_curr; + /* + * Called only on the __init error path, before any runtime users exis= t, + * so no other thread is iterating channel_list. Keep the lock for the + * whole drain for clarity and to avoid misleading readers about possi= ble + * concurrent access. + */ + spin_lock(&scmi_data.channel_list_lock); + list_for_each_entry_safe(curr, _curr, &scmi_data.channel_list, list) + { + list_del(&curr->list); + xfree(curr); + } + spin_unlock(&scmi_data.channel_list_lock); +} + +static int __init +scmi_dt_read_hyp_channel_addr(struct dt_device_node *scmi_node, u64 *addr, + u64 *size) +{ + struct dt_device_node *shmem_node; + const __be32 *prop; + + prop =3D dt_get_property(scmi_node, "shmem", NULL); + if ( !prop ) + return -EINVAL; + + shmem_node =3D dt_find_node_by_phandle(be32_to_cpu(*prop)); + if ( IS_ERR_OR_NULL(shmem_node) ) + { + printk(XENLOG_ERR + "scmi: Device tree error, can't parse reserved memory %ld\n= ", + PTR_ERR(shmem_node)); + return PTR_ERR(shmem_node); + } + + return dt_device_get_address(shmem_node, 0, addr, size); +} + +/* + * Handle Dom0 SCMI specific DT nodes + * + * Make a decision on copying SCMI specific nodes into Dom0 device tree. + * For SCMI multi-agent case: + * - shmem nodes will not be copied and generated instead if SCMI + * is enabled for Dom0 + * - scmi node will be copied if SCMI is enabled for Dom0 + */ +static bool scmi_dt_handle_node(struct domain *d, struct dt_device_node *n= ode) +{ + static const struct dt_device_match shmem_matches[] __initconst =3D { + DT_MATCH_COMPATIBLE("arm,scmi-shmem"), + { /* sentinel */ }, + }; + static const struct dt_device_match scmi_matches[] __initconst =3D { + DT_MATCH_PATH("/firmware/scmi"), + { /* sentinel */ }, + }; + + if ( !scmi_data.initialized ) + return false; + + /* skip scmi shmem node for dom0 if scmi not enabled */ + if ( dt_match_node(shmem_matches, node) && !sci_domain_is_enabled(d) ) + { + dt_dprintk(" Skip scmi shmem node\n"); + return true; + } + + /* drop scmi if not enabled */ + if ( dt_match_node(scmi_matches, node) && !sci_domain_is_enabled(d) ) + { + dt_dprintk(" Skip scmi node\n"); + return true; + } + + return false; +} + +static int scmi_assign_device(uint32_t agent_id, uint32_t device_id, + uint32_t flags) +{ + struct scmi_msg_base_set_device_permissions_a2p tx; + struct scmi_channel *channel; + scmi_msg_header_t hdr; + + channel =3D get_channel_by_id(scmi_data.hyp_channel_agent_id); + if ( !channel ) + return -EINVAL; + + hdr.id =3D SCMI_BASE_SET_DEVICE_PERMISSIONS; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + tx.agent_id =3D agent_id; + tx.device_id =3D device_id; + tx.flags =3D flags; + + return do_smc_xfer(channel, &hdr, &tx, sizeof(tx), NULL, 0); +} + +static int scmi_dt_assign_device(struct domain *d, + struct dt_phandle_args *ac_spec) +{ + struct scmi_channel *agent_channel; + uint32_t scmi_device_id =3D ac_spec->args[0]; + int ret; + + if ( !d->arch.sci_data ) + return 0; + + /* The access-controllers is specified for DT dev, but it's not a SCMI= */ + if ( !scmi_data.dt_dev || + !dt_node_path_is_equal(ac_spec->np, scmi_data.dt_dev->full_name) = ) + return 0; + + agent_channel =3D d->arch.sci_data; + + spin_lock(&agent_channel->lock); + + ret =3D scmi_assign_device(agent_channel->agent_id, scmi_device_id, + SCMI_BASE_DEVICE_ACCESS_ALLOW); + if ( ret ) + { + printk(XENLOG_ERR + "scmi: could not assign dev for %pd agent:%d dev_id:%u (%d)= ", + d, agent_channel->agent_id, scmi_device_id, ret); + } + + spin_unlock(&agent_channel->lock); + return ret; +} + +static int collect_agent_id(struct scmi_channel *agent_channel) +{ + int ret; + scmi_msg_header_t hdr; + struct scmi_msg_base_discover_agent_p2a da_rx; + struct scmi_msg_base_discover_agent_a2p da_tx; + + ret =3D map_channel_memory(agent_channel); + if ( ret ) + return ret; + + hdr.id =3D SCMI_BASE_DISCOVER_AGENT; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + da_tx.agent_id =3D agent_channel->agent_id; + + ret =3D do_smc_xfer(agent_channel, &hdr, &da_tx, sizeof(da_tx), &da_rx= , + sizeof(da_rx)); + if ( agent_channel->domain_id !=3D DOMID_XEN ) + unmap_channel_memory(agent_channel); + if ( ret ) + return ret; + + printk(XENLOG_DEBUG "id=3D0x%x name=3D%s\n", da_rx.agent_id, da_rx.nam= e); + agent_channel->agent_id =3D da_rx.agent_id; + return 0; +} + +static __init int collect_agents(struct dt_device_node *scmi_node) +{ + const struct dt_device_node *config_node; + const __be32 *prop; + uint32_t len; + const __be32 *end; + uint32_t cells_per_entry =3D 3; /* Default to 3 cells if property is a= bsent. */ + + config_node =3D dt_find_compatible_node(NULL, NULL, "xen,sci"); + if ( !config_node ) + { + printk(XENLOG_WARNING "scmi: xen,sci node not found, no agents to = collect.\n"); + return -ENOENT; + } + + /* Check for the optional '#scmi-secondary-agents-cells' property. */ + if ( dt_property_read_u32(config_node, "#scmi-secondary-agents-cells", + &cells_per_entry) ) + { + if ( cells_per_entry !=3D 2 && cells_per_entry !=3D 3 ) + { + printk(XENLOG_ERR "scmi: Invalid #scmi-secondary-agents-cells = value: %u\n", + cells_per_entry); + return -EINVAL; + } + } + + prop =3D dt_get_property(config_node, SCMI_SECONDARY_AGENTS, &len); + if ( !prop ) + { + printk(XENLOG_ERR "scmi: No %s property found, no agents to collec= t.\n", + SCMI_SECONDARY_AGENTS); + return -EINVAL; + } + + /* Validate that the property length is a multiple of the cell size. *= / + if ( len =3D=3D 0 || len % (cells_per_entry * sizeof(uint32_t)) !=3D 0= ) + { + printk(XENLOG_ERR "scmi: Invalid length of %s property: %u for %u = cells per entry\n", + SCMI_SECONDARY_AGENTS, len, cells_per_entry); + return -EINVAL; + } + + end =3D (const __be32 *)((const u8 *)prop + len); + + for ( ; prop < end; ) + { + uint32_t agent_id; + uint32_t smc_id; + uint32_t shmem_phandle; + struct dt_device_node *node; + u64 addr, size; + int ret; + struct scmi_channel *agent_channel; + + smc_id =3D be32_to_cpu(*prop++); + shmem_phandle =3D be32_to_cpu(*prop++); + + if ( cells_per_entry =3D=3D 3 ) + agent_id =3D be32_to_cpu(*prop++); + else + agent_id =3D SCMI_BASE_AGENT_ID_OWN; + + node =3D dt_find_node_by_phandle(shmem_phandle); + if ( !node ) + { + printk(XENLOG_ERR "scmi: Could not find shmem node for agent %= u\n", + agent_id); + return -EINVAL; + } + + ret =3D dt_device_get_address(node, 0, &addr, &size); + if ( ret ) + { + printk(XENLOG_ERR + "scmi: Could not read shmem address for agent %u: %d\n"= , + agent_id, ret); + return ret; + } + + if ( !IS_ALIGNED(size, SCMI_SHMEM_MAPPED_SIZE) || + !IS_ALIGNED(addr, SCMI_SHMEM_MAPPED_SIZE) ) + { + printk(XENLOG_ERR "scmi: shmem memory is not aligned\n"); + return -EINVAL; + } + + agent_channel =3D smc_create_channel(agent_id, smc_id, addr); + if ( IS_ERR(agent_channel) ) + { + printk(XENLOG_ERR "scmi: Could not create channel for agent %u= : %ld\n", + agent_id, PTR_ERR(agent_channel)); + return PTR_ERR(agent_channel); + } + + if ( cells_per_entry =3D=3D 2 ) + { + ret =3D collect_agent_id(agent_channel); + if ( ret ) + return ret; + } + + printk(XENLOG_DEBUG "scmi: Agent %u SMC %X addr %lx\n", agent_chan= nel->agent_id, + smc_id, (unsigned long)addr); + } + + return 0; +} + +static int scmi_domain_init(struct domain *d, + struct xen_domctl_createdomain *config) +{ + struct scmi_channel *channel; + int ret; + + if ( !scmi_data.initialized ) + return 0; + + /* + * SCMI support is configured via: + * - For dom0: xen,dom0-sci-agent-id property under the xen,sci contai= ner + * - For dom0less: xen,sci-agent-id in the domain node + * The config->arch.arm_sci_type and config->arch.arm_sci_agent_id + * are already set by domain_build.c or dom0less-build.c + */ + + if ( config->arch.arm_sci_type =3D=3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE ) + return 0; + + channel =3D acquire_scmi_channel(d, config->arch.arm_sci_agent_id); + if ( IS_ERR(channel) ) + { + printk(XENLOG_ERR + "scmi: Failed to acquire SCMI channel for agent_id %u: %ld\= n", + config->arch.arm_sci_agent_id, PTR_ERR(channel)); + return PTR_ERR(channel); + } + + printk(XENLOG_INFO + "scmi: Acquire channel id =3D 0x%x, domain_id =3D %d paddr =3D = 0x%lx\n", + channel->agent_id, channel->domain_id, channel->paddr); + + /* + * Dom0 (if present) needs to have an access to the guest memory range + * to satisfy iomem_access_permitted() check in XEN_DOMCTL_iomem_permi= ssion + * domctl. + */ + if ( hardware_domain && !is_hardware_domain(d) ) + { + ret =3D iomem_permit_access(hardware_domain, paddr_to_pfn(channel-= >paddr), + paddr_to_pfn(channel->paddr + + SCMI_SHMEM_MAPPED_SIZE - 1)); + if ( ret ) + goto error; + } + + d->arch.sci_data =3D channel; + d->arch.sci_enabled =3D true; + + return 0; + +error: + relinquish_scmi_channel(channel); + return ret; +} + +int scmi_domain_sanitise_config(struct xen_domctl_createdomain *config) +{ + if ( config->arch.arm_sci_type !=3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE && + config->arch.arm_sci_type !=3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC= _MA ) + { + dprintk(XENLOG_INFO, "scmi: Unsupported ARM_SCI type\n"); + return -EINVAL; + } + + return 0; +} + +static int scmi_relinquish_resources(struct domain *d) +{ + int ret; + struct scmi_channel *channel, *agent_channel; + scmi_msg_header_t hdr; + struct scmi_msg_base_reset_agent_cfg_a2p tx; + + if ( !d->arch.sci_data ) + return 0; + + agent_channel =3D d->arch.sci_data; + + spin_lock(&agent_channel->lock); + tx.agent_id =3D agent_channel->agent_id; + spin_unlock(&agent_channel->lock); + + channel =3D get_channel_by_id(scmi_data.hyp_channel_agent_id); + if ( !channel ) + { + printk(XENLOG_ERR + "scmi: Unable to get Hypervisor scmi channel for domain %d\= n", + d->domain_id); + return -EINVAL; + } + + hdr.id =3D SCMI_BASE_RESET_AGENT_CONFIGURATION; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + tx.flags =3D SCMI_BASE_AGENT_PERMISSIONS_RESET; + + ret =3D do_smc_xfer(channel, &hdr, &tx, sizeof(tx), NULL, 0); + if ( ret =3D=3D -EOPNOTSUPP ) + return 0; + + return ret; +} + +static void scmi_domain_destroy(struct domain *d) +{ + struct scmi_channel *channel; + + if ( !d->arch.sci_data ) + return; + + channel =3D d->arch.sci_data; + spin_lock(&channel->lock); + + relinquish_scmi_channel(channel); + printk(XENLOG_DEBUG "scmi: Free domain %d\n", d->domain_id); + + d->arch.sci_data =3D NULL; + d->arch.sci_enabled =3D false; + + spin_unlock(&channel->lock); +} + +static bool scmi_handle_call(struct cpu_user_regs *regs) +{ + uint32_t fid =3D (uint32_t)get_user_reg(regs, 0); + struct scmi_channel *agent_channel; + struct domain *d =3D current->domain; + struct arm_smccc_res resp; + bool res =3D false; + + if ( (!sci_domain_is_enabled(d)) || (!d->arch.sci_data) ) + return false; + + agent_channel =3D d->arch.sci_data; + spin_lock(&agent_channel->lock); + + if ( agent_channel->func_id !=3D fid ) + { + res =3D false; + goto unlock; + } + + arm_smccc_1_1_smc(fid, + get_user_reg(regs, 1), + get_user_reg(regs, 2), + get_user_reg(regs, 3), + get_user_reg(regs, 4), + get_user_reg(regs, 5), + get_user_reg(regs, 6), + get_user_reg(regs, 7), + &resp); + + set_user_reg(regs, 0, resp.a0); + set_user_reg(regs, 1, resp.a1); + set_user_reg(regs, 2, resp.a2); + set_user_reg(regs, 3, resp.a3); + res =3D true; +unlock: + spin_unlock(&agent_channel->lock); + + return res; +} + +static const struct sci_mediator_ops scmi_ops =3D { + .domain_init =3D scmi_domain_init, + .domain_destroy =3D scmi_domain_destroy, + .relinquish_resources =3D scmi_relinquish_resources, + .handle_call =3D scmi_handle_call, + .dom0_dt_handle_node =3D scmi_dt_handle_node, + .domain_sanitise_config =3D scmi_domain_sanitise_config, + .assign_dt_device =3D scmi_dt_assign_device, +}; + +static int __init scmi_check_smccc_ver(void) +{ + if ( smccc_ver < ARM_SMCCC_VERSION_1_1 ) + { + printk(XENLOG_WARNING + "scmi: No SMCCC 1.1 support, SCMI calls forwarding disabled= \n"); + return -ENOSYS; + } + + return 0; +} + +static int __init scmi_dt_hyp_channel_read(struct dt_device_node *scmi_nod= e, + struct scmi_data *scmi_data, + u64 *addr) +{ + int ret; + u64 size; + + if ( !dt_property_read_u32(scmi_node, "arm,smc-id", &scmi_data->func_i= d) ) + { + printk(XENLOG_ERR "scmi: unable to read smc-id from DT\n"); + return -ENOENT; + } + + ret =3D scmi_dt_read_hyp_channel_addr(scmi_node, addr, &size); + if ( IS_ERR_VALUE(ret) ) + return -ENOENT; + + if ( !IS_ALIGNED(size, SCMI_SHMEM_MAPPED_SIZE) ) + { + printk(XENLOG_ERR "scmi: shmem memory is not aligned\n"); + return -EINVAL; + } + + return 0; +} + +static __init int scmi_probe(struct dt_device_node *scmi_node, const void = *data) +{ + u64 addr; + int ret; + struct scmi_channel *channel; + unsigned int n_agents; + scmi_msg_header_t hdr; + struct scmi_msg_base_attributes_p2a rx; + + ASSERT(scmi_node !=3D NULL); + + /* + * Only bind to the SCMI node provided by Xen under the xen,sci contai= ner + * (e.g. /chosen/xen/xen_scmi_config/scmi). This avoids binding to fir= mware + * SCMI nodes that belong to the host OSPM and keeps the mediator scop= ed to + * Xen-provided configuration only. + */ + if ( !scmi_is_under_xen_sci(scmi_node) ) + return -ENODEV; + + if ( !acpi_disabled ) + { + printk(XENLOG_WARNING "scmi: is not supported when using ACPI\n"); + return -EINVAL; + } + + ret =3D scmi_check_smccc_ver(); + if ( ret ) + return ret; + + ret =3D scmi_dt_hyp_channel_read(scmi_node, &scmi_data, &addr); + if ( ret ) + return ret; + + INIT_LIST_HEAD(&scmi_data.channel_list); + spin_lock_init(&scmi_data.channel_list_lock); + + scmi_data.dt_dev =3D scmi_node; + + channel =3D smc_create_channel(SCMI_BASE_AGENT_ID_OWN, scmi_data.func_= id, addr); + if ( IS_ERR(channel) ) + { + ret =3D PTR_ERR(channel); + goto out; + } + + /* Mark as Xen management channel before collecting agent ID */ + channel->domain_id =3D DOMID_XEN; + + /* Request agent id for Xen management channel */ + ret =3D collect_agent_id(channel); + if ( ret ) + goto error; + + /* Save the agent id for Xen management channel */ + scmi_data.hyp_channel_agent_id =3D channel->agent_id; + + hdr.id =3D SCMI_BASE_PROTOCOL_ATTIBUTES; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + ret =3D do_smc_xfer(channel, &hdr, NULL, 0, &rx, sizeof(rx)); + if ( ret ) + goto error; + + n_agents =3D SCMI_FIELD_GET(SCMI_BASE_ATTR_NUM_AGENT, rx.attributes); + printk(XENLOG_DEBUG "scmi: Got agent count %d\n", n_agents); + ret =3D collect_agents(scmi_node); + if ( ret ) + goto error; + + ret =3D sci_register(&scmi_ops); + if ( ret ) + { + printk(XENLOG_ERR "SCMI: mediator already registered (ret =3D %d)\= n", + ret); + goto error; + } + + scmi_data.initialized =3D true; + goto out; + +error: + unmap_channel_memory(channel); + free_channel_list(); +out: + return ret; +} + +static const struct dt_device_match scmi_smc_match[] __initconst =3D { + DT_MATCH_COMPATIBLE("arm,scmi-smc"), + { /* sentinel */ }, +}; + +DT_DEVICE_START(scmi_smc_ma, "SCMI SMC MEDIATOR", DEVICE_FIRMWARE) + .dt_match =3D scmi_smc_match, + .init =3D scmi_probe, +DT_DEVICE_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index d30a288592..8f0f68544e 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -329,6 +329,7 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); =20 #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA 2 =20 struct xen_arch_domainconfig { /* IN/OUT */ @@ -355,6 +356,8 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t arm_sci_agent_id; }; #endif /* __XEN__ || __XEN_TOOLS__ */ =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230657.1536119 (Exim 4.92) (envelope-from ) id 1vqrU4-0002WM-Ne; Fri, 13 Feb 2026 11:37:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230657.1536119; Fri, 13 Feb 2026 11:37:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrU4-0002W6-Ct; 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Fri, 13 Feb 2026 11:37:06 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 574288de-08d0-11f1-b163-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=voFYj/fI+dv2/gDbLLOZU8tn0PFwxmwh6Zu6409JKMOOqkf8XY7g6sPIx/xB830kzrl2P8o9ZOlXLj+bqDWhjQzwmeED5laDmGfEuZCTxml/Ky3KChTN7td5VC8qkaMmwy1k1I9WaARPDa5BN5oY9aB5bKpKDqqj1JQmbG2cXtfNZSt1E2yUjFqm997LoDDV1yTx+nDktwmVrZabOkeo/O44NJzLKT+OhvWN5NaUJkCGt4sddlhjFCZ8p+IkzW7n6oHnZzxZZmYJapNb2ar0UtPGThMcdB9Cdy3FLi6RlyuwAlp8+TK2gwVtQoEyVczXagZHJqRMNiish1M7KG4HoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6091f36a-e073-4df0-b31b-08de6af436f9 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Feb 2026 11:37:05.8148 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ZAxnx82svNW82ONmef+8fir3LIiirSmMkEM2utTSXEoZ/s8MMqQWTM2v1DZyGxMV2cG7kxt9c0i5yJ7K5+YrFo/kq+ehnvIpjH1jZkmIoYM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7615 Plumb the SCMI SMC multi-agent type through the toolstack: - Extend libxl_arm_sci_type enumeration with scmi_smc_multiagent (value 2) - Add agent_id field to libxl_arm_sci structure for per-domain agent assign= ment - Update libxl_arm.c to translate libxl config to XEN_DOMCTL_CONFIG_ARM_SCI= _SCMI_SMC_MA and pass agent_id to the hypervisor via xen_domctl_createdomain - Add xl.cfg parsing for arm_sci=3D"type=3Dscmi_smc_multiagent,agent_id=3DN= " - Document the new xl.cfg options in xl.cfg.5.pod.in This completes the userspace side of multi-agent SCMI, allowing xl create and dom0less configurations to assign unique agent_id values to domains. Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v10: - Split hypervisor and toolstack changes into separate commits docs/man/xl.cfg.5.pod.in | 14 ++++++++++++++ tools/libs/light/libxl_arm.c | 4 ++++ tools/libs/light/libxl_types.idl | 4 +++- tools/xl/xl_parse.c | 12 ++++++++++++ 4 files changed, 33 insertions(+), 1 deletion(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index 27c455210b..e7f8af6156 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -3156,8 +3156,22 @@ single SCMI OSPM agent support. Should be used together with B Xen command line option. =20 +=3Ditem B + +Enables ARM SCMI SMC multi-agent support for the guest by enabling SCMI ov= er +SMC calls forwarding from domain to the EL3 firmware (like Trusted Firmwar= e-A) +with a multi SCMI OSPM agent support. The SCMI B should be +specified for the guest. + =3Dback =20 +=3Ditem B + +Specifies a non-zero ARM SCI agent id for the guest. This option is mandat= ory +if the SCMI SMC support is enabled for the guest. The agent ids of domains +existing on a single host must be unique and in the range [0..254]. UINT8_= MAX +(255) is treated as invalid. + =3Dback =20 =3Dback diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index e4407d6e3f..be0e6263ae 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -240,6 +240,10 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, case LIBXL_ARM_SCI_TYPE_SCMI_SMC: config->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; break; + case LIBXL_ARM_SCI_TYPE_SCMI_SMC_MULTIAGENT: + config->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_M= A; + config->arch.arm_sci_agent_id =3D d_config->b_info.arch_arm.arm_sc= i.agent_id; + break; default: LOG(ERROR, "Unknown ARM_SCI type %d", d_config->b_info.arch_arm.arm_sci.type); diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_type= s.idl index 4a958f69f4..9bfbf09145 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -554,11 +554,13 @@ libxl_sve_type =3D Enumeration("sve_type", [ =20 libxl_arm_sci_type =3D Enumeration("arm_sci_type", [ (0, "none"), - (1, "scmi_smc") + (1, "scmi_smc"), + (2, "scmi_smc_multiagent") ], init_val =3D "LIBXL_ARM_SCI_TYPE_NONE") =20 libxl_arm_sci =3D Struct("arm_sci", [ ("type", libxl_arm_sci_type), + ("agent_id", uint8) ]) =20 libxl_rdm_reserve =3D Struct("rdm_reserve", [ diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 1cc41f1bff..2f1b475022 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -1306,6 +1306,18 @@ static int parse_arm_sci_config(XLU_Config *cfg, lib= xl_arm_sci *arm_sci, } } =20 + if (MATCH_OPTION("agent_id", ptr, oparg)) { + unsigned long val =3D parse_ulong(oparg); + + if ( val >=3D UINT8_MAX ) { + fprintf(stderr, "An invalid ARM_SCI agent_id specified (%l= u). Valid range [0..254]\n", + val); + ret =3D ERROR_INVAL; + goto out; + } + arm_sci->agent_id =3D val; + } + ptr =3D strtok(NULL, ","); } =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230658.1536125 (Exim 4.92) (envelope-from ) id 1vqrU5-0002gb-DW; Fri, 13 Feb 2026 11:37:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230658.1536125; Fri, 13 Feb 2026 11:37:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrU5-0002fP-2Q; Fri, 13 Feb 2026 11:37:17 +0000 Received: by outflank-mailman (input) for mailman id 1230658; Fri, 13 Feb 2026 11:37:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrU3-0001fQ-Bg for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 774cf44d-cd65-45a6-f1e2-08de6af437a6 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Feb 2026 11:37:06.2194 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mAEbsbAH3TkxBQxENsOemDf7UzZY16PcVfwciWq7Bjvx3iwrp10gFSGdWT/nhKpF4vHIHsN+4RM5tfBCabtSyN1hvdpummEgT6dvUxWw1U0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7615 From: Grygorii Strashko Add SCI SCMI SMC multi-agent driver documentation. It includes a detailed description of the SCMI multi-agent driver. This document explains the driver's functionality, configuration, and the compilation process. The Xen SCMI multi-agent driver is designed to provide SCMI access to system resources from different domains. Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v10: - rephrase section about /firmware/scmi. Mentioned that this node is taken from Host DT and copied unmodified. - fix xen,reg address for secondary domains for Dom0less configuration Changes in v8: - update documentation to match the last DT format - fixed RST: "... code-block:: dts" -> ".. code-block:: dts" - update documentation with dom0less configuration example - update documentation with new param xen,dom0-sci-agent-id instead of the command line parameter Changes in v7: - update documentation in section of the xen_scmi configuration which is matched by "xen,sci" compatible instead of the direct path. Changes in v6: - remove all HVC mentions from the multi-agent doc - update sci-agent-id parameter description in the documentation - add missing Sign-of - minor fixes across the document Changes in v5: - rework multi-agent driver to leave Host Device-tree unmodified .../arm/firmware/arm-scmi.rst | 422 ++++++++++++++++++ 1 file changed, 422 insertions(+) diff --git a/docs/hypervisor-guide/arm/firmware/arm-scmi.rst b/docs/hypervi= sor-guide/arm/firmware/arm-scmi.rst index d9698f4e4b..8791bc665e 100644 --- a/docs/hypervisor-guide/arm/firmware/arm-scmi.rst +++ b/docs/hypervisor-guide/arm/firmware/arm-scmi.rst @@ -36,6 +36,8 @@ The below sections describe SCMI support options availabl= e for Xen. =20 | [1] `Arm SCMI `= _ | [2] `System Control and Management Interface (SCMI) bindings `_ +| [3] `Generic Domain Access Controllers bindings `_ + =20 Simple SCMI over SMC calls forwarding driver (EL3) ------------------------------------------------------ @@ -189,3 +191,423 @@ except explicitly enabling SCMI with "arm_sci" xl.cfg= option. -> xen,reg =3D <0x0 0x47ff0000 0x0 0x1000 0x0 0x22001000>; -> xen,force-assign-without-iommu; }; + +SCMI SMC multi-agent driver (EL3) +------------------------------------- + +The SCMI SMC multi-agent driver enables support for ARM EL3 Trusted Firmwa= re-A (TF-A) which +provides SCMI interface with multi-agent support, as shown below. + +:: + + +-----------------------------------------+ + | | + | EL3 TF-A SCMI | + +-------+--+-------+--+-------+--+-------++ + |shmem1 | |shmem0 | |shmem2 | |shmemX | + +-----+-+ +---+---+ +--+----+ +---+---+ + smc-id1 | | | | + agent1 | | | | + +-----v--------+---------+-----------+----+ + | | | | | + | | | | | + +--------------+---------+-----------+----+ + smc-id0 | smc-id2| smc-idX| + agent0 | agent2 | agentX | + | | | + +----v---+ +--v-----+ +--v-----+ + | | | | | | + | Dom0 | | Dom1 | | DomX | + | | | | | | + | | | | | | + +--------+ +--------+ +--------+ + +The EL3 SCMI multi-agent firmware is expected to provide SCMI SMC shared-m= emory transport +for every Agent in the system. The SCMI Agent transport channel defined by= pair: + +- smc-id: SMC function id used for Doorbell +- shmem: shared memory for messages transfer, **Xen page aligned**. + Shared memory is mapped with the following flags: MT_DEVICE_nGnRE and _P= AGE_DEVICE, indicating that this + memory is mapped as device memory. + +The following SCMI Agents are expected to be defined by SCMI FW to enable = SCMI multi-agent functionality +under Xen: + +- Xen management agent: trusted agents that accesses to the Base Protocol = commands to configure + agent specific permissions +- OSPM VM agents: non-trusted agent, one for each Guest domain which is a= llowed direct HW access. + At least one OSPM VM agent has to be provided by FW if HW is handled onl= y by Dom0 or Driver Domain. + +The EL3 SCMI FW is expected to implement following Base protocol messages: + +- BASE_DISCOVER_AGENT (optional if agent_id was provided) +- BASE_RESET_AGENT_CONFIGURATION (optional) +- BASE_SET_DEVICE_PERMISSIONS (optional) + +The number of supported SCMI agents and their transport specifications are= SCMI FW implementation +specific. + +Compiling with multi-agent support +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +To build with the SCMI SMC multi-agent driver support, enable Kconfig opti= on: + +:: + + CONFIG_SCMI_SMC_MA + + +Driver functionality +^^^^^^^^^^^^^^^^^^^^ + +The SCI SCMI SMC multi-agent driver implements following functionality: + +- The driver is initialized from the Xen SCMI container ``xen_scmi_config`= ` + under ``/chosen/xen`` (for example ``/chosen/xen/xen_scmi_config/scmi``)= . + Only one SCMI interface is supported. The SCMI configuration must live u= nder + the Xen SCMI container ``xen,sci`` beneath ``/chosen``. + The Xen SCMI mediator will bind only to the "arm,scmi-smc" node that is = a child of + this "xen,sci" container; any other "arm,scmi-smc" nodes (for example un= der + "/firmware") are ignored to avoid stealing the host's SCMI OSPM instance= . + +.. code-block:: dts + + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; <--- Xen management agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + #access-controller-cells =3D < 1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem + }; + +.. note:: + This layout keeps the Host DT unchanged for Dom0 and baremetal Linux by + using func_id 0x82000002 / shmem 0x47ff0000 for Dom0, while Xen uses a + separate privileged channel func_id 0x82000003 / shmem 0x47ff1000. EL3 + firmware enforces permissions per agent_id, so there is no conflict bet= ween + Dom0 and Xen channels. + +- The driver obtains Xen specific SCMI Agent's configuration from the Host= DT, probes Agents and + builds SCMI Agents list. The Agents configuration is taken from "scmi-se= condary-agents" + property where first item is "arm,smc-id", second - "arm,scmi-shmem" pha= ndle and third is + optional "agent_id": + +.. code-block:: dts + + chosen { + ranges; <--- set default ranges so address can be translated when pa= rsing scmi_shm node + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; <--- set default ranges so address can be translated whe= n parsing scmi_shm node + scmi-secondary-agents =3D < + 0x82000002 &scmi_shm_0 0 + 0x82000004 &scmi_shm_2 2 + 0x82000005 &scmi_shm_3 3 + 0x82000006 &scmi_shm_4 4>; + #scmi-secondary-agents-cells =3D <3>; <--- optional, default 3 + xen,dom0-sci-agent-id =3D <0>; /* Dom0 agent ID */ + + scmi_shm_0 : sram@47ff0000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff0000 0x0 0x1000>; + }; + + scmi_shm_2: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + scmi_shm_3: sram@47ff3000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff3000 0x0 0x1000>; + }; + scmi_shm_4: sram@47ff4000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff4000 0x0 0x1000>; + }; + + // Xen SCMI management channel + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; <--- Xen management agent smc-i= d + #address-cells =3D < 1>; + #size-cells =3D < 0>; + #access-controller-cells =3D < 1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem + }; + }; + }; + }; + + /{ + // Host SCMI OSPM channel - provided to the Dom0 as is if SCMI ena= bled for it + scmi_shm: sram@47ff0000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff0000 0x0 0x1000>; + }; + + firmware { + scmi: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000002>; <--- Host OSPM agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + shmem =3D <&scmi_shm>; <--- Host OSPM agent shmem + + protocol@X{ + }; + }; + }; + }; + + This approach allows defining multiple SCMI Agents by adding Xen-specifi= c properties under + the ``/chosen`` node to the Host Device Tree, leaving the main part unch= anged. The Host DT + SCMI channel will be passed to Dom0. + + The Xen management agent is described as a ``scmi_xen`` node under the `= `xen,sci`` compatible node, + which is used by Xen to control other SCMI Agents in the system. + + All secondary agents' configurations are provided in the ``scmi-secondar= y-agents`` property with + an optional ``agent_id`` field. + + The ``agent_id`` from the ``scmi-secondary-agents`` property is used to = identify the agent in the + system and can be omitted by setting ``#scmi-secondary-agents-cells =3D = <2>``, so the Secondary + Agents configuration will look like this: + +.. code-block:: dts + + chosen { + xen { + xen_scmi_config { + compatible =3D "xen,sci"; + scmi-secondary-agents =3D < + 0x82000002 &scmi_shm_0 + 0x82000004 &scmi_shm_2 + 0x82000005 &scmi_shm_3 + 0x82000006 &scmi_shm_4>; + #scmi-secondary-agents-cells =3D <2>; + }; + }; + } + + In this case, Xen will use the ``SCMI_BASE_DISCOVER_AGENT`` call to disc= over the ``agent_id`` + for each secondary agent. Providing the ``agent_id`` in the ``scmi-secon= dary-agents`` property + allows skipping the discovery call, which is useful when the secondary a= gent's shared memory is + not accessible by Xen or when boot time is important because it allows s= kipping the agent + discovery procedure. + +.. note:: + + Note that Xen is the only one entry in the system which need to know a= bout SCMI multi-agent support. + +- The driver implements the SCI subsystem interface required for configuri= ng and enabling SCMI + functionality for Dom0/hwdom and Guest domains. To enable SCMI functiona= lity for guest domain + it has to be configured with unique supported SCMI Agent_id and use corr= esponding SCMI SMC + shared-memory transport ``[smc-id, shmem]`` defined for this SCMI Agent_= id. + +- Once Xen domain is configured it can communicate with EL3 SCMI FW: + + - zero-copy, the guest domain puts/gets SCMI message in/from shmem; + - the guest triggers SMC exception with agent "smc-id" (doorbell); + - the Xen driver catches exception, do checks and synchronously forwards= it to EL3 FW. + +- the Xen driver sends BASE_RESET_AGENT_CONFIGURATION message to Xen manag= ement agent channel on + domain destroy event. This allows to reset resources used by domain and = so implement use-case + like domain reboot. + + +Configure SCMI for Dom0 +^^^^^^^^^^^^^^^^^^^^^^^ +Set the Dom0 SCMI agent ID in the device tree using the Xen SCMI container= under ``/chosen``. +Add ``xen,dom0-sci-agent-id`` to the ``xen,sci`` node. If the property is = absent, SCMI stays +disabled for Dom0 and the SCMI nodes are removed from Dom0 DT. + +.. code-block:: dts + + chosen { + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + xen,dom0-sci-agent-id =3D <0>; /* Dom0 agent ID */ + /* scmi-secondary-agents and scmi_xen as shown above */ + }; + }; + }; + +The Host DT ``/firmware/scmi`` node is copied to the Dom0 DT unmodified. H= owever, for Dom0 SCMI +configuration, Xen actually relies on ``scmi-secondary-agents`` and ``xen,= dom0-sci-agent-id`` +properties from the ``xen,sci`` container under ``/chosen``. If the ``/fir= mware/scmi`` node is +missing or disabled, or if ``xen,dom0-sci-agent-id`` is not provided, the = Dom0 SCMI agent will not +be configured. + +.. note:: + + The ``xen,dom0-sci-agent-id`` value must match the ``func_id`` and ``shm= em`` pairing provided by + the EL3 firmware for Dom0 (for example in the ``/firmware/scmi`` node). + +Configure SCMI for for guest domain with toolstack +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +* In domain's xl.cfg file add **"arm_sci"** option as below + +:: + + arm_sci =3D "type=3Dscmi_smc_multiagent,agent_id=3D2" + +* In domain's xl.cfg file enable access to the "arm,scmi-shmem" which shou= ld correspond + assigned "agent_id" for the domain, for example: + +:: + + iomem =3D [ + "47ff2,1@22001", + ] + +.. note:: It's up to the user to select guest IPA for mapping SCMI shared-= memory. + +* Add SCMI nodes to the Driver domain partial device tree as in the below = example. + The "arm,smc-id" should correspond assigned agent_id for the domain: + +.. code:: + + passthrough { + scmi_shm_0: sram@22001000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x22001000 0x0 0x1000>; + }; + + firmware { + compatible =3D "simple-bus"; + scmi: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000004>; <--- smc-id for agent_id= =3D2 + shmem =3D <&scmi_shm_0>; + ... + } + } + } + +**Device specific access control** + +The XEN SCMI SMC multi-agent driver performs "access-controller" provider = function in case +EL3 SCMI FW implements SCMI "4.2.1.1 Device specific access control" and p= rovides the +BASE_SET_DEVICE_PERMISSIONS command to configure the devices that an agent= s have access to. +The Host DT SCMI node should have "#access-controller-cells=3D<1>" propert= y and DT devices should +be bound to the SCMI node using Access Controllers bindings [3]. + +For example: + +.. code-block:: dts + + &i2c1 { + access-controllers =3D <&scmi 0>; + }; + +Use domain's xl.cfg file **"dtdev"** property to assign SCMI devices from = toolstack to the guest: + +:: + + dtdev =3D [ + "/soc/i2c@e6508000", + ] + +.. note:: + + xl.cfg:"dtdev" need contain all nodes which are under SCMI management = (not only those which are + behind IOMMU) and passed-through to the guest domain. + +Configure SCMI for predefined domains (dom0less) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +* add "xen,sci_type" and "xen,sci-agent-id" properties for required DomU (= "xen,domain") node + +:: + + xen,sci_type=3D"scmi_smc_multiagent" + xen,sci-agent-id=3D2 + +* add scmi nodes to the Driver domain partial device tree the same way as = above (toolstack case) and + enable access to the "arm,scmi-shmem" according to the dom0less document= ation. For example: + +.. code-block:: dts + + scmi_shm_0: sram@22001000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x00 0x22001000 0x00 0x1000>; + -> xen,reg =3D <0x0 0x47ff2000 0x0 0x1000 0x0 0x22001000>; + -> xen,force-assign-without-iommu; + }; + +* For SCMI device access control configure pass-through devices in the gue= st partial DT according to + the dom0less documentation and ensure that devices SCMI management has "= xen,path" property set: + +Example (dom0less, multi-agent): + +.. code-block:: dts + + chosen { + xen { + ranges; + xen_scmi_config { + compatible =3D "xen,sci"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* Xen management channel shared memory */ + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + scmi_shm_domu: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + + scmi-secondary-agents =3D < + 0x82000004 &scmi_shm_domu 2>; + #scmi-secondary-agents-cells =3D <3>; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; + #address-cells =3D <1>; + #size-cells =3D <0>; + #access-controller-cells =3D <1>; + shmem =3D <&scmi_shm_1>; + }; + }; + }; + + xen,domain@1 { + compatible =3D "xen,domain"; + xen,sci_type =3D "scmi_smc_multiagent"; + xen,sci-agent-id =3D <2>; + /* other domain properties here */ + }; + }; + +.. code-block:: dts + + i2c@e6508000 { + ... + reg =3D <0x00 0xe6508000 0x00 0x1000>; + -> xen,path =3D "/soc/i2c@e6508000" + -> xen,reg =3D <0x0 0xe6508000 0x0 0x1000 0x0 0xe6508000>; + -> xen,force-assign-without-iommu; + }; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:37:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:37:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230665.1536143 (Exim 4.92) (envelope-from ) id 1vqrUG-0003g5-Ut; Fri, 13 Feb 2026 11:37:28 +0000 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While at it, refactor the function to exit early and skip initialising the emulation context when FEP is not enabled. No functional change intended. Signed-off-by: Alejandro Vallejo --- v3: * No changes v2: * Fix bug introduced in v1: Don't emulate instructions when they shouldn't be emulated. * Refactor the function so it's simpler. --- xen/arch/x86/hvm/hvm.c | 77 +++++++++++++++----------------------- xen/arch/x86/hvm/svm/svm.c | 3 +- xen/arch/x86/hvm/vmx/vmx.c | 3 +- 3 files changed, 32 insertions(+), 51 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 4d37a93c57..8708af9425 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3832,69 +3832,47 @@ int hvm_descriptor_access_intercept(uint64_t exit_info, return X86EMUL_OKAY; } -static bool cf_check is_cross_vendor( - const struct x86_emulate_state *state, const struct x86_emulate_ctxt *ctxt) -{ - switch ( ctxt->opcode ) - { - case X86EMUL_OPC(0x0f, 0x05): /* syscall */ - case X86EMUL_OPC(0x0f, 0x34): /* sysenter */ - case X86EMUL_OPC(0x0f, 0x35): /* sysexit */ - return true; - } - - return false; -} - void hvm_ud_intercept(struct cpu_user_regs *regs) { struct vcpu *cur = current; - bool should_emulate = - cur->domain->arch.cpuid->x86_vendor != boot_cpu_data.x86_vendor; struct hvm_emulate_ctxt ctxt; + const struct segment_register *cs = &ctxt.seg_reg[x86_seg_cs]; + uint32_t walk = PFEC_insn_fetch; + unsigned long addr; + char sig[5]; /* ud2; .ascii "xen" */ - hvm_emulate_init_once(&ctxt, opt_hvm_fep ? NULL : is_cross_vendor, regs); + if ( !opt_hvm_fep ) + goto reinject; - if ( opt_hvm_fep ) - { - const struct segment_register *cs = &ctxt.seg_reg[x86_seg_cs]; - uint32_t walk = ((ctxt.seg_reg[x86_seg_ss].dpl == 3) - ? PFEC_user_mode : 0) | PFEC_insn_fetch; - unsigned long addr; - char sig[5]; /* ud2; .ascii "xen" */ - - if ( hvm_virtual_to_linear_addr(x86_seg_cs, cs, regs->rip, - sizeof(sig), hvm_access_insn_fetch, - cs, &addr) && - (hvm_copy_from_guest_linear(sig, addr, sizeof(sig), - walk, NULL) == HVMTRANS_okay) && - (memcmp(sig, "\xf\xb" "xen", sizeof(sig)) == 0) ) - { - regs->rip += sizeof(sig); - regs->eflags &= ~X86_EFLAGS_RF; + hvm_emulate_init_once(&ctxt, NULL, regs); - /* Zero the upper 32 bits of %rip if not in 64bit mode. */ - if ( !(hvm_long_mode_active(cur) && cs->l) ) - regs->rip = (uint32_t)regs->rip; + if ( ctxt.seg_reg[x86_seg_ss].dpl == 3 ) + walk |= PFEC_user_mode; - add_taint(TAINT_HVM_FEP); + if ( hvm_virtual_to_linear_addr(x86_seg_cs, cs, regs->rip, + sizeof(sig), hvm_access_insn_fetch, + cs, &addr) && + (hvm_copy_from_guest_linear(sig, addr, sizeof(sig), + walk, NULL) == HVMTRANS_okay) && + (memcmp(sig, "\xf\xb" "xen", sizeof(sig)) == 0) ) + { + regs->rip += sizeof(sig); + regs->eflags &= ~X86_EFLAGS_RF; - should_emulate = true; - } - } + /* Zero the upper 32 bits of %rip if not in 64bit mode. */ + if ( !(hvm_long_mode_active(cur) && cs->l) ) + regs->rip = (uint32_t)regs->rip; - if ( !should_emulate ) - { - hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); - return; + add_taint(TAINT_HVM_FEP); } + else + goto reinject; switch ( hvm_emulate_one(&ctxt, VIO_no_completion) ) { case X86EMUL_UNHANDLEABLE: case X86EMUL_UNIMPLEMENTED: - hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); - break; + goto reinject; case X86EMUL_EXCEPTION: hvm_inject_event(&ctxt.ctxt.event); /* fall through */ @@ -3902,6 +3880,11 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) hvm_emulate_writeback(&ctxt); break; } + + return; + + reinject: + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); } enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..10d1bf350c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -589,8 +589,7 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) const struct cpu_policy *cp = v->domain->arch.cpu_policy; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Oleksii Kurochko , Community Manager , Jan Beulich , "Andrew Cooper" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v3 1/4] x86: Reject CPU policies with vendors other than the host's Date: Fri, 13 Feb 2026 12:42:27 +0100 Message-ID: <20260213114232.42996-2-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260213114232.42996-1-alejandro.garciavallejo@amd.com> References: <20260213114232.42996-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E7D:EE_|DS0PR12MB7725:EE_ X-MS-Office365-Filtering-Correlation-Id: 6afced65-a829-41f4-25b7-08de6af50436 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024|13003099007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ue+xFcUw8DXj74Btygtxi0LvCGAa/SNvDsWj8bfEA9QK+BmzMxyKuAK2TOmMA7UhJBALQQq47Ep+Be2fMaXI58iGgqmOAECEAjvYT7zBozzHrM2s+0f3OPD8kZgyBcs27+C1bEGFBGIqt6Ze6lCFohGCfa+pgymRgokPJHQpm0Q6HjgvlEegVt8wwqLDJUnq5nHwEIp+AiZHBo2Kl0O8+UZIsXsW41mg8NeLNOBeqjk5GCv7HgI5uoggFrhNNEhmpNqFvmTAn+OJEYMsPKwAw5ENJp0Ejxjrv1p3ToCvyqWrJ9rC+1UPEjtRyznovtnO05FJ2pDksQbpA9r6BKKjbEPOBDoSYXJf00Zp+6ocdYukdezEhtkjHmczBKUGqHjiRX72zNFuUs7uaamG7y9qusqNA9VkQG0zyUpCBeZmUnPu5Zee07Ok90caQsapYZhE X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 11:42:50.2042 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6afced65-a829-41f4-25b7-08de6af50436 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E7D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7725 While in principle it's possible to have a vendor virtualising another, this is fairly tricky in practice and comes with the world's supply of security issues. Reject any CPU policy with vendors not matching the host's. Signed-off-by: Alejandro Vallejo --- v3: * Check vendor_e{b,c,d}x rather than x86_vendor. * Added unit tests for pass/fail cases. * They cover a success and a failure on a comparison of an unknown vendor. --- CHANGELOG.md | 5 +++++ tools/tests/cpu-policy/test-cpu-policy.c | 27 ++++++++++++++++++++++++ xen/lib/x86/policy.c | 5 ++++- 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20..426c0bce67 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -22,6 +22,11 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - Xenoprofile support. Oprofile themselves removed support for Xen in 2014 prior to the version 1.0 release, and there has been no development since before then in Xen. + - Domains can no longer run on a CPU vendor if they were initially launched + on a different CPU vendor. This affects live migrations and save/restore + workflows accross mixed-vendor hosts. Cross-vendor emulation has always + been unreliable, but since 2017 with the advent of speculation security it + became unsustainably so. - Removed xenpm tool on non-x86 platforms as it doesn't actually provide anything useful outside of x86. diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 301df2c002..88a9a26e8f 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -586,6 +586,19 @@ static void test_is_compatible_success(void) .platform_info.cpuid_faulting = true, }, }, + { + .name = "Host CPU vendor == Guest CPU vendor (both unknown)", + .host = { + .basic.vendor_ebx = X86_VENDOR_AMD_EBX + 1, + .basic.vendor_ecx = X86_VENDOR_AMD_ECX, + .basic.vendor_edx = X86_VENDOR_AMD_EDX, + }, + .guest = { + .basic.vendor_ebx = X86_VENDOR_AMD_EBX + 1, + .basic.vendor_ecx = X86_VENDOR_AMD_ECX, + .basic.vendor_edx = X86_VENDOR_AMD_EDX, + }, + }, }; struct cpu_policy_errors no_errors = INIT_CPU_POLICY_ERRORS; @@ -629,6 +642,20 @@ static void test_is_compatible_failure(void) }, .e = { -1, -1, 0xce }, }, + { + .name = "Host CPU vendor != Guest CPU vendor (both unknown)", + .host = { + .basic.vendor_ebx = X86_VENDOR_AMD_EBX + 1, + .basic.vendor_ecx = X86_VENDOR_AMD_ECX, + .basic.vendor_edx = X86_VENDOR_AMD_EDX, + }, + .guest = { + .basic.vendor_ebx = X86_VENDOR_AMD_EBX + 2, + .basic.vendor_ecx = X86_VENDOR_AMD_ECX, + .basic.vendor_edx = X86_VENDOR_AMD_EDX, + }, + .e = { 0, -1, -1 }, + }, }; printf("Testing policy compatibility failure:\n"); diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f033d22785..f991b1f3a9 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -15,7 +15,10 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->basic.max_leaf > host->basic.max_leaf ) + if ( (guest->basic.vendor_ebx != host->basic.vendor_ebx) || + (guest->basic.vendor_ecx != host->basic.vendor_ecx) || + (guest->basic.vendor_edx != host->basic.vendor_edx) || + (guest->basic.max_leaf > host->basic.max_leaf) ) FAIL_CPUID(0, NA); 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bh=a1BoLmaVWRPZko7TcFAR7QJZ2rTpb1hvlyh7u4oJJgM=; b=l2pHkf77MU8isyrw8JyxGU9PTAtyn5S7wxNUfktxeCru+EGoXH3I2pPUiQJo1P8jEspY6Deti7xtk+TlFMTnfVLZcSw4AtQcUb1v4G2cKXYkQUEqzs1q/NhWlbIKDX93zmv5cuhyW/bmo3sPZ1TNxEolVeLpenCoFY7SSKwIYQg= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Oleksii Kurochko , Community Manager , Jan Beulich , "Andrew Cooper" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD , "Jason Andryuk" Subject: [PATCH v3 0/4] x86: Drop cross-vendor support Date: Fri, 13 Feb 2026 12:42:26 +0100 Message-ID: <20260213114232.42996-1-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E7D:EE_|IA0PR12MB8328:EE_ X-MS-Office365-Filtering-Correlation-Id: 4a30f81d-c914-4158-cfb7-08de6af502c7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024|13003099007; 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Cheers, Alejandro Alejandro Vallejo (4): x86: Reject CPU policies with vendors other than the host's x86/hvm: Disable cross-vendor handling in #UD handler x86/hvm: Remove cross-vendor checks from MSR handlers. x86/svm: Drop emulation of Intel's SYSENTER behaviour on AMD systems CHANGELOG.md | 5 ++ tools/tests/cpu-policy/test-cpu-policy.c | 27 +++++++++ xen/arch/x86/hvm/hvm.c | 77 +++++++++--------------- xen/arch/x86/hvm/svm/svm.c | 45 ++++++-------- xen/arch/x86/hvm/svm/vmcb.c | 3 + xen/arch/x86/hvm/vmx/vmx.c | 3 +- xen/arch/x86/include/asm/hvm/svm-types.h | 10 --- xen/arch/x86/msr.c | 8 +-- xen/lib/x86/policy.c | 5 +- 9 files changed, 93 insertions(+), 90 deletions(-) base-commit: 1f4f85b64d393be1aa8dc8170201f4fbfe9c7222 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:43:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:43:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230720.1536182 (Exim 4.92) (envelope-from ) id 1vqrZe-0000B7-OT; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v3 3/4] x86/hvm: Remove cross-vendor checks from MSR handlers. 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Signed-off-by: Alejandro Vallejo Reviewed-by: Teddy Astie --- v3: * No changes v2: * Use boot_cpu_data rather than policy vendor. --- xen/arch/x86/msr.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ad75a2e108..d10891dcfc 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -169,9 +169,9 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) break; case MSR_IA32_PLATFORM_ID: - if ( !(cp->x86_vendor & X86_VENDOR_INTEL) || - !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) ) + if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ) goto gp_fault; + rdmsrl(MSR_IA32_PLATFORM_ID, *val); break; @@ -189,9 +189,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * from Xen's last microcode load, which can be forwarded straight to * the guest. */ - if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || - !(boot_cpu_data.x86_vendor & - (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || + if ( !(boot_cpu_data.vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) || rdmsr_safe(MSR_AMD_PATCHLEVEL, val) ) goto gp_fault; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CqPuvX1oF2+jNyp8Dcpb/42mpMenePwWtW9P8GRz5ayIU2UigqKYiG+Y8ysO5VyRG1/Mw2p6bU7jP6h8NqwUtsTx7YqkDK1iyxnZdhRs3sOE/yy+GGO+jBzklg6E82bpPs9TGqXoBNsgUiNyo3XSVFT0ai/EOpnP2kryhGn2Ob30PL6HXVqIFny2micwFjjGVDuu5kC8kcguWUSC+tjXhDWCi1vbAs2Td3sjW2S3GBRnC6tlG63UMIJVxcy2Fdt7ATzPUY9Mj2XgKnTgGVpx9lqI2gDz1VK427jOQiuX2xxg22/4JaXlZJBWRMbBVTtrVcle1t4dVS0MWt86QexGRQtzCiLbScd261BS6v4lMZDg0RkfHO1gIN/S4BoE6Hjh/D/fDZHo2yLJekYljjjkuV+I451P90OOkLdL6Ke6xn3QhDxK5QkZWAuj2gLf9F86 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 11:42:57.1537 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 80dd543e-680a-401d-a7b8-08de6af5085a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E7D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPF0EB7D076B With cross-vendor support gone, it's no longer needed. AMD CPUs ignore the top 32 bits of the SYSENTER/SYSEXIT MSRs, which is not how this emulation worked due to the need for cross-vendor support. Any AMD VMs storing state in the top 32bits of the SEP MSRs will lose it. It's very unlikely to affect any production VM because having 64bit width just isn't how real AMD CPUs behave. Signed-off-by: Alejandro Vallejo Reviewed-by: Teddy Astie --- v3: * No changes v2: * Reworded commit message to mention the loss of the top dword for any VM stupid enough to use it. --- xen/arch/x86/hvm/svm/svm.c | 42 +++++++++++------------- xen/arch/x86/hvm/svm/vmcb.c | 3 ++ xen/arch/x86/include/asm/hvm/svm-types.h | 10 ------ 3 files changed, 22 insertions(+), 33 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 10d1bf350c..329c4446e9 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -401,10 +401,6 @@ static int svm_vmcb_save(struct vcpu *v, struct hvm_hw_cpu *c) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - c->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs; - c->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp; - c->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip; - if ( vmcb->event_inj.v && hvm_event_needs_reinjection(vmcb->event_inj.type, vmcb->event_inj.vector) ) @@ -468,11 +464,6 @@ static int svm_vmcb_restore(struct vcpu *v, struct hvm_hw_cpu *c) svm_update_guest_cr(v, 0, 0); svm_update_guest_cr(v, 4, 0); - /* Load sysenter MSRs into both VMCB save area and VCPU fields. */ - vmcb->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs = c->sysenter_cs; - vmcb->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp = c->sysenter_esp; - vmcb->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip = c->sysenter_eip; - if ( paging_mode_hap(v->domain) ) { vmcb_set_np(vmcb, true); @@ -501,6 +492,9 @@ static void svm_save_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; + data->sysenter_cs = vmcb->sysenter_cs; + data->sysenter_esp = vmcb->sysenter_esp; + data->sysenter_eip = vmcb->sysenter_eip; data->shadow_gs = vmcb->kerngsbase; data->msr_lstar = vmcb->lstar; data->msr_star = vmcb->star; @@ -512,11 +506,14 @@ static void svm_load_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - vmcb->kerngsbase = data->shadow_gs; - vmcb->lstar = data->msr_lstar; - vmcb->star = data->msr_star; - vmcb->cstar = data->msr_cstar; - vmcb->sfmask = data->msr_syscall_mask; + vmcb->sysenter_cs = data->sysenter_cs; + vmcb->sysenter_esp = data->sysenter_esp; + vmcb->sysenter_eip = data->sysenter_eip; + vmcb->kerngsbase = data->shadow_gs; + vmcb->lstar = data->msr_lstar; + vmcb->star = data->msr_star; + vmcb->cstar = data->msr_cstar; + vmcb->sfmask = data->msr_syscall_mask; v->arch.hvm.guest_efer = data->msr_efer; svm_update_guest_efer(v); } @@ -1720,12 +1717,9 @@ static int cf_check svm_msr_read_intercept( switch ( msr ) { - /* - * Sync not needed while the cross-vendor logic is in unilateral effect. case MSR_IA32_SYSENTER_CS: case MSR_IA32_SYSENTER_ESP: case MSR_IA32_SYSENTER_EIP: - */ case MSR_STAR: case MSR_LSTAR: case MSR_CSTAR: @@ -1740,13 +1734,15 @@ static int cf_check svm_msr_read_intercept( switch ( msr ) { case MSR_IA32_SYSENTER_CS: - *msr_content = v->arch.hvm.svm.guest_sysenter_cs; + *msr_content = vmcb->sysenter_cs; break; + case MSR_IA32_SYSENTER_ESP: - *msr_content = v->arch.hvm.svm.guest_sysenter_esp; + *msr_content = vmcb->sysenter_esp; break; + case MSR_IA32_SYSENTER_EIP: - *msr_content = v->arch.hvm.svm.guest_sysenter_eip; + *msr_content = vmcb->sysenter_eip; break; case MSR_STAR: @@ -1940,11 +1936,11 @@ static int cf_check svm_msr_write_intercept( switch ( msr ) { case MSR_IA32_SYSENTER_ESP: - vmcb->sysenter_esp = v->arch.hvm.svm.guest_sysenter_esp = msr_content; + vmcb->sysenter_esp = msr_content; break; case MSR_IA32_SYSENTER_EIP: - vmcb->sysenter_eip = v->arch.hvm.svm.guest_sysenter_eip = msr_content; + vmcb->sysenter_eip = msr_content; break; case MSR_LSTAR: @@ -1970,7 +1966,7 @@ static int cf_check svm_msr_write_intercept( break; case MSR_IA32_SYSENTER_CS: - vmcb->sysenter_cs = v->arch.hvm.svm.guest_sysenter_cs = msr_content; + vmcb->sysenter_cs = msr_content; break; case MSR_STAR: diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..76fcaf15c2 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -97,6 +97,9 @@ static int construct_vmcb(struct vcpu *v) svm_disable_intercept_for_msr(v, MSR_LSTAR); svm_disable_intercept_for_msr(v, MSR_STAR); svm_disable_intercept_for_msr(v, MSR_SYSCALL_MASK); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP); + svm_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_ESP); vmcb->_msrpm_base_pa = virt_to_maddr(svm->msrpm); vmcb->_iopm_base_pa = __pa(v->domain->arch.hvm.io_bitmap); diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 051b235d8f..aaee91b4b6 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -27,16 +27,6 @@ struct svm_vcpu { /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */ uint8_t cached_insn_len; /* Zero if no cached instruction. */ - - /* - * Upper four bytes are undefined in the VMCB, therefore we can't use the - * fields in the VMCB. Write a 64bit value and then read a 64bit value is - * fine unless there's a VMRUN/VMEXIT in between which clears the upper - * four bytes. - */ - uint64_t guest_sysenter_cs; - uint64_t guest_sysenter_esp; - uint64_t guest_sysenter_eip; }; struct nestedsvm { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:48:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:48:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230765.1536203 (Exim 4.92) (envelope-from ) id 1vqrer-0002VE-My; Fri, 13 Feb 2026 11:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230765.1536203; Fri, 13 Feb 2026 11:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqrer-0002V7-Hr; Fri, 13 Feb 2026 11:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1230765; Fri, 13 Feb 2026 11:48:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqreq-0002V1-Qi for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 11:48:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vqrep-006r4V-1o; Fri, 13 Feb 2026 11:48:23 +0000 Received: from [2a02:8012:3a1:0:814a:c088:bfd9:f253] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vqreo-006NAc-2v; Fri, 13 Feb 2026 11:48:23 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=FzhMcz+QfvkeLTlxa3QpaNoFVRo32qneeHKlY6RVnis=; b=BQ1pjIO5L9AAB58u+YaGOpbUwS KyV4i2UBoe8TxS+YX1zlGxUJa7byNZy3fOJamVkg+O+alMvzRsnsQGFeApj/LD7NJwez49QQSASmR GPXhMfLrMxufvnGft2y3vMi9G/fd5/geRiWZXhKhZsou+WctvIgfLtUIyFJbBHuEAtEY=; Message-ID: Date: Fri, 13 Feb 2026 11:48:20 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 00/19] GICv4 Support for Xen To: Mykola Kvach , Bertrand Marquis Cc: Mykyta Poturai , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Mykola, On 13/02/2026 11:36, Mykola Kvach wrote: > For this reason it may be worth conditionally recommending (or even > auto-selecting) `vwfi=native` when direct injection is enabled for a > vCPU, so measurements reflect the actual delivery fast-path rather than > exit/scheduling overhead. I don't think this is a straightforward answer. "vwfi=native" is beneficial when you have a single vCPU scheduled per pCPU. But if you have multiple vCPUs running, then you may impair the overall performance of the system as the scheduler will not be able to run another vCPU even if the current vCPU is doing nothing (it is waiting for an interrupt). As a data point, Xen didn't initially trapped WFI/WFE. But we noticed a lot of slow down during boot if all the vCPUs for a guest were running on the same pCPU. The difference was quite noticeable. So instead of recommending to always set "vwfi=native", I would consider an approach where Xen decides whether WFI/WFE is trapped based on the number of vCPUs that can be scheduled on a given pCPU. This could be adjusted on demand. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Fri Feb 13 11:58:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 11:58:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230792.1536213 (Exim 4.92) (envelope-from ) id 1vqroO-0005W4-P6; Fri, 13 Feb 2026 11:58:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230792.1536213; Fri, 13 Feb 2026 11:58:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqroO-0005Vx-KJ; Fri, 13 Feb 2026 11:58:16 +0000 Received: by outflank-mailman (input) for mailman id 1230792; Fri, 13 Feb 2026 11:58:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqroN-0005Vr-En for xen-devel@lists.xenproject.org; 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That utility is used by network hotplug scripts, > but they already check if it is available and switch to use "iproute2" > (`ip`) when not. > > Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper Right now, README lists bridge-utils as a hard prereq, and this is not true any longer. iproute is also listed as a hard prereq.  Should we merge these two lines with a logical or? > --- > automation/build/archlinux/current.dockerfile | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/automation/build/archlinux/current.dockerfile b/automation/build/archlinux/current.dockerfile > index 4e53c835fa..a257027772 100644 > --- a/automation/build/archlinux/current.dockerfile > +++ b/automation/build/archlinux/current.dockerfile > @@ -6,7 +6,6 @@ LABEL maintainer.name="The Xen Project" \ > RUN pacman-key --init > > RUN pacman -S --refresh --sysupgrade --noconfirm --noprogressbar --needed \ > - bridge-utils \ > bzip2 \ > cpio \ > discount \ If you're making this change, I'd like to dust off patch to convert to heredoc and get both submitted together. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 13 12:19:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 12:19:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230812.1536222 (Exim 4.92) (envelope-from ) id 1vqs8U-0002V7-Eg; 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Fri, 13 Feb 2026 04:18:55 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Fri, 13 Feb 2026 14:18:44 +0200 X-Gm-Features: AZwV_QhFgaV1Vllm3LAQkQqZw_uooMIMQ1HLC_MN1d6MeY-Ttxk84d4MGUhSiDg Message-ID: Subject: Re: [RFC PATCH 00/19] GICv4 Support for Xen To: Julien Grall Cc: Bertrand Marquis , Mykyta Poturai , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Julien, On Fri, Feb 13, 2026 at 1:48=E2=80=AFPM Julien Grall wrote= : > > Hi Mykola, > > On 13/02/2026 11:36, Mykola Kvach wrote: > > For this reason it may be worth conditionally recommending (or even > > auto-selecting) `vwfi=3Dnative` when direct injection is enabled for a > > vCPU, so measurements reflect the actual delivery fast-path rather than > > exit/scheduling overhead. > > I don't think this is a straightforward answer. "vwfi=3Dnative" is > beneficial when you have a single vCPU scheduled per pCPU. But if you > have multiple vCPUs running, then you may impair the overall performance > of the system as the scheduler will not be able to run another vCPU even > if the current vCPU is doing nothing (it is waiting for an interrupt). > > As a data point, Xen didn't initially trapped WFI/WFE. But we noticed a > lot of slow down during boot if all the vCPUs for a guest were running > on the same pCPU. The difference was quite noticeable. > > So instead of recommending to always set "vwfi=3Dnative", I would conside= r > an approach where Xen decides whether WFI/WFE is trapped based on the > number of vCPUs that can be scheduled on a given pCPU. This could be > adjusted on demand. Thanks for the clarification. I agree: recommending vwfi=3Dnative unconditionally is not correct. What I meant was specifically for benchmarking direct injection in a 1:1 vCPU:pCPU setup (or with vCPUs pinned), where trapping WFI/WFE adds extra exits and can hide the fast-path benefit. For general setups with oversubscription, vwfi=3Dtrap is the right default, because it lets Xen schedule another runnable vCPU instead of leaving a pCPU effectively idle while the guest sits in WFI. I like your suggestion: make WFI/WFE trapping adaptive based on whether the current pCPU has other runnable vCPUs. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Fri Feb 13 12:51:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 12:51:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230847.1536252 (Exim 4.92) (envelope-from ) id 1vqsdd-0001GW-UR; Fri, 13 Feb 2026 12:51:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230847.1536252; Fri, 13 Feb 2026 12:51:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqsdd-0001GP-QN; Fri, 13 Feb 2026 12:51:13 +0000 Received: by outflank-mailman (input) for mailman id 1230847; Fri, 13 Feb 2026 12:51:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqsdc-0001GJ-Uf for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 12:51:12 +0000 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [2a00:1450:4864:20::441]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ac41563c-08da-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 13:51:11 +0100 (CET) Received: by mail-wr1-x441.google.com with SMTP id ffacd0b85a97d-436317c80f7so1991143f8f.1 for ; Fri, 13 Feb 2026 04:51:11 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 13 Feb 2026 04:51:10 -0800 (PST) Message-ID: <37cb7d83-9651-4bb8-833f-4d85f8231c6b@suse.com> Date: Fri, 13 Feb 2026 13:51:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 1/6] xen/domctl: chain SCI handling before IOMMU in assign_device domctl To: Oleksii Moisieiev Cc: Andrew Cooper , Anthony PERARD , Bertrand Marquis , Juergen Gross , Julien Grall , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , Grygorii Strashko , "xen-devel@lists.xenproject.org" References: <53251361b05028f4875d4fccec7270749786c54b.1770982468.git.oleksii_moisieiev@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <53251361b05028f4875d4fccec7270749786c54b.1770982468.git.oleksii_moisieiev@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 12:37, Oleksii Moisieiev wrote: > From: Grygorii Strashko > > Add chained handling of assigned DT devices to support access-controller > functionality through SCI framework, so a DT device assign request can be > passed to firmware for processing and enabling VM access to the requested > device (for example, device power management through SCMI). > > The SCI access-controller DT device processing is called before the IOMMU > path. It runs for any DT-described device (protected or not, and even when > the IOMMU is disabled). The IOMMU path remains unchanged for PCI devices; > only the DT path is relaxed to permit non-IOMMU devices. > > This lets xl.cfg:"dtdev" list both IOMMU-protected and non-protected DT > devices: > > dtdev = [ > "/soc/video@e6ef0000", <- IOMMU protected device > "/soc/i2c@e6508000", <- not IOMMU protected device > ] > > The change is done in two parts: > 1) call sci_do_domctl() in do_domctl() before IOMMU processing. If > sci_do_domctl() reports an error other than -ENXIO, treat it as > authoritative and skip the IOMMU path. A return of -ENXIO indicates > that SCI did not handle the request and is ignored, allowing the > existing IOMMU handling to run unchanged; > 2) update iommu_do_dt_domctl() to check for dt_device_is_protected() and > not fail if DT device is not protected by IOMMU. iommu_do_pci_domctl > doesn't need to be updated because iommu_do_domctl first tries > iommu_do_pci_domctl (when CONFIG_HAS_PCI) and falls back to > iommu_do_dt_domctl only if PCI returns -ENODEV. > > The new dt_device_is_protected() bypass in iommu_do_dt_domctl only > applies to DT-described devices; SCI parameters are carried via DT > nodes. PCI devices handled by iommu_do_pci_domctl do not carry DT/SCI > metadata in this path, so there is no notion of “SCI parameters on a > non-IOMMU-protected PCI device” for it to interpret or to skip. The PCI > path should continue to report errors if assignment cannot be performed > by the IOMMU layer. So we should leave iommu_do_pci_domctl unchanged; the > SCI/DT-specific relaxations belong only in the DT path. Also SCI handling > only exists when DT is present. > > Signed-off-by: Grygorii Strashko > Signed-off-by: Oleksii Moisieiev Mind me asking where my A-b went? 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Hmm, yes, I see common/device-tree/domain-build.c uses it. Then > the following questions arise: > - What does "ipa" stand for? Is this a term sensible in RISC-V context at > all? IPA stands for GPA. (maybe it would better to rename the in common code to gpa too). It was used as common code uses p2m_ipa_bits. Yes, I miss to set p2m_ipa_bits properly in p2m_init() where G-stage MMU mode is set. > Judging from the comment at the decl, isn't it PPN width (plus > PAGE_SHIFT) that it describes? It is PPN width + PAGE_SHIFT what is equal to PADDR_BITS (44bit PPN + 12 bit PAGE_SHIFT). > - With there not being anyone writing to the variable, why is it not > const (or even a #define), or at the very least __ro_after_init? > And no, "Arm has it like this" doesn't count as an answer. Considering > all the review comments you've got so far you should know by now that you > shouldn't copy things blindly. It was added because of the usage in common/device-tree/domain-build.c. It was done in the same way as it is also possible that an IOMMU shares the P2M page tables with the CPU's G-stage(stage-2) translation, so GPA size must not exceed what the IOMMU can handle (or G-stage address limitation if it is smaller then IOMMU's). (a) It could be that MMU uses Sv57, IOMMU uses Sv39, so in this case if IOMMU and MMU shares G-stae page tables it is necessary to respect guest address limitation. But considering that according to RISC-V IOMMU spec ... : The IOMMU must support all the virtual memory extensions that are supported by any of the harts in the system. ... (a) isn't real issue as we could always program IOMMU to use the same as MMU mode and then p2m_ipa_bits __ro_after_init should work well. It can't be const as I mentioned above I missed to initialize it properly in p2m_init() code. (It is also a case for RISC-V that IOMMU could use x4 mode, so MMU uses Sv57 and IOMMU uses Sv57x4.) >> --- a/xen/include/public/arch-riscv.h >> +++ b/xen/include/public/arch-riscv.h >> @@ -50,6 +50,14 @@ typedef uint64_t xen_ulong_t; >> >> #if defined(__XEN__) || defined(__XEN_TOOLS__) >> >> +#define GUEST_RAM_BANKS 1 >> + >> +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ >> +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) >> + >> +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } >> +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } > Hmm, does RISC-V really want to go with compile-time constants here? It is needed for allocate_memory() for guest domains, so it is expected to be compile-time constant with the current code of common dom0less approach. It represents the start of RAM address for DomU and the maximum RAM size (the actual size will be calculated based on what is mentioned in DomU node in dts) and then will be used to generate memory node for DomU (GUEST_RAM0_BASE as RAM start address and min(GUEST_RAM0_SIZE, dts->domU->memory->size) as a RAM size). > And > if so, why would guests be limited to just 2 Gb? It is enough for guest domain I am using in dom0less mode. > That may more efficiently > be RV32 guests then, with perhaps just an RV32 hypervisor. I didn't get this point. Could you please explain differently what do you mean? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri Feb 13 13:12:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 13:12:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230886.1536272 (Exim 4.92) (envelope-from ) id 1vqsxn-0005Zq-NP; Fri, 13 Feb 2026 13:12:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1230886.1536272; Fri, 13 Feb 2026 13:12:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqsxn-0005Zj-KK; Fri, 13 Feb 2026 13:12:03 +0000 Received: by outflank-mailman (input) for mailman id 1230886; Fri, 13 Feb 2026 13:12:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqsxm-0005ZY-5g for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 13:12:02 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 954eed43-08dd-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 14:12:01 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4837584120eso3456985e9.1 for ; Fri, 13 Feb 2026 05:12:01 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 13 Feb 2026 05:12:00 -0800 (PST) Message-ID: Date: Fri, 13 Feb 2026 14:11:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 6/6] xen/riscv: enable DOMAIN_BUILD_HELPERS To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <6ab04f3584e45795dc82c25f62a6c950913f5c7d.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 13:54, Oleksii Kurochko wrote: > On 2/12/26 5:39 PM, Jan Beulich wrote: >> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/include/asm/p2m.h >>> +++ b/xen/arch/riscv/include/asm/p2m.h >>> @@ -44,6 +44,9 @@ >>> #define P2M_LEVEL_MASK(p2m, lvl) \ >>> (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) >>> >>> +/* Holds the bit size of IPAs in p2m tables */ >>> +extern unsigned int p2m_ipa_bits; >> Hmm, I can spot a declaration and ... >> >>> --- a/xen/arch/riscv/p2m.c >>> +++ b/xen/arch/riscv/p2m.c >>> @@ -51,6 +51,12 @@ static struct gstage_mode_desc __ro_after_init max_gstage_mode = { >>> .name = "Bare", >>> }; >>> >>> +/* >>> + * Set to the maximum configured support for IPA bits, so the number of IPA bits can be >>> + * restricted by external entity (e.g. IOMMU). >>> + */ >>> +unsigned int __read_mostly p2m_ipa_bits = PADDR_BITS; >> ... a definition, but neither a use nor a place where the variable would >> be set. Hmm, yes, I see common/device-tree/domain-build.c uses it. Then >> the following questions arise: >> - What does "ipa" stand for? Is this a term sensible in RISC-V context at >> all? > > IPA stands for GPA. (maybe it would better to rename the in common code to gpa too). > It was used as common code uses p2m_ipa_bits. > > Yes, I miss to set p2m_ipa_bits properly in p2m_init() where G-stage MMU mode is set. > >> Judging from the comment at the decl, isn't it PPN width (plus >> PAGE_SHIFT) that it describes? > > It is PPN width + PAGE_SHIFT what is equal to PADDR_BITS (44bit PPN + 12 bit PAGE_SHIFT). > >> - With there not being anyone writing to the variable, why is it not >> const (or even a #define), or at the very least __ro_after_init? >> And no, "Arm has it like this" doesn't count as an answer. Considering >> all the review comments you've got so far you should know by now that you >> shouldn't copy things blindly. > > It was added because of the usage in common/device-tree/domain-build.c. Well, I understand that, but this isn't the way to do. And you've been through such before. Anything you want to share between arch-es that isn't shared yet, will want some suitable abstraction done. Like giving variables names which are appropriate independent of the arch. >>> --- a/xen/include/public/arch-riscv.h >>> +++ b/xen/include/public/arch-riscv.h >>> @@ -50,6 +50,14 @@ typedef uint64_t xen_ulong_t; >>> >>> #if defined(__XEN__) || defined(__XEN_TOOLS__) >>> >>> +#define GUEST_RAM_BANKS 1 >>> + >>> +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ >>> +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) >>> + >>> +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } >>> +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } >> Hmm, does RISC-V really want to go with compile-time constants here? > > It is needed for allocate_memory() for guest domains, so it is expected > to be compile-time constant with the current code of common dom0less > approach. > > It represents the start of RAM address for DomU and the maximum RAM size > (the actual size will be calculated based on what is mentioned in DomU node > in dts) and then will be used to generate memory node for DomU (GUEST_RAM0_BASE > as RAM start address and min(GUEST_RAM0_SIZE, dts->domU->memory->size) as a > RAM size). > >> And >> if so, why would guests be limited to just 2 Gb? > > It is enough for guest domain I am using in dom0less mode. And what others may want to use RISC-V for once it actually becomes usable isn't relevant? As you start adding things to the public headers, you will need to understand that you can't change easily what once was put there. Everything there is part of the ABI, and the ABI needs to remain stable (within certain limits). >> That may more efficiently >> be RV32 guests then, with perhaps just an RV32 hypervisor. > > I didn't get this point. Could you please explain differently what do you > mean? If all you want are 2Gb guests, why would such guests be 64-bit? And with (iirc) RV32 permitting more than 4Gb (via PPN being 22 bits wide), perhaps even a 32-bit hypervisor would suffice? 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This removes a number of hooks that normally go reach onto shadow paging code, clears many branches in a number of places and generally improves codegen throughout. Take the chance to fully remove the shadow/ folder as it's now fully compiled out. Signed-off-by: Alejandro Vallejo --- bloat-o-meter against prior commit (defconfig:-pv,-shadow on both): add/remove: 0/12 grow/shrink: 2/31 up/down: 67/-1609 (-1542) Function old new delta unmap_mmio_regions 1340 1374 +34 map_mmio_regions 211 244 +33 opt_hap_enabled 1 - -1 shadow_vcpu_init 2 - -2 __setup_str_opt_hap_enabled 4 - -4 _update_paging_modes 6 - -6 _toggle_log_dirty 6 - -6 _clean_dirty_bitmap 6 - -6 cpuid_viridian_leaves 728 714 -14 iommu_domain_init 291 276 -15 p2m_pt_change_entry_type_global 214 198 -16 paging_teardown 91 74 -17 paging_set_allocation 384 367 -17 paging_enable 76 59 -17 p2m_init_one 295 278 -17 ept_sync_domain 201 184 -17 arch_set_paging_mempool_size 437 420 -17 p2m_free_one 78 59 -19 paging_vcpu_teardown 36 15 -21 p2m_pt_init 125 104 -21 p2m_pt_change_entry_type_range 218 197 -21 arch_do_physinfo 76 53 -23 sh_none_ops 24 - -24 paging_final_teardown 134 110 -24 __setup_opt_hap_enabled 24 - -24 paging_vcpu_init 41 15 -26 paging_domain_init 167 141 -26 p2m_mem_access_sanity_check 71 42 -29 hvm_enable 449 419 -30 init_guest_cpu_policies 1247 1213 -34 paging_domctl 3357 3318 -39 __start_xen 9456 9416 -40 arch_sanitise_domain_config 794 747 -47 symbols_offsets 29636 29588 -48 p2m_set_entry 305 247 -58 guest_cpuid 1919 1858 -61 ept_dump_p2m_table 817 751 -66 recalculate_cpuid_policy 874 806 -68 shadow_domain_init 71 - -71 mmio_order 73 - -73 hvm_shadow_max_featuremask 76 - -76 hvm_shadow_def_featuremask 76 - -76 dm_op 3594 3510 -84 symbols_sorted_offsets 58464 58368 -96 symbols_names 103425 103213 -212 Total: Before=3644618, After=3643076, chg -0.04% --- xen/arch/x86/Kconfig | 2 ++ xen/arch/x86/hvm/Kconfig | 3 +++ xen/arch/x86/hvm/hvm.c | 8 ++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 2 +- xen/arch/x86/mm/Makefile | 2 +- xen/include/xen/sched.h | 3 +++ 6 files changed, 18 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 2ce4747f6e..190f419720 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -67,6 +67,7 @@ source "arch/Kconfig" config PV def_bool y prompt "PV support" + select OPT_HAP help Interfaces to support PV domains. These require guest kernel support to run as a PV guest, but don't require any specific hardware support. @@ -147,6 +148,7 @@ config SHADOW_PAGING bool "Shadow Paging" default !PV_SHIM_EXCLUSIVE depends on PV || HVM + select OPT_HAP help Shadow paging is a software alternative to hardware paging support (Intel EPT, AMD NPT). diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb7..310e09847b 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -92,4 +92,7 @@ config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX +config OPT_HAP + bool + endif diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index da56944e74..ce58632b02 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -91,9 +91,11 @@ struct hvm_function_table __ro_after_init hvm_funcs; unsigned long __section(".bss.page_aligned") __aligned(PAGE_SIZE) hvm_io_bitmap[HVM_IOBITMAP_SIZE / BYTES_PER_LONG]; +#ifdef CONFIG_OPT_HAP /* Xen command-line option to enable HAP */ static bool __initdata opt_hap_enabled = true; boolean_param("hap", opt_hap_enabled); +#endif /* CONFIG_OPT_HAP */ #ifndef opt_hvm_fep /* Permit use of the Forced Emulation Prefix in HVM guests */ @@ -144,15 +146,21 @@ static bool __init hap_supported(struct hvm_function_table *fns) if ( !fns->caps.hap ) { printk("HVM: Hardware Assisted Paging (HAP) not detected\n"); + + if ( !IS_ENABLED(CONFIG_OPT_HAP) ) + panic("HAP is compile-time mandatory\n"); + return false; } +#ifdef CONFIG_OPT_HAP if ( !opt_hap_enabled ) { fns->caps.hap = false; printk("HVM: Hardware Assisted Paging (HAP) detected but disabled\n"); return false; } +#endif /* CONFIG_OPT_HAP */ return true; } diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index dc609bf4cb..b330d65d6d 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -703,7 +703,7 @@ static inline bool hvm_is_singlestep_supported(void) static inline bool hvm_hap_supported(void) { - return hvm_funcs.caps.hap; + return !IS_ENABLED(CONFIG_OPT_HAP) ?: hvm_funcs.caps.hap; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 1/2] x86: Make hvm_enabled a constant unless both PV and HVM are both compiled Date: Fri, 13 Feb 2026 14:37:29 +0100 Message-ID: <20260213133732.132326-2-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> References: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A672F:EE_|CY3PR12MB9678:EE_ X-MS-Office365-Filtering-Correlation-Id: d3256332-3642-49f9-565a-08de6b051598 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; 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Many branches go away, some in the potentially hot switch_cr3_cr4. HVM-only: add/remove: 0/1 grow/shrink: 1/9 up/down: 1/-162 (-161) Function old new delta arch_do_physinfo 79 80 +1 hvm_enabled 1 - -1 symbols_offsets 30732 30728 -4 symbols_names 108029 108022 -7 symbols_sorted_offsets 60656 60648 -8 flush_area_local 571 562 -9 switch_cr3_cr4 311 300 -11 init_xen_cap_info 62 43 -19 arch_sanitise_domain_config 885 863 -22 init_guest_cpu_policies 1270 1247 -23 hvm_domain_initialise 1127 1069 -58 Total: Before=3797004, After=3796843, chg -0.00% With hvm_enabled const-ified, it's fine to take hvm_flush_guest_tlbs() outside the CONFIG_HVM ifdef and remove the stub. They compile to the same code after DCE. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/hvm/hvm.c | 9 +++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 30 +++++++++++++++--------------- 2 files changed, 24 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 4d37a93c57..da56944e74 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -72,7 +72,9 @@ #include +#ifdef CONFIG_PV bool __read_mostly hvm_enabled; +#endif /* CONFIG_PV */ #ifdef DBG_LEVEL_0 unsigned int opt_hvm_debug_level __read_mostly; @@ -173,9 +175,16 @@ static int __init cf_check hvm_enable(void) svm_fill_funcs(); if ( fns == NULL ) + { + if ( !IS_ENABLED(CONFIG_PV) ) + panic("HVM support not detected and PV compiled-out\n"); + return 0; + } +#ifdef CONFIG_PV hvm_enabled = 1; +#endif /* CONFIG_PV */ printk("HVM: %s enabled\n", fns->name); if ( !hap_supported(&hvm_funcs) ) diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..dc609bf4cb 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -261,7 +261,11 @@ struct hvm_function_table { }; extern struct hvm_function_table hvm_funcs; +#if defined(CONFIG_PV) && defined(CONFIG_HVM) extern bool hvm_enabled; +#else +#define hvm_enabled IS_ENABLED(CONFIG_HVM) +#endif extern int8_t hvm_port80_allowed; extern const struct hvm_function_table *start_svm(void); @@ -399,6 +403,17 @@ static inline bool using_svm(void) #define hvm_is_in_uc_mode(d) \ (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) +/* + * Called to ensure than all guest-specific mappings in a tagged TLB are + * flushed; does *not* flush Xen's TLB entries, and on processors without a + * tagged TLB it will be a noop. + */ +static inline void hvm_flush_guest_tlbs(void) +{ + if ( hvm_enabled ) + hvm_asid_flush_core(); +} + #ifdef CONFIG_HVM #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) @@ -498,17 +513,6 @@ static inline void hvm_set_tsc_offset(struct vcpu *v, uint64_t offset) alternative_vcall(hvm_funcs.set_tsc_offset, v, offset); } -/* - * Called to ensure than all guest-specific mappings in a tagged TLB are - * flushed; does *not* flush Xen's TLB entries, and on processors without a - * tagged TLB it will be a noop. - */ -static inline void hvm_flush_guest_tlbs(void) -{ - if ( hvm_enabled ) - hvm_asid_flush_core(); -} - static inline unsigned int hvm_get_cpl(struct vcpu *v) { @@ -854,8 +858,6 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) #else /* CONFIG_HVM */ -#define hvm_enabled false - /* * List of inline functions above, of which only declarations are * needed because DCE will kick in. @@ -902,8 +904,6 @@ static inline int hvm_cpu_up(void) static inline void hvm_cpu_down(void) {} -static inline void hvm_flush_guest_tlbs(void) {} - static inline void hvm_invlpg(const struct vcpu *v, unsigned long linear) { ASSERT_UNREACHABLE(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 13:38:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 13:38:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1230930.1536292 (Exim 4.92) (envelope-from ) id 1vqtMu-0001RV-1d; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD , Michal Orzel , "Julien Grall" , Stefano Stabellini Subject: [PATCH 0/2] x86: Const-ify hvm_enabled and hap_enabled() when possible Date: Fri, 13 Feb 2026 14:37:28 +0100 Message-ID: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A672F:EE_|SJ5PPF75EAF8F39:EE_ X-MS-Office365-Filtering-Correlation-Id: 46e6a1c4-ecc3-4e83-8227-08de6b0514d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?3QnERybjnL/qTeR6n5PxKsEhnAFAvjfiv+j+BWRgBOuPkYH0RFTeKwQ4JqLi?= =?us-ascii?Q?eYPaeb73zHzrg/wvoC5m4NG33+W13QIH7cTQU8BoEDG71uhBJRli2Qw4ZaG/?= =?us-ascii?Q?KU9XSuJCKgOmBw3u7914Vn2p/aflWa0Uc5EFESyZRepnf47lh2lF4icA80DS?= =?us-ascii?Q?sF3mNJ6u5eq9lE26VcXfKpdE7q7bpEpr4eYwaoBaFwXjtIb7o3P81D4B1HBn?= =?us-ascii?Q?/EimUNOXY1qU1zHQdUlLO1mXXIJIq/4ST1zyj+qbWbH9IlNTwURF78zbeiBK?= =?us-ascii?Q?iyB7OSjzDMgSX+B6f8Xf/hW+91yHhXW3HwiI+4OrWhlYu9AC0KIs5K8IsmYW?= =?us-ascii?Q?OzS61PHfv6pAFwEsu7fMdMGEFELyDLDm6Rh0VWv/s0eyN614yK4eGrY8gyg/?= =?us-ascii?Q?JQmyqLf23KwaqvNVrSuo7txHm4JMEMrwRpPnfHUjFKu80DGkXYvGwS1P7zuN?= =?us-ascii?Q?A+392a1KQzENSdZjTPztrGBVk96pcMI9UrGMtrb4ZkByEnMhk6Bx9SanxLdL?= =?us-ascii?Q?3l9xVwTMVdQylG3SY4O8Od+rhCZLkuuIBtC7Y62TULBi3gs9vRyY/MnjnXL+?= =?us-ascii?Q?OZuRfnQ8YUnGPsFtqUVWajyHToj/jfetOCeTuI9m8GbCdnMLYimkCxY0sMLT?= =?us-ascii?Q?Yfyk1f/E742K7BgLVt3eoTZp5L9+he5TNIn5wZXXrKGnSSN1m83flsI2LBb1?= =?us-ascii?Q?M6xLWwAWAhEOaVzqLH2xclaDNfMaRyqcXb1/5EqnrqNZLuzAsJScxcYYG7Es?= =?us-ascii?Q?N21Z030NcZVEDplfEo3vazskUkR1XaKLf67yOy9MndVp+TDzMh9vSWr5pXqU?= =?us-ascii?Q?Qs+U1nQyJH8SZifA3PDAeDamenj7InpPDv93yWUwYhNnKIyuHokb9fauCDXN?= =?us-ascii?Q?Jto7oLhTrsdV/ekWlwfkr49cJ4Je7V2dT5baxPuCFzVbTOEfkvTaYjSGMEO5?= =?us-ascii?Q?oyZ/5ohgCxz26qpmunRgB0M8gvodNjA/Vjy+r7Wvyn3W/na4qDqcjLeQ+9yV?= =?us-ascii?Q?6HlClOanwKIfd4An+XQzufmi3bJ9NcYxYcNPchukYzJf/RKpoOuXXqyEIb5r?= =?us-ascii?Q?wK6S+3gGxcnTydGj/2AIPhZqAfXMu+KkhMMWgbF/j0iuK59WHInt/PNd/ewu?= =?us-ascii?Q?IDTW9jeDsEcitHMhfcDMpGCc+aZLPnnUr8ok7NV+PHYNdHStiC/ecv6PJhh/?= =?us-ascii?Q?c13SbSw6tCFBxcBKU9UFRx+5H2n/fyuM/rjCOfXlBfZkfb1HnWR9IN9CwHiX?= =?us-ascii?Q?SPZklmdwweu5pdz7q+PZwWjRB5PpHEyjK6sW8DZGJ00YN40WLPj+qFzOvWkE?= =?us-ascii?Q?b9nq/Yp+ugPy/Tl5O0jw5mAraJGCUCrUZnJnAWaNoOVmor8UpqejeSONc4qL?= =?us-ascii?Q?4EuvOYmS3oe+dHqwx+1kKxHX/xhvQbKEq620dd9TWG1/6ksnEGjqH9Vg1Gco?= =?us-ascii?Q?I8i3kigoI2V+fh9peMurX12Zz3epIE0RfqiIJ8eBeXwrsO9XcEi5AH+xTn1b?= =?us-ascii?Q?ph58+bbgX+Ac/JuOTQ+F3hpA1HeVy5tJuEduKN26zQE8I7L4N3SnuOs+GFhH?= =?us-ascii?Q?6NLC18E5yCMg/YAmPbFVsohTvd1zq1jd/4NAlraKZzcRFmsUFsfkFcgN/8wV?= =?us-ascii?Q?gRidOYFGckZt6WjkuOUhPtAaiks41mJkbF1k0FrPYjwQEJjLBB1ddRKJlrA6?= =?us-ascii?Q?cn4Ucw=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JoJL2cYJNyx+sjagYbDqxWmh8lL3UhwOy+vrLuAmXYPaZONheBq3YljbM1TjO7BKS5dG2cFHPyJO++rqWnVSZb2AW7N/LCW0C5v3/z/hcczOgTRzhAxxmZZvYLMeE0Yh5T9ULGosmKI+4n4B11ZhmJYJeADMdDwJ+Lt/8KAHMMQMPbInM6oyRX7zUE7O8BUpWrv2RUyBAGHXpNQX8ii1gGtfkg+Jxt42Cpjd7DtuD39qdOGcOelMju57N8WWYP9VMBtOcoXcazSHAgk3NMekeM3yY8ByjBvd9jRJf8jsjqabQHH0fGoY/EA9c6WJmJrYM2odtzrh7eAYU/9lt3XQLEZ7XC7PPYqrrcVLPekgHJ31U3MSYPe1livbCxGG4uXqL6WrtPH6A7sSG1tW7aifuc0MVim6oMxdlkr90oP6nNVjEnHwYFgKTpDKpdmgdDGG X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 13:37:50.0068 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 46e6a1c4-ecc3-4e83-8227-08de6b0514d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A672F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF75EAF8F39 Hi, pipeline (green): https://gitlab.com/xen-project/people/agvallejo/xen/-/pipelines/2324325987 hvm_enabled is already a constant in PV-only builds. Patch 1 makes it so it's also a constant in HVM-only builds (with a compile-time panic if HVM support is lacking in HW). Patch 2 makes it so HVM-only shadowless builds mandate HAP at boot, thus const-ifying hap_enabled() too and removing that pesky shadow/ folder. Cheers, Alejandro Alejandro Vallejo (2): x86: Make hvm_enabled a constant unless both PV and HVM are both compiled x86: Force HAP to be enabled when PV and shadow paging are compiled out xen/arch/x86/Kconfig | 2 ++ xen/arch/x86/hvm/Kconfig | 3 +++ xen/arch/x86/hvm/hvm.c | 17 ++++++++++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 32 +++++++++++++++--------------- xen/arch/x86/mm/Makefile | 2 +- xen/include/xen/sched.h | 3 +++ 6 files changed, 42 insertions(+), 17 deletions(-) base-commit: 1f4f85b64d393be1aa8dc8170201f4fbfe9c7222 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 13:56:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 13:56:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231036.1536376 (Exim 4.92) (envelope-from ) id 1vqteo-0006Da-RH; Fri, 13 Feb 2026 13:56:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231036.1536376; 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Pass -E to the grep call used in efi-nr-fixups. Additionally, the return from `wc -l` is space padded on BSD, and hence the content of efi-nr-fixups is " 2", not plain "2". Strip the spaces in the Makefile using $(strip ...). Fixes: 1be65ec4c8bc ('x86/EFI: avoid use of GNU ld's --disable-reloc-section when possible') Signed-off-by: Roger Pau Monné --- xen/arch/x86/arch.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 2e06ae2582dc..37fe65bc13cb 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -100,7 +100,7 @@ endif ifeq ($(XEN_BUILD_PE),y) # Check if the linker produces fixups in PE by default -efi-nr-fixups := $(shell LC_ALL=C $(OBJDUMP) -p $(efi-check).efi | grep '^[[:blank:]]*reloc[[:blank:]]*[0-9][[:blank:]].*DIR64$$' | wc -l) +efi-nr-fixups := $(strip $(shell LC_ALL=C $(OBJDUMP) -p $(efi-check).efi | grep -E '^[[:blank:]]*reloc[[:blank:]]*[0-9][[:blank:]].*DIR64$$' | wc -l)) ifeq ($(efi-nr-fixups),2) MKRELOC := : -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 13:56:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 13:56:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231035.1536366 (Exim 4.92) (envelope-from ) id 1vqtem-000602-KC; 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Thanks, Roger. Roger Pau Monne (2): xen/x86: fix usage of [[:blank:]] with BSD grep xen: add non-executable stack note uniformly xen/Makefile | 2 +- xen/arch/x86/arch.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 13:56:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 13:56:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231037.1536386 (Exim 4.92) (envelope-from ) id 1vqter-0006Sg-73; Fri, 13 Feb 2026 13:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231037.1536386; Fri, 13 Feb 2026 13:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqter-0006SV-43; Fri, 13 Feb 2026 13:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1231037; Fri, 13 Feb 2026 13:56:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqtep-0005zi-KW for xen-devel@lists.xenproject.org; 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However, the default addition of the .note.GNU-stack section is dependent on the ELF target used. Adjust the passing of -Wa,--noexecstack so it's added to CFLAGS instead of AFLAGS, and hence such section is also added to object files generated from .c sources. This fixes the complains from the linker about missing .note.GNU-stack section when building x86-64 Xen on Darwin platforms. Note we could instead pass `-z noexecstack` to the linker, but that however would mask any possible errors or unintended mismatches from previous steps. Suggested-by: Jan Beulich Signed-off-by: Roger Pau Monné --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index a054315fa4a2..a2b442e76d5c 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -413,7 +413,7 @@ ifneq ($(CONFIG_CC_IS_CLANG),y) CFLAGS += -Wa,--strip-local-absolute endif -$(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) +$(call cc-option-add,CFLAGS,CC,-Wa$$(comma)--noexecstack) LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 14:12:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 14:12:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231086.1536397 (Exim 4.92) (envelope-from ) id 1vqttg-0001pk-Ht; Fri, 13 Feb 2026 14:11:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231086.1536397; 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Fri, 13 Feb 2026 06:11:48 -0800 (PST) MIME-Version: 1.0 References: <20260213094938.4074478-1-marcandre.lureau@redhat.com> In-Reply-To: <20260213094938.4074478-1-marcandre.lureau@redhat.com> From: Peter Maydell Date: Fri, 13 Feb 2026 14:11:37 +0000 X-Gm-Features: AZwV_QhTszuPHuF69gBdjMmghGZj0GECDjqjodvkLk8R7I407V4-YWO9HB7GAYo Message-ID: Subject: Re: [PULL v2 00/15] Char patches To: marcandre.lureau@redhat.com Cc: qemu-devel@nongnu.org, =?UTF-8?B?QWxleCBCZW5uw6ll?= , "Edgar E. Iglesias" , =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Paul Durrant , Anthony PERARD , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Eduardo Habkost , Paolo Bonzini , Stefano Stabellini , xen-devel@lists.xenproject.org, Samuel Thibault Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 13 Feb 2026 at 09:50, wrote: > > From: Marc-Andr=C3=A9 Lureau > > The following changes since commit 4ed6a7f2fdc09d9fc3411e83e278da00851220= 16: > > Merge tag 'pull-block-jobs-2026-02-12' of https://gitlab.com/vsementsov= /qemu into staging (2026-02-12 14:35:18 +0000) > > are available in the Git repository at: > > https://gitlab.com/marcandre.lureau/qemu.git tags/char-pull-request > > for you to fetch changes up to 98ba0e479771a391137119264156e9661508bbc7: > > baum: Add copy/paste bindings (2026-02-13 10:45:07 +0100) > > ---------------------------------------------------------------- > chardev patches Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/11.0 for any user-visible changes. -- PMM From xen-devel-bounces@lists.xenproject.org Fri Feb 13 14:27:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 14:27:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231097.1536405 (Exim 4.92) (envelope-from ) id 1vqu8O-0003fm-OQ; Fri, 13 Feb 2026 14:27:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231097.1536405; Fri, 13 Feb 2026 14:27:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqu8O-0003ff-L7; Fri, 13 Feb 2026 14:27:04 +0000 Received: by outflank-mailman (input) for mailman id 1231097; Fri, 13 Feb 2026 14:27:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqu8N-0003fZ-8Y for xen-devel@lists.xenproject.org; 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Many branches > go away, some in the potentially hot switch_cr3_cr4. > > HVM-only: > add/remove: 0/1 grow/shrink: 1/9 up/down: 1/-162 (-161) > Function old new delta > arch_do_physinfo 79 80 +1 > hvm_enabled 1 - -1 > symbols_offsets 30732 30728 -4 > symbols_names 108029 108022 -7 > symbols_sorted_offsets 60656 60648 -8 > flush_area_local 571 562 -9 > switch_cr3_cr4 311 300 -11 > init_xen_cap_info 62 43 -19 > arch_sanitise_domain_config 885 863 -22 > init_guest_cpu_policies 1270 1247 -23 > hvm_domain_initialise 1127 1069 -58 > Total: Before=3797004, After=3796843, chg -0.00% > > With hvm_enabled const-ified, it's fine to take hvm_flush_guest_tlbs() > outside the CONFIG_HVM ifdef and remove the stub. They compile to the > same code after DCE. > > Signed-off-by: Alejandro Vallejo > --- > xen/arch/x86/hvm/hvm.c | 9 +++++++++ > xen/arch/x86/include/asm/hvm/hvm.h | 30 +++++++++++++++--------------- > 2 files changed, 24 insertions(+), 15 deletions(-) > > diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > index 4d37a93c57..da56944e74 100644 > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -72,7 +72,9 @@ > > #include > > +#ifdef CONFIG_PV > bool __read_mostly hvm_enabled; __ro_after_init? > +#endif /* CONFIG_PV */ > > #ifdef DBG_LEVEL_0 > unsigned int opt_hvm_debug_level __read_mostly; > @@ -173,9 +175,16 @@ static int __init cf_check hvm_enable(void) > svm_fill_funcs(); > > if ( fns == NULL ) > + { > + if ( !IS_ENABLED(CONFIG_PV) ) > + panic("HVM support not detected and PV compiled-out\n"); > + > return 0; > + } > > +#ifdef CONFIG_PV CONFIG_HVM I think? > hvm_enabled = 1; = true; > +#endif /* CONFIG_PV */ > > printk("HVM: %s enabled\n", fns->name); > if ( !hap_supported(&hvm_funcs) ) > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h > index 7d9774df59..dc609bf4cb 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -261,7 +261,11 @@ struct hvm_function_table { > }; > > extern struct hvm_function_table hvm_funcs; > +#if defined(CONFIG_PV) && defined(CONFIG_HVM) > extern bool hvm_enabled; > +#else > +#define hvm_enabled IS_ENABLED(CONFIG_HVM) > +#endif > extern int8_t hvm_port80_allowed; > > extern const struct hvm_function_table *start_svm(void); > @@ -399,6 +403,17 @@ static inline bool using_svm(void) > #define hvm_is_in_uc_mode(d) \ > (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) > > +/* > + * Called to ensure than all guest-specific mappings in a tagged TLB are > + * flushed; does *not* flush Xen's TLB entries, and on processors without a > + * tagged TLB it will be a noop. > + */ > +static inline void hvm_flush_guest_tlbs(void) > +{ > + if ( hvm_enabled ) > + hvm_asid_flush_core(); > +} > + > #ifdef CONFIG_HVM > > #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) > @@ -498,17 +513,6 @@ static inline void hvm_set_tsc_offset(struct vcpu *v, uint64_t offset) > alternative_vcall(hvm_funcs.set_tsc_offset, v, offset); > } > > -/* > - * Called to ensure than all guest-specific mappings in a tagged TLB are > - * flushed; does *not* flush Xen's TLB entries, and on processors without a > - * tagged TLB it will be a noop. > - */ > -static inline void hvm_flush_guest_tlbs(void) > -{ > - if ( hvm_enabled ) > - hvm_asid_flush_core(); > -} Is there any specific reason you only pick hvm_flush_guest_tlbs(). Given what you do with hvm_enabled you could probably generalize all the dummy helpers in the !CONFIG_HVM section now? Thanks, Roger. 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Fri, 13 Feb 2026 06:53:05 -0800 (PST) Message-ID: <54db82ee-0746-4490-82aa-7ddf03c38942@suse.com> Date: Fri, 13 Feb 2026 15:53:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] x86/darwin: two extra fixes to placate build warnings To: Roger Pau Monne Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260213135614.25842-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260213135614.25842-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 14:56, Roger Pau Monne wrote: > Hello, > > Following two patches fix the remaining two warnings seen on the x86 > Darwin build of Xen. > > Thanks, Roger. > > Roger Pau Monne (2): > xen/x86: fix usage of [[:blank:]] with BSD grep > xen: add non-executable stack note uniformly Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Fri Feb 13 15:10:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 15:10:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231181.1536452 (Exim 4.92) (envelope-from ) id 1vquo4-0003SB-Kr; Fri, 13 Feb 2026 15:10:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231181.1536452; Fri, 13 Feb 2026 15:10:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vquo4-0003S4-H3; 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Date: Fri, 13 Feb 2026 16:09:54 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Alejandro Vallejo Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: Re: [PATCH 2/2] x86: Force HAP to be enabled when PV and shadow paging are compiled out Message-ID: References: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> <20260213133732.132326-3-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260213133732.132326-3-alejandro.garciavallejo@amd.com> X-ClientProxiedBy: MA4P292CA0013.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:2d::11) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SA1PR03MB6516:EE_ X-MS-Office365-Filtering-Correlation-Id: 9341f54a-e3e3-47a2-284b-08de6b11f349 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|7053199007; 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This removes a number > of hooks that normally go reach onto shadow paging code, clears > many branches in a number of places and generally improves codegen > throughout. > > Take the chance to fully remove the shadow/ folder as it's now fully > compiled out. > > Signed-off-by: Alejandro Vallejo > --- > bloat-o-meter against prior commit (defconfig:-pv,-shadow on both): > > add/remove: 0/12 grow/shrink: 2/31 up/down: 67/-1609 (-1542) > Function old new delta > unmap_mmio_regions 1340 1374 +34 > map_mmio_regions 211 244 +33 > opt_hap_enabled 1 - -1 > shadow_vcpu_init 2 - -2 > __setup_str_opt_hap_enabled 4 - -4 > _update_paging_modes 6 - -6 > _toggle_log_dirty 6 - -6 > _clean_dirty_bitmap 6 - -6 > cpuid_viridian_leaves 728 714 -14 > iommu_domain_init 291 276 -15 > p2m_pt_change_entry_type_global 214 198 -16 > paging_teardown 91 74 -17 > paging_set_allocation 384 367 -17 > paging_enable 76 59 -17 > p2m_init_one 295 278 -17 > ept_sync_domain 201 184 -17 > arch_set_paging_mempool_size 437 420 -17 > p2m_free_one 78 59 -19 > paging_vcpu_teardown 36 15 -21 > p2m_pt_init 125 104 -21 > p2m_pt_change_entry_type_range 218 197 -21 > arch_do_physinfo 76 53 -23 > sh_none_ops 24 - -24 > paging_final_teardown 134 110 -24 > __setup_opt_hap_enabled 24 - -24 > paging_vcpu_init 41 15 -26 > paging_domain_init 167 141 -26 > p2m_mem_access_sanity_check 71 42 -29 > hvm_enable 449 419 -30 > init_guest_cpu_policies 1247 1213 -34 > paging_domctl 3357 3318 -39 > __start_xen 9456 9416 -40 > arch_sanitise_domain_config 794 747 -47 > symbols_offsets 29636 29588 -48 > p2m_set_entry 305 247 -58 > guest_cpuid 1919 1858 -61 > ept_dump_p2m_table 817 751 -66 > recalculate_cpuid_policy 874 806 -68 > shadow_domain_init 71 - -71 > mmio_order 73 - -73 > hvm_shadow_max_featuremask 76 - -76 > hvm_shadow_def_featuremask 76 - -76 > dm_op 3594 3510 -84 > symbols_sorted_offsets 58464 58368 -96 > symbols_names 103425 103213 -212 > Total: Before=3644618, After=3643076, chg -0.04% > --- > xen/arch/x86/Kconfig | 2 ++ > xen/arch/x86/hvm/Kconfig | 3 +++ > xen/arch/x86/hvm/hvm.c | 8 ++++++++ > xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > xen/arch/x86/mm/Makefile | 2 +- > xen/include/xen/sched.h | 3 +++ > 6 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig > index 2ce4747f6e..190f419720 100644 > --- a/xen/arch/x86/Kconfig > +++ b/xen/arch/x86/Kconfig > @@ -67,6 +67,7 @@ source "arch/Kconfig" > config PV > def_bool y > prompt "PV support" > + select OPT_HAP > help > Interfaces to support PV domains. These require guest kernel support > to run as a PV guest, but don't require any specific hardware support. > @@ -147,6 +148,7 @@ config SHADOW_PAGING > bool "Shadow Paging" > default !PV_SHIM_EXCLUSIVE > depends on PV || HVM > + select OPT_HAP > help > Shadow paging is a software alternative to hardware paging support > (Intel EPT, AMD NPT). > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..310e09847b 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,7 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > > +config OPT_HAP > + bool Can't you define this outside of Kconfig, like: #define HAP_ONLY_BUILD (!IS_ENABLED(CONFIG_PV) && !IS_ENABLED(CONFIG_SHADOW_PAGING)) HAP_ONLY_BUILD is likely not the best name. Maybe CONFIG_HAP_REQUIRED or some such? (Seeing the usage below) FWIW, with the current naming I've assume this was supposed to mean "Option HAP" or some such, when is "HAP is Optional". We usually use "opt" as a shortcut for "option" in several places on the Xen code base, like "opt_hap_enabled". I also think using it in the positive for so the variable meaning "required" instead of "optional" makes some of the logic easier to follow below. > endif > diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > index da56944e74..ce58632b02 100644 > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -91,9 +91,11 @@ struct hvm_function_table __ro_after_init hvm_funcs; > unsigned long __section(".bss.page_aligned") __aligned(PAGE_SIZE) > hvm_io_bitmap[HVM_IOBITMAP_SIZE / BYTES_PER_LONG]; > > +#ifdef CONFIG_OPT_HAP > /* Xen command-line option to enable HAP */ > static bool __initdata opt_hap_enabled = true; > boolean_param("hap", opt_hap_enabled); > +#endif /* CONFIG_OPT_HAP */ Hm, if you nuke the option like that, it needs to be reflected in xen-command-line.pandoc document. > > #ifndef opt_hvm_fep > /* Permit use of the Forced Emulation Prefix in HVM guests */ > @@ -144,15 +146,21 @@ static bool __init hap_supported(struct hvm_function_table *fns) > if ( !fns->caps.hap ) > { > printk("HVM: Hardware Assisted Paging (HAP) not detected\n"); > + > + if ( !IS_ENABLED(CONFIG_OPT_HAP) ) > + panic("HAP is compile-time mandatory\n"); >From a user perspective, it's a weird error message IMO. I would rather say: "HVM: Hardware Assisted Paging (HAP) is mandatory but not detected\n". Not fully convinced about that wording, but I would certainly drop the "compile-time" part of yours. A user is not likely to care/know about compile-time subtlety of the error message. > + > return false; > } > > +#ifdef CONFIG_OPT_HAP > if ( !opt_hap_enabled ) You could possibly do: #ifdef CONFIG_OPT_HAP /* Xen command-line option to enable HAP */ static bool __initdata opt_hap_enabled = true; boolean_param("hap", opt_hap_enabled); #else /* CONFIG_OPT_HAP */ # define opt_hap_enabled true #endif /* !CONFIG_OPT_HAP */ Above, and avoid the ifdefs here? > { > fns->caps.hap = false; > printk("HVM: Hardware Assisted Paging (HAP) detected but disabled\n"); > return false; > } > +#endif /* CONFIG_OPT_HAP */ > > return true; > } > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h > index dc609bf4cb..b330d65d6d 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -703,7 +703,7 @@ static inline bool hvm_is_singlestep_supported(void) > > static inline bool hvm_hap_supported(void) > { > - return hvm_funcs.caps.hap; > + return !IS_ENABLED(CONFIG_OPT_HAP) ?: hvm_funcs.caps.hap; return CONFIG_HAP_REQUIRED ?: hvm_funcs.caps.hap; IMO is easier to read (same below for the hap_enabled() early return). > } > > /* returns true if hardware supports alternate p2m's */ > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > index 960f6e8409..64fde82c50 100644 > --- a/xen/arch/x86/mm/Makefile > +++ b/xen/arch/x86/mm/Makefile > @@ -1,4 +1,4 @@ > -obj-y += shadow/ > +obj-$(CONFIG_OPT_HAP) += shadow/ I think you can use: obj-$(findstring y,$(CONFIG_PV) $(CONFIG_SHADOW_PAGING)) += ... Thanks, Roger. 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Xen is > > started from GRUB, using MB2+EFI. > > Hmm, yes, there's an ordering issue: Of course we free initrd space (as used > for passing from the boot loader to Xen) only after copying to the designated > guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in > its calculation (adding initial_images_nrpages()'s return value). PV Dom0 > isn't affected because to load huge initrd there, the kernel has to request > the initrd to not be mapped into the initial allocation. Right, on PV dom0 we do not copy the image to a new set of pages, we simply assign the pages where the initrd resides to the domain. We can't populate those pages in the p2m as-is, otherwise we would shatter super pages. I think the fix below should do it, it's likely the best we can do. Can you please give it a try Marek? Thanks, Roger. --- diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 0b467fd4a4fc..8e3cb5d0db76 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -343,7 +343,7 @@ unsigned long __init dom0_compute_nr_pages( for_each_node_mask ( node, dom0_nodes ) avail += avail_domheap_pages_region(node, 0, 0) + - initial_images_nrpages(node); + is_pv_domain(d) ? initial_images_nrpages(node) : 0; /* Reserve memory for further dom0 vcpu-struct allocations... */ avail -= (d->max_vcpus - 1UL) From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:01:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:01:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231257.1536471 (Exim 4.92) (envelope-from ) id 1vqvbt-0002TP-GN; Fri, 13 Feb 2026 16:01:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231257.1536471; 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b=dynw6x48R6z+aB0sJiIYoBNl8ktEb1AsEXxbFfs/zxAYFY+nkJ6iws27xvruqbUb4aUW889y1hc3fkEAz5gBhPoaj5EP0sv0/393uI8UPIR3UQcM8dfrrFXEx5YOTeY9yzSDmdgXgcHBAn6C/+ufGFid0v3TG5eqQrSl/MD1XqY= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <1e4e20cb-71fd-4ed3-888b-7ca8b17175a5@citrix.com> Date: Fri, 13 Feb 2026 16:01:25 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , xen-devel@lists.xenproject.org, Jan Beulich Subject: Re: [PATCH 1/2] x86: Make hvm_enabled a constant unless both PV and HVM are both compiled To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alejandro Vallejo References: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> <20260213133732.132326-2-alejandro.garciavallejo@amd.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P265CA0091.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:2bc::8) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|PH7PR03MB7297:EE_ X-MS-Office365-Filtering-Correlation-Id: fc44305b-dbc5-4b48-ed2f-08de6b192575 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016; 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>> >> if ( fns == NULL ) >> + { >> + if ( !IS_ENABLED(CONFIG_PV) ) >> + panic("HVM support not detected and PV compiled-out\n"); As with Rogers feedback on the next patch, this wording isn't ideal.  How about: "HVM support required but not available\n". This is reachable for people who use cpuid=no-vmx,no-svm but they get to keep all the pieces and the documentation already has a general warning about this kind of stuff. >> + >> return 0; >> + } >> >> +#ifdef CONFIG_PV > CONFIG_HVM I think? No - CONFIG_PV is correct here, because we're inside an HVM-only file.  It's the only case where this variable exists for real. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231310.1536489 (Exim 4.92) (envelope-from ) id 1vqw2d-0005ag-TL; Fri, 13 Feb 2026 16:29:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231310.1536489; Fri, 13 Feb 2026 16:29:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2d-0005ZZ-MN; Fri, 13 Feb 2026 16:29:15 +0000 Received: by outflank-mailman (input) for mailman id 1231310; Fri, 13 Feb 2026 16:29:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2c-0005Ws-6d for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:14 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 21281e8b-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:12 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-48069a48629so10258215e9.0 for ; Fri, 13 Feb 2026 08:29:12 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5ebd1bsm303288185e9.6.2026.02.13.08.29.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 08:29:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 21281e8b-08f9-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771000151; x=1771604951; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9TfHO4ZBv8S5+fXcFeskWF2fV7HooHkCu0wCOijIOOI=; b=khab3WmcHIur70PgAG9nspbF2BN/xlbprsqw5Bvku9SUsdEOZaay6IsfAItfatKG2R puSTaKbGfBCS6LKWdRM54qCZ6MOB2/tLhC+SKYciooVaGdHHsplbaOfY2hOPBQZlxqlv aOczY6DdBH/R04T7LUr4fvTGQWfQg/IakqHbqn6OP+tt2smLLWFNDNwU7nMhRWJNsMt4 gDxODKZu9a15HEzlzI34lzNJZTZ0n7VrULrlv/yehCKlMcajVFhjYLDgBhqNxfzHz9OD VPQ6C/icdxx9JPIZ7T91LMMqvzlRSWagKG12PJmWA6KuqQlWDK0PAs3v2/bA1U7mu497 sRRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771000151; x=1771604951; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=9TfHO4ZBv8S5+fXcFeskWF2fV7HooHkCu0wCOijIOOI=; b=seFfG6FZ49QE6vSmDPl07cQubwFlNdLquRKFBBZQp9WS7RHrS236dnjhb+y48MeDaK HMWx+kDJkuXzC0SC5jOqsfSbCiwxj703bZb2sW1E79XK0qWahXiFDWwvWOUd3DvQwZWd UUkE30sJtsxYUYe5kP1UwnB/O8/jKn3qxxPXuxy9T3KhWKREyOLtZtgb0Oq+Lul0bUb8 DAf4i5KdGg5bnb0RYXr7GgTLY7bZwOh5utGjUtODsAoVQqEB8GZ4vYsbVyeiZAHyQ5P3 oyMWeSE4N6wmdYR93dTAJ+dQJvOXhIgMdacAWx9MMJ3SiXa7bFzfYrPNVLzyO0hkZBd/ ySZQ== X-Gm-Message-State: AOJu0Yz4lovp5Wry9rXV8soz7LyFUJPr/RubBfYJuQCyk4/hi1k/4Rkj XHRXl7o8z1aEtjXAFKAZ4JRIya6yy/XCpgzFyNK7c96qugaIL4GJ3ZCrrQKXbtAc X-Gm-Gg: AZuq6aJA9ZYH/QsOoaNHls5HdNacumC72hk9r5t8+iczqZv+jKTHO+cOSggHTKS7RKc Tma/itnBOm7EAEsidfM0gerldXrjqwLuXGYaGkAX6Rhokev+fiLVnlMk3Ni4EN68BbH/Q10ih1w 3G011rITR9pj/YKVwe9/JVqbW7mLD+WMJ2INIABKSurCnh4E3nfLtrXj+ibSLQe7QwM4oBgtQxm Ib4NXk+Jt9tDtbU/xXRUPWMSd6CUA1u5SQcL5RPgi9XzMQLmZg7hcnOtw6rQzTwcH2B4iiZhxrF 3+UGnfge/WNRqF1ifQ9WTcNhF6pyDDhULAlqaa0HVrq5T627o8G46KKy2ksw67FOrmi4yRQpz3N SUboOVJMf4oGwWswl6mbhsxUBPHsk/gOH85tsHSbnpwn8YWspTNR9rvfkX9Cd/EkDbKygSwO/y4 gWscVWSahxZccoq3u9Q2r0Q0o36yZYK6ky1tKWhU1WYIYLJ6XOhFfovnO/eAbP3PlDhdTZauO+C PYT X-Received: by 2002:a05:600c:34c6:b0:483:6ff1:18b with SMTP id 5b1f17b1804b1-483737bde90mr36700935e9.0.1771000151157; Fri, 13 Feb 2026 08:29:11 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 01/16] xen/riscv: implement arch_vcpu_{create,destroy}() Date: Fri, 13 Feb 2026 17:28:47 +0100 Message-ID: <42534cb6aabf25cf551a13ae1288045e1ac08f9e.1770999383.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce architecture-specific functions to create and destroy VCPUs. Note that arch_vcpu_create() currently returns -EOPNOTSUPP, as the virtual timer and interrupt controller are not yet implemented. Add calle-saved registers to struct arch_vcpu which are used to preserve Xen’s own execution context when switching between vCPU stacks. It is going to be used in the following way (pseudocode): context_switch(prev_vcpu, next_vcpu): ... /* Switch from previous stack to the next stack. */ __context_switch(prev_vcpu, next_vcpu); ... schedule_tail(prev_vcpu): Save and restore vCPU's CSRs. The Xen-saved context allows __context_switch() to switch execution from the previous vCPU’s stack to the next vCPU’s stack and later resume execution on the original stack when switching back. During vCPU creation, the Xen-saved context is going to be initialized with: - SP pointing to the newly allocated vCPU stack. - RA pointing to a helper that performs final vCPU setup before transferring control to the guest. As part of this change, add continue_new_vcpu(), which will be used after the first context_switch() of a new vCPU. Since this functionality is not yet implemented, continue_new_vcpu() is currently provided as a stub. The prev argument is going to be set by RISC-V ABI (prev will be stored in a0) when __context_swtich() will be introduced and called from context_switch(). Update the STACK_SIZE definition and introduce STACK_ORDER (to align with other architectures) for allocating the vCPU stack. Introduce struct cpu_info to store per-vCPU state that lives at the top of the vCPU's stack. Signed-off-by: Oleksii Kurochko --- Changes in v4: - Update the code of arch_vcpu_destroy() by shortening passed vfree()'s argument. - Update the commit message. --- Changes in v3: - Move declaration of xen_saved_context structure and cpu_info structure here as they are going to be used in this patch. - Drop separate zero-ing of arch.cpu_info as a memory for it is allocated by vzalloc(). - Correct calculation of stack pointer in arch_vcpu_destroy() function. --- Changes in v2: - Drop BUILD_BUG_ON() in arch_vcpu_create() as a check isn't very useful. - Use vzalloc() instead of alloc_xenheap_page() to use the larger domheap to allocate vCPU's stack. - Drop printk() inside arch_vcpu_create() to not have potential big noise in console as it could be that an amount of vCPUs is pretty big. - Use XVFREE() instead of free_xenheap_pages() as vCPU's stack allocation happens with a usage of vzalloc() now. - Drop stack field as it is enough to have only cpu_info as stack pointer could be calculated based on cpu_info. - Drop cast when v.arch.cpu_info is inialized as it is not necessary to have it. - Drop memset() for arch.cpu_info() as it is enough to have vzalloc(). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 58 ++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/config.h | 3 +- xen/arch/riscv/include/asm/current.h | 6 +++ xen/arch/riscv/include/asm/domain.h | 24 ++++++++++++ xen/arch/riscv/stubs.c | 10 ----- 6 files changed, 91 insertions(+), 11 deletions(-) create mode 100644 xen/arch/riscv/domain.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 1eb9ab090b48..caa1aac5b2f6 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,5 +1,6 @@ obj-y += aplic.o obj-y += cpufeature.o +obj-y += domain.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += imsic.o diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c new file mode 100644 index 000000000000..f5c624ac92c7 --- /dev/null +++ b/xen/arch/riscv/domain.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +static void continue_new_vcpu(struct vcpu *prev) +{ + BUG_ON("unimplemented\n"); +} + +static void __init __maybe_unused build_assertions(void) +{ + /* + * Enforce the requirement documented in struct cpu_info that + * guest_cpu_user_regs must be the first field. + */ + BUILD_BUG_ON(offsetof(struct cpu_info, guest_cpu_user_regs) != 0); +} + +int arch_vcpu_create(struct vcpu *v) +{ + int rc = 0; + void *stack = vzalloc(STACK_SIZE); + + if ( !stack ) + return -ENOMEM; + + v->arch.cpu_info = stack + STACK_SIZE - sizeof(struct cpu_info); + + v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; + v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; + + /* Idle VCPUs don't need the rest of this setup */ + if ( is_idle_vcpu(v) ) + return rc; + + /* + * As the vtimer and interrupt controller (IC) are not yet implemented, + * return an error. + * + * TODO: Drop this once the vtimer and IC are implemented. + */ + rc = -EOPNOTSUPP; + goto fail; + + return rc; + + fail: + arch_vcpu_destroy(v); + return rc; +} + +void arch_vcpu_destroy(struct vcpu *v) +{ + vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); +} diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 1e08d3bf78be..86a95df018b5 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -143,7 +143,8 @@ #define SMP_CACHE_BYTES (1 << 6) -#define STACK_SIZE PAGE_SIZE +#define STACK_ORDER 3 +#define STACK_SIZE (PAGE_SIZE << STACK_ORDER) #define IDENT_AREA_SIZE 64 diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 0c3ea70c2ec8..58c9f1506b7c 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -21,6 +21,12 @@ struct pcpu_info { /* tp points to one of these */ extern struct pcpu_info pcpu_info[NR_CPUS]; +/* Per-VCPU state that lives at the top of the stack */ +struct cpu_info { + /* This should be the first member. */ + struct cpu_user_regs guest_cpu_user_regs; +}; + #define set_processor_id(id) do { \ tp->processor_id = (id); \ } while (0) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 316e7c6c8448..f78f145258d6 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -24,6 +24,30 @@ struct arch_vcpu_io { struct arch_vcpu { struct vcpu_vmid vmid; + + /* + * Callee saved registers for Xen's state used to switch from + * prev's stack to the next's stack during context switch. + */ + struct + { + register_t s0; + register_t s1; + register_t s2; + register_t s3; + register_t s4; + register_t s5; + register_t s6; + register_t s7; + register_t s8; + register_t s9; + register_t s10; + register_t s11; + register_t sp; + register_t ra; + } xen_saved_context; + + struct cpu_info *cpu_info; }; struct paging_domain { diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbfde79b5a7..c5784a436574 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -116,16 +116,6 @@ void dump_pageframe_info(struct domain *d) BUG_ON("unimplemented"); } -int arch_vcpu_create(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - -void arch_vcpu_destroy(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - void vcpu_switch_to_aarch64_mode(struct vcpu *v) { BUG_ON("unimplemented"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231313.1536521 (Exim 4.92) (envelope-from ) id 1vqw2g-0006LC-19; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5ebd1bsm303288185e9.6.2026.02.13.08.29.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 08:29:14 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 23096eea-08f9-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771000155; x=1771604955; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sFTZR6VEK+iEcNLXUgansIu4xb+JbI0KY9wblj0cuZ4=; b=CvbgeaSEAskkQJVXJ3FKdQgvdAbIZMtcK5SpxxMAW6SE5XO/vffLqCzrcMFM/bHC9M 7XGGCqSJsDRp8/jtXfg1QHk8gqUI8ubP7KZhE7AExm+2rFZqmDDb1MFeua8owHO893zS SdAjcEhSmqhe8G77cxuUzh7n3Wb/RYA6mnjXE5yJbT7c90g2Kpe+rgqe6+3YLNAYX2E5 QtJwWjahpfapMDlp+Zbho7YqqGzW0skaqbUvXf75AelloFD7unKdWZZ+z10HAvAPV1w8 jAuRIA0zZihf0QqDS2KRXXYeluzp6UHzngCUEomJ+RcfL+HpC3TVp7r/+40z9erHidtY j2wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771000155; x=1771604955; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sFTZR6VEK+iEcNLXUgansIu4xb+JbI0KY9wblj0cuZ4=; b=d8OLzJleWUrJBp28ZD1cyBdytMQsWnAe5DlKBeQZVUE2gCGel4XohXkHTW7xIddUga fbwLhqWiyw8YwMl+JzFo2A5xQo8MbFJxtXpDxYSkwNxFutbk14cS1RHe75l4E6wYbQos prAHKRzR1vWrgHyjmzqPKmPkPcaScLORNSFyZZGw56DWP0y4RaEIdv+nFEy/0LhGLfIx HOFx5xkvcuQNeyqs/uk1Mt+l9wgkv2nTIc99xwxH7kHyry2UarOcVIQXBI1Y7wHJhwKj NrLkwzlw1YN9yGPDVI5iEjkSdxSu/BxcyYDnmvkcI3+7DW0ZtONmPp3i4tasOkn4k9bn DUAg== X-Gm-Message-State: AOJu0YwTkhbasxl0lyesiJpXgpTGwYCx1hcKrcaB/jAF8/yM4QiAYV+c 91BlnpELlf8PvPhAImAl5stdhaSwwpFawA8vWUghWZRscJB7gh0hfI8ruoWvn2nT X-Gm-Gg: AZuq6aL8J+5PPnxbe6ZOJqNSN0f0WcJOBhlHxVCNBCdwE9p1+KcSOrDcd+f0X9AM7NS MBywZcAbJqfWaMFVmcicpvvNyIpRGuZlQGNfiOSmgceqcwRtHYrBijCn/4cUnQT5NK7orLpDRya SQF8cGc6vsvW3JKEpWgdBSbGN+c4rVKizDKxr/J8eVrF8l8Q2+TN4sCoHw4y4dT+6qieI+4Dl08 e8LY3cP6pBRkxKEPjhQtZziUpowPL/+HugR0DerYFIQngTuKJV4BVNdVkwCysdNUbjDtNs2/LZ5 GkHg3teNdKut5oRwo2X54BSabdg7Li4uqzACnnK3DzSJNaYV0AMp/Y4Sl8muQ4HDmbYPoQboN61 j7wq5i0UepkYp5/bhRQYLy0e9oU+Kt0aP5DyfmUI77+u/mEJ4YHKHR3sFxELH1vJMGCKbMTN9qp nFze5mtsSli9eIiY5v7LduL4vQdP9CW6f0WFA7LhwWgw25KJ3aLogsMTpW2z1bnjvJDg== X-Received: by 2002:a05:600c:34d4:b0:465:a51d:d4 with SMTP id 5b1f17b1804b1-48373a1611fmr43468945e9.6.1771000154460; Fri, 13 Feb 2026 08:29:14 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 04/16] xen/riscv: implement vcpu_csr_init() Date: Fri, 13 Feb 2026 17:28:50 +0100 Message-ID: <7c58dfbac99694811e4276858b48baa211331229.1770999383.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce vcpu_csr_init() to initialise hypervisor CSRs that control vCPU execution and virtualization behaviour before the vCPU is first scheduled. The function configures trap and interrupt delegation to VS-mode by setting the appropriate bits in the hedeleg and hideleg registers, initializes hstatus so that execution enters VS-mode when control is passed to the guest, and restricts guest access to hardware performance counters by initializing hcounteren, as unrestricted access would require additional handling in Xen. When the Smstateen and SSAIA extensions are available, access to AIA CSRs and IMSIC guest interrupt files is enabled by setting the corresponding bits in hstateen0, avoiding unnecessary traps into Xen (note that SVSLCT(Supervisor Virtual Select) name is used intead of CSRIND as OpenSBI uses such name and riscv_encoding.h is mostly based on it). If the Svpbmt extension is supported, the PBMTE bit is set in henvcfg to allow its use for VS-stage address translation. Guest access to the ENVCFG CSR is also enabled by setting ENVCFG bit in hstateen0, as a guest may need to control certain characteristics of the U-mode (VU-mode when V=1) execution environment. For CSRs that may contain read-only bits (e.g. hedeleg, hideleg, hstateen0), to the written value a correspondent mask is applied to avoid divergence between the software state and the actual CSR contents. As hstatus is not part of struct arch_vcpu (it already resides in struct cpu_user_regs), introduce vcpu_guest_cpu_user_regs() to provide a uniform way to access hstatus and other guest CPU user registers. This establishes a consistent and well-defined initial CSR state for vCPUs prior to their first context switch. Signed-off-by: Oleksii Kurochko --- Changes in v4: - Move local variable hstateen0 into narrower scope. - Code style fixes. - Move the call of vcpu_csr_init(v) after if ( is_idle_vcpu() ) check in arcg_vcpu_create(). --- Changes in v3: - Add hypervisor register used to initalize vCPU state. - Apply masks introduced before instead of csr_write()/csr_read() pattern. --- Changes in v2: - As hstatus isn't a part of arch_vcpu structure (as it is already a part of cpu_user_regs) introduce vcpu_guest_cpu_user_regs() to be able to access hstatus and other CPU user regs. - Sort hideleg bit setting by value. Drop a stray blank. - Drop | when the first initialization of hcounteren and hennvcfg happen. - Introduce HEDELEG_DEFAULT. Sort set bits by value and use BIT() macros instead of open-coding it. - Apply pattern csr_write() -> csr_read() for hedeleg and hideleg instead of direct bit setting in v->arch.h{i,e}deleg as it could be that for some reason some bits of hedeleg and hideleg are r/o. The similar patter is used for hstateen0 as some of the bits could be r/o. - Add check that SSAIA is avaialable before setting of SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT bits. - Drop local variables hstatus, hideleg and hedeleg as they aren't used anymore. --- xen/arch/riscv/domain.c | 66 +++++++++++++++++++++ xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/riscv_encoding.h | 2 + 4 files changed, 76 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 5572e10bfaa9..6c8a6269d791 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -6,10 +6,74 @@ #include #include +#include +#include +#include #include struct csr_masks __ro_after_init csr_masks; +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ + BIT(CAUSE_FETCH_ACCESS, U) | \ + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ + BIT(CAUSE_BREAKPOINT, U) | \ + BIT(CAUSE_MISALIGNED_LOAD, U) | \ + BIT(CAUSE_LOAD_ACCESS, U) | \ + BIT(CAUSE_MISALIGNED_STORE, U) | \ + BIT(CAUSE_STORE_ACCESS, U) | \ + BIT(CAUSE_USER_ECALL, U) | \ + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ + BIT(CAUSE_STORE_PAGE_FAULT, U)) + +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) + +static void vcpu_csr_init(struct vcpu *v) +{ + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; + + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; + + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; + + /* + * VS should access only the time counter directly. + * Everything else should trap. + */ + v->arch.hcounteren = HCOUNTEREN_TM; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + register_t hstateen0 = 0; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + /* + * If the hypervisor extension is implemented, the same three + * bits are defined also in hypervisor CSR hstateen0 but concern + * only the state potentially accessible to a virtual machine + * executing in privilege modes VS and VU: + * bit 60 CSRs siselect and sireg (really vsiselect and + * vsireg) + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really + * vsiph, vsieh, and vstopi) + * bit 58 all state of IMSIC guest interrupt files, including + * CSR stopei (really vstopei) + * If one of these bits is zero in hstateen0, and the same bit is + * one in mstateen0, then an attempt to access the corresponding + * state from VS or VU-mode raises a virtual instruction exception. + */ + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; + + /* Allow guest to access CSR_ENVCFG */ + hstateen0 |= SMSTATEEN0_HSENVCFG; + + v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0; + } +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); @@ -41,6 +105,8 @@ int arch_vcpu_create(struct vcpu *v) if ( is_idle_vcpu(v) ) return rc; + vcpu_csr_init(v); + /* * As the vtimer and interrupt controller (IC) are not yet implemented, * return an error. diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 58c9f1506b7c..5fbee8182caa 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -48,6 +48,8 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_cpu_current(cpu) per_cpu(curr_vcpu, cpu) #define guest_cpu_user_regs() ({ BUG_ON("unimplemented"); NULL; }) +#define vcpu_guest_cpu_user_regs(vcpu) \ + (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) #define switch_stack_and_jump(stack, fn) do { \ asm volatile ( \ diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index f78f145258d6..6bb06a50c6ab 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -48,6 +48,12 @@ struct arch_vcpu { } xen_saved_context; struct cpu_info *cpu_info; + + register_t hcounteren; + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; }; struct paging_domain { diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 1f7e612366f8..dd15731a86fa 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -228,6 +228,8 @@ #define ENVCFG_CBIE_INV _UL(0x3) #define ENVCFG_FIOM _UL(0x1) +#define HCOUNTEREN_TM BIT(1, U) + /* ===== User-level CSRs ===== */ /* User Trap Setup (N-extension) */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231312.1536503 (Exim 4.92) (envelope-from ) id 1vqw2e-0005p2-Ku; Fri, 13 Feb 2026 16:29:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231312.1536503; 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Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in V4: - New patch. --- xen/arch/riscv/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index caa1aac5b2f6..bc47e83b26d7 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -12,7 +12,7 @@ obj-y += paging.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ obj-y += sbi.o -obj-y += setup.o +obj-y += setup.init.o obj-y += shutdown.o obj-y += smp.o obj-y += smpboot.o -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231311.1536494 (Exim 4.92) (envelope-from ) id 1vqw2e-0005iz-8p; Fri, 13 Feb 2026 16:29:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231311.1536494; Fri, 13 Feb 2026 16:29:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2e-0005hC-4D; Fri, 13 Feb 2026 16:29:16 +0000 Received: by outflank-mailman (input) for mailman id 1231311; Fri, 13 Feb 2026 16:29:15 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2d-0005Wn-3o for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:15 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 21cb0b5b-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:13 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-48370174e18so7721955e9.2 for ; Fri, 13 Feb 2026 08:29:13 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Writing unsupported bits can either be ignored or raise an exception depending on the platform. Detect the set of writable bits for selected hypervisor CSRs at boot and store the resulting masks for later use. This allows safely programming these CSRs during vCPU context switching and avoids relying on hardcoded architectural assumptions. Note that csr_set() is used instead of csr_write() to write all ones to the mask, as the CSRRS instruction, according to the RISC-V specification, sets only those bits that are writable (note that the quote consider only non-read-only CSRs as writing to read-only CSRs according to the spec. will raise an exception): Any bit that is high in rs1 will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. In contrast, the CSRRW instruction does not take CSR bit writability into account, which could lead to unintended side effects when writing all ones to a CSR. Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, hstateen0 registers as only them are going to be used in the follow up patch. If the Smstateen extension is not implemented, hstateen0 cannot be read because the register is considered non-existent. Instructions that attempt to access a CSR that is not implemented or not visible in the current mode are reserved and will raise an illegal-instruction exception. Signed-off-by: Oleksii Kurochko --- Changes in V4: - Move csr_masks defintion to domain.c. Make it static as at the moment it is going to be used only in domain.c. - Rename and refactor X macros inside init_csr_masks(). --- Changes in V3: - New patch. --- xen/arch/riscv/domain.c | 5 +++++ xen/arch/riscv/include/asm/setup.h | 9 +++++++++ xen/arch/riscv/setup.c | 21 +++++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index f5c624ac92c7..5572e10bfaa9 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -2,9 +2,14 @@ #include #include +#include #include #include +#include + +struct csr_masks __ro_after_init csr_masks; + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index c9d69cdf5166..d54f6a2d1d29 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,15 @@ #include +struct csr_masks { + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; +}; + +extern struct csr_masks csr_masks; + #define max_init_domid (0) void setup_mm(void); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9b4835960d20..dc469b49623f 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -70,6 +70,25 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) return fdt; } +void __init init_csr_masks(void) +{ + register_t old; + +#define INIT_CSR_MASK(csr, field) do { \ + old = csr_read(CSR_##csr); \ + csr_set(CSR_##csr, ULONG_MAX); \ + csr_masks.field = csr_read(CSR_##csr); \ + csr_write(CSR_##csr, old); \ +} while (0) + + INIT_CSR_MASK(HEDELEG, hedeleg); + INIT_CSR_MASK(HENVCFG, henvcfg); + INIT_CSR_MASK(HIDELEG, hideleg); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + INIT_CSR_MASK(HSTATEEN0, hstateen0); +} + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { @@ -137,6 +156,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, riscv_fill_hwcap(); + init_csr_masks(); + preinit_xen_time(); intc_preinit(); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231309.1536481 (Exim 4.92) (envelope-from ) id 1vqw2d-0005XG-Hy; Fri, 13 Feb 2026 16:29:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231309.1536481; Fri, 13 Feb 2026 16:29:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2d-0005X9-FI; Fri, 13 Feb 2026 16:29:15 +0000 Received: by outflank-mailman (input) for mailman id 1231309; Fri, 13 Feb 2026 16:29:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2b-0005Wn-M9 for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:13 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2088b637-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:11 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-48378136adcso3189735e9.1 for ; Fri, 13 Feb 2026 08:29:11 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Since the SSTC extension is not supported by Xen, an emulated (SBI-based) timer is required. To address this, a virtual timer built on Xen’s timer infrastructure is introduced, with save/restore support and SBI-based programming. To provide full guest software–based timer support, the following components are also introduced: - arch_vcpu_{create,destroy}() to initialize the virtual timer and other vCPU-related state not directly tied to timer functionality. As part of this work, struct arch_vcpu is introduced to describe the internal state of a virtual CPU, along with vcpu_csr_init() to initialize the relevant CSR state. - Support functions required by the virtual timer, including: - vcpu_kick(), and a stub implementation of smp_send_event_check_mask() (since SMP is not yet supported in Xen), which is used by vcpu_kick(). - Support for guest timer programming via interception of the SBI legacy SET_TIMER call from guest. - Implement reprogram_timer() using introduced sbi_set_timer(). - Initial lockless tracking of pending vCPU interrupts using atomic bitmaps. - Handling of hypervisor timer interrupts and dispatch into Xen’s generic timer softirq. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2324166405 --- Changes in v4: - Merged to upstream/staging: xen/riscv: avoid reading hstateen0 when Smstateen is not implemented - Address other comments from ML. --- Changes in v3: - Squash patch "xen/riscv: introduce struct arch_vcpu" into other patches of the patch series. - Merged to staging: - xen/riscv: implement stub for smp_send_event_check_mask() - Address other comments from ML. --- Changes in v2: - Add consumer part of tracking of pending vCPU interrupts. - Split patch "xen/riscv: init tasklet subsystem" to two. - Patches were acked: - xen/riscv: introduce vcpu_kick() implementation - xen/riscv: implement SBI legacy SET_TIMER support for guests - All other changes are patch-specific. Please check them. --- Oleksii Kurochko (16): xen/riscv: implement arch_vcpu_{create,destroy}() xen/riscv: detect and store supported hypervisor CSR bits at boot xen/riscv: build setup code as .init xen/riscv: implement vcpu_csr_init() xen/riscv: introduce tracking of pending vCPU interrupts, part 1 xen/riscv: introduce tracking of pending vCPU interrupts, part 2 xen/time: move ticks<->ns helpers to common code xen/riscv: introduce basic vtimer infrastructure for guests xen/riscv: introduce vcpu_kick() implementation xen/riscv: add vtimer context switch helpers xen/riscv: implement SBI legacy SET_TIMER support for guests xen/riscv: introduce sbi_set_timer() xen/riscv: implement reprogram_timer() via SBI xen/riscv: handle hypervisor timer interrupts xen/riscv: init tasklet subsystem xen/riscv: implement sync_vcpu_execstate() xen/arch/arm/include/asm/time.h | 3 - xen/arch/arm/time.c | 11 - xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/Makefile | 4 +- xen/arch/riscv/domain.c | 261 ++++++++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/config.h | 3 +- xen/arch/riscv/include/asm/current.h | 8 + xen/arch/riscv/include/asm/domain.h | 58 +++++ xen/arch/riscv/include/asm/perfc_defn.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/include/asm/sbi.h | 21 ++ xen/arch/riscv/include/asm/setup.h | 9 + xen/arch/riscv/include/asm/time.h | 5 - xen/arch/riscv/include/asm/vtimer.h | 23 ++ xen/arch/riscv/sbi.c | 40 ++- xen/arch/riscv/setup.c | 24 ++ xen/arch/riscv/stubs.c | 30 --- xen/arch/riscv/time.c | 44 ++++ xen/arch/riscv/traps.c | 26 ++ xen/arch/riscv/vsbi/legacy-extension.c | 6 + xen/arch/riscv/vtimer.c | 86 +++++++ xen/include/xen/time.h | 11 + 23 files changed, 627 insertions(+), 54 deletions(-) create mode 100644 xen/arch/riscv/domain.c create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231314.1536532 (Exim 4.92) (envelope-from ) id 1vqw2i-0006iQ-68; Fri, 13 Feb 2026 16:29:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231314.1536532; Fri, 13 Feb 2026 16:29:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2i-0006iH-2O; Fri, 13 Feb 2026 16:29:20 +0000 Received: by outflank-mailman (input) for mailman id 1231314; Fri, 13 Feb 2026 16:29:17 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2f-0005Ws-Ol for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:17 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 23c4483a-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:16 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-48375f10628so4521565e9.1 for ; Fri, 13 Feb 2026 08:29:16 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Note that smp_wmb() is used instead of smp_mb__before_atomic() as what we want to guarantee that if a bit in irqs_pending_mask is obversable that the correspondent bit in irqs_pending is observable too. Add lockless tracking of pending vCPU interrupts using atomic bitops. Two bitmaps are introduced: - irqs_pending — interrupts currently pending for the vCPU - irqs_pending_mask — bits that have changed in irqs_pending The design follows a multi-producer, single-consumer model, where the consumer is the vCPU itself. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg(). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. On RISC-V interrupts are not injected via guest registers, so pending interrupts must be recorded in irqs_pending (using the new vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating HVIP before returning control to the guest. The consumer side is implemented in a follow-up patch. A barrier between updating irqs_pending and setting the corresponding mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees that if the consumer observes a mask bit set, the corresponding pending bit is also visible. This prevents missed interrupts during the flush. It is possible that a guest could have pending bit in the hardware register without being marked pending in irq_pending bitmap as: According to the RISC-V ISA specification: Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and interrupt-enable bits for VS-level software interrupts. VSSIP in hip is an alias (writable) of the same bit in hvip. Additionally: When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and hie.VSSIE. This means the guest may modify vsip.SSIP, which implicitly updates hip.VSSIP and the bit being written with 1 would also trigger an interrupt as according to the RISC-V spec: These conditions for an interrupt trap to occur must be evaluated in a bounded amount of time from when an interrupt becomes, or ceases to be, pending in sip, and must also be evaluated immediately following the execution of an SRET instruction or an explicit write to a CSR on which these interrupt trap conditions expressly depend (including sip, sie and sstatus). What means that IRQ_VS_SOFT must be synchronized separately, what is done in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as PMU isn't supported now. For the remaining VS-level interrupt types (IRQ_VS_TIMER and IRQ_VS_EXT), the specification states they cannot be modified by the guest and are read-only because of: Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable bits for VS-level external interrupts. VSEIP is read-only in hip, and is the logical-OR of these interrupt sources: • bit VSEIP of hvip; • the bit of hgeip selected by hstatus.VGEIN; and • any other platform-specific external interrupt signal directed to VS-level. Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the logical-OR of hvip.VSTIP and any other platform-specific timer interrupt signal directed to VS-level. and When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. and also, Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable bits for supervisor-level external interrupts. If implemented, SEIP is read-only in sip, and is set and cleared by the execution environment, typically through a platform-specific interrupt controller. Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable bits for supervisor-level timer interrupts. If implemented, STIP is read-only in sip, and is set and cleared by the execution environment Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() and vcpu_unset_interrupt(), and flush them during the call of vcpu_flush_interrupts() (which is introduced in follow up patch). vcpu_sync_interrupts(), which is called just before entering the VM, slightly bends the rule that the irqs_pending bit must be written first, followed by updating the corresponding bit in irqs_pending_mask. However, it still respects the core guarantee that the producer never clears the mask and only writes to irqs_pending if it is the one that flipped the corresponding mask bit from 0 to 1. Moreover, since the consumer won't run concurrently because vcpu_sync_interrupts() and the consumer path are going to be invoked equentially immediately before VM entry, it is safe to slightly relax this ordering rule in vcpu_sync_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v4: - Update the commit message. - Update the comments in vcpu_(un)set_interrupt() and add the the comment above smp_wmb() barrier. - call vcpu_kick() only if the pending_mask bit going from 0 to 1. - Code style fixes. - Update defintion of RISCV_VCPU_NR_IRQS to cover potential RV128 case and the case if AIA isn't used. - latch current into a local variable in check_for_pcpu_work(). --- Changes in v3: - Use smp_wb() instead of smp_mb__before_atomic(). - Add explanation of the change above in the commit message. - Move vcpu_sync_interrupts() here to producers side. - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() is called. --- Changes in V2: - Move the patch before an introduction of vtimer. - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as vcpu structure starts out all zeros. - Drop const for irq argument of vcpu_{un}set_interrupt(). - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. - Drop IRQ_LOCAL_MAX as there is no usage for it now. --- xen/arch/riscv/domain.c | 71 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 24 ++++++++++ xen/arch/riscv/traps.c | 10 ++++ 3 files changed, 105 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 6c8a6269d791..edbac39a0b18 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -127,3 +128,73 @@ void arch_vcpu_destroy(struct vcpu *v) { vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } + +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) +{ + /* We only allow VS-mode software, timer, and external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + set_bit(irq, v->arch.irqs_pending); + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + if ( !test_and_set_bit(irq, v->arch.irqs_pending_mask) ) + vcpu_kick(v); + + return 0; +} + +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) +{ + /* We only allow VS-mode software, timer, external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + clear_bit(irq, v->arch.irqs_pending); + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + return 0; +} + +void vcpu_sync_interrupts(struct vcpu *v) +{ + unsigned long hvip; + + /* Read current HVIP and VSIE CSRs */ + v->arch.vsie = csr_read(CSR_VSIE); + + /* Sync-up HVIP.VSSIP bit changes done by Guest */ + hvip = csr_read(CSR_HVIP); + if ( ((v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL)) && + !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) ) + { + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + else + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + } + + /* + * Sync-up AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported + * now. + */ +#ifdef CONFIG_RISCV_32 +# error "Update v->arch.vsieh" +#endif +} diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6bb06a50c6ab..2793f694d36f 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,25 @@ struct arch_vcpu { register_t henvcfg; register_t hideleg; register_t hstateen0; + register_t hvip; + + register_t vsie; + + /* + * VCPU interrupts + * + * We have a lockless approach for tracking pending VCPU interrupts + * implemented using atomic bitops. The irqs_pending bitmap represent + * pending interrupts whereas irqs_pending_mask represent bits changed + * in irqs_pending. Our approach is modeled around multiple producer + * and single consumer problem where the consumer is the VCPU itself. + * + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts + * on RV32 host. + */ +#define RISCV_VCPU_NR_IRQS MAX(BITS_PER_LONG, 64) + DECLARE_BITMAP(irqs_pending, RISCV_VCPU_NR_IRQS); + DECLARE_BITMAP(irqs_pending_mask, RISCV_VCPU_NR_IRQS); }; struct paging_domain { @@ -92,6 +111,11 @@ static inline void update_guest_memory_policy(struct vcpu *v, static inline void arch_vcpu_block(struct vcpu *v) {} +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); + +void vcpu_sync_interrupts(struct vcpu *v); + #endif /* ASM__RISCV__DOMAIN_H */ /* diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index c81a4f79a0d2..366c3ff23e76 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -169,6 +169,13 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +static void check_for_pcpu_work(void) +{ + struct vcpu *c = current; + + vcpu_sync_interrupts(c); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -222,6 +229,9 @@ void do_trap(struct cpu_user_regs *cpu_regs) do_unexpected_trap(cpu_regs); break; } + + if ( cpu_regs->hstatus & HSTATUS_SPV ) + check_for_pcpu_work(); } void vcpu_show_execution_state(struct vcpu *v) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231315.1536535 (Exim 4.92) (envelope-from ) id 1vqw2i-0006li-Er; Fri, 13 Feb 2026 16:29:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231315.1536535; Fri, 13 Feb 2026 16:29:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2i-0006ks-Ai; Fri, 13 Feb 2026 16:29:20 +0000 Received: by outflank-mailman (input) for mailman id 1231315; Fri, 13 Feb 2026 16:29:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2g-0005Ws-9f for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:18 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 244823da-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:17 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-483487335c2so10283795e9.2 for ; Fri, 13 Feb 2026 08:29:17 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5ebd1bsm303288185e9.6.2026.02.13.08.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 08:29:16 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 244823da-08f9-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771000157; x=1771604957; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g8aUJGUOJbQQ949TKJQepHTgKcmZAnEVr+LIZcPPPBc=; b=KkL7LK5dQ5g8FSkC6xwQI1ZqKu2evG06cl65FD/eGd6huINpxEtHMABnYwejVV5bFM PedOhtEbYOkEzcsCDtQyaoiNQrH+zsoA3C/8Xc/H5Z8BphJbswnezVQ1NXHsYTTwWZby vIFXVCjl6sWHkASFas1x2urQQTIoIB/VFhUt15uRbR1jkwhD3DjgiesWjVf81LVMt7Sn og6kA8D0bGSuMjdCAGJXkUYtrOvt9WXy91CgYLm7hPuNS3Gi6Z7KMLzXgKQJNhYgSn0c RMDsITiMTlPgY0S5zc6w7GNQ018qw+FvDjf4y897LEJi+j8L0l+uhTr8lVNkwWmczUVs xeiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771000157; x=1771604957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=g8aUJGUOJbQQ949TKJQepHTgKcmZAnEVr+LIZcPPPBc=; b=g2U541nKNuUhbGzKFTRkvkUbc7W7ZgPf/tbKWIA1bZF6pycmUnSSDIox34ztqcbYOK uxsx545SPZdH8IMKuX2pFKcTlLY2uBJ45bATrld+gtzbeg7GCBwT5Ie67x+Ix1jxxIgg yuunn7bcE4tXGK3VxhrjZJ5gGxPnX9t8RNpeeCljGm0ea+O/9NTkRv+qmA4BSyV+j2V5 joZyAYg/ha+iGH6divNyDGySosxZdqCypxcVjvIk9eqia0jl9M+Y2bXfMkNWM9VeAW/n QVPQ2Eaz6L4FxPnwxKlgSAkrp0d55nr//Mt8fo6H60AfFUXBwhWJohXoKxdu+ojsIyu0 Oxmg== X-Gm-Message-State: AOJu0YwxanxZ8lSkDeaSiM4kV7Rnfc0BazuioEp6ZkmsTdIraNQJ7B2/ acK6rKjt7GSiG0gjRiZYlwi4t2J5XOSMONeFQAeqt6Csk0bxbibDUw/7qvCH1mJS X-Gm-Gg: AZuq6aIfnIZGLNvbGgGVzPQNDOOcw/nl8DBDgWPrfReGyab9lnHMs4a/SsvVLtXnb5q 3xl1ighMHKS5I0SWK9pRH3PSIWlGfWJGo8LISFCovnLZYp4ju0zqabsiMS0Jow+34taVYm7Ud52 4bGDWydH7vtsJuwEcWURzM7tzBk/aQgrvVki4H/naeXw+PhlJQdmhJA9aBjRUJkMp0uSSVeLgk1 PzZkfpolEnFMpTQO9yZ+CrhxocpCctcsaC+I1hMnm7RnmqnQz/FTRQ667DANwKEgegESE2OUuza iFkcqwhtBaRr0eVpd43mZ0dJisFDysTXaOfcTjPLF0P9GQeAGlryA/0DWm6xEvm3osh1LKwy6Lu nOZ4raD2kggsjYMso1HF1M4dTwDvb1GOthyPrgUc/L16x9pfpDjqI9oX20+z4s8o/HGdqDKvv+g uZghj8uJv6HmISMAw5j26kWAtFowy1a15Sf0rgpcV5PCUN1Celvmw/UfFi2duDfSo/+Q== X-Received: by 2002:a05:600c:19cc:b0:477:7f4a:44b4 with SMTP id 5b1f17b1804b1-483739fc385mr40414865e9.1.1771000156728; Fri, 13 Feb 2026 08:29:16 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 06/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 2 Date: Fri, 13 Feb 2026 17:28:52 +0100 Message-ID: <4e10c95d883c0d447b9e33a6d6a92e911aed6a23.1770999383.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch is based on Linux kernel 6.16.0. Add the consumer side (vcpu_flush_interrupts()) of the lockless pending interrupt tracking introduced in part 1 (for producers). According, to the design only one consumer is possible, and it is vCPU itself. vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due to the lack of functionality) before the hypervisor returns control to the guest. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg() (with aquire semantics). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. The worst thing which could happen with such approach is that a new pending bit will be set to irqs_pending bitmap during update of hvip variable in vcpu_flush_interrupt() but it isn't problem as the new pending bit won't be lost and just be proceded during the next flush. As AIA specs introduced hviph register which would want to be updated when guest related AIA code vcpu_update_hvip() is introduced instead of just open-code it in vcpu_flush_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v4: - Move defintion of hvip local variable to narrower space in vcpu_flush_interrupts(). - Use initializers for mask and val variables. - Use local variable c as an argument of vcpu_flush_interrupts() in check_for_pcpu_work(). --- Changes in v3: - Update the error message in case of RV32 from "hviph" to v->arch.hviph. - Make const argument of vcpu_update_hvip. - Move local variables mask and val inside if() in vcpu_flush_interrupts(). - Call vcpu_flush_interrupts() in check_pcpu_work(). - Move vcpu_update_hvip() inside if() in vcpu_flush_interrupts(). --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 31 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/traps.c | 2 ++ 3 files changed, 34 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index edbac39a0b18..35d8d5db02d0 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -198,3 +198,34 @@ void vcpu_sync_interrupts(struct vcpu *v) # error "Update v->arch.vsieh" #endif } + +static void vcpu_update_hvip(const struct vcpu *v) +{ + csr_write(CSR_HVIP, v->arch.hvip); +} + +void vcpu_flush_interrupts(struct vcpu *v) +{ + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) + { + register_t *hvip = &v->arch.hvip; + + unsigned long mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); + unsigned long val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; + + *hvip &= ~mask; + *hvip |= val; + + vcpu_update_hvip(v); + } + +/* + * Flush AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't + * supported now. + */ +#ifdef CONFIG_RISCV_32 +# error "Update v->arch.hviph" +#endif +} diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 2793f694d36f..5d25a884eea6 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -115,6 +115,7 @@ int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); void vcpu_sync_interrupts(struct vcpu *v); +void vcpu_flush_interrupts(struct vcpu *v); #endif /* ASM__RISCV__DOMAIN_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 366c3ff23e76..77738a01c8b5 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -174,6 +174,8 @@ static void check_for_pcpu_work(void) struct vcpu *c = current; vcpu_sync_interrupts(c); + + vcpu_flush_interrupts(c); } void do_trap(struct cpu_user_regs *cpu_regs) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231316.1536543 (Exim 4.92) (envelope-from ) id 1vqw2j-0006wz-99; Fri, 13 Feb 2026 16:29:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231316.1536543; Fri, 13 Feb 2026 16:29:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2j-0006v6-1B; Fri, 13 Feb 2026 16:29:21 +0000 Received: by outflank-mailman (input) for mailman id 1231316; Fri, 13 Feb 2026 16:29:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2h-0005Ws-EK for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:19 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 250672fc-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:18 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4807068eacbso9047375e9.2 for ; Fri, 13 Feb 2026 08:29:18 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This is not a practical issue for Arm, as the latest ARM ARM that timer frequency should be fixed at 1 GHz and older platforms used much lower rates, which is shy of 32-bit overflow. As the helpers are declared as static inline, they should not affect x86, which does not use them. On Arm, these helpers were historically implemented as out-of-line functions because the counter frequency was originally defined as static and unavailable to headers [1]. Later changes [2] removed this restriction, but the helpers remained unchanged. Now they can be implemented as static inline without any issues. Centralising the helpers avoids duplication and removes subtle differences between architectures while keeping the implementation simple. Drop redundant includes where already pulls it in. No functional change is intended. [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and XEN_SYSCTL_topologyinfo to common code Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - Add Reviewed-by: Jan Beulich . --- Changes in v2: - Move ns_to_ticks() and ticks_to_ns() to common code. --- xen/arch/arm/include/asm/time.h | 3 --- xen/arch/arm/time.c | 11 ----------- xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/include/asm/time.h | 5 ----- xen/arch/riscv/time.c | 1 + xen/include/xen/time.h | 11 +++++++++++ 6 files changed, 13 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index 49ad8c1a6d47..c194dbb9f52d 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -101,9 +101,6 @@ extern void init_timer_interrupt(void); /* Counter value at boot time */ extern uint64_t boot_count; -extern s_time_t ticks_to_ns(uint64_t ticks); -extern uint64_t ns_to_ticks(s_time_t ns); - void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index cc3fcf47b66a..a12912a106a0 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -27,7 +27,6 @@ #include #include #include -#include #include uint64_t __read_mostly boot_count; @@ -47,16 +46,6 @@ unsigned int timer_get_irq(enum timer_ppi ppi) return timer_irq[ppi]; } -/*static inline*/ s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz); -} - -/*static inline*/ uint64_t ns_to_ticks(s_time_t ns) -{ - return muldiv64(ns, 1000 * cpu_khz, SECONDS(1)); -} - static __initdata struct dt_device_node *timer; #ifdef CONFIG_ACPI diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index d2124b175521..2e85ff2b6e62 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -12,13 +12,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h index 1e7801e2ea0e..be3875b9984e 100644 --- a/xen/arch/riscv/include/asm/time.h +++ b/xen/arch/riscv/include/asm/time.h @@ -24,11 +24,6 @@ static inline cycles_t get_cycles(void) return csr_read(CSR_TIME); } -static inline s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, MILLISECS(1), cpu_khz); -} - void preinit_xen_time(void); #endif /* ASM__RISCV__TIME_H */ diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index e962f8518d78..2c7af0a5d63b 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -4,6 +4,7 @@ #include #include #include +#include #include unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index fe0d7a578a99..2185dd26a439 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -8,6 +8,7 @@ #ifndef __XEN_TIME_H__ #define __XEN_TIME_H__ +#include #include #include @@ -75,6 +76,16 @@ extern void send_timer_event(struct vcpu *v); void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds); +static inline s_time_t ticks_to_ns(uint64_t ticks) +{ + return muldiv64(ticks, MILLISECS(1), cpu_khz); +} + +static inline uint64_t ns_to_ticks(s_time_t ns) +{ + return muldiv64(ns, cpu_khz, MILLISECS(1)); +} + #include #endif /* __XEN_TIME_H__ */ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231317.1536562 (Exim 4.92) (envelope-from ) id 1vqw2l-0007Vc-Gn; Fri, 13 Feb 2026 16:29:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231317.1536562; Fri, 13 Feb 2026 16:29:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2l-0007VL-CD; Fri, 13 Feb 2026 16:29:23 +0000 Received: by outflank-mailman (input) for mailman id 1231317; Fri, 13 Feb 2026 16:29:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2j-0005Ws-Mw for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:21 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2662e47b-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:21 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4801c2fae63so9492955e9.2 for ; Fri, 13 Feb 2026 08:29:21 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5ebd1bsm303288185e9.6.2026.02.13.08.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 08:29:19 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2662e47b-08f9-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771000160; x=1771604960; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kdt9zTgNaD55TiolqekfCQfWMrmcIrSemZ65SdGjqak=; b=dBQ0nRTCHweC5QwMTInlZ0sms8AD5jcJ69n07cxnCMyytWS4ZmJER85KBi+ExFYWui nReDV0yGAOeW9XL5PQUNbaWvFQB1h+XQG2s1hVen3nGYAO3ybEoF7X/k2F3rP+ACEny6 8X1j2IP9sz/uF45xAqjL1RjCE3oMx1ZXZgufQnIbNsDZ+Fa329C6lOEGczJ3KeowUSyB tRgy6WYAsKWYL+XSerM/XivSc83qJkLF0RpB0JASjJ7VNwjssl9PVRyj29vOKrFwVBHg BZPakqr/+mUdlhbTAiQJid3/taSFf1/vlLVrdAgiaTzhha0ApWxMSY1x8e7I+bwBRVrA b5mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771000160; x=1771604960; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=kdt9zTgNaD55TiolqekfCQfWMrmcIrSemZ65SdGjqak=; b=iyHWnzHqj4DxphXK5hdldBMoMfN03W32ifyb0GoOlI/t4vZLgWs/L8rqx2kMLwsP6G j4tsJBr/bYe0zNyoB8XsQZl1dl/E9jckZiZq7OPCy1hybzmyYUy6dhls5kbXZMHTU6z1 zkWnfqEYyvF6oa87opvXdDW+Rqyt4b/qwIcAOcS6zGBIrua6ulmHAaN5TilWVMkiwW+j sbpzsnserQ5v1/FFT4b1lV1oMlM8FuVksSOSG+MWTtR5bujn242Pci0yoaaOgKDqlJdJ 2rEQnuG6A/bFGQSlfvTsOQW1xIdh/rlJidmPvm2U0d/j/ES2sXS6USoyM40rhfyRhB1N vCVg== X-Gm-Message-State: AOJu0YwTRzJqBua2MjEKTdTuaKYPRlaoxVbXYZXnX2zoU++BMLWFrEOI wzROZtG00yg0e4v2fICe1OpGKlzTHDZLd9tbVSVoSYPBDA2zeGKnD4S+4Uf5JrbD X-Gm-Gg: AZuq6aJUmXt0YRv4kJ/0d/cWWQpUdjM81j+V5eZ+ZMPthUV9Qo2/gu6FMYLj8a4dIJV obCB++sV7gnDQSXZcQldyW+t88hk5HPoWJ8IynFPIvxw9nzHH9YJhr0W7mb9PQVfKaix/9Ma43h qWqS6kkEZYX+77akmvrH59x2nC6iG2p6+Va6Ug8AffTAgrUfwYSDKAeckb8foxczhgMxyI9VmKr /Cs6M/tXgt/SPjb0f2lZNPK7FLPymcr/u7rZziTWU3CGmbZI9LNrJA1tqTgbXsZ8SPB0IatmVDE YjC4shtdQLME5KnX0zo4Xve9jdiC2+L4KZKmiGv/hlO6a1+OQ9S6wPGOqIXsqK7LkjVDVuzF0cW smNZiteQl26xsoMkaFIef+nj+MnjK8c5X3xYLNeyqwE7aGNfQnhEbCm+9l2ErX8nHchpQopybRH NP+17g8pJRpY5GA1yRvOvBIM1qKQZt7QoT/F/DIUDE5v2iBnPucUlvS3ggggJNbBr3Bw== X-Received: by 2002:a05:600c:8411:b0:477:7af8:c88b with SMTP id 5b1f17b1804b1-48371051b20mr45916945e9.11.1771000160166; Fri, 13 Feb 2026 08:29:20 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 09/16] xen/riscv: introduce vcpu_kick() implementation Date: Fri, 13 Feb 2026 17:28:55 +0100 Message-ID: <478b18f4eff1e0149b3514ad17b45745295196d3.1770999383.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a RISC-V implementation of vcpu_kick(), which unblocks the target vCPU and sends an event check IPI if the vCPU was running on another processor. This mirrors the behavior of Arm and enables proper vCPU wakeup handling on RISC-V. Remove the stub implementation from stubs.c, as it is now provided by arch/riscv/domain.c. Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, for example, by randconfig what will lead to CI build issues. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - Add asm/perfc_defn.h to provide vcpu_kick perfcoounter to cover the case when CONFIG_PERF_COUNTERS=y. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/domain.c | 14 ++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/perfc_defn.h | 3 +++ xen/arch/riscv/stubs.c | 5 ----- 4 files changed, 17 insertions(+), 6 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 45a7f0d1da7e..307da467c72e 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include #include +#include #include #include @@ -235,3 +237,15 @@ void vcpu_flush_interrupts(struct vcpu *v) # error "Update v->arch.hviph" #endif } + +void vcpu_kick(struct vcpu *v) +{ + bool running = v->is_running; + + vcpu_unblock(v); + if ( running && v != current ) + { + perfc_incr(vcpu_kick); + smp_send_event_check_mask(cpumask_of(v->processor)); + } +} diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index 3824f31c395c..86c56251d5d7 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -7,7 +7,6 @@ generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h generic-y += percpu.h -generic-y += perfc_defn.h generic-y += random.h generic-y += softirq.h generic-y += vm_event.h diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h new file mode 100644 index 000000000000..8a4b945df662 --- /dev/null +++ b/xen/arch/riscv/include/asm/perfc_defn.h @@ -0,0 +1,3 @@ +/* This file is intended to be included multiple times. */ + +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index c5784a436574..1f0add97b361 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -208,11 +208,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_kick(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - unsigned long hypercall_create_continuation(unsigned int op, const char *format, ...) { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231318.1536568 (Exim 4.92) (envelope-from ) id 1vqw2m-0007Zb-5V; Fri, 13 Feb 2026 16:29:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231318.1536568; Fri, 13 Feb 2026 16:29:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2l-0007YT-Or; Fri, 13 Feb 2026 16:29:23 +0000 Received: by outflank-mailman (input) for mailman id 1231318; Fri, 13 Feb 2026 16:29:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2k-0005Wn-5Y for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:22 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 25e5c8fd-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:20 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4833115090dso10076225e9.3 for ; Fri, 13 Feb 2026 08:29:20 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4834d5ebd1bsm303288185e9.6.2026.02.13.08.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 08:29:18 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 25e5c8fd-08f9-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771000159; x=1771604959; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U12wg7j2L+OzyyqYL/Nhiy8muuFfmghvCXhWj5eSfXY=; b=HNzZqAzJCc5molMLJ+UjmCnCZMeS5Q0NGdGy6uVA2NuPfj3K2+GOLQV9kG9+J6R2Ue LWLfyvlLD39VYBoqFLlMhfbQQ9e70FcQuGWQ3GPNj9LWDFqeyuT6OM34731tpTImifLb Iu1MVS6YrBlKUH8B8I5ZtNkK/+LqNpmWbEBxNMjCZDDeEPSLrEbMKwJZe63Wj0YVWbho SZtzbIxlBG4QHbdMbqj1569je3l2J95R4NeVlwvpVtLxMYKmpJ//p9RNCogG8oK9KNtl dKR5jpFrhRlzX7RQdAdmeEfB25eyCuSm9ZTEhlx5+xEIn9PeYgXS38NqyE+KQ2BJ+NBs jUHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771000159; x=1771604959; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=U12wg7j2L+OzyyqYL/Nhiy8muuFfmghvCXhWj5eSfXY=; b=HsyyMfYopeonN2VQbx+MmRK9BbVFS+6KDgOLy/gZfKMKebhNxeHVcOugEiFS4stRPW vt06E+5jbM93d16oWoNCO7YIW6aBaRNXDofrFDiEVAfvzZ9BcguT0l9Il24Q2vdDY+Z4 bpRmU2XvvrMvTuKwAiV9SApkMHyUUsdviu8ze1n4y2IIvDEc4/KHIOyYrA0spB+pzln1 /iT9vlPsmOTn9sq5KW9zWArBcts5ce0Jfj2F3FcP7H2pZe8DnEo6kDixjKw4Fms3koWd fJ6ExGXpLpG6vEDHr34P5e1GZuFd/xJc4EvWaQpz94C+pRHjoCtoP8xwQBwo9/CYAC0J FRtw== X-Gm-Message-State: AOJu0YyQ+SRxNxVBN43DIAHKNRLR7rJ+8vlNffmgZjNohdM4JHKHzmbn NFRIC7WbfY5kiG86gpmv4kYfwrez1aHhhqJbNsUVl8DcXbj+YniVgTkvU3RCDTkk X-Gm-Gg: AZuq6aL5tOANSs5otA4dii4d3eoWJr2RPT0ciPQ5F2aC0z1qmU6HEmduiK5/BcOAH3f zoLVoEmbuUFD9WQ2rEfyig6OnEeHJplmpWZjNCgfe8hgMcmTmLriroAW6OHJrzpmcS4SX/U6XRJ VuQuqcI/eTuxkY1TusqHi7HjjsqQP9a3KQh7KLneYFoSZmnNqPM+US9xPqQW1oeFw4+NmP7CXYL vA4jxbZIxqu/qaHyi8tWb0V1Xq4yd1+ogUN8Yb/ix0pWnBzXS/2SEWB3k0ouTcMjgthxMkgSTcw bPSXS+bjRyrUJtRnDkBnohfIvUkegzj8DGNi/UyenTvga/pgOeTNgo6fgl/obWIzCJTcpwOXEt4 /kSEVo2C7luaf+5bgJoVlCvcenmnuiulASiKSqqiro+O5IHPbcLp9dcF63kiB1iEGWxGBxWJ+AY aFRrnIlbGtomWJw8MP4IFBohsYRgmHO5VnXlwndRCVdtcWspUKwbJ/QAoaX1NzKlp1GZU2vQ== X-Received: by 2002:a05:600c:4745:b0:483:6bb1:117 with SMTP id 5b1f17b1804b1-48373a7591amr33578375e9.32.1771000159094; Fri, 13 Feb 2026 08:29:19 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 08/16] xen/riscv: introduce basic vtimer infrastructure for guests Date: Fri, 13 Feb 2026 17:28:54 +0100 Message-ID: <7426e2d974bfe67786c67709d487c7f64c22ae58.1770999383.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Lay the groundwork for guest timer support by introducing a per-vCPU virtual timer backed by Xen’s common timer infrastructure. The virtual timer is programmed in response to the guest SBI sbi_set_timer() call and injects a virtual supervisor timer interrupt into the vCPU when it expires. While a dedicated struct vtimer is not strictly required at present, it is expected to become necessary once SSTC support is introduced. In particular, it will need to carry additional state such as whether SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) to be saved and restored across context switches, and time delta state (e.g. HTIMEDELTA) required for use cases such as migration. Introducing struct vtimer now avoids a later refactoring. Signed-off-by: Oleksii Kurochko --- Changes in v4: - Add vcpu_timer_destroy() to void arch_vcpu_destroy(). --- Changes in v3: - use one container_of() to get vcpu instead of two container_of()s. --- Changes in v2: - Drop domain_vtimer_init() as it does nothing. - Drop "struct vcpu *v;" from struct vtimer as it could be taken from arch_vcpu using container_of(). - Drop vtimer_initialized, use t->status == TIMER_STATUS_invalid instead to understand if timer was or wasn't initialized. - Drop inclusion of xen/domain.h as xen/sched.h already includes it. - s/ xen/time.h/ xen.timer.h in vtimer.c. - Drop ULL in if-conidtion in vtimer_set_timer() as with the cast it isn't necessary to have suffix ULL. - Add migrate timer to vtimer_set_timer() to be sure that vtimer will occur on pCPU it was ran, so the signalling to that vCPU will (commonly) be cheaper. - Check if the timeout has already expired and just inject the event in vtimer_vtimer_set_timer(). - Drop const for ticks argument of vtimer_set_timer(). - Merge two patches to one: - xen/riscv: introduce vtimer - xen/riscv: introduce vtimer_set_timer() and vtimer_expired() --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 10 +++- xen/arch/riscv/include/asm/domain.h | 3 ++ xen/arch/riscv/include/asm/vtimer.h | 20 ++++++++ xen/arch/riscv/vtimer.c | 71 +++++++++++++++++++++++++++++ 5 files changed, 103 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index bc47e83b26d7..ffbd7062e214 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,6 +22,7 @@ obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ +obj-y += vtimer.o $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 35d8d5db02d0..45a7f0d1da7e 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include struct csr_masks __ro_after_init csr_masks; @@ -108,11 +109,14 @@ int arch_vcpu_create(struct vcpu *v) vcpu_csr_init(v); + if ( (rc = vcpu_vtimer_init(v)) ) + goto fail; + /* - * As the vtimer and interrupt controller (IC) are not yet implemented, + * As interrupt controller (IC) is not yet implemented, * return an error. * - * TODO: Drop this once the vtimer and IC are implemented. + * TODO: Drop this once IC is implemented. */ rc = -EOPNOTSUPP; goto fail; @@ -126,6 +130,8 @@ int arch_vcpu_create(struct vcpu *v) void arch_vcpu_destroy(struct vcpu *v) { + vcpu_timer_destroy(v); + vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 5d25a884eea6..3da2387cb197 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -8,6 +8,7 @@ #include #include +#include struct vcpu_vmid { uint64_t generation; @@ -49,6 +50,8 @@ struct arch_vcpu { struct cpu_info *cpu_info; + struct vtimer vtimer; + register_t hcounteren; register_t hedeleg; register_t henvcfg; diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h new file mode 100644 index 000000000000..0d1555511755 --- /dev/null +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * (c) 2023-2024 Vates + */ + +#ifndef ASM__RISCV__VTIMER_H +#define ASM__RISCV__VTIMER_H + +#include + +struct vtimer { + struct timer timer; +}; + +int vcpu_vtimer_init(struct vcpu *v); +void vcpu_timer_destroy(struct vcpu *v); + +void vtimer_set_timer(struct vtimer *t, uint64_t ticks); + +#endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c new file mode 100644 index 000000000000..32d142bcdfcd --- /dev/null +++ b/xen/arch/riscv/vtimer.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include + +static void vtimer_expired(void *data) +{ + struct vtimer *t = data; + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + + vcpu_set_interrupt(v, IRQ_VS_TIMER); +} + +int vcpu_vtimer_init(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + init_timer(&t->timer, vtimer_expired, t, v->processor); + + return 0; +} + +void vcpu_timer_destroy(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + if ( t->timer.status == TIMER_STATUS_invalid ) + return; + + kill_timer(&v->arch.vtimer.timer); +} + +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) +{ + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + s_time_t expires = ticks_to_ns(ticks - boot_clock_cycles); + + vcpu_unset_interrupt(v, IRQ_VS_TIMER); + + /* + * According to the RISC-V sbi spec: + * If the supervisor wishes to clear the timer interrupt without + * scheduling the next timer event, it can either request a timer + * interrupt infinitely far into the future (i.e., (uint64_t)-1), + * or it can instead mask the timer interrupt by clearing sie.STIE CSR + * bit. + */ + if ( ticks == ((uint64_t)~0) ) + { + stop_timer(&t->timer); + + return; + } + + if ( expires < NOW() ) + { + /* + * Simplify the logic if the timeout has already expired and just + * inject the event. + */ + stop_timer(&t->timer); + vcpu_set_interrupt(v, IRQ_VS_TIMER); + + return; + } + + migrate_timer(&t->timer, smp_processor_id()); + set_timer(&t->timer, expires); +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231321.1536582 (Exim 4.92) (envelope-from ) id 1vqw2o-00085w-Ib; Fri, 13 Feb 2026 16:29:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231321.1536582; Fri, 13 Feb 2026 16:29:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2o-00085d-Dl; Fri, 13 Feb 2026 16:29:26 +0000 Received: by outflank-mailman (input) for mailman id 1231321; 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At present, vtimer_ctxt_switch_from() is a no-op because the RISC-V SSTC extension, which provides a virtualization-aware timer, is not yet supported. Xen therefore relies the virtual (SBI-based) timer. The virtual timer uses Xen's internal timer infrastructure and must be associated with the pCPU on which the vCPU is currently running so that timer events can be delivered efficiently. As a result, vtimer_ctxt_switch_to() migrates the timer to the target pCPU when a vCPU is scheduled in. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - s/vtimer_ctx_switch_to/vtimer_ctxt_switch_to - s/vtimer_ctx_switch_from/vtimer_ctxt_switch_from - Add Acked-by: Jan Beulich . --- Changes in v2: - Align the parameters names for vtimer_ctx_switch_from() and vtimer_ctx_switch_to() in declarations to match the ones in the defintions to make Misra happy. - s/vtimer_save/vtimer_ctx_switch_from. - s/vtimer_restore/vtimer_ctx_switch_to. - Update the commit message. --- xen/arch/riscv/include/asm/vtimer.h | 3 +++ xen/arch/riscv/vtimer.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h index 0d1555511755..c70b0226515e 100644 --- a/xen/arch/riscv/include/asm/vtimer.h +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -17,4 +17,7 @@ void vcpu_timer_destroy(struct vcpu *v); void vtimer_set_timer(struct vtimer *t, uint64_t ticks); +void vtimer_ctxt_switch_from(struct vcpu *p); +void vtimer_ctxt_switch_to(struct vcpu *n); + #endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c index 32d142bcdfcd..afd8a53a7387 100644 --- a/xen/arch/riscv/vtimer.c +++ b/xen/arch/riscv/vtimer.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include @@ -69,3 +70,17 @@ void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) migrate_timer(&t->timer, smp_processor_id()); set_timer(&t->timer, expires); } + +void vtimer_ctxt_switch_from(struct vcpu *p) +{ + ASSERT(!is_idle_vcpu(p)); + + /* Nothing to do at the moment as SSTC isn't supported now. */ +} + +void vtimer_ctxt_switch_to(struct vcpu *n) +{ + ASSERT(!is_idle_vcpu(n)); + + migrate_timer(&n->arch.vtimer.timer, n->processor); +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231323.1536587 (Exim 4.92) (envelope-from ) id 1vqw2p-00088w-4Z; Fri, 13 Feb 2026 16:29:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231323.1536587; Fri, 13 Feb 2026 16:29:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2o-00087X-Mt; Fri, 13 Feb 2026 16:29:26 +0000 Received: by outflank-mailman (input) for mailman id 1231323; Fri, 13 Feb 2026 16:29:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2n-0005Wn-5p for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:25 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 27cab0c3-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:23 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4836e3288cdso6974395e9.0 for ; Fri, 13 Feb 2026 08:29:23 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler now programs the vCPU’s virtual timer via vtimer_set_timer() and returns SBI_SUCCESS. This enables guests using the legacy SBI timer interface to schedule timer events correctly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3 - v4: - Nothing changed. Only rebase. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/vsbi/legacy-extension.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c index 2e8df191c295..090c23440cea 100644 --- a/xen/arch/riscv/vsbi/legacy-extension.c +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -7,6 +7,7 @@ #include #include +#include static void vsbi_print_char(char c) { @@ -44,6 +45,11 @@ static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, ret = SBI_ERR_NOT_SUPPORTED; break; + case SBI_EXT_0_1_SET_TIMER: + vtimer_set_timer(¤t->arch.vtimer, regs->a0); + regs->a0 = SBI_SUCCESS; + break; + default: /* * TODO: domain_crash() is acceptable here while things are still under -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231324.1536590 (Exim 4.92) (envelope-from ) id 1vqw2p-0008E2-F3; Fri, 13 Feb 2026 16:29:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231324.1536590; Fri, 13 Feb 2026 16:29:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2p-0008Cb-6R; Fri, 13 Feb 2026 16:29:27 +0000 Received: by outflank-mailman (input) for mailman id 1231324; Fri, 13 Feb 2026 16:29:26 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2o-0005Wn-6I for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:26 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 287a6297-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:24 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-48371119eacso10399525e9.2 for ; Fri, 13 Feb 2026 08:29:24 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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If the TIME extension is not available, fall back to the legacy timer mechanism. This is useful when Xen runs as a guest under another Xen, because the TIME extension is not currently virtualised and therefore will not appear as available. Despite of the fact that sbi_set_timer_v01 is introduced and used as fall back, SBI v0.1 still isn't fully supported (with the current SBI calls usage, sbi_rfence_v01 should be introduced too), so panic() in sbi_init() isn't removed. The sbi_set_timer() pointer will be used by reprogram_timer() to program Xen’s physical timer as without SSTC extension there is no any other option except SBI call to do that as only M-timer is available for us. Use dprintk() for all the cases to print that a speicifc SBI extension is available as it isn't really necessary in case of release builds. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Add "stime_value is in absolute time" to the comment above declaration of sbi_set_timer() function pointer. - Add Acked-by: Jan Beulich . --- Changes in v3: - Init sbi_set_timer with sbi_set_timer_v01 as fallback value. - Sort SBI IDs in the same way as SBI EXT IDs are declared. - Add __ro_after_init for sbi_set_timer variable. - use dprintk instead of printk to print information if SBI ext is available. --- Changes in v2: - Move up defintion of SBI_EXT_TIME_SET_TIMER and use the same padding as defintions around it. - Add an extra comment about stime_value granuality above declaration of sbi_set_timer function pointer. - Refactor implemetation of sbi_set_timer_v02(). - Provide fallback for sbi_set_timer_v01(). - Update the commit message. --- xen/arch/riscv/include/asm/sbi.h | 21 +++++++++++++++++ xen/arch/riscv/sbi.c | 40 +++++++++++++++++++++++++++++++- 2 files changed, 60 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index 79f7ff5c5501..e612f49e425b 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -29,6 +29,7 @@ #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 +#define SBI_EXT_TIME 0x54494D45 /* SBI function IDs for BASE extension */ #define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 @@ -48,6 +49,9 @@ #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 +/* SBI function IDs for TIME extension */ +#define SBI_EXT_TIME_SET_TIMER 0x0 + #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f000000 #define SBI_SPEC_VERSION_MINOR_MASK 0x00ffffff @@ -134,6 +138,23 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, size_t size, unsigned long vmid); +/* + * Programs the clock for next event after stime_value time. stime_value is in + * absolute time. This function must clear the pending timer interrupt bit as + * well. + * + * If the supervisor wishes to clear the timer interrupt without scheduling the + * next timer event, it can either request a timer interrupt infinitely far + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer + * interrupt by clearing sie.STIE CSR bit. + * + * The stime_value parameter represents absolute time measured in ticks. + * + * This SBI call returns 0 upon success or an implementation specific negative + * error code. + */ +extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); + /* * Initialize SBI library * diff --git a/xen/arch/riscv/sbi.c b/xen/arch/riscv/sbi.c index 425dce44c679..b4a7ae6940c1 100644 --- a/xen/arch/riscv/sbi.c +++ b/xen/arch/riscv/sbi.c @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, unsigned long arg4, unsigned long arg5); +static int cf_check sbi_set_timer_v02(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +static int cf_check sbi_set_timer_v01(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +int (* __ro_after_init sbi_set_timer)(uint64_t stime_value) = sbi_set_timer_v01; + int sbi_remote_sfence_vma(const cpumask_t *cpu_mask, vaddr_t start, size_t size) { @@ -324,7 +356,13 @@ int __init sbi_init(void) if ( sbi_probe_extension(SBI_EXT_RFENCE) > 0 ) { sbi_rfence = sbi_rfence_v02; - printk("SBI v0.2 RFENCE extension detected\n"); + dprintk(XENLOG_INFO, "SBI v0.2 RFENCE extension detected\n"); + } + + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) + { + sbi_set_timer = sbi_set_timer_v02; + dprintk(XENLOG_INFO, "SBI v0.2 TIME extension detected\n"); } } else -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:29:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:29:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231326.1536609 (Exim 4.92) (envelope-from ) id 1vqw2s-0000Q8-7F; Fri, 13 Feb 2026 16:29:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231326.1536609; Fri, 13 Feb 2026 16:29:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2r-0000Op-Pw; Fri, 13 Feb 2026 16:29:29 +0000 Received: by outflank-mailman (input) for mailman id 1231326; Fri, 13 Feb 2026 16:29:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2p-0005Wn-7Z for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:27 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 291e1003-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:25 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso8778525e9.0 for ; Fri, 13 Feb 2026 08:29:25 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The privileged architecture only defines machine-mode timer interrupts (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) is optional and is not supported on the boards available to me, so the only viable approach today is to program the timer through SBI. reprogram_timer() enables/disables the supervisor timer interrupt and programs the next timer deadline using sbi_set_timer(). If the SBI call fails, the code panics, because sbi_set_timer() is expected to return either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to the latest ones). The SBI spec does not define a standard negative error code for this call, and without SSTC there is no alternative method to program the timer, so the SBI timer call must be available. reprogram_timer() currently returns int for compatibility with the existing prototype. While it might be cleaner to return bool, keeping the existing signature avoids premature changes in case sbi_set_timer() ever needs to return other values (based on which we could try to avoid panic-ing) in the future. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Correct the comments in reprogram_timer(). - Move enablement of timer interrupt after sbi_set_timer() to avoid potentially receiving a timer interrupt between these 2 operations. --- Changes in v2: - Add TODO comment above sbi_set_timer() call. - Update the commit message. --- xen/arch/riscv/stubs.c | 5 ----- xen/arch/riscv/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 1f0add97b361..cb7546558b8e 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -21,11 +21,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; /* time.c */ -int reprogram_timer(s_time_t timeout) -{ - BUG_ON("unimplemented"); -} - void send_timer_event(struct vcpu *v) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 2c7af0a5d63b..7efa76fdbcb1 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -7,6 +7,9 @@ #include #include +#include +#include + unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ uint64_t __ro_after_init boot_clock_cycles; @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) cpu_khz = rate / 1000; } +int reprogram_timer(s_time_t timeout) +{ + uint64_t deadline, now; + int rc; + + if ( timeout == 0 ) + { + /* Disable timer interrupt */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; + } + + deadline = ns_to_ticks(timeout) + boot_clock_cycles; + now = get_cycles(); + if ( deadline <= now ) + return 0; + + /* + * TODO: When the SSTC extension is supported, it would be preferable to + * use the supervisor timer registers directly here for better + * performance, since an SBI call and mode switch would no longer + * be required. + * + * This would also reduce reliance on a specific SBI implementation. + * For example, it is not ideal to panic() if sbi_set_timer() returns + * a non-zero value. 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The handler disables further timer interrupts by clearing SIE.STIE and raises TIMER_SOFTIRQ so the generic timer subsystem can perform its processing. Update do_trap() to dispatch IRQ_S_TIMER to this new handler. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Drop cause argument of timer_interrupt() as it isn't used inside the function and anyway it is pretty clear what is the cause inside timer_interrupt(). --- xen/arch/riscv/traps.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 77738a01c8b5..ce8d346a14d2 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -178,6 +179,15 @@ static void check_for_pcpu_work(void) vcpu_flush_interrupts(c); } +static void timer_interrupt(void) +{ + /* Disable the timer to avoid more interrupts */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + /* Signal the generic timer code to do its work */ + raise_softirq(TIMER_SOFTIRQ); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -219,6 +229,10 @@ void do_trap(struct cpu_user_regs *cpu_regs) intc_handle_external_irqs(cpu_regs); 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> >> > >> if ( fns == NULL ) > >> + { > >> + if ( !IS_ENABLED(CONFIG_PV) ) > >> + panic("HVM support not detected and PV compiled-out\n"); > > As with Rogers feedback on the next patch, this wording isn't ideal.  > How about: > > "HVM support required but not available\n". > > This is reachable for people who use cpuid=no-vmx,no-svm but they get to > keep all the pieces and the documentation already has a general warning > about this kind of stuff. Hm, yes, I forgot to comment on this one. > > >> + > >> return 0; > >> + } > >> > >> +#ifdef CONFIG_PV > > CONFIG_HVM I think? > > No - CONFIG_PV is correct here, because we're inside an HVM-only file.  > It's the only case where this variable exists for real. Oh, I see. Yes, those are the right guards, otherwise the variable is hardcoded to IS_ENABLED(CONFIG_HVM). Sorry, my bad. It's a bit ugly to have to do it with such ifdefs, but right now I don't see a better way. Thanks, Roger. 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As VSATP and HGATP cannot be updated atomically, clear VSATP on context switch-out to prevent speculative VS-stage translations from being associated with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the required order. Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes only when required (e.g. on VMID reuse or generation change). This provides the necessary infrastructure for correct p2m context switching on RISC-V. Signed-off-by: Oleksii Kurochko --- Changes in v3: - Add comment above p2m_ctxt_switch_{to, from}(). - Code style fixes. - Refactor p2m_ctxt_switch_to(). - Update the comment at the end of p2m_ctxt_switch_from(). - Refactor the code of p2m_handle_vmenter(). --- Changes in v2: - Add vsatp field declaration to arch_vcpu. - s/p2m_ctx_switch_{from,to}/p2m_ctxt_switch_{from,to}. - Introduce p2m_handle_vmenter() for proper handling of VMID, hgatp and vsatp updates. - Introduce is_p2m_switch_finished and init it inisde p2m_ctx_switch_to() for furhter handling in p2m_handle_vmenter(). - Code style fixes. - Add is_idle_vcpu() check in p2m_ctxt_switch_from(). - use csr_swap() in p2m_ctxt_switch_from(). - move flush_tlb_guest_local() to the end if p2m_handle_vmenter() and drop unnessary anymore comments. - Correct printk()'s arguments in p2m_handle_vmenter(). --- xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/p2m.h | 4 ++ xen/arch/riscv/p2m.c | 79 +++++++++++++++++++++++++++++ xen/arch/riscv/traps.c | 2 + 4 files changed, 86 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 3da2387cb197..42bb678fcbf9 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -59,6 +59,7 @@ struct arch_vcpu { register_t hstateen0; register_t hvip; + register_t vsatp; register_t vsie; /* diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index f63b5dec99b1..60f27f9b347e 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, p2m_type_t *t); +void p2m_ctxt_switch_from(struct vcpu *p); +void p2m_ctxt_switch_to(struct vcpu *n); +void p2m_handle_vmenter(void); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 0abeb374c110..7ae854707174 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, return get_page(page, p2m->domain) ? page : NULL; } + +/* Should be called before other CSRs are stored to avoid speculation */ +void p2m_ctxt_switch_from(struct vcpu *p) +{ + if ( is_idle_vcpu(p) ) + return; + + /* + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value what will be done in + * p2m_handle_vmenter(). + */ + p->arch.vsatp = csr_swap(CSR_VSATP, 0); + + /* + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() + * or/and in p2m_handle_vmenter(). + */ +} + +/* Should be called after other CSRs are restored to avoid speculation */ +void p2m_ctxt_switch_to(struct vcpu *n) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); + + if ( is_idle_vcpu(n) ) + return; + + csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); + /* + * As VMID is unique per vCPU and just re-used here thereby there is no + * need for G-stage TLB flush here. + */ + + csr_write(CSR_VSATP, n->arch.vsatp); + /* + * As at the start of context switch VSATP were set to 0, so no speculation + * could happen thereby there is no need for VS TLB flush here. + */ +} + +void p2m_handle_vmenter(void) +{ + struct vcpu *c = current; + struct p2m_domain *p2m = p2m_get_hostp2m(c->domain); + struct vcpu_vmid *p_vmid = &c->arch.vmid; + uint16_t old_vmid, new_vmid; + bool need_flush; + + BUG_ON(is_idle_vcpu(current)); + + old_vmid = p_vmid->vmid; + need_flush = vmid_handle_vmenter(p_vmid); + new_vmid = p_vmid->vmid; + +#ifdef P2M_DEBUG + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", + c, old_vmid, new_vmid, need_flush); +#endif + + if ( old_vmid != new_vmid ) + csr_write(CSR_HGATP, construct_hgatp(p2m, p_vmid->vmid)); + + if ( unlikely(need_flush) ) + { + local_hfence_gvma_all(); + flush_tlb_guest_local(); + } + + /* + * There is no need to set VSATP to 0 to stop speculation before updating + * HGATP, as VSATP is not modified here. There is also no need to flush + * the VS-stage TLB: even if speculation occurs, it will use the old VMID, + * which will not be reused until need_flush is set to true. + */ +} diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ce8d346a14d2..7ef089809734 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -177,6 +177,8 @@ static void check_for_pcpu_work(void) vcpu_sync_interrupts(c); vcpu_flush_interrupts(c); + + p2m_handle_vmenter(); } static void timer_interrupt(void) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:37:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:37:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231445.1536651 (Exim 4.92) (envelope-from ) id 1vqwAz-0006pO-Fd; Fri, 13 Feb 2026 16:37:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231445.1536651; Fri, 13 Feb 2026 16:37:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqwAz-0006pH-CO; Fri, 13 Feb 2026 16:37:53 +0000 Received: by outflank-mailman (input) for mailman id 1231445; Fri, 13 Feb 2026 16:37:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2s-0005Wn-B7 for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:30 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2a88587e-08f9-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 17:29:28 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-48069a48629so10260255e9.0 for ; Fri, 13 Feb 2026 08:29:27 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Update the commit message. - Move implementation of sync_vcpu_execstate() to separate commit as it doesn't connect to tasklet subsystem. --- xen/arch/riscv/setup.c | 3 +++ xen/arch/riscv/stubs.c | 10 ---------- 2 files changed, 3 insertions(+), 10 deletions(-) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index dc469b49623f..5843609350aa 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -152,6 +153,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, panic("Booting using ACPI isn't supported\n"); } + tasklet_subsys_init(); + init_IRQ(); riscv_fill_hwcap(); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index cb7546558b8e..26434166acc6 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -91,16 +91,6 @@ void continue_running(struct vcpu *same) BUG_ON("unimplemented"); } -void sync_local_execstate(void) -{ - BUG_ON("unimplemented"); -} - -void sync_vcpu_execstate(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - void startup_cpu_idle_loop(void) { BUG_ON("unimplemented"); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 16:38:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 16:38:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231469.1536661 (Exim 4.92) (envelope-from ) id 1vqwBS-0007i5-TN; Fri, 13 Feb 2026 16:38:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231469.1536661; Fri, 13 Feb 2026 16:38:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqwBS-0007hy-Qg; Fri, 13 Feb 2026 16:38:22 +0000 Received: by outflank-mailman (input) for mailman id 1231469; Fri, 13 Feb 2026 16:38:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqw2r-0005Ws-ED for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 16:29:29 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2b0d0c2d-08f9-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 17:29:28 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-48329eb96a7so6943105e9.3 for ; Fri, 13 Feb 2026 08:29:28 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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RISC-V does not support lazy context switching, so nothing is done in sync_vcpu_execstate() and sync_local_execstate(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4: - Drop footer as [PATCH] sched: move vCPU exec state barriers is merged to upstream/staging. - Add Acked-by: Jan Beulich . --- Changes in v3: - Align sync_vcpu_execstate() with patch: [PATCH] sched: move vCPU exec state barriers --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 307da467c72e..6d3d7277bf8f 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -249,3 +249,13 @@ void vcpu_kick(struct vcpu *v) smp_send_event_check_mask(cpumask_of(v->processor)); } } + +void sync_local_execstate(void) +{ + /* Nothing to do -- no lazy switching */ +} + +void sync_vcpu_execstate(struct vcpu *v) +{ + /* Nothing to do -- no lazy switching */ +} -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 17:05:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 17:05:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231507.1536671 (Exim 4.92) (envelope-from ) id 1vqwb3-0004lo-TU; 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pr=C MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Date: Fri, 13 Feb 2026 18:04:33 +0100 Message-ID: CC: , Jan Beulich , Andrew Cooper Subject: Re: [PATCH 1/2] x86: Make hvm_enabled a constant unless both PV and HVM are both compiled From: Alejandro Vallejo To: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Mailer: aerc 0.20.1 References: <20260213133732.132326-1-alejandro.garciavallejo@amd.com> <20260213133732.132326-2-alejandro.garciavallejo@amd.com> In-Reply-To: X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb08.amd.com (10.181.42.217) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709C:EE_|MN0PR12MB5834:EE_ X-MS-Office365-Filtering-Correlation-Id: ce729df3-934d-48e8-992c-08de6b21f916 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ODhLWGUrUS9na3hYYXFIaXYrVkZyK2ZleDkvVWZpMDZxMkU3QkNPUFJ5TGRt?= =?utf-8?B?SGxIN1VzcWg3L0s3b0FmMlVWVnZQRHcwT2FOeFNBWm5QbzJOQUljbkgzWkVa?= =?utf-8?B?Ymc2N0VLWlFIdVJDMGlmN2NNcjJnbjhXQWp2MDEzZ0JudS9WOXl4R3FHMWs4?= =?utf-8?B?OHZVaDRadXh3WnBTbVVkUjJKcWQ5L0hhU1pCWmFzR2svbWZCa3k2M2NuSVdi?= =?utf-8?B?T2wyWnhGbmM2VnQ5Qkc5UURtb1ZPWHBObXhYdFZ5T2ZUZ0ZQS2ZCVVhmZHBh?= =?utf-8?B?Tlcyb0lRbmE4Z3hGOERydjFoQTYvaVJaekJRWWFwVjA1d29Ka2RiTmFxQnlI?= =?utf-8?B?WVZHOVM3S3JDZkdTMS9qWlhacG9IQ2ZTR1A0TEtHNlY0bEVOek1OUDg2ejZF?= =?utf-8?B?bXBGZ1RNTTBKYml0dzBKR2RFWjJvVEhWMzdkUEpzaWQvaW0wbW1KVjdYQ2tF?= =?utf-8?B?Q2pVc1FvRU03YUJseGhrR2IvSnFKTyttNlFxT2thRENNbGtXVC9zczYzYmxp?= =?utf-8?B?UUE5L0VUWDhrUUQrY09GNWV3djZCOXdneit5TmdzUERZTmVGYWVjRTBvMm1K?= =?utf-8?B?RWljY0FFaTB2bjR4bG42c1RTc2YwdHRwdFFzbVM5M05LRXlUTVg2QlhRME9j?= =?utf-8?B?clJjbDdqZ1R6UUdsbThlV2lxTlk4OHBjc04xVVF3OVFCM0o0OUhNa01tZUdM?= =?utf-8?B?T1VhelVjbVJ3NGgvT2FPU2dlUDNraGZGcHRobVhOb1JuUWJnOHJTd0o1QkNS?= =?utf-8?B?QWZ5RWNvcERjM3RIbjBVTFRZcWdLMWJWRjRIS1NmQWJ1cFZlbTVNVEREdmVL?= =?utf-8?B?b0Rmamc2UXhpQXN1ME1LNXBYNzlBV05sL1pIT1crT3dPczNuZkE5c1JTMm5N?= =?utf-8?B?Q0dWNVdVYWxHU2pnQ1Z0S3VycCs0Zmd6WXpSdm5KMlhaeFIyL1ZNSy84cVUw?= =?utf-8?B?elRzMlUyOUtuWU4zbzFFbEZWMldITnRHVDdFeTdzdmRNL0JIVHViR1RwZTFE?= =?utf-8?B?YW1KVm5WM2JxYU9NRDV5RVZuckREaTBDQW1Vam1uaW9BcXlrRXBuWEtPUG8r?= =?utf-8?B?T1ZIOXlzNWJNajdWL1p6TWtNcDIxRmlwdU1la2FLVndPWk0wVzhIU3cyNDJa?= =?utf-8?B?NkRvaUIwdVBMRDNiQ3lHeFVLOXJhS0dvMFMwdjAvNTU5MmUrZmJhZkhjM0w0?= =?utf-8?B?VUJvcmN2c1NUdDN5TForK29KdkJVM0RDeFBkc0FqTzg1YlFYMGp4ZXlqTzNa?= =?utf-8?B?OEpNaDI1NXRodURnUUlWbE9UN2czSHExL0YxUlB2eFZyZ0IydmdJYzlQajIv?= =?utf-8?B?aHR6QXRKTU1keUZHZXRWbDdBbjZHb3VJWUczSVVmMGY0ZXVUOVRCYjF4TmFH?= =?utf-8?B?d1pwODdPOTB5MUo3bDlYeGNWQmxCbXlmN1JzczByWm5QQnk0SG5KRXdnUG5P?= =?utf-8?B?cWRRQi85Yml4TWxOMWg3by9yTGFXaTZQejhDVGg1ZjhvYjBnT0NOR3BjZUZV?= =?utf-8?B?U0J5OGNGc0xGTEZBVFZ0TUFFUmlrUlNKTzlLZXkrcmlSMVhRdDRUYXRWYlJh?= =?utf-8?B?TzBjTW5TblhHWjRoNWdpTGkvRTcvNndTREhBRlNLM1BybmpxWDBtZzhiL21i?= =?utf-8?B?ZTVCYTNSeExXV1Bhd05ZdjFaVUJNQ294cFR5VVdMZ0REcGQxalBhSmw3MWxI?= =?utf-8?B?Zjd3ditkWGJHSGZBbjVQVmdSaHNtb0N5Ukd2VTF6QSttYUZuZEhtWUZIcmp6?= =?utf-8?B?bXVFd0dVelpPcGVFZTlDcnJLVkQ4ZVIrbjY4ZzFTZEFCMmN1Vzd4Z01OdTM4?= =?utf-8?B?QWYzQVhrKzQ3Zy93b0lSZjVicXYrK2lsWVdmWDU2VUxWR0hNbGg0Y0JvNW1B?= =?utf-8?B?Y3dmN0FESzFweTF1WVIvaEQybUhMQVNKUldQRjFKcjhucjZBc0x5YmhZOCtW?= =?utf-8?B?ZDA3NVBHT29hNW54NWw4UGFadDZXc1dYNWF3VXdNRTNPTVFsQ3lYUDJNbmNt?= =?utf-8?B?OCtqMDVDejlUTk03dGF6eFhoMFM1M3F5RlZBS1hVMHNCUnVJWk15bU1SZkZ1?= =?utf-8?B?cC94dFh6MnN0anRsZjhMV1NOWkhqNURBcFpJb05KR0kxdHc0aE9wT1JmSHVq?= =?utf-8?B?N2VYc01hNldHUUx4ejk4NWdUbGVteEtLdzRCT3U2bzl0QUZzcC9URWprTjA3?= =?utf-8?B?VjlYckkwT1VnTnlaVUpLLzF4Y1VuYktyT1FvcWQyQkwvdVNPQVZ5WUZoNWFy?= =?utf-8?B?WmNiU05IL2FMNC9zSkQ3WDZ5WERBPT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +lEfZspk+fVZdo1ksPV3HQgupTww6uUQqOtYTK8R9SzFR7EJlbyCVsNiQvF2vxgA55g8yIkbe6GOINAbw7wGmUalJe6qKO857LStgdte9E1uOoXwUSm3Uxrk9Yxba3j4hCJj87veBZSadn1rl0c+oWSTOwkKu15uQtndETgJw5z2wqd7R5k2TZnz8I2Asfh73wyNCA5BbnknrDGIu4ED/O8W+9dApDy+gkf6YNbppj0NhJag/EwMm67qZxF39tS+v1RghU0Q9HyQIv/fR2/pVPs8ksn2/Y4//1Tyc1GH6qdi5WLx6YKYQ7PGvk9eUbXzSyRoED3soF/IMX7hH+a0CsX0MMkzOHiku6CFP4N5LDHMFcJXm0Fc2R+DX66Ac+zBx4pATO/qwj80woFJpImoRCzQhfTJzjmFE3Y54ZMjY2y6PAZ9dOXG8KV3MgpQbi8b X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 17:04:38.9503 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ce729df3-934d-48e8-992c-08de6b21f916 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001709C.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5834 On Fri Feb 13, 2026 at 3:26 PM CET, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 13, 2026 at 02:37:29PM +0100, Alejandro Vallejo wrote: >> PV-shim already has hvm_enabled optimised to false, but there's no >> reason HVM-only builds can't benefit from the same optimisation as long >> as we add a boot-time panic in case HVM support is missed. Many branches >> go away, some in the potentially hot switch_cr3_cr4. >>=20 >> HVM-only: >> add/remove: 0/1 grow/shrink: 1/9 up/down: 1/-162 (-161) >> Function old new delta >> arch_do_physinfo 79 80 +1 >> hvm_enabled 1 - -1 >> symbols_offsets 30732 30728 -4 >> symbols_names 108029 108022 -7 >> symbols_sorted_offsets 60656 60648 -8 >> flush_area_local 571 562 -9 >> switch_cr3_cr4 311 300 -11 >> init_xen_cap_info 62 43 -19 >> arch_sanitise_domain_config 885 863 -22 >> init_guest_cpu_policies 1270 1247 -23 >> hvm_domain_initialise 1127 1069 -58 >> Total: Before=3D3797004, After=3D3796843, chg -0.00% >>=20 >> With hvm_enabled const-ified, it's fine to take hvm_flush_guest_tlbs() >> outside the CONFIG_HVM ifdef and remove the stub. They compile to the >> same code after DCE. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> xen/arch/x86/hvm/hvm.c | 9 +++++++++ >> xen/arch/x86/include/asm/hvm/hvm.h | 30 +++++++++++++++--------------- >> 2 files changed, 24 insertions(+), 15 deletions(-) >>=20 >> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c >> index 4d37a93c57..da56944e74 100644 >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -72,7 +72,9 @@ >> =20 >> #include >> =20 >> +#ifdef CONFIG_PV >> bool __read_mostly hvm_enabled; > > __ro_after_init? Yeah, seems to have been missing originally > >> +#endif /* CONFIG_PV */ >> =20 >> #ifdef DBG_LEVEL_0 >> unsigned int opt_hvm_debug_level __read_mostly; >> @@ -173,9 +175,16 @@ static int __init cf_check hvm_enable(void) >> svm_fill_funcs(); >> =20 >> if ( fns =3D=3D NULL ) >> + { >> + if ( !IS_ENABLED(CONFIG_PV) ) >> + panic("HVM support not detected and PV compiled-out\n"); >> + >> return 0; >> + } >> =20 >> +#ifdef CONFIG_PV > > CONFIG_HVM I think? No. CONFIG_HVM always holds here, what we want to remove is hvm_enabled bei= ng present when CONFIG_PV is _also_ present. > >> hvm_enabled =3D 1; > > =3D true; True enough. > >> +#endif /* CONFIG_PV */ >> =20 >> printk("HVM: %s enabled\n", fns->name); >> if ( !hap_supported(&hvm_funcs) ) >> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/a= sm/hvm/hvm.h >> index 7d9774df59..dc609bf4cb 100644 >> --- a/xen/arch/x86/include/asm/hvm/hvm.h >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >> @@ -261,7 +261,11 @@ struct hvm_function_table { >> }; >> =20 >> extern struct hvm_function_table hvm_funcs; >> +#if defined(CONFIG_PV) && defined(CONFIG_HVM) >> extern bool hvm_enabled; >> +#else >> +#define hvm_enabled IS_ENABLED(CONFIG_HVM) >> +#endif >> extern int8_t hvm_port80_allowed; >> =20 >> extern const struct hvm_function_table *start_svm(void); >> @@ -399,6 +403,17 @@ static inline bool using_svm(void) >> #define hvm_is_in_uc_mode(d) \ >> (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) >> =20 >> +/* >> + * Called to ensure than all guest-specific mappings in a tagged TLB ar= e >> + * flushed; does *not* flush Xen's TLB entries, and on processors witho= ut a >> + * tagged TLB it will be a noop. >> + */ >> +static inline void hvm_flush_guest_tlbs(void) >> +{ >> + if ( hvm_enabled ) >> + hvm_asid_flush_core(); >> +} >> + >> #ifdef CONFIG_HVM >> =20 >> #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) >> @@ -498,17 +513,6 @@ static inline void hvm_set_tsc_offset(struct vcpu *= v, uint64_t offset) >> alternative_vcall(hvm_funcs.set_tsc_offset, v, offset); >> } >> =20 >> -/* >> - * Called to ensure than all guest-specific mappings in a tagged TLB ar= e=20 >> - * flushed; does *not* flush Xen's TLB entries, and on processors witho= ut a=20 >> - * tagged TLB it will be a noop. >> - */ >> -static inline void hvm_flush_guest_tlbs(void) >> -{ >> - if ( hvm_enabled ) >> - hvm_asid_flush_core(); >> -} > > Is there any specific reason you only pick hvm_flush_guest_tlbs(). I didn't try to remove more. That one was the only one with hvm_enabled in = the static inline so it seems easy to pick apart. I just tried compiling and I require very few additions to make the build compile without stubs. I'll send another version with the adjustments neede= d. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Fri Feb 13 17:31:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 17:31:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231559.1536690 (Exim 4.92) (envelope-from ) id 1vqx0b-0001JN-1Z; Fri, 13 Feb 2026 17:31:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231559.1536690; Fri, 13 Feb 2026 17:31:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqx0a-0001JF-TM; Fri, 13 Feb 2026 17:31:12 +0000 Received: by outflank-mailman (input) for mailman id 1231559; Fri, 13 Feb 2026 17:31:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqx0Z-0001J9-5p for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qO4sDFPOM2GUyDflrU1LSanqh9GsbgU9gSJ7fvzXa5h7Nwi8GZeNv/8VDbBwwSp+Tq3HnZKg51tj4Omdua8TiEnhQ6C0zQqiiPq3O0ZW4sxzzhfge6KemDg9NF2tBevU6GWAaDVjmac2KtIncZLqHdT8Gc1DWW5DKrT91erDYYFCki3C4R/U5QCwXIz/ml6wEJY7sDGGDBs3Fj6Zj4By6xI2ZQ2hm9HgYv8eXaVPBFE0/Bdur/HnfMhP/YH98TIwmkVEimPwiGTku7q72fdq6M4kcB4C2V+b1umJ8ycMGQSJcygIaxq34SnmcqbFKqjXi7wGGr6IvyzenYCyc7kCUKtuom4DptM6xfUAUhRm4oR07hWh4uNd/Q2WI456sTxXG78PmtUBdQOnQVz4b+roNW4Hi/G72/7cAihPlED06y2+Ypo66PjhqdrW31exr4vd X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 17:30:59.1707 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a800246b-bffb-4c6e-4e82-08de6b25a6f2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6840 On Fri Feb 13, 2026 at 4:09 PM CET, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 13, 2026 at 02:37:30PM +0100, Alejandro Vallejo wrote: >> Makes hap_enabled() a compile-time constant. This removes a number >> of hooks that normally go reach onto shadow paging code, clears >> many branches in a number of places and generally improves codegen >> throughout. >>=20 >> Take the chance to fully remove the shadow/ folder as it's now fully >> compiled out. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> bloat-o-meter against prior commit (defconfig:-pv,-shadow on both): >>=20 >> add/remove: 0/12 grow/shrink: 2/31 up/down: 67/-1609 (-1542) >> Function old new delta >> unmap_mmio_regions 1340 1374 +34 >> map_mmio_regions 211 244 +33 >> opt_hap_enabled 1 - -1 >> shadow_vcpu_init 2 - -2 >> __setup_str_opt_hap_enabled 4 - -4 >> _update_paging_modes 6 - -6 >> _toggle_log_dirty 6 - -6 >> _clean_dirty_bitmap 6 - -6 >> cpuid_viridian_leaves 728 714 -14 >> iommu_domain_init 291 276 -15 >> p2m_pt_change_entry_type_global 214 198 -16 >> paging_teardown 91 74 -17 >> paging_set_allocation 384 367 -17 >> paging_enable 76 59 -17 >> p2m_init_one 295 278 -17 >> ept_sync_domain 201 184 -17 >> arch_set_paging_mempool_size 437 420 -17 >> p2m_free_one 78 59 -19 >> paging_vcpu_teardown 36 15 -21 >> p2m_pt_init 125 104 -21 >> p2m_pt_change_entry_type_range 218 197 -21 >> arch_do_physinfo 76 53 -23 >> sh_none_ops 24 - -24 >> paging_final_teardown 134 110 -24 >> __setup_opt_hap_enabled 24 - -24 >> paging_vcpu_init 41 15 -26 >> paging_domain_init 167 141 -26 >> p2m_mem_access_sanity_check 71 42 -29 >> hvm_enable 449 419 -30 >> init_guest_cpu_policies 1247 1213 -34 >> paging_domctl 3357 3318 -39 >> __start_xen 9456 9416 -40 >> arch_sanitise_domain_config 794 747 -47 >> symbols_offsets 29636 29588 -48 >> p2m_set_entry 305 247 -58 >> guest_cpuid 1919 1858 -61 >> ept_dump_p2m_table 817 751 -66 >> recalculate_cpuid_policy 874 806 -68 >> shadow_domain_init 71 - -71 >> mmio_order 73 - -73 >> hvm_shadow_max_featuremask 76 - -76 >> hvm_shadow_def_featuremask 76 - -76 >> dm_op 3594 3510 -84 >> symbols_sorted_offsets 58464 58368 -96 >> symbols_names 103425 103213 -212 >> Total: Before=3D3644618, After=3D3643076, chg -0.04% >> --- >> xen/arch/x86/Kconfig | 2 ++ >> xen/arch/x86/hvm/Kconfig | 3 +++ >> xen/arch/x86/hvm/hvm.c | 8 ++++++++ >> xen/arch/x86/include/asm/hvm/hvm.h | 2 +- >> xen/arch/x86/mm/Makefile | 2 +- >> xen/include/xen/sched.h | 3 +++ >> 6 files changed, 18 insertions(+), 2 deletions(-) >>=20 >> diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig >> index 2ce4747f6e..190f419720 100644 >> --- a/xen/arch/x86/Kconfig >> +++ b/xen/arch/x86/Kconfig >> @@ -67,6 +67,7 @@ source "arch/Kconfig" >> config PV >> def_bool y >> prompt "PV support" >> + select OPT_HAP >> help >> Interfaces to support PV domains. These require guest kernel support >> to run as a PV guest, but don't require any specific hardware suppor= t. >> @@ -147,6 +148,7 @@ config SHADOW_PAGING >> bool "Shadow Paging" >> default !PV_SHIM_EXCLUSIVE >> depends on PV || HVM >> + select OPT_HAP >> help >> Shadow paging is a software alternative to hardware paging support >> (Intel EPT, AMD NPT). >> diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig >> index f32bf5cbb7..310e09847b 100644 >> --- a/xen/arch/x86/hvm/Kconfig >> +++ b/xen/arch/x86/hvm/Kconfig >> @@ -92,4 +92,7 @@ config MEM_SHARING >> bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED >> depends on INTEL_VMX >> =20 >> +config OPT_HAP >> + bool > > Can't you define this outside of Kconfig, like: > > #define HAP_ONLY_BUILD (!IS_ENABLED(CONFIG_PV) && !IS_ENABLED(CONFIG_SHAD= OW_PAGING)) Sure. > > HAP_ONLY_BUILD is likely not the best name. Maybe CONFIG_HAP_REQUIRED > or some such? (Seeing the usage below) Definitely not CONFIG_*, or it'd be an accident about to happen when mistak= enly used on IS_ENABLED(). HAP_EXCLUSIVE? > > FWIW, with the current naming I've assume this was supposed to mean > "Option HAP" or some such, when is "HAP is Optional". We usually use It was. Originally it had a help message and a default, but I quickly notic= ed that served no purpose. It has that weird polarity so the build would remai= n with new options being additive only. In retrospect it can go back to a more natural HAP_EXCLUSIVE that removes a bunch of !s in the code. > "opt" as a shortcut for "option" in several places on the Xen code > base, like "opt_hap_enabled". I also think using it in the positive > for so the variable meaning "required" instead of "optional" makes > some of the logic easier to follow below. It does, but in Kconfig it's nicer if an option being enabled yields a stri= ctly more capable hypervisor, I think. Makes allyesconfig and allnoconfig work a= s intended. > >> endif >> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c >> index da56944e74..ce58632b02 100644 >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -91,9 +91,11 @@ struct hvm_function_table __ro_after_init hvm_funcs; >> unsigned long __section(".bss.page_aligned") __aligned(PAGE_SIZE) >> hvm_io_bitmap[HVM_IOBITMAP_SIZE / BYTES_PER_LONG]; >> =20 >> +#ifdef CONFIG_OPT_HAP >> /* Xen command-line option to enable HAP */ >> static bool __initdata opt_hap_enabled =3D true; >> boolean_param("hap", opt_hap_enabled); >> +#endif /* CONFIG_OPT_HAP */ > > Hm, if you nuke the option like that, it needs to be reflected in > xen-command-line.pandoc document. Ack. > >> =20 >> #ifndef opt_hvm_fep >> /* Permit use of the Forced Emulation Prefix in HVM guests */ >> @@ -144,15 +146,21 @@ static bool __init hap_supported(struct hvm_functi= on_table *fns) >> if ( !fns->caps.hap ) >> { >> printk("HVM: Hardware Assisted Paging (HAP) not detected\n"); >> + >> + if ( !IS_ENABLED(CONFIG_OPT_HAP) ) >> + panic("HAP is compile-time mandatory\n"); > > From a user perspective, it's a weird error message IMO. I would > rather say: > > "HVM: Hardware Assisted Paging (HAP) is mandatory but not detected\n". > > Not fully convinced about that wording, but I would certainly drop the > "compile-time" part of yours. A user is not likely to care/know about > compile-time subtlety of the error message. Sure. > >> + >> return false; >> } >> =20 >> +#ifdef CONFIG_OPT_HAP >> if ( !opt_hap_enabled ) > > You could possibly do: > > #ifdef CONFIG_OPT_HAP > /* Xen command-line option to enable HAP */ > static bool __initdata opt_hap_enabled =3D true; > boolean_param("hap", opt_hap_enabled); > #else /* CONFIG_OPT_HAP */ > # define opt_hap_enabled true > #endif /* !CONFIG_OPT_HAP */ > > Above, and avoid the ifdefs here? Whatever poison you prefer. It's just ugliness motion. > >> { >> fns->caps.hap =3D false; >> printk("HVM: Hardware Assisted Paging (HAP) detected but disabl= ed\n"); >> return false; >> } >> +#endif /* CONFIG_OPT_HAP */ >> =20 >> return true; >> } >> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/a= sm/hvm/hvm.h >> index dc609bf4cb..b330d65d6d 100644 >> --- a/xen/arch/x86/include/asm/hvm/hvm.h >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >> @@ -703,7 +703,7 @@ static inline bool hvm_is_singlestep_supported(void) >> =20 >> static inline bool hvm_hap_supported(void) >> { >> - return hvm_funcs.caps.hap; >> + return !IS_ENABLED(CONFIG_OPT_HAP) ?: hvm_funcs.caps.hap; > > return CONFIG_HAP_REQUIRED ?: hvm_funcs.caps.hap; > > IMO is easier to read (same below for the hap_enabled() early return). > >> } >> =20 >> /* returns true if hardware supports alternate p2m's */ >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile >> index 960f6e8409..64fde82c50 100644 >> --- a/xen/arch/x86/mm/Makefile >> +++ b/xen/arch/x86/mm/Makefile >> @@ -1,4 +1,4 @@ >> -obj-y +=3D shadow/ >> +obj-$(CONFIG_OPT_HAP) +=3D shadow/ > > I think you can use: > > obj-$(findstring y,$(CONFIG_PV) $(CONFIG_SHADOW_PAGING)) +=3D ... Hmmm. I guess I shouldn't just include it twice, like we do for other .o fi= les. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Fri Feb 13 18:25:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 18:25:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231635.1536708 (Exim 4.92) (envelope-from ) id 1vqxr8-0000PZ-8G; Fri, 13 Feb 2026 18:25:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231635.1536708; Fri, 13 Feb 2026 18:25:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqxr8-0000PS-4f; Fri, 13 Feb 2026 18:25:30 +0000 Received: by outflank-mailman (input) for mailman id 1231635; Fri, 13 Feb 2026 18:25:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqxr7-0000PM-B2 for xen-devel@lists.xenproject.org; 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This > means that switch_stack_and_jump() needs to discard one extra word when FRED > is active. > > Fix a typo in the parameter name, which should be shstk_base. > > Signed-off-by: Andrew Cooper > Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné > --- > CC: Jan Beulich > CC: Roger Pau Monné > > Leave as $%c. Otherwise it doesn't assemble correctly presented with $$24568 > to parse as an instruction immediate. > > v3: > * Fix a typo in the parameter name. > v2: > * Use X86_FEATURE_XEN_FRED > --- > xen/arch/x86/include/asm/current.h | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/include/asm/current.h b/xen/arch/x86/include/asm/current.h > index c1eb27b1c4c2..62817e8476ec 100644 > --- a/xen/arch/x86/include/asm/current.h > +++ b/xen/arch/x86/include/asm/current.h > @@ -154,7 +154,9 @@ unsigned long get_stack_dump_bottom (unsigned long sp); > "rdsspd %[ssp];" \ > "cmp $1, %[ssp];" \ > "je .L_shstk_done.%=;" /* CET not active? Skip. */ \ > - "mov $%c[skstk_base], %[val];" \ > + ALTERNATIVE("mov $%c[shstk_base], %[val];", \ > + "mov $%c[shstk_base] + 8, %[val];", \ I would also be fine with using the more simple '%' if that yields the same result. But seeing existing code is already using this formatter, I think it makes more sense for this commit to not change it. It can always be adjusted in a followup commit if there's a pressing need to change this. I wouldn't have used %c myself unless it was already present, simply because I'm not that proficient in inline assembly. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Fri Feb 13 18:30:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 18:30:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231644.1536717 (Exim 4.92) (envelope-from ) id 1vqxvx-00021S-Oq; Fri, 13 Feb 2026 18:30:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231644.1536717; Fri, 13 Feb 2026 18:30:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqxvx-00021L-MG; Fri, 13 Feb 2026 18:30:29 +0000 Received: by outflank-mailman (input) for mailman id 1231644; Fri, 13 Feb 2026 18:30:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqxvx-00021F-3j for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 18:30:29 +0000 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azlp170120001.outbound.protection.outlook.com [2a01:111:f403:c107::1]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 10509a3b-090a-11f1-9ccf-f158ae23cfc8; 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Many branches > >> go away, some in the potentially hot switch_cr3_cr4. > >> > >> HVM-only: > >> add/remove: 0/1 grow/shrink: 1/9 up/down: 1/-162 (-161) > >> Function old new delta > >> arch_do_physinfo 79 80 +1 > >> hvm_enabled 1 - -1 > >> symbols_offsets 30732 30728 -4 > >> symbols_names 108029 108022 -7 > >> symbols_sorted_offsets 60656 60648 -8 > >> flush_area_local 571 562 -9 > >> switch_cr3_cr4 311 300 -11 > >> init_xen_cap_info 62 43 -19 > >> arch_sanitise_domain_config 885 863 -22 > >> init_guest_cpu_policies 1270 1247 -23 > >> hvm_domain_initialise 1127 1069 -58 > >> Total: Before=3797004, After=3796843, chg -0.00% > >> > >> With hvm_enabled const-ified, it's fine to take hvm_flush_guest_tlbs() > >> outside the CONFIG_HVM ifdef and remove the stub. They compile to the > >> same code after DCE. > >> > >> Signed-off-by: Alejandro Vallejo > >> --- > >> xen/arch/x86/hvm/hvm.c | 9 +++++++++ > >> xen/arch/x86/include/asm/hvm/hvm.h | 30 +++++++++++++++--------------- > >> 2 files changed, 24 insertions(+), 15 deletions(-) > >> > >> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > >> index 4d37a93c57..da56944e74 100644 > >> --- a/xen/arch/x86/hvm/hvm.c > >> +++ b/xen/arch/x86/hvm/hvm.c > >> @@ -72,7 +72,9 @@ > >> > >> #include > >> > >> +#ifdef CONFIG_PV > >> bool __read_mostly hvm_enabled; > > > > __ro_after_init? > > Yeah, seems to have been missing originally I bet __ro_after_init wasn't available when this was introduced. > > > >> +#endif /* CONFIG_PV */ > >> > >> #ifdef DBG_LEVEL_0 > >> unsigned int opt_hvm_debug_level __read_mostly; > >> @@ -173,9 +175,16 @@ static int __init cf_check hvm_enable(void) > >> svm_fill_funcs(); > >> > >> if ( fns == NULL ) > >> + { > >> + if ( !IS_ENABLED(CONFIG_PV) ) > >> + panic("HVM support not detected and PV compiled-out\n"); > >> + > >> return 0; > >> + } > >> > >> +#ifdef CONFIG_PV > > > > CONFIG_HVM I think? > > No. CONFIG_HVM always holds here, what we want to remove is hvm_enabled being > present when CONFIG_PV is _also_ present. Yeah, Andrew already noticed that. > > > >> hvm_enabled = 1; > > > > = true; > > True enough. > > > > >> +#endif /* CONFIG_PV */ > >> > >> printk("HVM: %s enabled\n", fns->name); > >> if ( !hap_supported(&hvm_funcs) ) > >> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h > >> index 7d9774df59..dc609bf4cb 100644 > >> --- a/xen/arch/x86/include/asm/hvm/hvm.h > >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h > >> @@ -261,7 +261,11 @@ struct hvm_function_table { > >> }; > >> > >> extern struct hvm_function_table hvm_funcs; > >> +#if defined(CONFIG_PV) && defined(CONFIG_HVM) > >> extern bool hvm_enabled; > >> +#else > >> +#define hvm_enabled IS_ENABLED(CONFIG_HVM) > >> +#endif > >> extern int8_t hvm_port80_allowed; > >> > >> extern const struct hvm_function_table *start_svm(void); > >> @@ -399,6 +403,17 @@ static inline bool using_svm(void) > >> #define hvm_is_in_uc_mode(d) \ > >> (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) > >> > >> +/* > >> + * Called to ensure than all guest-specific mappings in a tagged TLB are > >> + * flushed; does *not* flush Xen's TLB entries, and on processors without a > >> + * tagged TLB it will be a noop. > >> + */ > >> +static inline void hvm_flush_guest_tlbs(void) > >> +{ > >> + if ( hvm_enabled ) > >> + hvm_asid_flush_core(); > >> +} > >> + > >> #ifdef CONFIG_HVM > >> > >> #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) > >> @@ -498,17 +513,6 @@ static inline void hvm_set_tsc_offset(struct vcpu *v, uint64_t offset) > >> alternative_vcall(hvm_funcs.set_tsc_offset, v, offset); > >> } > >> > >> -/* > >> - * Called to ensure than all guest-specific mappings in a tagged TLB are > >> - * flushed; does *not* flush Xen's TLB entries, and on processors without a > >> - * tagged TLB it will be a noop. > >> - */ > >> -static inline void hvm_flush_guest_tlbs(void) > >> -{ > >> - if ( hvm_enabled ) > >> - hvm_asid_flush_core(); > >> -} > > > > Is there any specific reason you only pick hvm_flush_guest_tlbs(). > > I didn't try to remove more. That one was the only one with hvm_enabled in the > static inline so it seems easy to pick apart. Oh, I see. That one already had the hvm_enabled condition in it's non-stub version. > I just tried compiling and I require very few additions to make the build > compile without stubs. I'll send another version with the adjustments needed. OK, I think if we could unify them that would make the header smaller and easier to read. Thanks, Roger. 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This removes a number > >> of hooks that normally go reach onto shadow paging code, clears > >> many branches in a number of places and generally improves codegen > >> throughout. > >> > >> Take the chance to fully remove the shadow/ folder as it's now fully > >> compiled out. > >> > >> Signed-off-by: Alejandro Vallejo > >> --- > >> bloat-o-meter against prior commit (defconfig:-pv,-shadow on both): > >> > >> add/remove: 0/12 grow/shrink: 2/31 up/down: 67/-1609 (-1542) > >> Function old new delta > >> unmap_mmio_regions 1340 1374 +34 > >> map_mmio_regions 211 244 +33 > >> opt_hap_enabled 1 - -1 > >> shadow_vcpu_init 2 - -2 > >> __setup_str_opt_hap_enabled 4 - -4 > >> _update_paging_modes 6 - -6 > >> _toggle_log_dirty 6 - -6 > >> _clean_dirty_bitmap 6 - -6 > >> cpuid_viridian_leaves 728 714 -14 > >> iommu_domain_init 291 276 -15 > >> p2m_pt_change_entry_type_global 214 198 -16 > >> paging_teardown 91 74 -17 > >> paging_set_allocation 384 367 -17 > >> paging_enable 76 59 -17 > >> p2m_init_one 295 278 -17 > >> ept_sync_domain 201 184 -17 > >> arch_set_paging_mempool_size 437 420 -17 > >> p2m_free_one 78 59 -19 > >> paging_vcpu_teardown 36 15 -21 > >> p2m_pt_init 125 104 -21 > >> p2m_pt_change_entry_type_range 218 197 -21 > >> arch_do_physinfo 76 53 -23 > >> sh_none_ops 24 - -24 > >> paging_final_teardown 134 110 -24 > >> __setup_opt_hap_enabled 24 - -24 > >> paging_vcpu_init 41 15 -26 > >> paging_domain_init 167 141 -26 > >> p2m_mem_access_sanity_check 71 42 -29 > >> hvm_enable 449 419 -30 > >> init_guest_cpu_policies 1247 1213 -34 > >> paging_domctl 3357 3318 -39 > >> __start_xen 9456 9416 -40 > >> arch_sanitise_domain_config 794 747 -47 > >> symbols_offsets 29636 29588 -48 > >> p2m_set_entry 305 247 -58 > >> guest_cpuid 1919 1858 -61 > >> ept_dump_p2m_table 817 751 -66 > >> recalculate_cpuid_policy 874 806 -68 > >> shadow_domain_init 71 - -71 > >> mmio_order 73 - -73 > >> hvm_shadow_max_featuremask 76 - -76 > >> hvm_shadow_def_featuremask 76 - -76 > >> dm_op 3594 3510 -84 > >> symbols_sorted_offsets 58464 58368 -96 > >> symbols_names 103425 103213 -212 > >> Total: Before=3644618, After=3643076, chg -0.04% > >> --- > >> xen/arch/x86/Kconfig | 2 ++ > >> xen/arch/x86/hvm/Kconfig | 3 +++ > >> xen/arch/x86/hvm/hvm.c | 8 ++++++++ > >> xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > >> xen/arch/x86/mm/Makefile | 2 +- > >> xen/include/xen/sched.h | 3 +++ > >> 6 files changed, 18 insertions(+), 2 deletions(-) > >> > >> diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig > >> index 2ce4747f6e..190f419720 100644 > >> --- a/xen/arch/x86/Kconfig > >> +++ b/xen/arch/x86/Kconfig > >> @@ -67,6 +67,7 @@ source "arch/Kconfig" > >> config PV > >> def_bool y > >> prompt "PV support" > >> + select OPT_HAP > >> help > >> Interfaces to support PV domains. These require guest kernel support > >> to run as a PV guest, but don't require any specific hardware support. > >> @@ -147,6 +148,7 @@ config SHADOW_PAGING > >> bool "Shadow Paging" > >> default !PV_SHIM_EXCLUSIVE > >> depends on PV || HVM > >> + select OPT_HAP > >> help > >> Shadow paging is a software alternative to hardware paging support > >> (Intel EPT, AMD NPT). > >> diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > >> index f32bf5cbb7..310e09847b 100644 > >> --- a/xen/arch/x86/hvm/Kconfig > >> +++ b/xen/arch/x86/hvm/Kconfig > >> @@ -92,4 +92,7 @@ config MEM_SHARING > >> bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > >> depends on INTEL_VMX > >> > >> +config OPT_HAP > >> + bool > > > > Can't you define this outside of Kconfig, like: > > > > #define HAP_ONLY_BUILD (!IS_ENABLED(CONFIG_PV) && !IS_ENABLED(CONFIG_SHADOW_PAGING)) > > Sure. > > > > > HAP_ONLY_BUILD is likely not the best name. Maybe CONFIG_HAP_REQUIRED > > or some such? (Seeing the usage below) > > Definitely not CONFIG_*, or it'd be an accident about to happen when mistakenly > used on IS_ENABLED(). HAP_EXCLUSIVE? I would prefer HAP_REQUIRED, but that's a question of taste. Both would be used in the same way. We have some CONFIG_ defines that won't work with IS_ENABLED() already, but let's not propagate that further. > > > > FWIW, with the current naming I've assume this was supposed to mean > > "Option HAP" or some such, when is "HAP is Optional". We usually use > > It was. Originally it had a help message and a default, but I quickly noticed > that served no purpose. It has that weird polarity so the build would remain > with new options being additive only. > > In retrospect it can go back to a more natural HAP_EXCLUSIVE that removes > a bunch of !s in the code. > > > "opt" as a shortcut for "option" in several places on the Xen code > > base, like "opt_hap_enabled". I also think using it in the positive > > for so the variable meaning "required" instead of "optional" makes > > some of the logic easier to follow below. > > It does, but in Kconfig it's nicer if an option being enabled yields a strictly > more capable hypervisor, I think. Makes allyesconfig and allnoconfig work as > intended. Oh, I see. Moving it out of Kconfig makes even more sense I think. > >> + > >> return false; > >> } > >> > >> +#ifdef CONFIG_OPT_HAP > >> if ( !opt_hap_enabled ) > > > > You could possibly do: > > > > #ifdef CONFIG_OPT_HAP > > /* Xen command-line option to enable HAP */ > > static bool __initdata opt_hap_enabled = true; > > boolean_param("hap", opt_hap_enabled); > > #else /* CONFIG_OPT_HAP */ > > # define opt_hap_enabled true > > #endif /* !CONFIG_OPT_HAP */ > > > > Above, and avoid the ifdefs here? > > Whatever poison you prefer. It's just ugliness motion. Yeah, at least this keeps all the ifdefs mostly in the same visual region. > > > >> { > >> fns->caps.hap = false; > >> printk("HVM: Hardware Assisted Paging (HAP) detected but disabled\n"); > >> return false; > >> } > >> +#endif /* CONFIG_OPT_HAP */ > >> > >> return true; > >> } > >> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h > >> index dc609bf4cb..b330d65d6d 100644 > >> --- a/xen/arch/x86/include/asm/hvm/hvm.h > >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h > >> @@ -703,7 +703,7 @@ static inline bool hvm_is_singlestep_supported(void) > >> > >> static inline bool hvm_hap_supported(void) > >> { > >> - return hvm_funcs.caps.hap; > >> + return !IS_ENABLED(CONFIG_OPT_HAP) ?: hvm_funcs.caps.hap; > > > > return CONFIG_HAP_REQUIRED ?: hvm_funcs.caps.hap; > > > > IMO is easier to read (same below for the hap_enabled() early return). > > > >> } > >> > >> /* returns true if hardware supports alternate p2m's */ > >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > >> index 960f6e8409..64fde82c50 100644 > >> --- a/xen/arch/x86/mm/Makefile > >> +++ b/xen/arch/x86/mm/Makefile > >> @@ -1,4 +1,4 @@ > >> -obj-y += shadow/ > >> +obj-$(CONFIG_OPT_HAP) += shadow/ > > > > I think you can use: > > > > obj-$(findstring y,$(CONFIG_PV) $(CONFIG_SHADOW_PAGING)) += ... > > Hmmm. I guess I shouldn't just include it twice, like we do for other .o files. I see, so use: obj-$(CONFIG_PV) += shadow/ obj-$(CONFIG_SHADOW_PAGING) += shadow/ Maybe that's simpler really, and it's a pattern we already use elsewhere. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Fri Feb 13 18:46:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 18:46:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231672.1536738 (Exim 4.92) (envelope-from ) id 1vqyBD-0004Lc-C6; Fri, 13 Feb 2026 18:46:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231672.1536738; Fri, 13 Feb 2026 18:46:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqyBD-0004LV-8z; Fri, 13 Feb 2026 18:46:15 +0000 Received: by outflank-mailman (input) for mailman id 1231672; Fri, 13 Feb 2026 18:46:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqyBC-0004LP-AQ for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 18:46:14 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 44c74f41-090c-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 19:46:13 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 14B82414BEF8; Fri, 13 Feb 2026 13:45:58 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 44c74f41-090c-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com Subject: Re: Re: [PATCH 0/3] Virtual NMI Date: Fri, 13 Feb 2026 18:42:49 +0000 Message-ID: <20260213184252.93141-1-abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit >Patches 1 and 2 want merging. They're both enumerations and >configuration bits, although the very first hunk of patch 1 (the P()) >wants delaying until the final patch; we shouldn't print out the >capability until it's being used. > >The patch subjects want to be: > > x86/svm: Enumerations for virtual NMI >and > x86/svm: Use virtual NMI when available Ack. I Will merge these in V2. I will move (the P()) hunk to patch 2. > > >Everything here is local to SVM. Notably there should be no edits to >hvm.c or hvm.h. By introducing hvm_intblk_vnmi, you break NMI injection >in other cases. vNMI is just a hardware-optimised way of handling the >hvm_intblk_nmi_iret case. The handling for the introduced hvm_intblk_vnmi is separate from the other interrupts handling. I will remove the introduced hvm_intblk_vnmi and I will rather use the existing hvm_intblk_nmi_iret. This should have the side effect of setting the VMCB's interrupt-shadow. However, it should be benign side effect as this should not currently cause an actual interrupt shadow on the AMD platforms prior to the vNMI support. > > > >svm_inject_nmi() wants to gain a check to see whether vNMI is enabled, >and in the case that it is, simply set vnmi_pending. You have this >partially, but it needs to be dependent on the VMCB vNMI setting, not >some global idea of enablement. > I will add one more is_vnmi_enabled callback for the check functionality and I will use that introduced check in the svm_inject_nmi >svm_get_interrupt_shadow() needs a similar adjustment to read >vnmi_blocked rather than unconditionally depending on INTERCEPT_IRET. > Ack, I will add the check in the V2 >In construct_vmcb(), you need to check cpu_has_svm_vnmi. I think this >change is simple enough to be enabled unconditionally. (We'll need to >change this in due course, but that's going to take other infrastructure >which we don't have yet.) > Ack, I will change it, as suggested, in the V2 > >A couple of other minor notes: > >In the vintr_t union, use an anonymous 3 bit field (literally "u64 :3;", >which is valid syntax) instead of renumbering the rsvd$N fields. That >will shrink the diff. > Ack, I will change it, as suggested, in the V2 >Xen's style has spaces inside the outermost brackets for control >structures, and {'s on new lines. For the functions you're modifying, >just copy the surrounding style. > Ack, I will stick to the formatting guideline in the V2 --Abdelkareem From xen-devel-bounces@lists.xenproject.org Fri Feb 13 19:06:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 19:06:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231714.1536748 (Exim 4.92) (envelope-from ) id 1vqyUv-0007LN-RZ; Fri, 13 Feb 2026 19:06:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231714.1536748; Fri, 13 Feb 2026 19:06:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqyUv-0007LG-Om; Fri, 13 Feb 2026 19:06:37 +0000 Received: by outflank-mailman (input) for mailman id 1231714; Fri, 13 Feb 2026 19:06:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqyUu-0007LA-5M for xen-devel@lists.xenproject.org; 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Reduce to just macros.h and string.h. Drop > types.h while at it, as it comes in through bitops.h > > cpumask.h and nodemask.h only include kernel.h to get container_of(). Move it > into macros.h where it belongs. > > No functional change. > > Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qE5lVj+j8vk8PfjRAONTdBpEvzVtP2mMhp4fPHMY4MjxGJwy+9fIGqVnYjfYf4hibWy8oQGxI0YNWjzYQpGhWHAKAbBLcB3o8Riv7yqVlRu0YE3rYX86ZMqrbAazdsc0VWzs7ytPN6SpJRgO1kxBsycEl4HcqZYfQ2DSte5SkIFiQvAOO5xEsOIp6nOfdqUcasTjhK7h/sO+DqJBee8+Y8+LOg+/1jIJMvLO7Gs4LNETaNdeW1Jnsq/vanvrr9Xfqco6e4LDW4jYV/jFEowmyonBKjwNRvkzu8aHZTkEPOEH8Jtwj6+XxncEIrIxAllZN8qS1SUTz47uVROyLDrdKUpK0GNqOHxL0NBW3ZJ01escTf2q7reaDtNnaN1zoqHsIHmLW2HKZ0EqBUHeOQH5hKz83uEKyrSVG1E22TiVKIymdrnFgwJ36R5Oj8U4xLCI X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 19:13:12.8113 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 63dc7859-0f80-4945-c134-08de6b33eee4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000009B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9425 On Fri Feb 13, 2026 at 7:42 PM CET, Roger Pau Monn=C3=A9 wrote: >> >> diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile >> >> index 960f6e8409..64fde82c50 100644 >> >> --- a/xen/arch/x86/mm/Makefile >> >> +++ b/xen/arch/x86/mm/Makefile >> >> @@ -1,4 +1,4 @@ >> >> -obj-y +=3D shadow/ >> >> +obj-$(CONFIG_OPT_HAP) +=3D shadow/ >> > >> > I think you can use: >> > >> > obj-$(findstring y,$(CONFIG_PV) $(CONFIG_SHADOW_PAGING)) +=3D ... >>=20 >> Hmmm. I guess I shouldn't just include it twice, like we do for other .o= files. > > I see, so use: > > obj-$(CONFIG_PV) +=3D shadow/ > obj-$(CONFIG_SHADOW_PAGING) +=3D shadow/ > > Maybe that's simpler really, and it's a pattern we already use > elsewhere. I meant them being folder with makefiles potentially doing things that shou= ld only be done once. I don't know if we dedup tokens somewhere. These makefil= es are rather arcane. > > Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Fri Feb 13 19:14:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 19:14:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231734.1536768 (Exim 4.92) (envelope-from ) id 1vqyco-00013a-Rl; Fri, 13 Feb 2026 19:14:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231734.1536768; Fri, 13 Feb 2026 19:14:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqyco-00013T-Om; Fri, 13 Feb 2026 19:14:46 +0000 Received: by outflank-mailman (input) for mailman id 1231734; Fri, 13 Feb 2026 19:14:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqycn-00013G-RU for xen-devel@lists.xenproject.org; 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charset=US-ASCII On Thu, 12 Feb 2026, dmukhin@ford.com wrote: > The mac-permissive= option is currently ignored because Argo configuration > parameters are comma-separated. > > Fix the missing comma in the XTF test arguments. > > Fixes: 150c6ef45922 ("CI: add argo x86 XTF test") > Signed-off-by: Denis Mukhin Acked-by: Stefano Stabellini > --- > CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323076582 > --- > automation/scripts/include/xtf-runner | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner > index 43ff2d4d88c7..d1ef888465c3 100644 > --- a/automation/scripts/include/xtf-runner > +++ b/automation/scripts/include/xtf-runner > @@ -69,7 +69,7 @@ function xtf_build_cmdline() > local xtf_name=$2 > declare -a cmdline=() > declare -A per_test_args=( > - [argo]="argo=1 mac-permissive=1" > + [argo]="argo=1,mac-permissive=1" > ) > > cmdline+=("${XEN_CMDLINE}") > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Fri Feb 13 19:54:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 19:54:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231789.1536777 (Exim 4.92) (envelope-from ) id 1vqzF7-0006Rs-Oe; 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I guess I shouldn't just include it twice, like we do for other .o files. > > > > I see, so use: > > > > obj-$(CONFIG_PV) += shadow/ > > obj-$(CONFIG_SHADOW_PAGING) += shadow/ > > > > Maybe that's simpler really, and it's a pattern we already use > > elsewhere. > > I meant them being folder with makefiles potentially doing things that should > only be done once. I don't know if we dedup tokens somewhere. These makefiles > are rather arcane. I'm not a Makefile expert, so I might be wrong. We apply $(sort ...) in several places to remove duplicates, I would assume, I see: # Subdirectories we need to descend into subdir-y := $(sort $(subdir-y) $(patsubst %/,%,$(filter %/, $(obj-y)))) Which should remove any duplicated folders. I've tried the duplicated folder addition to obj-y and seems to build fine. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Fri Feb 13 20:09:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 20:09:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231808.1536787 (Exim 4.92) (envelope-from ) id 1vqzTn-0008Tt-01; Fri, 13 Feb 2026 20:09:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231808.1536787; Fri, 13 Feb 2026 20:09:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqzTm-0008Tm-TR; Fri, 13 Feb 2026 20:09:30 +0000 Received: by outflank-mailman (input) for mailman id 1231808; Fri, 13 Feb 2026 20:09:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqzTl-0008Rt-1A for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 20:09:29 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e5f85c30-0917-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 21:09:27 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 7F6796091C; Fri, 13 Feb 2026 20:09:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9E70FC116C6; Fri, 13 Feb 2026 20:09:24 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e5f85c30-0917-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771013366; bh=cZCUcCdA6I34GJrfMm43QWJwY50qUe7vdXKFH3sr5jg=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=OxFPKc4/7luVnWsnsWGtplumcOyfTlNuGWg6zhnjC7VT7wCESEuu2SNHplll0XA3I GdwpfN1E9bD0qy91uheU+ZzhJwuWReuAgQoQMPWbbznFxK1qwXMkX5EnasCaHuEyDv 983nZcdtgTNZ8pjEGrKIW4KbyXTnb4wxpGqUZDNfw4jHSn8AOqsykt/tzosuN4qEwf wf2G11wLF6V+YI7VLTOUHJSBZt0fDeVRRV13rxDIXF8svT92btl3jt8F/mLnMbn1EY HKkqMB1BhKUkQTzqIFdhtF87p//Oj1o3Zs68FqhlHhaw64RXlF+qExBVXmJbPUoo6M QhCwNKiH/Hnqw== Date: Fri, 13 Feb 2026 12:09:17 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , Daniel Smith , Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding In-Reply-To: <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> Message-ID: References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 10 Feb 2026, Jan Beulich wrote: > On 10.02.2026 00:23, Stefano Stabellini wrote: > > On Mon, 9 Feb 2026, Jan Beulich wrote: > >> On 05.02.2026 00:37, Stefano Stabellini wrote: > >>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from > >>> global to VIRQ_DOMAIN to allow other domains to bind to it. > >>> > >>> Note that Linux silently falls back to polling when binding fails, which > >>> masks the issue. > >>> > >>> Signed-off-by: Jason Andryuk > >>> Signed-off-by: Stefano Stabellini > >> > >> Technically this is an ABI change, and hence I'm uncertain it can go without > >> that aspect being at least mentioned, perhaps even its implications properly > >> discussed. > > > > I am not sure if it qualifies as an ABI change or not but I am happy to > > expand the commit message in any way you might suggest. > > > > The jist of it is already in the commit message, really the key element > > is that VIRQ_CONSOLE can be bound by multiple domains. > > > > Aside from spelling out "this is an ABI change" what do you have in > > mind? > > What I mean is discussion of the implications for domains using the vIRQ. > Previously most domains would have attempts to bind this vIRQ rejected. > Technically it is possible that kernels had code paths blindly doing the > binding, relying on it to work only when running as Dom0. And really, you > appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, > without which its binding wasn't possible at all before (except for the > hardware domain, which get_global_virq_handler() falls back to when no > other domain is set). Or am I mis-reading things, as I can't spot any use > of VIRQ_CONSOLE under tools/, whereas I would have expected provisions > for (host) console handling to be delegated to a separate control or > console domain? Of course other toolstacks (the XAPI-based one for > example) might actually have such provisions. > > And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously > is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type > vIRQ-s. Yet this vIRQ isn't supposed to be universally available to > every DomU. Instead the ->console->input_allowed checking is kind of > substituting such a check, which iirc Daniel said (in more general > context) shouldn't ever be done. IOW in patch 5 you're actually effecting > policy, which should be XSM's job aiui. > > Bottom line: The patch may need to be more involved, but at the very > least the description would need updating to justify it being as simple > as it is right now. What do you think of this: --- xen/console: change VIRQ_CONSOLE from global to per-domain Previously VIRQ_CONSOLE was a global VIRQ (VIRQ_GLOBAL type), meaning only the hardware domain (or a domain explicitly set via XEN_DOMCTL_set_virq_handler) could bind it. Any other domain attempting to bind would fail with -EBUSY because get_global_virq_handler() would return hwdom by default. This patch changes VIRQ_CONSOLE to VIRQ_DOMAIN type, allowing any domain to bind it independently, similar to VIRQ_ARGO. The console notification is now sent via send_guest_domain_virq() directly to the focus domain rather than through send_global_virq(). Implications: 1. Guest kernels that previously called bind on VIRQ_CONSOLE blindly will now succeed. Linux handles binding failure gracefully by falling back to polling, so this should not cause regressions. 2. XEN_DOMCTL_set_virq_handler can no longer be used with VIRQ_CONSOLE. The domctl explicitly rejects non-VIRQ_GLOBAL types. This means toolstacks that relied on set_virq_handler to delegate console handling to a separate console domain will need to use a different mechanism. Note: No known in-tree toolstack uses set_virq_handler with VIRQ_CONSOLE. 3. VIRQ_DOMAIN bindings are not subject to XSM checks beyond the standard event channel allocation policy. Access control for console input is enforced via the per-domain console->input_allowed flag, which is set for: - The hardware domain (by default in domain_create()) - dom0less domains on ARM (in construct_domU()) - The PV shim domain on x86 (in pv_shim_setup_dom()) - Domains with vpl011 using the Xen backend (in domain_vpl011_init()) From xen-devel-bounces@lists.xenproject.org Fri Feb 13 20:40:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 20:40:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231837.1536798 (Exim 4.92) (envelope-from ) id 1vqzxz-00050C-6q; Fri, 13 Feb 2026 20:40:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231837.1536798; Fri, 13 Feb 2026 20:40:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vqzxz-000505-4G; Fri, 13 Feb 2026 20:40:43 +0000 Received: by outflank-mailman (input) for mailman id 1231837; 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Date: Fri, 13 Feb 2026 21:40:31 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= Cc: Jan Beulich , xen-devel Subject: Re: Cannot boot PVH dom0 with big initrd Message-ID: References: <440f94be-77c0-4b28-b107-6efc3623a92f@suse.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: MA3P292CA0035.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:46::14) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|LV8PR03MB8140:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d8272da-a4ec-42c9-2118-08de6b402352 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cG1rcmtMMGpGMDZ3YlBBeXZtc001ei9JeExxNkNuYW9lMjFRbUkwcnZvOTc2?= =?utf-8?B?NVZJZEZFN3l2ajJZQ25oK2RCUUh6SGoyQUpZd3pRcVVlb2N5cTV1ZTJsVytj?= =?utf-8?B?QVFndVNENEhnTDc4ZTJUVGNCUE9wbjJaYXgvVjZOMHVGZzB4WW5FeXFMQWtQ?= =?utf-8?B?N1plc3FHNEdxR0gzWklmbDhTWFd1Yjh0bTRtSXdnRHd6RlBBcitZSGNBSGlq?= =?utf-8?B?bmU5RmxBNW9OQ3NkYXpSaXhiS2FmY2U4b3psZnpEdmZkUkc3Rzc2dTNYUjlS?= =?utf-8?B?bGZXWVZqZzdqTW8zTDFNckt3TklBeDIvMzhFOC83blBUSXJPVmRIQkVaNWRs?= =?utf-8?B?aHVEbFNZc3FDbUUyRjJhdllMUis5d3l1NXcyaGd5UWJ4VHc2cEZ3M1hzTVc2?= =?utf-8?B?WUQwWXBMdjFCQ0MzVjU3SGNGQWFTYzF3RkVWNXBuVTd6L1ZwK3g1dk5yZEQz?= =?utf-8?B?WXFocHpjNlIvZDFudDRKaEkyQzhOY2ZNNjI3TTMra0IrNGJIamJPbFMzNko2?= =?utf-8?B?WlBlbDFCbi9rd3BRNnJFYzBiak01OEpFMFNXNjhHQ1BicElEbEprWDQ5aFZO?= =?utf-8?B?dFM5OU02UFZxOG5CejMvbWZJWE1Ndkt4ekt2SytkZUhKZ3pWUnpQNm4xOWRY?= =?utf-8?B?Wmc2UnJHSXZqWWd5MkdKU1l5SUYyMDN0RHhBSVlNbDhTeDZ4TkRqd3pnVzN2?= =?utf-8?B?QStSMlZWL3ovQXpuSC9ncDRnb2pYUnhKOWFRbVRmNlBhZ213M2tYVFhOeGlE?= =?utf-8?B?dTAxVmxjU1lpQkJMQVlTUzl5VU4xcDRtYlNyeHg2ZHJXd1JVMzZRK3pXQ0ty?= =?utf-8?B?UGNpZ1dkT0p6bjIxTE1oTkl3TlJZd0p5aG9BZmlnZE9VMFIyb3hLOG5uZTZk?= =?utf-8?B?Q0htQUhQdHFXQ2RJbmpsVW5uUlZjVDVTbDlObm1LMkZDc254OXhtSjFCRUkr?= =?utf-8?B?SEFkQkRiaTREZlJUOUJLZ1lDTFdHd2ZVTGRtd1FqK3dnMEs0UU9rUUxBaWZI?= =?utf-8?B?cjNOeTgxTmQ4TCtod1p5TW8wQkdkYWlrWlpPNnE0UENTUkNXcWhHVGVqTVE1?= =?utf-8?B?MzNDSXRMN1NzN1RHSm9LRnJKMlRuQzk3Q3dBamFCU25EaTJOMU9sV0thVjV2?= =?utf-8?B?azc1M1JoZFl0cm9SSldnbXpNalFiSjB5cmd3QkgwMHJyS1l6Vk56dllTU2JF?= =?utf-8?B?QmRiNGNoMllLTmlGc2xaODk2YWR2dEkyQnR4emJvaVhUZE9iYmZ5M1F1aGVa?= =?utf-8?B?cjEwaGZvT0FmVlZTUStGL2lkRDMvbUtIaGU5V3Y0MVAxRHRwZVgvRlRyZDNO?= =?utf-8?B?Ym5qWDdhQ21GWHYwODVOU0FCeXdzTm0vM3hoVlZZbmJiLzFHTXBFenA5VjAv?= =?utf-8?B?a3I3MHA3eGRvdGc1VHp4WmFseENLK2tSQ1lLUFVsRy9HNGd3RXRGWlphY25V?= =?utf-8?B?Q0R5enpDbzZCaFByalBZRkxqSGFNZm9EdzhlYUVHMU8xdWFoRlpiWlE0ZGdv?= =?utf-8?B?a0diUk1VWDg3QVpYTmV4aDlPUzJBNFJKMHFtMXk3MDJSVlEyd0xkSDE3cjAv?= =?utf-8?B?SEVQTmlmT3JrYXhibjUwdjFEbnpkN3VPb0NvNThyRkRUcGRmS0VxOGFlOE11?= =?utf-8?B?VHlCZjI1MFl2R1lYamVGdm9TMnlnVjBvOHNNVHMxbmkzNFFLVlBHOGt1TGxw?= =?utf-8?B?dE13MERXU0t4dXN4UlJVUFZGWE1lTXdoRi81N1BvZXdvVkU2R2EzSjRocjF6?= =?utf-8?B?cUdrSERXQUlFcWxCZk5pYzE0NmxYQUNjSkxHc21kdHpvdzZXOUc1SVh5OW5y?= =?utf-8?B?b0pCNk9udk5zckpBZjFzWE5GOEZ0U2x0K2k0YXVCRUlGd1dqVXZ0U1hhenk5?= =?utf-8?B?VWtJTVlXcTRPOVBUQmVrbG5ESEhTL0FWODIzQ05YdzlzT0p3Wk14ZUFmU1Vk?= =?utf-8?B?am5YUFNmOGZzSHhsd2lWTVkrMm1QdDFIR0dOcXJ2MWtjVEdRTXFFdE96NDdW?= =?utf-8?B?NEZUdW9OZHJ3eW45Y1JHZHNSQURGMXZlcWZFMjFOVzZEN2h0TEs3Z3NoWUNt?= =?utf-8?Q?QUewtn?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016);DIR:OUT;SFP:1101; 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Xen is > > > started from GRUB, using MB2+EFI. > > > > Hmm, yes, there's an ordering issue: Of course we free initrd space (as used > > for passing from the boot loader to Xen) only after copying to the designated > > guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in > > its calculation (adding initial_images_nrpages()'s return value). PV Dom0 > > isn't affected because to load huge initrd there, the kernel has to request > > the initrd to not be mapped into the initial allocation. > > Right, on PV dom0 we do not copy the image to a new set of pages, we > simply assign the pages where the initrd resides to the domain. We > can't populate those pages in the p2m as-is, otherwise we would > shatter super pages. > > I think the fix below should do it, it's likely the best we can do. > Can you please give it a try Marek? > > Thanks, Roger. > --- > diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c > index 0b467fd4a4fc..8e3cb5d0db76 100644 > --- a/xen/arch/x86/dom0_build.c > +++ b/xen/arch/x86/dom0_build.c > @@ -343,7 +343,7 @@ unsigned long __init dom0_compute_nr_pages( > > for_each_node_mask ( node, dom0_nodes ) > avail += avail_domheap_pages_region(node, 0, 0) + > - initial_images_nrpages(node); > + is_pv_domain(d) ? initial_images_nrpages(node) : 0; > > /* Reserve memory for further dom0 vcpu-struct allocations... */ > avail -= (d->max_vcpus - 1UL) I'm working on a more complex patch, that attempts to account the memory used by the init images towards the reserved amount that's kept by Xen. This should make accounting a bit better, in that we won't end up reserving the Xen memory plus the memory used by the init images. It's still however a WIP, but would you mind giving it a try? Thanks, Roger. --- diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 0b467fd4a4fc..3d54af197188 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -325,10 +325,18 @@ unsigned long __init dom0_paging_pages(const struct domain *d, * If allocation isn't specified, reserve 1/16th of available memory for * things like DMA buffers. This reservation is clamped to a maximum of 128MB. */ -static unsigned long __init default_nr_pages(unsigned long avail) +static unsigned long __init default_nr_pages(unsigned long avail, + unsigned long init_images) { - return avail - (pv_shim ? pv_shim_mem(avail) - : min(avail / 16, 128UL << (20 - PAGE_SHIFT))); + unsigned long rsvd = min(avail / 16, 128UL << (20 - PAGE_SHIFT)); + + /* + * Account for memory consumed by initial images as if it was part of the + * reserved amount. + */ + rsvd -= rsvd <= init_images ? rsvd : init_images; + + return avail - (pv_shim ? pv_shim_mem(avail) : rsvd); } unsigned long __init dom0_compute_nr_pages( @@ -336,14 +344,28 @@ unsigned long __init dom0_compute_nr_pages( { nodeid_t node; unsigned long avail = 0, nr_pages, min_pages, max_pages, iommu_pages = 0; + unsigned long init_images = 0; /* The ordering of operands is to work around a clang5 issue. */ if ( CONFIG_DOM0_MEM[0] && !dom0_mem_set ) parse_dom0_mem(CONFIG_DOM0_MEM); for_each_node_mask ( node, dom0_nodes ) - avail += avail_domheap_pages_region(node, 0, 0) + - initial_images_nrpages(node); + { + avail += avail_domheap_pages_region(node, 0, 0); + init_images += initial_images_nrpages(node); + } + + if ( is_pv_domain(d) ) + { + /* + * For PV domains the initrd pages are directly assigned to the + * guest, and hence the initrd size counts as free memory that can + * be used by the domain. Set to 0 to prevent further adjustments. + */ + avail += init_images; + init_images = 0; + } /* Reserve memory for further dom0 vcpu-struct allocations... */ avail -= (d->max_vcpus - 1UL) @@ -367,7 +389,8 @@ unsigned long __init dom0_compute_nr_pages( { unsigned long cpu_pages; - nr_pages = get_memsize(&dom0_size, avail) ?: default_nr_pages(avail); + nr_pages = get_memsize(&dom0_size, avail) ?: + default_nr_pages(avail, init_images); /* * Clamp according to min/max limits and available memory @@ -385,7 +408,8 @@ unsigned long __init dom0_compute_nr_pages( avail -= cpu_pages - iommu_pages; } - nr_pages = get_memsize(&dom0_size, avail) ?: default_nr_pages(avail); + nr_pages = get_memsize(&dom0_size, avail) ?: + default_nr_pages(avail, init_images); min_pages = get_memsize(&dom0_min_size, avail); max_pages = get_memsize(&dom0_max_size, avail); From xen-devel-bounces@lists.xenproject.org Fri Feb 13 21:37:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 21:37:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231884.1536809 (Exim 4.92) (envelope-from ) id 1vr0qt-00035e-G4; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="JsQupDVTPitSrll8" Content-Disposition: inline In-Reply-To: --JsQupDVTPitSrll8 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 22:37:19 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: Jan Beulich , xen-devel Subject: Re: Cannot boot PVH dom0 with big initrd On Fri, Feb 13, 2026 at 04:56:39PM +0100, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 13, 2026 at 09:56:42AM +0100, Jan Beulich wrote: > > On 13.02.2026 05:02, Marek Marczykowski-G=C3=B3recki wrote: > > > Hi, > > >=20 > > > After fixing the xhci crash, I hit another issue - booting with 236MB > > > initrd doesn't work, I get: > > >=20 > > > (XEN) [ 3.151856] *** Building a PVH Dom0 *** > > > ... > > > (XEN) [ 3.593940] Unable to allocate memory with order 0! > > > (XEN) [ 3.597110] Failed to setup Dom0 physical memory map > > > (XEN) [ 3.599884]=20 > > > (XEN) [ 3.602482] **************************************** > > > (XEN) [ 3.605272] Panic on CPU 0: > > > (XEN) [ 3.607928] Could not construct d0 > > > (XEN) [ 3.610692] **************************************** > > > (XEN) [ 3.613463]=20 > > > (XEN) [ 3.616035] Reboot in five seconds... > > > (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_REG. > > >=20 > > > Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f289= 9781755762f565 > > >=20 > > > If I skip initrd, then it boots just fine (but dom0 is not happy about > > > that). 164MB initrd failed too, but 13MB started ok. > > > Just in case, I tried skipping XHCI console, but it didn't change > > > anything. > > >=20 > > > Host has 16GB of memory, and there is no dom0_mem=3D parameter. Xen is > > > started from GRUB, using MB2+EFI. > >=20 > > Hmm, yes, there's an ordering issue: Of course we free initrd space (as= used > > for passing from the boot loader to Xen) only after copying to the desi= gnated > > guest area. Yet dom0_compute_nr_pages(), intentionally, includes the sp= ace in > > its calculation (adding initial_images_nrpages()'s return value). PV Do= m0 > > isn't affected because to load huge initrd there, the kernel has to req= uest > > the initrd to not be mapped into the initial allocation. >=20 > Right, on PV dom0 we do not copy the image to a new set of pages, we > simply assign the pages where the initrd resides to the domain. We > can't populate those pages in the p2m as-is, otherwise we would > shatter super pages. >=20 > I think the fix below should do it, it's likely the best we can do. > Can you please give it a try Marek? With this, it's different: (XEN) [ 4.510345] Dom0 memory allocation stats: (XEN) [ 4.513110] order 0 allocations: 1 (XEN) [ 4.515847] order 1 allocations: 1 (XEN) [ 4.518593] order 2 allocations: 2 (XEN) [ 4.521329] order 3 allocations: 2 (XEN) [ 4.524076] order 4 allocations: 1 (XEN) [ 4.526799] order 5 allocations: 1 (XEN) [ 4.529518] order 6 allocations: 1 (XEN) [ 4.532118] order 7 allocations: 2 (XEN) [ 4.534807] order 8 allocations: 2 (XEN) [ 4.537483] order 9 allocations: 1 (XEN) [ 4.540052] order 10 allocations: 2 (XEN) [ 4.542618] order 11 allocations: 2 (XEN) [ 4.545276] order 12 allocations: 1 (XEN) [ 4.547949] order 13 allocations: 1 (XEN) [ 4.550501] order 14 allocations: 1 (XEN) [ 4.553147] order 15 allocations: 1 (XEN) [ 5.393487] ELF: phdr: paddr=3D0x200000 memsz=3D0x1ff3928 (XEN) [ 5.396196] ELF: phdr: paddr=3D0x2200000 memsz=3D0x1c00000 (XEN) [ 5.398891] ELF: memory: 0x200000 -> 0x3e00000 (XEN) [ 5.401592] ELF: note: PHYS32_RELOC align: 0x200000 min: 0x200= 000 max: 0x3fffffff (XEN) [ 5.404632] ELF: note: PHYS32_ENTRY =3D 0x16a2ca0 (XEN) [ 5.407695] ELF: note: GUEST_OS =3D "linux" (XEN) [ 5.410748] ELF: note: GUEST_VERSION =3D "2.6" (XEN) [ 5.413810] ELF: note: XEN_VERSION =3D "xen-3.0" (XEN) [ 5.416891] ELF: note: VIRT_BASE =3D 0xffffffff80000000 (XEN) [ 5.419976] ELF: note: INIT_P2M =3D 0x8000000000 (XEN) [ 5.423062] ELF: note: ENTRY =3D 0xffffffff82d3c160 (XEN) [ 5.426155] ELF: note: FEATURES =3D "!writable_page_tables" (XEN) [ 5.429260] ELF: note: PAE_MODE =3D "yes" (XEN) [ 5.432343] ELF: note: L1_MFN_VALID (XEN) [ 5.434952] ELF: note: MOD_START_PFN =3D 0x1 (XEN) [ 5.437975] ELF: note: PADDR_OFFSET =3D 0 (XEN) [ 5.440928] ELF: note: SUPPORTED_FEATURES =3D 0x8801 (XEN) [ 5.443871] ELF: note: LOADER =3D "generic" (XEN) [ 5.446785] ELF: note: SUSPEND_CANCEL =3D 0x1 (XEN) [ 5.449696] ELF: Found PVH image (XEN) [ 5.452574] ELF: addresses: (XEN) [ 5.455002] virt_base =3D 0x0 (XEN) [ 5.457569] elf_paddr_offset =3D 0x0 (XEN) [ 5.460102] virt_offset =3D 0x0 (XEN) [ 5.462569] virt_kstart =3D 0x200000 (XEN) [ 5.465049] virt_kend =3D 0x3e00000 (XEN) [ 5.467515] virt_entry =3D 0x16a2ca0 (XEN) [ 5.469983] p2m_base =3D 0x8000000000 (XEN) [ 5.472465] ELF: phdr 0 at 0x200000 -> 0x21f3928 (XEN) [ 5.480548] ELF: phdr 1 at 0x2200000 -> 0x3e00000 (XEN) [ 5.487915] Unable to find a memory region to load initrd and = metadata (XEN) [ 5.490466] Failed to load Dom0 kernel (XEN) [ 5.492954]=20 (XEN) [ 5.495266] **************************************** (XEN) [ 5.497755] Panic on CPU 0: (XEN) [ 5.500065] Could not construct d0 (XEN) [ 5.502470] **************************************** (XEN) [ 5.504897]=20 (XEN) [ 5.507134] Reboot in five seconds... (XEN) [ 10.517191] Resetting with ACPI MEMORY or I/O RESET_REG. FWIW memory map is in the full console dump linked earlier. I'll test the other patch next. > --- > diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c > index 0b467fd4a4fc..8e3cb5d0db76 100644 > --- a/xen/arch/x86/dom0_build.c > +++ b/xen/arch/x86/dom0_build.c > @@ -343,7 +343,7 @@ unsigned long __init dom0_compute_nr_pages( > =20 > for_each_node_mask ( node, dom0_nodes ) > avail +=3D avail_domheap_pages_region(node, 0, 0) + > - initial_images_nrpages(node); > + is_pv_domain(d) ? initial_images_nrpages(node) : 0; > =20 > /* Reserve memory for further dom0 vcpu-struct allocations... */ > avail -=3D (d->max_vcpus - 1UL) >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --JsQupDVTPitSrll8 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmPmY8ACgkQ24/THMrX 1yygMwf+OViSapZ+FzO33whx5jKuHIuzKPziLofD8wwQkpUNqoGMfKA/QtJcgq8A 29SmyRRMvVjt6Xd8Rgc6a0nJBKOjmuli9NIiaPJ5Yvy0TLBHb7uGG0ypo8RwfM1b wjrsm3v0bpyD2dzbN7mgBpywFtdNwgzGqHiFE7BPdd1nIEf+Z61ilqP/ygbFKIBf kM7Mjlf0hPplMvxloqw8LeZ/ewI1SOepEuXpN4/wK8tO2kYtwPtZriq1dqhjaB3O RXFFSQzNnhgTSIoLkXdrEXPWtSEmoaTwT+N/GuZA8mBMIY1oUH2ZJ9SS3VM6j+zz IPa3jFF4lkXDcEn/U3xuUhF+b/qcrw== =Qgaz -----END PGP SIGNATURE----- --JsQupDVTPitSrll8-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 21:46:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 21:46:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231894.1536817 (Exim 4.92) (envelope-from ) id 1vr0za-0004eV-82; Fri, 13 Feb 2026 21:46:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231894.1536817; Fri, 13 Feb 2026 21:46:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr0za-0004eO-4Z; Fri, 13 Feb 2026 21:46:26 +0000 Received: by outflank-mailman (input) for mailman id 1231894; Fri, 13 Feb 2026 21:46:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr0zY-0004eI-Cf for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 21:46:24 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6d084236-0925-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 22:46:18 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id AA5F243CDC; Fri, 13 Feb 2026 21:46:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A146EC116C6; Fri, 13 Feb 2026 21:46:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6d084236-0925-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771019176; bh=KFPScMimbqg2ZskFFSMcwPtRwgWkT2VJuTcbSbUOl8Y=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=cilrmGdABoyoAdmwP3XIyRsycGXnD7MdwvfsS+FcpB6L7XrcbCNDJuq5xLk1yaeE2 yRvn+PgjPP3DszhuYFbMQQ/9OY1D9Fv4CqC4Yk7dzSNjWW5gfUla8uSkR/WjI8AZgy HViNOBwwgUbE576vZbilEketW6Q4CXrkAWVF5t4YkbO99dU7iI/7IG1ahh7PrtHh03 IQ5Xv5Qqcj10AniF9opXYrzW4z8gP1NyfpjxmxNHK4D0xOF/fZdPAe8M7wWoGMHMbe kWeI7R4vG81jep5JQfV5eso0ab/7WvBMBo48iwya6V7gOUhKGY8VWw+aP9fuZ77DbC PGKuUMJnFTv3g== Date: Fri, 13 Feb 2026 13:46:14 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization In-Reply-To: <7a3b72b4-23f9-410f-8d0d-08d9adaaf1a7@suse.com> Message-ID: References: <20260206210554.126443-1-stefano.stabellini@amd.com> <7a3b72b4-23f9-410f-8d0d-08d9adaaf1a7@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 9 Feb 2026, Jan Beulich wrote: > On 06.02.2026 22:05, Stefano Stabellini wrote: > > --- a/xen/arch/x86/hvm/Kconfig > > +++ b/xen/arch/x86/hvm/Kconfig > > @@ -92,4 +92,14 @@ config MEM_SHARING > > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > > depends on INTEL_VMX > > > > +config NESTED_VIRT > > + bool "Nested virtualization support" > > + depends on AMD_SVM || INTEL_VMX > > Should be HVM? Or else have separate NESTED_SVM and NESTED_VMX? > > > + default n > > Please omit such a redundant line. done and done > > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > > @@ -26,6 +26,13 @@ > > #define nsvm_efer_svm_enabled(v) \ > > (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > > > > +#define NSVM_INTR_NOTHANDLED 3 > > +#define NSVM_INTR_NOTINTERCEPTED 2 > > +#define NSVM_INTR_FORCEVMEXIT 1 > > +#define NSVM_INTR_MASKED 0 > > It feels suspicious that all of these need moving ... > > > +#ifdef CONFIG_NESTED_VIRT > > ... ahead of this. Not needed anymore > > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > > /* Nested HVM on/off per domain */ > > static inline bool nestedhvm_enabled(const struct domain *d) > > { > > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > > + (d->options & XEN_DOMCTL_CDF_nested_virt); > > } > > > > +/* Nested paging */ > > +#define NESTEDHVM_PAGEFAULT_DONE 0 > > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > > + > > +#ifdef CONFIG_NESTED_VIRT > > Same here. the stub nestedhvm_hap_nested_page_fault() returns NESTEDHVM_PAGEFAULT_L0_ERROR, so these defines must be available unconditionally. > > --- a/xen/arch/x86/mm/hap/Makefile > > +++ b/xen/arch/x86/mm/hap/Makefile > > @@ -2,5 +2,5 @@ obj-y += hap.o > > obj-y += guest_walk_2.o > > obj-y += guest_walk_3.o > > obj-y += guest_walk_4.o > > -obj-y += nested_hap.o > > -obj-$(CONFIG_INTEL_VMX) += nested_ept.o > > +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o > > +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) += nested_ept.o > > Maybe slightly easier to read as > > nested-y := nested_hap.o > nested-$(CONFIG_INTEL_VMX) += nested_ept.o > obj-$(CONFIG_NESTED_VIRT) += $(nested-y) OK > > --- a/xen/arch/x86/sysctl.c > > +++ b/xen/arch/x86/sysctl.c > > @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > > pi->capabilities |= XEN_SYSCTL_PHYSCAP_hap; > > if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > > pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow; > > + if ( hvm_nested_virt_supported() ) > > + pi->capabilities |= XEN_SYSCTL_PHYSCAP_nestedhvm; > > } > > > > long arch_do_sysctl( > > --- a/xen/include/public/sysctl.h > > +++ b/xen/include/public/sysctl.h > > @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { > > /* Xen supports the Grant v1 and/or v2 ABIs. */ > > #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) > > #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) > > +/* The platform supports nested HVM. */ > > +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) > > Doesn't this want introducing up front, for the tool stack to make use of? What do you mean by "up front" in this context? In a separate toolstack patch? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Y9wcupkv4ec30jr7" Content-Disposition: inline In-Reply-To: --Y9wcupkv4ec30jr7 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 13 Feb 2026 22:49:08 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: Jan Beulich , xen-devel Subject: Re: Cannot boot PVH dom0 with big initrd On Fri, Feb 13, 2026 at 09:40:31PM +0100, Roger Pau Monn=C3=A9 wrote: > On Fri, Feb 13, 2026 at 04:56:39PM +0100, Roger Pau Monn=C3=A9 wrote: > > On Fri, Feb 13, 2026 at 09:56:42AM +0100, Jan Beulich wrote: > > > On 13.02.2026 05:02, Marek Marczykowski-G=C3=B3recki wrote: > > > > Hi, > > > >=20 > > > > After fixing the xhci crash, I hit another issue - booting with 236= MB > > > > initrd doesn't work, I get: > > > >=20 > > > > (XEN) [ 3.151856] *** Building a PVH Dom0 *** > > > > ... > > > > (XEN) [ 3.593940] Unable to allocate memory with order 0! > > > > (XEN) [ 3.597110] Failed to setup Dom0 physical memory map > > > > (XEN) [ 3.599884]=20 > > > > (XEN) [ 3.602482] **************************************** > > > > (XEN) [ 3.605272] Panic on CPU 0: > > > > (XEN) [ 3.607928] Could not construct d0 > > > > (XEN) [ 3.610692] **************************************** > > > > (XEN) [ 3.613463]=20 > > > > (XEN) [ 3.616035] Reboot in five seconds... > > > > (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_RE= G. > > > >=20 > > > > Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f2= 899781755762f565 > > > >=20 > > > > If I skip initrd, then it boots just fine (but dom0 is not happy ab= out > > > > that). 164MB initrd failed too, but 13MB started ok. > > > > Just in case, I tried skipping XHCI console, but it didn't change > > > > anything. > > > >=20 > > > > Host has 16GB of memory, and there is no dom0_mem=3D parameter. Xen= is > > > > started from GRUB, using MB2+EFI. > > >=20 > > > Hmm, yes, there's an ordering issue: Of course we free initrd space (= as used > > > for passing from the boot loader to Xen) only after copying to the de= signated > > > guest area. Yet dom0_compute_nr_pages(), intentionally, includes the = space in > > > its calculation (adding initial_images_nrpages()'s return value). PV = Dom0 > > > isn't affected because to load huge initrd there, the kernel has to r= equest > > > the initrd to not be mapped into the initial allocation. > >=20 > > Right, on PV dom0 we do not copy the image to a new set of pages, we > > simply assign the pages where the initrd resides to the domain. We > > can't populate those pages in the p2m as-is, otherwise we would > > shatter super pages. > >=20 > > I think the fix below should do it, it's likely the best we can do. > > Can you please give it a try Marek? > >=20 > > Thanks, Roger. > > --- > > diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c > > index 0b467fd4a4fc..8e3cb5d0db76 100644 > > --- a/xen/arch/x86/dom0_build.c > > +++ b/xen/arch/x86/dom0_build.c > > @@ -343,7 +343,7 @@ unsigned long __init dom0_compute_nr_pages( > > =20 > > for_each_node_mask ( node, dom0_nodes ) > > avail +=3D avail_domheap_pages_region(node, 0, 0) + > > - initial_images_nrpages(node); > > + is_pv_domain(d) ? initial_images_nrpages(node) : 0; > > =20 > > /* Reserve memory for further dom0 vcpu-struct allocations... */ > > avail -=3D (d->max_vcpus - 1UL) >=20 > I'm working on a more complex patch, that attempts to account the > memory used by the init images towards the reserved amount that's kept > by Xen. This should make accounting a bit better, in that we won't > end up reserving the Xen memory plus the memory used by the init > images. >=20 > It's still however a WIP, but would you mind giving it a try? This one worked :) (XEN) [ 4.014243] Dom0 memory allocation stats: (XEN) [ 4.017378] order 0 allocations: 4 (XEN) [ 4.020111] order 1 allocations: 3 (XEN) [ 4.022758] order 2 allocations: 4 (XEN) [ 4.025406] order 3 allocations: 4 (XEN) [ 4.028150] order 4 allocations: 3 (XEN) [ 4.030886] order 5 allocations: 2 (XEN) [ 4.033602] order 6 allocations: 2 (XEN) [ 4.036305] order 7 allocations: 6 (XEN) [ 4.039020] order 8 allocations: 6 (XEN) [ 4.041597] order 9 allocations: 5 (XEN) [ 4.044261] order 10 allocations: 9 (XEN) [ 4.046831] order 11 allocations: 7 (XEN) [ 4.049493] order 12 allocations: 9 (XEN) [ 4.052147] order 13 allocations: 7 (XEN) [ 4.054799] order 14 allocations: 6 (XEN) [ 4.057447] order 15 allocations: 7 (XEN) [ 4.060080] order 16 allocations: 7 (XEN) [ 4.062609] order 17 allocations: 5 (XEN) [ 4.065227] order 18 allocations: 9 (XEN) [ 4.921719] ELF: phdr: paddr=3D0x200000 memsz=3D0x1ff3928 (XEN) [ 4.924403] ELF: phdr: paddr=3D0x2200000 memsz=3D0x1c00000 (XEN) [ 4.927079] ELF: memory: 0x200000 -> 0x3e00000 (XEN) [ 4.929759] ELF: note: PHYS32_RELOC align: 0x200000 min: 0x200= 000 max: 0x3fffffff (XEN) [ 4.932884] ELF: note: PHYS32_ENTRY =3D 0x16a2ca0 (XEN) [ 4.935921] ELF: note: GUEST_OS =3D "linux" (XEN) [ 4.938953] ELF: note: GUEST_VERSION =3D "2.6" (XEN) [ 4.942005] ELF: note: XEN_VERSION =3D "xen-3.0" (XEN) [ 4.945077] ELF: note: VIRT_BASE =3D 0xffffffff80000000 (XEN) [ 4.948133] ELF: note: INIT_P2M =3D 0x8000000000 (XEN) [ 4.951203] ELF: note: ENTRY =3D 0xffffffff82d3c160 (XEN) [ 4.954221] ELF: note: FEATURES =3D "!writable_page_tables" (XEN) [ 4.957229] ELF: note: PAE_MODE =3D "yes" (XEN) [ 4.960175] ELF: note: L1_MFN_VALID (XEN) [ 4.962775] ELF: note: MOD_START_PFN =3D 0x1 (XEN) [ 4.965675] ELF: note: PADDR_OFFSET =3D 0 (XEN) [ 4.968540] ELF: note: SUPPORTED_FEATURES =3D 0x8801 (XEN) [ 4.971420] ELF: note: LOADER =3D "generic" (XEN) [ 4.974303] ELF: note: SUSPEND_CANCEL =3D 0x1 (XEN) [ 4.977186] ELF: Found PVH image (XEN) [ 4.979910] ELF: addresses: (XEN) [ 4.982237] virt_base =3D 0x0 (XEN) [ 4.984694] elf_paddr_offset =3D 0x0 (XEN) [ 4.987141] virt_offset =3D 0x0 (XEN) [ 4.989599] virt_kstart =3D 0x200000 (XEN) [ 4.992044] virt_kend =3D 0x3e00000 (XEN) [ 4.994498] virt_entry =3D 0x16a2ca0 (XEN) [ 4.996966] p2m_base =3D 0x8000000000 (XEN) [ 4.999415] ELF: phdr 0 at 0x200000 -> 0x21f3928 (XEN) [ 5.007160] ELF: phdr 1 at 0x2200000 -> 0x3e00000 (XEN) [ 5.055448] Dom0 memory map: (XEN) [ 5.057763] [0000000000000000, 000000000009efff] (usable) (XEN) [ 5.060281] [000000000009f000, 00000000000fffff] (reserved) (XEN) [ 5.062812] [0000000000100000, 000000005471afff] (usable) (XEN) [ 5.065324] [000000005471b000, 000000005475bfff] (reserved) (XEN) [ 5.067891] [000000005475c000, 0000000063c2dfff] (usable) (XEN) [ 5.070446] [0000000063c2e000, 000000006d17afff] (reserved) (XEN) [ 5.073036] [000000006d17b000, 000000006d22bfff] (ACPI data) (XEN) [ 5.075649] [000000006d22c000, 000000006d2ebfff] (ACPI NVS) (XEN) [ 5.078267] [000000006d2ec000, 000000006fffefff] (reserved) (XEN) [ 5.080908] [000000006ffff000, 000000006ffffdcb] (usable) (XEN) [ 5.083560] [000000006ffffdcc, 000000006ffffe97] (ACPI data) (XEN) [ 5.086243] [0000000070000000, 00000000807fffff] (reserved) (XEN) [ 5.088943] [00000000c0000000, 00000000cfffffff] (reserved) (XEN) [ 5.091662] [00000000fe000000, 00000000fe010fff] (reserved) (XEN) [ 5.094413] [00000000fec00000, 00000000fec00fff] (reserved) (XEN) [ 5.097193] [00000000fed00000, 00000000fed00fff] (reserved) (XEN) [ 5.099976] [00000000fed20000, 00000000fed7ffff] (reserved) (XEN) [ 5.102779] [00000000fee00000, 00000000fee00fff] (reserved) (XEN) [ 5.105615] [00000000ff000000, 00000001023fffff] (reserved) (XEN) [ 5.108487] [0000000102400000, 000000045c89cfff] (usable) (XEN) [ 5.111354] [000000045c89d000, 000000047f7fffff] (unusable) (XEN) [ 5.114263] Initial low memory virq threshold set at 0x4000 pa= ges. (XEN) [ 5.117108] Scrubbing Free RAM in background --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Y9wcupkv4ec30jr7 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmPnFQACgkQ24/THMrX 1yytRwf8CbkE+uwZMD5qsnWWXFu72COmXFjCJCoEOQUvb/0PkFXxuFzOgX7oK2fF zEY0KfyRUxje8lo5SsM2zhWkXAZL24L/F9EdVVU7TgbFkIe1lewbrOpdHGFxlXTu nGkgDewq4gDufxMaXXFbZ9UksvY+cFNJqc8yE4fsFltC1GBy5HREPVtqQpLJl+0B YJuy9wdXPQHMfTg6BPskiEaN3pAz6++0O1Hw1gEcEekBCF/StjcejGb6/dztVF5I w5NlUf9rmCHH1eYYDknbQEPHBVECt04bH+35+ym3/7f2hQ2s+/hQOoATyGq58xRg H7sIXo76fREm4uWOp9d88DjmCuEE0A== =OOSS -----END PGP SIGNATURE----- --Y9wcupkv4ec30jr7-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 21:56:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 21:56:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231916.1536838 (Exim 4.92) (envelope-from ) id 1vr19Y-0006sF-HB; Fri, 13 Feb 2026 21:56:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231916.1536838; Fri, 13 Feb 2026 21:56:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr19Y-0006s8-DR; Fri, 13 Feb 2026 21:56:44 +0000 Received: by outflank-mailman (input) for mailman id 1231916; Fri, 13 Feb 2026 21:56:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr19X-0006s2-II for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 21:56:43 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id deb8e4f0-0926-11f1-9ccf-f158ae23cfc8; Fri, 13 Feb 2026 22:56:38 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 9D7DD6001A; Fri, 13 Feb 2026 21:56:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 783DCC116C6; Fri, 13 Feb 2026 21:56:35 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: deb8e4f0-0926-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771019796; bh=ApnKDW/C9ceLNi28JGt4sWG/r+kvsTuZZlW0Yx461hk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=LWlytEOmdCGiAAOKZLOS7ooW/EcpT7tNiEnwpxfSanQYFm50Ajz6TTEHjT4d/8azK X8ffosQAycz1kdxBjgU+p4XAQWwhZYOWeqZ32rhHYH9dzUOvXOzpR3200BybyTlRre afSVh50htHIk48rOxjabZPBb54lAdYduiy2g9oI8kytItAceBpksaSU2Wv+f/iQ+LE cs8F2A+FFuQ/U3RLbORH181RLPL7QJZrmAZZ9R0JXaW2VKXw2Ocw6mR0dx/OhH6hG3 +0bjzRgx7Iva97QnvPszcX/6lwBSsBTixKYKdgwz+oJDgH1vcXRFm7xo8eZ6Y8HCWb 6El3aRJtONOLg== Date: Fri, 13 Feb 2026 13:56:34 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= cc: Stefano Stabellini , xen-devel@lists.xenproject.org, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization In-Reply-To: Message-ID: References: <20260206210554.126443-1-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-324736620-1771019588=:6031" Content-ID: This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-324736620-1771019588=:6031 Content-Type: text/plain; CHARSET=UTF-8 Content-Transfer-Encoding: 8BIT Content-ID: I address all other comments On Mon, 9 Feb 2026, Roger Pau Monné wrote: > > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 > > *msr_content) > > +{ > > + ASSERT_UNREACHABLE(); > > + return 0; > > +} > > > I think this function is reachable even when nested virt is not > enabled: > > vmx_msr_read_intercept() -> case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC -> nvmx_msr_read_intercept() > > I'm also confused about why the function returns 0 instead of an error > when !nestedhvm_enabled(). We should probably make it return -ENODEV > when nested virt is not available or enabled. I agree on the way of thinking but if we return zero it will goto gp_fault. So I'll just remove ASSERT_UNREACHABLE. > > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > > + unsigned int exit_reason) > > +{ > > + ASSERT_UNREACHABLE(); > > + return 0; > > +} > > Same here, I think this is likely reachable from vmx_vmexit_handler(), > and shouldn't assert? > > It should also do something like: > > hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > return X86EMUL_EXCEPTION; > > So it mimics what the function itself does when !nestedhvm_enabled(). hvm_inject_hw_exception cannot be easily called here because it is not available at this point in the header. But actually this function should be unreachable because when !CONFIG_NESTED_VIRT, CR4.VMXE is not a valid guest CR4 bit, so nested VMX instructions should cause #UD? I changed it to: ASSERT_UNREACHABLE(); return X86EMUL_EXCEPTION; --8323329-324736620-1771019588=:6031-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:02:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:02:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231926.1536848 (Exim 4.92) (envelope-from ) id 1vr1F0-00007R-4C; Fri, 13 Feb 2026 22:02:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231926.1536848; Fri, 13 Feb 2026 22:02:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1F0-00007I-1T; Fri, 13 Feb 2026 22:02:22 +0000 Received: by outflank-mailman (input) for mailman id 1231926; Fri, 13 Feb 2026 22:02:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1Ey-00007B-JE for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: r4vnLcz0/0zNh2n8e9iY2UnWL4tyzNTWdqIAYjRv3kdq74o+T5Ko0hFL74lKU4+L4dqgi541KDSktOSMbGsUFzbIMuYzCwxOkVCLj/UsyT6lNkvoPcwhMN64H0P/oEvmcgISutcAZTJj037q8CumRLN0ToUwp0K74kKGcjZN2eQCakaA3ARgIG3X9WRRdB06FufE2ZCsnGasF9NhbvGek6o+fAVlcZJdzG0ujUoHgron/ckO51lTB83L7/EGYjmJ9IoXPKsfGh9WguL8OzrplTrH9ALZXGaCZGyR9pJqnxYwzytcJn30mRpeFgmSBwZPzOBCRPKADqyFsFQ4lb2dWD3SBw5DUDd7VrFNzqwIkq5OYM4fgCpK9X6oUrnrmlY83Xsz5UHsio+I+MmzBizXju/t59zrcT7h1VmoHzSH0zJVcmImE2cBaWZ8rEDAwGRS X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 22:02:07.9243 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90290075-5d1a-4e71-d641-08de6b4b87e5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8309 Introduce CONFIG_NESTED_VIRT (default n) to allow nested virtualization support to be disabled at build time. This is useful for embedded or safety-focused deployments where nested virtualization is not needed, reducing code size and attack surface. When CONFIG_NESTED_VIRT=n, the following source files are excluded: - arch/x86/hvm/nestedhvm.c - arch/x86/hvm/svm/nestedsvm.c - arch/x86/hvm/vmx/vvmx.c - arch/x86/mm/nested.c - arch/x86/mm/hap/nested_hap.c - arch/x86/mm/hap/nested_ept.c Add inline stubs where needed in headers. Guard assembly code paths for nested virt with #ifdef CONFIG_NESTED_VIRT. Move exception injection for VMX/SVM instructions to the callers in vmx.c/svm.c to avoid header dependency issues in the stubs. No functional change when CONFIG_NESTED_VIRT=y. Signed-off-by: Stefano Stabellini --- Changes in v3: - Kconfig: Change "depends on AMD_SVM || INTEL_VMX" to "depends on HVM" - Kconfig: Remove redundant "default n" line - Kconfig: Remove "If unsure, say N." from help text - mm/hap/Makefile: Simplify using intermediate nested-y variable: nested-y := nested_hap.o nested-$(CONFIG_INTEL_VMX) += nested_ept.o obj-$(CONFIG_NESTED_VIRT) += $(nested-y) - svm/nestedhvm.h: Remove #ifdef CONFIG_NESTED_VIRT stubs, keep only function declarations (the functions are only called from code that is already compiled out when nested virt is disabled) - svm/nestedhvm.h: Add CONFIG_NESTED_VIRT guard to nsvm_efer_svm_enabled macro to return false when nested virt is disabled - svm/svm.c: Move #UD injection for STGI/CLGI to the caller instead of stub functions, checking nestedhvm_enabled()/nsvm_efer_svm_enabled() - svm/svm.c: Mark svm_vmexit_do_vmrun/vmload/vmsave as __maybe_unused - svm/svm.c: Remove empty nsvm_vcpu_switch stub (now guarded in asm) - svm/entry.S: Add #ifdef CONFIG_NESTED_VIRT guards around nested virt specific code paths - vmx/vmx.c: Remove empty nvmx_switch_guest stub (now guarded in asm) - vmx/vmx.c: Move nvmx_enqueue_n2_exceptions and nvmx_vmexit_event to vvmx.c where they belong - vmx/vvmx.h: Add declarations for nvmx_vmexit_event and nvmx_enqueue_n2_exceptions - vmx/vvmx.h: Fix nvmx_msr_read_intercept stub comment - vmx/vvmx.h: nvmx_handle_vmx_insn stub returns X86EMUL_EXCEPTION with ASSERT_UNREACHABLE (caller handles injection) - vmx/vvmx.h: Convert get_vvmcs macro to inline function in stubs - vmx/entry.S: Add #ifdef CONFIG_NESTED_VIRT guard around nvmx_switch_guest - nestedhvm.h: Convert macro stubs to proper inline functions --- xen/arch/x86/hvm/Kconfig | 7 +++ xen/arch/x86/hvm/Makefile | 2 +- xen/arch/x86/hvm/svm/Makefile | 2 +- xen/arch/x86/hvm/svm/entry.S | 4 ++ xen/arch/x86/hvm/svm/nestedhvm.h | 2 +- xen/arch/x86/hvm/svm/svm.c | 18 ++++-- xen/arch/x86/hvm/vmx/Makefile | 2 +- xen/arch/x86/hvm/vmx/entry.S | 2 + xen/arch/x86/hvm/vmx/vmx.c | 31 +--------- xen/arch/x86/hvm/vmx/vvmx.c | 26 +++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 2 +- xen/arch/x86/include/asm/hvm/nestedhvm.h | 64 +++++++++++++++++--- xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 74 ++++++++++++++++++++++++ xen/arch/x86/mm/Makefile | 2 +- xen/arch/x86/mm/hap/Makefile | 5 +- xen/arch/x86/mm/p2m.h | 6 ++ xen/arch/x86/sysctl.c | 2 + xen/include/public/sysctl.h | 4 +- 18 files changed, 204 insertions(+), 51 deletions(-) diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb7..af661385b5 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -92,4 +92,11 @@ config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX +config NESTED_VIRT + bool "Nested virtualization support" + depends on HVM + help + Enable nested virtualization, allowing guests to run their own + hypervisors. This requires hardware support. + endif diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile index f34fb03934..b8a0a68624 100644 --- a/xen/arch/x86/hvm/Makefile +++ b/xen/arch/x86/hvm/Makefile @@ -18,7 +18,7 @@ obj-y += irq.o obj-y += mmio.o obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mtrr.o -obj-y += nestedhvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedhvm.o obj-y += pmtimer.o obj-y += quirks.o obj-y += rtc.o diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile index 8a072cafd5..92418e3444 100644 --- a/xen/arch/x86/hvm/svm/Makefile +++ b/xen/arch/x86/hvm/svm/Makefile @@ -2,6 +2,6 @@ obj-y += asid.o obj-y += emulate.o obj-bin-y += entry.o obj-y += intr.o -obj-y += nestedsvm.o +obj-$(CONFIG_NESTED_VIRT) += nestedsvm.o obj-y += svm.o obj-y += vmcb.o diff --git a/xen/arch/x86/hvm/svm/entry.S b/xen/arch/x86/hvm/svm/entry.S index af8db23b03..7964c80750 100644 --- a/xen/arch/x86/hvm/svm/entry.S +++ b/xen/arch/x86/hvm/svm/entry.S @@ -28,7 +28,9 @@ FUNC(svm_asm_do_resume) GET_CURRENT(bx) .Lsvm_do_resume: call svm_intr_assist +#ifdef CONFIG_NESTED_VIRT call nsvm_vcpu_switch +#endif ASSERT_NOT_IN_ATOMIC mov VCPU_processor(%rbx),%eax @@ -39,6 +41,7 @@ FUNC(svm_asm_do_resume) cmp %ecx,(%rdx,%rax,1) jne .Lsvm_process_softirqs +#ifdef CONFIG_NESTED_VIRT cmp %cl,VCPU_nsvm_hap_enabled(%rbx) UNLIKELY_START(ne, nsvm_hap) cmp %rcx,VCPU_nhvm_p2m(%rbx) @@ -52,6 +55,7 @@ UNLIKELY_START(ne, nsvm_hap) sti jmp .Lsvm_do_resume __UNLIKELY_END(nsvm_hap) +#endif call svm_vmenter_helper diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h index 9bfed5ffd7..5cb85410f8 100644 --- a/xen/arch/x86/hvm/svm/nestedhvm.h +++ b/xen/arch/x86/hvm/svm/nestedhvm.h @@ -24,7 +24,7 @@ /* True when l1 guest enabled SVM in EFER */ #define nsvm_efer_svm_enabled(v) \ - (!!((v)->arch.hvm.guest_efer & EFER_SVME)) + (IS_ENABLED(CONFIG_NESTED_VIRT) && ((v)->arch.hvm.guest_efer & EFER_SVME)) int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); void nestedsvm_vmexit_defer(struct vcpu *v, diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..2cabc89fb5 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2165,7 +2165,7 @@ static void svm_vmexit_do_pause(struct cpu_user_regs *regs) vcpu_yield(); } -static void +static void __maybe_unused svm_vmexit_do_vmrun(struct cpu_user_regs *regs, struct vcpu *v, uint64_t vmcbaddr) { @@ -2211,7 +2211,7 @@ nsvm_get_nvmcb_page(struct vcpu *v, uint64_t vmcbaddr) return page; } -static void +static void __maybe_unused svm_vmexit_do_vmload(struct vmcb_struct *vmcb, struct cpu_user_regs *regs, struct vcpu *v, uint64_t vmcbaddr) @@ -2246,7 +2246,7 @@ svm_vmexit_do_vmload(struct vmcb_struct *vmcb, __update_guest_eip(regs, inst_len); } -static void +static void __maybe_unused svm_vmexit_do_vmsave(struct vmcb_struct *vmcb, struct cpu_user_regs *regs, struct vcpu *v, uint64_t vmcbaddr) @@ -2465,6 +2465,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nsvm_vcpu_initialise, .nhvm_vcpu_destroy = nsvm_vcpu_destroy, .nhvm_vcpu_reset = nsvm_vcpu_reset, @@ -2474,6 +2475,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, .nhvm_intr_blocked = nsvm_intr_blocked, .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, +#endif .get_reg = svm_get_reg, .set_reg = svm_set_reg, @@ -3011,10 +3013,16 @@ void asmlinkage svm_vmexit_handler(void) svm_vmexit_do_vmsave(vmcb, regs, v, regs->rax); break; case VMEXIT_STGI: - svm_vmexit_do_stgi(regs, v); + if ( !nestedhvm_enabled(v->domain) ) + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); + else + svm_vmexit_do_stgi(regs, v); break; case VMEXIT_CLGI: - svm_vmexit_do_clgi(regs, v); + if ( !nsvm_efer_svm_enabled(v) ) + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); + else + svm_vmexit_do_clgi(regs, v); break; case VMEXIT_XSETBV: diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile index 04a29ce59d..902564b3e2 100644 --- a/xen/arch/x86/hvm/vmx/Makefile +++ b/xen/arch/x86/hvm/vmx/Makefile @@ -3,4 +3,4 @@ obj-y += intr.o obj-y += realmode.o obj-y += vmcs.o obj-y += vmx.o -obj-y += vvmx.o +obj-$(CONFIG_NESTED_VIRT) += vvmx.o diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S index 2bfee715b3..4d62efddf4 100644 --- a/xen/arch/x86/hvm/vmx/entry.S +++ b/xen/arch/x86/hvm/vmx/entry.S @@ -83,7 +83,9 @@ FUNC(vmx_asm_vmexit_handler) .Lvmx_do_vmentry: call vmx_intr_assist +#ifdef CONFIG_NESTED_VIRT call nvmx_switch_guest +#endif ASSERT_NOT_IN_ATOMIC mov VCPU_processor(%rbx),%eax diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 82c55f49ae..4e3c8018d2 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2014,33 +2014,6 @@ static void cf_check vmx_update_guest_efer(struct vcpu *v) vmx_set_msr_intercept(v, MSR_EFER, VMX_MSR_R); } -static void nvmx_enqueue_n2_exceptions(struct vcpu *v, - unsigned long intr_fields, int error_code, uint8_t source) -{ - struct nestedvmx *nvmx = &vcpu_2_nvmx(v); - - if ( !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) ) { - /* enqueue the exception till the VMCS switch back to L1 */ - nvmx->intr.intr_info = intr_fields; - nvmx->intr.error_code = error_code; - nvmx->intr.source = source; - vcpu_nestedhvm(v).nv_vmexit_pending = 1; - return; - } - else - gdprintk(XENLOG_ERR, "Double Fault on Nested Guest: exception %lx %x" - "on %lx %x\n", intr_fields, error_code, - nvmx->intr.intr_info, nvmx->intr.error_code); -} - -static int cf_check nvmx_vmexit_event( - struct vcpu *v, const struct x86_event *event) -{ - nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, - hvm_intsrc_none); - return NESTEDHVM_VMEXIT_DONE; -} - static void __vmx_inject_exception(int trap, int type, int error_code) { unsigned long intr_fields; @@ -2933,6 +2906,7 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .handle_cd = vmx_handle_cd, .set_info_guest = vmx_set_info_guest, .set_rdtsc_exiting = vmx_set_rdtsc_exiting, +#ifdef CONFIG_NESTED_VIRT .nhvm_vcpu_initialise = nvmx_vcpu_initialise, .nhvm_vcpu_destroy = nvmx_vcpu_destroy, .nhvm_vcpu_reset = nvmx_vcpu_reset, @@ -2942,8 +2916,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, .nhvm_intr_blocked = nvmx_intr_blocked, .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, - .update_vlapic_mode = vmx_vlapic_msr_changed, .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, +#endif + .update_vlapic_mode = vmx_vlapic_msr_changed, #ifdef CONFIG_VM_EVENT .enable_msr_interception = vmx_enable_msr_interception, #endif diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 38952f0696..2bb42678c5 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -2821,6 +2821,32 @@ void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) __vmwrite(read_shadow_field, v->arch.hvm.nvcpu.guest_cr[cr]); } +void nvmx_enqueue_n2_exceptions(struct vcpu *v, + unsigned long intr_fields, int error_code, uint8_t source) +{ + struct nestedvmx *nvmx = &vcpu_2_nvmx(v); + + if ( !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) ) { + /* enqueue the exception till the VMCS switch back to L1 */ + nvmx->intr.intr_info = intr_fields; + nvmx->intr.error_code = error_code; + nvmx->intr.source = source; + vcpu_nestedhvm(v).nv_vmexit_pending = 1; + return; + } + else + gdprintk(XENLOG_ERR, "Double Fault on Nested Guest: exception %lx %x" + "on %lx %x\n", intr_fields, error_code, + nvmx->intr.intr_info, nvmx->intr.error_code); +} + +int cf_check nvmx_vmexit_event(struct vcpu *v, const struct x86_event *event) +{ + nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, + hvm_intsrc_none); + return NESTEDHVM_VMEXIT_DONE; +} + void __init start_nested_vmx(struct hvm_function_table *hvm_function_table) { /* TODO: Require hardware support before enabling nested virt */ diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..536a38b450 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -711,7 +711,7 @@ static inline bool hvm_altp2m_supported(void) /* Returns true if we have the minimum hardware requirements for nested virt */ static inline bool hvm_nested_virt_supported(void) { - return hvm_funcs.caps.nested_virt; + return IS_ENABLED(CONFIG_NESTED_VIRT) && hvm_funcs.caps.nested_virt; } #ifdef CONFIG_ALTP2M diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h index ea2c1bc328..2f8209271a 100644 --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { /* Nested HVM on/off per domain */ static inline bool nestedhvm_enabled(const struct domain *d) { - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); + return IS_ENABLED(CONFIG_NESTED_VIRT) && + (d->options & XEN_DOMCTL_CDF_nested_virt); } +/* Nested paging */ +#define NESTEDHVM_PAGEFAULT_DONE 0 +#define NESTEDHVM_PAGEFAULT_INJECT 1 +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 +#define NESTEDHVM_PAGEFAULT_MMIO 4 +#define NESTEDHVM_PAGEFAULT_RETRY 5 +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 + +#ifdef CONFIG_NESTED_VIRT + /* Nested VCPU */ int nestedhvm_vcpu_initialise(struct vcpu *v); void nestedhvm_vcpu_destroy(struct vcpu *v); @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); #define nestedhvm_vcpu_exit_guestmode(v) \ vcpu_nestedhvm(v).nv_guestmode = 0 -/* Nested paging */ -#define NESTEDHVM_PAGEFAULT_DONE 0 -#define NESTEDHVM_PAGEFAULT_INJECT 1 -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 -#define NESTEDHVM_PAGEFAULT_MMIO 4 -#define NESTEDHVM_PAGEFAULT_RETRY 5 -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, struct npfec npfec); @@ -59,6 +63,48 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed); void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); +#else /* !CONFIG_NESTED_VIRT */ + +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; +} +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } +static inline void nestedhvm_vcpu_reset(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return false; } +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, + struct npfec npfec) +{ + ASSERT_UNREACHABLE(); + return NESTEDHVM_PAGEFAULT_L0_ERROR; +} +static inline void nestedhvm_vcpu_enter_guestmode(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline void nestedhvm_vcpu_exit_guestmode(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nestedhvm_paging_mode_hap(struct vcpu *v) +{ + return false; +} +static inline bool nestedhvm_vmswitch_in_progress(struct vcpu *v) +{ + return false; +} +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) +{ + ASSERT_UNREACHABLE(); +} + +#endif /* CONFIG_NESTED_VIRT */ + static inline bool nestedhvm_is_n2(struct vcpu *v) { if ( !nestedhvm_enabled(v->domain) || diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h index da10d3fa96..d0c1ae29f6 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h @@ -73,6 +73,8 @@ union vmx_inst_info { u32 word; }; +#ifdef CONFIG_NESTED_VIRT + int cf_check nvmx_vcpu_initialise(struct vcpu *v); void cf_check nvmx_vcpu_destroy(struct vcpu *v); int cf_check nvmx_vcpu_reset(struct vcpu *v); @@ -199,5 +201,77 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, uint64_t *exit_qual, uint32_t *exit_reason); int nvmx_cpu_up_prepare(unsigned int cpu); void nvmx_cpu_dead(unsigned int cpu); +int cf_check nvmx_vmexit_event(struct vcpu *v, const struct x86_event *event); +void nvmx_enqueue_n2_exceptions(struct vcpu *v, + unsigned long intr_fields, int error_code, uint8_t source); + +#else /* !CONFIG_NESTED_VIRT */ + +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) +{ + ASSERT_UNREACHABLE(); +} +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, + unsigned long value) +{ + ASSERT_UNREACHABLE(); +} +static inline void nvmx_update_exception_bitmap(struct vcpu *v, + unsigned long value) +{ + ASSERT_UNREACHABLE(); +} +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) +{ + ASSERT_UNREACHABLE(); +} +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned int vector, + int error_code) +{ + ASSERT_UNREACHABLE(); + return false; +} +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, + unsigned int exit_reason) +{ + ASSERT_UNREACHABLE(); + return 0; +} +static inline void nvmx_idtv_handling(void) +{ + ASSERT_UNREACHABLE(); +} +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) +{ + /* return 0 to trigger #GP */ + return 0; +} +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, + unsigned int exit_reason) +{ + ASSERT_UNREACHABLE(); + return X86EMUL_EXCEPTION; +} +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } +static inline void nvmx_cpu_dead(unsigned int cpu) { } +static inline void nvmx_enqueue_n2_exceptions(struct vcpu *v, + unsigned long intr_fields, int error_code, uint8_t source) +{ + ASSERT_UNREACHABLE(); +} + +static inline u64 get_vvmcs(const struct vcpu *vcpu, u32 encoding) +{ + ASSERT_UNREACHABLE(); + return 0; +} + +#endif /* CONFIG_NESTED_VIRT */ + #endif /* __ASM_X86_HVM_VVMX_H__ */ diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e8409..aa15811c2e 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o obj-$(CONFIG_VM_EVENT) += mem_access.o obj-$(CONFIG_MEM_PAGING) += mem_paging.o obj-$(CONFIG_MEM_SHARING) += mem_sharing.o -obj-$(CONFIG_HVM) += nested.o +obj-$(CONFIG_NESTED_VIRT) += nested.o obj-$(CONFIG_HVM) += p2m.o obj-y += p2m-basic.o obj-$(CONFIG_INTEL_VMX) += p2m-ept.o diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile index 67c29b2162..efdc91ea82 100644 --- a/xen/arch/x86/mm/hap/Makefile +++ b/xen/arch/x86/mm/hap/Makefile @@ -2,5 +2,6 @@ obj-y += hap.o obj-y += guest_walk_2.o obj-y += guest_walk_3.o obj-y += guest_walk_4.o -obj-y += nested_hap.o -obj-$(CONFIG_INTEL_VMX) += nested_ept.o +nested-y := nested_hap.o +nested-$(CONFIG_INTEL_VMX) += nested_ept.o +obj-$(CONFIG_NESTED_VIRT) += $(nested-y) diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h index 635f5a7f45..63808dddcc 100644 --- a/xen/arch/x86/mm/p2m.h +++ b/xen/arch/x86/mm/p2m.h @@ -25,9 +25,15 @@ void p2m_teardown_altp2m(struct domain *d); void p2m_flush_table_locked(struct p2m_domain *p2m); int __must_check p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, unsigned int page_order); +#ifdef CONFIG_NESTED_VIRT void p2m_nestedp2m_init(struct p2m_domain *p2m); int p2m_init_nestedp2m(struct domain *d); void p2m_teardown_nestedp2m(struct domain *d); +#else +static inline void p2m_nestedp2m_init(struct p2m_domain *p2m) { } +static inline int p2m_init_nestedp2m(struct domain *d) { return 0; } +static inline void p2m_teardown_nestedp2m(struct domain *d) { } +#endif int ept_p2m_init(struct p2m_domain *p2m); void ept_p2m_uninit(struct p2m_domain *p2m); diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 1b04947516..b1d865e1c8 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) pi->capabilities |= XEN_SYSCTL_PHYSCAP_hap; if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow; + if ( hvm_nested_virt_supported() ) + pi->capabilities |= XEN_SYSCTL_PHYSCAP_nestedhvm; } long arch_do_sysctl( diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 66c9b65465..b4bd1dd7b2 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { /* Xen supports the Grant v1 and/or v2 ABIs. */ #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) +/* The platform supports nested HVM. */ +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) /* Max XEN_SYSCTL_PHYSCAP_* constant. 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pr=C Message-ID: <948645cb-d08e-4ef1-b2df-8d9786fbc1b3@amd.com> Date: Fri, 13 Feb 2026 22:22:44 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] arm/mpu: implement setup_virt_paging for MPU system To: Luca Fancellu CC: Harry Ramsey , "xen-devel@lists.xenproject.org" , Penny Zheng , "Stefano Stabellini" , Julien Grall , "Bertrand Marquis" , Michal Orzel , Volodymyr Babchuk , Wei Chen , Hari Limaye References: <20260206090155.68466-1-harry.ramsey@arm.com> <20260206090155.68466-2-harry.ramsey@arm.com> <49fd6b8c-5a6e-4914-a3e4-80ede233ac93@amd.com> <044B5E7A-7DF4-46B0-B235-B4DE7FBE7E10@arm.com> Content-Language: en-US From: "Halder, Ayan Kumar" In-Reply-To: <044B5E7A-7DF4-46B0-B235-B4DE7FBE7E10@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DC:EE_|PH7PR12MB7020:EE_ X-MS-Office365-Filtering-Correlation-Id: 65f605e1-93d8-4547-bccc-08de6b4e6c31 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|36860700013|82310400026; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ZMeyqIvp+FUI8R5YM4zae48J1b9+sT+dz6MeeR+CiWRvO3StKa1Q90YwvkszPxZL5ift2v3RRH5NtFNXx5C6vWCCsnJhxBk9j1rFak6mzfx/wyRltpuMK7ESJZr0Apr0CLlcOzD2Pu0UPFTOdP4rrSHIlQ10MhMl6dd/4Xx5Hd4o6q5EwyY9bOnapw8TS0pcIK4FFwChdxz3ZPrf3bSkJOJjkNTyqdAmZqg4/IeimKqhM3hEwUs5qVNQAVA4OILthV8rRP4XaBe3EfCq+G1cMsnu6QOlBH3J2KNlg3nlNpgf1Jh0FQigC5npusaS/gV48vW6uEQYvTbewVjsgMDzp7dUNXEbuQ+6ibUPqXIbzk42GTuO4ZYS+NLbciZOl6YPJPyPglnbIixkU0uE7c4dEQE5m8zkwUVDg60dxPmaDqQN6Kii6cFjtYfkkeNM8vLx X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 22:22:49.9449 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 65f605e1-93d8-4547-bccc-08de6b4e6c31 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7020 On 13/02/2026 09:19, Luca Fancellu wrote: > Hi Ayan, Hi Luca, > >>> void __init setup_virt_paging(void) >>> { >>> - BUG_ON("unimplemented"); >>> + uint64_t vtcr_el2 = READ_SYSREG(VTCR_EL2), >> I think this register is redefined for R82 . See >> >> https://developer.arm.com/documentation/102670/0301/AArch64-registers/AArch64-register-descriptions/AArch64-Generic-System-control-register-description/VTCR-EL2--Virtualization-Translation-Control-Register?lang=en . So >> >>> vstcr_el2 = READ_SYSREG(VSTCR_EL2); >>> + >>> + /* PA size */ >>> + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, >>> + /* Invalid */}; >>> + >>> + /* >>> + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured >>> + * with IPA bits == PA bits, compare against "pabits". >>> + */ >>> + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) >>> + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; >>> + >>> + /* >>> + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output >>> + * address space to access the Secure PA space as Armv8r only implements >>> + * secure state. >>> + */ >>> + vtcr_el2 &= ~VTCR_NSA; >> But the TRM says this >> >> This bit behaves as 1 for all purposes other than reading back the value of the bit when the value of AArch64-VSTCR_EL2.SA is 1. >> >> So shouldn't we keep it as 1. >> > The way I’m reading the armv8-r aarch64 reference manual [1] is that if we set > VSTCR_EL2.SA to 0, we need to clear also this one. > > >>> + >>> + /* >>> + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the >>> + * memory system configurations supported. In Armv8-R AArch64, the >>> + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. >>> + */ >>> + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) >>> + goto fault; >>> + >>> + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ >>> + if ( system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_NONE_SUPPORT ) >>> + goto fault; >>> + >>> + /* >>> + * cpuinfo sanitization makes sure we support 16bits VMID only if all cores >>> + * are supporting it. >>> + */ >>> + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) >>> + max_vmid = MAX_VMID_16_BIT; >>> + >>> + /* Set the VS bit only if 16 bit VMID is supported. */ >>> + if ( max_vmid == MAX_VMID_16_BIT ) >>> + vtcr_el2 |= VTCR_VS; >> this field does not exist. > yes this exists in armv8-r aarch64 [1] > >>> +/* Not used on MPU system */ >>> static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} >>> static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} >>> diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h >>> index 010ce8c9eb..ed1b6dd40f 100644 >>> --- a/xen/arch/arm/include/asm/p2m.h >>> +++ b/xen/arch/arm/include/asm/p2m.h >>> @@ -48,8 +48,13 @@ struct p2m_domain { >>> /* Current VMID in use */ >>> uint16_t vmid; >>> +#ifdef CONFIG_MMU >>> /* Current Translation Table Base Register for the p2m */ >>> uint64_t vttbr; >>> +#else >>> + /* Current Virtualization System Control Register for the p2m */ >>> + register_t vsctlr; >> This exist only for Arm64 MPU. Should we enclose this in ARM_64 ? > I can see it exists in armv8-r aarch32 [2]. In that case, Reviewed-by: Ayan Kumar Halder Sorry for the false alarm. - Ayan From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:26:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:26:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231949.1536868 (Exim 4.92) (envelope-from ) id 1vr1cE-0003e9-9X; Fri, 13 Feb 2026 22:26:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231949.1536868; Fri, 13 Feb 2026 22:26:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1cE-0003e2-5f; Fri, 13 Feb 2026 22:26:22 +0000 Received: by outflank-mailman (input) for mailman id 1231949; Fri, 13 Feb 2026 22:26:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1cC-0003du-DE for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: AxightObPdfPvC4DZNuuPHrnzUxAAYjojYdtPqA3ZRu0k4Rd+oAagwIuHto6VyCEb6LFcOFFrQCsBh7Oy1JVD/oUo7RUo/e5rUXAlVaY/hggkjB+RHxHgUffqwKULVEa28vcwnqLQuRdBw5VlFROaa6GH0hPKEyyiACk/7hwtjHHuBI/o2XvyH2uTdpUBbQvHMGAARSXjshv69ANUdGS2Uo1I2pZ9ajSLQMV29qj2sf5d42KE2YNTcfrOlw8wGH1ODZxHueuoklw9Xx+9HZS5FxkZqqfIakA2ZAP9Loc6DjW9VLx9Yxa/Ws37x2RwxWKH0/W84pgBoYW1OFwydpE2JvjwbkH/5/10Q8kkrggsS5/BA6LweCWMG1BPw59i5XrNEqifpvgF2a5ya5dPxzrUTi3GYIjx0qF9/iBOudDO9AWEfc/+/CB88/PaoYivROb X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 22:26:11.2189 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ffb4a41d-ee45-41e2-77c9-08de6b4ee426 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A100.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8062 On 06/02/2026 09:01, Harry Ramsey wrote: > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. Additionally implement a helper function `generate_vsctlr` for > p2m initalization. > > Signed-off-by: Harry Ramsey Reviewed-by: Ayan Kumar Halder - Ayan From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:28:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:28:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231957.1536879 (Exim 4.92) (envelope-from ) id 1vr1eL-0004HQ-L2; Fri, 13 Feb 2026 22:28:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231957.1536879; Fri, 13 Feb 2026 22:28:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1eL-0004HJ-H2; Fri, 13 Feb 2026 22:28:33 +0000 Received: by outflank-mailman (input) for mailman id 1231957; Fri, 13 Feb 2026 22:28:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1eJ-0004HD-I0 for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +IlBnM0x7C5naYLitvnUqRonqfaHgRG1EB2O580oFiXQEYm3dVFgqu2190lS4OR6uSZ04/PZVg3HN+DB3jGChEe7axZwAtaNBF5k63vFy1kHlxdQKqQJJAdH0zgPHpEIkxbhFCaqEP07RrXrAcQiZ8+RDnaE+c3aKfQH/EVTZl23fvn+8vGuqVpJwWPBIXevWvNneSVGfnZ8lMmE+zVkvxO///xn8G4JaTiOZL+JfqxVaTJMps9GxrWJY3bxdPnTcPXM2X70JmNXsAjP/eex65r0tb51oi5JUZSzCo94hgQv1N+tN+ny12W54alrQfqMowhVU5Ak1Lc3kj4y1nhDqrwgsVgzDGoHPsjgjid8ZUImrztfVUWnpYpwU/0ZEB4b3uMzfKgg7a/+0qjCLw9kqD1mBE1NiW9m7Mz5Ur1v7Ygw+xj6cC23bRr21W0cTuEQ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 22:28:21.3441 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eeb67692-8d0d-4ef6-69a6-08de6b4f31ba X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F63.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB9056 Add CONFIG_CPUFREQ to allow CPU frequency scaling support to be disabled at build time. When disabled, this removes cpufreq code from the build. Move the cpufreq_controller enum and is_cpufreq_controller() inside #ifdef CONFIG_CPUFREQ so that FREQCTL_* values are not visible when CPUFREQ is disabled. Provide a stub is_cpufreq_controller() that returns false when CPUFREQ is not configured. Compile out the XENPF_change_freq and XENPF_getidletime platform ops when CONFIG_CPUFREQ is disabled, as they require cpufreq_controller. Add stubs where necessary. Signed-off-by: Stefano Stabellini --- Changes in v3: - Move enum cpufreq_controller inside #ifdef CONFIG_CPUFREQ so FREQCTL_* values are not visible when CPUFREQ=n - Keep enum and variable declaration combined - Wrap XENPF_change_freq and XENPF_getidletime cases with #ifdef CONFIG_CPUFREQ - Add __maybe_unused to the out: label since it's only used by XENPF_getidletime - Move is_cpufreq_controller() inside #ifdef CONFIG_CPUFREQ and provide a stub returning false for the !CPUFREQ case - use -EOPNOTSUPP instead of -ENOSYS - code style fixes --- xen/arch/x86/acpi/Makefile | 2 +- xen/arch/x86/platform_hypercall.c | 4 +++- xen/drivers/Makefile | 2 +- xen/drivers/acpi/pm-op.c | 3 ++- xen/drivers/acpi/pmstat.c | 8 ++++++-- xen/drivers/cpufreq/Kconfig | 14 +++++++++++++- xen/include/acpi/cpufreq/cpufreq.h | 13 ++++++++++++- xen/include/acpi/cpufreq/processor_perf.h | 3 --- xen/include/xen/acpi.h | 8 ++++++++ xen/include/xen/pmstat.h | 15 ++++++++++++++- xen/include/xen/sched.h | 7 +++++++ 11 files changed, 67 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/acpi/Makefile b/xen/arch/x86/acpi/Makefile index 041377e2bb..aa476f65d5 100644 --- a/xen/arch/x86/acpi/Makefile +++ b/xen/arch/x86/acpi/Makefile @@ -1,4 +1,4 @@ -obj-y += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-y += lib.o power.o cpu_idle.o cpuidle_menu.o obj-bin-y += boot.init.o wakeup_prot.o diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index c6c5135806..a4669090e0 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -485,6 +485,7 @@ ret_t do_platform_op( ret = acpi_enter_sleep(&op->u.enter_acpi_sleep); break; +#ifdef CONFIG_CPUFREQ case XENPF_change_freq: ret = -ENOSYS; if ( cpufreq_controller != FREQCTL_dom0_kernel ) @@ -544,6 +545,7 @@ ret_t do_platform_op( ret = -EFAULT; break; } +#endif case XENPF_set_processor_pminfo: switch ( op->u.set_pminfo.type ) @@ -936,7 +938,7 @@ ret_t do_platform_op( break; } - out: + out: __maybe_unused; spin_unlock(&xenpf_lock); return ret; diff --git a/xen/drivers/Makefile b/xen/drivers/Makefile index 2a1ae8ad13..3d81b8dde4 100644 --- a/xen/drivers/Makefile +++ b/xen/drivers/Makefile @@ -1,5 +1,5 @@ obj-y += char/ -obj-$(CONFIG_HAS_CPUFREQ) += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-$(CONFIG_HAS_PCI) += pci/ obj-$(CONFIG_HAS_VPCI) += vpci/ obj-$(CONFIG_HAS_PASSTHROUGH) += passthrough/ diff --git a/xen/drivers/acpi/pm-op.c b/xen/drivers/acpi/pm-op.c index 07bddc58d9..f5caeebb9a 100644 --- a/xen/drivers/acpi/pm-op.c +++ b/xen/drivers/acpi/pm-op.c @@ -367,7 +367,8 @@ int do_pm_op(struct xen_sysctl_pm_op *op) return ret; } - if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) ) + if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) || + !IS_ENABLED(CPUFREQ) ) return -EINVAL; pmpt = processor_pminfo[op->cpuid]; diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index 0f31736df2..a8437ad045 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -76,6 +76,9 @@ void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to) spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu); + if ( !IS_ENABLED(CPUFREQ) ) + return; + spin_lock(cpufreq_statistic_lock); pxpt = per_cpu(cpufreq_statistic_data, cpu); @@ -105,7 +108,7 @@ int cpufreq_statistic_init(unsigned int cpu) spin_lock_init(cpufreq_statistic_lock); - if ( !pmpt ) + if ( !pmpt || !IS_ENABLED(CPUFREQ) ) return -EINVAL; /* Only need to initialize in Px mode */ @@ -225,7 +228,8 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op) int ret = 0; const struct processor_pminfo *pmpt; - if ( !op || (op->cpuid >= nr_cpu_ids) || !cpu_online(op->cpuid) ) + if ( !IS_ENABLED(CPUFREQ) || !op || (op->cpuid >= nr_cpu_ids) || + !cpu_online(op->cpuid) ) return -EINVAL; pmpt = processor_pminfo[op->cpuid]; diff --git a/xen/drivers/cpufreq/Kconfig b/xen/drivers/cpufreq/Kconfig index cce80f4aec..b9b93c1a26 100644 --- a/xen/drivers/cpufreq/Kconfig +++ b/xen/drivers/cpufreq/Kconfig @@ -1,3 +1,15 @@ - config HAS_CPUFREQ bool + +config CPUFREQ + bool "CPU Frequency scaling" + default y + depends on HAS_CPUFREQ + help + Enable CPU frequency scaling and power management governors. + This allows Xen to dynamically adjust CPU P-states (performance + states) based on system load. + + Disabling this option removes all cpufreq governors and power + management interfaces. This is useful for real-time systems or + minimal hypervisor builds. diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 0171ccf0ba..828d23961c 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); +#ifdef CONFIG_CPUFREQ +int cpufreq_add_cpu(unsigned int cpu); +int cpufreq_del_cpu(unsigned int cpu); + void cpufreq_dbs_timer_suspend(void); void cpufreq_dbs_timer_resume(void); +#else +static inline int cpufreq_add_cpu(unsigned int cpu) { return -EOPNOTSUPP; } +static inline int cpufreq_del_cpu(unsigned int cpu) { return -EOPNOTSUPP; } + +static inline void cpufreq_dbs_timer_suspend(void) {} +static inline void cpufreq_dbs_timer_resume(void) {} +#endif void intel_feature_detect(struct cpufreq_policy *policy); @@ -398,7 +409,7 @@ void intel_feature_detect(struct cpufreq_policy *policy); int hwp_cmdline_parse(const char *s, const char *e); int hwp_register_driver(void); -#ifdef CONFIG_INTEL +#if defined(CONFIG_INTEL) && defined(CONFIG_CPUFREQ) bool hwp_active(void); #else static inline bool hwp_active(void) { return false; } diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index 0a87bc0384..bad9d94865 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -36,9 +36,6 @@ static inline void cpufreq_statistic_exit(unsigned int cpu) {} int cpufreq_limit_change(unsigned int cpu); -int cpufreq_add_cpu(unsigned int cpu); -int cpufreq_del_cpu(unsigned int cpu); - struct processor_performance { uint32_t state; uint32_t platform_limit; diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 90635ba0f3..ae6dba481c 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -186,7 +186,15 @@ static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } #endif #ifdef XEN_GUEST_HANDLE +#ifdef CONFIG_CPUFREQ int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); +#else +static inline int acpi_set_pdc_bits(unsigned int acpi_id, + XEN_GUEST_HANDLE(uint32) pdc) +{ + return -EOPNOTSUPP; +} +#endif #endif int arch_acpi_set_pdc_bits(u32 acpi_id, u32 *, u32 mask); diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h index 6096560d3c..51d3ee404f 100644 --- a/xen/include/xen/pmstat.h +++ b/xen/include/xen/pmstat.h @@ -5,10 +5,23 @@ #include /* for struct xen_processor_power */ #include /* for struct pm_cx_stat */ +#ifdef CONFIG_CPUFREQ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); -long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); int set_cppc_pminfo(unsigned int acpi_id, const struct xen_processor_cppc *cppc_data); +#else +static inline int set_px_pminfo(uint32_t acpi_id, + struct xen_processor_performance *perf) +{ + return -EOPNOTSUPP; +} +static inline int set_cppc_pminfo(unsigned int acpi_id, + const struct xen_processor_cppc *cppc_data) +{ + return -EOPNOTSUPP; +} +#endif +long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); #ifdef CONFIG_COMPAT struct compat_processor_performance; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..d3358ce693 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1255,6 +1255,7 @@ static always_inline bool is_iommu_enabled(const struct domain *d) extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; +#ifdef CONFIG_CPUFREQ extern enum cpufreq_controller { FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen } cpufreq_controller; @@ -1274,6 +1275,12 @@ static always_inline bool is_cpufreq_controller(const struct domain *d) return (is_pv_domain(d) && is_hardware_domain(d) && cpufreq_controller == FREQCTL_dom0_kernel); } +#else +static always_inline bool is_cpufreq_controller(const struct domain *d) +{ + return false; +} +#endif int cpupool_move_domain(struct domain *d, struct cpupool *c); int cpupool_do_sysctl(struct xen_sysctl_cpupool_op *op); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:48:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:48:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231980.1536898 (Exim 4.92) (envelope-from ) id 1vr1xk-0007LB-DE; Fri, 13 Feb 2026 22:48:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231980.1536898; Fri, 13 Feb 2026 22:48:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xk-0007L4-9o; Fri, 13 Feb 2026 22:48:36 +0000 Received: by outflank-mailman (input) for mailman id 1231980; Fri, 13 Feb 2026 22:48:35 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xj-00075I-G2 for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 22:48:35 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 208bc295-092e-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 23:48:35 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 054BA4280D5B; Fri, 13 Feb 2026 17:48:19 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 208bc295-092e-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad Subject: [PATCH v2 1/2] x86/svm: Add Enumerations for the SVM virtual NMI Date: Fri, 13 Feb 2026 22:44:45 +0000 Message-ID: <01a922d2018cf657f842dbd325d0fdf819078aa7.1771016301.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD platforms. The feature support is indicated by the CPUID Fn8000_000A_EDX[25] = 1. Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the VMCB structure's vintr_t: vintr_t(11) - Virtual NMI is pending. vintr_t(12) - Virtual NMI is masked. vintr_t(26) - Enable NMI virtualization. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/hvm.h | 4 +++- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 4 files changed, 12 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..6e380890bd 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2533,6 +2533,7 @@ const struct hvm_function_table * __init start_svm(void) svm_function_table.caps.hap = cpu_has_svm_npt; svm_function_table.caps.hap_superpage_2mb = true; svm_function_table.caps.hap_superpage_1gb = cpu_has_page1gb; + svm_function_table.caps.vNMI = cpu_has_svm_vnmi; return &svm_function_table; } diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 69f6047394..047483db9a 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -336,13 +336,17 @@ typedef union u64 tpr: 8; u64 irq: 1; u64 vgif: 1; - u64 rsvd0: 6; + u64 rsvd0: 1; + u64 vnmi_pending: 1; + u64 vnmi_blocking:1; + u64: 3; u64 prio: 4; u64 ign_tpr: 1; u64 rsvd1: 3; u64 intr_masking: 1; u64 vgif_enable: 1; - u64 rsvd2: 6; + u64 vnmi_enable: 1; + u64 rsvd2: 5; u64 vector: 8; u64 rsvd3: 24; } fields; diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..ad17ea73e9 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -115,7 +115,9 @@ struct hvm_function_table { virtual_intr_delivery:1, /* Nested virt capabilities */ - nested_virt:1; + nested_virt:1, + /* virtual NMI support */ + vNMI:1; } caps; /* diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 15f0268be7..a35a61273b 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ static inline bool cpu_has_svm_feature(unsigned int feat) @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) #define MSR_INTERCEPT_NONE 0 -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:48:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:48:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231979.1536887 (Exim 4.92) (envelope-from ) id 1vr1xZ-00075V-65; Fri, 13 Feb 2026 22:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231979.1536887; Fri, 13 Feb 2026 22:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xZ-00075O-3V; Fri, 13 Feb 2026 22:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1231979; Fri, 13 Feb 2026 22:48:24 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xY-00075I-IH for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 22:48:24 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 194cf051-092e-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 23:48:23 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id CE55D4280D5B; Fri, 13 Feb 2026 17:48:07 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 194cf051-092e-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad Subject: [PATCH v2 0/2] Virtual NMI Date: Fri, 13 Feb 2026 22:44:44 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, the Xen hypervisor delivers NMIs to the guests using the Event Injection mechanism. The Event Injection mechanism does not block the delivery of subsequent NMIs. So the Xen Hypervisor tracks the NMI delivery and its completion (by intercepting the IRET instruction) before sending a new NMI. With the 4th generation AMD EPYC, a hardware NMI virtualization support, Virtual NMI (VNMI), is introduced. The vNMI allows the hypervisor to inject the NMI into the guest w/o using Event Injection mechanism. No need to track the guest NMI and intercepting the IRET instruction. NMI Virtualization support is indicated by CPUID Fn8000_000A_EDX[VNMI] = 1.[1] NMI Virtualization is enabled by setting V_NMI_ENABLE (bit 26 in offset 60h of the VMCB). Enabling NMI Virtualization requires the NMI intercept bit to be set. An attempt to run a guest with V_NMI_ENABLE without the NMI intercept bit set results in #VMEXIT(INVALID) [1] Three new bits are added to the VMCB field at offset 60h to provide NMI virtualization hardware support: V_NMI(11): Indicates whether a virtual NMI is pending in the guest. The processor will clear V_NMI once it takes the virtual NMI. V_NMI_MASK(12): Indicates whether virtual NMIs are masked. The processor will set V_NMI_MASK once it takes the virtual NMI. V_NMI_MASK is cleared when the guest successfully completes an IRET instruction or #VMEXIT occurs while delivering the virtual NMI. V_NMI_ENABLE(26): Enables NMI virtualization. [1] [1] https://docs.amd.com/v/u/en-US/24593_3.43 --- Changes in v2: - Merge the patches for "svm/vnmi: introduce the vnmi bit support in the cpuid feature set" and "svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB" into the one patch "x86/svm: Add Enumerations for the SVM virtual NMI". - Change the patch subject "svm/vnmi: Add support for the SVM Virtual NMI" to "x86/svm: Use virtual NMI when available" - Move the print out of the VNMI capability to the patch "x86/svm: Use virtual NMI when available" when it is being used. - Remove the hvm_intblk_vnmi enumeration that was introduced for the separate masked vNMI handling. - Introduce the hvm_function_table's is_vnmi_enabled callback to allow for the SVM implementation to verify that the VNMI is enabled by checking the VMCB bits in addition to the CPUID reported support. - Change the the name of the hvm_function_table's callback is_vnmi_pending to is_vnmi_masked. - The svm_inject_nmi function gains a check for the distinct NMI injection handling when the VNMI is enabled. - Simplify the check of AMD SVM Hardware support for the VNMI. The check cpu_has_svm_vnmi is performed unconditionally. - Simplify the introduced changes diff for the vintr_t union for the VNMI bits support. - Adopt the Xen formatting guidelines for the control structures. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2325298577 --- Abdelkareem Abdelsaamad (2): x86/svm: Add Enumerations for the SVM virtual NMI x86/svm: Use the virtual NMI when available xen/arch/x86/hvm/svm/intr.c | 13 ++++++++++-- xen/arch/x86/hvm/svm/svm.c | 34 ++++++++++++++++++++++++++++-- xen/arch/x86/hvm/svm/vmcb.c | 2 ++ xen/arch/x86/hvm/svm/vmcb.h | 8 +++++-- xen/arch/x86/include/asm/hvm/hvm.h | 13 +++++++++++- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 6 files changed, 65 insertions(+), 7 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:48:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:48:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1231983.1536908 (Exim 4.92) (envelope-from ) id 1vr1xn-0007b1-Kn; Fri, 13 Feb 2026 22:48:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1231983.1536908; Fri, 13 Feb 2026 22:48:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xn-0007au-HH; Fri, 13 Feb 2026 22:48:39 +0000 Received: by outflank-mailman (input) for mailman id 1231983; Fri, 13 Feb 2026 22:48:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr1xm-00075I-7A for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 22:48:38 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2225b83e-092e-11f1-b163-2bf370ae4941; Fri, 13 Feb 2026 23:48:37 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id B70E04280D5B; Fri, 13 Feb 2026 17:48:22 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2225b83e-092e-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad Subject: [PATCH v2 2/2] x86/svm: Use the virtual NMI when available Date: Fri, 13 Feb 2026 22:44:46 +0000 Message-ID: <54110a1c3800557d1fe611e4f8008b702df5ee84.1771016301.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit With vNMI, the pending NMI is simply stuffed into the VMCB and handed off to the hardware. This means that Xen needs to be able to set a vNMI pending on-demand, and also query if a vNMI is pending, e.g. to honor the "at most one NMI pending" rule and to preserve all NMIs across save and restore. Introduce two new hvm_function_table callbacks to support the SVM's vNMI to allow the Xen hypervisor to query if a vNMI is pending and to set VMCB's _vintr pending flag so the NMIs are serviced by hardware if/when the virtual NMIs become unblocked. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/intr.c | 13 ++++++++++-- xen/arch/x86/hvm/svm/svm.c | 33 ++++++++++++++++++++++++++++-- xen/arch/x86/hvm/svm/vmcb.c | 2 ++ xen/arch/x86/include/asm/hvm/hvm.h | 9 ++++++++ 4 files changed, 53 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b85..bc52f8e189 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -29,10 +29,19 @@ static void svm_inject_nmi(struct vcpu *v) { - struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); + struct vmcb_struct *vmcb; + u32 general1_intercepts; intinfo_t event; + if ( hvm_funcs.is_vnmi_enabled(v) ) + { + hvm_funcs.set_vnmi_pending(v); + return; + } + + vmcb = v->arch.hvm.svm.vmcb; + general1_intercepts = vmcb_get_general1_intercepts(vmcb); + event.raw = 0; event.v = true; event.type = X86_ET_NMI; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 6e380890bd..00e5630025 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -297,6 +297,32 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags) __clear_bit(msr * 2 + 1, msr_bit); } +static bool cf_check svm_is_vnmi_enabled(struct vcpu *vcpu) +{ + return ( hvm_funcs.caps.vNMI && + vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_enable ); +} + +static bool cf_check svm_is_vnmi_masked(struct vcpu *vcpu) +{ + if ( !svm_is_vnmi_enabled(vcpu) ) + return false; + + return ( vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_blocking ); +} + +static bool cf_check svm_set_vnmi_pending(struct vcpu *vcpu) +{ + if ( !svm_is_vnmi_enabled(vcpu) ) + return false; + + if ( vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_pending ) + return false; + + vcpu->arch.hvm.svm.vmcb->_vintr.fields.vnmi_pending = 1; + return true; +} + #ifdef CONFIG_VM_EVENT static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr) { @@ -545,7 +571,7 @@ static unsigned cf_check int svm_get_interrupt_shadow(struct vcpu *v) struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; unsigned int intr_shadow = 0; - if ( vmcb->int_stat.intr_shadow ) + if ( vmcb->int_stat.intr_shadow || svm_is_vnmi_masked(v) ) intr_shadow |= HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI; if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) @@ -2464,7 +2490,9 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { #endif .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, - + .is_vnmi_enabled = svm_is_vnmi_enabled, + .is_vnmi_masked = svm_is_vnmi_masked, + .set_vnmi_pending = svm_set_vnmi_pending, .nhvm_vcpu_initialise = nsvm_vcpu_initialise, .nhvm_vcpu_destroy = nsvm_vcpu_destroy, .nhvm_vcpu_reset = nsvm_vcpu_reset, @@ -2524,6 +2552,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..e90bbac332 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; + return 0; } diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index ad17ea73e9..9dc8b35f91 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -224,6 +224,15 @@ struct hvm_function_table { int (*pi_update_irte)(const struct vcpu *v, const struct pirq *pirq, uint8_t gvec); void (*update_vlapic_mode)(struct vcpu *v); + /* Whether or not virtual NMI is enabled. */ + bool (*is_vnmi_enabled)(struct vcpu *vcpu); + /* Whether or not a virtual NMI is masked in hardware. */ + bool (*is_vnmi_masked)(struct vcpu *vcpu); + /* + * Attempt to pend a virtual NMI in harware. + * Returns %true on success + */ + bool (*set_vnmi_pending)(struct vcpu *vcpu); /*Walk nested p2m */ int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa, -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 13 22:56:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 22:56:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232035.1536917 (Exim 4.92) (envelope-from ) id 1vr25f-0001GK-Ad; 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Provide stubs of functions called from common code. entry.S needs an ifdef to hide the symbol from the assembly. Also conditionalize .waitqueue_vcpu in struct vcpu to save space. Signed-off-by: Jason Andryuk --- v2: Use CONFIG_VM_EVENT --- xen/arch/x86/x86_64/entry.S | 2 ++ xen/common/Makefile | 2 +- xen/include/xen/sched.h | 2 ++ xen/include/xen/wait.h | 11 +++++++++-- 4 files changed, 14 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index ca446c6ff0..8b83082413 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -664,7 +664,9 @@ FUNC(continue_pv_domain) ALTERNATIVE "", "mov $2, %eax; incsspd %eax", X86_FEATURE_XEN_SHSTK #endif +#ifdef CONFIG_VM_EVENT call check_wakeup_from_wait +#endif ret_from_intr: GET_CURRENT(bx) testb $3, UREGS_cs(%rsp) diff --git a/xen/common/Makefile b/xen/common/Makefile index 4fc0c15088..dac8b711cd 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -61,7 +61,7 @@ obj-y += virtual_region.o obj-$(CONFIG_VM_EVENT) += vm_event.o obj-$(CONFIG_HAS_VMAP) += vmap.o obj-y += vsprintf.o -obj-y += wait.o +obj-$(CONFIG_VM_EVENT) += wait.o obj-bin-y += warning.init.o obj-y += xmalloc_tlsf.o diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..40a35fc15c 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -293,7 +293,9 @@ struct vcpu /* Multicall information. */ struct mc_state mc_state; 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> + nested_virt:1, > + /* virtual NMI support */ > + vNMI:1; > } caps; As said previously, vNMI is local to SVM, and needs to not touch common HVM logic. Specifically, delete this vNMI boolean and all 3 hooks you add in the next patch (i.e. all changes to hvm.h).  They're all layering violations. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 13 23:17:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 23:17:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232095.1536948 (Exim 4.92) (envelope-from ) id 1vr2Q1-0005Dg-Eh; Fri, 13 Feb 2026 23:17:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1232095.1536948; Fri, 13 Feb 2026 23:17:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2Q1-0005DZ-BC; Fri, 13 Feb 2026 23:17:49 +0000 Received: by outflank-mailman (input) for mailman id 1232095; Fri, 13 Feb 2026 23:17:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2Q0-0005DT-1N for xen-devel@lists.xenproject.org; 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This means that Xen needs to be able to set a vNMI pending > on-demand, and also query if a vNMI is pending, e.g. to honor the "at most > one NMI pending" rule and to preserve all NMIs across save and restore. > > Introduce two new hvm_function_table callbacks to support the SVM's vNMI to > allow the Xen hypervisor to query if a vNMI is pending and to set VMCB's > _vintr pending flag so the NMIs are serviced by hardware if/when the virtual > NMIs become unblocked. > > Signed-off-by: Abdelkareem Abdelsaamad > --- > xen/arch/x86/hvm/svm/intr.c | 13 ++++++++++-- > xen/arch/x86/hvm/svm/svm.c | 33 ++++++++++++++++++++++++++++-- > xen/arch/x86/hvm/svm/vmcb.c | 2 ++ > xen/arch/x86/include/asm/hvm/hvm.h | 9 ++++++++ > 4 files changed, 53 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c > index 6453a46b85..bc52f8e189 100644 > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -29,10 +29,19 @@ > > static void svm_inject_nmi(struct vcpu *v) > { > - struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; > - u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); > + struct vmcb_struct *vmcb; > + u32 general1_intercepts; > intinfo_t event; > > + if ( hvm_funcs.is_vnmi_enabled(v) ) > + { > + hvm_funcs.set_vnmi_pending(v); > + return; > + } > + > + vmcb = v->arch.hvm.svm.vmcb; > + general1_intercepts = vmcb_get_general1_intercepts(vmcb); > + There's no need to defer these assignments. When the HVM hooks are deleted, the correct logic here is:     if ( vmcb->_vintr.fields.vnmi_enable )     {         vmcb->_vintr.fields.vnmi_pending = true;         return;     } > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 6e380890bd..00e5630025 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -545,7 +571,7 @@ static unsigned cf_check int svm_get_interrupt_shadow(struct vcpu *v) > struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; > unsigned int intr_shadow = 0; > > - if ( vmcb->int_stat.intr_shadow ) > + if ( vmcb->int_stat.intr_shadow || svm_is_vnmi_masked(v) ) > intr_shadow |= HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI; > > if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) It's only HVM_INTR_SHADOW_NMI which vNMI applies to. diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738c6..f5c7ea0b0dbe 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -548,7 +548,9 @@ static unsigned cf_check int svm_get_interrupt_shadow(struct vcpu *v)      if ( vmcb->int_stat.intr_shadow )          intr_shadow |= HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI;   -    if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) +    if ( vmcb->_vintr.fields.vnmi_enable +         ? vmcb->_vintr.fields.vnmi_blocked +         : (vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET) )          intr_shadow |= HVM_INTR_SHADOW_NMI;        return intr_shadow; ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 13 23:29:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 23:29:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232106.1536957 (Exim 4.92) (envelope-from ) id 1vr2b9-0007A8-H3; Fri, 13 Feb 2026 23:29:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1232106.1536957; Fri, 13 Feb 2026 23:29:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2b9-0007A1-EO; Fri, 13 Feb 2026 23:29:19 +0000 Received: by outflank-mailman (input) for mailman id 1232106; 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Message-ID: Date: Fri, 13 Feb 2026 23:29:06 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , jbeulich@suse.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com Subject: Re: [PATCH v3] x86/cpufreq: Add Kconfig option for CPU frequency scaling To: Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260213222818.271685-1-stefano.stabellini@amd.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <20260213222818.271685-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P123CA0207.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:1a5::14) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|CO1PR03MB7940:EE_ X-MS-Office365-Filtering-Correlation-Id: 7f299ddb-c106-45aa-1c88-08de6b57aff3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014; 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> break; > > +#ifdef CONFIG_CPUFREQ > case XENPF_change_freq: > ret = -ENOSYS; > if ( cpufreq_controller != FREQCTL_dom0_kernel ) > @@ -544,6 +545,7 @@ ret_t do_platform_op( > ret = -EFAULT; > break; > } > +#endif You must not hide case labels like this.  Instead, use:     case XENPF_change_freq:         ret = -ENOSYS;         if ( !IS_ENABLED(CONFIG_CPUFREQ) )             break;         ... which in turn ... > > case XENPF_set_processor_pminfo: > switch ( op->u.set_pminfo.type ) > @@ -936,7 +938,7 @@ ret_t do_platform_op( > break; > } > > - out: > + out: __maybe_unused; > spin_unlock(&xenpf_lock); ... removes the need for this hunk. > diff --git a/xen/drivers/acpi/pm-op.c b/xen/drivers/acpi/pm-op.c > index 07bddc58d9..f5caeebb9a 100644 > --- a/xen/drivers/acpi/pm-op.c > +++ b/xen/drivers/acpi/pm-op.c > @@ -367,7 +367,8 @@ int do_pm_op(struct xen_sysctl_pm_op *op) > return ret; > } > > - if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) ) > + if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) || > + !IS_ENABLED(CPUFREQ) ) Everywhere else in this patch, CONFIG_CPUFREQ. You won't get a compile error for typo-ing a name inside IF_ENABLED(), but it won't function correctly either. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 13 23:44:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 23:44:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232132.1536968 (Exim 4.92) (envelope-from ) id 1vr2q3-0001Tr-PO; Fri, 13 Feb 2026 23:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1232132.1536968; Fri, 13 Feb 2026 23:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2q3-0001Tk-Lu; Fri, 13 Feb 2026 23:44:43 +0000 Received: by outflank-mailman (input) for mailman id 1232132; Fri, 13 Feb 2026 23:44:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2q2-0001Te-1g for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 23:44:42 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f3d874d3-0935-11f1-9ccf-f158ae23cfc8; Sat, 14 Feb 2026 00:44:36 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 9850B60054; Fri, 13 Feb 2026 23:44:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E460C116C6; Fri, 13 Feb 2026 23:44:33 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f3d874d3-0935-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771026274; bh=7ybNqTcUHO8ZiSFSuBf2rA9uzkzo6uQ289HcDJfEiuY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=M3g1rmmnNi6R0mw7lDz68kt4nR3xYO5sm8M2JiEqmRFTNGDRRhYymfMqI987+L9pV 7OjoX4dQixTBwrblMe6vj9G+xihpzqlTGkgzxFPsHizDdsH3AOsRR6fOKGq7S9vWIx 4E9fSFJQStk+Ny1ZM7c25Ad4XqN+hEAoGgR4FXLpFg/D6GMitxdLbE9YIAd4TIc4tI WhhulUL6xl4IfBflvgX+bQW61nJGIjNJFgVfDqG/u92fPSdJgljE9RgmhrhJ5++/YI W2mFDnbxiblnXpR3kmAvYn9yhVzjowU9BXa5z1I7v9fo2/RidI9U0OE7yfF/0kJaVp tX3IiUmcpdGjg== Date: Fri, 13 Feb 2026 15:44:31 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Andrew Cooper cc: Stefano Stabellini , xen-devel@lists.xenproject.org, jbeulich@suse.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com Subject: Re: [PATCH v3] x86/cpufreq: Add Kconfig option for CPU frequency scaling In-Reply-To: Message-ID: References: <20260213222818.271685-1-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-1737345080-1771025601=:6031" Content-ID: This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1737345080-1771025601=:6031 Content-Type: text/plain; CHARSET=UTF-8 Content-Transfer-Encoding: 8BIT Content-ID: On Fri, 13 Feb 2026, Andrew Cooper wrote: > On 13/02/2026 10:28 pm, Stefano Stabellini wrote: > > diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c > > index c6c5135806..a4669090e0 100644 > > --- a/xen/arch/x86/platform_hypercall.c > > +++ b/xen/arch/x86/platform_hypercall.c > > @@ -485,6 +485,7 @@ ret_t do_platform_op( > > ret = acpi_enter_sleep(&op->u.enter_acpi_sleep); > > break; > > > > +#ifdef CONFIG_CPUFREQ > > case XENPF_change_freq: > > ret = -ENOSYS; > > if ( cpufreq_controller != FREQCTL_dom0_kernel ) > > @@ -544,6 +545,7 @@ ret_t do_platform_op( > > ret = -EFAULT; > > break; > > } > > +#endif > > You must not hide case labels like this.  Instead, use: > >     case XENPF_change_freq: >         ret = -ENOSYS; >         if ( !IS_ENABLED(CONFIG_CPUFREQ) ) >             break; >         ... > > which in turn ... > > > > > case XENPF_set_processor_pminfo: > > switch ( op->u.set_pminfo.type ) > > @@ -936,7 +938,7 @@ ret_t do_platform_op( > > break; > > } > > > > - out: > > + out: __maybe_unused; > > spin_unlock(&xenpf_lock); > > ... removes the need for this hunk. I can do that > > diff --git a/xen/drivers/acpi/pm-op.c b/xen/drivers/acpi/pm-op.c > > index 07bddc58d9..f5caeebb9a 100644 > > --- a/xen/drivers/acpi/pm-op.c > > +++ b/xen/drivers/acpi/pm-op.c > > @@ -367,7 +367,8 @@ int do_pm_op(struct xen_sysctl_pm_op *op) > > return ret; > > } > > > > - if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) ) > > + if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) || > > + !IS_ENABLED(CPUFREQ) ) > > Everywhere else in this patch, CONFIG_CPUFREQ. > > You won't get a compile error for typo-ing a name inside IF_ENABLED(), > but it won't function correctly either. Oh man now that I have seen it I cannot unsee it. I'll respin it immediately. --8323329-1737345080-1771025601=:6031-- From xen-devel-bounces@lists.xenproject.org Fri Feb 13 23:48:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 13 Feb 2026 23:48:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232139.1536978 (Exim 4.92) (envelope-from ) id 1vr2tm-0001zG-8e; Fri, 13 Feb 2026 23:48:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1232139.1536978; Fri, 13 Feb 2026 23:48:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2tm-0001z9-5E; Fri, 13 Feb 2026 23:48:34 +0000 Received: by outflank-mailman (input) for mailman id 1232139; Fri, 13 Feb 2026 23:48:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vr2tj-0001z3-RM for xen-devel@lists.xenproject.org; Fri, 13 Feb 2026 23:48:32 +0000 Received: from mail-yw1-x112a.google.com (mail-yw1-x112a.google.com [2607:f8b0:4864:20::112a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7f375700-0936-11f1-b163-2bf370ae4941; Sat, 14 Feb 2026 00:48:30 +0100 (CET) Received: by mail-yw1-x112a.google.com with SMTP id 00721157ae682-79427f739b0so15730667b3.3 for ; Fri, 13 Feb 2026 15:48:30 -0800 (PST) Received: from [10.138.34.110] (h69-131-216-128.cncrtn.broadband.dynamic.tds.net. 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Fri, 13 Feb 2026 15:48:28 -0800 (PST) Message-ID: Date: Fri, 13 Feb 2026 18:48:10 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------kBZehJiIQE5D5CHFBdwQDy18" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------kBZehJiIQE5D5CHFBdwQDy18 Content-Type: multipart/mixed; boundary="------------MSnewZVePIwqILT5rg3YCp4l"; protected-headers="v1" Message-ID: Date: Fri, 13 Feb 2026 18:48:10 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, jbeulich@suse.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com References: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20260213220205.196179-1-stefano.stabellini@amd.com> --------------MSnewZVePIwqILT5rg3YCp4l Content-Type: multipart/mixed; boundary="------------wzxg10yIG5yWWmMtSrQW06BO" --------------wzxg10yIG5yWWmMtSrQW06BO Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 2/13/26 17:02, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default n) to allow nested virtualization= > support to be disabled at build time. This is useful for embedded or > safety-focused deployments where nested virtualization is not needed, > reducing code size and attack surface. >=20 > When CONFIG_NESTED_VIRT=3Dn, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c >=20 > Add inline stubs where needed in headers. Guard assembly code paths > for nested virt with #ifdef CONFIG_NESTED_VIRT. Move exception > injection for VMX/SVM instructions to the callers in vmx.c/svm.c to > avoid header dependency issues in the stubs. >=20 > No functional change when CONFIG_NESTED_VIRT=3Dy. >=20 > Signed-off-by: Stefano Stabellini >=20 > --- > Changes in v3: > - Kconfig: Change "depends on AMD_SVM || INTEL_VMX" to "depends on HVM"= > - Kconfig: Remove redundant "default n" line > - Kconfig: Remove "If unsure, say N." from help text > - mm/hap/Makefile: Simplify using intermediate nested-y variable: > nested-y :=3D nested_hap.o > nested-$(CONFIG_INTEL_VMX) +=3D nested_ept.o > obj-$(CONFIG_NESTED_VIRT) +=3D $(nested-y) > - svm/nestedhvm.h: Remove #ifdef CONFIG_NESTED_VIRT stubs, keep only > function declarations (the functions are only called from code that > is already compiled out when nested virt is disabled) > - svm/nestedhvm.h: Add CONFIG_NESTED_VIRT guard to nsvm_efer_svm_enable= d > macro to return false when nested virt is disabled > - svm/svm.c: Move #UD injection for STGI/CLGI to the caller instead of > stub functions, checking nestedhvm_enabled()/nsvm_efer_svm_enabled() > - svm/svm.c: Mark svm_vmexit_do_vmrun/vmload/vmsave as __maybe_unused > - svm/svm.c: Remove empty nsvm_vcpu_switch stub (now guarded in asm) > - svm/entry.S: Add #ifdef CONFIG_NESTED_VIRT guards around nested virt > specific code paths > - vmx/vmx.c: Remove empty nvmx_switch_guest stub (now guarded in asm) > - vmx/vmx.c: Move nvmx_enqueue_n2_exceptions and nvmx_vmexit_event to > vvmx.c where they belong > - vmx/vvmx.h: Add declarations for nvmx_vmexit_event and > nvmx_enqueue_n2_exceptions > - vmx/vvmx.h: Fix nvmx_msr_read_intercept stub comment > - vmx/vvmx.h: nvmx_handle_vmx_insn stub returns X86EMUL_EXCEPTION with > ASSERT_UNREACHABLE (caller handles injection) > - vmx/vvmx.h: Convert get_vvmcs macro to inline function in stubs > - vmx/entry.S: Add #ifdef CONFIG_NESTED_VIRT guard around nvmx_switch_g= uest > - nestedhvm.h: Convert macro stubs to proper inline functions > --- > xen/arch/x86/hvm/Kconfig | 7 +++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/entry.S | 4 ++ > xen/arch/x86/hvm/svm/nestedhvm.h | 2 +- > xen/arch/x86/hvm/svm/svm.c | 18 ++++-- > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/entry.S | 2 + > xen/arch/x86/hvm/vmx/vmx.c | 31 +--------- > xen/arch/x86/hvm/vmx/vvmx.c | 26 +++++++++ > xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 64 +++++++++++++++++--- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 74 ++++++++++++++++++++++++= > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 5 +- > xen/arch/x86/mm/p2m.h | 6 ++ > xen/arch/x86/sysctl.c | 2 + > xen/include/public/sysctl.h | 4 +- > 18 files changed, 204 insertions(+), 51 deletions(-) >=20 > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..af661385b5 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,11 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > =20 > +config NESTED_VIRT > + bool "Nested virtualization support> + depends on HVM > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. Should this also come with a warning that allowing guests to use nested virtualization is insecure unless both L1 and L2 guests are trusted? --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------wzxg10yIG5yWWmMtSrQW06BO Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9783 Add CONFIG_CPUFREQ to allow CPU frequency scaling support to be disabled at build time. When disabled, this removes cpufreq code from the build. Introduce IS_ENABLED(CONFIG_CPUFREQ) checks for relevant do_pm_op and do_platform_op subops and other functions that require CONFIG_CPUFREQ to work. Add stubs where necessary. Signed-off-by: Stefano Stabellini --- Changes in v4: - fix IS_ENABLED(CPUFREQ) - remove #ifdef in platform_hypercall.c and use DCE - move cpufreq_controller enum out of #ifdef --- xen/arch/x86/acpi/Makefile | 2 +- xen/arch/x86/platform_hypercall.c | 6 ++++-- xen/drivers/Makefile | 2 +- xen/drivers/acpi/pm-op.c | 3 ++- xen/drivers/acpi/pmstat.c | 8 ++++++-- xen/drivers/cpufreq/Kconfig | 14 +++++++++++++- xen/include/acpi/cpufreq/cpufreq.h | 13 ++++++++++++- xen/include/acpi/cpufreq/processor_perf.h | 3 --- xen/include/xen/acpi.h | 8 ++++++++ xen/include/xen/pmstat.h | 15 ++++++++++++++- xen/include/xen/sched.h | 7 +++++++ 11 files changed, 68 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/acpi/Makefile b/xen/arch/x86/acpi/Makefile index 041377e2bb..aa476f65d5 100644 --- a/xen/arch/x86/acpi/Makefile +++ b/xen/arch/x86/acpi/Makefile @@ -1,4 +1,4 @@ -obj-y += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-y += lib.o power.o cpu_idle.o cpuidle_menu.o obj-bin-y += boot.init.o wakeup_prot.o diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index c6c5135806..1dc7dae919 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -487,7 +487,8 @@ ret_t do_platform_op( case XENPF_change_freq: ret = -ENOSYS; - if ( cpufreq_controller != FREQCTL_dom0_kernel ) + if ( !IS_ENABLED(CONFIG_CPUFREQ) || + cpufreq_controller != FREQCTL_dom0_kernel ) break; ret = -EINVAL; if ( op->u.change_freq.flags || !cpu_online(op->u.change_freq.cpu) ) @@ -507,7 +508,8 @@ ret_t do_platform_op( XEN_GUEST_HANDLE(uint64) idletimes; ret = -ENOSYS; - if ( cpufreq_controller != FREQCTL_dom0_kernel ) + if ( !IS_ENABLED(CONFIG_CPUFREQ) || + cpufreq_controller != FREQCTL_dom0_kernel ) break; ctlmap.nr_bits = op->u.getidletime.cpumap_nr_cpus; diff --git a/xen/drivers/Makefile b/xen/drivers/Makefile index 2a1ae8ad13..3d81b8dde4 100644 --- a/xen/drivers/Makefile +++ b/xen/drivers/Makefile @@ -1,5 +1,5 @@ obj-y += char/ -obj-$(CONFIG_HAS_CPUFREQ) += cpufreq/ +obj-$(CONFIG_CPUFREQ) += cpufreq/ obj-$(CONFIG_HAS_PCI) += pci/ obj-$(CONFIG_HAS_VPCI) += vpci/ obj-$(CONFIG_HAS_PASSTHROUGH) += passthrough/ diff --git a/xen/drivers/acpi/pm-op.c b/xen/drivers/acpi/pm-op.c index 07bddc58d9..72f1eea62f 100644 --- a/xen/drivers/acpi/pm-op.c +++ b/xen/drivers/acpi/pm-op.c @@ -367,7 +367,8 @@ int do_pm_op(struct xen_sysctl_pm_op *op) return ret; } - if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) ) + if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) || + !IS_ENABLED(CONFIG_CPUFREQ) ) return -EINVAL; pmpt = processor_pminfo[op->cpuid]; diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c index 0f31736df2..d640d3a92c 100644 --- a/xen/drivers/acpi/pmstat.c +++ b/xen/drivers/acpi/pmstat.c @@ -76,6 +76,9 @@ void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to) spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu); + if ( !IS_ENABLED(CONFIG_CPUFREQ) ) + return; + spin_lock(cpufreq_statistic_lock); pxpt = per_cpu(cpufreq_statistic_data, cpu); @@ -105,7 +108,7 @@ int cpufreq_statistic_init(unsigned int cpu) spin_lock_init(cpufreq_statistic_lock); - if ( !pmpt ) + if ( !pmpt || !IS_ENABLED(CONFIG_CPUFREQ) ) return -EINVAL; /* Only need to initialize in Px mode */ @@ -225,7 +228,8 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op) int ret = 0; const struct processor_pminfo *pmpt; - if ( !op || (op->cpuid >= nr_cpu_ids) || !cpu_online(op->cpuid) ) + if ( !IS_ENABLED(CONFIG_CPUFREQ) || !op || (op->cpuid >= nr_cpu_ids) || + !cpu_online(op->cpuid) ) return -EINVAL; pmpt = processor_pminfo[op->cpuid]; diff --git a/xen/drivers/cpufreq/Kconfig b/xen/drivers/cpufreq/Kconfig index cce80f4aec..b9b93c1a26 100644 --- a/xen/drivers/cpufreq/Kconfig +++ b/xen/drivers/cpufreq/Kconfig @@ -1,3 +1,15 @@ - config HAS_CPUFREQ bool + +config CPUFREQ + bool "CPU Frequency scaling" + default y + depends on HAS_CPUFREQ + help + Enable CPU frequency scaling and power management governors. + This allows Xen to dynamically adjust CPU P-states (performance + states) based on system load. + + Disabling this option removes all cpufreq governors and power + management interfaces. This is useful for real-time systems or + minimal hypervisor builds. diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h index 0171ccf0ba..828d23961c 100644 --- a/xen/include/acpi/cpufreq/cpufreq.h +++ b/xen/include/acpi/cpufreq/cpufreq.h @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); +#ifdef CONFIG_CPUFREQ +int cpufreq_add_cpu(unsigned int cpu); +int cpufreq_del_cpu(unsigned int cpu); + void cpufreq_dbs_timer_suspend(void); void cpufreq_dbs_timer_resume(void); +#else +static inline int cpufreq_add_cpu(unsigned int cpu) { return -EOPNOTSUPP; } +static inline int cpufreq_del_cpu(unsigned int cpu) { return -EOPNOTSUPP; } + +static inline void cpufreq_dbs_timer_suspend(void) {} +static inline void cpufreq_dbs_timer_resume(void) {} +#endif void intel_feature_detect(struct cpufreq_policy *policy); @@ -398,7 +409,7 @@ void intel_feature_detect(struct cpufreq_policy *policy); int hwp_cmdline_parse(const char *s, const char *e); int hwp_register_driver(void); -#ifdef CONFIG_INTEL +#if defined(CONFIG_INTEL) && defined(CONFIG_CPUFREQ) bool hwp_active(void); #else static inline bool hwp_active(void) { return false; } diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index 0a87bc0384..bad9d94865 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -36,9 +36,6 @@ static inline void cpufreq_statistic_exit(unsigned int cpu) {} int cpufreq_limit_change(unsigned int cpu); -int cpufreq_add_cpu(unsigned int cpu); -int cpufreq_del_cpu(unsigned int cpu); - struct processor_performance { uint32_t state; uint32_t platform_limit; diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 90635ba0f3..ae6dba481c 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -186,7 +186,15 @@ static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } #endif #ifdef XEN_GUEST_HANDLE +#ifdef CONFIG_CPUFREQ int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); +#else +static inline int acpi_set_pdc_bits(unsigned int acpi_id, + XEN_GUEST_HANDLE(uint32) pdc) +{ + return -EOPNOTSUPP; +} +#endif #endif int arch_acpi_set_pdc_bits(u32 acpi_id, u32 *, u32 mask); diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h index 6096560d3c..51d3ee404f 100644 --- a/xen/include/xen/pmstat.h +++ b/xen/include/xen/pmstat.h @@ -5,10 +5,23 @@ #include /* for struct xen_processor_power */ #include /* for struct pm_cx_stat */ +#ifdef CONFIG_CPUFREQ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); -long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); int set_cppc_pminfo(unsigned int acpi_id, const struct xen_processor_cppc *cppc_data); +#else +static inline int set_px_pminfo(uint32_t acpi_id, + struct xen_processor_performance *perf) +{ + return -EOPNOTSUPP; +} +static inline int set_cppc_pminfo(unsigned int acpi_id, + const struct xen_processor_cppc *cppc_data) +{ + return -EOPNOTSUPP; +} +#endif +long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); #ifdef CONFIG_COMPAT struct compat_processor_performance; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 1268632344..084f3835dc 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1259,6 +1259,7 @@ extern enum cpufreq_controller { FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen } cpufreq_controller; +#ifdef CONFIG_CPUFREQ static always_inline bool is_cpufreq_controller(const struct domain *d) { /* @@ -1274,6 +1275,12 @@ static always_inline bool is_cpufreq_controller(const struct domain *d) return (is_pv_domain(d) && is_hardware_domain(d) && cpufreq_controller == FREQCTL_dom0_kernel); } +#else +static always_inline bool is_cpufreq_controller(const struct domain *d) +{ + return false; +} +#endif int cpupool_move_domain(struct domain *d, struct cpupool *c); int cpupool_do_sysctl(struct xen_sysctl_cpupool_op *op); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Sat Feb 14 13:51:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 14 Feb 2026 13:51:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1232544.1537022 (Exim 4.92) (envelope-from ) id 1vrG2o-0007cp-08; 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Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Fix Xen PV guest boot Date: Sat, 14 Feb 2026 14:50:35 +0100 Message-ID: <20260214135035.119357-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Score: -3.01 X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.com:dkim,suse.com:mid,suse.com:email] X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Queue-Id: 01C2D3E709 X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spam-Flag: NO A recent patch moving the call of sparse_init() to common mm code broke booting as a Xen PV guest. Reason is that the Xen PV specific boot code relied on struct page area being accessible rather early, but this changed by the move of the call of sparse_init(). Fortunately the fix is rather easy: there is a static branch available indicating whether struct page contents are usable by Xen. This static branch just needs to be tested in some places for avoiding the access of struct page. Fixes: 4267739cabb8 ("arch, mm: consolidate initialization of SPARSE memory model") Signed-off-by: Juergen Gross --- arch/x86/xen/mmu_pv.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 963154feae06..3254eaa88471 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -509,6 +509,9 @@ static pgd_t *xen_get_user_pgd(pgd_t *pgd) unsigned offset = pgd - pgd_page; pgd_t *user_ptr = NULL; + if (!static_branch_likely(&xen_struct_pages_ready)) + return NULL; + if (offset < pgd_index(USER_LIMIT)) { struct page *page = virt_to_page(pgd_page); user_ptr = (pgd_t *)page->private; @@ -1098,7 +1101,8 @@ static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin) if (unpin) pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa)); - ClearPagePinned(virt_to_page(__va(pa))); + if (static_branch_likely(&xen_struct_pages_ready)) + ClearPagePinned(virt_to_page(__va(pa))); xen_free_ro_pages(pa, PAGE_SIZE); } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Sun Feb 15 09:13:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 15 Feb 2026 09:13:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233227.1537032 (Exim 4.92) (envelope-from ) id 1vrYC2-0005x5-Ei; Sun, 15 Feb 2026 09:13:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233227.1537032; Sun, 15 Feb 2026 09:13:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrYC2-0005wx-AG; Sun, 15 Feb 2026 09:13:30 +0000 Received: by outflank-mailman (input) for mailman id 1233227; Sun, 15 Feb 2026 09:13:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrYBz-0005wo-Rs for xen-devel@lists.xenproject.org; Sun, 15 Feb 2026 09:13:28 +0000 Received: from submarine.notk.org (submarine.notk.org [62.210.214.84]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 92792561-0a4e-11f1-9ccf-f158ae23cfc8; Sun, 15 Feb 2026 10:13:22 +0100 (CET) Received: from gaia.codewreck.org (localhost [127.0.0.1]) by submarine.notk.org (Postfix) with ESMTPS id 4AEBF14C2DE; Sun, 15 Feb 2026 10:13:17 +0100 (CET) Received: from localhost (gaia.codewreck.org [local]) by gaia.codewreck.org (OpenSMTPD) with ESMTPA id acf4b99f; Sun, 15 Feb 2026 09:13:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 92792561-0a4e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codewreck.org; s=2; t=1771146799; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=X6PMMPGz+jLe5ualpnm5Aab0p5EjTgChnMRnoKKA/Fs=; b=ohM1tTgfFBEmPiR3IPGDXoOqOAcf/5fyLo5GMbtawe3lv4QXeHSR6Tfjg3CTsEKJa/0r1a ECI8dgKfua712El69ShX/WNWoB2KFNbkwlbSG627Xwz1xs43TzGJpLVdxDalz0jjV3cL7/ cVBlZExsUsBaLyjBuBnjzWsFsV792UAtl5pYusQwv29XiJyxfB+chicskwqc1j+oR/cQDi /XM5hKkxeFBul4d8OX/BEite+SJTT4Vdwe0wYD4Bu5ahgPhkPi9iMS0rzVGa3NJimBYveZ ej9pC0glbNQ/PetAYqOaWK+pt1KaVQIq7WvLmpH4n95kLPt5Tr/MyHUKcm3bnw== Date: Sun, 15 Feb 2026 18:13:00 +0900 From: Dominique Martinet To: Stefano Stabellini Cc: xen-devel@lists.xenproject.org, jgross@suse.com, v9fs@lists.linux.dev, ericvh@kernel.org, lucho@ionkov.net, linux_oss@crudebyte.com, sstabellini@kernel.org Subject: Re: [PATCH v2] 9p/xen: protect xen_9pfs_front_free against concurrent calls Message-ID: References: <20260129230348.2390470-1-stefano.stabellini@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260129230348.2390470-1-stefano.stabellini@amd.com> Stefano Stabellini wrote on Thu, Jan 29, 2026 at 03:03:48PM -0800: > Changes in v2: > - move priv->rings check above the loop > - replace list_del_init with list_del It looks like I didn't reply a couple of weeks ago but I did pick it up and just sent to Linus now. Thanks! -- Dominique Martinet | Asmadeus From xen-devel-bounces@lists.xenproject.org Sun Feb 15 18:20:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 15 Feb 2026 18:20:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233478.1537062 (Exim 4.92) (envelope-from ) id 1vrgik-0000v8-82; Sun, 15 Feb 2026 18:19:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233478.1537062; Sun, 15 Feb 2026 18:19:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgik-0000v1-4e; Sun, 15 Feb 2026 18:19:50 +0000 Received: by outflank-mailman (input) for mailman id 1233478; Sun, 15 Feb 2026 18:19:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgij-0000h9-1T for xen-devel@lists.xenproject.org; Sun, 15 Feb 2026 18:19:49 +0000 Received: from na1pdmzitismtp02.tibco.com (na1pdmzitismtp02.tibco.com [160.101.131.9]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e7499ad3-0a9a-11f1-9ccf-f158ae23cfc8; Sun, 15 Feb 2026 19:19:45 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id BCBCF810BDF8; Sun, 15 Feb 2026 13:19:18 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e7499ad3-0a9a-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH v3 2/2] x86/svm: Use the virtual NMI when available Date: Sun, 15 Feb 2026 18:16:02 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit With the Virtual NMI (vNMI), the pending NMI is simply stuffed into the VMCB and handed off to the hardware. There is no need for the artificial tracking of the NMI handling completion with the IRET instruction interception. Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware accelerated feature when the AMD platform support the vNMI. Adjust the svm_get_interrupt_shadow to check if the vNMI is currently blocked by servicing another in-progress NMI. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ xen/arch/x86/hvm/svm/svm.c | 5 ++++- xen/arch/x86/hvm/svm/vmcb.c | 2 ++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b85..3e8959f155 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); intinfo_t event; + if ( vmcb->_vintr.fields.vnmi_enable ) + { + if ( !vmcb->_vintr.fields.vnmi_pending && + !vmcb->_vintr.fields.vnmi_blocking ) + vmcb->_vintr.fields.vnmi_pending = 1; + + return; + } + event.raw = 0; event.v = true; event.type = X86_ET_NMI; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..3dfdc18133 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -548,7 +548,9 @@ static unsigned cf_check int svm_get_interrupt_shadow(struct vcpu *v) if ( vmcb->int_stat.intr_shadow ) intr_shadow |= HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI; - if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) + if ( vmcb->_vintr.fields.vnmi_enable + ? vmcb->_vintr.fields.vnmi_blocking + : (vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET) ) intr_shadow |= HVM_INTR_SHADOW_NMI; return intr_shadow; @@ -2524,6 +2526,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..e90bbac332 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; + return 0; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Sun Feb 15 18:20:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 15 Feb 2026 18:20:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233477.1537052 (Exim 4.92) (envelope-from ) id 1vrgij-0000hR-0Z; Sun, 15 Feb 2026 18:19:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233477.1537052; Sun, 15 Feb 2026 18:19:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgii-0000hK-U4; Sun, 15 Feb 2026 18:19:48 +0000 Received: by outflank-mailman (input) for mailman id 1233477; Sun, 15 Feb 2026 18:19:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgii-0000h9-ET for xen-devel@lists.xenproject.org; Sun, 15 Feb 2026 18:19:48 +0000 Received: from na1pdmzitismtp02.tibco.com (na1pdmzitismtp02.tibco.com [160.101.131.9]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e5f4abf6-0a9a-11f1-9ccf-f158ae23cfc8; Sun, 15 Feb 2026 19:19:43 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 84F4E813CD97; Sun, 15 Feb 2026 13:19:16 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e5f4abf6-0a9a-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH v3 1/2] x86/svm: Add Enumerations for the SVM virtual NMI Date: Sun, 15 Feb 2026 18:16:01 +0000 Message-ID: <8b09eece639ba9cdff0d259e0941f7ef3dae7701.1771177081.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD platforms. The feature support is indicated by the CPUID Fn8000_000A_EDX[25] = 1. Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the VMCB structure's vintr_t: vintr_t(11) - Virtual NMI is pending. vintr_t(12) - Virtual NMI is masked. vintr_t(26) - Enable NMI virtualization. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 69f6047394..047483db9a 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -336,13 +336,17 @@ typedef union u64 tpr: 8; u64 irq: 1; u64 vgif: 1; - u64 rsvd0: 6; + u64 rsvd0: 1; + u64 vnmi_pending: 1; + u64 vnmi_blocking:1; + u64: 3; u64 prio: 4; u64 ign_tpr: 1; u64 rsvd1: 3; u64 intr_masking: 1; u64 vgif_enable: 1; - u64 rsvd2: 6; + u64 vnmi_enable: 1; + u64 rsvd2: 5; u64 vector: 8; u64 rsvd3: 24; } fields; diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 15f0268be7..a35a61273b 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ static inline bool cpu_has_svm_feature(unsigned int feat) @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) #define MSR_INTERCEPT_NONE 0 -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Sun Feb 15 18:20:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 15 Feb 2026 18:20:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233475.1537042 (Exim 4.92) (envelope-from ) id 1vrgid-0000TS-SG; Sun, 15 Feb 2026 18:19:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233475.1537042; Sun, 15 Feb 2026 18:19:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgid-0000TK-NF; Sun, 15 Feb 2026 18:19:43 +0000 Received: by outflank-mailman (input) for mailman id 1233475; Sun, 15 Feb 2026 18:19:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrgid-0000TE-92 for xen-devel@lists.xenproject.org; Sun, 15 Feb 2026 18:19:43 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e48077a5-0a9a-11f1-b163-2bf370ae4941; Sun, 15 Feb 2026 19:19:42 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id E9338813CB7D; Sun, 15 Feb 2026 13:19:13 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e48077a5-0a9a-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Abdelkareem Abdelsaamad , Jan Beulich , Jason Andryuk Subject: [PATCH v3 0/2] Virtual NMI Date: Sun, 15 Feb 2026 18:16:00 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, the Xen hypervisor delivers NMIs to the guests using the Event Injection mechanism. The Event Injection mechanism does not block the delivery of subsequent NMIs. So, the Xen Hypervisor tracks the NMI delivery and its completion (by intercepting the IRET instruction) before sending a new NMI. With the 4th generation AMD EPYC, a hardware NMI virtualization support, Virtual NMI (VNMI), is introduced. The vNMI allows the hypervisor to inject the NMI into the guest w/o using Event Injection mechanism. No need to track the guest NMI and intercepting the IRET instruction. NMI Virtualization support is indicated by CPUID Fn8000_000A_EDX[VNMI] = 1.[1] NMI Virtualization is enabled by setting V_NMI_ENABLE (bit 26 in offset 60h of the VMCB). Enabling NMI Virtualization requires the NMI intercept bit to be set. An attempt to run a guest with V_NMI_ENABLE without the NMI intercept bit set results in #VMEXIT(INVALID) [1] Three new bits are added to the VMCB field at offset 60h to provide NMI virtualization hardware support: V_NMI(11): Indicates whether a virtual NMI is pending in the guest. The processor will clear V_NMI once it takes the virtual NMI. V_NMI_MASK(12): Indicates whether virtual NMIs are masked. The processor will set V_NMI_MASK once it takes the virtual NMI. V_NMI_MASK is cleared when the guest successfully completes an IRET instruction or #VMEXIT occurs while delivering the virtual NMI. V_NMI_ENABLE(26): Enables NMI virtualization. [1] [1] https://docs.amd.com/v/u/en-US/24593_3.43 --- Changes in v3: - Delete the introduced hvm_function_table::vNMI boolean and all the 3 vNMI hooks, hvm_function_table::is_vnmi_enabled, hvm_function_table::is_vnmi_masked and hvm_function_table::set_vnmi_pending. - Use the HVM_INTR_SHADOW_NMI to indicate that the NMI is blocked rather than the usage of HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2327265341 --- Changes in v2: - Merge the patches for "svm/vnmi: introduce the vnmi bit support in the cpuid feature set" and "svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB" into the one patch "x86/svm: Add Enumerations for the SVM virtual NMI". - Change the patch subject "svm/vnmi: Add support for the SVM Virtual NMI" to "x86/svm: Use virtual NMI when available" - Move the print out of the VNMI capability to the patch "x86/svm: Use virtual NMI when available" when it is being used. - Remove the hvm_intblk_vnmi enumeration that was introduced for the separate masked vNMI handling. - Introduce the hvm_function_table's is_vnmi_enabled callback to allow for the SVM implementation to verify that the VNMI is enabled by checking the VMCB bits in addition to the CPUID reported support. - Change the the name of the hvm_function_table's callback is_vnmi_pending to is_vnmi_masked. - The svm_inject_nmi function gains a check for the distinct NMI injection handling when the VNMI is enabled. - Simplify the check of AMD SVM Hardware support for the VNMI. The check cpu_has_svm_vnmi is performed unconditionally. - Simplify the introduced changes diff for the vintr_t union for the VNMI bits support. - Adopt the Xen formatting guidelines for the control structures. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2325298577 --- Abdelkareem Abdelsaamad (2): x86/svm: Add Enumerations for the SVM virtual NMI x86/svm: Use the virtual NMI when available xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ xen/arch/x86/hvm/svm/svm.c | 5 ++++- xen/arch/x86/hvm/svm/vmcb.c | 2 ++ xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 5 files changed, 23 insertions(+), 3 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 16 07:47:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 07:47:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233713.1537072 (Exim 4.92) (envelope-from ) id 1vrtKC-0001SZ-4i; Mon, 16 Feb 2026 07:47:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233713.1537072; Mon, 16 Feb 2026 07:47:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrtKC-0001SS-1b; Mon, 16 Feb 2026 07:47:20 +0000 Received: by outflank-mailman (input) for mailman id 1233713; Mon, 16 Feb 2026 07:47:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrtKB-0001SM-AZ for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 07:47:19 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id b6824cde-0b0b-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 08:47:16 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 32D9F150C; Sun, 15 Feb 2026 23:47:09 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.56.129]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2849A3F632; Sun, 15 Feb 2026 23:47:14 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b6824cde-0b0b-11f1-b163-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Subject: [PATCH] xen/arm: smccc: Preserve argument types in v1.1 SMC Date: Mon, 16 Feb 2026 08:47:08 +0100 Message-ID: <0e2ba0af683fa5e53a3d2b4b625703751cf7ce54.1771228001.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The SMCCC v1.1 inline helper currently forces a1-a4 into unsigned long and uses in/out constraints for r0-r3. In contrast, a5-a7 are passed with their original types via read-only constraints. On arm64 this means a 32-bit signed value in a1-a4 is converted to a 64-bit unsigned value, while the same value in a5-a7 keeps its signed 32-bit form. For example, a negative int in a2 is widened to unsigned long, but a negative int in a5 is passed as a 32-bit signed value, so the SMC sees different encodings depending on argument position. Switch the helper to use typed input registers arg0-arg7 derived from the call arguments (keeping a0 cast to u32) and separate output registers r0-r3. This preserves argument types consistently across all positions. Argument evaluation order is unchanged, so we do not reintroduce the issue fixed in "e00dc325bd9e" ("xen/arm: smccc-1.1: Handle function result as parameters"). This also aligns Xen's SMCCC parameter handling with Linux's type- preserving behavior (same externally visible argument handling, independent implementation) to avoid surprising differences between a1-a4 and a5-a7. Current callers (PSCI, SCMI, platform SMC pass-through, OP-TEE, and exynos5) pass unsigned values; exynos5 passes an int CPU id which should always be > 0. Signed-off-by: Bertrand Marquis --- xen/arch/arm/include/asm/smccc.h | 69 +++++++++++++------------------- 1 file changed, 27 insertions(+), 42 deletions(-) diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h index 441b3ab65dee..5b30dd57b69d 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -99,87 +99,68 @@ struct arm_smccc_res { #define __count_args(...) \ ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) -#define __constraint_write_0 \ - "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3) -#define __constraint_write_1 \ - "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3) -#define __constraint_write_2 \ - "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3) -#define __constraint_write_3 \ - "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3) -#define __constraint_write_4 __constraint_write_3 -#define __constraint_write_5 __constraint_write_4 -#define __constraint_write_6 __constraint_write_5 -#define __constraint_write_7 __constraint_write_6 - -#define __constraint_read_0 -#define __constraint_read_1 -#define __constraint_read_2 -#define __constraint_read_3 -#define __constraint_read_4 "r" (r4) -#define __constraint_read_5 __constraint_read_4, "r" (r5) -#define __constraint_read_6 __constraint_read_5, "r" (r6) -#define __constraint_read_7 __constraint_read_6, "r" (r7) +#define __constraint_read_0 "r" (arg0) +#define __constraint_read_1 __constraint_read_0, "r" (arg1) +#define __constraint_read_2 __constraint_read_1, "r" (arg2) +#define __constraint_read_3 __constraint_read_2, "r" (arg3) +#define __constraint_read_4 __constraint_read_3, "r" (arg4) +#define __constraint_read_5 __constraint_read_4, "r" (arg5) +#define __constraint_read_6 __constraint_read_5, "r" (arg6) +#define __constraint_read_7 __constraint_read_6, "r" (arg7) #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = (res); \ - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ - register unsigned long r1 ASM_REG(1); \ - register unsigned long r2 ASM_REG(2); \ - register unsigned long r3 ASM_REG(3) + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) #define __declare_arg_1(a0, a1, res) \ typeof(a1) __a1 = (a1); \ struct arm_smccc_res *___res = (res); \ - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ - register unsigned long r1 ASM_REG(1) = __a1; \ - register unsigned long r2 ASM_REG(2); \ - register unsigned long r3 ASM_REG(3) + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ + register typeof(a1) arg1 ASM_REG(1) = __a1 #define __declare_arg_2(a0, a1, a2, res) \ typeof(a1) __a1 = (a1); \ typeof(a2) __a2 = (a2); \ struct arm_smccc_res *___res = (res); \ - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ - register unsigned long r1 ASM_REG(1) = __a1; \ - register unsigned long r2 ASM_REG(2) = __a2; \ - register unsigned long r3 ASM_REG(3) + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ + register typeof(a1) arg1 ASM_REG(1) = __a1; \ + register typeof(a2) arg2 ASM_REG(2) = __a2 #define __declare_arg_3(a0, a1, a2, a3, res) \ typeof(a1) __a1 = (a1); \ typeof(a2) __a2 = (a2); \ typeof(a3) __a3 = (a3); \ struct arm_smccc_res *___res = (res); \ - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ - register unsigned long r1 ASM_REG(1) = __a1; \ - register unsigned long r2 ASM_REG(2) = __a2; \ - register unsigned long r3 ASM_REG(3) = __a3 + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ + register typeof(a1) arg1 ASM_REG(1) = __a1; \ + register typeof(a2) arg2 ASM_REG(2) = __a2; \ + register typeof(a3) arg3 ASM_REG(3) = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ typeof(a4) __a4 = (a4); \ __declare_arg_3(a0, a1, a2, a3, res); \ - register unsigned long r4 ASM_REG(4) = __a4 + register typeof(a4) arg4 ASM_REG(4) = __a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ typeof(a5) __a5 = (a5); \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ - register typeof(a5) r5 ASM_REG(5) = __a5 + register typeof(a5) arg5 ASM_REG(5) = __a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ typeof(a6) __a6 = (a6); \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ - register typeof(a6) r6 ASM_REG(6) = __a6 + register typeof(a6) arg6 ASM_REG(6) = __a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ typeof(a7) __a7 = (a7); \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ - register typeof(a7) r7 ASM_REG(7) = __a7 + register typeof(a7) arg7 ASM_REG(7) = __a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) #define ___constraints(count) \ - : __constraint_write_ ## count \ + : "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \ : __constraint_read_ ## count \ : "memory" #define __constraints(count) ___constraints(count) @@ -204,6 +185,10 @@ struct arm_smccc_res { */ #define arm_smccc_1_1_smc(...) \ do { \ + register unsigned long r0 ASM_REG(0); \ + register unsigned long r1 ASM_REG(1); \ + register unsigned long r2 ASM_REG(2); \ + register unsigned long r3 ASM_REG(3); \ __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ asm volatile("smc #0\n" \ __constraints(__count_args(__VA_ARGS__))); \ -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Mon Feb 16 07:53:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 07:53:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233721.1537082 (Exim 4.92) (envelope-from ) id 1vrtPz-0002zc-Nr; Mon, 16 Feb 2026 07:53:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233721.1537082; Mon, 16 Feb 2026 07:53:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrtPz-0002zV-Kd; Mon, 16 Feb 2026 07:53:19 +0000 Received: by outflank-mailman (input) for mailman id 1233721; Mon, 16 Feb 2026 07:53:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrtPx-0002zP-V9 for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1c9dxKsvaF6KDkgEpPXN3U2JRbr7iwdJmX55rdkA9+5UzzEIQxJVDLxZ6lnsp9RlAQJLd+ddxAE4Diu1/P+9LMs245XecY1FkGShCUad4N6qpxSWTNDbXpBBcc+9czWne/KSwWyCG3eqvM2vqeUwBNqXPEmCGsgLpunwM8pfFulFTQly4X8TFhGqUSp1gUAmQ71GPzgzts28o/jbsmqUNnfgY6gArAxbRQXNry58x7u5X1CmCeWvMiMfYM2QwHVVvYW7bTpqZvmIp5UWAf8E1eldCY73no3mTF7EqD+IOUrdqjf9nmhWtOQ4ePYfhcjNsE7WoBX3kZW2eQtSCJlcomcVIeWEk6tfsUupQbgMfjSddJ3q7xAUOxuL0G828gr6xEY8PHim53wBPyBy8SqdvmohG+ZgPjZoUs/ZIlpR8Qp+HCzJ9Y2zcRMJK8O5nw89 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 07:53:10.6074 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2a9af73a-0d1c-41d3-9a0c-08de6d306e23 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E7E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9830 On 13/02/2026 10:20, Luca Fancellu wrote: > Hi Ayan, > >> >> Further if we can set `v8r_el1_msa = mmu` by default for everyone (Armv8-A, Armv8-R) , then we can reduce further if-def. >> > > This was Michal suggestion to have mpu by default, so I would wait for his reply before proceeding further on this. Yes, we should keep mpu as a default which matches the Arm ARM. MMU is optional whereas MPU is not. ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 16 08:11:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 08:11:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233742.1537091 (Exim 4.92) (envelope-from ) id 1vrthb-0006MZ-Mb; Mon, 16 Feb 2026 08:11:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233742.1537091; Mon, 16 Feb 2026 08:11:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrthb-0006MS-K0; Mon, 16 Feb 2026 08:11:31 +0000 Received: by outflank-mailman (input) for mailman id 1233742; Mon, 16 Feb 2026 08:11:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrtha-0006ML-Eu for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 08:11:30 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 17f01b8c-0b0f-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 09:11:28 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4834826e555so29613975e9.2 for ; Mon, 16 Feb 2026 00:11:28 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 00:11:27 -0800 (PST) Message-ID: <42b32172-9e28-40c1-a83c-ba37e17f5480@suse.com> Date: Mon, 16 Feb 2026 09:11:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Cannot boot PVH dom0 with big initrd To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <440f94be-77c0-4b28-b107-6efc3623a92f@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 16:56, Roger Pau Monné wrote: > On Fri, Feb 13, 2026 at 09:56:42AM +0100, Jan Beulich wrote: >> On 13.02.2026 05:02, Marek Marczykowski-Górecki wrote: >>> Hi, >>> >>> After fixing the xhci crash, I hit another issue - booting with 236MB >>> initrd doesn't work, I get: >>> >>> (XEN) [ 3.151856] *** Building a PVH Dom0 *** >>> ... >>> (XEN) [ 3.593940] Unable to allocate memory with order 0! >>> (XEN) [ 3.597110] Failed to setup Dom0 physical memory map >>> (XEN) [ 3.599884] >>> (XEN) [ 3.602482] **************************************** >>> (XEN) [ 3.605272] Panic on CPU 0: >>> (XEN) [ 3.607928] Could not construct d0 >>> (XEN) [ 3.610692] **************************************** >>> (XEN) [ 3.613463] >>> (XEN) [ 3.616035] Reboot in five seconds... >>> (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_REG. >>> >>> Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f2899781755762f565 >>> >>> If I skip initrd, then it boots just fine (but dom0 is not happy about >>> that). 164MB initrd failed too, but 13MB started ok. >>> Just in case, I tried skipping XHCI console, but it didn't change >>> anything. >>> >>> Host has 16GB of memory, and there is no dom0_mem= parameter. Xen is >>> started from GRUB, using MB2+EFI. >> >> Hmm, yes, there's an ordering issue: Of course we free initrd space (as used >> for passing from the boot loader to Xen) only after copying to the designated >> guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in >> its calculation (adding initial_images_nrpages()'s return value). PV Dom0 >> isn't affected because to load huge initrd there, the kernel has to request >> the initrd to not be mapped into the initial allocation. > > Right, on PV dom0 we do not copy the image to a new set of pages, we > simply assign the pages where the initrd resides to the domain. We > can't populate those pages in the p2m as-is, otherwise we would > shatter super pages. > > I think the fix below should do it, it's likely the best we can do. That's at best a workaround imo. We definitely can do better, and the bigger the initrd, the more important it may be that we actually do. One option may be to similarly use the pages directly (i.e. by assigning rather than copying), accepting that we may not be able to use large page mappings then for the respective GFN range. Jan > Can you please give it a try Marek? > > Thanks, Roger. > --- > diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c > index 0b467fd4a4fc..8e3cb5d0db76 100644 > --- a/xen/arch/x86/dom0_build.c > +++ b/xen/arch/x86/dom0_build.c > @@ -343,7 +343,7 @@ unsigned long __init dom0_compute_nr_pages( > > for_each_node_mask ( node, dom0_nodes ) > avail += avail_domheap_pages_region(node, 0, 0) + > - initial_images_nrpages(node); > + is_pv_domain(d) ? initial_images_nrpages(node) : 0; > > /* Reserve memory for further dom0 vcpu-struct allocations... */ > avail -= (d->max_vcpus - 1UL) > From xen-devel-bounces@lists.xenproject.org Mon Feb 16 08:40:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 08:40:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233755.1537102 (Exim 4.92) (envelope-from ) id 1vru9T-0001sc-Qr; Mon, 16 Feb 2026 08:40:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233755.1537102; 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Xen is > >>> started from GRUB, using MB2+EFI. > >> > >> Hmm, yes, there's an ordering issue: Of course we free initrd space (as used > >> for passing from the boot loader to Xen) only after copying to the designated > >> guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in > >> its calculation (adding initial_images_nrpages()'s return value). PV Dom0 > >> isn't affected because to load huge initrd there, the kernel has to request > >> the initrd to not be mapped into the initial allocation. > > > > Right, on PV dom0 we do not copy the image to a new set of pages, we > > simply assign the pages where the initrd resides to the domain. We > > can't populate those pages in the p2m as-is, otherwise we would > > shatter super pages. > > > > I think the fix below should do it, it's likely the best we can do. > > That's at best a workaround imo. We definitely can do better, and the bigger > the initrd, the more important it may be that we actually do. See the second patch I gave to Marek. That one is slightly better by accounting for the initial images space as part of the reserved space. > One option may > be to similarly use the pages directly (i.e. by assigning rather than > copying), accepting that we may not be able to use large page mappings then > for the respective GFN range. Hm, there's always going to be a trade-off. I think I would prefer having 1G pages in the p2m, rather than a bit more memory due to direct adding the initrd into the p2m. Thanks, Roger. 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Mon, 16 Feb 2026 00:48:39 -0800 (PST) Message-ID: <0ea96b84-52ed-4b8a-b108-223ff8f85105@suse.com> Date: Mon, 16 Feb 2026 09:48:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Cannot boot PVH dom0 with big initrd To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <440f94be-77c0-4b28-b107-6efc3623a92f@suse.com> <42b32172-9e28-40c1-a83c-ba37e17f5480@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 09:40, Roger Pau Monné wrote: > On Mon, Feb 16, 2026 at 09:11:29AM +0100, Jan Beulich wrote: >> On 13.02.2026 16:56, Roger Pau Monné wrote: >>> On Fri, Feb 13, 2026 at 09:56:42AM +0100, Jan Beulich wrote: >>>> On 13.02.2026 05:02, Marek Marczykowski-Górecki wrote: >>>>> Hi, >>>>> >>>>> After fixing the xhci crash, I hit another issue - booting with 236MB >>>>> initrd doesn't work, I get: >>>>> >>>>> (XEN) [ 3.151856] *** Building a PVH Dom0 *** >>>>> ... >>>>> (XEN) [ 3.593940] Unable to allocate memory with order 0! >>>>> (XEN) [ 3.597110] Failed to setup Dom0 physical memory map >>>>> (XEN) [ 3.599884] >>>>> (XEN) [ 3.602482] **************************************** >>>>> (XEN) [ 3.605272] Panic on CPU 0: >>>>> (XEN) [ 3.607928] Could not construct d0 >>>>> (XEN) [ 3.610692] **************************************** >>>>> (XEN) [ 3.613463] >>>>> (XEN) [ 3.616035] Reboot in five seconds... >>>>> (XEN) [ 8.626565] Resetting with ACPI MEMORY or I/O RESET_REG. >>>>> >>>>> Full console log: https://gist.github.com/marmarek/c9dbc87bf07b76f2899781755762f565 >>>>> >>>>> If I skip initrd, then it boots just fine (but dom0 is not happy about >>>>> that). 164MB initrd failed too, but 13MB started ok. >>>>> Just in case, I tried skipping XHCI console, but it didn't change >>>>> anything. >>>>> >>>>> Host has 16GB of memory, and there is no dom0_mem= parameter. Xen is >>>>> started from GRUB, using MB2+EFI. >>>> >>>> Hmm, yes, there's an ordering issue: Of course we free initrd space (as used >>>> for passing from the boot loader to Xen) only after copying to the designated >>>> guest area. Yet dom0_compute_nr_pages(), intentionally, includes the space in >>>> its calculation (adding initial_images_nrpages()'s return value). PV Dom0 >>>> isn't affected because to load huge initrd there, the kernel has to request >>>> the initrd to not be mapped into the initial allocation. >>> >>> Right, on PV dom0 we do not copy the image to a new set of pages, we >>> simply assign the pages where the initrd resides to the domain. We >>> can't populate those pages in the p2m as-is, otherwise we would >>> shatter super pages. >>> >>> I think the fix below should do it, it's likely the best we can do. >> >> That's at best a workaround imo. We definitely can do better, and the bigger >> the initrd, the more important it may be that we actually do. > > See the second patch I gave to Marek. That one is slightly better by > accounting for the initial images space as part of the reserved space. Will check; didn't make it there, yet. >> One option may >> be to similarly use the pages directly (i.e. by assigning rather than >> copying), accepting that we may not be able to use large page mappings then >> for the respective GFN range. > > Hm, there's always going to be a trade-off. I think I would prefer > having 1G pages in the p2m, rather than a bit more memory due to > direct adding the initrd into the p2m. "A bit more" may not get it, when considering e.g. a 2Gb initrd on a 4Gb system. And of course "use pages directly" is only the simplest of the possible approaches. We could "shift" the initrd some, or we could make sure to allocate a 2Mb or 1Gb aligned region to hold it right from the beginning. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 08:55:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 08:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233773.1537122 (Exim 4.92) (envelope-from ) id 1vruNo-0004Bl-Aw; Mon, 16 Feb 2026 08:55:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233773.1537122; Mon, 16 Feb 2026 08:55:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruNo-0004Be-7x; Mon, 16 Feb 2026 08:55:08 +0000 Received: by outflank-mailman (input) for mailman id 1233773; Mon, 16 Feb 2026 08:55:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruNm-0004BY-RT for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 08:55:06 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2ff5f1da-0b15-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 09:55:05 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-482f454be5bso45516595e9.0 for ; Mon, 16 Feb 2026 00:55:05 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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For the former this may be pretty unlikely, but clearly the latter can hit both out-of-memory conditions in the hypervisor or denial because of the allocation exceeding the domain's allowance (there's no interaction with the balloon driver here either). In gnttab_dma_free_pages() we simply can't give back to the system what hasn't been re-filled with backing memory. For gnttab_dma_alloc_pages() both parts of the overall region need dealing with differently. While no present caller of gnttab_dma_free_pages() checks its return value, also don't use -EFAULT there: It really is an out-of-memory condition. (In gnttab_dma_alloc_pages() -EFAULT doesn't look quite right either, but I couldn't think of a clearly better error code there.) Fixes: 9bdc7304f536 ("xen/grant-table: Allow allocating buffers suitable for DMA") Signed-off-by: Jan Beulich --- I'm likely screwing things up, as I can't understand how this is intended to work: args->dev_bus_addr shouldn't really be in pseudo-physical address space, or else the address isn't suitable for handing to a device in order to DMA to/from it. Hence using __phys_to_pfn() on it to then hand the result to pfn_to_page() feels bogus. Was all of this perhaps only ever intended for (tested with) translated domains? With the uses of xenmem_reservation_va_mapping_*() only being masquerade? Furthermore the allocated buffer ought to have been contiguous in machine / DMA space. Yet the way it's re-populated upon freeing of the area doesn't guarantee that at all. All of what is done assumes dma_free_{coherent,wc,attr}() is capable of freeing piecemeal. I only checked dma_release_from_dev_coherent() to fulfill this requirement. If this can't be relied upon, please consider this submission as merely a bug report (for someone else to fix). --- a/drivers/xen/grant-table.c +++ b/drivers/xen/grant-table.c @@ -1095,6 +1095,28 @@ int gnttab_dma_alloc_pages(struct gnttab ret = xenmem_reservation_decrease(args->nr_pages, args->frames); if (ret != args->nr_pages) { pr_debug("Failed to decrease reservation for DMA buffer\n"); + if (ret >= 0) { + /* Free the part where decrease didn't work. */ + size_t done = ret << PAGE_SHIFT; + + xenmem_reservation_va_mapping_update(args->nr_pages - ret, + &args->pages[ret], + &args->frames[ret]); + + if (args->coherent) + dma_free_coherent(args->dev, size - done, + args->vaddr + done, + args->dev_bus_addr + done); + else + dma_free_wc(args->dev, size - done, + args->vaddr + done, + args->dev_bus_addr + done); + + if (!ret) /* Nothing else to do? */ + return -EFAULT; + + args->nr_pages = ret; + } ret = -EFAULT; goto fail; } @@ -1128,7 +1150,12 @@ int gnttab_dma_free_pages(struct gnttab_ ret = xenmem_reservation_increase(args->nr_pages, args->frames); if (ret != args->nr_pages) { pr_debug("Failed to increase reservation for DMA buffer\n"); - ret = -EFAULT; + /* Can only free what has been re-filled. */ + if (!ret) + return -ENOMEM; + if (ret > 0) + args->nr_pages = ret; + ret = -ENOMEM; } else { ret = 0; } From xen-devel-bounces@lists.xenproject.org Mon Feb 16 08:55:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 08:55:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233780.1537131 (Exim 4.92) (envelope-from ) id 1vruOW-0004eN-Jg; Mon, 16 Feb 2026 08:55:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233780.1537131; Mon, 16 Feb 2026 08:55:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruOW-0004eG-Gh; Mon, 16 Feb 2026 08:55:52 +0000 Received: by outflank-mailman (input) for mailman id 1233780; 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pr=C Message-ID: <87e02fff-1891-42f1-9317-786906425171@amd.com> Date: Mon, 16 Feb 2026 09:55:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] arm/mpu: implement setup_virt_paging for MPU system To: Harry Ramsey , CC: , Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Wei Chen , Hari Limaye References: <20260206090155.68466-1-harry.ramsey@arm.com> <20260206090155.68466-2-harry.ramsey@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260206090155.68466-2-harry.ramsey@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|EAYPR12MB999156:EE_ X-MS-Office365-Filtering-Correlation-Id: 3538d096-4b61-4590-e459-08de6d392a51 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700013|82310400026|1800799024|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: x5g/MQM24tDuSdjHiwV4bYAOX6knH+O1v7xV3YdTuUDkfPhf1t2PQvKV9Ggj2HLKJFBp7tj8rS8wAKCAYLinNiJdw0WL7lkC5acb0G0ezuTj6FVexXhBsW1KpFfiAYzLYi/SqUq2M1LLa/ZQuGya/JVRx1u7OvCd7OqZWfO8zM/WeGfZfVU6PftH40ZSU+CTraCxPoCPEU9VMV881HewF7Uv21w+ybPnie84lUUaPRx1nPdIe3B4XQfN1jU+1+8IHXbxBYQ36SlscBrB0J6Pb5FHp3Bgf9ThWdR1jkBr5AreaUQESzIT1IQDjFpcCtQueq4EoozMzl3z3TukNgccXFzisZqM5JKJ8l52kaBwypHKW/5Nkdra/QrmyAqUCEjMhXgLfWkAQqJSY5VBL5mMCWrb9+NluSF3+rOQsNdlR7IOZVA9nAp8ntHoL29QqNCM X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 08:55:42.3352 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3538d096-4b61-4590-e459-08de6d392a51 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: EAYPR12MB999156 I guess this should be send as a v2 with listed changes between v2 and v1. On 06/02/2026 10:01, Harry Ramsey wrote: > From: Penny Zheng > > For MMU system, setup_virt_paging is used to configure stage 2 address > translation regime, like IPA bits, VMID allocator set up, etc. > Some could be inherited in MPU system, like VMID allocator set up, etc. > > For MPU system, we could have the following memory translation regime: > - PMSAv8-64 at both EL1/EL0 and EL2 (default) > - VMSAv8-64 at EL1/EL0 and PMSAv8-64 at EL2 (enabled with device tree > proprty v8r_el1_msa) > > Signed-off-by: Penny Zheng > Signed-off-by: Wei Chen > Signed-off-by: Luca Fancellu > Signed-off-by: Hari Limaye > Signed-off-by: Harry Ramsey > --- > xen/arch/arm/arm64/mpu/p2m.c | 67 +++++++++++++++++++++++- > xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ > xen/arch/arm/include/asm/cpufeature.h | 13 +++-- > xen/arch/arm/include/asm/mpu/p2m.h | 12 +++++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/include/asm/processor.h | 11 ++++ > 6 files changed, 108 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c > index b6d8b2777b..da8f0553c1 100644 > --- a/xen/arch/arm/arm64/mpu/p2m.c > +++ b/xen/arch/arm/arm64/mpu/p2m.c > @@ -2,11 +2,76 @@ > > #include > #include > +#include > #include > > void __init setup_virt_paging(void) > { > - BUG_ON("unimplemented"); > + uint64_t vtcr_el2 = READ_SYSREG(VTCR_EL2), vstcr_el2 = READ_SYSREG(VSTCR_EL2); > + > + /* PA size */ > + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, > + /* Invalid */}; > + > + /* > + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured > + * with IPA bits == PA bits, compare against "pabits". > + */ > + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) > + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; > + > + /* > + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output > + * address space to access the Secure PA space as Armv8r only implements > + * secure state. > + */ > + vtcr_el2 &= ~VTCR_NSA; > + > + /* > + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the > + * memory system configurations supported. In Armv8-R AArch64, the > + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. > + */ > + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) > + goto fault; > + > + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ > + if ( system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_NONE_SUPPORT ) > + goto fault; > + > + /* > + * cpuinfo sanitization makes sure we support 16bits VMID only if all cores > + * are supporting it. > + */ > + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) > + max_vmid = MAX_VMID_16_BIT; > + > + /* Set the VS bit only if 16 bit VMID is supported. */ > + if ( max_vmid == MAX_VMID_16_BIT ) > + vtcr_el2 |= VTCR_VS; No need for max_vmid assignment. You can directory do: if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) vtcr_el2 |= VTCR_VS; to make things clearer. > + > + p2m_vmid_allocator_init(); > + > + WRITE_SYSREG(vtcr_el2, VTCR_EL2); > + > + /* > + * VSTCR_EL2.SA defines secure stage 2 translation output address space. > + * To make sure that all stage 2 translations for the Secure PA space access > + * the Secure PA space, we keep SA bit as 0. > + * > + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS > + * configuration is checked against stage 1 NS configuration in EL1&0 > + * translation regime for the given address, and generates a fault if they > + * are different, we set SC bit 1. > + */ > + vstcr_el2 &= ~VSTCR_EL2_SA; > + vstcr_el2 |= VSTCR_EL2_SC; > + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); > + > + return; Shouldn't we have a printk message similar to what MMU has? printk("P2M: %d-bit IPA with %d-bit PA and %d-bit VMID\n"...) > + > + fault: > + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); > } > > /* > diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h > index 19d409d3eb..a4b6eef181 100644 > --- a/xen/arch/arm/include/asm/arm64/sysregs.h > +++ b/xen/arch/arm/include/asm/arm64/sysregs.h > @@ -462,6 +462,10 @@ > #define ZCR_ELx_LEN_SIZE 9 > #define ZCR_ELx_LEN_MASK 0x1ff > > +/* Virtualization Secure Translation Control Register */ > +#define VSTCR_EL2_SA (_AC(0x1,UL)<<30) Why UL and not U? Also, please add spaces around << > +#define VSTCR_EL2_SC (_AC(0x1,UL)<<20) > + > #ifdef CONFIG_MPU > /* > * The Armv8-R AArch64 architecture always executes code in Secure > diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h > index 13353c8e1a..bf902a3970 100644 > --- a/xen/arch/arm/include/asm/cpufeature.h > +++ b/xen/arch/arm/include/asm/cpufeature.h > @@ -248,6 +248,12 @@ struct cpuinfo_arm { > unsigned long tgranule_16K:4; > unsigned long tgranule_64K:4; > unsigned long tgranule_4K:4; > +#ifdef CONFIG_MPU > + unsigned long __res0:16; > + unsigned long msa:4; > + unsigned long msa_frac:4; > + unsigned long __res1:8; > +#else > unsigned long tgranule_16k_2:4; > unsigned long tgranule_64k_2:4; > unsigned long tgranule_4k_2:4; > @@ -255,6 +261,7 @@ struct cpuinfo_arm { > unsigned long __res0:8; > unsigned long fgt:4; > unsigned long ecv:4; > +#endif > > /* MMFR1 */ > unsigned long hafdbs:4; > @@ -267,13 +274,13 @@ struct cpuinfo_arm { > unsigned long xnx:4; > unsigned long twed:4; > unsigned long ets:4; > - unsigned long __res1:4; > + unsigned long __res2:4; > unsigned long afp:4; > - unsigned long __res2:12; > + unsigned long __res3:12; > unsigned long ecbhb:4; > > /* MMFR2 */ > - unsigned long __res3:64; > + unsigned long __res4:64; > }; > } mm64; > > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a..d165585d4e 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -5,6 +5,18 @@ > > struct p2m_domain; > > +/* > + * The architecture allows at most 255 EL2 MPU memory regions. The size of the > + * MPU structure entry (pr_t) is 32 Bytes on AArch64 (requiring two 4KB pages) > + * and 16 bytes on AArch32 (requiring one 4KB page). It would be good to have a BUILD_BUG_ON to validate these calculations. Conversely, we could define root order with these calculations but it might not be well readable. > + */ > +#ifdef CONFIG_ARM_64 > +#define P2M_ROOT_ORDER 1 > +#else > +#define P2M_ROOT_ORDER 0 They don't seem to be used by this patch. > +#endif > + > +/* Not used on MPU system */ > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9eb..ed1b6dd40f 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; Why vsctlr and not vsctr? This does not seem to be used in this patch, so maybe move it to another patch. > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h > index 1a48c9ff3b..7344aa094b 100644 > --- a/xen/arch/arm/include/asm/processor.h > +++ b/xen/arch/arm/include/asm/processor.h > @@ -403,6 +403,10 @@ > > #define VTCR_RES1 (_AC(1,UL)<<31) > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) Would it make sense to have CONFIG_ARM_64_MPU to avoid specifying these two all the time? > +#define VTCR_NSA (_AC(0x1,UL)<<30) > +#endif > + > /* HCPTR Hyp. Coprocessor Trap Register */ > #define HCPTR_TAM ((_AC(1,U)<<30)) > #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ > @@ -464,6 +468,13 @@ > #define MM64_VMID_16_BITS_SUPPORT 0x2 > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > +#define MM64_MSA_PMSA_SUPPORT 0xf > +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 > +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 > +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 > +#endif > + > #ifndef __ASSEMBLER__ > > extern register_t __cpu_logical_map[]; ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 16 08:57:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 08:57:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233788.1537141 (Exim 4.92) (envelope-from ) id 1vruQQ-0005M3-UR; Mon, 16 Feb 2026 08:57:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233788.1537141; Mon, 16 Feb 2026 08:57:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruQQ-0005Lw-Ro; Mon, 16 Feb 2026 08:57:50 +0000 Received: by outflank-mailman (input) for mailman id 1233788; Mon, 16 Feb 2026 08:57:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruQP-0005Lo-Ki for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 08:57:49 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9103f282-0b15-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 09:57:48 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-43770c94dfaso3564782f8f.2 for ; Mon, 16 Feb 2026 00:57:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 00:57:47 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 09:57:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini Cc: Stefano Stabellini , roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260206210554.126443-1-stefano.stabellini@amd.com> <7a3b72b4-23f9-410f-8d0d-08d9adaaf1a7@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 22:46, Stefano Stabellini wrote: > On Mon, 9 Feb 2026, Jan Beulich wrote: >> On 06.02.2026 22:05, Stefano Stabellini wrote: >>> --- a/xen/arch/x86/sysctl.c >>> +++ b/xen/arch/x86/sysctl.c >>> @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) >>> pi->capabilities |= XEN_SYSCTL_PHYSCAP_hap; >>> if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) >>> pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow; >>> + if ( hvm_nested_virt_supported() ) >>> + pi->capabilities |= XEN_SYSCTL_PHYSCAP_nestedhvm; >>> } >>> >>> long arch_do_sysctl( >>> --- a/xen/include/public/sysctl.h >>> +++ b/xen/include/public/sysctl.h >>> @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { >>> /* Xen supports the Grant v1 and/or v2 ABIs. */ >>> #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) >>> #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) >>> +/* The platform supports nested HVM. */ >>> +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) >> >> Doesn't this want introducing up front, for the tool stack to make use of? > > What do you mean by "up front" in this context? In a separate toolstack > patch? Yes. Without the toolstack part the introduction of this flag is cosmetic only, which isn't what we want. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 09:04:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 09:04:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233800.1537151 (Exim 4.92) (envelope-from ) id 1vruWf-00070A-Lq; Mon, 16 Feb 2026 09:04:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233800.1537151; Mon, 16 Feb 2026 09:04:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruWf-000703-Iz; Mon, 16 Feb 2026 09:04:17 +0000 Received: by outflank-mailman (input) for mailman id 1233800; Mon, 16 Feb 2026 09:04:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vruWe-0006yQ-9B for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 09:04:16 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 775eb687-0b16-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 10:04:14 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4834826e555so30163485e9.2 for ; Mon, 16 Feb 2026 01:04:14 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 01:04:14 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 10:04:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding To: Stefano Stabellini , Daniel Smith Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 21:09, Stefano Stabellini wrote: > On Tue, 10 Feb 2026, Jan Beulich wrote: >> On 10.02.2026 00:23, Stefano Stabellini wrote: >>> On Mon, 9 Feb 2026, Jan Beulich wrote: >>>> On 05.02.2026 00:37, Stefano Stabellini wrote: >>>>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from >>>>> global to VIRQ_DOMAIN to allow other domains to bind to it. >>>>> >>>>> Note that Linux silently falls back to polling when binding fails, which >>>>> masks the issue. >>>>> >>>>> Signed-off-by: Jason Andryuk >>>>> Signed-off-by: Stefano Stabellini >>>> >>>> Technically this is an ABI change, and hence I'm uncertain it can go without >>>> that aspect being at least mentioned, perhaps even its implications properly >>>> discussed. >>> >>> I am not sure if it qualifies as an ABI change or not but I am happy to >>> expand the commit message in any way you might suggest. >>> >>> The jist of it is already in the commit message, really the key element >>> is that VIRQ_CONSOLE can be bound by multiple domains. >>> >>> Aside from spelling out "this is an ABI change" what do you have in >>> mind? >> >> What I mean is discussion of the implications for domains using the vIRQ. >> Previously most domains would have attempts to bind this vIRQ rejected. >> Technically it is possible that kernels had code paths blindly doing the >> binding, relying on it to work only when running as Dom0. And really, you >> appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, >> without which its binding wasn't possible at all before (except for the >> hardware domain, which get_global_virq_handler() falls back to when no >> other domain is set). Or am I mis-reading things, as I can't spot any use >> of VIRQ_CONSOLE under tools/, whereas I would have expected provisions >> for (host) console handling to be delegated to a separate control or >> console domain? Of course other toolstacks (the XAPI-based one for >> example) might actually have such provisions. >> >> And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously >> is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type >> vIRQ-s. Yet this vIRQ isn't supposed to be universally available to >> every DomU. Instead the ->console->input_allowed checking is kind of >> substituting such a check, which iirc Daniel said (in more general >> context) shouldn't ever be done. IOW in patch 5 you're actually effecting >> policy, which should be XSM's job aiui. >> >> Bottom line: The patch may need to be more involved, but at the very >> least the description would need updating to justify it being as simple >> as it is right now. > > What do you think of this: Quite a bit better, yet for me at least not something I would feel happy to take as a basis for an ack. > --- > > xen/console: change VIRQ_CONSOLE from global to per-domain > > Previously VIRQ_CONSOLE was a global VIRQ (VIRQ_GLOBAL type), meaning > only the hardware domain (or a domain explicitly set via > XEN_DOMCTL_set_virq_handler) could bind it. Any other domain attempting > to bind would fail with -EBUSY because get_global_virq_handler() would > return hwdom by default. > > This patch changes VIRQ_CONSOLE to VIRQ_DOMAIN type, allowing any domain > to bind it independently, similar to VIRQ_ARGO. The console notification > is now sent via send_guest_domain_virq() directly to the focus domain > rather than through send_global_virq(). > > Implications: > > 1. Guest kernels that previously called bind on VIRQ_CONSOLE blindly > will now succeed. Linux handles binding failure gracefully by falling > back to polling, so this should not cause regressions. > > 2. XEN_DOMCTL_set_virq_handler can no longer be used with VIRQ_CONSOLE. > The domctl explicitly rejects non-VIRQ_GLOBAL types. This means > toolstacks that relied on set_virq_handler to delegate console handling > to a separate console domain will need to use a different mechanism. > Note: No known in-tree toolstack uses set_virq_handler with VIRQ_CONSOLE. XAPI at the very least would want checking here, imo. > 3. VIRQ_DOMAIN bindings are not subject to XSM checks beyond the > standard event channel allocation policy. Access control for console > input is enforced via the per-domain console->input_allowed flag, > which is set for: > - The hardware domain (by default in domain_create()) > - dom0less domains on ARM (in construct_domU()) > - The PV shim domain on x86 (in pv_shim_setup_dom()) > - Domains with vpl011 using the Xen backend (in domain_vpl011_init()) Daniel, can you please take a look from (conceptual) XSM/Flask perspective? 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> > > + return 0; > > > +} > > > > > I think this function is reachable even when nested virt is not > > enabled: > > > > vmx_msr_read_intercept() -> case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC -> nvmx_msr_read_intercept() > > > > I'm also confused about why the function returns 0 instead of an error > > when !nestedhvm_enabled(). We should probably make it return -ENODEV > > when nested virt is not available or enabled. Oh, I see. The return type of that function is weird. It should be adjusted to bool (not that you need to do it here). > I agree on the way of thinking but if we return zero it will goto gp_fault. > So I'll just remove ASSERT_UNREACHABLE. Ack. > > > > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > > > + unsigned int exit_reason) > > > +{ > > > + ASSERT_UNREACHABLE(); > > > + return 0; > > > +} > > > > Same here, I think this is likely reachable from vmx_vmexit_handler(), > > and shouldn't assert? > > > > It should also do something like: > > > > hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > > return X86EMUL_EXCEPTION; > > > > So it mimics what the function itself does when !nestedhvm_enabled(). > > hvm_inject_hw_exception cannot be easily called here because it is not > available at this point in the header. But actually this function should > be unreachable because when !CONFIG_NESTED_VIRT, CR4.VMXE is not > a valid guest CR4 bit, so nested VMX instructions should cause #UD? I'm not sure about nvmx_handle_vmx_insn() being unreachable when CR4.VMXE is not set, the Intel SDM states: "26.1.2 Instructions That Cause VM Exits Unconditionally The following instructions cause VM exits when they are executed in VMX non-root operation: CPUID, GETSEC,1 INVD, and XSETBV. This is also true of instructions introduced with VMX, which include: INVEPT, INVVPID, VMCALL,2 VMCLEAR, VMLAUNCH, VMPTRLD, VMPTRST, VMRESUME, VMXOFF, and VMXON." My reading is that regardless of the value of CR4.VMXE the execution of VMX instructions will cause a VMEXIT, and it's the hypervisor task to figure out what to do. > > I changed it to: > > ASSERT_UNREACHABLE(); > return X86EMUL_EXCEPTION; If the above is correct, the ASSERT_UNREACHABLE() is reachable. Returning X86EMUL_EXCEPTION without actually having injected the exception will result in a loop I think, as vmx_vmexit_handler() will resume guest execution without having advanced the instruction pointer, and without having injected an exception, and hence another VMEXIT will trigger. IMO the best way to solve this is to make vmx_vmexit_handler() inject #UD when nvmx_handle_vmx_insn() returns X86EMUL_EXCEPTION. You will need to then also adjust the non-stub version of nvmx_handle_vmx_insn(), so it doesn't inject #UD itself. Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 78Q1WjxTpNeaOQvNnZxFFRBgdgP7OMDCV6rTCyGKlgLaJLB0lOI6KO7sPVbAZW99k1NaoUL6HthZJSw5gzU8sKKTHe1KLaGVhYZo1iqP1bLXxnehvkzcUc3ngy7SMGtNQVvo7DrsCurpn47nAh8CuambE0VzF7u9yWsxHx+8c7CaUJEmHuxWBNC6FTERpIZkuAPMPEUpCXuDrLTgUG1oqiOoMDpXmL0jhFYasovx7i7ReAH0LtqD7mlOBxR7p/8UmjU82Wqw7jk0SGb6XRk/J4NeMVQ5vayEU/rYDRwP7fNlVnMg5xUUd8S6/5Mng7Smk5/pqfw8BX3EQyuSw/5CdcvOp9Va8QaRCD7iqQkWblDp3Xc/CCnJzCyNoFQqpSaQ7KO2L3RZHnzN2QN3ZG89ExdgmwJA1aS4UuHOWiOAV1g4I0YlR36cqoH+pw9IiZWN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 09:18:11.9731 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 20c6039c-2150-4ca9-4abf-08de6d3c4ec2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9343 On 06/02/2026 10:01, Harry Ramsey wrote: > Add a new device tree property `v8r_el1_msa` to enable/disable the This reads as if it was on/off option. I think it's better to say "to select the MSA (memory system architecture) at EL1 i.e. MPU(default) or MMU. > PMSAv8-64 translation regime at EL1. > > Signed-off-by: Harry Ramsey > --- > docs/misc/arm/device-tree/booting.txt | 11 +++++++++++ > xen/arch/arm/dom0less-build.c | 25 +++++++++++++++++++++++++ > xen/arch/arm/domain.c | 16 ++++++++++++++++ > xen/arch/arm/include/asm/domain.h | 9 +++++++++ > xen/include/public/arch-arm.h | 4 ++++ > 5 files changed, 65 insertions(+) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 977b428608..431d285b6e 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -322,6 +322,17 @@ with the following properties: > Should be used together with scmi-smc-passthrough Xen command line > option. > > +- v8r_el1_msa > + > + A string property specifying whether, on Armv8-R aarch64 systems, a domain > + should use PMSAv8-64 (MPU) at EL1 or VMSAv8-64 (MMU) at EL1. > + > + - "mmu" > + Enables VMSAv8-64 at EL1. You should mention that it might not be supported by hardware though. > + > + - "mpu" > + Enables PMSAv8-64 at EL1. You should mention that mpu is a default. > + > Under the "xen,domain" compatible node, one or more sub-nodes are present > for the DomU kernel and ramdisk. > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 4181c10538..41f538fb50 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -315,6 +315,7 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > struct xen_domctl_createdomain *d_cfg = &bd->create_cfg; > unsigned int flags = bd->create_flags; > uint32_t val; > + const char *v8r_el1_msa; > > d_cfg->arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE; > d_cfg->flags |= XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap; > @@ -322,6 +323,30 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > if ( domu_dt_sci_parse(node, d_cfg) ) > panic("Error getting SCI configuration\n"); > > + if (!dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa)) > + { > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + if ( !strcmp(v8r_el1_msa, "mmu") ) > + { > + if ( system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT ) > + panic("Platform does not support VMSA at EL1 (v8r_el1_msa)\n"); > + d_cfg->arch.v8r_el1_msa = MPU_EL1_VMSA; > + } > + else if ( !strcmp(v8r_el1_msa, "mpu") ) > + { > + d_cfg->arch.v8r_el1_msa = MPU_EL1_PMSA; > + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > + panic("PMSA is not valid for domain without static allocation" > + " and direct map (v8r_el1_msa)\n"); > + } > + else > + panic("Invalid device tree option for v8r_el1_msa\n"); > +#else > + panic("'v8r_el1_msa' property requires CONFIG_MPU and CONFIG_ARM_64 to " > + "be selected\n"); Please don't split printk messages > +#endif > + } > + > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) > { > int vpl011_virq = GUEST_VPL011_SPI; > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 2eca2b913d..fc4c7ae734 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -35,6 +35,18 @@ > > DEFINE_PER_CPU(struct vcpu *, curr_vcpu); > > +/* If this domain should use PMSAv8-64 translation regime (MPU) at EL1. */ > +static inline bool is_mpu_domain(struct domain *d) > +{ > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) I think Ayan's request to make this property generic to avoid ifdefery makes sense. There is a lot of #if/#else blocks. This property/variables would simply have a single field for Arm32. Also, you could perhaps make it enum and then protect VMSA option with Arm64. > + return d->arch.v8r_el1_msa == MPU_EL1_PMSA; > +#elif defined(CONFIG_MPU) > + return true; > +#else > + return false; > +#endif > +} > + > static void do_idle(void) > { > unsigned int cpu = smp_processor_id(); > @@ -731,6 +743,10 @@ int arch_domain_create(struct domain *d, > if ( (rc = sci_domain_init(d, config)) != 0 ) > goto fail; > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; > +#endif > + > return 0; > > fail: > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h > index 758ad807e4..1387adc0e9 100644 > --- a/xen/arch/arm/include/asm/domain.h > +++ b/xen/arch/arm/include/asm/domain.h > @@ -29,6 +29,11 @@ enum domain_type { > #define is_64bit_domain(d) (0) > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) I don't think it makes sense to protect macros. For me, it just results in additional churn. > +#define MPU_EL1_PMSA 0 > +#define MPU_EL1_VMSA 1 > +#endif > + > /* > * Is the domain using the host memory layout? > * > @@ -126,6 +131,10 @@ struct arch_domain > void *sci_data; > #endif > > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + uint8_t v8r_el1_msa; > +#endif > + > } __cacheline_aligned; > > struct arch_vcpu > diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h > index cd563cf706..0ef445a273 100644 > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -355,6 +355,10 @@ struct xen_arch_domainconfig { > uint32_t clock_frequency; > /* IN */ > uint8_t arm_sci_type; > +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > + /* IN */ > + uint8_t v8r_el1_msa; > +#endif > }; > #endif /* __XEN__ || __XEN_TOOLS__ */ > ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 16 09:21:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 09:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233828.1537181 (Exim 4.92) (envelope-from ) id 1vrunP-0002j7-Hp; Mon, 16 Feb 2026 09:21:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233828.1537181; Mon, 16 Feb 2026 09:21:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrunP-0002j0-Ez; Mon, 16 Feb 2026 09:21:35 +0000 Received: by outflank-mailman (input) for mailman id 1233828; Mon, 16 Feb 2026 09:21:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrunO-0002iu-UU for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 09:21:34 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e0b18583-0b18-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 10:21:30 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-43622089851so2708747f8f.3 for ; Mon, 16 Feb 2026 01:21:30 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 01:21:29 -0800 (PST) Message-ID: <3bbc408d-d16d-473e-81bf-6ea1f78290af@suse.com> Date: Mon, 16 Feb 2026 10:21:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: smccc: Preserve argument types in v1.1 SMC To: Bertrand Marquis Cc: Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , xen-devel@lists.xenproject.org, Andrew Cooper References: <0e2ba0af683fa5e53a3d2b4b625703751cf7ce54.1771228001.git.bertrand.marquis@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0e2ba0af683fa5e53a3d2b4b625703751cf7ce54.1771228001.git.bertrand.marquis@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 08:47, Bertrand Marquis wrote: > The SMCCC v1.1 inline helper currently forces a1-a4 into > unsigned long and uses in/out constraints for r0-r3. In > contrast, a5-a7 are passed with their original types via > read-only constraints. On arm64 this means a 32-bit signed > value in a1-a4 is converted to a 64-bit unsigned value, while > the same value in a5-a7 keeps its signed 32-bit form. For > example, a negative int in a2 is widened to unsigned long, but > a negative int in a5 is passed as a 32-bit signed value, so the > SMC sees different encodings depending on argument position. > > Switch the helper to use typed input registers arg0-arg7 > derived from the call arguments (keeping a0 cast to u32) and > separate output registers r0-r3. This preserves argument types > consistently across all positions. Argument evaluation order > is unchanged, so we do not reintroduce the issue fixed in > "e00dc325bd9e" ("xen/arm: smccc-1.1: Handle function result as > parameters"). > > This also aligns Xen's SMCCC parameter handling with Linux's type- > preserving behavior (same externally visible argument handling, > independent implementation) to avoid surprising differences > between a1-a4 and a5-a7. > > Current callers (PSCI, SCMI, platform SMC pass-through, OP-TEE, > and exynos5) pass unsigned values; exynos5 passes an int CPU id > which should always be > 0. Reported-by: Andrew ? > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/include/asm/smccc.h | 69 +++++++++++++------------------- > 1 file changed, 27 insertions(+), 42 deletions(-) > > diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h > index 441b3ab65dee..5b30dd57b69d 100644 > --- a/xen/arch/arm/include/asm/smccc.h > +++ b/xen/arch/arm/include/asm/smccc.h > @@ -99,87 +99,68 @@ struct arm_smccc_res { > #define __count_args(...) \ > ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) > > -#define __constraint_write_0 \ > - "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3) > -#define __constraint_write_1 \ > - "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3) > -#define __constraint_write_2 \ > - "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3) > -#define __constraint_write_3 \ > - "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3) > -#define __constraint_write_4 __constraint_write_3 > -#define __constraint_write_5 __constraint_write_4 > -#define __constraint_write_6 __constraint_write_5 > -#define __constraint_write_7 __constraint_write_6 > - > -#define __constraint_read_0 > -#define __constraint_read_1 > -#define __constraint_read_2 > -#define __constraint_read_3 > -#define __constraint_read_4 "r" (r4) > -#define __constraint_read_5 __constraint_read_4, "r" (r5) > -#define __constraint_read_6 __constraint_read_5, "r" (r6) > -#define __constraint_read_7 __constraint_read_6, "r" (r7) > +#define __constraint_read_0 "r" (arg0) > +#define __constraint_read_1 __constraint_read_0, "r" (arg1) > +#define __constraint_read_2 __constraint_read_1, "r" (arg2) > +#define __constraint_read_3 __constraint_read_2, "r" (arg3) > +#define __constraint_read_4 __constraint_read_3, "r" (arg4) > +#define __constraint_read_5 __constraint_read_4, "r" (arg5) > +#define __constraint_read_6 __constraint_read_5, "r" (arg6) > +#define __constraint_read_7 __constraint_read_6, "r" (arg7) > > #define __declare_arg_0(a0, res) \ > struct arm_smccc_res *___res = (res); \ > - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ > - register unsigned long r1 ASM_REG(1); \ > - register unsigned long r2 ASM_REG(2); \ > - register unsigned long r3 ASM_REG(3) > + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) > > #define __declare_arg_1(a0, a1, res) \ > typeof(a1) __a1 = (a1); \ > struct arm_smccc_res *___res = (res); \ > - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ > - register unsigned long r1 ASM_REG(1) = __a1; \ > - register unsigned long r2 ASM_REG(2); \ > - register unsigned long r3 ASM_REG(3) > + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ > + register typeof(a1) arg1 ASM_REG(1) = __a1 Is it intentional that you switch to typeof() rather than directly going to auto? This was it'll be more churn, aiui. And if deliberately going only half a step, perhaps worth saying so in the description? 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Mon, 16 Feb 2026 01:27:49 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 10:27:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Cannot boot PVH dom0 with big initrd To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <440f94be-77c0-4b28-b107-6efc3623a92f@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 21:40, Roger Pau Monné wrote: > @@ -336,14 +344,28 @@ unsigned long __init dom0_compute_nr_pages( > { > nodeid_t node; > unsigned long avail = 0, nr_pages, min_pages, max_pages, iommu_pages = 0; > + unsigned long init_images = 0; > > /* The ordering of operands is to work around a clang5 issue. */ > if ( CONFIG_DOM0_MEM[0] && !dom0_mem_set ) > parse_dom0_mem(CONFIG_DOM0_MEM); > > for_each_node_mask ( node, dom0_nodes ) > - avail += avail_domheap_pages_region(node, 0, 0) + > - initial_images_nrpages(node); > + { > + avail += avail_domheap_pages_region(node, 0, 0); > + init_images += initial_images_nrpages(node); > + } > + > + if ( is_pv_domain(d) ) > + { > + /* > + * For PV domains the initrd pages are directly assigned to the > + * guest, and hence the initrd size counts as free memory that can > + * be used by the domain. Set to 0 to prevent further adjustments. > + */ > + avail += init_images; > + init_images = 0; > + } Just to mention: It's still only "may be directly assigned", because of the PV32 special requirements. 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b=jWSs4LMwH9kJVuNv5QtOUlZoQYCdHvs9Aq7NuW2QjPu1Sl+xpfZ2rdPgMQVMm+2PjQrH3Z6aOFtkjtJpTS4RE4M5PrheGUMsHYiiR3ElHV3iM6PkdpyWFgVgsivb2rhcIUN+/lC0BTsruoVMaK0mKfuX3TDLTTcwXQRmxrASDg8= From: Bertrand Marquis To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] xen/arm: smccc: Preserve argument types in v1.1 SMC Thread-Topic: [PATCH] xen/arm: smccc: Preserve argument types in v1.1 SMC Thread-Index: AQHcnxiN7299tnoecUy3OIetO+v/gLWFDRSAgAACvYA= Date: Mon, 16 Feb 2026 09:31:29 +0000 Message-ID: References: <0e2ba0af683fa5e53a3d2b4b625703751cf7ce54.1771228001.git.bertrand.marquis@arm.com> <3bbc408d-d16d-473e-81bf-6ea1f78290af@suse.com> In-Reply-To: <3bbc408d-d16d-473e-81bf-6ea1f78290af@suse.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3864.300.41.1.7) Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ssAQTnmYMznKWSekvwBEVhembZgc58lYcw4TrSE65QxxuOhxNtQBQFpbClIbqG7cM/1EJVHpjzuamdG+/lVVycUqNn1z3mKrpWQ0sr8i9tYSVeRBKRO6hhNq1l/v1PqOXHyMw+wJ0MPd0NPo49Ry2AOQqTx9hwqkvUEhXiSazkrv4My1+O/YfJHazw6xary6l68fyHJgVyVCH9sz84uuhNbS4sTKLvnb8dsh1pQA7WjiJQYodQWtbFE0ptsHbQSIu+uTyD4YVGt3hRMKrlVrtTi9OiYWGzlNeiO27MCkkR0gvcNX/9ZbE/XAqYaI/WN1b5UyuaPClMmsuAamOABn+IbZsYguTYFkhNvHOk62BH51Y+VPoNVah2xAUYfQaam4a4xj09BeNoiBbzrgIoWB2PubwnJmRnDDNgc+ETVsIISp5TMAY8deClGy4Z1uQvRY X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 09:32:33.0171 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6670964-5c70-4498-1d43-08de6d3e5006 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A792.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9024 Hi Jan, > On 16 Feb 2026, at 10:21, Jan Beulich wrote: >=20 > On 16.02.2026 08:47, Bertrand Marquis wrote: >> The SMCCC v1.1 inline helper currently forces a1-a4 into >> unsigned long and uses in/out constraints for r0-r3. In >> contrast, a5-a7 are passed with their original types via >> read-only constraints. On arm64 this means a 32-bit signed >> value in a1-a4 is converted to a 64-bit unsigned value, while >> the same value in a5-a7 keeps its signed 32-bit form. For >> example, a negative int in a2 is widened to unsigned long, but >> a negative int in a5 is passed as a 32-bit signed value, so the >> SMC sees different encodings depending on argument position. >>=20 >> Switch the helper to use typed input registers arg0-arg7 >> derived from the call arguments (keeping a0 cast to u32) and >> separate output registers r0-r3. This preserves argument types >> consistently across all positions. Argument evaluation order >> is unchanged, so we do not reintroduce the issue fixed in >> "e00dc325bd9e" ("xen/arm: smccc-1.1: Handle function result as >> parameters"). >>=20 >> This also aligns Xen's SMCCC parameter handling with Linux's type- >> preserving behavior (same externally visible argument handling, >> independent implementation) to avoid surprising differences >> between a1-a4 and a5-a7. >>=20 >> Current callers (PSCI, SCMI, platform SMC pass-through, OP-TEE, >> and exynos5) pass unsigned values; exynos5 passes an int CPU id >> which should always be > 0. >=20 > Reported-by: Andrew ? Ack, sorry forgot that. >=20 >> Signed-off-by: Bertrand Marquis >> --- >> xen/arch/arm/include/asm/smccc.h | 69 +++++++++++++------------------- >> 1 file changed, 27 insertions(+), 42 deletions(-) >>=20 >> diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm= /smccc.h >> index 441b3ab65dee..5b30dd57b69d 100644 >> --- a/xen/arch/arm/include/asm/smccc.h >> +++ b/xen/arch/arm/include/asm/smccc.h >> @@ -99,87 +99,68 @@ struct arm_smccc_res { >> #define __count_args(...) \ >> ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) >>=20 >> -#define __constraint_write_0 \ >> - "+r" (r0), "=3D&r" (r1), "=3D&r" (r2), "=3D&r" (r3) >> -#define __constraint_write_1 \ >> - "+r" (r0), "+r" (r1), "=3D&r" (r2), "=3D&r" (r3) >> -#define __constraint_write_2 \ >> - "+r" (r0), "+r" (r1), "+r" (r2), "=3D&r" (r3) >> -#define __constraint_write_3 \ >> - "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3) >> -#define __constraint_write_4 __constraint_write_3 >> -#define __constraint_write_5 __constraint_write_4 >> -#define __constraint_write_6 __constraint_write_5 >> -#define __constraint_write_7 __constraint_write_6 >> - >> -#define __constraint_read_0 >> -#define __constraint_read_1 >> -#define __constraint_read_2 >> -#define __constraint_read_3 >> -#define __constraint_read_4 "r" (r4) >> -#define __constraint_read_5 __constraint_read_4, "r" (r5) >> -#define __constraint_read_6 __constraint_read_5, "r" (r6) >> -#define __constraint_read_7 __constraint_read_6, "r" (r7) >> +#define __constraint_read_0 "r" (arg0) >> +#define __constraint_read_1 __constraint_read_0, "r" (arg1) >> +#define __constraint_read_2 __constraint_read_1, "r" (arg2) >> +#define __constraint_read_3 __constraint_read_2, "r" (arg3) >> +#define __constraint_read_4 __constraint_read_3, "r" (arg4) >> +#define __constraint_read_5 __constraint_read_4, "r" (arg5) >> +#define __constraint_read_6 __constraint_read_5, "r" (arg6) >> +#define __constraint_read_7 __constraint_read_6, "r" (arg7) >>=20 >> #define __declare_arg_0(a0, res) \ >> struct arm_smccc_res *___res =3D (res); \ >> - register unsigned long r0 ASM_REG(0) =3D (uint32_t)(a0); \ >> - register unsigned long r1 ASM_REG(1); \ >> - register unsigned long r2 ASM_REG(2); \ >> - register unsigned long r3 ASM_REG(3) >> + register unsigned long arg0 ASM_REG(0) =3D (uint32_t)(a0) >>=20 >> #define __declare_arg_1(a0, a1, res) \ >> typeof(a1) __a1 =3D (a1); \ >> struct arm_smccc_res *___res =3D (res); \ >> - register unsigned long r0 ASM_REG(0) =3D (uint32_t)(a0); \ >> - register unsigned long r1 ASM_REG(1) =3D __a1; \ >> - register unsigned long r2 ASM_REG(2); \ >> - register unsigned long r3 ASM_REG(3) >> + register unsigned long arg0 ASM_REG(0) =3D (uint32_t)(a0);\ >> + register typeof(a1) arg1 ASM_REG(1) =3D __a1 >=20 > Is it intentional that you switch to typeof() rather than directly going > to auto? This was it'll be more churn, aiui. And if deliberately going > only half a step, perhaps worth saying so in the description? >=20 Yes it is because Andrew wants to rebase his serie on top of this patch. Cheers Bertrand > Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 09:55:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 09:55:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233859.1537212 (Exim 4.92) (envelope-from ) id 1vrvJQ-00087k-GI; Mon, 16 Feb 2026 09:54:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233859.1537212; Mon, 16 Feb 2026 09:54:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvJQ-00087d-D2; Mon, 16 Feb 2026 09:54:40 +0000 Received: by outflank-mailman (input) for mailman id 1233859; Mon, 16 Feb 2026 09:54:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvJO-00087X-Vv for xen-devel@lists.xenproject.org; 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bh=MOEkKY7O4kDty90WtlMhZOeCTuXBczRlaaEvEXF0fcs=; b=RAOYxX7KeBNPvghe2EaJCSC2WhBN+ol0QuKxQpHcdjEdbWNQgSSyXNIoVA+BKxMD8ij3PFFO81sQPVwHbsfvVvwSFHByn1V7xBzl7GyznQxJVH349MlrSwUttgee1FefRMozURcWcrxdwBjz7sL/QuI5VPxltyYtihPvsbpjet8= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: <25d4cf76-a71a-481c-8278-db400e4ae5d0@amd.com> Date: Mon, 16 Feb 2026 10:54:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] arm/mpu: Implement p2m tables To: Harry Ramsey , CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260206090155.68466-1-harry.ramsey@arm.com> <20260206090155.68466-4-harry.ramsey@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260206090155.68466-4-harry.ramsey@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vFJfX9kkr2vmHgYuNjrqY9avieSjuWzLZEsXXm3FNd9KuUsSCu5axOzCKmK8jG+FonxGArtAcDa0tZ8YoAJWLiD0/zfcDtQElFoq9v97Trve2m857sW7ZpcAL5meaF06EFoHSAlZEwhGfRLTYOV4I1iTzuQLOq0uKLLHDLScBVhpJT6cfBlvy8nk7hrJiCL4oONRvJZpOjem+WXta6eMC7aK54Jg36r0vJlG730o6wkDy9K/v3SMmNfXTgZgHw9oHaAdng0VbKg6J7Lza76SXVyE7cX9FA/2ebvmvzWafxEeD8I4cYdV9DJsVuVsM2VGMRZwOdxB1QrWQ132Z6PHv9eDAC0EJN3nnpl+cADSwPlWSEmBib8gOUlcasTPldNA4j1Pp9RUG/rLgeCjys9JX7ugF+ZkknU9FDThI6JJUKfEOKnn6vpw9PelxOS9dEo9 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 09:54:31.2740 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8349255f-e68c-4ffb-6a65-08de6d4161bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B078.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7808 On 06/02/2026 10:01, Harry Ramsey wrote: > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. Additionally implement a helper function `generate_vsctlr` for > p2m initalization. This means you know you will call it more than once in the future? > > Signed-off-by: Harry Ramsey > --- > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu.h | 5 ++ > xen/arch/arm/mpu/p2m.c | 71 ++++++++++++++++++++++++++-- > 4 files changed, 77 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 2cf0f8cbac..d565230f84 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -11,6 +11,8 @@ > */ > #define MPU_REGION_RES0 0x0 > > +#define VSCTLR_VMID_SHIFT 16 > + > /* Hypervisor Protection Region Base Address Register */ > typedef union { > struct { > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index 4f694190a8..8b86a03fee 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -7,6 +7,8 @@ > > #define MPU_REGION_RES0 (0xFFFFULL << 48) > > +#define VSCTLR_VMID_SHIFT 48 > + > /* Protection Region Base Address Register */ > typedef union { > struct __packed { > diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h > index 72fa5b00b8..4ae583a7e9 100644 > --- a/xen/arch/arm/include/asm/mpu.h > +++ b/xen/arch/arm/include/asm/mpu.h > @@ -87,6 +87,11 @@ static inline bool region_is_valid(const pr_t *pr) > return pr->prlar.reg.en; > } > > +static inline register_t generate_vsctlr(uint16_t vmid) > +{ > + return ((register_t)vmid << VSCTLR_VMID_SHIFT); > +} > + > #endif /* __ASSEMBLER__ */ > > #endif /* __ARM_MPU_H__ */ > diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c > index f7fb58ab6a..1598f9ab64 100644 > --- a/xen/arch/arm/mpu/p2m.c > +++ b/xen/arch/arm/mpu/p2m.c > @@ -28,10 +28,62 @@ void p2m_dump_info(struct domain *d) > BUG_ON("unimplemented"); > } > > +static int __init p2m_alloc_table(struct domain *d) Why __init? > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + pr_t* p2m_map; > + > + p2m_map = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); Why not assigning to p2m->root right away? > + if ( !p2m_map ) > + { > + printk(XENLOG_G_ERR "DOM%pd: p2m: unable to allocate P2M MPU mapping table\n", d); No need for DOM. %pd already gives d prefix like d0 > + return -ENOMEM; > + } > + clear_page(p2m_map); P2M_ROOT_ORDER can be 1, meaning 2 pages. Here you only clear one. > + > + p2m->root = virt_to_page((const void *)p2m_map); > + > + return 0; > +} > + > int p2m_init(struct domain *d) > { > - BUG_ON("unimplemented"); > - return -EINVAL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + int rc = 0; > + unsigned int cpu; > + > + rwlock_init(&p2m->lock); > + > + p2m->vmid = INVALID_VMID; > + p2m->max_mapped_gfn = _gfn(0); > + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); > + > + p2m->default_access = p2m_access_rwx; > + /* mem_access is NOT supported in MPU system. */ > + p2m->mem_access_enabled = false; > + > + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ > + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); Why there is no check for INVALID_VCPU_ID? > + > + for_each_possible_cpu(cpu) > + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; Fix indentation - 4 spaces, not 3 > + > + /* > + * "Trivial" initialization is now complete. Set the backpointer so that > + * p2m_teardown() and related functions know to do something. > + */ > + p2m->domain = d; > + > + rc = p2m_alloc_vmid(d); > + if ( rc ) > + return rc; Please add empty line here > + p2m->vsctlr = generate_vsctlr(p2m->vmid); > + > + rc = p2m_alloc_table(d); > + if ( rc ) > + return rc; > + > + return rc; Please, simplify return: return p2m_alloc_table(d); > } > > void p2m_save_state(struct vcpu *p) > @@ -46,7 +98,20 @@ void p2m_restore_state(struct vcpu *n) > > void p2m_final_teardown(struct domain *d) > { > - BUG_ON("unimplemented"); > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + > + /* p2m not actually initialized */ > + if ( !p2m->domain ) > + return; > + > + if ( p2m->root ) > + free_xenheap_pages(p2m->root, P2M_ROOT_ORDER); free_xenheap_pages as oppose to free_domheap_pages expects vaddr, not page pointer. > + > + p2m->root = NULL; > + > + p2m_free_vmid(d); > + > + p2m->domain = NULL; > } > > bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:00:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:00:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233867.1537222 (Exim 4.92) (envelope-from ) id 1vrvOq-0001Ti-2E; Mon, 16 Feb 2026 10:00:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233867.1537222; Mon, 16 Feb 2026 10:00:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvOp-0001Tb-Vi; Mon, 16 Feb 2026 10:00:15 +0000 Received: by outflank-mailman (input) for mailman id 1233867; Mon, 16 Feb 2026 10:00:15 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvOp-0001TT-Ei for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 10:00:15 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 484bba0a-0b1e-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 11:00:11 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso35664175e9.0 for ; Mon, 16 Feb 2026 02:00:11 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 02:00:10 -0800 (PST) Message-ID: <1c8b9400-ff2f-4ffc-bad7-9d44fa44fd81@suse.com> Date: Mon, 16 Feb 2026 11:00:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Stefano Stabellini Cc: roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 23:02, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default n) to allow nested virtualization > support to be disabled at build time. This is useful for embedded or > safety-focused deployments where nested virtualization is not needed, > reducing code size and attack surface. > > When CONFIG_NESTED_VIRT=n, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c > > Add inline stubs where needed in headers. Guard assembly code paths > for nested virt with #ifdef CONFIG_NESTED_VIRT. Move exception > injection for VMX/SVM instructions to the callers in vmx.c/svm.c to > avoid header dependency issues in the stubs. > > No functional change when CONFIG_NESTED_VIRT=y. > > Signed-off-by: Stefano Stabellini > > --- > Changes in v3: > - Kconfig: Change "depends on AMD_SVM || INTEL_VMX" to "depends on HVM" > - Kconfig: Remove redundant "default n" line > - Kconfig: Remove "If unsure, say N." from help text > - mm/hap/Makefile: Simplify using intermediate nested-y variable: > nested-y := nested_hap.o > nested-$(CONFIG_INTEL_VMX) += nested_ept.o > obj-$(CONFIG_NESTED_VIRT) += $(nested-y) > - svm/nestedhvm.h: Remove #ifdef CONFIG_NESTED_VIRT stubs, keep only > function declarations (the functions are only called from code that > is already compiled out when nested virt is disabled) > - svm/nestedhvm.h: Add CONFIG_NESTED_VIRT guard to nsvm_efer_svm_enabled > macro to return false when nested virt is disabled > - svm/svm.c: Move #UD injection for STGI/CLGI to the caller instead of > stub functions, checking nestedhvm_enabled()/nsvm_efer_svm_enabled() > - svm/svm.c: Mark svm_vmexit_do_vmrun/vmload/vmsave as __maybe_unused > - svm/svm.c: Remove empty nsvm_vcpu_switch stub (now guarded in asm) > - svm/entry.S: Add #ifdef CONFIG_NESTED_VIRT guards around nested virt > specific code paths > - vmx/vmx.c: Remove empty nvmx_switch_guest stub (now guarded in asm) > - vmx/vmx.c: Move nvmx_enqueue_n2_exceptions and nvmx_vmexit_event to > vvmx.c where they belong > - vmx/vvmx.h: Add declarations for nvmx_vmexit_event and > nvmx_enqueue_n2_exceptions > - vmx/vvmx.h: Fix nvmx_msr_read_intercept stub comment > - vmx/vvmx.h: nvmx_handle_vmx_insn stub returns X86EMUL_EXCEPTION with > ASSERT_UNREACHABLE (caller handles injection) > - vmx/vvmx.h: Convert get_vvmcs macro to inline function in stubs > - vmx/entry.S: Add #ifdef CONFIG_NESTED_VIRT guard around nvmx_switch_guest > - nestedhvm.h: Convert macro stubs to proper inline functions Oh, wow, that's an almost complete re-write? > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,11 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > > +config NESTED_VIRT > + bool "Nested virtualization support" > + depends on HVM > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. What's the last sentence about? HVM itself already requires hardware support, yet that's about it especially for VMX (where only HAP is the other requirement), isn't it? If this is about those advanced features, perhaps this would then want to be more specific? > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -24,7 +24,7 @@ > > /* True when l1 guest enabled SVM in EFER */ > #define nsvm_efer_svm_enabled(v) \ > - (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > + (IS_ENABLED(CONFIG_NESTED_VIRT) && ((v)->arch.hvm.guest_efer & EFER_SVME)) Constructs like these are on the edge: Yes, passing in an expression with a side effect isn't very likely here. Yet still, this being a widely visible macro, I wonder if it wouldn't better guarantee v to be evaluated exactly once. > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -2165,7 +2165,7 @@ static void svm_vmexit_do_pause(struct cpu_user_regs *regs) > vcpu_yield(); > } > > -static void > +static void __maybe_unused > svm_vmexit_do_vmrun(struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) > { > @@ -2211,7 +2211,7 @@ nsvm_get_nvmcb_page(struct vcpu *v, uint64_t vmcbaddr) > return page; > } > > -static void > +static void __maybe_unused > svm_vmexit_do_vmload(struct vmcb_struct *vmcb, > struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) > @@ -2246,7 +2246,7 @@ svm_vmexit_do_vmload(struct vmcb_struct *vmcb, > __update_guest_eip(regs, inst_len); > } > > -static void > +static void __maybe_unused > svm_vmexit_do_vmsave(struct vmcb_struct *vmcb, > struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) Why are these needed? The call sites don't go away afaics. If these are nevertheless needed, question is whether a suitable single #ifdef might not be tidier. > @@ -3011,10 +3013,16 @@ void asmlinkage svm_vmexit_handler(void) > svm_vmexit_do_vmsave(vmcb, regs, v, regs->rax); > break; > case VMEXIT_STGI: > - svm_vmexit_do_stgi(regs, v); > + if ( !nestedhvm_enabled(v->domain) ) > + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > + else > + svm_vmexit_do_stgi(regs, v); > break; > case VMEXIT_CLGI: > - svm_vmexit_do_clgi(regs, v); > + if ( !nsvm_efer_svm_enabled(v) ) > + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > + else > + svm_vmexit_do_clgi(regs, v); > break; These render respective checks in the functions themselves dead, which in particular means the bodies of those if()s there are then unreachable (a Misra violation of a rule we did accept). > @@ -2942,8 +2916,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .nhvm_vcpu_vmexit_event = nvmx_vmexit_event, > .nhvm_intr_blocked = nvmx_intr_blocked, > .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, > - .update_vlapic_mode = vmx_vlapic_msr_changed, I realize the = wasn't properly padded here, but ... > .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, > +#endif > + .update_vlapic_mode = vmx_vlapic_msr_changed, ... can you please to so while moving the line? > --- a/xen/arch/x86/hvm/vmx/vvmx.c > +++ b/xen/arch/x86/hvm/vmx/vvmx.c > @@ -2821,6 +2821,32 @@ void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int cr) > __vmwrite(read_shadow_field, v->arch.hvm.nvcpu.guest_cr[cr]); > } > > +void nvmx_enqueue_n2_exceptions(struct vcpu *v, > + unsigned long intr_fields, int error_code, uint8_t source) While moving, can obvious style issues please be addressed? Bad indentation here, ... > +{ > + struct nestedvmx *nvmx = &vcpu_2_nvmx(v); > + > + if ( !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) ) { ... misplaced brace here, and ... > + /* enqueue the exception till the VMCS switch back to L1 */ ... malformed comment here. > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -711,7 +711,7 @@ static inline bool hvm_altp2m_supported(void) > /* Returns true if we have the minimum hardware requirements for nested virt */ > static inline bool hvm_nested_virt_supported(void) > { > - return hvm_funcs.caps.nested_virt; > + return IS_ENABLED(CONFIG_NESTED_VIRT) && hvm_funcs.caps.nested_virt; > } Should the field itself perhaps become conditional? > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested_virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT In a reply to my comment on v1 (Or was it v2? This submission isn't tagged.), you referred me to the stub nestedhvm_hap_nested_page_fault() using the constant. However, why would that stub be needed when the sole call site of the function lives in a conditional using nestedhvm_enabled() (which is compile-time fales when NESTED_VIRT=n)? All you need to make sure is that the decl remains available. I then wonder for how many of the other stubs which might be the case as well. > @@ -199,5 +201,77 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga, > uint64_t *exit_qual, uint32_t *exit_reason); > int nvmx_cpu_up_prepare(unsigned int cpu); > void nvmx_cpu_dead(unsigned int cpu); > +int cf_check nvmx_vmexit_event(struct vcpu *v, const struct x86_event *event); > +void nvmx_enqueue_n2_exceptions(struct vcpu *v, > + unsigned long intr_fields, int error_code, uint8_t source); Nit: Bad indentation even copied here. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:07:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:07:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233879.1537232 (Exim 4.92) (envelope-from ) id 1vrvW6-0002Jq-UJ; Mon, 16 Feb 2026 10:07:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233879.1537232; Mon, 16 Feb 2026 10:07:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvW6-0002Jj-Qo; Mon, 16 Feb 2026 10:07:46 +0000 Received: by outflank-mailman (input) for mailman id 1233879; Mon, 16 Feb 2026 10:07:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvW5-0002Jb-NN for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 10:07:45 +0000 Received: from mail145-20.atl61.mandrillapp.com (mail145-20.atl61.mandrillapp.com [198.2.145.20]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5317b1a0-0b1f-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 11:07:40 +0100 (CET) Received: from pmta06.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail145-20.atl61.mandrillapp.com (Mailchimp) with ESMTP id 4fDz3Z1QMdzCf9KRq for ; Mon, 16 Feb 2026 10:07:38 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 049ca1a42eb34f78b13ecf3ea395e659; Mon, 16 Feb 2026 10:07:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5317b1a0-0b1f-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771236458; x=1771506458; bh=Lb0HJ4esRwdSgy7GSFwaHnP6y8gxW0LOU9R9teu79Xg=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Esl4p7Q5KVYOGUWFt8C4u0Klz8jW/5RS4KGnMIUdZ8T7d5eppuzozfntCC6I51+rd 3X/kuSf+Ht10c9H5MQu8mgMIpj6JE6aOCQJtXeiNoHQ7oEb+HgoM6K7tbEkPvAjpGs 0OJnHJXAwFDw1+GDMT8+hA11uxgCqREJVkhiAOl4oz9txuJUzLW1FnOD5CPzguWq8e GT+PostBFewIEWA5hOetWkxkb/OnGGHWiOAe22+SGN9AzXcDKXPXzET56w9pgBn7ux comdXvzw8x3mkxEpLSjIpfrwWlAMOOFZiTeFObP5lCkcp+KcKdW6ACHVkix6CQUXl0 x0NFXaK4EMy/w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771236458; x=1771496958; i=teddy.astie@vates.tech; bh=Lb0HJ4esRwdSgy7GSFwaHnP6y8gxW0LOU9R9teu79Xg=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=yUAgE9xhEOsYutouyMF8RuDxGDF4N3315SDjnay9j7+pzg8D3I3yNoIef9Z3LPDis mK9eJtmSm/8XiXO9jQyKCm90/+iBtMVAy9qaDfPms9EQ0DU7nUCTTsqUzgJQYp4Sp6 C77wXFt/4uPDEHnlKAeWw89lmhe5RLzSQHY9KYO3J5kfGZgEJmkNXHmF8qMkLrUlZB +ADP9GbCeHw4k4BSQsQJviEBw/hQIh2QFrRPP6KFLLGzIyPlk5U2kfLDhSAB33Ys9q aUFuJQKKFMGSRH8KwQWlNt0PXdxnGsDdTxwy8Xif7mC8o5oOB5GxZC+WCiLBRw7jFR JY5AWS3PGA6SQ== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v3=202/2]=20x86/svm:=20Use=20the=20virtual=20NMI=20when=20available?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771236456833 Message-Id: To: "Abdelkareem Abdelsaamad" , xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, "Jan Beulich" , "Jason Andryuk" References: In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.049ca1a42eb34f78b13ecf3ea395e659?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 10:07:38 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 15/02/2026 =C3=A0 19:24, Abdelkareem Abdelsaamad a =C3=A9crit=C2=A0: > With the Virtual NMI (vNMI), the pending NMI is simply stuffed into the V= MCB > and handed off to the hardware. There is no need for the artificial track= ing > of the NMI handling completion with the IRET instruction interception. > > Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardwa= re > accelerated feature when the AMD platform support the vNMI. > > Adjust the svm_get_interrupt_shadow to check if the vNMI is currently blo= cked > by servicing another in-progress NMI. > > Signed-off-by: Abdelkareem Abdelsaamad > --- > xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ > xen/arch/x86/hvm/svm/svm.c | 5 ++++- > xen/arch/x86/hvm/svm/vmcb.c | 2 ++ > 3 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c > index 6453a46b85..3e8959f155 100644 > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) > u32 general1_intercepts =3D vmcb_get_general1_intercepts(vmcb); > intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + if ( !vmcb->_vintr.fields.vnmi_pending && > + !vmcb->_vintr.fields.vnmi_blocking ) > + vmcb->_vintr.fields.vnmi_pending =3D 1; > + > + return; > + } > + I think you need to update the clearbit for tpr (related to vintr) for the hardware to know that you modified the vnmi_pending bit. This is done through vmcb_{get,set}_vintr in your case (this will also allow simplifying all the vmcb->_vintr). You need to do something like vintr_t intr =3D vmcb_get_vintr(vmcb); ... if ( intr.fields.vnmi_enable ) { if ( !intr.fields.vnmi_pending && !intr.vnmi_blocking ) { intr.fields.vnmi_pending =3D 1; vmcb_set_vintr(vmcb, intr); } return; } > event.raw =3D 0; > event.v =3D true; > event.type =3D X86_ET_NMI; > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..3dfdc18133 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -548,7 +548,9 @@ static unsigned cf_check int svm_get_interrupt_shadow= (struct vcpu *v) > if ( vmcb->int_stat.intr_shadow ) > intr_shadow |=3D HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI; > > - if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) > + if ( vmcb->_vintr.fields.vnmi_enable > + ? vmcb->_vintr.fields.vnmi_blocking > + : (vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET= ) ) > intr_shadow |=3D HVM_INTR_SHADOW_NMI; > > return intr_shadow; > @@ -2524,6 +2526,7 @@ const struct hvm_function_table * __init start_svm(= void) > P(cpu_has_tsc_ratio, "TSC Rate MSR"); > P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); > P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); > + P(cpu_has_svm_vnmi, "Virtual NMI"); > P(cpu_has_svm_bus_lock, "Bus Lock Filter"); > #undef P > > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c > index e583ef8548..e90bbac332 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) > if ( default_xen_spec_ctrl =3D=3D SPEC_CTRL_STIBP ) > v->arch.msrs->spec_ctrl.raw =3D SPEC_CTRL_STIBP; > > + vmcb->_vintr.fields.vnmi_enable =3D cpu_has_svm_vnmi; > + > return 0; > } > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:10:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:10:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233887.1537241 (Exim 4.92) (envelope-from ) id 1vrvYP-0003qo-96; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 15/02/2026 =C3=A0 19:24, Abdelkareem Abdelsaamad a =C3=A9crit=C2=A0: > Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD > platforms. The feature support is indicated by the CPUID > Fn8000_000A_EDX[25] =3D 1. > > Add defines for the three SVM's Virtual NMI (vNMI) managements bits in th= e > VMCB structure's vintr_t: > > vintr_t(11) - Virtual NMI is pending. > vintr_t(12) - Virtual NMI is masked. > vintr_t(26) - Enable NMI virtualization. > > Signed-off-by: Abdelkareem Abdelsaamad > --- > xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- > xen/arch/x86/include/asm/hvm/svm.h | 2 ++ > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h > index 69f6047394..047483db9a 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.h > +++ b/xen/arch/x86/hvm/svm/vmcb.h > @@ -336,13 +336,17 @@ typedef union > u64 tpr: 8; > u64 irq: 1; > u64 vgif: 1; > - u64 rsvd0: 6; > + u64 rsvd0: 1; > + u64 vnmi_pending: 1; > + u64 vnmi_blocking:1; > + u64: 3; > u64 prio: 4; > u64 ign_tpr: 1; > u64 rsvd1: 3; > u64 intr_masking: 1; > u64 vgif_enable: 1; > - u64 rsvd2: 6; > + u64 vnmi_enable: 1; > + u64 rsvd2: 5; > u64 vector: 8; > u64 rsvd3: 24; > } fields; > diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/as= m/hvm/svm.h > index 15f0268be7..a35a61273b 100644 > --- a/xen/arch/x86/include/asm/hvm/svm.h > +++ b/xen/arch/x86/include/asm/hvm/svm.h > @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; > #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ > #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ > #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ > +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ > #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ > > static inline bool cpu_has_svm_feature(unsigned int feat) > @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int fea= t) > #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE= ) > #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) > #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL= ) > +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) > #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) > > #define MSR_INTERCEPT_NONE 0 Reviewed-by: Teddy Astie -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:14:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:14:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233904.1537277 (Exim 4.92) (envelope-from ) id 1vrvcl-0004c5-1T; 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There is no need for the artificial tracking >> of the NMI handling completion with the IRET instruction interception. >> >> Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware >> accelerated feature when the AMD platform support the vNMI. >> >> Adjust the svm_get_interrupt_shadow to check if the vNMI is currently blocked >> by servicing another in-progress NMI. >> >> Signed-off-by: Abdelkareem Abdelsaamad >> --- >> xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ >> xen/arch/x86/hvm/svm/svm.c | 5 ++++- >> xen/arch/x86/hvm/svm/vmcb.c | 2 ++ >> 3 files changed, 15 insertions(+), 1 deletion(-) >> >> diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c >> index 6453a46b85..3e8959f155 100644 >> --- a/xen/arch/x86/hvm/svm/intr.c >> +++ b/xen/arch/x86/hvm/svm/intr.c >> @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) >> u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); >> intinfo_t event; >> >> + if ( vmcb->_vintr.fields.vnmi_enable ) >> + { >> + if ( !vmcb->_vintr.fields.vnmi_pending && >> + !vmcb->_vintr.fields.vnmi_blocking ) >> + vmcb->_vintr.fields.vnmi_pending = 1; >> + >> + return; >> + } >> + > I think you need to update the clearbit for tpr (related to vintr) for > the hardware to know that you modified the vnmi_pending bit. What makes you think this?  The APM states otherwise. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:16:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:16:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233911.1537286 (Exim 4.92) (envelope-from ) id 1vrve9-00056q-8V; Mon, 16 Feb 2026 10:16:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233911.1537286; Mon, 16 Feb 2026 10:16:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrve9-00056j-5O; Mon, 16 Feb 2026 10:16:05 +0000 Received: by outflank-mailman (input) for mailman id 1233911; Mon, 16 Feb 2026 10:16:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrve7-00056Y-U4 for xen-devel@lists.xenproject.org; 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> intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + if ( !vmcb->_vintr.fields.vnmi_pending && > + !vmcb->_vintr.fields.vnmi_blocking ) > + vmcb->_vintr.fields.vnmi_pending = 1; > + > + return; > + } So what happens to the NMI we're trying to inject when NMIs are currently blocked? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:28:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:28:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233925.1537296 (Exim 4.92) (envelope-from ) id 1vrvpo-0007H4-B7; Mon, 16 Feb 2026 10:28:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233925.1537296; Mon, 16 Feb 2026 10:28:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvpo-0007Gx-8K; Mon, 16 Feb 2026 10:28:08 +0000 Received: by outflank-mailman (input) for mailman id 1233925; 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Mon, 16 Feb 2026 02:28:04 -0800 (PST) Message-ID: <1a8c1f40-7b8f-4ffe-bc26-afc56261b92a@suse.com> Date: Mon, 16 Feb 2026 11:28:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] x86/svm: Add Enumerations for the SVM virtual NMI To: Abdelkareem Abdelsaamad Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Jason Andryuk , xen-devel@lists.xenproject.org References: <8b09eece639ba9cdff0d259e0941f7ef3dae7701.1771177081.git.abdelkareem.abdelsaamad@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8b09eece639ba9cdff0d259e0941f7ef3dae7701.1771177081.git.abdelkareem.abdelsaamad@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 15.02.2026 19:16, Abdelkareem Abdelsaamad wrote: > --- a/xen/arch/x86/hvm/svm/vmcb.h > +++ b/xen/arch/x86/hvm/svm/vmcb.h > @@ -336,13 +336,17 @@ typedef union > u64 tpr: 8; > u64 irq: 1; > u64 vgif: 1; > - u64 rsvd0: 6; > + u64 rsvd0: 1; > + u64 vnmi_pending: 1; > + u64 vnmi_blocking:1; > + u64: 3; Can we have a blank please ahead of the colon, to make it a little easier to actually notice? Further for both rsvd0 and ... > u64 prio: 4; > u64 ign_tpr: 1; > u64 rsvd1: 3; > u64 intr_masking: 1; > u64 vgif_enable: 1; > - u64 rsvd2: 6; > + u64 vnmi_enable: 1; > + u64 rsvd2: 5; > u64 vector: 8; > u64 rsvd3: 24; > } fields; ... rsvd2 (i.e. the ones you touch anyway) I wonder if their identifiers couldn't be dropped at this occasion as well. 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In >>> contrast, a5-a7 are passed with their original types via >>> read-only constraints. On arm64 this means a 32-bit signed >>> value in a1-a4 is converted to a 64-bit unsigned value, while >>> the same value in a5-a7 keeps its signed 32-bit form. For >>> example, a negative int in a2 is widened to unsigned long, but >>> a negative int in a5 is passed as a 32-bit signed value, so the >>> SMC sees different encodings depending on argument position. >>> >>> Switch the helper to use typed input registers arg0-arg7 >>> derived from the call arguments (keeping a0 cast to u32) and >>> separate output registers r0-r3. This preserves argument types >>> consistently across all positions. Argument evaluation order >>> is unchanged, so we do not reintroduce the issue fixed in >>> "e00dc325bd9e" ("xen/arm: smccc-1.1: Handle function result as >>> parameters"). >>> >>> This also aligns Xen's SMCCC parameter handling with Linux's type- >>> preserving behavior (same externally visible argument handling, >>> independent implementation) to avoid surprising differences >>> between a1-a4 and a5-a7. >>> >>> Current callers (PSCI, SCMI, platform SMC pass-through, OP-TEE, >>> and exynos5) pass unsigned values; exynos5 passes an int CPU id >>> which should always be > 0. >> Reported-by: Andrew ? > Ack, sorry forgot that. > >>> Signed-off-by: Bertrand Marquis >>> --- >>> xen/arch/arm/include/asm/smccc.h | 69 +++++++++++++------------------- >>> 1 file changed, 27 insertions(+), 42 deletions(-) >>> >>> diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h >>> index 441b3ab65dee..5b30dd57b69d 100644 >>> --- a/xen/arch/arm/include/asm/smccc.h >>> +++ b/xen/arch/arm/include/asm/smccc.h >>> @@ -99,87 +99,68 @@ struct arm_smccc_res { >>> #define __count_args(...) \ >>> ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) >>> >>> -#define __constraint_write_0 \ >>> - "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3) >>> -#define __constraint_write_1 \ >>> - "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3) >>> -#define __constraint_write_2 \ >>> - "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3) >>> -#define __constraint_write_3 \ >>> - "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3) >>> -#define __constraint_write_4 __constraint_write_3 >>> -#define __constraint_write_5 __constraint_write_4 >>> -#define __constraint_write_6 __constraint_write_5 >>> -#define __constraint_write_7 __constraint_write_6 >>> - >>> -#define __constraint_read_0 >>> -#define __constraint_read_1 >>> -#define __constraint_read_2 >>> -#define __constraint_read_3 >>> -#define __constraint_read_4 "r" (r4) >>> -#define __constraint_read_5 __constraint_read_4, "r" (r5) >>> -#define __constraint_read_6 __constraint_read_5, "r" (r6) >>> -#define __constraint_read_7 __constraint_read_6, "r" (r7) >>> +#define __constraint_read_0 "r" (arg0) >>> +#define __constraint_read_1 __constraint_read_0, "r" (arg1) >>> +#define __constraint_read_2 __constraint_read_1, "r" (arg2) >>> +#define __constraint_read_3 __constraint_read_2, "r" (arg3) >>> +#define __constraint_read_4 __constraint_read_3, "r" (arg4) >>> +#define __constraint_read_5 __constraint_read_4, "r" (arg5) >>> +#define __constraint_read_6 __constraint_read_5, "r" (arg6) >>> +#define __constraint_read_7 __constraint_read_6, "r" (arg7) >>> >>> #define __declare_arg_0(a0, res) \ >>> struct arm_smccc_res *___res = (res); \ >>> - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ >>> - register unsigned long r1 ASM_REG(1); \ >>> - register unsigned long r2 ASM_REG(2); \ >>> - register unsigned long r3 ASM_REG(3) >>> + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) >>> >>> #define __declare_arg_1(a0, a1, res) \ >>> typeof(a1) __a1 = (a1); \ >>> struct arm_smccc_res *___res = (res); \ >>> - register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \ >>> - register unsigned long r1 ASM_REG(1) = __a1; \ >>> - register unsigned long r2 ASM_REG(2); \ >>> - register unsigned long r3 ASM_REG(3) >>> + register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >>> + register typeof(a1) arg1 ASM_REG(1) = __a1 >> Is it intentional that you switch to typeof() rather than directly going >> to auto? This was it'll be more churn, aiui. And if deliberately going >> only half a step, perhaps worth saying so in the description? >> > Yes it is because Andrew wants to rebase his serie on top of this > patch. This patch potentially wants backporting, but even if it ends up not being, fixing the SMCCC types should not be mixed with the auto conversion; they're both subtle changes and unrelated. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:29:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:29:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233939.1537315 (Exim 4.92) (envelope-from ) id 1vrvrQ-0008HT-S4; Mon, 16 Feb 2026 10:29:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233939.1537315; Mon, 16 Feb 2026 10:29:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvrQ-0008HM-PW; Mon, 16 Feb 2026 10:29:48 +0000 Received: by outflank-mailman (input) for mailman id 1233939; Mon, 16 Feb 2026 10:29:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrvrP-0008HC-R7 for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 10:29:47 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 69bd20fd-0b22-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 11:29:45 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-48069a48629so28512715e9.0 for ; Mon, 16 Feb 2026 02:29:45 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 02:29:45 -0800 (PST) Message-ID: <6948e67b-09d1-4b2f-8c20-560420ebd3c3@suse.com> Date: Mon, 16 Feb 2026 11:29:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] x86/svm: Use the virtual NMI when available To: Abdelkareem Abdelsaamad Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, Jason Andryuk , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 15.02.2026 19:16, Abdelkareem Abdelsaamad wrote: > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) > u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); > intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + if ( !vmcb->_vintr.fields.vnmi_pending && > + !vmcb->_vintr.fields.vnmi_blocking ) > + vmcb->_vintr.fields.vnmi_pending = 1; Nit: Off-by-1 indentation, while ... > + return; ... interestingly this one's indented correctly. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: gzSuO+544Fa7+T57FywYeU27HVj0DfqeQBBJ4NPK5rQ08xgTBrnMkAoG5KVO1uA+G+W3dILq7r4NtmUirvRmlY1eEcxP3tmVoeDURUKXnHgJ6Ev+qZsnU6ADlHJlR8MP8qrcxY/ZrdbbSNZLn52AzznzxXa9OOPQsgDJ37b/YWtn+Y/D6+bmvRLEya3Yi9NzIeOIX0SU0FPJDTGLlOljuoAoLRx2jNCj9m9jpTo+m2NGIkpfWgnNWRBapLEzxzX250PWS7cBjHtreJACr+98RLWn6X98JPFR8bHennQXsew8jgeUILkqQQ7msdMsLdktdt6PxilUSNQEevpgLz1U1uc9usieRQecO51F9PJ5YCx3xoDNXugS2QVpLRNUxtffqTLMxp4Kr7RBMXYZX1kdYLgKxSNHM70d6RFlXAIto8qiHCY/JyKo5GdSE2fzR/m6 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 10:34:49.4141 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f35e570-dd71-4c2c-3525-08de6d47030d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV5PR12MB9803 On Fri Feb 13, 2026 at 11:02 PM CET, Stefano Stabellini wrote: > Introduce CONFIG_NESTED_VIRT (default n) to allow nested virtualization > support to be disabled at build time. This is useful for embedded or > safety-focused deployments where nested virtualization is not needed, > reducing code size and attack surface. > > When CONFIG_NESTED_VIRT=3Dn, the following source files are excluded: > - arch/x86/hvm/nestedhvm.c > - arch/x86/hvm/svm/nestedsvm.c > - arch/x86/hvm/vmx/vvmx.c > - arch/x86/mm/nested.c > - arch/x86/mm/hap/nested_hap.c > - arch/x86/mm/hap/nested_ept.c > > Add inline stubs where needed in headers. Guard assembly code paths > for nested virt with #ifdef CONFIG_NESTED_VIRT. Move exception > injection for VMX/SVM instructions to the callers in vmx.c/svm.c to > avoid header dependency issues in the stubs. > > No functional change when CONFIG_NESTED_VIRT=3Dy. > > Signed-off-by: Stefano Stabellini > > --- > Changes in v3: > - Kconfig: Change "depends on AMD_SVM || INTEL_VMX" to "depends on HVM" > - Kconfig: Remove redundant "default n" line > - Kconfig: Remove "If unsure, say N." from help text > - mm/hap/Makefile: Simplify using intermediate nested-y variable: > nested-y :=3D nested_hap.o > nested-$(CONFIG_INTEL_VMX) +=3D nested_ept.o > obj-$(CONFIG_NESTED_VIRT) +=3D $(nested-y) > - svm/nestedhvm.h: Remove #ifdef CONFIG_NESTED_VIRT stubs, keep only > function declarations (the functions are only called from code that > is already compiled out when nested virt is disabled) > - svm/nestedhvm.h: Add CONFIG_NESTED_VIRT guard to nsvm_efer_svm_enabled > macro to return false when nested virt is disabled > - svm/svm.c: Move #UD injection for STGI/CLGI to the caller instead of > stub functions, checking nestedhvm_enabled()/nsvm_efer_svm_enabled() > - svm/svm.c: Mark svm_vmexit_do_vmrun/vmload/vmsave as __maybe_unused > - svm/svm.c: Remove empty nsvm_vcpu_switch stub (now guarded in asm) > - svm/entry.S: Add #ifdef CONFIG_NESTED_VIRT guards around nested virt > specific code paths > - vmx/vmx.c: Remove empty nvmx_switch_guest stub (now guarded in asm) > - vmx/vmx.c: Move nvmx_enqueue_n2_exceptions and nvmx_vmexit_event to > vvmx.c where they belong > - vmx/vvmx.h: Add declarations for nvmx_vmexit_event and > nvmx_enqueue_n2_exceptions > - vmx/vvmx.h: Fix nvmx_msr_read_intercept stub comment > - vmx/vvmx.h: nvmx_handle_vmx_insn stub returns X86EMUL_EXCEPTION with > ASSERT_UNREACHABLE (caller handles injection) > - vmx/vvmx.h: Convert get_vvmcs macro to inline function in stubs > - vmx/entry.S: Add #ifdef CONFIG_NESTED_VIRT guard around nvmx_switch_gue= st > - nestedhvm.h: Convert macro stubs to proper inline functions > --- > xen/arch/x86/hvm/Kconfig | 7 +++ > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/Makefile | 2 +- > xen/arch/x86/hvm/svm/entry.S | 4 ++ > xen/arch/x86/hvm/svm/nestedhvm.h | 2 +- > xen/arch/x86/hvm/svm/svm.c | 18 ++++-- > xen/arch/x86/hvm/vmx/Makefile | 2 +- > xen/arch/x86/hvm/vmx/entry.S | 2 + > xen/arch/x86/hvm/vmx/vmx.c | 31 +--------- > xen/arch/x86/hvm/vmx/vvmx.c | 26 +++++++++ > xen/arch/x86/include/asm/hvm/hvm.h | 2 +- > xen/arch/x86/include/asm/hvm/nestedhvm.h | 64 +++++++++++++++++--- > xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 74 ++++++++++++++++++++++++ > xen/arch/x86/mm/Makefile | 2 +- > xen/arch/x86/mm/hap/Makefile | 5 +- > xen/arch/x86/mm/p2m.h | 6 ++ > xen/arch/x86/sysctl.c | 2 + > xen/include/public/sysctl.h | 4 +- > 18 files changed, 204 insertions(+), 51 deletions(-) > > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index f32bf5cbb7..af661385b5 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -92,4 +92,11 @@ config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > depends on INTEL_VMX > =20 > +config NESTED_VIRT > + bool "Nested virtualization support" > + depends on HVM > + help > + Enable nested virtualization, allowing guests to run their own > + hypervisors. This requires hardware support. nit: If we state above "allowing HVM guests..." rather than plain "guests" = we can then get rid of the "This requires hardware support line". What you probabl= y meant is that this is HVM-only and we don't allow PV nesting. "This requires hardware support" makes me (the user) think my hardware need= s something special to support nesting, when in reality I just need HVM suppo= rt. > + > endif > diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile > index f34fb03934..b8a0a68624 100644 > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -18,7 +18,7 @@ obj-y +=3D irq.o > obj-y +=3D mmio.o > obj-$(CONFIG_VM_EVENT) +=3D monitor.o > obj-y +=3D mtrr.o > -obj-y +=3D nestedhvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedhvm.o > obj-y +=3D pmtimer.o > obj-y +=3D quirks.o > obj-y +=3D rtc.o > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefil= e > index 8a072cafd5..92418e3444 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -2,6 +2,6 @@ obj-y +=3D asid.o > obj-y +=3D emulate.o > obj-bin-y +=3D entry.o > obj-y +=3D intr.o > -obj-y +=3D nestedsvm.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nestedsvm.o > obj-y +=3D svm.o > obj-y +=3D vmcb.o > diff --git a/xen/arch/x86/hvm/svm/entry.S b/xen/arch/x86/hvm/svm/entry.S > index af8db23b03..7964c80750 100644 > --- a/xen/arch/x86/hvm/svm/entry.S > +++ b/xen/arch/x86/hvm/svm/entry.S > @@ -28,7 +28,9 @@ FUNC(svm_asm_do_resume) > GET_CURRENT(bx) > .Lsvm_do_resume: > call svm_intr_assist > +#ifdef CONFIG_NESTED_VIRT > call nsvm_vcpu_switch > +#endif > ASSERT_NOT_IN_ATOMIC > =20 > mov VCPU_processor(%rbx),%eax > @@ -39,6 +41,7 @@ FUNC(svm_asm_do_resume) > cmp %ecx,(%rdx,%rax,1) > jne .Lsvm_process_softirqs > =20 > +#ifdef CONFIG_NESTED_VIRT > cmp %cl,VCPU_nsvm_hap_enabled(%rbx) > UNLIKELY_START(ne, nsvm_hap) > cmp %rcx,VCPU_nhvm_p2m(%rbx) > @@ -52,6 +55,7 @@ UNLIKELY_START(ne, nsvm_hap) > sti > jmp .Lsvm_do_resume > __UNLIKELY_END(nsvm_hap) > +#endif > =20 > call svm_vmenter_helper > =20 > diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nest= edhvm.h > index 9bfed5ffd7..5cb85410f8 100644 > --- a/xen/arch/x86/hvm/svm/nestedhvm.h > +++ b/xen/arch/x86/hvm/svm/nestedhvm.h > @@ -24,7 +24,7 @@ > =20 > /* True when l1 guest enabled SVM in EFER */ > #define nsvm_efer_svm_enabled(v) \ > - (!!((v)->arch.hvm.guest_efer & EFER_SVME)) > + (IS_ENABLED(CONFIG_NESTED_VIRT) && ((v)->arch.hvm.guest_efer & EFER_= SVME)) > =20 > int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr); > void nestedsvm_vmexit_defer(struct vcpu *v, > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..2cabc89fb5 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -2165,7 +2165,7 @@ static void svm_vmexit_do_pause(struct cpu_user_reg= s *regs) > vcpu_yield(); > } > =20 > -static void > +static void __maybe_unused > svm_vmexit_do_vmrun(struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) > { > @@ -2211,7 +2211,7 @@ nsvm_get_nvmcb_page(struct vcpu *v, uint64_t vmcbad= dr) > return page; > } > =20 > -static void > +static void __maybe_unused > svm_vmexit_do_vmload(struct vmcb_struct *vmcb, > struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) > @@ -2246,7 +2246,7 @@ svm_vmexit_do_vmload(struct vmcb_struct *vmcb, > __update_guest_eip(regs, inst_len); > } > =20 > -static void > +static void __maybe_unused > svm_vmexit_do_vmsave(struct vmcb_struct *vmcb, > struct cpu_user_regs *regs, > struct vcpu *v, uint64_t vmcbaddr) > @@ -2465,6 +2465,7 @@ static struct hvm_function_table __initdata_cf_clob= ber svm_function_table =3D { > .set_rdtsc_exiting =3D svm_set_rdtsc_exiting, > .get_insn_bytes =3D svm_get_insn_bytes, > =20 > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise =3D nsvm_vcpu_initialise, > .nhvm_vcpu_destroy =3D nsvm_vcpu_destroy, > .nhvm_vcpu_reset =3D nsvm_vcpu_reset, > @@ -2474,6 +2475,7 @@ static struct hvm_function_table __initdata_cf_clob= ber svm_function_table =3D { > .nhvm_vmcx_hap_enabled =3D nsvm_vmcb_hap_enabled, > .nhvm_intr_blocked =3D nsvm_intr_blocked, > .nhvm_hap_walk_L1_p2m =3D nsvm_hap_walk_L1_p2m, > +#endif > =20 > .get_reg =3D svm_get_reg, > .set_reg =3D svm_set_reg, > @@ -3011,10 +3013,16 @@ void asmlinkage svm_vmexit_handler(void) > svm_vmexit_do_vmsave(vmcb, regs, v, regs->rax); > break; > case VMEXIT_STGI: > - svm_vmexit_do_stgi(regs, v); > + if ( !nestedhvm_enabled(v->domain) ) > + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > + else > + svm_vmexit_do_stgi(regs, v); > break; > case VMEXIT_CLGI: > - svm_vmexit_do_clgi(regs, v); > + if ( !nsvm_efer_svm_enabled(v) ) > + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > + else > + svm_vmexit_do_clgi(regs, v); > break; nit: For readability I'd consider reversing the polarity and putting the en= abled cases in the first branch. > =20 > case VMEXIT_XSETBV: > diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefil= e > index 04a29ce59d..902564b3e2 100644 > --- a/xen/arch/x86/hvm/vmx/Makefile > +++ b/xen/arch/x86/hvm/vmx/Makefile > @@ -3,4 +3,4 @@ obj-y +=3D intr.o > obj-y +=3D realmode.o > obj-y +=3D vmcs.o > obj-y +=3D vmx.o > -obj-y +=3D vvmx.o > +obj-$(CONFIG_NESTED_VIRT) +=3D vvmx.o > diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S > index 2bfee715b3..4d62efddf4 100644 > --- a/xen/arch/x86/hvm/vmx/entry.S > +++ b/xen/arch/x86/hvm/vmx/entry.S > @@ -83,7 +83,9 @@ FUNC(vmx_asm_vmexit_handler) > =20 > .Lvmx_do_vmentry: > call vmx_intr_assist > +#ifdef CONFIG_NESTED_VIRT > call nvmx_switch_guest > +#endif > ASSERT_NOT_IN_ATOMIC > =20 > mov VCPU_processor(%rbx),%eax > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 82c55f49ae..4e3c8018d2 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -2014,33 +2014,6 @@ static void cf_check vmx_update_guest_efer(struct = vcpu *v) > vmx_set_msr_intercept(v, MSR_EFER, VMX_MSR_R); > } > =20 > -static void nvmx_enqueue_n2_exceptions(struct vcpu *v, > - unsigned long intr_fields, int error_code, uint8_t source) > -{ > - struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v); > - > - if ( !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) ) { > - /* enqueue the exception till the VMCS switch back to L1 */ > - nvmx->intr.intr_info =3D intr_fields; > - nvmx->intr.error_code =3D error_code; > - nvmx->intr.source =3D source; > - vcpu_nestedhvm(v).nv_vmexit_pending =3D 1; > - return; > - } > - else > - gdprintk(XENLOG_ERR, "Double Fault on Nested Guest: exception %l= x %x" > - "on %lx %x\n", intr_fields, error_code, > - nvmx->intr.intr_info, nvmx->intr.error_code); > -} > - > -static int cf_check nvmx_vmexit_event( > - struct vcpu *v, const struct x86_event *event) > -{ > - nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > - hvm_intsrc_none); > - return NESTEDHVM_VMEXIT_DONE; > -} > - > static void __vmx_inject_exception(int trap, int type, int error_code) > { > unsigned long intr_fields; > @@ -2933,6 +2906,7 @@ static struct hvm_function_table __initdata_cf_clob= ber vmx_function_table =3D { > .handle_cd =3D vmx_handle_cd, > .set_info_guest =3D vmx_set_info_guest, > .set_rdtsc_exiting =3D vmx_set_rdtsc_exiting, > +#ifdef CONFIG_NESTED_VIRT > .nhvm_vcpu_initialise =3D nvmx_vcpu_initialise, > .nhvm_vcpu_destroy =3D nvmx_vcpu_destroy, > .nhvm_vcpu_reset =3D nvmx_vcpu_reset, > @@ -2942,8 +2916,9 @@ static struct hvm_function_table __initdata_cf_clob= ber vmx_function_table =3D { > .nhvm_vcpu_vmexit_event =3D nvmx_vmexit_event, > .nhvm_intr_blocked =3D nvmx_intr_blocked, > .nhvm_domain_relinquish_resources =3D nvmx_domain_relinquish_resourc= es, > - .update_vlapic_mode =3D vmx_vlapic_msr_changed, > .nhvm_hap_walk_L1_p2m =3D nvmx_hap_walk_L1_p2m, > +#endif > + .update_vlapic_mode =3D vmx_vlapic_msr_changed, > #ifdef CONFIG_VM_EVENT > .enable_msr_interception =3D vmx_enable_msr_interception, > #endif > diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c > index 38952f0696..2bb42678c5 100644 > --- a/xen/arch/x86/hvm/vmx/vvmx.c > +++ b/xen/arch/x86/hvm/vmx/vvmx.c > @@ -2821,6 +2821,32 @@ void nvmx_set_cr_read_shadow(struct vcpu *v, unsig= ned int cr) > __vmwrite(read_shadow_field, v->arch.hvm.nvcpu.guest_cr[cr]); > } > =20 > +void nvmx_enqueue_n2_exceptions(struct vcpu *v, > + unsigned long intr_fields, int error_code, uint8_t source) > +{ > + struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v); > + > + if ( !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) ) { > + /* enqueue the exception till the VMCS switch back to L1 */ > + nvmx->intr.intr_info =3D intr_fields; > + nvmx->intr.error_code =3D error_code; > + nvmx->intr.source =3D source; > + vcpu_nestedhvm(v).nv_vmexit_pending =3D 1; > + return; > + } > + else > + gdprintk(XENLOG_ERR, "Double Fault on Nested Guest: exception %l= x %x" > + "on %lx %x\n", intr_fields, error_code, > + nvmx->intr.intr_info, nvmx->intr.error_code); > +} > + > +int cf_check nvmx_vmexit_event(struct vcpu *v, const struct x86_event *e= vent) > +{ > + nvmx_enqueue_n2_exceptions(v, event->vector, event->error_code, > + hvm_intsrc_none); > + return NESTEDHVM_VMEXIT_DONE; > +} > + > void __init start_nested_vmx(struct hvm_function_table *hvm_function_tab= le) > { > /* TODO: Require hardware support before enabling nested virt */ > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/as= m/hvm/hvm.h > index 7d9774df59..536a38b450 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -711,7 +711,7 @@ static inline bool hvm_altp2m_supported(void) > /* Returns true if we have the minimum hardware requirements for nested = virt */ > static inline bool hvm_nested_virt_supported(void) > { > - return hvm_funcs.caps.nested_virt; > + return IS_ENABLED(CONFIG_NESTED_VIRT) && hvm_funcs.caps.nested_virt; > } > =20 > #ifdef CONFIG_ALTP2M > diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/incl= ude/asm/hvm/nestedhvm.h > index ea2c1bc328..2f8209271a 100644 > --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h > +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h > @@ -25,9 +25,21 @@ enum nestedhvm_vmexits { > /* Nested HVM on/off per domain */ > static inline bool nestedhvm_enabled(const struct domain *d) > { > - return IS_ENABLED(CONFIG_HVM) && (d->options & XEN_DOMCTL_CDF_nested= _virt); > + return IS_ENABLED(CONFIG_NESTED_VIRT) && > + (d->options & XEN_DOMCTL_CDF_nested_virt); > } > =20 > +/* Nested paging */ > +#define NESTEDHVM_PAGEFAULT_DONE 0 > +#define NESTEDHVM_PAGEFAULT_INJECT 1 > +#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > +#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > +#define NESTEDHVM_PAGEFAULT_MMIO 4 > +#define NESTEDHVM_PAGEFAULT_RETRY 5 > +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > + > +#ifdef CONFIG_NESTED_VIRT > + > /* Nested VCPU */ > int nestedhvm_vcpu_initialise(struct vcpu *v); > void nestedhvm_vcpu_destroy(struct vcpu *v); > @@ -38,14 +50,6 @@ bool nestedhvm_vcpu_in_guestmode(struct vcpu *v); > #define nestedhvm_vcpu_exit_guestmode(v) \ > vcpu_nestedhvm(v).nv_guestmode =3D 0 > =20 > -/* Nested paging */ > -#define NESTEDHVM_PAGEFAULT_DONE 0 > -#define NESTEDHVM_PAGEFAULT_INJECT 1 > -#define NESTEDHVM_PAGEFAULT_L1_ERROR 2 > -#define NESTEDHVM_PAGEFAULT_L0_ERROR 3 > -#define NESTEDHVM_PAGEFAULT_MMIO 4 > -#define NESTEDHVM_PAGEFAULT_RETRY 5 > -#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6 > int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa, > struct npfec npfec); > =20 > @@ -59,6 +63,48 @@ unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80= , bool ioport_ed); > =20 > void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m); > =20 > +#else /* !CONFIG_NESTED_VIRT */ There's a lot more stubs than needed here. > + > +static inline int nestedhvm_vcpu_initialise(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > + return -EOPNOTSUPP; > +} Can remove. > +static inline void nestedhvm_vcpu_destroy(struct vcpu *v) { } Must stay. > +static inline void nestedhvm_vcpu_reset(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} Can remove. > +static inline bool nestedhvm_vcpu_in_guestmode(struct vcpu *v) { return = false; } Must stay. > +static inline int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_= t *L2_gpa, > + struct npfec npfec) > +{ > + ASSERT_UNREACHABLE(); > + return NESTEDHVM_PAGEFAULT_L0_ERROR; > +} Can remove > +static inline void nestedhvm_vcpu_enter_guestmode(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void nestedhvm_vcpu_exit_guestmode(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > +} These two can be removed. It might be good to keep the real macros hidden u= nder CONFIG_NESTED_VIRT though to ensure they can't be called. > +static inline bool nestedhvm_paging_mode_hap(struct vcpu *v) > +{ > + return false; > +} This can be removed with a cleaner IS_ENABLED() check in nhvm_vmcx_hap_enab= led() > +static inline bool nestedhvm_vmswitch_in_progress(struct vcpu *v) > +{ > + return false; > +} Would be cleaner with an IS_ENABLED() check in the macro itself, IMO. > +static inline void nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m) > +{ > + ASSERT_UNREACHABLE(); > +} Can remove. > + > +#endif /* CONFIG_NESTED_VIRT */ > + > static inline bool nestedhvm_is_n2(struct vcpu *v) > { > if ( !nestedhvm_enabled(v->domain) || > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/inclu= de/asm/hvm/vmx/vvmx.h > index da10d3fa96..d0c1ae29f6 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h Most stubs in this header aren't needed. You only need nvmx_cpu_up(), nvmx_cpu_dead(), nvmx_msr_read_intercept() and nvmx_handle_insn(). There's also a bug in that last one... > @@ -73,6 +73,8 @@ union vmx_inst_info { > u32 word; > }; > =20 > +#ifdef CONFIG_NESTED_VIRT > + > int cf_check nvmx_vcpu_initialise(struct vcpu *v); > void cf_check nvmx_vcpu_destroy(struct vcpu *v); > int cf_check nvmx_vcpu_reset(struct vcpu *v); > @@ -199,5 +201,77 @@ int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga= , > uint64_t *exit_qual, uint32_t *exit_reason); > int nvmx_cpu_up_prepare(unsigned int cpu); > void nvmx_cpu_dead(unsigned int cpu); > +int cf_check nvmx_vmexit_event(struct vcpu *v, const struct x86_event *e= vent); > +void nvmx_enqueue_n2_exceptions(struct vcpu *v, > + unsigned long intr_fields, int error_code, uint8_t source); > + > +#else /* !CONFIG_NESTED_VIRT */ > + > +static inline void nvmx_update_exec_control(struct vcpu *v, u32 value) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void nvmx_update_secondary_exec_control(struct vcpu *v, > + unsigned long valu= e) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline void nvmx_update_exception_bitmap(struct vcpu *v, > + unsigned long value) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline u64 nvmx_get_tsc_offset(struct vcpu *v) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} > +static inline void nvmx_set_cr_read_shadow(struct vcpu *v, unsigned int = cr) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline bool nvmx_intercepts_exception(struct vcpu *v, unsigned in= t vector, > + int error_code) > +{ > + ASSERT_UNREACHABLE(); > + return false; > +} > +static inline int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, > + unsigned int exit_reason) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} > +static inline void nvmx_idtv_handling(void) > +{ > + ASSERT_UNREACHABLE(); > +} > +static inline int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_con= tent) > +{ > + /* return 0 to trigger #GP */ > + return 0; > +} > +static inline int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, > + unsigned int exit_reason) > +{ > + ASSERT_UNREACHABLE(); > + return X86EMUL_EXCEPTION; > +} ... here. This is perfectly reachable and will cause a hypervisor crash sho= uld an L1 try to probe the VMX-family of instructions. Even on realease this wo= uld behave very oddly because you're missing injecting #UD. This stub should be= : hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return X86EMUL_EXCEPTION; > +static inline int nvmx_cpu_up_prepare(unsigned int cpu) { return 0; } > +static inline void nvmx_cpu_dead(unsigned int cpu) { } > +static inline void nvmx_enqueue_n2_exceptions(struct vcpu *v, > + unsigned long intr_fields, int error_code, uint8_t source) > +{ > + ASSERT_UNREACHABLE(); > +} > + > +static inline u64 get_vvmcs(const struct vcpu *vcpu, u32 encoding) > +{ > + ASSERT_UNREACHABLE(); > + return 0; > +} > + > +#endif /* CONFIG_NESTED_VIRT */ > + > #endif /* __ASM_X86_HVM_VVMX_H__ */ > =20 > diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile > index 960f6e8409..aa15811c2e 100644 > --- a/xen/arch/x86/mm/Makefile > +++ b/xen/arch/x86/mm/Makefile > @@ -7,7 +7,7 @@ obj-$(CONFIG_SHADOW_PAGING) +=3D guest_walk_4.o > obj-$(CONFIG_VM_EVENT) +=3D mem_access.o > obj-$(CONFIG_MEM_PAGING) +=3D mem_paging.o > obj-$(CONFIG_MEM_SHARING) +=3D mem_sharing.o > -obj-$(CONFIG_HVM) +=3D nested.o > +obj-$(CONFIG_NESTED_VIRT) +=3D nested.o > obj-$(CONFIG_HVM) +=3D p2m.o > obj-y +=3D p2m-basic.o > obj-$(CONFIG_INTEL_VMX) +=3D p2m-ept.o > diff --git a/xen/arch/x86/mm/hap/Makefile b/xen/arch/x86/mm/hap/Makefile > index 67c29b2162..efdc91ea82 100644 > --- a/xen/arch/x86/mm/hap/Makefile > +++ b/xen/arch/x86/mm/hap/Makefile > @@ -2,5 +2,6 @@ obj-y +=3D hap.o > obj-y +=3D guest_walk_2.o > obj-y +=3D guest_walk_3.o > obj-y +=3D guest_walk_4.o > -obj-y +=3D nested_hap.o > -obj-$(CONFIG_INTEL_VMX) +=3D nested_ept.o > +nested-y :=3D nested_hap.o > +nested-$(CONFIG_INTEL_VMX) +=3D nested_ept.o > +obj-$(CONFIG_NESTED_VIRT) +=3D $(nested-y) Why not use plain filter? -obj-y +=3D nested_hap.o +obj-$(CONFIG_NESTED_VIRT) +=3D nested_hap.o -obj-$(CONFIG_INTEL_VMX) +=3D nested_ept.o +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) +=3D nested_ept.o > diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h > index 635f5a7f45..63808dddcc 100644 > --- a/xen/arch/x86/mm/p2m.h > +++ b/xen/arch/x86/mm/p2m.h > @@ -25,9 +25,15 @@ void p2m_teardown_altp2m(struct domain *d); > void p2m_flush_table_locked(struct p2m_domain *p2m); > int __must_check p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, mfn= _t mfn, > unsigned int page_order); > +#ifdef CONFIG_NESTED_VIRT > void p2m_nestedp2m_init(struct p2m_domain *p2m); > int p2m_init_nestedp2m(struct domain *d); > void p2m_teardown_nestedp2m(struct domain *d); > +#else > +static inline void p2m_nestedp2m_init(struct p2m_domain *p2m) { } > +static inline int p2m_init_nestedp2m(struct domain *d) { return 0; } > +static inline void p2m_teardown_nestedp2m(struct domain *d) { } > +#endif Seeing how there's a single callsite I'd rather see those callsites check f= or IS_ENABLED(), I think. > =20 > int ept_p2m_init(struct p2m_domain *p2m); > void ept_p2m_uninit(struct p2m_domain *p2m); > diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c > index 1b04947516..b1d865e1c8 100644 > --- a/xen/arch/x86/sysctl.c > +++ b/xen/arch/x86/sysctl.c > @@ -103,6 +103,8 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > pi->capabilities |=3D XEN_SYSCTL_PHYSCAP_hap; > if ( IS_ENABLED(CONFIG_SHADOW_PAGING) ) > pi->capabilities |=3D XEN_SYSCTL_PHYSCAP_shadow; > + if ( hvm_nested_virt_supported() ) > + pi->capabilities |=3D XEN_SYSCTL_PHYSCAP_nestedhvm; > } > =20 > long arch_do_sysctl( > diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h > index 66c9b65465..b4bd1dd7b2 100644 > --- a/xen/include/public/sysctl.h > +++ b/xen/include/public/sysctl.h > @@ -100,9 +100,11 @@ struct xen_sysctl_tbuf_op { > /* Xen supports the Grant v1 and/or v2 ABIs. */ > #define XEN_SYSCTL_PHYSCAP_gnttab_v1 (1u << 8) > #define XEN_SYSCTL_PHYSCAP_gnttab_v2 (1u << 9) > +/* The platform supports nested HVM. */ > +#define XEN_SYSCTL_PHYSCAP_nestedhvm (1u << 10) > =20 > /* Max XEN_SYSCTL_PHYSCAP_* constant. Used for ABI checking. */ > -#define XEN_SYSCTL_PHYSCAP_MAX XEN_SYSCTL_PHYSCAP_gnttab_v2 > +#define XEN_SYSCTL_PHYSCAP_MAX XEN_SYSCTL_PHYSCAP_nestedhvm > =20 > #if defined(__arm__) || defined(__aarch64__) > #define XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK (0x1FU) Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:46:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:46:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233963.1537337 (Exim 4.92) (envelope-from ) id 1vrw7J-0003Tm-Mj; Mon, 16 Feb 2026 10:46:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233963.1537337; Mon, 16 Feb 2026 10:46:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrw7J-0003Tf-IG; Mon, 16 Feb 2026 10:46:13 +0000 Received: by outflank-mailman (input) for mailman id 1233963; Mon, 16 Feb 2026 10:46:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrw7I-0003TX-5j for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 10:46:12 +0000 Received: from mail187-15.suw11.mandrillapp.com (mail187-15.suw11.mandrillapp.com [198.2.187.15]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b45d2479-0b24-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 11:46:10 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-15.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fDzw12HD8zPm0PWl for ; Mon, 16 Feb 2026 10:46:09 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 5d3fa0f62d8e4ffd87a929d5e8b1399c; Mon, 16 Feb 2026 10:46:09 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b45d2479-0b24-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771238769; x=1771508769; bh=97FE3cAfG4P7WeW9MfP+c96ioDn68+UIqmNFh7TtqwU=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ZMzDHZoZVkqkVSLJgzCmNr9pOyWauPPgMyy05udGKfOK8EEdN9hvkhnKZgg/711y6 phyfr3gWOMin9yNcXzNA2XteUc/wtkwMm/JWgMy49Oz0y2+0Y3dFB+sjLYB7cOimUM XcOqvbghOPr+l6yMtYVIsRD3SpjyeJComT2jjcAU4lhIkHbCrgC+6LiUZGEjgZW9zf j6FzEtXHLycjbEgVkj7VEZX7BqKk0gKV+gkKckFLJd1/Lgr+CdvZVRYkjDgndICgzr xdURyb/FRvAb/6uYJzTX+T0OpfsIO6CsM4iRFd5AwU7Pd1WMWJFFeezXuNL7pQHAH0 6DgM5DBgOXZBA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771238769; x=1771499269; i=teddy.astie@vates.tech; bh=97FE3cAfG4P7WeW9MfP+c96ioDn68+UIqmNFh7TtqwU=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=sAt9j1qcjcoK08LfN0TQwA9+KGS4h7s8bPMzWs/T9bwrdRM+X1M0u5bHz9m4Hf1X+ bLRe6uA51tQ7M2U2Kq6iWwJ3Ae5zQvUUFw+NLf/IRd6SL52nRudiQLAscZoy3ptZzq z2Yb5E1xBl0totMotVvDkEY6IXZY/PARFfMI5+TstnYs8NKr7hufLl3+oOqRmctxkA 9l/Mq56PfHkXWRgW3DQgDhAbdoICIdsU3NYqlDW+mb32eoaeWidxUKM9LQPUm+rtAh 4CWgG5B/0KZKh7q8Y5rkBagqDTqwOxpUaP+1o+AzWbSJRNnUel6GX+tWguilztWF2v rshFvO+tKnG/g== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v3=202/2]=20x86/svm:=20Use=20the=20virtual=20NMI=20when=20available?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771238767625 Message-Id: <626c3f3b-9176-493c-9d96-e2a5344e7100@vates.tech> To: "Andrew Cooper" , "Abdelkareem Abdelsaamad" , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, "Jan Beulich" , "Jason Andryuk" References: In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.5d3fa0f62d8e4ffd87a929d5e8b1399c?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 10:46:09 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 16/02/2026 =C3=A0 11:16, Andrew Cooper a =C3=A9crit=C2=A0: > On 16/02/2026 10:07 am, Teddy Astie wrote: >> Le 15/02/2026 =C3=A0 19:24, Abdelkareem Abdelsaamad a =C3=A9crit=C2=A0: >>> With the Virtual NMI (vNMI), the pending NMI is simply stuffed into the= VMCB >>> and handed off to the hardware. There is no need for the artificial tra= cking >>> of the NMI handling completion with the IRET instruction interception. >>> >>> Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hard= ware >>> accelerated feature when the AMD platform support the vNMI. >>> >>> Adjust the svm_get_interrupt_shadow to check if the vNMI is currently b= locked >>> by servicing another in-progress NMI. >>> >>> Signed-off-by: Abdelkareem Abdelsaamad >>> --- >>> xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ >>> xen/arch/x86/hvm/svm/svm.c | 5 ++++- >>> xen/arch/x86/hvm/svm/vmcb.c | 2 ++ >>> 3 files changed, 15 insertions(+), 1 deletion(-) >>> >>> diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c >>> index 6453a46b85..3e8959f155 100644 >>> --- a/xen/arch/x86/hvm/svm/intr.c >>> +++ b/xen/arch/x86/hvm/svm/intr.c >>> @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) >>> u32 general1_intercepts =3D vmcb_get_general1_intercepts(vmcb); >>> intinfo_t event; >>> >>> + if ( vmcb->_vintr.fields.vnmi_enable ) >>> + { >>> + if ( !vmcb->_vintr.fields.vnmi_pending && >>> + !vmcb->_vintr.fields.vnmi_blocking ) >>> + vmcb->_vintr.fields.vnmi_pending =3D 1; >>> + >>> + return; >>> + } >>> + >> I think you need to update the clearbit for tpr (related to vintr) for >> the hardware to know that you modified the vnmi_pending bit. > > What makes you think this?=C2=A0 The APM states otherwise. > The APM state doesn't appears to state regarding this; it's neither a part of the "VMCB Clear Field" layout part nor the the "explicitely not cached" list. So I assume that it may be covered by the TPR clean-bit (which is the same part of vmcb); as it's actually unclear if hardware wants it or not. > ~Andrew > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:52:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:52:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233973.1537345 (Exim 4.92) (envelope-from ) id 1vrwD5-0005NE-81; Mon, 16 Feb 2026 10:52:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233973.1537345; Mon, 16 Feb 2026 10:52:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrwD5-0005N7-5S; Mon, 16 Feb 2026 10:52:11 +0000 Received: by outflank-mailman (input) for mailman id 1233973; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: e3OLr7MURJsFHT+dljw8/SyDpRjHF5RLMPZjzq3VXfsCYBBtUIK/J1oSvIH/JvP0rbAzlQTiQw0a+ZOFdLmPxvCHHvf9SMI8EOMXX2WIscqwR6Vk+Nx5FUa09r/r1TViXCe7BL9xW6gkD5eMiryGBjZv8Cnk7bd0+hpOjLV+fop5bmiiuPdAz211/+ICvEWD4MDDQ8mm0NjpCH2oUcvEZ/+gB6lGquHvbkriaU6ZvIyzkfEdIkrV6/RJwwWmeBrHX6BBkPilLlxsNEg4Bnv6QyC0wSaLMbGaW4JYwawXBRkTbT4dmWqCQDXjW9hHnr/JozpnneQqNXotfRWsdZSxo0Lrj7Cv+jIwM+Wt1P6q0pjyNFyCX++bz4F0YGxzyyKLaAhdKuo3MsyVcTF8wGC3FOmEhGI+biaSbSLXz8NhAAqlB2tQHiwUqJCkUcc/CopS X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 10:52:02.9923 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8eb7128e-aaf7-41e2-2567-08de6d496b1e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A105.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9659 On Sat Feb 14, 2026 at 12:29 AM CET, Andrew Cooper wrote: > You won't get a compile error for typo-ing a name inside IF_ENABLED(), > but it won't function correctly either. There's beauty in having a typo explaining the effects of a typo :) Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 16 10:56:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 10:56:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233984.1537356 (Exim 4.92) (envelope-from ) id 1vrwGg-0005vS-Nc; Mon, 16 Feb 2026 10:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233984.1537356; Mon, 16 Feb 2026 10:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrwGg-0005vL-KC; Mon, 16 Feb 2026 10:55:54 +0000 Received: by outflank-mailman (input) for mailman id 1233984; Mon, 16 Feb 2026 10:55:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrwGe-0005vF-TO for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 10:55:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vrwGe-00BrO1-1O; Mon, 16 Feb 2026 10:55:52 +0000 Received: from [2a01:cb15:80df:da00:80b5:18da:fdf4:baa] (helo=l14) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vrwGd-00AJUL-2I; Mon, 16 Feb 2026 10:55:52 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=In-Reply-To:Content-Transfer-Encoding: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=DpW+BdtDviV6r2jTzycnwjk3yTD8C2hukAHwAEgLF0k=; b=oFEyHu+q6ZYOKTD+z/6RFwpM8Q 62J6oTLzwTJRCaBN3RqLlhrwtYubtDpSqGEb9Or4ips0k6mBo2cb7JrKOcnBJl+/j/ficCNoV4ymO D0JV2VhLDVwMZTRa0cc+SbD90ol58obp/7QWIV1w32HfJQXIbPouh1z6Usq6jnG/rLc8=; Date: Mon, 16 Feb 2026 11:55:50 +0100 From: Anthony PERARD To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Anthony PERARD , Doug Goldstein , Stefano Stabellini Subject: Re: [XEN PATCH] CI: Remove `brctl` from Arch Linux container Message-ID: References: <20260213101921.61888-1-anthony@xenproject.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Feb 13, 2026 at 11:58:06AM +0000, Andrew Cooper wrote: > On 13/02/2026 10:19 am, Anthony PERARD wrote: > > From: Anthony PERARD > > > > Package "bridge-utils" have been removed from the official repos, it > > contained `brctl`. That utility is used by network hotplug scripts, > > but they already check if it is available and switch to use "iproute2" > > (`ip`) when not. > > > > Signed-off-by: Anthony PERARD > > Acked-by: Andrew Cooper > > Right now, README lists bridge-utils as a hard prereq, and this is not > true any longer. > > iproute is also listed as a hard prereq. Should we merge these two > lines with a logical or? Well, iproute2 is an actual hard requirement, `ip` is used in many places without alternative. On the other end, `brctl` is optional, but will be used if exist. I don't know which version of iproute2 is needed in order to not need brctl anymore. Cheers, -- Anthony PERARD From xen-devel-bounces@lists.xenproject.org Mon Feb 16 11:01:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 11:01:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1233993.1537365 (Exim 4.92) (envelope-from ) id 1vrwLw-0007kD-9H; Mon, 16 Feb 2026 11:01:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1233993.1537365; Mon, 16 Feb 2026 11:01:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrwLw-0007k6-6K; Mon, 16 Feb 2026 11:01:20 +0000 Received: by outflank-mailman (input) for mailman id 1233993; Mon, 16 Feb 2026 11:01:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrwLv-0007k0-3P for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 11:01:19 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id cff83740-0b26-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 12:01:15 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-483770e0b25so24729185e9.0 for ; Mon, 16 Feb 2026 03:01:15 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 03:01:14 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 12:01:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Add Kconfig option to disable nested virtualization To: Alejandro Vallejo Cc: roger.pau@citrix.com, andrew.cooper3@citrix.com, jason.andryuk@amd.com, Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260213220205.196179-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 11:34, Alejandro Vallejo wrote: > On Fri Feb 13, 2026 at 11:02 PM CET, Stefano Stabellini wrote: >> --- a/xen/arch/x86/hvm/Kconfig >> +++ b/xen/arch/x86/hvm/Kconfig >> @@ -92,4 +92,11 @@ config MEM_SHARING >> bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED >> depends on INTEL_VMX >> >> +config NESTED_VIRT >> + bool "Nested virtualization support" >> + depends on HVM >> + help >> + Enable nested virtualization, allowing guests to run their own >> + hypervisors. This requires hardware support. > > nit: If we state above "allowing HVM guests..." rather than plain "guests" we can > then get rid of the "This requires hardware support line". What you probably > meant is that this is HVM-only and we don't allow PV nesting. > > "This requires hardware support" makes me (the user) think my hardware needs > something special to support nesting, when in reality I just need HVM support. When replying, I also initially meant to make this broad a statement, but then went to check: While indeed it ought to be possible to implement nested without further hw support, both demands HAP and SVM demands a few more advanced features (see start_nested_svm()). >> --- a/xen/arch/x86/mm/hap/Makefile >> +++ b/xen/arch/x86/mm/hap/Makefile >> @@ -2,5 +2,6 @@ obj-y += hap.o >> obj-y += guest_walk_2.o >> obj-y += guest_walk_3.o >> obj-y += guest_walk_4.o >> -obj-y += nested_hap.o >> -obj-$(CONFIG_INTEL_VMX) += nested_ept.o >> +nested-y := nested_hap.o >> +nested-$(CONFIG_INTEL_VMX) += nested_ept.o >> +obj-$(CONFIG_NESTED_VIRT) += $(nested-y) > > Why not use plain filter? > > -obj-y += nested_hap.o > +obj-$(CONFIG_NESTED_VIRT) += nested_hap.o > -obj-$(CONFIG_INTEL_VMX) += nested_ept.o > +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) += nested_ept.o It may have been like this in v1. Problem being that this leads to long lines, which doesn't scale very well (and is - imo - harder to read). Especially when you consider what happens when it's more than two settings that need checking. The list approach easily scales to about anything (by using as many separate lists as you need). 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6pUfhEAXHKwHcNpgTrAXEypXES2PlIGXB9RhKEBynj1hShDCI+CFQn8pzSSgifqtXz8p5KfemXMe80ALs/SXepsfUkiVP4v7b4Lmos7jSgxq2+l6bD+3JTZuB2+7pjY4sh4al/2ezaX27xQxuSKSfi+zd7AgYZ7XMSS9W7QRkKANWb3/djGGiISIJUwDBhw6j2V7iovjd0eVTr2sNwjPmPRIlqW80UAGrgwJJMFnzRgJ0KrzU2xk9/wvEv3VXWmQbvrosuu4U3QFwjYWW8NnGBBlkkB3R6GujAefFapo6KaKIr2pDZnK0qmuZpjVTUCmQaRi+ZHzU/fUYe+uOVnQGK/7qyUukmdOw/UUaaDjgVSEILWn626IIdfnQnRIW5QlJo5euxr2iFGBOsrDTbAhhpUuKQaTQP6VY6oD1zUWxE/nEz5f+f2hU4xwcAFcBKmC X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 11:13:36.1066 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9be49cdd-dbac-446d-4d29-08de6d4c6ded X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E60.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9360 On Sat Feb 14, 2026 at 12:51 AM CET, Stefano Stabellini wrote: =20 > - if ( op->cpuid >=3D nr_cpu_ids || !cpu_online(op->cpuid) ) > + if ( op->cpuid >=3D nr_cpu_ids || !cpu_online(op->cpuid) || > + !IS_ENABLED(CONFIG_CPUFREQ) ) Largely inconsequential here (and other places in the patch), but I think IS_ENABLED(foo) should go first in all conditional chains so that any invok= ed function in the OR list is skipped. It's likely in this case it doesn't mat= ter, because cpu_onlin() is a macro that calls a static inline so the whole AST is known to the compiler, but it's trickier when there's non-obvious extern functions at play. In those cases the compiler will still make the calls be= cause it can't know the call won't have side effects. Thus, as a matter of principle, I think IS_ENABLED() checks should always c= ome first. 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Mon, 16 Feb 2026 03:23:44 -0800 (PST) Message-ID: <444c41c8-a0ed-4780-81a2-c04df7938ed2@suse.com> Date: Mon, 16 Feb 2026 12:23:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] x86/cpufreq: Add Kconfig option for CPU frequency scaling To: Stefano Stabellini Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, jason.andryuk@amd.com, alejandro.garciavallejo@amd.com, xen-devel@lists.xenproject.org References: <20260213235102.359472-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260213235102.359472-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 14.02.2026 00:51, Stefano Stabellini wrote: > Add CONFIG_CPUFREQ to allow CPU frequency scaling support to be > disabled at build time. When disabled, this removes cpufreq code > from the build. > > Introduce IS_ENABLED(CONFIG_CPUFREQ) checks for relevant do_pm_op and > do_platform_op subops and other functions that require CONFIG_CPUFREQ to > work. > > Add stubs where necessary. > > Signed-off-by: Stefano Stabellini > --- > Changes in v4: > - fix IS_ENABLED(CPUFREQ) > - remove #ifdef in platform_hypercall.c and use DCE > - move cpufreq_controller enum out of #ifdef Where did the v3 revlog go? Especially when submit patches faster than people can look at them, they might skip a version (or more), while still having looked at a yet earlier one. > --- a/xen/drivers/acpi/pm-op.c > +++ b/xen/drivers/acpi/pm-op.c > @@ -367,7 +367,8 @@ int do_pm_op(struct xen_sysctl_pm_op *op) > return ret; > } > > - if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) ) > + if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) || > + !IS_ENABLED(CONFIG_CPUFREQ) ) Have the compile time constant part first? Else any possible side effects of the other expressions may prevent the compiler from fully dropping all code here. > --- a/xen/include/acpi/cpufreq/cpufreq.h > +++ b/xen/include/acpi/cpufreq/cpufreq.h > @@ -381,8 +381,19 @@ int write_ondemand_up_threshold(unsigned int up_threshold); > > int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq); > > +#ifdef CONFIG_CPUFREQ > +int cpufreq_add_cpu(unsigned int cpu); > +int cpufreq_del_cpu(unsigned int cpu); > + > void cpufreq_dbs_timer_suspend(void); > void cpufreq_dbs_timer_resume(void); > +#else > +static inline int cpufreq_add_cpu(unsigned int cpu) { return -EOPNOTSUPP; } > +static inline int cpufreq_del_cpu(unsigned int cpu) { return -EOPNOTSUPP; } Returning an error here looks wrong, even if technically it is benign right now (as the one [each] remaining call doesn't check the error code). > --- a/xen/include/xen/acpi.h > +++ b/xen/include/xen/acpi.h > @@ -186,7 +186,15 @@ static inline void acpi_set_csubstate_limit(unsigned int new_limit) { return; } > #endif > > #ifdef XEN_GUEST_HANDLE > +#ifdef CONFIG_CPUFREQ > int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32)); > +#else > +static inline int acpi_set_pdc_bits(unsigned int acpi_id, > + XEN_GUEST_HANDLE(uint32) pdc) > +{ > + return -EOPNOTSUPP; Here use of an error indicator would result in the XENPF_set_processor_pminfo sub-op failing. That's not correct, as this is a notification from Dom0 to us. If we can't make use of the provided data, we should silently ignore it. > --- a/xen/include/xen/pmstat.h > +++ b/xen/include/xen/pmstat.h > @@ -5,10 +5,23 @@ > #include /* for struct xen_processor_power */ > #include /* for struct pm_cx_stat */ > > +#ifdef CONFIG_CPUFREQ > int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf); > -long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power); > int set_cppc_pminfo(unsigned int acpi_id, > const struct xen_processor_cppc *cppc_data); > +#else > +static inline int set_px_pminfo(uint32_t acpi_id, > + struct xen_processor_performance *perf) > +{ > + return -EOPNOTSUPP; > +} > +static inline int set_cppc_pminfo(unsigned int acpi_id, > + const struct xen_processor_cppc *cppc_data) > +{ > + return -EOPNOTSUPP; > +} Same here, I suppose. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -1259,6 +1259,7 @@ extern enum cpufreq_controller { > FREQCTL_none, FREQCTL_dom0_kernel, FREQCTL_xen > } cpufreq_controller; As previously indicated, these might better be invisible when CPUFREQ=n. But see also below. How about (name subject to improvement) static inline is_hwdom_cpufreq_controller(void) { #ifdef CONFIG_CPUFREQ return cpufreq_controller == FREQCTL_dom0_kernel; #else return false; #endif } for use both ... > +#ifdef CONFIG_CPUFREQ > static always_inline bool is_cpufreq_controller(const struct domain *d) > { > /* > @@ -1274,6 +1275,12 @@ static always_inline bool is_cpufreq_controller(const struct domain *d) > return (is_pv_domain(d) && is_hardware_domain(d) && > cpufreq_controller == FREQCTL_dom0_kernel); ... here and in do_platform_op()? Or, keeping the enum visible, static inline is_hwdom_cpufreq_controller(void) { return IS_ENABLED(CONFIG_CPUFREQ) && cpufreq_controller == FREQCTL_dom0_kernel; } Of course the possibly-compile-time-constant part of the expression would then want to move first, to allow the fencing in is_pv_domain() to also be dropped. > } > +#else > +static always_inline bool is_cpufreq_controller(const struct domain *d) > +{ > + return false; > +} > +#endif Too much redundancy: The #ifdef would better be in the function body. But with the other adjustment the need for an #ifdef would disappear here anyway. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aObRhawvLLRBzUGwPepaXeB2a5+IsPvJhomvFxNWSBLZaRWJ4gqrg/qobU5c6fXeOEXGNND8+GtFNiE+0liwN84ukSART2+NDmiikgpuJfJzwlhGg/qam5KX3tB8NPikNTUoN3neZB/1ijbRnj1ZB/CAuNlNApnw0HWPnhlexloK1mVVTE/C0xtAfIAc6mX5wAT/qXEGCVSPQ2gQTVT4ENIIqYeFcnP0Zvxvk3wvnCVp0zLopDFLs+HndO2PYnS+95TkzxWTB2Nb8AWkuuIbHvX9mzVRcEHUVxIZfBD+9p36EY4fnI8E7ymFuZxjpeCzujUmUKDUpXgGn8sOLO8+prMaek1mjEbUtTySl5R18AzGsgrm4NDp0NlbgXOHrO4PD/WeZ4yoBnSYeo64bo2X2JuKkvuw7tfzVxSUlbeArrYbvYwhFU0RfsBdo2Fu6Jic X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2026 11:28:53.2908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c75d17e-720f-4ebe-a0dd-08de6d4e909c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066EC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPFF9270C127 On Mon Feb 16, 2026 at 12:01 PM CET, Jan Beulich wrote: >>> --- a/xen/arch/x86/mm/hap/Makefile >>> +++ b/xen/arch/x86/mm/hap/Makefile >>> @@ -2,5 +2,6 @@ obj-y +=3D hap.o >>> obj-y +=3D guest_walk_2.o >>> obj-y +=3D guest_walk_3.o >>> obj-y +=3D guest_walk_4.o >>> -obj-y +=3D nested_hap.o >>> -obj-$(CONFIG_INTEL_VMX) +=3D nested_ept.o >>> +nested-y :=3D nested_hap.o >>> +nested-$(CONFIG_INTEL_VMX) +=3D nested_ept.o >>> +obj-$(CONFIG_NESTED_VIRT) +=3D $(nested-y) >>=20 >> Why not use plain filter? >>=20 >> -obj-y +=3D nested_hap.o >> +obj-$(CONFIG_NESTED_VIRT) +=3D nested_hap.o >> -obj-$(CONFIG_INTEL_VMX) +=3D nested_ept.o >> +obj-$(filter $(CONFIG_NESTED_VIRT),$(CONFIG_INTEL_VMX)) +=3D nested_ep= t.o > > It may have been like this in v1. Problem being that this leads to long l= ines, > which doesn't scale very well (and is - imo - harder to read). Especially= when > you consider what happens when it's more than two settings that need chec= king. > The list approach easily scales to about anything (by using as many separ= ate > lists as you need). > > Jan I'd agree should we need more than 2 settings, long config parameter names or long filenames, but none of that applies here. It fits neatly in within = 80 columns and the extra indirection bumps the cognitive load (subjectively speaking) way more than the single line does. Plus, it takes more vertical space. Even then, I'd rather have ifeq on the 3rd and/or 4th parameters and filter inside, which makes the group stand out much better and doesn't pollute the global namespace with even more names. And there's the matter of "filter" being in use very prevalently elsewhere. My .02, anyway. They are functionally equivalent, after all. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Mon Feb 16 11:45:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 11:45:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234036.1537405 (Exim 4.92) (envelope-from ) id 1vrx2P-0006OB-5Q; Mon, 16 Feb 2026 11:45:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234036.1537405; Mon, 16 Feb 2026 11:45:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrx2P-0006O4-2p; Mon, 16 Feb 2026 11:45:13 +0000 Received: by outflank-mailman (input) for mailman id 1234036; Mon, 16 Feb 2026 11:45:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrx2N-0006Ny-Oc for xen-devel@lists.xenproject.org; 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There is no need for the artificial tracking >>>> of the NMI handling completion with the IRET instruction interception. >>>> >>>> Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware >>>> accelerated feature when the AMD platform support the vNMI. >>>> >>>> Adjust the svm_get_interrupt_shadow to check if the vNMI is currently blocked >>>> by servicing another in-progress NMI. >>>> >>>> Signed-off-by: Abdelkareem Abdelsaamad >>>> --- >>>> xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ >>>> xen/arch/x86/hvm/svm/svm.c | 5 ++++- >>>> xen/arch/x86/hvm/svm/vmcb.c | 2 ++ >>>> 3 files changed, 15 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c >>>> index 6453a46b85..3e8959f155 100644 >>>> --- a/xen/arch/x86/hvm/svm/intr.c >>>> +++ b/xen/arch/x86/hvm/svm/intr.c >>>> @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) >>>> u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); >>>> intinfo_t event; >>>> >>>> + if ( vmcb->_vintr.fields.vnmi_enable ) >>>> + { >>>> + if ( !vmcb->_vintr.fields.vnmi_pending && >>>> + !vmcb->_vintr.fields.vnmi_blocking ) >>>> + vmcb->_vintr.fields.vnmi_pending = 1; >>>> + >>>> + return; >>>> + } >>>> + >>> I think you need to update the clearbit for tpr (related to vintr) for >>> the hardware to know that you modified the vnmi_pending bit. >> What makes you think this?  The APM states otherwise. >> > The APM state doesn't appears to state regarding this; The APM does state what is part of the TPR cleanbit, and vNMI is not amongst these. > it's neither a > part of the "VMCB Clear Field" layout part nor the the "explicitely not > cached" list. > > So I assume that it may be covered by the TPR clean-bit (which is the > same part of vmcb); as it's actually unclear if hardware wants it or not. This is very different to your original feedback though. It's fine for review feedback to be of the form "have you investigated the clean bits?", but if you're not sure, you must not phrase your feedback as an instruction to check the cleanbit. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 11:50:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 11:50:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234051.1537415 (Exim 4.92) (envelope-from ) id 1vrx7a-00089E-Q1; Mon, 16 Feb 2026 11:50:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234051.1537415; Mon, 16 Feb 2026 11:50:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrx7a-000897-Mm; Mon, 16 Feb 2026 11:50:34 +0000 Received: by outflank-mailman (input) for mailman id 1234051; Mon, 16 Feb 2026 11:50:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrx7Z-000891-K9 for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 11:50:33 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ab519d55-0b2d-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 12:50:20 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-4375d4fb4d4so2522970f8f.0 for ; Mon, 16 Feb 2026 03:50:20 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 03:50:19 -0800 (PST) Message-ID: <0f7e5a73-a574-4aa2-80c7-b45d08b9d6b0@suse.com> Date: Mon, 16 Feb 2026 12:50:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 17:29, Oleksii Kurochko wrote: > Introduce helpers to manage VS-stage and G-stage translation state during > vCPU context switches. > > As VSATP and HGATP cannot be updated atomically, clear VSATP on context > switch-out to prevent speculative VS-stage translations from being associated > with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the > required order. > > Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes > only when required (e.g. on VMID reuse or generation change). > > This provides the necessary infrastructure for correct p2m context switching > on RISC-V. > > Signed-off-by: Oleksii Kurochko > --- > Changes in v3: > - Add comment above p2m_ctxt_switch_{to, from}(). I find these and other speculation related comments problematic: You can't prevent every kind of speculation that way, yet all these comments are written as if that was the case. What I think you mean in all cases is speculation using the wrong set of page tables? > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > > return get_page(page, p2m->domain) ? page : NULL; > } > + > +/* Should be called before other CSRs are stored to avoid speculation */ > +void p2m_ctxt_switch_from(struct vcpu *p) What interaction with the storing of other CSRs would be problematic? > +{ > + if ( is_idle_vcpu(p) ) > + return; > + > + /* > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value what will be done in > + * p2m_handle_vmenter(). > + */ > + p->arch.vsatp = csr_swap(CSR_VSATP, 0); > + > + /* > + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() > + * or/and in p2m_handle_vmenter(). > + */ > +} > + > +/* Should be called after other CSRs are restored to avoid speculation */ > +void p2m_ctxt_switch_to(struct vcpu *n) Same question here. > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); > + > + if ( is_idle_vcpu(n) ) > + return; > + > + csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); > + /* > + * As VMID is unique per vCPU and just re-used here thereby there is no > + * need for G-stage TLB flush here. > + */ > + > + csr_write(CSR_VSATP, n->arch.vsatp); > + /* > + * As at the start of context switch VSATP were set to 0, so no speculation > + * could happen thereby there is no need for VS TLB flush here. > + */ > +} > + > +void p2m_handle_vmenter(void) > +{ > + struct vcpu *c = current; Can you please stick to conventional names, i.e. "curr" here? > + struct p2m_domain *p2m = p2m_get_hostp2m(c->domain); > + struct vcpu_vmid *p_vmid = &c->arch.vmid; > + uint16_t old_vmid, new_vmid; Nit: No real need for a fixed-width type here? > + bool need_flush; > + > + BUG_ON(is_idle_vcpu(current)); > + > + old_vmid = p_vmid->vmid; > + need_flush = vmid_handle_vmenter(p_vmid); > + new_vmid = p_vmid->vmid; > + > +#ifdef P2M_DEBUG > + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", > + c, old_vmid, new_vmid, need_flush); > +#endif > + > + if ( old_vmid != new_vmid ) > + csr_write(CSR_HGATP, construct_hgatp(p2m, p_vmid->vmid)); > + > + if ( unlikely(need_flush) ) > + { > + local_hfence_gvma_all(); > + flush_tlb_guest_local(); > + } Why would the latter be needed here at all? And if it was needed, why would it depend on whether a VMID roll-over occurred? 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We first broke that connection when purging unused ones, and then again when switching to the bit mask forms. Fixes: 408413051144 ("x86/cpu: Drop unused X86_VENDOR_* values") Fixes: 0cd074144cbb ("x86/cpu: Renumber X86_VENDOR_* to form a bitmap") Signed-off-by: Jan Beulich --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -858,6 +858,22 @@ void *x86_mcinfo_reserve(struct mc_info return mic_index; } +/* Linux values need using when reporting CPU vendors to the outside. */ +static unsigned int xen2linux_vendor(unsigned int vendor) +{ + switch ( vendor ) + { + case X86_VENDOR_INTEL: return 0; + case X86_VENDOR_AMD: return 2; + case X86_VENDOR_CENTAUR: return 5; + case X86_VENDOR_HYGON: return 9; + case X86_VENDOR_SHANGHAI: return 10; /* X86_VENDOR_ZHAOXIN */ + default: break; + } + + return 0xff; /* X86_VENDOR_UNKNOWN */ +} + static void x86_mcinfo_apei_save( struct mcinfo_global *mc_global, struct mcinfo_bank *mc_bank) { @@ -866,7 +882,7 @@ static void x86_mcinfo_apei_save( memset(&m, 0, sizeof(struct mce)); m.cpu = mc_global->mc_coreid; - m.cpuvendor = boot_cpu_data.x86_vendor; + m.cpuvendor = xen2linux_vendor(boot_cpu_data.x86_vendor); m.cpuid = cpuid_eax(1); m.socketid = mc_global->mc_socketid; m.apicid = mc_global->mc_apicid; @@ -968,7 +984,7 @@ static void cf_check __maybe_unused do_m &xcp->mc_ncores_active, &xcp->mc_nthreads); xcp->mc_cpuid_level = c->cpuid_level; xcp->mc_family = c->x86; - xcp->mc_vendor = c->x86_vendor; + xcp->mc_vendor = xen2linux_vendor(c->x86_vendor); xcp->mc_model = c->x86_model; xcp->mc_step = c->x86_mask; xcp->mc_cache_size = c->x86_cache_size; From xen-devel-bounces@lists.xenproject.org Mon Feb 16 12:38:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 12:38:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234118.1537448 (Exim 4.92) (envelope-from ) id 1vrxra-0006d2-Rb; Mon, 16 Feb 2026 12:38:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234118.1537448; Mon, 16 Feb 2026 12:38:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrxra-0006cv-Oa; Mon, 16 Feb 2026 12:38:06 +0000 Received: by outflank-mailman (input) for mailman id 1234118; Mon, 16 Feb 2026 12:38:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrxrZ-0006cp-GW for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 12:38:05 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 55bb07d2-0b34-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 13:38:03 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4836f4cbe0bso22304825e9.3 for ; Mon, 16 Feb 2026 04:38:03 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 04:38:02 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 13:38:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/6] xen/riscv: implement get_page_from_gfn() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <04eee3ae5e8aadf8c7f0b873ba24ce38220e8fa2.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <04eee3ae5e8aadf8c7f0b873ba24ce38220e8fa2.1770821989.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 17:21, Oleksii Kurochko wrote: > Provide a RISC-V implementation of get_page_from_gfn(), matching the > semantics used by other architectures. > > For translated guests, this is implemented as a wrapper around > p2m_get_page_from_gfn(). For DOMID_XEN, which is not auto-translated, > provide a 1:1 RAM/MMIO mapping and perform the required validation and > reference counting. > > The function is implemented out-of-line rather than as a static inline, > to avoid header ordering issues where struct domain is incomplete when > asm/p2m.h is included, leading to build failures: > In file included from ./arch/riscv/include/asm/domain.h:10, > from ./include/xen/domain.h:16, > from ./include/xen/sched.h:11, > from ./include/xen/event.h:12, > from common/cpu.c:3: > ./arch/riscv/include/asm/p2m.h: In function 'get_page_from_gfn': > ./arch/riscv/include/asm/p2m.h:50:33: error: invalid use of undefined type 'struct domain' > 50 | #define p2m_get_hostp2m(d) (&(d)->arch.p2m) > | ^~ > ./arch/riscv/include/asm/p2m.h:180:38: note: in expansion of macro 'p2m_get_hostp2m' > 180 | return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); > | ^~~~~~~~~~~~~~~ > make[2]: *** [Rules.mk:253: common/cpu.o] Error 1 > make[1]: *** [build.mk:72: common] Error 2 > make: *** [Makefile:623: xen] Error 2 Surely this can be addressed, when x86 and Arm have the function as inline? > Signed-off-by: Oleksii Kurochko > --- > Does it make sense to make this function almost fully generic? > > It looks like most of the logic here is architecture-independent and identical > across architectures, except for the following points: > > 1. ``` > if ( likely(d != dom_xen) ) > ``` > > This could be made generic by introducing paging_mode_translate() for ARM > and defining it as `(d != dom_xen)` there. > > 2. ``` > if ( t ) > *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; > ``` > > Here, only `p2m_mmio_direct_io` appears to be architecture-specific. This > could be abstracted via a helper such as `dom_io_p2m_type()` and used here > instead. With P2M stuff I'd be careful. Abstracting the two aspects above may make future arch-specific changes there more difficult. > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) > flush_tlb_guest_local(); > } > } > + > +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, > + p2m_type_t *t, p2m_query_t q) > +{ > + struct page_info *page; > + > + /* > + * Special case for DOMID_XEN as it is the only domain so far that is > + * not auto-translated. > + */ Once again something taken verbatim from Arm. Yes, dom_xen can in fact appear here, but it's not a real domain, has no memory truly assigned to it, has no GFN space, and hence calling it translated (or not) is simply wrong (at best: misleading). IOW ... > + if ( likely(d != dom_xen) ) > + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); > + > + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ ... this comment would also want re-wording. > + if ( t ) > + *t = p2m_invalid; > + > + page = mfn_to_page(_mfn(gfn)); > + > + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) > + return NULL; > + > + if ( t ) > + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; If only dom_xen can make it here, why the check for dom_io? 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Mon, 16 Feb 2026 04:41:11 -0800 (PST) Message-ID: <89cf7c4d-4507-43a8-843e-e9fbfa68519c@suse.com> Date: Mon, 16 Feb 2026 13:41:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/6] xen/riscv: implement get_page_from_gfn() From: Jan Beulich To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <04eee3ae5e8aadf8c7f0b873ba24ce38220e8fa2.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 13:38, Jan Beulich wrote: > On 12.02.2026 17:21, Oleksii Kurochko wrote: >> Provide a RISC-V implementation of get_page_from_gfn(), matching the >> semantics used by other architectures. >> >> For translated guests, this is implemented as a wrapper around >> p2m_get_page_from_gfn(). For DOMID_XEN, which is not auto-translated, >> provide a 1:1 RAM/MMIO mapping and perform the required validation and >> reference counting. >> >> The function is implemented out-of-line rather than as a static inline, >> to avoid header ordering issues where struct domain is incomplete when >> asm/p2m.h is included, leading to build failures: >> In file included from ./arch/riscv/include/asm/domain.h:10, >> from ./include/xen/domain.h:16, >> from ./include/xen/sched.h:11, >> from ./include/xen/event.h:12, >> from common/cpu.c:3: >> ./arch/riscv/include/asm/p2m.h: In function 'get_page_from_gfn': >> ./arch/riscv/include/asm/p2m.h:50:33: error: invalid use of undefined type 'struct domain' >> 50 | #define p2m_get_hostp2m(d) (&(d)->arch.p2m) >> | ^~ >> ./arch/riscv/include/asm/p2m.h:180:38: note: in expansion of macro 'p2m_get_hostp2m' >> 180 | return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >> | ^~~~~~~~~~~~~~~ >> make[2]: *** [Rules.mk:253: common/cpu.o] Error 1 >> make[1]: *** [build.mk:72: common] Error 2 >> make: *** [Makefile:623: xen] Error 2 > > Surely this can be addressed, when x86 and Arm have the function as inline? > >> Signed-off-by: Oleksii Kurochko >> --- >> Does it make sense to make this function almost fully generic? >> >> It looks like most of the logic here is architecture-independent and identical >> across architectures, except for the following points: >> >> 1. ``` >> if ( likely(d != dom_xen) ) >> ``` >> >> This could be made generic by introducing paging_mode_translate() for ARM >> and defining it as `(d != dom_xen)` there. >> >> 2. ``` >> if ( t ) >> *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; >> ``` >> >> Here, only `p2m_mmio_direct_io` appears to be architecture-specific. This >> could be abstracted via a helper such as `dom_io_p2m_type()` and used here >> instead. > > With P2M stuff I'd be careful. Abstracting the two aspects above may make > future arch-specific changes there more difficult. > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) >> flush_tlb_guest_local(); >> } >> } >> + >> +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, >> + p2m_type_t *t, p2m_query_t q) >> +{ >> + struct page_info *page; >> + >> + /* >> + * Special case for DOMID_XEN as it is the only domain so far that is >> + * not auto-translated. >> + */ > > Once again something taken verbatim from Arm. Actually it's a mix, up to ... > Yes, dom_xen can in fact appear > here, but it's not a real domain, has no memory truly assigned to it, has no > GFN space, and hence calling it translated (or not) is simply wrong (at best: > misleading). IOW ... > >> + if ( likely(d != dom_xen) ) >> + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); ... here it's Arm code, but what follows is x86 code. Why did you create such a mix? Jan >> + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ > > ... this comment would also want re-wording. > >> + if ( t ) >> + *t = p2m_invalid; >> + >> + page = mfn_to_page(_mfn(gfn)); >> + >> + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) >> + return NULL; >> + >> + if ( t ) >> + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; > > If only dom_xen can make it here, why the check for dom_io? > > Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 13:10:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 13:10:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234144.1537468 (Exim 4.92) (envelope-from ) id 1vryMe-0003fd-Aq; Mon, 16 Feb 2026 13:10:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234144.1537468; Mon, 16 Feb 2026 13:10:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vryMe-0003fW-80; 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a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771247407; x=1771517407; bh=ebWpv+99PC6pmg8no6MymYF+5pC5DvJcuRWeQg0zdUM=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=vQaSIZTMosSa3HeUhFViy+vwKmlMn1SEwRIRnLmUdztUHE2HF3q21h2G5uvWZ+rva hQp2E/fOjILrAqG/BQFPczYHRtnx7+D++FlcHpu4S2LjN8eCCnRQSTEFvN0c9QIY+S 233KSij9SaMooo44tHSxhiM2mGnEqwCWic7avLcqTlT/HIVk/VFnzE+4Xoe4A6fwzl s+tOVzq5G9+nMXCgmavbDnMVjQHcX/Zq/5OoaoTltr1CkvHdsnLfXlpvSmO4XkwLwz gm15VGcs0TXhvADAAsJgJs0Y3VI5lPl+2DCjMpnEnxIY0cPt2ynPR9rdGSP+JZMJsn AkQJw1KF9HZPg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771247407; x=1771507907; i=teddy.astie@vates.tech; bh=ebWpv+99PC6pmg8no6MymYF+5pC5DvJcuRWeQg0zdUM=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=R6aWgOw7CL7MlgILEFCCXq3b912z5kqqFnc9T8VGVK/7ALQBxpfp4amlQMt7abkxo 4LMvE3VReVnssUijq0Ng/C1CGuTLdB7xER59JedQJQvEjk0FzlItmK+2dmg4lvN1QU 1SvO4gvwRc5ajXFpyKUAcORf7dTLuzCyqkIzpvNjYBn9zKqDBDIA0sE9r655kwykct e8FNQF2OG/TmzH5yttVU+gm4OXFMC60gur96erjhfL4Op9IXoyNuFVTk2BNE/IgGfZ /sER9iGn34kw3EgRoiqAtVZIS2Z+ag+Qhnwgf7SZCJY0ZfvbIOF9urUd4OGmNTj+QG O+ByO20pYsn6g== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v3=202/2]=20x86/svm:=20Use=20the=20virtual=20NMI=20when=20available?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771247406302 Message-Id: <87801307-0c7e-4d34-9f14-645c1cd73426@vates.tech> To: "Andrew Cooper" , "Abdelkareem Abdelsaamad" , xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, "Jan Beulich" , "Jason Andryuk" References: <626c3f3b-9176-493c-9d96-e2a5344e7100@vates.tech> <518e7576-a88d-4172-bf93-f6a368c173d0@citrix.com> In-Reply-To: <518e7576-a88d-4172-bf93-f6a368c173d0@citrix.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.0415e6e0ca8f4fd48707d1ca93f3384e?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 13:10:07 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 16/02/2026 =C3=A0 12:47, Andrew Cooper a =C3=A9crit=C2=A0: > On 16/02/2026 10:46 am, Teddy Astie wrote: >> Le 16/02/2026 =C3=A0 11:16, Andrew Cooper a =C3=A9crit=C2=A0: >>> On 16/02/2026 10:07 am, Teddy Astie wrote: >>>> Le 15/02/2026 =C3=A0 19:24, Abdelkareem Abdelsaamad a =C3=A9crit=C2=A0= : >>>>> With the Virtual NMI (vNMI), the pending NMI is simply stuffed into t= he VMCB >>>>> and handed off to the hardware. There is no need for the artificial t= racking >>>>> of the NMI handling completion with the IRET instruction interception= . >>>>> >>>>> Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Ha= rdware >>>>> accelerated feature when the AMD platform support the vNMI. >>>>> >>>>> Adjust the svm_get_interrupt_shadow to check if the vNMI is currently= blocked >>>>> by servicing another in-progress NMI. >>>>> >>>>> Signed-off-by: Abdelkareem Abdelsaamad >>>>> --- >>>>> xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ >>>>> xen/arch/x86/hvm/svm/svm.c | 5 ++++- >>>>> xen/arch/x86/hvm/svm/vmcb.c | 2 ++ >>>>> 3 files changed, 15 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.= c >>>>> index 6453a46b85..3e8959f155 100644 >>>>> --- a/xen/arch/x86/hvm/svm/intr.c >>>>> +++ b/xen/arch/x86/hvm/svm/intr.c >>>>> @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) >>>>> u32 general1_intercepts =3D vmcb_get_general1_intercepts(vmcb= ); >>>>> intinfo_t event; >>>>> >>>>> + if ( vmcb->_vintr.fields.vnmi_enable ) >>>>> + { >>>>> + if ( !vmcb->_vintr.fields.vnmi_pending && >>>>> + !vmcb->_vintr.fields.vnmi_blocking ) >>>>> + vmcb->_vintr.fields.vnmi_pending =3D 1; >>>>> + >>>>> + return; >>>>> + } >>>>> + >>>> I think you need to update the clearbit for tpr (related to vintr) for >>>> the hardware to know that you modified the vnmi_pending bit. >>> What makes you think this?=C2=A0 The APM states otherwise. >>> >> The APM state doesn't appears to state regarding this; > > The APM does state what is part of the TPR cleanbit, and vNMI is not > amongst these. > APM doesn't explicitly state that; though KVM assumes that it is and sets the cleanbits [1]. I think we want to have some clarifications from AMD on what's actually required here. [1] https://github.com/torvalds/linux/blob/0f2acd3148e0ef42bdacbd477f90e8533f96= b2ac/arch/x86/kvm/svm/svm.c#L3707-L3708 >> it's neither a >> part of the "VMCB Clear Field" layout part nor the the "explicitely not >> cached" list. >> >> So I assume that it may be covered by the TPR clean-bit (which is the >> same part of vmcb); as it's actually unclear if hardware wants it or not= . > > This is very different to your original feedback though. > > It's fine for review feedback to be of the form "have you investigated > the clean bits?", but if you're not sure, you must not phrase your > feedback as an instruction to check the cleanbit. > Sorry, I may have been a bit too fast on that. > ~Andrew > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 13:44:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 13:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234160.1537478 (Exim 4.92) (envelope-from ) id 1vrytO-0007hy-R3; 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charset=utf-8 Content-Transfer-Encoding: 7bit The page was allocated with MEMF_no_refcount. The MEMF_no_refcount flag means the page is allocated without a regular reference, but it still has the allocation reference. If get_page_and_type() fails, we still need to release the allocation reference. Otherwise the page would leak. domain_crash() doesn't free individual pages; it just marks the domain for destruction. The domain teardown will eventually free domain heap pages, but only those it can find. A page with a dangling alloc ref would prevent the page from being fully freed during domain cleanup. Signed-off-by: Julian Vetter --- Changes in v2: - New patch --- xen/common/ioreq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c index f5fd30ce12..5d722c8d4e 100644 --- a/xen/common/ioreq.c +++ b/xen/common/ioreq.c @@ -287,6 +287,7 @@ static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) * The domain can't possibly know about this page yet, so failure * here is a clear indication of something fishy going on. */ + put_page_alloc_ref(page); domain_crash(s->emulator); return -ENODATA; } -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 13:44:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 13:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234162.1537494 (Exim 4.92) (envelope-from ) id 1vrytQ-0007yF-GO; Mon, 16 Feb 2026 13:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234162.1537494; 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c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771249439; x=1771509939; i=julian.vetter@vates.tech; bh=8ylKuGd2BMY1tYigbaDonsjt+0UlJARYpSIysh5XnsQ=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=zFWanLLTSQ9GDGybif5GeUk2sTb9nGOi87qcVSLNwYp9WwWTRK3X7o5zmh4GM2T5L lu4SgSRayHsFwuXr9hzLwB2fUQBZK1C5Bje/LVEIQYmsUO+W+IzkfhfmCBqaihsv5A aTfiNTUCg2jDXeRAKb2/5P0gG6JdEoZ6wunpR+A7U4wVDVgO5DgFh7aHUY/hoPB4SC CND4AJTSmBivv/hiChQaWKv+O1TfpX+yDDWlh81YnYqZycPGkYlLSz7a4yX8ee9cev Qhouf0t8THvQfQxNpFWWeGF8Oijh3iZ4A5l8lpKN+Gf8diyztHMhO39URbj3A2JSp/ 3BvIwKAqW46Ng== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH=20v2=202/3]=20x86/ioreq:=20Prepare=20spacing=20for=20upcoming=20patch?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771249437847 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Julian Vetter" Message-Id: <20260216134334.3510048-3-julian.vetter@vates.tech> In-Reply-To: <20260216134334.3510048-1-julian.vetter@vates.tech> References: <20260216134334.3510048-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.b9b5c5ead9004716bf05dfc35d46d2e5?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 13:43:59 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit This patch just changes indentation, to make the next patch easier to review. Signed-off-by: Julian Vetter --- Changes in v2 - New patch --- xen/arch/x86/hvm/ioreq.c | 86 ++++++++++++++++++++++------------------ 1 file changed, 47 insertions(+), 39 deletions(-) diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index a5fa97e149..5ebc48dbd4 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -125,14 +125,16 @@ static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) { struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return; - destroy_ring_for_helper(&iorp->va, iorp->page); - iorp->page = NULL; + destroy_ring_for_helper(&iorp->va, iorp->page); + iorp->page = NULL; - hvm_free_ioreq_gfn(s, iorp->gfn); - iorp->gfn = INVALID_GFN; + hvm_free_ioreq_gfn(s, iorp->gfn); + iorp->gfn = INVALID_GFN; + } } static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -141,34 +143,36 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; int rc; - if ( iorp->page ) { - /* - * If a page has already been allocated (which will happen on - * demand if ioreq_server_get_frame() is called), then - * mapping a guest frame is not permitted. - */ - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return -EPERM; - - return 0; - } + if ( iorp->page ) + { + /* + * If a page has already been allocated (which will happen on + * demand if ioreq_server_get_frame() is called), then + * mapping a guest frame is not permitted. + */ + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return -EPERM; + + return 0; + } - if ( d->is_dying ) - return -EINVAL; + if ( d->is_dying ) + return -EINVAL; - iorp->gfn = hvm_alloc_ioreq_gfn(s); + iorp->gfn = hvm_alloc_ioreq_gfn(s); - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return -ENOMEM; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return -ENOMEM; - rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, - &iorp->va); + rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, + &iorp->va); - if ( rc ) - hvm_unmap_ioreq_gfn(s, buf); + if ( rc ) + hvm_unmap_ioreq_gfn(s, buf); - return rc; + return rc; + } } static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -176,12 +180,14 @@ static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) struct domain *d = s->target; struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return; - if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) - domain_crash(d); - clear_page(iorp->va); + if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) + domain_crash(d); + clear_page(iorp->va); + } } static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -190,16 +196,18 @@ static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; int rc; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return 0; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return 0; - clear_page(iorp->va); + clear_page(iorp->va); - rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); - if ( rc == 0 ) - paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); + rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); + if ( rc == 0 ) + paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); - return rc; + return rc; + } } int arch_ioreq_server_map_pages(struct ioreq_server *s) -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 13:44:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 13:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234163.1537508 (Exim 4.92) (envelope-from ) id 1vrytR-0008Mj-KM; Mon, 16 Feb 2026 13:44:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234163.1537508; Mon, 16 Feb 2026 13:44:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrytR-0008Mc-HI; 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a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771249439; x=1771519439; bh=F1SS3wigxhXzgwX235EXJtDoch2rIlhw5Qmf1Ym2oJI=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=hrwo6tnjMsuP5FJAbw7H9IKcfR04O4r/m1VC9UPyULUm4kcvgPqhG5A3nd52LL8Dm kgzaR0MqqevAnFbZwoyI7uXqKynbQV5xaABLZB4IAcgtvwq7yjT+x7hmhY8dujlpam bpk2e+Ujh7t4fsydpmC6mfPYwAPLBxLfdNNfqekpy/FMn6tNigBcEInGzFC8nO4INS ZcOIiyabo1MhrvYKYTkTMD4+xj/EzI/Lee7xgq6vqXyGJVETftDgV7kKEZO42yFa5T 1mNufl1Lgvv2KfnO8VMFdGr7y9AqtUYoz6G6Z7bakn1AoqLQKcpmKqHkzRDwUygzRl vlOQYmK+jRlYg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771249439; x=1771509939; i=julian.vetter@vates.tech; bh=F1SS3wigxhXzgwX235EXJtDoch2rIlhw5Qmf1Ym2oJI=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ruFgZSOnc9hZvE0PtMTt4nvSkdlNcbHeq8K7aVoAosNu4IT6Bh9wfhqZw3qs3YJJ8 XAuad5PYxdFcSLY5MJa1ggtlTjPz/9NgT2A71pvW7BV+QH1pt4HPHLtXPCCbRAKXrk ms3tPOw7rJQsOFdtMt+LNPNC3WKHSZia0u+sR6rSEa0W3DXqi8fHe20JJEnfCJEW18 CEP+SU21HMuayKRN42rg+rni7PO65AMPQ/5FbvieW/yJT1H+MXo50QzIFwIVeZSgTC W+hyHo8OyucBTrKBSuHL3OTMLMWkv78dDfz1TnclECxMayV8jgM+5CZ1gT8jjgvIaO RGKFJnS82QtQQ== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH=20v2=203/3]=20x86/ioreq:=20Extend=20ioreq=20server=20to=20support=20multiple=20ioreq=20pages?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771249438581 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Julian Vetter" Message-Id: <20260216134334.3510048-4-julian.vetter@vates.tech> In-Reply-To: <20260216134334.3510048-1-julian.vetter@vates.tech> References: <20260216134334.3510048-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.d76f599d107e4e6ba4639d252a67c5d0?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 13:43:59 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit A single shared ioreq page provides PAGE_SIZE/sizeof(ioreq_t) = 128 slots, limiting HVM guests to 128 vCPUs. To support more vCPUs, extend the ioreq server to use xvzalloc_array() for allocating a contiguous virtual array of ioreq_t slots sized to d->max_vcpus, backed by potentially non-contiguous physical pages. For the GFN-mapped path (x86), individual pages are mapped via prepare_ring_for_helper() and then combined into a single contiguous VA using vmap(). The number of ioreq pages is computed at runtime via nr_ioreq_pages(d) = DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE), so small VMs only allocate one page. All existing single-page paths (bufioreq, legacy clients) remain unchanged. Mark the now-unused shared_iopage_t in the public header as deprecated. Signed-off-by: Julian Vetter --- Changes in v2 - Use xvalloc_array to allocate the contigeous region - Removed unncessary includes - nr_ioreq_pages is now based on d->max_vcpus and not the HVM_MAX_VCPUS define - Reduced indentation by 1 level in hvm_alloc_ioreq_gfns - Added blank lines between declarations and statements - Added comment why we can just return in hvm_add_ioreq_gfn without rollback --- xen/arch/x86/hvm/ioreq.c | 198 ++++++++++++++++++++++++++++++++- xen/common/ioreq.c | 95 ++++++++++++---- xen/include/public/hvm/ioreq.h | 5 + xen/include/xen/ioreq.h | 13 ++- 4 files changed, 285 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index 5ebc48dbd4..a77f00dd96 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -15,6 +16,7 @@ #include #include #include +#include #include #include @@ -89,6 +91,39 @@ static gfn_t hvm_alloc_ioreq_gfn(struct ioreq_server *s) return hvm_alloc_legacy_ioreq_gfn(s); } +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, + unsigned int nr_pages) +{ + struct domain *d = s->target; + unsigned long mask; + unsigned int i, run; + + if ( nr_pages == 1 ) + return hvm_alloc_ioreq_gfn(s); + + /* Find nr_pages consecutive set bits */ + mask = d->arch.hvm.ioreq_gfn.mask; + + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) + { + if ( !test_bit(i, &mask) ) + run = 0; + else if ( ++run == nr_pages ) + { + /* Found a run - clear all bits and return base GFN */ + unsigned int start = i - nr_pages + 1; + unsigned int j; + + for ( j = start; j <= i; j++ ) + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); + + return _gfn(d->arch.hvm.ioreq_gfn.base + start); + } + } + + return INVALID_GFN; +} + static bool hvm_free_legacy_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) { @@ -121,11 +156,23 @@ static void hvm_free_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) } } +static void hvm_free_ioreq_gfns(struct ioreq_server *s, gfn_t gfn, + unsigned int nr_pages) +{ + unsigned int i; + + for ( i = 0; i < nr_pages; i++ ) + hvm_free_ioreq_gfn(s, gfn_add(gfn, i)); +} + static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return; @@ -134,16 +181,41 @@ static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) hvm_free_ioreq_gfn(s, iorp->gfn); iorp->gfn = INVALID_GFN; + return; + } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return; + + nr_pages = nr_ioreq_pages(s->target); + + for ( i = 0; i < nr_pages; i++ ) + { + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + put_page_and_type(pg); + put_page(pg); } + vunmap(s->ioreq); + s->ioreq = NULL; + + hvm_free_ioreq_gfns(s, s->ioreq_gfn, nr_pages); + s->ioreq_gfn = INVALID_GFN; } static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + gfn_t base_gfn; + mfn_t *mfns; int rc; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( iorp->page ) { /* @@ -173,30 +245,122 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) return rc; } + + /* ioreq: multi-page with contiguous VA */ + if ( s->ioreq ) + { + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return -EPERM; + return 0; + } + + if ( d->is_dying ) + return -EINVAL; + + nr_pages = nr_ioreq_pages(d); + base_gfn = hvm_alloc_ioreq_gfns(s, nr_pages); + + if ( gfn_eq(base_gfn, INVALID_GFN) ) + return -ENOMEM; + + mfns = xmalloc_array(mfn_t, nr_pages); + if ( !mfns ) + { + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); + return -ENOMEM; + } + + /* + * Use prepare_ring_for_helper() to obtain page and type references + * for each GFN. Discard its per-page VA immediately, as all pages + * will be combined into a single contiguous VA via vmap() below. + */ + for ( i = 0; i < nr_pages; i++ ) + { + struct page_info *pg; + void *va; + + rc = prepare_ring_for_helper(d, gfn_x(base_gfn) + i, &pg, &va); + if ( rc ) + goto fail; + + /* Discard per-page VA */ + unmap_domain_page_global(va); + mfns[i] = page_to_mfn(pg); + } + + /* Map all mfns as single contiguous VA */ + s->ioreq = vmap(mfns, nr_pages); + if ( !s->ioreq ) + { + rc = -ENOMEM; + goto fail; + } + + s->ioreq_gfn = base_gfn; + xfree(mfns); + + return 0; + + fail: + while ( i-- > 0 ) + { + struct page_info *pg = mfn_to_page(mfns[i]); + + put_page_and_type(pg); + put_page(pg); + } + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); + xfree(mfns); + + return rc; } static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return; if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) domain_crash(d); clear_page(iorp->va); + return; + } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return; + + nr_pages = nr_ioreq_pages(d); + + for ( i = 0; i < nr_pages; i++ ) + { + gfn_t gfn = gfn_add(s->ioreq_gfn, i); + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + if ( p2m_remove_page(d, gfn, page_to_mfn(pg), 0) ) + domain_crash(d); } + memset(s->ioreq, 0, nr_pages * PAGE_SIZE); } static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; int rc; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return 0; @@ -208,6 +372,32 @@ static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) return rc; } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return 0; + + nr_pages = nr_ioreq_pages(d); + memset(s->ioreq, 0, nr_pages * PAGE_SIZE); + + for ( i = 0; i < nr_pages; i++ ) + { + gfn_t gfn = gfn_add(s->ioreq_gfn, i); + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + rc = p2m_add_page(d, gfn, page_to_mfn(pg), 0, p2m_ram_rw); + if ( rc ) + /* + * No rollback of previously added pages: The caller + * (arch_ioreq_server_disable) has no error handling path, + * and partial failure here will be cleaned up when the + * ioreq server is eventually destroyed. + */ + return rc; + + paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn))); + } + return 0; } int arch_ioreq_server_map_pages(struct ioreq_server *s) diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c index 5d722c8d4e..0ad86d3af3 100644 --- a/xen/common/ioreq.c +++ b/xen/common/ioreq.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -95,12 +96,10 @@ static struct ioreq_server *get_ioreq_server(const struct domain *d, static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v) { - shared_iopage_t *p = s->ioreq.va; - ASSERT((v == current) || !vcpu_runnable(v)); - ASSERT(p != NULL); + ASSERT(s->ioreq != NULL); - return &p->vcpu_ioreq[v->vcpu_id]; + return &s->ioreq[v->vcpu_id]; } /* @@ -260,9 +259,32 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + struct ioreq_page *iorp; struct page_info *page; + if ( !buf ) + { + if ( s->ioreq ) + { + /* + * If a guest frame has already been mapped (which may happen + * on demand if ioreq_server_get_info() is called), then + * allocating a page is not permitted. + */ + if ( !gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return -EPERM; + + return 0; + } + + s->ioreq = xvzalloc_array(ioreq_t, s->target->max_vcpus); + + return s->ioreq ? 0 : -ENOMEM; + } + + /* bufioreq: single page allocation */ + iorp = &s->bufioreq; + if ( iorp->page ) { /* @@ -309,8 +331,17 @@ static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) static void ioreq_server_free_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - struct page_info *page = iorp->page; + struct ioreq_page *iorp; + struct page_info *page; + + if ( !buf ) + { + XVFREE(s->ioreq); + return; + } + + iorp = &s->bufioreq; + page = iorp->page; if ( !page ) return; @@ -334,11 +365,29 @@ bool is_ioreq_server_page(struct domain *d, const struct page_info *page) FOR_EACH_IOREQ_SERVER(d, id, s) { - if ( (s->ioreq.page == page) || (s->bufioreq.page == page) ) + if ( s->bufioreq.page == page ) { found = true; break; } + + if ( s->ioreq ) + { + unsigned int i; + + for ( i = 0; i < nr_ioreq_pages(d); i++ ) + { + if ( vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE) == page ) + { + found = true; + break; + } + } + + if ( found ) + break; + } } rspin_unlock(&d->ioreq_server.lock); @@ -351,7 +400,7 @@ static void ioreq_server_update_evtchn(struct ioreq_server *s, { ASSERT(spin_is_locked(&s->lock)); - if ( s->ioreq.va != NULL ) + if ( s->ioreq != NULL ) { ioreq_t *p = get_ioreq(s, sv->vcpu); @@ -591,7 +640,7 @@ static int ioreq_server_init(struct ioreq_server *s, INIT_LIST_HEAD(&s->ioreq_vcpu_list); spin_lock_init(&s->bufioreq_lock); - s->ioreq.gfn = INVALID_GFN; + s->ioreq_gfn = INVALID_GFN; s->bufioreq.gfn = INVALID_GFN; rc = ioreq_server_alloc_rangesets(s, id); @@ -770,7 +819,7 @@ static int ioreq_server_get_info(struct domain *d, ioservid_t id, } if ( ioreq_gfn ) - *ioreq_gfn = gfn_x(s->ioreq.gfn); + *ioreq_gfn = gfn_x(s->ioreq_gfn); if ( HANDLE_BUFIOREQ(s) ) { @@ -813,26 +862,30 @@ int ioreq_server_get_frame(struct domain *d, ioservid_t id, if ( rc ) goto out; - switch ( idx ) + if ( idx == XENMEM_resource_ioreq_server_frame_bufioreq) { - case XENMEM_resource_ioreq_server_frame_bufioreq: rc = -ENOENT; if ( !HANDLE_BUFIOREQ(s) ) goto out; *mfn = page_to_mfn(s->bufioreq.page); rc = 0; - break; - - case XENMEM_resource_ioreq_server_frame_ioreq(0): - *mfn = page_to_mfn(s->ioreq.page); - rc = 0; - break; + } + else if (( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) ) && + ( idx < XENMEM_resource_ioreq_server_frame_ioreq(nr_ioreq_pages(d)) )) + { + unsigned int page_idx = idx - XENMEM_resource_ioreq_server_frame_ioreq(0); - default: rc = -EINVAL; - break; + if ( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) && + page_idx < nr_ioreq_pages(d) && s->ioreq ) + { + *mfn = vmap_to_mfn((char *)s->ioreq + page_idx * PAGE_SIZE); + rc = 0; + } } + else + rc = -EINVAL; out: rspin_unlock(&d->ioreq_server.lock); diff --git a/xen/include/public/hvm/ioreq.h b/xen/include/public/hvm/ioreq.h index 7a6bc760d0..1c1a9e61ae 100644 --- a/xen/include/public/hvm/ioreq.h +++ b/xen/include/public/hvm/ioreq.h @@ -49,6 +49,11 @@ struct ioreq { }; typedef struct ioreq ioreq_t; +/* + * Deprecated: shared_iopage is no longer used by Xen internally. + * The ioreq server now uses a dynamically sized ioreq_t array + * to support more than 128 vCPUs. + */ struct shared_iopage { struct ioreq vcpu_ioreq[1]; }; diff --git a/xen/include/xen/ioreq.h b/xen/include/xen/ioreq.h index e86f0869fa..a4c7621f3f 100644 --- a/xen/include/xen/ioreq.h +++ b/xen/include/xen/ioreq.h @@ -19,9 +19,19 @@ #ifndef __XEN_IOREQ_H__ #define __XEN_IOREQ_H__ +#include #include #include +#include + +/* 4096 / 32 = 128 ioreq slots per page */ +#define IOREQS_PER_PAGE (PAGE_SIZE / sizeof(ioreq_t)) + +static inline unsigned int nr_ioreq_pages(const struct domain *d) +{ + return DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE); +} struct ioreq_page { gfn_t gfn; @@ -45,7 +55,8 @@ struct ioreq_server { /* Lock to serialize toolstack modifications */ spinlock_t lock; - struct ioreq_page ioreq; + ioreq_t *ioreq; + gfn_t ioreq_gfn; struct list_head ioreq_vcpu_list; struct ioreq_page bufioreq; -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 13:44:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 13:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234161.1537488 (Exim 4.92) (envelope-from ) id 1vrytQ-0007vU-6G; Mon, 16 Feb 2026 13:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234161.1537488; Mon, 16 Feb 2026 13:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrytQ-0007vL-2K; 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charset=utf-8 Content-Transfer-Encoding: 7bit Hello Jan and Andrew, I have adressed your feedback and replaced the for loop with xvzalloc_array() in ioreq_server_alloc_mfn. This indeed simplifies the code in that function. I have also addressed the other points (indentation patch, blank lines, etc.). I just couldn't come up with a better solution for the struct ioreq_server. We now have a new member ioreq_gfn, to track the guest frame number. Any thoughts on this? Julian Vetter (3): x86/ioreq: Add missing put_page_alloc_ref(page) x86/ioreq: Prepare spacing for upcoming patch x86/ioreq: Extend ioreq server to support multiple ioreq pages xen/arch/x86/hvm/ioreq.c | 264 ++++++++++++++++++++++++++++----- xen/common/ioreq.c | 96 +++++++++--- xen/include/public/hvm/ioreq.h | 5 + xen/include/xen/ioreq.h | 13 +- 4 files changed, 323 insertions(+), 55 deletions(-) Signed-off-by: Julian Vetter -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 14:31:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 14:31:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234210.1537517 (Exim 4.92) (envelope-from ) id 1vrzd7-0007Za-4w; Mon, 16 Feb 2026 14:31:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234210.1537517; Mon, 16 Feb 2026 14:31:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrzd7-0007ZT-2N; Mon, 16 Feb 2026 14:31:17 +0000 Received: by outflank-mailman (input) for mailman id 1234210; Mon, 16 Feb 2026 14:31:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vrzd5-0007ZN-Pa for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 14:31:15 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1e7d491a-0b44-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 15:31:02 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4836e3288cdso19924675e9.0 for ; Mon, 16 Feb 2026 06:31:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 06:31:01 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 15:31:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] x86/ioreq: Add missing put_page_alloc_ref(page) To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216134334.3510048-1-julian.vetter@vates.tech> <20260216134334.3510048-2-julian.vetter@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260216134334.3510048-2-julian.vetter@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 14:43, Julian Vetter wrote: > The page was allocated with MEMF_no_refcount. The MEMF_no_refcount flag > means the page is allocated without a regular reference, but it still > has the allocation reference. If get_page_and_type() fails, we still > need to release the allocation reference. Otherwise the page would leak. > domain_crash() doesn't free individual pages; it just marks the domain > for destruction. The domain teardown will eventually free domain heap > pages, but only those it can find. A page with a dangling alloc ref > would prevent the page from being fully freed during domain cleanup. > > Signed-off-by: Julian Vetter Yes, it would be nice if this could be done, but have you read the big comment in put_page_alloc_ref()? We have no choice here, ... > --- a/xen/common/ioreq.c > +++ b/xen/common/ioreq.c > @@ -287,6 +287,7 @@ static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) > * The domain can't possibly know about this page yet, so failure > * here is a clear indication of something fishy going on. > */ > + put_page_alloc_ref(page); > domain_crash(s->emulator); > return -ENODATA; > } ... we need to leak the page. (Perhaps the comment could have done with saying so explicitly.) Hence why the domain is being crashed, so the leak cannot easily accumulate. Otherwise simply returning an error here would be quite fine. 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Arrays of .long also don't need aligning to 8 bytes > (which would have happened when BITS_PER_LONG is 64 and SYMBOLS_ORIGIN is > not defined). > > Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné Thanks, Roger. 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Mon, 16 Feb 2026 06:57:51 -0800 (PST) Message-ID: <1edea973-4ca1-491f-a9bf-9c2b09bbe615@suse.com> Date: Mon, 16 Feb 2026 15:57:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/6] xen/riscv: implement copy_to_guest_phys() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 17:21, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/guestcopy.c > @@ -0,0 +1,112 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > + > +#include > + > +#define COPY_from_guest (0U << 0) > +#define COPY_to_guest (1U << 0) > +#define COPY_ipa (0U << 1) Like already asked elsewhere - is "ipa" a term commonly in use on RISC-V? To me it's Arm terminology, which you don't want to copy as is. Also, don't you prefer to use BIT() everywhere else? > +#define COPY_linear (1U << 1) > + > +typedef union > +{ > + struct > + { > + struct vcpu *v; > + } gva; > + > + struct > + { > + struct domain *d; > + } gpa; > +} copy_info_t; > + > +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) > +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) > + > +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, The caller has to pass in a domain here. I therefore recommend against use of copy_info_t for this function. Or wait, this is misleading, as the consuming part ... > + bool linear, bool write) > +{ > + p2m_type_t p2mt; > + struct page_info *page; > + > + if ( linear ) > + BUG_ON("unimplemeted\n"); ... of "linear" is missing here. In any event, this one please shorter as: BUG_ON(linear); > + page = get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_ALLOC); > + > + if ( !page ) > + return NULL; > + > + if ( !p2m_is_ram(p2mt) ) > + { > + put_page(page); > + return NULL; > + } > + > + return page; > +} The "write" function parameter also is unused, but there's no BUG_ON() for that one? Imo the p2m_is_ram() check isn't thorough enough (on the Arm original): p2m_ram_ro shouldn't be allowed when "write" is true. As soon as you gain p2m_ram_ro on RISC-V, things will need updating here as well. Perhaps best to leave a note. > +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, > + copy_info_t info, unsigned int flags) Why an "unsigned long" return value when ... > +{ > + unsigned int offset = PAGE_OFFSET(addr); > + > + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); > + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); > + > + while ( len ) > + { > + void *p; > + unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset); > + struct page_info *page; > + > + page = translate_get_page(info, addr, flags & COPY_linear, > + flags & COPY_to_guest); > + if ( page == NULL ) > + return len; ... only an "unsigned int" (or 0 further down) is returned? Same question for copy_to_guest_phys() below then. > + p = __map_domain_page(page); > + p += offset; > + if ( flags & COPY_to_guest ) > + { > + /* > + * buf will be NULL when the caller request to zero the > + * guest memory. > + */ > + if ( buf ) > + memcpy(p, buf, size); > + else > + memset(p, 0, size); > + } > + else > + memcpy(buf, p, size); > + > + unmap_domain_page(p - offset); > + put_page(page); > + len -= size; > + buf += size; > + addr += size; > + > + /* > + * After the first iteration, guest virtual address is correctly > + * aligned to PAGE_SIZE. > + */ > + offset = 0; > + } > + > + return 0; > +} > + > +unsigned long copy_to_guest_phys(struct domain *d, > + paddr_t gpa, > + void *buf, > + unsigned int len) May I suggest to make good use of line length, just like how copy_guest() does? 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Nor do we need to > check whether the idle domain is shutting down - it never will. > > Signed-off-by: Jan Beulich > --- > For vmtrace_alloc_buffer() adding the conditional may be questionable: The > function checks d->vmtrace_size first thing, bailing immediately when it's > zero (which it always will be for the idle domain). Oh, I notice this now (after having written the comment below). I would then add a comment rather than the extra check. And possibly an ASSERT(!is_idle_domain(d)); inside of `vmtrace_alloc_buffer()` after the vmtrace_size check. > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -427,12 +427,6 @@ struct vcpu *vcpu_create(struct domain * > v->vcpu_id = vcpu_id; > v->dirty_cpu = VCPU_CPU_CLEAN; > > - rwlock_init(&v->virq_lock); > - > - tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); > - > - grant_table_init_vcpu(v); > - > if ( is_idle_domain(d) ) > { > v->runstate.state = RUNSTATE_running; > @@ -440,6 +434,12 @@ struct vcpu *vcpu_create(struct domain * > } > else > { > + rwlock_init(&v->virq_lock); > + > + tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); > + > + grant_table_init_vcpu(v); > + > v->runstate.state = RUNSTATE_offline; > v->runstate.state_entry_time = NOW(); > set_bit(_VPF_down, &v->pause_flags); > @@ -450,7 +450,7 @@ struct vcpu *vcpu_create(struct domain * > if ( sched_init_vcpu(v) != 0 ) > goto fail_wq; > > - if ( vmtrace_alloc_buffer(v) != 0 ) > + if ( !is_idle_domain(d) && vmtrace_alloc_buffer(v) != 0 ) > goto fail_wq; There's an existing issue here, the usage of fail_rq is wrong here. It should use fail_sched instead. However I wonder whether we want to move the `vmtrace_alloc_buffer()` call inside the existing `else {` branch of the is_idle_domain() condition, as to avoid this extra is_idle_domain() check here? Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:09:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:09:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234255.1537558 (Exim 4.92) (envelope-from ) id 1vs0Do-0004xu-JL; Mon, 16 Feb 2026 15:09:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234255.1537558; Mon, 16 Feb 2026 15:09:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0Do-0004xn-GO; Mon, 16 Feb 2026 15:09:12 +0000 Received: by outflank-mailman (input) for mailman id 1234255; Mon, 16 Feb 2026 15:09:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0Dm-0004xf-HK for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:09:10 +0000 Received: from mail187-15.suw11.mandrillapp.com (mail187-15.suw11.mandrillapp.com [198.2.187.15]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7127173b-0b49-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 16:09:09 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-15.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fF5lR4ctPzPm0PmZ for ; Mon, 16 Feb 2026 15:09:07 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 5066572243034d21a92e9fbd6e222e04; Mon, 16 Feb 2026 15:09:07 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7127173b-0b49-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771254547; x=1771524547; bh=MNh9V4qzhn2ZOOkfvPZMwx5Ld1KsvgvSoYa8cKgDe8M=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=AvXpHF0kTk6Uhw1AQ/kcv+N/GJyi05LRRWj6cENq0a5PAN9xfuntGvfutNxpVG4Ud OjLVQiAQBOfIdXxBlVNtBX5K4WFPWZUjTnBr+daBpXOhjJPwJRX3q7x70ywnVlG4s8 A2xnQrC/2ets+RTwkvF4/zp/j7bvH6s4kQvSN4X3q9g6VF1Z5cwCVlryExSor9EgZ3 wOMQsDBPwz/N96bMDEEmyu5qrZdSk5i3kH7LeD+OEMgBjFF9LtKN4UZ1mon1McrDTp pCDwHT7ro+jvONFA8vlHsB+1hegVMoZQ4dw3+5bFvVUEQRNaaPU5nM9S7vCMxLivR1 NPZE4yOlRQHqA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771254547; x=1771515047; i=teddy.astie@vates.tech; bh=MNh9V4qzhn2ZOOkfvPZMwx5Ld1KsvgvSoYa8cKgDe8M=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=I0cAxBS+QqRl/lEqnvZKVDVxpBCqLLYpsjYfXPGDbuPQQdqU89D3cfwdjeAPoCi+U YOpiwuPMLV01LNR4bba9/w2Fh0FvYpMZSNJOLDGG5wd2UvIBnNwG0Pu2WlBE14YLsm LnaYvrGyJMy6vJzqmzBEwB371hC/4IuhzA4Oog3Tn6Cq7HtXD1a8xRVU5RcXExwuHm 7zJk66cwi3sHo4thwJhc+kU1wK3x496cvkoIhnLoX4uZe36B4W4nLqaybTRzxA4q5w NY5IcXXV7uhOSLuLx9b/OllmX1Mvm+V2FTbdKwLDITY9eW7CAk8dsCLgLgngNFVrCW U40aTdDsR7Eog== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH]=20x86/platform:=20Consider=20PTM=20for=20exposing=20package-related=20MSR?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771254546639 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Tu Dinh" Message-Id: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.5066572243034d21a92e9fbd6e222e04?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260216:md Date: Mon, 16 Feb 2026 15:09:07 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Package-related MSR is actually gated behind "PTM" CPUID flag rather than "DTS" one. Make sure we check the right CPUID for package-related MSR. Check for either DTS or PTM for MSR_TEMPERATURE_TARGET. The only visible difference in practice would be that EPERM would now be reported instead of EFAULT if we tried accessing the package MSR on a platform that doesn't have it. Amends: 615c9f3f820 ("x86/platform: Expose DTS sensors MSR") Reported-by: Tu Dinh Signed-off-by: Teddy Astie --- xen/arch/x86/platform_hypercall.c | 5 ++++- xen/include/xen/lib/x86/cpu-policy.h | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index c6c5135806..a52fed3bd6 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -89,9 +89,12 @@ static bool msr_read_allowed(unsigned int msr) return cpu_has_srbds_ctrl; case MSR_IA32_THERM_STATUS: + return host_cpu_policy.basic.digital_temp_sensor; case MSR_TEMPERATURE_TARGET: + return host_cpu_policy.basic.digital_temp_sensor || + host_cpu_policy.basic.package_therm_management; case MSR_PACKAGE_THERM_STATUS: - return host_cpu_policy.basic.digital_temp_sensor; + return host_cpu_policy.basic.package_therm_management; } if ( ppin_msr && msr == ppin_msr ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index db8d035589..d9d57e932a 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -132,7 +132,7 @@ struct cpu_policy :1, :1, :1, - :1, + package_therm_management:1, hwp:1, hwp_interrupt:1, hwp_activity_window:1, -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:20:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:20:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234268.1537568 (Exim 4.92) (envelope-from ) id 1vs0Oa-0007gQ-Ie; Mon, 16 Feb 2026 15:20:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234268.1537568; Mon, 16 Feb 2026 15:20:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0Oa-0007gJ-Fi; Mon, 16 Feb 2026 15:20:20 +0000 Received: by outflank-mailman (input) for mailman id 1234268; Mon, 16 Feb 2026 15:20:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0OZ-0007gB-OP for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:20:19 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ff9b04db-0b4a-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 16:20:17 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-436317c80f7so3596542f8f.1 for ; Mon, 16 Feb 2026 07:20:17 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fixes: 1661158723a ("xen/arm: Extend copy_to_guest to support copying from/to guest physical address") Signed-off-by: Jan Beulich --- What exactly p2m_ram_ro means on Arm is unclear: The comment next to its definition says one thing, its use in get_page_from_gfn() says another. (I remember raising this point before, i.e. it feels a little odd that the ambiguity still exists.) The patch here assumes the comment is what is wrong. --- a/xen/arch/arm/guestcopy.c +++ b/xen/arch/arm/guestcopy.c @@ -44,7 +44,7 @@ static struct page_info *translate_get_p if ( !page ) return NULL; - if ( !p2m_is_ram(p2mt) ) + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) { put_page(page); return NULL; From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:29:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:29:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234277.1537579 (Exim 4.92) (envelope-from ) id 1vs0XM-0008LH-Cr; Mon, 16 Feb 2026 15:29:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234277.1537579; Mon, 16 Feb 2026 15:29:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0XM-0008LA-8p; Mon, 16 Feb 2026 15:29:24 +0000 Received: by outflank-mailman (input) for mailman id 1234277; Mon, 16 Feb 2026 15:29:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0XK-0008L4-P9 for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:29:22 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 43af359d-0b4c-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 16:29:20 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4837907f535so21016725e9.3 for ; Mon, 16 Feb 2026 07:29:20 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 07:29:20 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 16:29:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] domain: skip more stuff for idle's vCPU-s in vcpu_create() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 16:06, Roger Pau Monné wrote: > On Wed, Nov 26, 2025 at 11:31:46AM +0100, Jan Beulich wrote: >> Nothing hypercall-related needs setting up there. Nor do we need to >> check whether the idle domain is shutting down - it never will. >> >> Signed-off-by: Jan Beulich >> --- >> For vmtrace_alloc_buffer() adding the conditional may be questionable: The >> function checks d->vmtrace_size first thing, bailing immediately when it's >> zero (which it always will be for the idle domain). > > Oh, I notice this now (after having written the comment below). I > would then add a comment rather than the extra check. And possibly an > ASSERT(!is_idle_domain(d)); inside of `vmtrace_alloc_buffer()` after > the vmtrace_size check. Hmm, we could move the call anyway, as you ... >> @@ -450,7 +450,7 @@ struct vcpu *vcpu_create(struct domain * >> if ( sched_init_vcpu(v) != 0 ) >> goto fail_wq; >> >> - if ( vmtrace_alloc_buffer(v) != 0 ) >> + if ( !is_idle_domain(d) && vmtrace_alloc_buffer(v) != 0 ) >> goto fail_wq; > > There's an existing issue here, the usage of fail_rq is wrong here. > It should use fail_sched instead. However I wonder whether we want to > move the `vmtrace_alloc_buffer()` call inside the existing `else {` > branch of the is_idle_domain() condition, as to avoid this extra > is_idle_domain() check here? ... suggest here, thus dealing with the wrong label use at the same time. Since this change will want backporting, I guess I'll move that to a separate patch, though. (I don't think I'll bother with adding an assertion in the function.) Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:35:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:35:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234289.1537587 (Exim 4.92) (envelope-from ) id 1vs0cr-0001aB-23; Mon, 16 Feb 2026 15:35:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234289.1537587; Mon, 16 Feb 2026 15:35:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0cq-0001a4-VY; Mon, 16 Feb 2026 15:35:04 +0000 Received: by outflank-mailman (input) for mailman id 1234289; Mon, 16 Feb 2026 15:35:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0cp-0001Zy-7x for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:35:03 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0ec7dc4b-0b4d-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 16:35:01 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4834826e555so34132445e9.2 for ; Mon, 16 Feb 2026 07:35:01 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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On context switch-in, restore HGATP and VSATP in the >> required order. >> >> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >> only when required (e.g. on VMID reuse or generation change). >> >> This provides the necessary infrastructure for correct p2m context switching >> on RISC-V. >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v3: >> - Add comment above p2m_ctxt_switch_{to, from}(). > I find these and other speculation related comments problematic: You can't > prevent every kind of speculation that way, yet all these comments are > written as if that was the case. What I think you mean in all cases is > speculation using the wrong set of page tables? According to the RISC-V spec: No mechanism is provided to atomically change vsatp and hgatp together. Hence, to prevent speculative execution causing one guest’s VS-stage translations to be cached under another guest’s VMID, world-switch code should zero vsatp, then swap hgatp, then finally write the new vsatp value Based on that my understand is that the following code could provide an issue: (1) csr_write(CSR_SEPC, guest_b->sepc);   ...   (2) csr_write(CSR_VSATP, 0);   csr_write(CSR_HATP, guest_b->hgatp);   csr_write(CSR_VSATP, guest_b->vsatp); As IIUC speculation could happen between (1) and (2) and we could have some VS-stage translations connected to SEPC'c of guest B but with address from guest A page tables. So just to be sure that such isuse won't happen I wrote a comment that first VSATP, then others CSRs then setting hgatp and vsatp for new guest. > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >> >> return get_page(page, p2m->domain) ? page : NULL; >> } >> + >> +/* Should be called before other CSRs are stored to avoid speculation */ >> +void p2m_ctxt_switch_from(struct vcpu *p) > What interaction with the storing of other CSRs would be problematic? Please, look at the reply above. > >> +{ >> + if ( is_idle_vcpu(p) ) >> + return; >> + >> + /* >> + * No mechanism is provided to atomically change vsatp and hgatp >> + * together. Hence, to prevent speculative execution causing one >> + * guest’s VS-stage translations to be cached under another guest’s >> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >> + * finally write the new vsatp value what will be done in >> + * p2m_handle_vmenter(). >> + */ >> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >> + >> + /* >> + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() >> + * or/and in p2m_handle_vmenter(). >> + */ >> +} >> + >> +/* Should be called after other CSRs are restored to avoid speculation */ >> +void p2m_ctxt_switch_to(struct vcpu *n) > Same question here. > >> +{ >> + struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); >> + >> + if ( is_idle_vcpu(n) ) >> + return; >> + >> + csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); >> + /* >> + * As VMID is unique per vCPU and just re-used here thereby there is no >> + * need for G-stage TLB flush here. >> + */ >> + >> + csr_write(CSR_VSATP, n->arch.vsatp); >> + /* >> + * As at the start of context switch VSATP were set to 0, so no speculation >> + * could happen thereby there is no need for VS TLB flush here. >> + */ >> +} >> + >> +void p2m_handle_vmenter(void) >> +{ >> + struct vcpu *c = current; > Can you please stick to conventional names, i.e. "curr" here? Sure, I will do that. Also, then I have update in some other patches the name of similar variable. > >> + struct p2m_domain *p2m = p2m_get_hostp2m(c->domain); >> + struct vcpu_vmid *p_vmid = &c->arch.vmid; >> + uint16_t old_vmid, new_vmid; > Nit: No real need for a fixed-width type here? It could be just 'unsigned int' or 'unsigned short'. > >> + bool need_flush; >> + >> + BUG_ON(is_idle_vcpu(current)); >> + >> + old_vmid = p_vmid->vmid; >> + need_flush = vmid_handle_vmenter(p_vmid); >> + new_vmid = p_vmid->vmid; >> + >> +#ifdef P2M_DEBUG >> + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", >> + c, old_vmid, new_vmid, need_flush); >> +#endif >> + >> + if ( old_vmid != new_vmid ) >> + csr_write(CSR_HGATP, construct_hgatp(p2m, p_vmid->vmid)); >> + >> + if ( unlikely(need_flush) ) >> + { >> + local_hfence_gvma_all(); >> + flush_tlb_guest_local(); >> + } > Why would the latter be needed here at all? And if it was needed, why > would it depend on whether a VMID roll-over occurred? I misread a spec for the case when implementation uses two TLBs: one that maps guest virtual addresses to guest physical addresses, and another that maps guest physical addresses to supervisor physical addresses, that it should be HFENCE.VVMA, but it is written that HFENCE.GVMA. So flush_tlb_guest_local() should be dropped here. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:45:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:45:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234303.1537597 (Exim 4.92) (envelope-from ) id 1vs0n3-0003La-0H; Mon, 16 Feb 2026 15:45:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234303.1537597; Mon, 16 Feb 2026 15:45:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0n2-0003LT-Tx; Mon, 16 Feb 2026 15:45:36 +0000 Received: by outflank-mailman (input) for mailman id 1234303; Mon, 16 Feb 2026 15:45:35 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0n1-0003Ka-5n for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:45:35 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 875100d6-0b4e-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 16:45:33 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-4806ce0f97bso25368435e9.0 for ; Mon, 16 Feb 2026 07:45:33 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 07:45:32 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 16:45:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0f7e5a73-a574-4aa2-80c7-b45d08b9d6b0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 16:34, Oleksii Kurochko wrote: > On 2/16/26 12:50 PM, Jan Beulich wrote: >> On 13.02.2026 17:29, Oleksii Kurochko wrote: >>> Introduce helpers to manage VS-stage and G-stage translation state during >>> vCPU context switches. >>> >>> As VSATP and HGATP cannot be updated atomically, clear VSATP on context >>> switch-out to prevent speculative VS-stage translations from being associated >>> with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the >>> required order. >>> >>> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >>> only when required (e.g. on VMID reuse or generation change). >>> >>> This provides the necessary infrastructure for correct p2m context switching >>> on RISC-V. >>> >>> Signed-off-by: Oleksii Kurochko >>> --- >>> Changes in v3: >>> - Add comment above p2m_ctxt_switch_{to, from}(). >> I find these and other speculation related comments problematic: You can't >> prevent every kind of speculation that way, yet all these comments are >> written as if that was the case. What I think you mean in all cases is >> speculation using the wrong set of page tables? > > According to the RISC-V spec: > No mechanism is provided to atomically change vsatp and hgatp together. Hence, to > prevent speculative execution causing one guest’s VS-stage translations to be cached > under another guest’s VMID, world-switch code should zero vsatp, then swap hgatp, then > finally write the new vsatp value > > Based on that my understand is that the following code could provide an issue: > (1) csr_write(CSR_SEPC, guest_b->sepc);   ...   (2) csr_write(CSR_VSATP, > 0);   csr_write(CSR_HATP, guest_b->hgatp);   csr_write(CSR_VSATP, > guest_b->vsatp); As IIUC speculation could happen between (1) and (2) > and we could have some VS-stage translations connected to SEPC'c of > guest B but with address from guest A page tables. So just to be sure > that such isuse won't happen I wrote a comment that first VSATP, then > others CSRs then setting hgatp and vsatp for new guest. This reply doesn't address the point raised above, it also ... >>> --- a/xen/arch/riscv/p2m.c >>> +++ b/xen/arch/riscv/p2m.c >>> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>> >>> return get_page(page, p2m->domain) ? page : NULL; >>> } >>> + >>> +/* Should be called before other CSRs are stored to avoid speculation */ >>> +void p2m_ctxt_switch_from(struct vcpu *p) >> What interaction with the storing of other CSRs would be problematic? > > Please, look at the reply above. ... doesn't apply here, but ... >>> +{ >>> + if ( is_idle_vcpu(p) ) >>> + return; >>> + >>> + /* >>> + * No mechanism is provided to atomically change vsatp and hgatp >>> + * together. Hence, to prevent speculative execution causing one >>> + * guest’s VS-stage translations to be cached under another guest’s >>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>> + * finally write the new vsatp value what will be done in >>> + * p2m_handle_vmenter(). >>> + */ >>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>> + >>> + /* >>> + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() >>> + * or/and in p2m_handle_vmenter(). >>> + */ >>> +} >>> + >>> +/* Should be called after other CSRs are restored to avoid speculation */ >>> +void p2m_ctxt_switch_to(struct vcpu *n) >> Same question here. ... it addresses this point. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:52:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:52:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234314.1537607 (Exim 4.92) (envelope-from ) id 1vs0tF-00052Q-LL; Mon, 16 Feb 2026 15:52:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234314.1537607; Mon, 16 Feb 2026 15:52:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0tF-00052J-Ii; Mon, 16 Feb 2026 15:52:01 +0000 Received: by outflank-mailman (input) for mailman id 1234314; Mon, 16 Feb 2026 15:52:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0tE-00052B-CI for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:52:00 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 691d7379-0b4f-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 16:51:52 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-482f454be5bso49922645e9.0 for ; Mon, 16 Feb 2026 07:51:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Instead of correcting the label, move the invocation up a little, to also avoid it altogether for the idle domain (where ->vmtrace_size would be zero, and hence the function would bail right away anyway). Fixes: 217dd79ee292 ("xen/domain: Add vmtrace_size domain creation parameter") Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -493,14 +493,14 @@ struct vcpu *vcpu_create(struct domain * set_bit(_VPF_down, &v->pause_flags); vcpu_info_reset(v); init_waitqueue_vcpu(v); + + if ( vmtrace_alloc_buffer(v) != 0 ) + goto fail_wq; } if ( sched_init_vcpu(v) != 0 ) goto fail_wq; - if ( vmtrace_alloc_buffer(v) != 0 ) - goto fail_wq; - if ( arch_vcpu_create(v) != 0 ) goto fail_sched; From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:54:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:54:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234322.1537618 (Exim 4.92) (envelope-from ) id 1vs0vg-0005Zs-19; Mon, 16 Feb 2026 15:54:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234322.1537618; Mon, 16 Feb 2026 15:54:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0vf-0005Zl-UP; Mon, 16 Feb 2026 15:54:31 +0000 Received: by outflank-mailman (input) for mailman id 1234322; Mon, 16 Feb 2026 15:54:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0vf-0005Zd-7M for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:54:31 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c6a91eca-0b4f-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 16:54:29 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-43626796202so3077908f8f.3 for ; Mon, 16 Feb 2026 07:54:29 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Nor do we need to check whether the idle domain is shutting down - it never will. Signed-off-by: Jan Beulich --- v2: Drop vmtrace_alloc_buffer() part. --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -475,12 +475,6 @@ struct vcpu *vcpu_create(struct domain * v->vcpu_id = vcpu_id; v->dirty_cpu = VCPU_CPU_CLEAN; - rwlock_init(&v->virq_lock); - - tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); - - grant_table_init_vcpu(v); - if ( is_idle_domain(d) ) { v->runstate.state = RUNSTATE_running; @@ -488,6 +482,12 @@ struct vcpu *vcpu_create(struct domain * } else { + rwlock_init(&v->virq_lock); + + tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); + + grant_table_init_vcpu(v); + v->runstate.state = RUNSTATE_offline; v->runstate.state_entry_time = NOW(); set_bit(_VPF_down, &v->pause_flags); @@ -516,7 +516,8 @@ struct vcpu *vcpu_create(struct domain * } /* Must be called after making new vcpu visible to for_each_vcpu(). */ - vcpu_check_shutdown(v); + if ( !is_idle_domain(d) ) + vcpu_check_shutdown(v); return v; From xen-devel-bounces@lists.xenproject.org Mon Feb 16 15:57:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 15:57:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234336.1537628 (Exim 4.92) (envelope-from ) id 1vs0yj-0006HD-ID; Mon, 16 Feb 2026 15:57:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234336.1537628; Mon, 16 Feb 2026 15:57:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0yj-0006H6-F4; Mon, 16 Feb 2026 15:57:41 +0000 Received: by outflank-mailman (input) for mailman id 1234336; Mon, 16 Feb 2026 15:57:40 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs0yi-0006Fa-1v for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 15:57:40 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 37cb7dc7-0b50-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 16:57:38 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-43590777e22so2021885f8f.3 for ; Mon, 16 Feb 2026 07:57:38 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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On context switch-in, restore HGATP and VSATP in the >>>> required order. >>>> >>>> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >>>> only when required (e.g. on VMID reuse or generation change). >>>> >>>> This provides the necessary infrastructure for correct p2m context switching >>>> on RISC-V. >>>> >>>> Signed-off-by: Oleksii Kurochko >>>> --- >>>> Changes in v3: >>>> - Add comment above p2m_ctxt_switch_{to, from}(). >>> I find these and other speculation related comments problematic: You can't >>> prevent every kind of speculation that way, yet all these comments are >>> written as if that was the case. What I think you mean in all cases is >>> speculation using the wrong set of page tables? >> According to the RISC-V spec: >> No mechanism is provided to atomically change vsatp and hgatp together. Hence, to >> prevent speculative execution causing one guest’s VS-stage translations to be cached >> under another guest’s VMID, world-switch code should zero vsatp, then swap hgatp, then >> finally write the new vsatp value >> >> Based on that my understand is that the following code could provide an issue: >> (1) csr_write(CSR_SEPC, guest_b->sepc);   ...   (2) csr_write(CSR_VSATP, >> 0);   csr_write(CSR_HATP, guest_b->hgatp);   csr_write(CSR_VSATP, >> guest_b->vsatp); As IIUC speculation could happen between (1) and (2) >> and we could have some VS-stage translations connected to SEPC'c of >> guest B but with address from guest A page tables. So just to be sure >> that such isuse won't happen I wrote a comment that first VSATP, then >> others CSRs then setting hgatp and vsatp for new guest. > This reply doesn't address the point raised above, it also ... Okay, then just answering on a question above directly - yes, it is about the using of the wrong set of page tables. (what I tried to describe in the example above) > >>>> --- a/xen/arch/riscv/p2m.c >>>> +++ b/xen/arch/riscv/p2m.c >>>> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>>> >>>> return get_page(page, p2m->domain) ? page : NULL; >>>> } >>>> + >>>> +/* Should be called before other CSRs are stored to avoid speculation */ >>>> +void p2m_ctxt_switch_from(struct vcpu *p) >>> What interaction with the storing of other CSRs would be problematic? >> Please, look at the reply above. > ... doesn't apply here, but ... Probably then I misunderstood your question. Technically, it wouldn't problematic to write CSRs in any order (even we can ignore setting of VSTAP to 0), but it will (at least, based on example above) lead to that we will want to have TLBs flush. ~ Oleksii > >>>> +{ >>>> + if ( is_idle_vcpu(p) ) >>>> + return; >>>> + >>>> + /* >>>> + * No mechanism is provided to atomically change vsatp and hgatp >>>> + * together. Hence, to prevent speculative execution causing one >>>> + * guest’s VS-stage translations to be cached under another guest’s >>>> + * VMID, world-switch code should zero vsatp, then swap hgatp, then >>>> + * finally write the new vsatp value what will be done in >>>> + * p2m_handle_vmenter(). >>>> + */ >>>> + p->arch.vsatp = csr_swap(CSR_VSATP, 0); >>>> + >>>> + /* >>>> + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() >>>> + * or/and in p2m_handle_vmenter(). >>>> + */ >>>> +} >>>> + >>>> +/* Should be called after other CSRs are restored to avoid speculation */ >>>> +void p2m_ctxt_switch_to(struct vcpu *n) >>> Same question here. > ... it addresses this point. > > Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 16 16:14:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 16:14:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234347.1537637 (Exim 4.92) (envelope-from ) id 1vs1ES-0001F3-R9; Mon, 16 Feb 2026 16:13:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234347.1537637; Mon, 16 Feb 2026 16:13:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1ES-0001Ew-OT; Mon, 16 Feb 2026 16:13:56 +0000 Received: by outflank-mailman (input) for mailman id 1234347; Mon, 16 Feb 2026 16:13:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1ER-0001Ep-3i for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 16:13:55 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7c7df79a-0b52-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 17:13:53 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 76AA98111991; Mon, 16 Feb 2026 11:13:26 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7c7df79a-0b52-11f1-b163-2bf370ae4941 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: teddy.astie@vates.tech, roger.pau@citrix.com, jbeulich@suse.com, jason.andryuk@amd.com Subject: Re: Re: [PATCH v3 2/2] x86/svm: Use the virtual NMI when available Date: Mon, 16 Feb 2026 16:10:11 +0000 Message-ID: <20260216161023.148269-1-abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On 16/02/2026 10:15 am, Andrew Cooper wrote: >So what happens to the NMI we're trying to inject when NMIs are >currently blocked? Ah, I see this... The handling flow will eventually land on the function svm_enable_intr_window with HVM_INTR_SHADOW_NMI. The logic inside the function svm_enable_intr_window will drive it to create a vintr and set up the VMCB to intercept that created vintr. I see that the code logic in svm_enable_intr_window should be extended to skip creating such vintr and just return the same as the handling with Event injected NMI when the GENERAL1_INTERCEPT_IRET is already set. >~Andrew --Abdelkareem From xen-devel-bounces@lists.xenproject.org Mon Feb 16 16:14:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 16:14:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234362.1537647 (Exim 4.92) (envelope-from ) id 1vs1Es-0001hr-2c; Mon, 16 Feb 2026 16:14:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234362.1537647; Mon, 16 Feb 2026 16:14:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1Es-0001hk-06; Mon, 16 Feb 2026 16:14:22 +0000 Received: by outflank-mailman (input) for mailman id 1234362; Mon, 16 Feb 2026 16:14:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1Ep-0001Xs-T1 for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 16:14:19 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 896e6271-0b52-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 17:14:14 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-4359249bbacso3622809f8f.0 for ; Mon, 16 Feb 2026 08:14:14 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 08:14:14 -0800 (PST) Message-ID: <2764f432-85eb-44b9-aae9-f1bce410b4b9@suse.com> Date: Mon, 16 Feb 2026 17:14:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/platform: Consider PTM for exposing package-related MSR To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tu Dinh , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 16:09, Teddy Astie wrote: > Package-related MSR is actually gated behind "PTM" CPUID flag rather than > "DTS" one. Make sure we check the right CPUID for package-related MSR. > > Check for either DTS or PTM for MSR_TEMPERATURE_TARGET. > > The only visible difference in practice would be that EPERM would now > be reported instead of EFAULT if we tried accessing the package MSR on > a platform that doesn't have it. > > Amends: 615c9f3f820 ("x86/platform: Expose DTS sensors MSR") Imo this really addresses a bug, so wants to be Fixes:. > --- a/xen/arch/x86/platform_hypercall.c > +++ b/xen/arch/x86/platform_hypercall.c > @@ -89,9 +89,12 @@ static bool msr_read_allowed(unsigned int msr) > return cpu_has_srbds_ctrl; > > case MSR_IA32_THERM_STATUS: > + return host_cpu_policy.basic.digital_temp_sensor; As per the SDM this doesn't look right either - it's CPUID.01H:EDX[22] (acpi) instead. It is the field you're after in xenpm which is tied to CPUID.06H:EAX[0] (digital_temp_sensor). > case MSR_TEMPERATURE_TARGET: > + return host_cpu_policy.basic.digital_temp_sensor || > + host_cpu_policy.basic.package_therm_management; Where in the SDM did you find this connection? (Anything made up wants commenting upon.) > case MSR_PACKAGE_THERM_STATUS: > - return host_cpu_policy.basic.digital_temp_sensor; > + return host_cpu_policy.basic.package_therm_management; > } And of course with this splitting of cases, blank lines want inserting between the case blocks. > --- a/xen/include/xen/lib/x86/cpu-policy.h > +++ b/xen/include/xen/lib/x86/cpu-policy.h > @@ -132,7 +132,7 @@ struct cpu_policy > :1, > :1, > :1, > - :1, > + package_therm_management:1, The SDM calls this PKG_THERM_MGMT; I think our naming would better match now that we decided to have everything else here named according to the SDM. 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Mon, 16 Feb 2026 08:20:13 -0800 (PST) Message-ID: Date: Mon, 16 Feb 2026 17:20:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <0f7e5a73-a574-4aa2-80c7-b45d08b9d6b0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 16:57, Oleksii Kurochko wrote: > On 2/16/26 4:45 PM, Jan Beulich wrote: >> On 16.02.2026 16:34, Oleksii Kurochko wrote: >>> On 2/16/26 12:50 PM, Jan Beulich wrote: >>>> On 13.02.2026 17:29, Oleksii Kurochko wrote: >>>>> Introduce helpers to manage VS-stage and G-stage translation state during >>>>> vCPU context switches. >>>>> >>>>> As VSATP and HGATP cannot be updated atomically, clear VSATP on context >>>>> switch-out to prevent speculative VS-stage translations from being associated >>>>> with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the >>>>> required order. >>>>> >>>>> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >>>>> only when required (e.g. on VMID reuse or generation change). >>>>> >>>>> This provides the necessary infrastructure for correct p2m context switching >>>>> on RISC-V. >>>>> >>>>> Signed-off-by: Oleksii Kurochko >>>>> --- >>>>> Changes in v3: >>>>> - Add comment above p2m_ctxt_switch_{to, from}(). >>>> I find these and other speculation related comments problematic: You can't >>>> prevent every kind of speculation that way, yet all these comments are >>>> written as if that was the case. What I think you mean in all cases is >>>> speculation using the wrong set of page tables? >>> According to the RISC-V spec: >>> No mechanism is provided to atomically change vsatp and hgatp together. Hence, to >>> prevent speculative execution causing one guest’s VS-stage translations to be cached >>> under another guest’s VMID, world-switch code should zero vsatp, then swap hgatp, then >>> finally write the new vsatp value >>> >>> Based on that my understand is that the following code could provide an issue: >>> (1) csr_write(CSR_SEPC, guest_b->sepc);   ...   (2) csr_write(CSR_VSATP, >>> 0);   csr_write(CSR_HATP, guest_b->hgatp);   csr_write(CSR_VSATP, >>> guest_b->vsatp); As IIUC speculation could happen between (1) and (2) >>> and we could have some VS-stage translations connected to SEPC'c of >>> guest B but with address from guest A page tables. So just to be sure >>> that such isuse won't happen I wrote a comment that first VSATP, then >>> others CSRs then setting hgatp and vsatp for new guest. >> This reply doesn't address the point raised above, it also ... > > Okay, then just answering on a question above directly - yes, it is about the using of > the wrong set of page tables. Which is what I'm asking to clarify in those comments. >>>>> --- a/xen/arch/riscv/p2m.c >>>>> +++ b/xen/arch/riscv/p2m.c >>>>> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>>>> >>>>> return get_page(page, p2m->domain) ? page : NULL; >>>>> } >>>>> + >>>>> +/* Should be called before other CSRs are stored to avoid speculation */ >>>>> +void p2m_ctxt_switch_from(struct vcpu *p) >>>> What interaction with the storing of other CSRs would be problematic? >>> Please, look at the reply above. >> ... doesn't apply here, but ... > > Probably then I misunderstood your question. > > Technically, it wouldn't problematic to write CSRs in any order (even we can ignore > setting of VSTAP to 0), but it will (at least, based on example above) lead to that > we will want to have TLBs flush. Why? Storing the CSRs doesn't alter the values held in those registers. Taking your earlier example with EPC, storing it ahead of clearing VSATP will leave as wide a window for speculation as will storing it afterwards. In both cases the window will close when VSATP is cleared. As per my current understanding, that is. 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Is it?  Which label do you think it ought to be? > Instead of correcting > the label, move the invocation up a little, to also avoid it altogether > for the idle domain (where ->vmtrace_size would be zero, and hence the > function would bail right away anyway). > > Fixes: 217dd79ee292 ("xen/domain: Add vmtrace_size domain creation parameter") > Reported-by: Roger Pau Monné > Signed-off-by: Jan Beulich > > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -493,14 +493,14 @@ struct vcpu *vcpu_create(struct domain * > set_bit(_VPF_down, &v->pause_flags); > vcpu_info_reset(v); > init_waitqueue_vcpu(v); > + > + if ( vmtrace_alloc_buffer(v) != 0 ) > + goto fail_wq; > } > > if ( sched_init_vcpu(v) != 0 ) > goto fail_wq; > > - if ( vmtrace_alloc_buffer(v) != 0 ) > - goto fail_wq; > - > if ( arch_vcpu_create(v) != 0 ) > goto fail_sched; > The positioning was intentional.  I just didn't get to wiring up Intel PT for Xen context yet, and tying the buffer to the idle vCPU would be the obvious choice there. The chances of getting around to that are admittedly low, so I don't mind moving the call in principle (noting that this is a wish that likely won't materialise), but the claim over the label needs resolving. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 16:31:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 16:31:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234403.1537677 (Exim 4.92) (envelope-from ) id 1vs1Vd-0005nd-PG; Mon, 16 Feb 2026 16:31:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234403.1537677; Mon, 16 Feb 2026 16:31:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1Vd-0005nW-ML; Mon, 16 Feb 2026 16:31:41 +0000 Received: by outflank-mailman (input) for mailman id 1234403; Mon, 16 Feb 2026 16:31:40 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1Vc-0005nO-4h for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 16:31:40 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f38ea5a1-0b54-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 17:31:31 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-483487335c2so31847735e9.2 for ; Mon, 16 Feb 2026 08:31:31 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 08:31:31 -0800 (PST) Message-ID: <0bca8843-9c52-4544-88a6-87ddb110095e@suse.com> Date: Mon, 16 Feb 2026 17:31:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/6] xen/riscv: add zImage kernel loading support To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <308c5bc1de15b23c643d48f975799739f44dde8d.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <308c5bc1de15b23c643d48f975799739f44dde8d.1770821989.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 17:21, Oleksii Kurochko wrote: > Introduce support for loading a Linux zImage kernel on RISC-V. Before I look here in any detail - where would a zImage come from? I can't spot any support for it in Linux'es arch/riscv/Makefile (whereas arch/arm/Makefile has such). > Note that if panic() is used instead of returning an error as common code > doesn't expect to have return code and it is something that should be > done separately. Is the "if" in this sentence a leftover from some editing of earlier different text? I can't make sense of it. Also, which "common code" do you mean? kernel_zimage_probe()'s sole caller does respect the return value (handing it on). > This prepares the RISC-V port for booting Linux guests using the common > domain build infrastructure. Again, what's "common" here? Not something x86 uses, afaict. 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Mon, 16 Feb 2026 08:36:43 -0800 (PST) Message-ID: <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> Date: Mon, 16 Feb 2026 17:36:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header To: Oleksii Kurochko Cc: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.02.2026 17:21, Oleksii Kurochko wrote: > domain_use_host_layout() is generic enough to be moved to the > common header xen/domain.h. Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -62,6 +62,22 @@ void domid_free(domid_t domid); > #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) > #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) > > +/* > + * Is the domain using the host memory layout? > + * > + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. > + * To avoid any trouble finding space, it is easier to force using the > + * host memory layout. > + * > + * The hardware domain will use the host layout regardless of > + * direct-mapped because some OS may rely on a specific address ranges > + * for the devices. > + */ > +#ifndef domain_use_host_layout > +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ > + is_hardware_domain(d)) ... is_domain_direct_mapped() isn't something that I'd like to see further proliferate in common (non-DT) code. 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Mon, 16 Feb 2026 08:39:23 -0800 (PST) Message-ID: <871a5922-9d7d-455b-8257-d583e3e47bc2@suse.com> Date: Mon, 16 Feb 2026 17:39:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] domain: move vmtrace_alloc_buffer() invocation in vcpu_create() To: Andrew Cooper Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <528578e1-6374-4fd0-9f67-0769afd2e1c6@suse.com> <50c79874-d07e-479d-80c2-7c0694a0828e@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <50c79874-d07e-479d-80c2-7c0694a0828e@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 17:29, Andrew Cooper wrote: > On 16/02/2026 3:51 pm, Jan Beulich wrote: >> The label used upon the function failing is wrong. > > Is it?  Which label do you think it ought to be? fail_sched, as Roger did point out in reply to the original other patch. After all ... >> Instead of correcting >> the label, move the invocation up a little, to also avoid it altogether >> for the idle domain (where ->vmtrace_size would be zero, and hence the >> function would bail right away anyway). >> >> Fixes: 217dd79ee292 ("xen/domain: Add vmtrace_size domain creation parameter") >> Reported-by: Roger Pau Monné >> Signed-off-by: Jan Beulich >> >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -493,14 +493,14 @@ struct vcpu *vcpu_create(struct domain * >> set_bit(_VPF_down, &v->pause_flags); >> vcpu_info_reset(v); >> init_waitqueue_vcpu(v); >> + >> + if ( vmtrace_alloc_buffer(v) != 0 ) >> + goto fail_wq; >> } >> >> if ( sched_init_vcpu(v) != 0 ) >> goto fail_wq; ... this comes first, and ... >> - if ( vmtrace_alloc_buffer(v) != 0 ) >> - goto fail_wq; >> - >> if ( arch_vcpu_create(v) != 0 ) >> goto fail_sched; ... here the correct label is used. Jan > The positioning was intentional.  I just didn't get to wiring up Intel > PT for Xen context yet, and tying the buffer to the idle vCPU would be > the obvious choice there. > > The chances of getting around to that are admittedly low, so I don't > mind moving the call in principle (noting that this is a wish that > likely won't materialise), but the claim over the label needs resolving. > > ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 16:59:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 16:59:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234440.1537709 (Exim 4.92) (envelope-from ) id 1vs1wT-0001oe-Fk; Mon, 16 Feb 2026 16:59:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234440.1537709; Mon, 16 Feb 2026 16:59:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1wT-0001oX-Bt; Mon, 16 Feb 2026 16:59:25 +0000 Received: by outflank-mailman (input) for mailman id 1234440; Mon, 16 Feb 2026 16:59:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs1wT-0001oR-1F for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 16:59:25 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d59734b8-0b58-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 17:59:19 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so38234515e9.1 for ; Mon, 16 Feb 2026 08:59:19 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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On context switch-in, restore HGATP and VSATP in the >>>>>> required order. >>>>>> >>>>>> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >>>>>> only when required (e.g. on VMID reuse or generation change). >>>>>> >>>>>> This provides the necessary infrastructure for correct p2m context switching >>>>>> on RISC-V. >>>>>> >>>>>> Signed-off-by: Oleksii Kurochko >>>>>> --- >>>>>> Changes in v3: >>>>>> - Add comment above p2m_ctxt_switch_{to, from}(). >>>>> I find these and other speculation related comments problematic: You can't >>>>> prevent every kind of speculation that way, yet all these comments are >>>>> written as if that was the case. What I think you mean in all cases is >>>>> speculation using the wrong set of page tables? >>>> According to the RISC-V spec: >>>> No mechanism is provided to atomically change vsatp and hgatp together. Hence, to >>>> prevent speculative execution causing one guest’s VS-stage translations to be cached >>>> under another guest’s VMID, world-switch code should zero vsatp, then swap hgatp, then >>>> finally write the new vsatp value >>>> >>>> Based on that my understand is that the following code could provide an issue: >>>> (1) csr_write(CSR_SEPC, guest_b->sepc);   ...   (2) csr_write(CSR_VSATP, >>>> 0);   csr_write(CSR_HATP, guest_b->hgatp);   csr_write(CSR_VSATP, >>>> guest_b->vsatp); As IIUC speculation could happen between (1) and (2) >>>> and we could have some VS-stage translations connected to SEPC'c of >>>> guest B but with address from guest A page tables. So just to be sure >>>> that such isuse won't happen I wrote a comment that first VSATP, then >>>> others CSRs then setting hgatp and vsatp for new guest. >>> This reply doesn't address the point raised above, it also ... >> Okay, then just answering on a question above directly - yes, it is about the using of >> the wrong set of page tables. > Which is what I'm asking to clarify in those comments. > >>>>>> --- a/xen/arch/riscv/p2m.c >>>>>> +++ b/xen/arch/riscv/p2m.c >>>>>> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>>>>> >>>>>> return get_page(page, p2m->domain) ? page : NULL; >>>>>> } >>>>>> + >>>>>> +/* Should be called before other CSRs are stored to avoid speculation */ >>>>>> +void p2m_ctxt_switch_from(struct vcpu *p) >>>>> What interaction with the storing of other CSRs would be problematic? >>>> Please, look at the reply above. >>> ... doesn't apply here, but ... >> Probably then I misunderstood your question. >> >> Technically, it wouldn't problematic to write CSRs in any order (even we can ignore >> setting of VSTAP to 0), but it will (at least, based on example above) lead to that >> we will want to have TLBs flush. > Why? Storing the CSRs doesn't alter the values held in those registers. > Taking your earlier example with EPC, storing it ahead of clearing VSATP > will leave as wide a window for speculation as will storing it afterwards. > In both cases the window will close when VSATP is cleared. As per my > current understanding, that is. Oh, you are right. It doesn't really matter when clearing of VSATP is happening during CSR's storing procedure as CSRs aren't changed, so it is just necessary to set VSATP to 0 before CSR's restoring. I just confused myself with my own example as it is basically about restoring but I missed that I am commenting CSR's storing procedure... Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon Feb 16 17:17:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 17:17:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234452.1537718 (Exim 4.92) (envelope-from ) id 1vs2Dr-0004d5-SM; Mon, 16 Feb 2026 17:17:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234452.1537718; Mon, 16 Feb 2026 17:17:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs2Dr-0004cy-PX; Mon, 16 Feb 2026 17:17:23 +0000 Received: by outflank-mailman (input) for mailman id 1234452; Mon, 16 Feb 2026 17:17:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs2Dr-0004cb-6p for xen-devel@lists.xenproject.org; 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>>> vcpu_info_reset(v); >>> init_waitqueue_vcpu(v); >>> + >>> + if ( vmtrace_alloc_buffer(v) != 0 ) >>> + goto fail_wq; >>> } >>> >>> if ( sched_init_vcpu(v) != 0 ) >>> goto fail_wq; > ... this comes first, and ... > >>> - if ( vmtrace_alloc_buffer(v) != 0 ) >>> - goto fail_wq; >>> - >>> if ( arch_vcpu_create(v) != 0 ) >>> goto fail_sched; > ... here the correct label is used. Eww, yes.  So multiple observations. 1) This only functions in the first place because destroy_waitqueue_vcpu() is idempotent to v->waitqueue_vcpu being NULL which covers the idle case where init_waitqueue_vcpu() was never called. 2) sched_destroy_vcpu() can be made idempotent against v->sched_unit. Then we don't need multiple labels and this all gets a lot easier to untangle. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 18:36:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 18:36:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234481.1537729 (Exim 4.92) (envelope-from ) id 1vs3SY-0005ou-8b; Mon, 16 Feb 2026 18:36:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234481.1537729; Mon, 16 Feb 2026 18:36:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs3SY-0005on-4l; Mon, 16 Feb 2026 18:36:38 +0000 Received: by outflank-mailman (input) for mailman id 1234481; Mon, 16 Feb 2026 18:36:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs3SX-0005oh-Gv for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 18:36:37 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 69226db0-0b66-11f1-9ccf-f158ae23cfc8; Mon, 16 Feb 2026 19:36:31 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id B1D7F40B5C; Mon, 16 Feb 2026 18:36:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66FE8C116C6; Mon, 16 Feb 2026 18:36:27 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 69226db0-0b66-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771266989; bh=QRv2RNDiDu27KKeWxAQIcWuH/Q4/aQSzGkg6+PP/rcA=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=WcC0nr1Ra/bOfB+zxY1lm4HYjMoRZoHzOvkX3/DsWizUm0B7RyvFJIejP3oizhkvv utEu+Hes+VWUJPZpcIcZCg8DZ8Gl/rY6K5+n6aJAcTOThDpg2u/N3XavWXKS2/wOsB moyPWPu8qIe2DIqNc+4be5jn6C31QLTiR5pUyvl+0XrqSPbholeiQxvKsORD/wnLbE UEmVyaxAQxtCYofnnTH3e065/wOKn3WLOvWB8ymN31RajvvvmHfYVr7IKMFKVDDTNQ LHTPanD94SJR7uCIdIkUOiDWsTtYx9PeMlGEr/Y0XF+2/ajseHf1kSAd3F4M86W3t2 1afBYioIUtpJg== Date: Mon, 16 Feb 2026 10:36:23 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Dominique Martinet cc: Stefano Stabellini , xen-devel@lists.xenproject.org, jgross@suse.com, v9fs@lists.linux.dev, ericvh@kernel.org, lucho@ionkov.net, linux_oss@crudebyte.com, sstabellini@kernel.org Subject: Re: [PATCH v2] 9p/xen: protect xen_9pfs_front_free against concurrent calls In-Reply-To: Message-ID: References: <20260129230348.2390470-1-stefano.stabellini@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Sun, 15 Feb 2026, Dominique Martinet wrote: > Stefano Stabellini wrote on Thu, Jan 29, 2026 at 03:03:48PM -0800: > > Changes in v2: > > - move priv->rings check above the loop > > - replace list_del_init with list_del > > It looks like I didn't reply a couple of weeks ago but I did > pick it up and just sent to Linus now. > Thanks! Thank you! From xen-devel-bounces@lists.xenproject.org Mon Feb 16 18:42:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 18:42:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234490.1537739 (Exim 4.92) (envelope-from ) id 1vs3Yc-0007OB-Ti; Mon, 16 Feb 2026 18:42:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234490.1537739; Mon, 16 Feb 2026 18:42:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs3Yc-0007O3-PF; Mon, 16 Feb 2026 18:42:54 +0000 Received: by outflank-mailman (input) for mailman id 1234490; Mon, 16 Feb 2026 18:42:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs3Yb-0007Nx-U0 for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 18:42:53 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4a1bfcf0-0b67-11f1-b163-2bf370ae4941; Mon, 16 Feb 2026 19:42:50 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 489E340DAD; Mon, 16 Feb 2026 18:42:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A9F6C116C6; Mon, 16 Feb 2026 18:42:45 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4a1bfcf0-0b67-11f1-b163-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771267367; bh=W3eerZi73M8UsHNPHnN+3bupeIQmef+WrbSYUslgQg4=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=JIXVqFzHR67j29zE0LJIL6lvxedSgWKP+/N0TPA8KrDlAtMJ5+UlzT8UvgFqJ9YOt A2kvc6t/5UiRK/Jvzom+3QpD763U9uI5J4vsh27JsDsGQedyjizGxDXDi4BISnN4gK YkkRw2o5kiCzrOItwbmpBmvMrkOIKTtW5d9iSJWe9doOHjygjTY55xp/iFaWgdbx62 KJDF0fUDwVV8jVxNdBgelIP1Jz2Yy+/p9E4JDQs6TvRXG5Gmj8oq5REi7cCAalZDRD BB6JyB3ZRr0eoUHDMe1JHCCC+EbE0KjdXsrHskqmMyuW1LPPdNXsE7dpktVBb6v9tR ZpkW3QqFXKBig== Date: Mon, 16 Feb 2026 10:42:43 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Oleksii Kurochko , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header In-Reply-To: <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> Message-ID: References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 16 Feb 2026, Jan Beulich wrote: > On 12.02.2026 17:21, Oleksii Kurochko wrote: > > domain_use_host_layout() is generic enough to be moved to the > > common header xen/domain.h. > > Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... > > > --- a/xen/include/xen/domain.h > > +++ b/xen/include/xen/domain.h > > @@ -62,6 +62,22 @@ void domid_free(domid_t domid); > > #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) > > #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) > > > > +/* > > + * Is the domain using the host memory layout? > > + * > > + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. > > + * To avoid any trouble finding space, it is easier to force using the > > + * host memory layout. > > + * > > + * The hardware domain will use the host layout regardless of > > + * direct-mapped because some OS may rely on a specific address ranges > > + * for the devices. > > + */ > > +#ifndef domain_use_host_layout > > +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ > > + is_hardware_domain(d)) > > ... is_domain_direct_mapped() isn't something that I'd like to see further > proliferate in common (non-DT) code. Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware domain) on x86 as well. In fact, we already have a working prototype, although it is not suitable for upstream yet. In addition to the PSP use case that we discussed a few months ago, where the PSP is not behind an IOMMU and therefore exchanged addresses must be 1:1 mapped, we also have a new use case. We are running the full Xen-based automotive stack on an Azure instance where SVM (vmentry and vmexit) is available, but an IOMMU is not present. All virtual machines are configured as PVH. From xen-devel-bounces@lists.xenproject.org Mon Feb 16 22:03:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 22:03:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234537.1537748 (Exim 4.92) (envelope-from ) id 1vs6gA-0005Ck-7N; Mon, 16 Feb 2026 22:02:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234537.1537748; Mon, 16 Feb 2026 22:02:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs6gA-0005Cd-45; Mon, 16 Feb 2026 22:02:54 +0000 Received: by outflank-mailman (input) for mailman id 1234537; Mon, 16 Feb 2026 22:02:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs6g8-0005CW-Rh for xen-devel@lists.xenproject.org; Mon, 16 Feb 2026 22:02:52 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3ba3a228-0b83-11f1-b164-2bf370ae4941; Mon, 16 Feb 2026 23:02:50 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771279356362254.9074161418365; Mon, 16 Feb 2026 14:02:36 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3ba3a228-0b83-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771279359; cv=none; d=zohomail.com; s=zohoarc; b=fsJigS7W0oSYt93O6uP7xjEitmWGpEzqU1BDOq81q824QpAG27qnb/s7dWSnlBl5hcLwSzkwRF9BcPdie7JxgmCBo7rklaAypVqjOtXWegirTRquPIN7azNwegLsZySmngwtdEF47HJDvvrdcWWpu/+itI2xaOrh+3oZXrEda6g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771279359; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=4VEgKRoBkaKV62x2vF6xqW5mSzNd6FYxa2E8lFTgOn4=; b=PCUwAUVZ3ovEorBfTmYjnKmDh9h1mOK0qCxxwllJSb/q6hq9wyDNz0B5DfSxH/jWofiYvuEjS//X+voQMS03zSMa9zrdlDoyINU2EhOPecvarW7QmgIqNGgNvLLsungMpvxDMEDZDSxYgFd17eDWOYhWW6mXETW9FuUYPOHhuBM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771279359; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=4VEgKRoBkaKV62x2vF6xqW5mSzNd6FYxa2E8lFTgOn4=; b=Q2nzDv9KGwZS7v97r2FYPEy6CB9nX2CwIN8D6Wc85W9x6iQNawZp8FoJGPJwtUk4 4ZFHOSIrgP27YtQkIFy7EnwA6aNRgagxjwrHa88WdOPubwsijtJsyNLSS+DNzBRmWii ZdcLzx92kthgy7j+ejFJ1mrbc2/EIBNFGUU1DKZU= From: "Daniel P. Smith" To: xen-devel@lists.xenproject.org Cc: "Daniel P. Smith" , Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [BUG] common/domctl: xsm update for get_domain_state access Date: Mon, 16 Feb 2026 16:57:48 -0500 Message-Id: <20260216215748.20398-1-dpsmith@apertussolutions.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External When using XSM Flask, passing DOMIND_INVALID will result in a NULL pointer reference from the passing of NULL as the target domain to xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the target domain is NULL opens the opportunity to circumvent the XSM get_domain_state access check. This is due to the fact that the call to xsm_domctl() for get_domain_state op is a no-op check, deferring to xsm_get_domain_state(). Modify the helper get_domain_state() to ensure the requesting domain has get_domain_state access for the target domain, whether the target domain is explicitly set or implicitly determined with a domain state search. In the case of access not being allowed for a domain found during an implicit search, the search will continue to the next domain whose state has changed. Signed-off-by: Daniel P. Smith Reported-by: Chris Rogers Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") --- xen/common/domain.c | 22 +++++++++++++++++++--- xen/common/domctl.c | 7 ++----- 2 files changed, 21 insertions(+), 8 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index de6fdf59236e..4886c59c874c 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, domid_t *domid) { - unsigned int dom; + unsigned int dom = 0; int rc = -ENOENT; struct domain *hdl; @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, if ( d ) { + rc = xsm_get_domain_state(XSM_XS_PRIV, d); + if ( rc ) + return rc; + set_domain_state_info(info, d); return 0; @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, while ( dom_state_changed ) { - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); if ( dom >= DOMID_FIRST_RESERVED ) break; - if ( test_and_clear_bit(dom, dom_state_changed) ) + if ( test_bit(dom, dom_state_changed) ) { *domid = dom; @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, if ( d ) { + rc = xsm_get_domain_state(XSM_XS_PRIV, d); + if ( rc ) + { + rcu_unlock_domain(d); + rc = -ENOENT; + dom++; + continue; + } + set_domain_state_info(info, d); rcu_unlock_domain(d); @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, else memset(info, 0, sizeof(*info)); + clear_bit(dom, dom_state_changed); rc = 0; break; } + + dom++; } out: diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 29a7726d32d0..2eedc639c72a 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) break; case XEN_DOMCTL_get_domain_state: - ret = xsm_get_domain_state(XSM_XS_PRIV, d); - if ( ret ) - break; - - copyback = 1; ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); + if ( !ret ) + copyback = 1; break; default: -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Mon Feb 16 22:23:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 22:23:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234548.1537757 (Exim 4.92) (envelope-from ) id 1vs6zi-0007xW-NB; Mon, 16 Feb 2026 22:23:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234548.1537757; Mon, 16 Feb 2026 22:23:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs6zi-0007xP-Jz; Mon, 16 Feb 2026 22:23:06 +0000 Received: by outflank-mailman (input) for mailman id 1234548; Mon, 16 Feb 2026 22:23:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs6zh-0007xJ-Vt for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 16/02/2026 =C3=A0 17:15, Jan Beulich a =C3=A9crit=C2=A0: > On 16.02.2026 16:09, Teddy Astie wrote: >> Package-related MSR is actually gated behind "PTM" CPUID flag rather tha= n >> "DTS" one. Make sure we check the right CPUID for package-related MSR. >> >> Check for either DTS or PTM for MSR_TEMPERATURE_TARGET. >> >> The only visible difference in practice would be that EPERM would now >> be reported instead of EFAULT if we tried accessing the package MSR on >> a platform that doesn't have it. >> >> Amends: 615c9f3f820 ("x86/platform: Expose DTS sensors MSR") > > Imo this really addresses a bug, so wants to be Fixes:. > I wasn't so sure between Fixes and Amends; but Fixes is ok for me. >> --- a/xen/arch/x86/platform_hypercall.c >> +++ b/xen/arch/x86/platform_hypercall.c >> @@ -89,9 +89,12 @@ static bool msr_read_allowed(unsigned int msr) >> return cpu_has_srbds_ctrl; >> >> case MSR_IA32_THERM_STATUS: >> + return host_cpu_policy.basic.digital_temp_sensor; > > As per the SDM this doesn't look right either - it's CPUID.01H:EDX[22] > (acpi) instead. It is the field you're after in xenpm which is tied to > CPUID.06H:EAX[0] (digital_temp_sensor). > I'm not sure to follow exactly what you mean here. Which CPUID should we check ? >> case MSR_TEMPERATURE_TARGET: >> + return host_cpu_policy.basic.digital_temp_sensor || >> + host_cpu_policy.basic.package_therm_management; > > Where in the SDM did you find this connection? (Anything made up wants > commenting upon.) > To me, we are interested in the MSR_TEMPERATURE_TARGET only with dts or ptm, and the only used probing method in practice is performing a safe rdmsr (at least in Linux coretemp). That may be worth adding a comment eventually. >> case MSR_PACKAGE_THERM_STATUS: >> - return host_cpu_policy.basic.digital_temp_sensor; >> + return host_cpu_policy.basic.package_therm_management; >> } > > And of course with this splitting of cases, blank lines want inserting > between the case blocks. > >> --- a/xen/include/xen/lib/x86/cpu-policy.h >> +++ b/xen/include/xen/lib/x86/cpu-policy.h >> @@ -132,7 +132,7 @@ struct cpu_policy >> :1, >> :1, >> :1, >> - :1, >> + package_therm_management:1, > > The SDM calls this PKG_THERM_MGMT; I think our naming would better match = now > that we decided to have everything else here named according to the SDM. > I can't find PKG_THERM_MGMT in my SDM version; but overall I don't have a strong opinion on naming and am fine with pkg_therm_mgmt. > Jan > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 16 22:39:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 22:39:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234558.1537768 (Exim 4.92) (envelope-from ) id 1vs7FZ-0001LI-0q; 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What happens is that you drop the NMI on the floor and discard it.  Note how svm_inject_nmi() has no return value, and therefore must not fail. It is buggy to check the blocked bit when injecting using this mechanism.  The blocked bit roughly equates to "NMI in progress" in the guest, and it is explicitly possible to queue another NMI while the first is in progress. Both pending and masked being set roughly means "One NMI in progress, and one queued", which is a perfectly fine state to be in. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 16 22:40:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 16 Feb 2026 22:40:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234566.1537778 (Exim 4.92) (envelope-from ) id 1vs7Gq-0002mc-AD; Mon, 16 Feb 2026 22:40:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234566.1537778; Mon, 16 Feb 2026 22:40:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs7Gq-0002mV-7B; Mon, 16 Feb 2026 22:40:48 +0000 Received: by outflank-mailman (input) for mailman id 1234566; Mon, 16 Feb 2026 22:40:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vs7Go-0002mN-NX for xen-devel@lists.xenproject.org; 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There is no need for the artificial tracking >>>>>> of the NMI handling completion with the IRET instruction interception. >>>>>> >>>>>> Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware >>>>>> accelerated feature when the AMD platform support the vNMI. >>>>>> >>>>>> Adjust the svm_get_interrupt_shadow to check if the vNMI is currently blocked >>>>>> by servicing another in-progress NMI. >>>>>> >>>>>> Signed-off-by: Abdelkareem Abdelsaamad >>>>>> --- >>>>>> xen/arch/x86/hvm/svm/intr.c | 9 +++++++++ >>>>>> xen/arch/x86/hvm/svm/svm.c | 5 ++++- >>>>>> xen/arch/x86/hvm/svm/vmcb.c | 2 ++ >>>>>> 3 files changed, 15 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c >>>>>> index 6453a46b85..3e8959f155 100644 >>>>>> --- a/xen/arch/x86/hvm/svm/intr.c >>>>>> +++ b/xen/arch/x86/hvm/svm/intr.c >>>>>> @@ -33,6 +33,15 @@ static void svm_inject_nmi(struct vcpu *v) >>>>>> u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); >>>>>> intinfo_t event; >>>>>> >>>>>> + if ( vmcb->_vintr.fields.vnmi_enable ) >>>>>> + { >>>>>> + if ( !vmcb->_vintr.fields.vnmi_pending && >>>>>> + !vmcb->_vintr.fields.vnmi_blocking ) >>>>>> + vmcb->_vintr.fields.vnmi_pending = 1; >>>>>> + >>>>>> + return; >>>>>> + } >>>>>> + >>>>> I think you need to update the clearbit for tpr (related to vintr) for >>>>> the hardware to know that you modified the vnmi_pending bit. >>>> What makes you think this?  The APM states otherwise. >>>> >>> The APM state doesn't appears to state regarding this; >> The APM does state what is part of the TPR cleanbit, and vNMI is not >> amongst these. >> > APM doesn't explicitly state that; though KVM assumes that it is and > sets the cleanbits [1]. I think we want to have some clarifications from > AMD on what's actually required here. > > [1] > https://github.com/torvalds/linux/blob/0f2acd3148e0ef42bdacbd477f90e8533f96b2ac/arch/x86/kvm/svm/svm.c#L3707-L3708 I can see at least 2 bugs in that function.  AMD tentatively say that vNMI is not subject to a cleanbit, but I'm waiting on some other clarifications. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 17 07:35:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 07:35:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234608.1537787 (Exim 4.92) (envelope-from ) id 1vsFbd-0004X5-GW; Tue, 17 Feb 2026 07:34:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234608.1537787; Tue, 17 Feb 2026 07:34:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsFbd-0004Wy-E2; Tue, 17 Feb 2026 07:34:49 +0000 Received: by outflank-mailman (input) for mailman id 1234608; Tue, 17 Feb 2026 07:34:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsFbc-0004Ws-JG for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 07:34:48 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1faac922-0bd3-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 08:34:42 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-43638a33157so3766393f8f.1 for ; Mon, 16 Feb 2026 23:34:42 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 23:34:41 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 08:34:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header To: Stefano Stabellini , Oleksii Kurochko Cc: Romain Caritey , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 19:42, Stefano Stabellini wrote: > On Mon, 16 Feb 2026, Jan Beulich wrote: >> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>> domain_use_host_layout() is generic enough to be moved to the >>> common header xen/domain.h. >> >> Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... >> >>> --- a/xen/include/xen/domain.h >>> +++ b/xen/include/xen/domain.h >>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); >>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) >>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) >>> >>> +/* >>> + * Is the domain using the host memory layout? >>> + * >>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. >>> + * To avoid any trouble finding space, it is easier to force using the >>> + * host memory layout. >>> + * >>> + * The hardware domain will use the host layout regardless of >>> + * direct-mapped because some OS may rely on a specific address ranges >>> + * for the devices. >>> + */ >>> +#ifndef domain_use_host_layout >>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ >>> + is_hardware_domain(d)) >> >> ... is_domain_direct_mapped() isn't something that I'd like to see further >> proliferate in common (non-DT) code. > > Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware > domain) on x86 as well. In fact, we already have a working prototype, > although it is not suitable for upstream yet. > > In addition to the PSP use case that we discussed a few months ago, > where the PSP is not behind an IOMMU and therefore exchanged addresses > must be 1:1 mapped, we also have a new use case. We are running the full > Xen-based automotive stack on an Azure instance where SVM (vmentry and > vmexit) is available, but an IOMMU is not present. All virtual machines > are configured as PVH. Hmm. Then adjustments need making, for commentary and macro to be correct on x86. First and foremost none of what is there is true for PV. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 07:56:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 07:56:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234619.1537797 (Exim 4.92) (envelope-from ) id 1vsFwc-0007JB-9G; Tue, 17 Feb 2026 07:56:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234619.1537797; Tue, 17 Feb 2026 07:56:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsFwc-0007J4-6A; Tue, 17 Feb 2026 07:56:30 +0000 Received: by outflank-mailman (input) for mailman id 1234619; Tue, 17 Feb 2026 07:56:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsFwa-0007Iw-LW for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 07:56:28 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 28a241af-0bd6-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 08:56:26 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-48336a6e932so23225175e9.3 for ; Mon, 16 Feb 2026 23:56:26 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 16 Feb 2026 23:56:25 -0800 (PST) Message-ID: <0f7e127d-9d53-4b32-8aad-bbf741a0e3ec@suse.com> Date: Tue, 17 Feb 2026 08:56:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] domain: move vmtrace_alloc_buffer() invocation in vcpu_create() To: Andrew Cooper , Tamas K Lengyel Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <528578e1-6374-4fd0-9f67-0769afd2e1c6@suse.com> <50c79874-d07e-479d-80c2-7c0694a0828e@citrix.com> <871a5922-9d7d-455b-8257-d583e3e47bc2@suse.com> <33498e90-dc3c-4763-a953-3ff9eccd2594@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <33498e90-dc3c-4763-a953-3ff9eccd2594@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 18:17, Andrew Cooper wrote: > On 16/02/2026 4:39 pm, Jan Beulich wrote: >> On 16.02.2026 17:29, Andrew Cooper wrote: >>> On 16/02/2026 3:51 pm, Jan Beulich wrote: >>>> The label used upon the function failing is wrong. >>> Is it?  Which label do you think it ought to be? >> fail_sched, as Roger did point out in reply to the original other patch. >> After all ... >> >>>> Instead of correcting >>>> the label, move the invocation up a little, to also avoid it altogether >>>> for the idle domain (where ->vmtrace_size would be zero, and hence the >>>> function would bail right away anyway). >>>> >>>> Fixes: 217dd79ee292 ("xen/domain: Add vmtrace_size domain creation parameter") >>>> Reported-by: Roger Pau Monné >>>> Signed-off-by: Jan Beulich >>>> >>>> --- a/xen/common/domain.c >>>> +++ b/xen/common/domain.c >>>> @@ -493,14 +493,14 @@ struct vcpu *vcpu_create(struct domain * >>>> set_bit(_VPF_down, &v->pause_flags); >>>> vcpu_info_reset(v); >>>> init_waitqueue_vcpu(v); >>>> + >>>> + if ( vmtrace_alloc_buffer(v) != 0 ) >>>> + goto fail_wq; >>>> } >>>> >>>> if ( sched_init_vcpu(v) != 0 ) >>>> goto fail_wq; >> ... this comes first, and ... >> >>>> - if ( vmtrace_alloc_buffer(v) != 0 ) >>>> - goto fail_wq; >>>> - >>>> if ( arch_vcpu_create(v) != 0 ) >>>> goto fail_sched; >> ... here the correct label is used. > > Eww, yes.  So multiple observations. > > 1) This only functions in the first place because > destroy_waitqueue_vcpu() is idempotent to v->waitqueue_vcpu being NULL > which covers the idle case where init_waitqueue_vcpu() was never called. > > 2) sched_destroy_vcpu() can be made idempotent against v->sched_unit. > > Then we don't need multiple labels and this all gets a lot easier to > untangle. Yes, but as a backportable fix what I have here is the most suitable first step, I'd say. With what you suggest, I'd then want to check whether either or both of the function invocations could move into vcpu_teardown(). At least for destroy_waitqueue_vcpu() I can't really figure why it's called only in complete_domain_destroy(); for sched_destroy_vcpu() it may well be that it can't be done earlier. Or wait, looks like vm_event_cleanup() would need moving up in domain_kill(). The comment there right now explains why it can't be done later; it's not quite clear to me whether moving it ahead of (or into) domain_teardown() would introduce any problems. Tamas? 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Tue, 17 Feb 2026 00:35:56 -0800 (PST) Message-ID: <3f1fb7a3-0abd-4df0-92b6-2bb6d78c6422@suse.com> Date: Tue, 17 Feb 2026 09:35:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] wait: drop wake_up_{all,one}() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit wake_up_one() isn't used at all, so violates Misra rule 2.1 (unreachable code). wake_up_all() is only used locally, yet rather than making it static its sole user can invoke wake_up_nr() in the intended way directly. Signed-off-by: Jan Beulich --- a/xen/common/wait.c +++ b/xen/common/wait.c @@ -85,11 +85,6 @@ void init_waitqueue_head(struct waitqueu INIT_LIST_HEAD(&wq->list); } -void destroy_waitqueue_head(struct waitqueue_head *wq) -{ - wake_up_all(wq); -} - void wake_up_nr(struct waitqueue_head *wq, unsigned int nr) { struct waitqueue_vcpu *wqv; @@ -107,12 +102,7 @@ void wake_up_nr(struct waitqueue_head *w spin_unlock(&wq->lock); } -void wake_up_one(struct waitqueue_head *wq) -{ - wake_up_nr(wq, 1); -} - -void wake_up_all(struct waitqueue_head *wq) +void destroy_waitqueue_head(struct waitqueue_head *wq) { wake_up_nr(wq, UINT_MAX); } --- a/xen/include/xen/wait.h +++ b/xen/include/xen/wait.h @@ -31,8 +31,6 @@ void destroy_waitqueue_head(struct waitq /* Wake VCPU(s) waiting on specified waitqueue. */ void wake_up_nr(struct waitqueue_head *wq, unsigned int nr); -void wake_up_one(struct waitqueue_head *wq); -void wake_up_all(struct waitqueue_head *wq); /* Wait on specified waitqueue until @condition is true. */ #define wait_event(wq, condition) \ From xen-devel-bounces@lists.xenproject.org Tue Feb 17 08:45:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 08:45:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234659.1537818 (Exim 4.92) (envelope-from ) id 1vsGi5-0006FG-Ba; Tue, 17 Feb 2026 08:45:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234659.1537818; Tue, 17 Feb 2026 08:45:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsGi5-0006F9-8w; Tue, 17 Feb 2026 08:45:33 +0000 Received: by outflank-mailman (input) for mailman id 1234659; Tue, 17 Feb 2026 08:45:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsGi4-0006F3-8L for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 08:45:32 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 034455c3-0bdd-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 09:45:29 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4837f27cf2dso21275245e9.2 for ; Tue, 17 Feb 2026 00:45:29 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 00:45:29 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 09:45:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/platform: Consider PTM for exposing package-related MSR To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tu Dinh , xen-devel@lists.xenproject.org References: <2764f432-85eb-44b9-aae9-f1bce410b4b9@suse.com> <4bcb7fbd-3180-4780-8432-2c62ce24ce99@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4bcb7fbd-3180-4780-8432-2c62ce24ce99@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 16.02.2026 23:22, Teddy Astie wrote: > Le 16/02/2026 à 17:15, Jan Beulich a écrit : >> On 16.02.2026 16:09, Teddy Astie wrote: >>> --- a/xen/arch/x86/platform_hypercall.c >>> +++ b/xen/arch/x86/platform_hypercall.c >>> @@ -89,9 +89,12 @@ static bool msr_read_allowed(unsigned int msr) >>> return cpu_has_srbds_ctrl; >>> >>> case MSR_IA32_THERM_STATUS: >>> + return host_cpu_policy.basic.digital_temp_sensor; >> >> As per the SDM this doesn't look right either - it's CPUID.01H:EDX[22] >> (acpi) instead. It is the field you're after in xenpm which is tied to >> CPUID.06H:EAX[0] (digital_temp_sensor). > > I'm not sure to follow exactly what you mean here. > Which CPUID should we check ? The one the SDM mandates CPUID.01H:EDX[22], or - as said for the other one - a justification for using something else would need providing in a comment. >>> case MSR_TEMPERATURE_TARGET: >>> + return host_cpu_policy.basic.digital_temp_sensor || >>> + host_cpu_policy.basic.package_therm_management; >> >> Where in the SDM did you find this connection? (Anything made up wants >> commenting upon.) > > To me, we are interested in the MSR_TEMPERATURE_TARGET only with dts or > ptm, and the only used probing method in practice is performing a safe > rdmsr (at least in Linux coretemp). How does coretemp matter here? It using a safe rdmsr means it's not Xen- enabled, i.e. doesn't use the platform-op that the code here is about. > That may be worth adding a comment eventually. Yes. However, here and above I wonder whether we'd be doing any good in using a tighter check than mandated by the SDM. Another reader of the MSR may appear (in xenpm or elsewhere), and it may be after another field. Things may then be observed to work fine, until someone tries it on older hardware. >>> --- a/xen/include/xen/lib/x86/cpu-policy.h >>> +++ b/xen/include/xen/lib/x86/cpu-policy.h >>> @@ -132,7 +132,7 @@ struct cpu_policy >>> :1, >>> :1, >>> :1, >>> - :1, >>> + package_therm_management:1, >> >> The SDM calls this PKG_THERM_MGMT; I think our naming would better match now >> that we decided to have everything else here named according to the SDM. > > I can't find PKG_THERM_MGMT in my SDM version; but overall I don't have > a strong opinion on naming and am fine with pkg_therm_mgmt. See version 090 volume 1 section 21.3. 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For DOMID_XEN, which is not auto-translated, >> provide a 1:1 RAM/MMIO mapping and perform the required validation and >> reference counting. >> >> The function is implemented out-of-line rather than as a static inline, >> to avoid header ordering issues where struct domain is incomplete when >> asm/p2m.h is included, leading to build failures: >> In file included from ./arch/riscv/include/asm/domain.h:10, >> from ./include/xen/domain.h:16, >> from ./include/xen/sched.h:11, >> from ./include/xen/event.h:12, >> from common/cpu.c:3: >> ./arch/riscv/include/asm/p2m.h: In function 'get_page_from_gfn': >> ./arch/riscv/include/asm/p2m.h:50:33: error: invalid use of undefined type 'struct domain' >> 50 | #define p2m_get_hostp2m(d) (&(d)->arch.p2m) >> | ^~ >> ./arch/riscv/include/asm/p2m.h:180:38: note: in expansion of macro 'p2m_get_hostp2m' >> 180 | return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >> | ^~~~~~~~~~~~~~~ >> make[2]: *** [Rules.mk:253: common/cpu.o] Error 1 >> make[1]: *** [build.mk:72: common] Error 2 >> make: *** [Makefile:623: xen] Error 2 > Surely this can be addressed, when x86 and Arm have the function as inline? Yes, it should be possible. The reason for now that is working for x86 and Arm is that: 1. Arm only pass pointer to struct domain to p2m_get_page_from_gfn() so it is enough just to have forward declaration for struct domain. 2. x86 uses pointer to p2m_domain in arch_domain so there is no need to include asm/p2m.h in asm/domain.h and so forward declaration will be enough. And so there is no dependency between xen/sched.h and asm/p2m.h through asm/domain.h which leads to the issue mentioned in the commit message. RISC-V could in principle follow the x86 pattern (avoid including asm/p2m.h), but the current out-of-line approach is also acceptable, it is simpler and more robust against future header reordering problems. >> Signed-off-by: Oleksii Kurochko >> --- >> Does it make sense to make this function almost fully generic? >> >> It looks like most of the logic here is architecture-independent and identical >> across architectures, except for the following points: >> >> 1. ``` >> if ( likely(d != dom_xen) ) >> ``` >> >> This could be made generic by introducing paging_mode_translate() for ARM >> and defining it as `(d != dom_xen)` there. >> >> 2. ``` >> if ( t ) >> *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; >> ``` >> >> Here, only `p2m_mmio_direct_io` appears to be architecture-specific. This >> could be abstracted via a helper such as `dom_io_p2m_type()` and used here >> instead. > With P2M stuff I'd be careful. Abstracting the two aspects above may make > future arch-specific changes there more difficult. > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) >> flush_tlb_guest_local(); >> } >> } >> + >> +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, >> + p2m_type_t *t, p2m_query_t q) >> +{ >> + struct page_info *page; >> + >> + /* >> + * Special case for DOMID_XEN as it is the only domain so far that is >> + * not auto-translated. >> + */ > Once again something taken verbatim from Arm. Yes, dom_xen can in fact appear > here, but it's not a real domain, has no memory truly assigned to it, has no > GFN space, and hence calling it translated (or not) is simply wrong (at best: > misleading). IOW ... > >> + if ( likely(d != dom_xen) ) >> + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >> + >> + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ > ... this comment would also want re-wording. As you mentioned in the another reply to this patch, I messed up x86 and Arm implementation in a bad way, so here should be DOMID_XEN used instead of "Non-translated". Based on your reply it seems like the first comment should be also rephrased as you mentioned that DOMID_XEN can't be called also "not auto-translated". I think it would be better to write the following: /* * Special case for DOMID_XEN as it is the only domain so far that has * no GFN space. */ > >> + if ( t ) >> + *t = p2m_invalid; >> + >> + page = mfn_to_page(_mfn(gfn)); >> + >> + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) >> + return NULL; >> + >> + if ( t ) >> + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; > If only dom_xen can make it here, why the check for dom_io? Incorrectly copied from x86. It should be just: *t = p2m_ram_rw here as in RISC-V for MMIO pages owner isn't set to dom_io (and the same is true for Arm I think). Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 09:10:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 09:10:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234683.1537837 (Exim 4.92) (envelope-from ) id 1vsH5w-0002Mz-H3; Tue, 17 Feb 2026 09:10:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234683.1537837; Tue, 17 Feb 2026 09:10:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsH5w-0002Ms-ET; Tue, 17 Feb 2026 09:10:12 +0000 Received: by outflank-mailman (input) for mailman id 1234683; Tue, 17 Feb 2026 09:10:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsH5v-0002Mm-B6 for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 09:10:11 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 74cbe545-0be0-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 10:10:08 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4837584120eso25829995e9.1 for ; Tue, 17 Feb 2026 01:10:08 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 01:10:07 -0800 (PST) Message-ID: <349ad398-8a18-46cc-a34b-576edfb544c0@suse.com> Date: Tue, 17 Feb 2026 10:10:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/6] xen/riscv: implement get_page_from_gfn() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <04eee3ae5e8aadf8c7f0b873ba24ce38220e8fa2.1770821989.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 10:01, Oleksii Kurochko wrote: > On 2/16/26 1:38 PM, Jan Beulich wrote: >> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/p2m.c >>> +++ b/xen/arch/riscv/p2m.c >>> @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) >>> flush_tlb_guest_local(); >>> } >>> } >>> + >>> +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, >>> + p2m_type_t *t, p2m_query_t q) >>> +{ >>> + struct page_info *page; >>> + >>> + /* >>> + * Special case for DOMID_XEN as it is the only domain so far that is >>> + * not auto-translated. >>> + */ >> Once again something taken verbatim from Arm. Yes, dom_xen can in fact appear >> here, but it's not a real domain, has no memory truly assigned to it, has no >> GFN space, and hence calling it translated (or not) is simply wrong (at best: >> misleading). IOW ... >> >>> + if ( likely(d != dom_xen) ) >>> + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >>> + >>> + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ >> ... this comment would also want re-wording. > > As you mentioned in the another reply to this patch, I messed up x86 and Arm > implementation in a bad way, so here should be DOMID_XEN used instead of > "Non-translated". > > Based on your reply it seems like the first comment should be also rephrased > as you mentioned that DOMID_XEN can't be called also "not auto-translated". > I think it would be better to write the following: > /* > * Special case for DOMID_XEN as it is the only domain so far that has > * no GFN space. > */ Simply say that dom_xen isn't a "normal" domain? >>> + if ( t ) >>> + *t = p2m_invalid; >>> + >>> + page = mfn_to_page(_mfn(gfn)); >>> + >>> + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) >>> + return NULL; >>> + >>> + if ( t ) >>> + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; >> If only dom_xen can make it here, why the check for dom_io? > > Incorrectly copied from x86. It should be just: > *t = p2m_ram_rw > here as in RISC-V for MMIO pages owner isn't set to dom_io (and the same is > true for Arm I think). May I suggest that right away you use the construct that I suggested Arm to switch to (you were Cc-ed on that patch, I think)? Despite the absence of p2m_ram_ro on RISC-V, that'll be usable, and it will allow keeping the code untouched when p2m_ram_ro is introduced (sooner or later you will need it, I expect). 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Smith" Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260216215748.20398-1-dpsmith@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16.02.2026 22:57, Daniel P. Smith wrote: > When using XSM Flask, passing DOMIND_INVALID will result in a NULL pointer Nit: DOMID_INVALID > reference from the passing of NULL as the target domain to > xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the > target domain is NULL opens the opportunity to circumvent the XSM > get_domain_state access check. This is due to the fact that the call to > xsm_domctl() for get_domain_state op is a no-op check, deferring to > xsm_get_domain_state(). > > Modify the helper get_domain_state() to ensure the requesting domain has > get_domain_state access for the target domain, whether the target domain is > explicitly set or implicitly determined with a domain state search. In the case > of access not being allowed for a domain found during an implicit search, the > search will continue to the next domain whose state has changed. > > Signed-off-by: Daniel P. Smith > Reported-by: Chris Rogers > Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") Nit: Fixes: first (or at least ahead of S-o-b) and other tags chronologically ordered, please. > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, > int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > domid_t *domid) > { > - unsigned int dom; > + unsigned int dom = 0; > int rc = -ENOENT; > struct domain *hdl; > > @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > if ( d ) > { > + rc = xsm_get_domain_state(XSM_XS_PRIV, d); > + if ( rc ) > + return rc; > + > set_domain_state_info(info, d); > > return 0; > @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > while ( dom_state_changed ) > { > - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); > + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); > if ( dom >= DOMID_FIRST_RESERVED ) > break; > - if ( test_and_clear_bit(dom, dom_state_changed) ) > + if ( test_bit(dom, dom_state_changed) ) > { > *domid = dom; This is problematic wrt other work (already talked about in the distant past, but sadly only making little progress) towards trying to pull some of the sub-ops out of the domctl-locked region. This subop is one of the prime candidates, yet only if the test_and_clear_bit() remains here. > @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > if ( d ) > { > + rc = xsm_get_domain_state(XSM_XS_PRIV, d); > + if ( rc ) > + { > + rcu_unlock_domain(d); > + rc = -ENOENT; As you don't otherwise use xsm_get_domain_state()'s return value, the need for this assignment can be eliminated by putting the function call straight in the if(). Then again, to address the remark above, overall code structure will need to change quite a bit anyway (so the remark here may be moot). > + dom++; It may be nice to eliminate the need to have this in two places (here and ... > + continue; > + } > + > set_domain_state_info(info, d); > > rcu_unlock_domain(d); > @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > else > memset(info, 0, sizeof(*info)); > > + clear_bit(dom, dom_state_changed); > rc = 0; > > break; > } > + > + dom++; > } ... here), by having the variable's initializer be -1 and then using dom + 1 in the find_next_bit() invocation. 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> } > > -void destroy_waitqueue_head(struct waitqueue_head *wq) > -{ > - wake_up_all(wq); > -} > - > void wake_up_nr(struct waitqueue_head *wq, unsigned int nr) > { > struct waitqueue_vcpu *wqv; > @@ -107,12 +102,7 @@ void wake_up_nr(struct waitqueue_head *w > spin_unlock(&wq->lock); > } > > -void wake_up_one(struct waitqueue_head *wq) > -{ > - wake_up_nr(wq, 1); > -} > - > -void wake_up_all(struct waitqueue_head *wq) > +void destroy_waitqueue_head(struct waitqueue_head *wq) > { > wake_up_nr(wq, UINT_MAX); > } The diff looks wonky because you also moved destroy_waitqueue_head(), despite wake_up_nr() not being static. Keeping destroy_waitqueue_head() in it's old location will make the diff smaller and more obvious. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 17 09:58:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 09:58:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234733.1537872 (Exim 4.92) (envelope-from ) id 1vsHqm-0000Tr-I5; Tue, 17 Feb 2026 09:58:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234733.1537872; Tue, 17 Feb 2026 09:58:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsHqm-0000Tk-FI; Tue, 17 Feb 2026 09:58:36 +0000 Received: by outflank-mailman (input) for mailman id 1234733; Tue, 17 Feb 2026 09:58:35 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsHql-0000Te-Bf for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 09:58:35 +0000 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [2a00:1450:4864:20::52e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 37707fc3-0be7-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 10:58:33 +0100 (CET) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-65a380b554bso6356928a12.2 for ; Tue, 17 Feb 2026 01:58:32 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Yes, dom_xen can in fact appear >>> here, but it's not a real domain, has no memory truly assigned to it, has no >>> GFN space, and hence calling it translated (or not) is simply wrong (at best: >>> misleading). IOW ... >>> >>>> + if ( likely(d != dom_xen) ) >>>> + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >>>> + >>>> + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ >>> ... this comment would also want re-wording. >> As you mentioned in the another reply to this patch, I messed up x86 and Arm >> implementation in a bad way, so here should be DOMID_XEN used instead of >> "Non-translated". >> >> Based on your reply it seems like the first comment should be also rephrased >> as you mentioned that DOMID_XEN can't be called also "not auto-translated". >> I think it would be better to write the following: >> /* >> * Special case for DOMID_XEN as it is the only domain so far that has >> * no GFN space. >> */ > Simply say that dom_xen isn't a "normal" domain? > >>>> + if ( t ) >>>> + *t = p2m_invalid; >>>> + >>>> + page = mfn_to_page(_mfn(gfn)); >>>> + >>>> + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) >>>> + return NULL; >>>> + >>>> + if ( t ) >>>> + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; >>> If only dom_xen can make it here, why the check for dom_io? >> Incorrectly copied from x86. It should be just: >> *t = p2m_ram_rw >> here as in RISC-V for MMIO pages owner isn't set to dom_io (and the same is >> true for Arm I think). > May I suggest that right away you use the construct that I suggested Arm to > switch to (you were Cc-ed on that patch, I think)? Despite the absence of > p2m_ram_ro on RISC-V, that'll be usable, and it will allow keeping the code > untouched when p2m_ram_ro is introduced (sooner or later you will need it, > I expect). Sure, but doesn't that patch is connected to another function (translate_get_page()) and just fixing the handling of what get_page_from_gfn() in *t? For get_page_from_gfn() to not miss the case when new type is introduced it make sense to do the following: if ( page->u.inuse.type_info & PGT_writable_page ) *t = p2m_ram_rw; else BUG_ON("unimplemented"); ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 10:26:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 10:26:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234761.1537883 (Exim 4.92) (envelope-from ) id 1vsIHM-0004VF-Kz; Tue, 17 Feb 2026 10:26:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234761.1537883; Tue, 17 Feb 2026 10:26:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIHM-0004V8-Gn; Tue, 17 Feb 2026 10:26:04 +0000 Received: by outflank-mailman (input) for mailman id 1234761; Tue, 17 Feb 2026 10:26:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIHL-0004V1-D6 for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 10:26:03 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0e424c85-0beb-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 11:26:01 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so45300065e9.1 for ; Tue, 17 Feb 2026 02:26:01 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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As we discussed in another patch thread, IPA isn't really used for RISC-V and I will rename it to GPA. > > Also, don't you prefer to use BIT() everywhere else? Yes, BIT() would be better for consistency. > >> +#define COPY_linear (1U << 1) >> + >> +typedef union >> +{ >> + struct >> + { >> + struct vcpu *v; >> + } gva; >> + >> + struct >> + { >> + struct domain *d; >> + } gpa; >> +} copy_info_t; >> + >> +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) >> +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) >> + >> +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, > The caller has to pass in a domain here. I therefore recommend against > use of copy_info_t for this function. Or wait, this is misleading, as > the consuming part ... > >> + bool linear, bool write) >> +{ >> + p2m_type_t p2mt; >> + struct page_info *page; >> + >> + if ( linear ) >> + BUG_ON("unimplemeted\n"); > ... of "linear" is missing here. Yes, for this once cases it will be used vcpu as an argument passed by "copy_info_t info". I will add the comment above suggested below BUG_ON(linear). Btw, I think it makes sense to change linear to GVA to be more close to RISC-V spec? > > In any event, this one please shorter as: > > BUG_ON(linear); > >> + page = get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_ALLOC); >> + >> + if ( !page ) >> + return NULL; >> + >> + if ( !p2m_is_ram(p2mt) ) >> + { >> + put_page(page); >> + return NULL; >> + } >> + >> + return page; >> +} > The "write" function parameter also is unused, but there's no BUG_ON() for > that one? Imo the p2m_is_ram() check isn't thorough enough (on the Arm > original): p2m_ram_ro shouldn't be allowed when "write" is true. As soon > as you gain p2m_ram_ro on RISC-V, things will need updating here as well. > Perhaps best to leave a note. I will apply your changes from suggested for Arm patch (Arm: tighten translate_get_page()) so write will be used and also no extra updates will be needed here. > >> +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, >> + copy_info_t info, unsigned int flags) > Why an "unsigned long" return value when ... > >> +{ >> + unsigned int offset = PAGE_OFFSET(addr); >> + >> + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); >> + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); >> + >> + while ( len ) >> + { >> + void *p; >> + unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset); >> + struct page_info *page; >> + >> + page = translate_get_page(info, addr, flags & COPY_linear, >> + flags & COPY_to_guest); >> + if ( page == NULL ) >> + return len; > ... only an "unsigned int" (or 0 further down) is returned? Same > question for copy_to_guest_phys() below then. Agree, unsigned int should be enough. > >> + p = __map_domain_page(page); >> + p += offset; >> + if ( flags & COPY_to_guest ) >> + { >> + /* >> + * buf will be NULL when the caller request to zero the >> + * guest memory. >> + */ >> + if ( buf ) >> + memcpy(p, buf, size); >> + else >> + memset(p, 0, size); >> + } >> + else >> + memcpy(buf, p, size); >> + >> + unmap_domain_page(p - offset); >> + put_page(page); >> + len -= size; >> + buf += size; >> + addr += size; >> + >> + /* >> + * After the first iteration, guest virtual address is correctly >> + * aligned to PAGE_SIZE. >> + */ >> + offset = 0; >> + } >> + >> + return 0; >> +} >> + >> +unsigned long copy_to_guest_phys(struct domain *d, >> + paddr_t gpa, >> + void *buf, >> + unsigned int len) > May I suggest to make good use of line length, just like how copy_guest() > does? Sure, I will do that. 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Tue, 17 Feb 2026 02:34:00 -0800 (PST) Message-ID: <4d956442-d73d-4b50-9aa0-6603b5734c1a@suse.com> Date: Tue, 17 Feb 2026 11:33:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] wait: drop wake_up_{all,one}() To: Andrew Cooper Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <3f1fb7a3-0abd-4df0-92b6-2bb6d78c6422@suse.com> <14d94ac0-f193-4344-bb04-f4bf1061d39b@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <14d94ac0-f193-4344-bb04-f4bf1061d39b@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 10:47, Andrew Cooper wrote: > On 17/02/2026 8:35 am, Jan Beulich wrote: >> wake_up_one() isn't used at all, so violates Misra rule 2.1 (unreachable >> code). wake_up_all() is only used locally, yet rather than making it >> static its sole user can invoke wake_up_nr() in the intended way directly. >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/common/wait.c >> +++ b/xen/common/wait.c >> @@ -85,11 +85,6 @@ void init_waitqueue_head(struct waitqueu >> INIT_LIST_HEAD(&wq->list); >> } >> >> -void destroy_waitqueue_head(struct waitqueue_head *wq) >> -{ >> - wake_up_all(wq); >> -} >> - >> void wake_up_nr(struct waitqueue_head *wq, unsigned int nr) >> { >> struct waitqueue_vcpu *wqv; >> @@ -107,12 +102,7 @@ void wake_up_nr(struct waitqueue_head *w >> spin_unlock(&wq->lock); >> } >> >> -void wake_up_one(struct waitqueue_head *wq) >> -{ >> - wake_up_nr(wq, 1); >> -} >> - >> -void wake_up_all(struct waitqueue_head *wq) >> +void destroy_waitqueue_head(struct waitqueue_head *wq) >> { >> wake_up_nr(wq, UINT_MAX); >> } > > The diff looks wonky because you also moved destroy_waitqueue_head(), > despite wake_up_nr() not being static. > > Keeping destroy_waitqueue_head() in it's old location will make the diff > smaller and more obvious. The diff size doesn't really change. As to "more obvious" - yes, the deletion of the two functions is more obvious then. The "keep the UINT_MAX use" aspect then becomes less obvious. That's why I did it the way shown. I'm okay doing it the other way, if that eases it making progress. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 10:40:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 10:40:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234786.1537902 (Exim 4.92) (envelope-from ) id 1vsIV6-0007q3-13; Tue, 17 Feb 2026 10:40:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234786.1537902; Tue, 17 Feb 2026 10:40:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIV5-0007pw-UV; Tue, 17 Feb 2026 10:40:15 +0000 Received: by outflank-mailman (input) for mailman id 1234786; Tue, 17 Feb 2026 10:40:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIV4-0006sb-RW for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 10:40:14 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0a84cf2a-0bed-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 11:40:13 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-4359a302794so2879091f8f.1 for ; Tue, 17 Feb 2026 02:40:13 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 02:40:13 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 11:40:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/6] xen/riscv: implement get_page_from_gfn() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <04eee3ae5e8aadf8c7f0b873ba24ce38220e8fa2.1770821989.git.oleksii.kurochko@gmail.com> <349ad398-8a18-46cc-a34b-576edfb544c0@suse.com> <5146fc56-9fa7-49c9-8184-954ca84eb439@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5146fc56-9fa7-49c9-8184-954ca84eb439@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 10:58, Oleksii Kurochko wrote: > > On 2/17/26 10:10 AM, Jan Beulich wrote: >> On 17.02.2026 10:01, Oleksii Kurochko wrote: >>> On 2/16/26 1:38 PM, Jan Beulich wrote: >>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>>>> --- a/xen/arch/riscv/p2m.c >>>>> +++ b/xen/arch/riscv/p2m.c >>>>> @@ -1557,3 +1557,31 @@ void p2m_handle_vmenter(void) >>>>> flush_tlb_guest_local(); >>>>> } >>>>> } >>>>> + >>>>> +struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, >>>>> + p2m_type_t *t, p2m_query_t q) >>>>> +{ >>>>> + struct page_info *page; >>>>> + >>>>> + /* >>>>> + * Special case for DOMID_XEN as it is the only domain so far that is >>>>> + * not auto-translated. >>>>> + */ >>>> Once again something taken verbatim from Arm. Yes, dom_xen can in fact appear >>>> here, but it's not a real domain, has no memory truly assigned to it, has no >>>> GFN space, and hence calling it translated (or not) is simply wrong (at best: >>>> misleading). IOW ... >>>> >>>>> + if ( likely(d != dom_xen) ) >>>>> + return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >>>>> + >>>>> + /* Non-translated guests see 1-1 RAM / MMIO mappings everywhere */ >>>> ... this comment would also want re-wording. >>> As you mentioned in the another reply to this patch, I messed up x86 and Arm >>> implementation in a bad way, so here should be DOMID_XEN used instead of >>> "Non-translated". >>> >>> Based on your reply it seems like the first comment should be also rephrased >>> as you mentioned that DOMID_XEN can't be called also "not auto-translated". >>> I think it would be better to write the following: >>> /* >>> * Special case for DOMID_XEN as it is the only domain so far that has >>> * no GFN space. >>> */ >> Simply say that dom_xen isn't a "normal" domain? >> >>>>> + if ( t ) >>>>> + *t = p2m_invalid; >>>>> + >>>>> + page = mfn_to_page(_mfn(gfn)); >>>>> + >>>>> + if ( !mfn_valid(_mfn(gfn)) || !get_page(page, d) ) >>>>> + return NULL; >>>>> + >>>>> + if ( t ) >>>>> + *t = likely(d != dom_io) ? p2m_ram_rw : p2m_mmio_direct_io; >>>> If only dom_xen can make it here, why the check for dom_io? >>> Incorrectly copied from x86. It should be just: >>> *t = p2m_ram_rw >>> here as in RISC-V for MMIO pages owner isn't set to dom_io (and the same is >>> true for Arm I think). >> May I suggest that right away you use the construct that I suggested Arm to >> switch to (you were Cc-ed on that patch, I think)? Despite the absence of >> p2m_ram_ro on RISC-V, that'll be usable, and it will allow keeping the code >> untouched when p2m_ram_ro is introduced (sooner or later you will need it, >> I expect). > > Sure, but doesn't that patch is connected to another function (translate_get_page()) > and just fixing the handling of what get_page_from_gfn() in *t? Oh, sorry, I should have made explicit that the request was for patch 2. Here indeed ... > For get_page_from_gfn() to not miss the case when new type is introduced it make > sense to do the following: > if ( page->u.inuse.type_info & PGT_writable_page ) > *t = p2m_ram_rw; > else > BUG_ON("unimplemented"); ... this may be the best you can do right now (unless you want to introduce p2m_ram_ro). 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Tue, 17 Feb 2026 02:42:33 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 11:42:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/6] xen/riscv: implement copy_to_guest_phys() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <1edea973-4ca1-491f-a9bf-9c2b09bbe615@suse.com> <69cef6db-cd39-457f-a5f1-b2f0078b57e7@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <69cef6db-cd39-457f-a5f1-b2f0078b57e7@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 11:25, Oleksii Kurochko wrote: > On 2/16/26 3:57 PM, Jan Beulich wrote: >> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>> --- /dev/null >>> +++ b/xen/arch/riscv/guestcopy.c >>> @@ -0,0 +1,112 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#include >>> + >>> +#define COPY_from_guest (0U << 0) >>> +#define COPY_to_guest (1U << 0) >>> +#define COPY_ipa (0U << 1) >> Like already asked elsewhere - is "ipa" a term commonly in use on RISC-V? >> To me it's Arm terminology, which you don't want to copy as is. > > As we discussed in another patch thread, IPA isn't really used for RISC-V > and I will rename it to GPA. > >> Also, don't you prefer to use BIT() everywhere else? > > Yes, BIT() would be better for consistency. > >>> +#define COPY_linear (1U << 1) >>> + >>> +typedef union >>> +{ >>> + struct >>> + { >>> + struct vcpu *v; >>> + } gva; >>> + >>> + struct >>> + { >>> + struct domain *d; >>> + } gpa; >>> +} copy_info_t; >>> + >>> +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) >>> +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) >>> + >>> +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, >> The caller has to pass in a domain here. I therefore recommend against >> use of copy_info_t for this function. Or wait, this is misleading, as >> the consuming part ... >> >>> + bool linear, bool write) >>> +{ >>> + p2m_type_t p2mt; >>> + struct page_info *page; >>> + >>> + if ( linear ) >>> + BUG_ON("unimplemeted\n"); >> ... of "linear" is missing here. > > Yes, for this once cases it will be used vcpu as an argument passed by "copy_info_t info". > I will add the comment above suggested below BUG_ON(linear). > > Btw, I think it makes sense to change linear to GVA to be more close to RISC-V spec? And to better match the rename to GPA that you talk about above. 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Nor do we need to > check whether the idle domain is shutting down - it never will. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné > --- > v2: Drop vmtrace_alloc_buffer() part. > > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -475,12 +475,6 @@ struct vcpu *vcpu_create(struct domain * > v->vcpu_id = vcpu_id; > v->dirty_cpu = VCPU_CPU_CLEAN; > > - rwlock_init(&v->virq_lock); > - > - tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); > - > - grant_table_init_vcpu(v); > - > if ( is_idle_domain(d) ) > { > v->runstate.state = RUNSTATE_running; > @@ -488,6 +482,12 @@ struct vcpu *vcpu_create(struct domain * > } > else > { > + rwlock_init(&v->virq_lock); > + > + tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL); > + > + grant_table_init_vcpu(v); > + > v->runstate.state = RUNSTATE_offline; > v->runstate.state_entry_time = NOW(); > set_bit(_VPF_down, &v->pause_flags); > @@ -516,7 +516,8 @@ struct vcpu *vcpu_create(struct domain * > } > > /* Must be called after making new vcpu visible to for_each_vcpu(). */ > - vcpu_check_shutdown(v); > + if ( !is_idle_domain(d) ) > + vcpu_check_shutdown(v); I would possibly leave this as-is. I agree that the idle domain will never shut down, but it's possibly best to needlessly call into vcpu_check_shutdown() for the idle domain rather than adding the extra conditional for the common case? My Ack stands regardless. Thanks, Roger. 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Tue, 17 Feb 2026 03:08:09 -0800 (PST) Message-ID: <59a0dcb0-235f-4eb9-847b-1d0ed72c89ce@suse.com> Date: Tue, 17 Feb 2026 12:08:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/5] xen/include: customize headers for host builds To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260213024952.3270112-1-dmukhin@ford.com> <20260213024952.3270112-4-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260213024952.3270112-4-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 03:49, dmukhin@ford.com wrote: > From: Denis Mukhin > > Update hypervisor headers to allow vpci.c to compile in a host build > environment, as required for the vPCI unit test. > > Signed-off-by: Denis Mukhin > --- > Changes since v2: > - new patch I'm firmly against such scattering around of "#ifdef __XEN__". It should be the harnesses to carry the burden of re-using hypervisor headers. Jan > --- a/xen/include/xen/irq.h > +++ b/xen/include/xen/irq.h > @@ -1,5 +1,6 @@ > #ifndef __XEN_IRQ_H__ > #define __XEN_IRQ_H__ > +#ifdef __XEN__ > > #include > #include > @@ -208,4 +209,5 @@ unsigned int arch_hwdom_irqs(const struct domain *d); > void arch_evtchn_bind_pirq(struct domain *d, int pirq); > #endif > > +#endif /* __XEN__ */ > #endif /* __XEN_IRQ_H__ */ > diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h > index 98d8482daba1..06d2fa3aed15 100644 > --- a/xen/include/xen/list.h > +++ b/xen/include/xen/list.h > @@ -7,8 +7,10 @@ > #ifndef __XEN_LIST_H__ > #define __XEN_LIST_H__ > > +#ifdef __XEN__ > #include > #include > +#endif > > /* > * These are non-NULL pointers that will result in faults under normal > diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h > index f6c1f27ca105..80d60fd49178 100644 > --- a/xen/include/xen/numa.h > +++ b/xen/include/xen/numa.h > @@ -1,5 +1,6 @@ > #ifndef _XEN_NUMA_H > #define _XEN_NUMA_H > +#ifdef __XEN__ > > #include > > @@ -152,4 +153,5 @@ static inline nodeid_t mfn_to_nid(mfn_t mfn) > > #define page_to_nid(pg) mfn_to_nid(page_to_mfn(pg)) > > +#endif /* __XEN__ */ > #endif /* _XEN_NUMA_H */ > diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h > index afb6bbf50d05..f52dc7875e16 100644 > --- a/xen/include/xen/pci.h > +++ b/xen/include/xen/pci.h > @@ -14,7 +14,9 @@ > #include > #include > #include > +#ifdef __XEN__ > #include > +#endif > > /* > * The PCI interface treats multi-function devices as independent > diff --git a/xen/include/xen/pfn.h b/xen/include/xen/pfn.h > index 1ca9b095e0df..98ff669d7def 100644 > --- a/xen/include/xen/pfn.h > +++ b/xen/include/xen/pfn.h > @@ -1,7 +1,9 @@ > #ifndef __XEN_PFN_H__ > #define __XEN_PFN_H__ > > +#ifdef __XEN__ > #include > +#endif > > #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) > #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) > diff --git a/xen/include/xen/spinlock.h b/xen/include/xen/spinlock.h > index ca9d8c7ec0a1..ad5094c4eb92 100644 > --- a/xen/include/xen/spinlock.h > +++ b/xen/include/xen/spinlock.h > @@ -1,5 +1,6 @@ > #ifndef __SPINLOCK_H__ > #define __SPINLOCK_H__ > +#ifdef __XEN__ > > #include > #include > @@ -360,4 +361,5 @@ static always_inline void nrspin_lock_irq(rspinlock_t *l) > #define nrspin_unlock_irqrestore(l, f) _nrspin_unlock_irqrestore(l, f) > #define nrspin_unlock_irq(l) _nrspin_unlock_irq(l) > > +#endif /* __XEN__ */ > #endif /* __SPINLOCK_H__ */ > diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h > index 73ddccbbd5dc..e5d702b48ac0 100644 > --- a/xen/include/xen/types.h > +++ b/xen/include/xen/types.h > @@ -4,6 +4,7 @@ > #include > #include > > +#ifdef __XEN__ > /* Linux inherited types which are being phased out */ > typedef uint8_t u8; > typedef uint16_t u16; > @@ -15,6 +16,7 @@ typedef uint64_t u64; > typedef __SIZE_TYPE__ size_t; > > typedef signed long ssize_t; > +#endif /* __XEN__ */ > > typedef __PTRDIFF_TYPE__ ptrdiff_t; > typedef __UINTPTR_TYPE__ uintptr_t; > @@ -33,6 +35,7 @@ typedef __UINTPTR_TYPE__ uintptr_t; > #define NULL ((void*)0) > #endif > > +#ifdef __XEN__ > #define INT8_MIN (-127-1) > #define INT16_MIN (-32767-1) > #define INT32_MIN (-2147483647-1) > @@ -52,6 +55,7 @@ typedef __UINTPTR_TYPE__ uintptr_t; > #define LONG_MAX ((long)(~0UL>>1)) > #define LONG_MIN (-LONG_MAX - 1) > #define ULONG_MAX (~0UL) > +#endif /* __XEN__ */ > > typedef uint16_t __le16; > typedef uint16_t __be16; From xen-devel-bounces@lists.xenproject.org Tue Feb 17 11:10:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 11:10:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234830.1537942 (Exim 4.92) (envelope-from ) id 1vsIyB-0005DH-Vi; Tue, 17 Feb 2026 11:10:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234830.1537942; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH net] xen-netback: reject zero-queue configuration from guest From: patchwork-bot+netdevbpf@kernel.org Message-Id: <177132660658.24996.8282922634336932490.git-patchwork-notify@kernel.org> Date: Tue, 17 Feb 2026 11:10:06 +0000 References: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> In-Reply-To: <20260212224040.86674-1-n7l8m4@u.northwestern.edu> To: Ziyi Guo Cc: wei.liu@kernel.org, paul@xen.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew.bennieston@citrix.com, xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Hello: This patch was applied to netdev/net.git (main) by Paolo Abeni : On Thu, 12 Feb 2026 22:40:40 +0000 you wrote: > A malicious or buggy Xen guest can write "0" to the xenbus key > "multi-queue-num-queues". The connect() function in the backend only > validates the upper bound (requested_num_queues > xenvif_max_queues) > but not zero, allowing requested_num_queues=0 to reach > vzalloc(array_size(0, sizeof(struct xenvif_queue))), which triggers > WARN_ON_ONCE(!size) in __vmalloc_node_range(). > > [...] Here is the summary with links: - [net] xen-netback: reject zero-queue configuration from guest https://git.kernel.org/netdev/net/c/6d1dc8014334 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Tue Feb 17 11:10:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 11:10:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234840.1537951 (Exim 4.92) (envelope-from ) id 1vsIyp-0005h0-6s; Tue, 17 Feb 2026 11:10:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234840.1537951; Tue, 17 Feb 2026 11:10:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIyp-0005gr-4M; Tue, 17 Feb 2026 11:10:59 +0000 Received: by outflank-mailman (input) for mailman id 1234840; Tue, 17 Feb 2026 11:10:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsIyn-0005eJ-VX for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 11:10:57 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 54a96ac5-0bf1-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 12:10:56 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso47947695e9.0 for ; Tue, 17 Feb 2026 03:10:56 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 03:10:55 -0800 (PST) Message-ID: <5b0be132-07f1-4d7b-92ac-2b1d9c4db408@suse.com> Date: Tue, 17 Feb 2026 12:10:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/5] tools/tests: test harness fragment To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260213024952.3270112-1-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260213024952.3270112-1-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 03:49, dmukhin@ford.com wrote: > This series introduces the use of a new common unit test fragment across > several existing unit tests. > > Patch 1 contains assorted fixups for the domid Makefile. > Patch 2 adds a new fragment for auto-generating test harness dependencies. > Patch 3 adds some prerequisite changes for vPCI test (patch 4). > Patch 4 switches the vPCI unit test to the new common fragment. > Patch 5 switches the PDX unit test to the new common fragment. > > [1] Link to v2: https://lore.kernel.org/xen-devel/20260111041145.553673-1-dmukhin@ford.com/ > [2] CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323352235 > > Denis Mukhin (5): > tests: fixup domid make fragment > tests: use unit test fragment in domid test > xen/include: customize headers for host builds > tests: use unit test fragment in vPCI test > tests: use unit test fragment in PDX test I remain unconvinced of this attempt to generalize things. Yes, it eliminates some redundancy, but at the same time some of the new constructs are harder to read / follow. Perhaps it would help if smaller pieces were abstracted out first / incrementally. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 11:17:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 11:17:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234853.1537963 (Exim 4.92) (envelope-from ) id 1vsJ5H-0006Qz-TI; Tue, 17 Feb 2026 11:17:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234853.1537963; Tue, 17 Feb 2026 11:17:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsJ5H-0006Qs-PI; Tue, 17 Feb 2026 11:17:39 +0000 Received: by outflank-mailman (input) for mailman id 1234853; Tue, 17 Feb 2026 11:17:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsJ5G-0006PU-2a for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 11:17:38 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 439677e4-0bf2-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 12:17:37 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-435f177a8f7so4447679f8f.1 for ; Tue, 17 Feb 2026 03:17:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 03:17:36 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 12:17:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] domain: skip more stuff for idle's vCPU-s in vcpu_create() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 17.02.2026 12:04, Roger Pau Monné wrote: > On Mon, Feb 16, 2026 at 04:54:30PM +0100, Jan Beulich wrote: >> Nothing hypercall-related needs setting up there. Nor do we need to >> check whether the idle domain is shutting down - it never will. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> @@ -516,7 +516,8 @@ struct vcpu *vcpu_create(struct domain * >> } >> >> /* Must be called after making new vcpu visible to for_each_vcpu(). */ >> - vcpu_check_shutdown(v); >> + if ( !is_idle_domain(d) ) >> + vcpu_check_shutdown(v); > > I would possibly leave this as-is. I agree that the idle domain will > never shut down, but it's possibly best to needlessly call into > vcpu_check_shutdown() for the idle domain rather than adding the extra > conditional for the common case? I'd prefer to keep it conditional: Calling the function for the idle domain gives a wrong impression, plus it may be the only one where the shutdown lock is used for that domain. We may want to make lock init conditional in domain_create() as well (possibly with other things we needlessly do for idle or more generally system domains). > My Ack stands regardless. Thank you. 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Tue, 17 Feb 2026 03:28:55 -0800 (PST) Message-ID: <06208b1b-9107-4ae6-acbf-c69659354da4@suse.com> Date: Tue, 17 Feb 2026 12:28:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/16] xen/riscv: implement arch_vcpu_{create,destroy}() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <42534cb6aabf25cf551a13ae1288045e1ac08f9e.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <42534cb6aabf25cf551a13ae1288045e1ac08f9e.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > Introduce architecture-specific functions to create and destroy VCPUs. > Note that arch_vcpu_create() currently returns -EOPNOTSUPP, as the virtual > timer and interrupt controller are not yet implemented. > > Add calle-saved registers to struct arch_vcpu which are used to preserve > Xen’s own execution context when switching between vCPU stacks. > It is going to be used in the following way (pseudocode): > context_switch(prev_vcpu, next_vcpu): > ... > > /* Switch from previous stack to the next stack. */ > __context_switch(prev_vcpu, next_vcpu); > > ... > schedule_tail(prev_vcpu): > Save and restore vCPU's CSRs. > The Xen-saved context allows __context_switch() to switch execution > from the previous vCPU’s stack to the next vCPU’s stack and later resume > execution on the original stack when switching back. > > During vCPU creation, the Xen-saved context is going to be initialized > with: > - SP pointing to the newly allocated vCPU stack. > - RA pointing to a helper that performs final vCPU setup before > transferring control to the guest. > > As part of this change, add continue_new_vcpu(), which will be used after > the first context_switch() of a new vCPU. Since this functionality is not > yet implemented, continue_new_vcpu() is currently provided as a stub. > The prev argument is going to be set by RISC-V ABI (prev will be stored in > a0) when __context_swtich() will be introduced and called from > context_switch(). > > Update the STACK_SIZE definition and introduce STACK_ORDER (to align with > other architectures) for allocating the vCPU stack. Yet you don't really need STACK_ORDER, as you use vzalloc() (unlike in particular Arm, but also x86). If there's no expected other use of the constant, I'd suggest to omit it, to avoid the false impression that RISC-V is like (again in particular) Arm in regards to how the stack is being allocated. > --- /dev/null > +++ b/xen/arch/riscv/domain.c > @@ -0,0 +1,58 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > + > +static void continue_new_vcpu(struct vcpu *prev) > +{ > + BUG_ON("unimplemented\n"); > +} > + > +static void __init __maybe_unused build_assertions(void) > +{ > + /* > + * Enforce the requirement documented in struct cpu_info that > + * guest_cpu_user_regs must be the first field. > + */ > + BUILD_BUG_ON(offsetof(struct cpu_info, guest_cpu_user_regs) != 0); > +} Nit: Generally we have this kind of function at the bottom of source files. > +int arch_vcpu_create(struct vcpu *v) > +{ > + int rc = 0; > + void *stack = vzalloc(STACK_SIZE); > + > + if ( !stack ) > + return -ENOMEM; > + > + v->arch.cpu_info = stack + STACK_SIZE - sizeof(struct cpu_info); Perhaps better sizeof(*v->arch.cpu_info), to connect lhs and rhs? > + v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; > + v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; > + > + /* Idle VCPUs don't need the rest of this setup */ > + if ( is_idle_vcpu(v) ) > + return rc; I'd suggest "return 0" here to make clear it's a success path. Then possible uses of "rc" earlier in the function also won't affect this. With all of the adjustments (happy to carry out while committing, as long as you agree) Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 11:38:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 11:38:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234883.1537986 (Exim 4.92) (envelope-from ) id 1vsJOz-0001b4-PF; Tue, 17 Feb 2026 11:38:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234883.1537986; Tue, 17 Feb 2026 11:38:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsJOz-0001ax-Mh; Tue, 17 Feb 2026 11:38:01 +0000 Received: by outflank-mailman (input) for mailman id 1234883; Tue, 17 Feb 2026 11:38:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsJOy-0001ar-8W for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 11:38:00 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1b262cd6-0bf5-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 12:37:57 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-43770c94dfaso4864237f8f.2 for ; Tue, 17 Feb 2026 03:37:57 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 03:37:56 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 12:37:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/16] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <06c3b8f88803039a3d900c8cb2f1fd9d05f44e3e.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <06c3b8f88803039a3d900c8cb2f1fd9d05f44e3e.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > Some hypervisor CSRs expose optional functionality and may not implement > all architectural bits. Writing unsupported bits can either be ignored > or raise an exception depending on the platform. > > Detect the set of writable bits for selected hypervisor CSRs at boot and > store the resulting masks for later use. This allows safely programming > these CSRs during vCPU context switching and avoids relying on hardcoded > architectural assumptions. > > Note that csr_set() is used instead of csr_write() to write all ones to > the mask, as the CSRRS instruction, according to the RISC-V specification, > sets only those bits that are writable (note that the quote consider only > non-read-only CSRs as writing to read-only CSRs according to the spec. > will raise an exception): > Any bit that is high in rs1 will cause the corresponding bit to be set > in the CSR, if that CSR bit is writable. > In contrast, the CSRRW instruction does not take CSR bit writability into > account, which could lead to unintended side effects when writing all ones > to a CSR. > > Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, > hstateen0 registers as only them are going to be used in the follow up > patch. > > If the Smstateen extension is not implemented, hstateen0 cannot be read > because the register is considered non-existent. Instructions that attempt > to access a CSR that is not implemented or not visible in the current mode > are reserved and will raise an illegal-instruction exception. > > Signed-off-by: Oleksii Kurochko > --- > Changes in V4: > - Move csr_masks defintion to domain.c. Make it static as at the moment > it is going to be used only in domain.c. Except that ... > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -2,9 +2,14 @@ > > #include > #include > +#include > #include > #include > > +#include > + > +struct csr_masks __ro_after_init csr_masks; ... it's not static here and even has ... > --- a/xen/arch/riscv/include/asm/setup.h > +++ b/xen/arch/riscv/include/asm/setup.h > @@ -5,6 +5,15 @@ > > #include > > +struct csr_masks { > + register_t hedeleg; > + register_t henvcfg; > + register_t hideleg; > + register_t hstateen0; > +}; > + > +extern struct csr_masks csr_masks; ... a declaration here. If you want to keep it non-static, it (and the struct decl) likely wants moving elsewhere. Whereas if you truly want it to be static, the struct decl would want moving to domain.c as well. > --- a/xen/arch/riscv/setup.c > +++ b/xen/arch/riscv/setup.c > @@ -70,6 +70,25 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) > return fdt; > } > > +void __init init_csr_masks(void) > +{ > + register_t old; As indicated before, this would better be ... > +#define INIT_CSR_MASK(csr, field) do { \ > + old = csr_read(CSR_##csr); \ > + csr_set(CSR_##csr, ULONG_MAX); \ > + csr_masks.field = csr_read(CSR_##csr); \ > + csr_write(CSR_##csr, old); \ > +} while (0) ... local to the scope the macro introduces. IOW with both this and the earlier remark, let's try to strive to have scope and exposure of variables as narrow as possible (unless of course there are clear reasons not to). And btw, wouldn't you again better use csr_swap() here? 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Nor do we need to > >> check whether the idle domain is shutting down - it never will. > >> > >> Signed-off-by: Jan Beulich > > > > Acked-by: Roger Pau Monné > > Thanks. > > >> @@ -516,7 +516,8 @@ struct vcpu *vcpu_create(struct domain * > >> } > >> > >> /* Must be called after making new vcpu visible to for_each_vcpu(). */ > >> - vcpu_check_shutdown(v); > >> + if ( !is_idle_domain(d) ) > >> + vcpu_check_shutdown(v); > > > > I would possibly leave this as-is. I agree that the idle domain will > > never shut down, but it's possibly best to needlessly call into > > vcpu_check_shutdown() for the idle domain rather than adding the extra > > conditional for the common case? > > I'd prefer to keep it conditional: Calling the function for the idle > domain gives a wrong impression, plus it may be the only one where the > shutdown lock is used for that domain. We may want to make lock init > conditional in domain_create() as well (possibly with other things we > needlessly do for idle or more generally system domains). I've been thinking about this, and I'm not sure whether it's the best approach to avoid initializing locks or lists for the idle vCPUs/domain. It's certainly good to avoid initializing stuff that consumes memory or other resources, but skipping plain initialization (iow: setting of values) of fields that are in the respective structs seems dangerous to a certain degree. If for whatever reason we end up with stray calls from the idle vCPUs/domain into functions that use those fields it's likely safer to have them initialized, rather than tripping into some uninitialized pointer or deadlock trying to acquire and uninitiated lock. Thanks, Roger. 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I can't > spot any support for it in Linux'es arch/riscv/Makefile (whereas > arch/arm/Makefile has such). Good point. It is something that should be renamed as not Arm64 (Arm32 really has such target), not RISC-V doesn't really work with zImage. They are using Image plus Image.gz as compressed image. Maybe it would be better to rename kernel_zimage_probe() to something more generic kernel_image_probe(). > >> Note that if panic() is used instead of returning an error as common code >> doesn't expect to have return code and it is something that should be >> done separately. > Is the "if" in this sentence a leftover from some editing of earlier > different text? I can't make sense of it. Also, which "common code" do you > mean? kernel_zimage_probe()'s sole caller does respect the return value > (handing it on). It is about kernel_zimage_load() which is used to set: struct kernel_info->load = kernel_zimage_load in kernel_zimage64_probe(). and which is called (and is in common code) from: void __init kernel_load(struct kernel_info *info) { ASSERT(info && info->load); info->load(info); } > >> This prepares the RISC-V port for booting Linux guests using the common >> domain build infrastructure. > Again, what's "common" here? Not something x86 uses, afaict. By "common" here I meant dom0less's common code which may use functions from this file. I will update that part to use more specific instead of "common". ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 12:28:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 12:28:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234944.1538015 (Exim 4.92) (envelope-from ) id 1vsKBU-00013u-TS; Tue, 17 Feb 2026 12:28:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234944.1538015; Tue, 17 Feb 2026 12:28:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKBU-00013n-Qq; Tue, 17 Feb 2026 12:28:08 +0000 Received: by outflank-mailman (input) for mailman id 1234944; Tue, 17 Feb 2026 12:28:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKBT-00013h-T4 for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 12:28:08 +0000 Received: from outpost1.zedat.fu-berlin.de (outpost1.zedat.fu-berlin.de [130.133.4.66]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1b3659eb-0bfc-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 13:28:04 +0100 (CET) Received: from inpost2.zedat.fu-berlin.de ([130.133.4.69]) by outpost.zedat.fu-berlin.de (Exim 4.99) with esmtps (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1vsKAq-00000002WEs-0TOS; Tue, 17 Feb 2026 13:27:28 +0100 Received: from p5dc55f29.dip0.t-ipconnect.de ([93.197.95.41] helo=[192.168.178.61]) by inpost2.zedat.fu-berlin.de (Exim 4.99) with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1vsKAp-000000026vw-3EPk; Tue, 17 Feb 2026 13:27:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1b3659eb-0bfc-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=fu-berlin.de; s=fub01; h=MIME-Version:Content-Transfer-Encoding: Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID:From: Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:In-Reply-To: References; bh=M8vjpXwBYqHTGgLeO7mfZbw/zRtPy35wLTMbPEUqNJY=; t=1771331284; x=1771936084; b=PMFJQP1hsQ6u0wJqU7yPNvQfkIvv6d20vi43oczt6xm5RnOpyr3+MkmCcSbPw wCL65j02UOk2fYWGjl08dHIZvbbf5w+3sN1TYhm1IEgVVFOBDMX9YBFh8EpKp7eq8l/biirLDaRJw 0mSiUdSG+zGfAEZH3IKRQTKTnTQiMHn+GeAYejKJq/1gMA50k8xsWa+3czfdUMQSW0LA7jDAkGp9Y vXX7+eQuUEHsvCeu6tM2ams1jHmGI7KDOY8LDS+0rWIn3pVFLklB6r9gU48MFUQ4XUgpu1rqUrT8G 3DR4efMypnwgEQ2fQeoAQEu+ffeALjqPhvK+jVdXkJ3uQymuHw==; Message-ID: Subject: Re: [PATCH v5 11/14] sparc: Use physical address DMA mapping From: John Paul Adrian Glaubitz To: Leon Romanovsky , Marek Szyprowski , Robin Murphy , Russell King , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Richard Henderson , Matt Turner , Thomas Bogendoerfer , "James E.J. Bottomley" , Helge Deller , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Geoff Levand , "David S. Miller" , Andreas Larsson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux Date: Tue, 17 Feb 2026 13:27:26 +0100 In-Reply-To: <20251015-remove-map-page-v5-11-3bbfe3a25cdf@kernel.org> References: <20251015-remove-map-page-v5-0-3bbfe3a25cdf@kernel.org> <20251015-remove-map-page-v5-11-3bbfe3a25cdf@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 MIME-Version: 1.0 X-Original-Sender: glaubitz@physik.fu-berlin.de X-Originating-IP: 93.197.95.41 X-ZEDAT-Hint: PO Hello Leon, On Wed, 2025-10-15 at 12:12 +0300, Leon Romanovsky wrote: > From: Leon Romanovsky >=20 > Convert sparc architecture DMA code to use .map_phys callback. >=20 > Signed-off-by: Leon Romanovsky > --- > arch/sparc/kernel/iommu.c | 30 +++++++++++++++++----------- > arch/sparc/kernel/pci_sun4v.c | 31 ++++++++++++++++++----------- > arch/sparc/mm/io-unit.c | 38 ++++++++++++++++++----------------- > arch/sparc/mm/iommu.c | 46 ++++++++++++++++++++++---------------= ------ > 4 files changed, 82 insertions(+), 63 deletions(-) >=20 > diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c > index da0363692528..46ef88bc9c26 100644 > --- a/arch/sparc/kernel/iommu.c > +++ b/arch/sparc/kernel/iommu.c > @@ -260,26 +260,35 @@ static void dma_4u_free_coherent(struct device *dev= , size_t size, > free_pages((unsigned long)cpu, order); > } > =20 > -static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, > - unsigned long offset, size_t sz, > - enum dma_data_direction direction, > +static dma_addr_t dma_4u_map_phys(struct device *dev, phys_addr_t phys, > + size_t sz, enum dma_data_direction direction, > unsigned long attrs) > { > struct iommu *iommu; > struct strbuf *strbuf; > iopte_t *base; > unsigned long flags, npages, oaddr; > - unsigned long i, base_paddr, ctx; > + unsigned long i, ctx; > u32 bus_addr, ret; > unsigned long iopte_protection; > =20 > + if (unlikely(attrs & DMA_ATTR_MMIO)) > + /* > + * This check is included because older versions of the code > + * lacked MMIO path support, and my ability to test this path > + * is limited. However, from a software technical standpoint, > + * there is no restriction, as the following code operates > + * solely on physical addresses. > + */ > + goto bad_no_ctx; > + > iommu =3D dev->archdata.iommu; > strbuf =3D dev->archdata.stc; > =20 > if (unlikely(direction =3D=3D DMA_NONE)) > goto bad_no_ctx; > =20 > - oaddr =3D (unsigned long)(page_address(page) + offset); > + oaddr =3D (unsigned long)(phys_to_virt(phys)); > npages =3D IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); > npages >>=3D IO_PAGE_SHIFT; > =20 > @@ -296,7 +305,6 @@ static dma_addr_t dma_4u_map_page(struct device *dev,= struct page *page, > bus_addr =3D (iommu->tbl.table_map_base + > ((base - iommu->page_table) << IO_PAGE_SHIFT)); > ret =3D bus_addr | (oaddr & ~IO_PAGE_MASK); > - base_paddr =3D __pa(oaddr & IO_PAGE_MASK); > if (strbuf->strbuf_enabled) > iopte_protection =3D IOPTE_STREAMING(ctx); > else > @@ -304,8 +312,8 @@ static dma_addr_t dma_4u_map_page(struct device *dev,= struct page *page, > if (direction !=3D DMA_TO_DEVICE) > iopte_protection |=3D IOPTE_WRITE; > =20 > - for (i =3D 0; i < npages; i++, base++, base_paddr +=3D IO_PAGE_SIZE) > - iopte_val(*base) =3D iopte_protection | base_paddr; > + for (i =3D 0; i < npages; i++, base++, phys +=3D IO_PAGE_SIZE) > + iopte_val(*base) =3D iopte_protection | phys; > =20 > return ret; > =20 > @@ -383,7 +391,7 @@ static void strbuf_flush(struct strbuf *strbuf, struc= t iommu *iommu, > vaddr, ctx, npages); > } > =20 > -static void dma_4u_unmap_page(struct device *dev, dma_addr_t bus_addr, > +static void dma_4u_unmap_phys(struct device *dev, dma_addr_t bus_addr, > size_t sz, enum dma_data_direction direction, > unsigned long attrs) > { > @@ -753,8 +761,8 @@ static int dma_4u_supported(struct device *dev, u64 d= evice_mask) > static const struct dma_map_ops sun4u_dma_ops =3D { > .alloc =3D dma_4u_alloc_coherent, > .free =3D dma_4u_free_coherent, > - .map_page =3D dma_4u_map_page, > - .unmap_page =3D dma_4u_unmap_page, > + .map_phys =3D dma_4u_map_phys, > + .unmap_phys =3D dma_4u_unmap_phys, > .map_sg =3D dma_4u_map_sg, > .unmap_sg =3D dma_4u_unmap_sg, > .sync_single_for_cpu =3D dma_4u_sync_single_for_cpu, > diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.= c > index b720b21ccfbd..791f0a76665f 100644 > --- a/arch/sparc/kernel/pci_sun4v.c > +++ b/arch/sparc/kernel/pci_sun4v.c > @@ -352,9 +352,8 @@ static void dma_4v_free_coherent(struct device *dev, = size_t size, void *cpu, > free_pages((unsigned long)cpu, order); > } > =20 > -static dma_addr_t dma_4v_map_page(struct device *dev, struct page *page, > - unsigned long offset, size_t sz, > - enum dma_data_direction direction, > +static dma_addr_t dma_4v_map_phys(struct device *dev, phys_addr_t phys, > + size_t sz, enum dma_data_direction direction, > unsigned long attrs) > { > struct iommu *iommu; > @@ -362,18 +361,27 @@ static dma_addr_t dma_4v_map_page(struct device *de= v, struct page *page, > struct iommu_map_table *tbl; > u64 mask; > unsigned long flags, npages, oaddr; > - unsigned long i, base_paddr; > - unsigned long prot; > + unsigned long i, prot; > dma_addr_t bus_addr, ret; > long entry; > =20 > + if (unlikely(attrs & DMA_ATTR_MMIO)) > + /* > + * This check is included because older versions of the code > + * lacked MMIO path support, and my ability to test this path > + * is limited. However, from a software technical standpoint, > + * there is no restriction, as the following code operates > + * solely on physical addresses. > + */ > + goto bad; > + > iommu =3D dev->archdata.iommu; > atu =3D iommu->atu; > =20 > if (unlikely(direction =3D=3D DMA_NONE)) > goto bad; > =20 > - oaddr =3D (unsigned long)(page_address(page) + offset); > + oaddr =3D (unsigned long)(phys_to_virt(phys)); > npages =3D IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); > npages >>=3D IO_PAGE_SHIFT; > =20 > @@ -391,7 +399,6 @@ static dma_addr_t dma_4v_map_page(struct device *dev,= struct page *page, > =20 > bus_addr =3D (tbl->table_map_base + (entry << IO_PAGE_SHIFT)); > ret =3D bus_addr | (oaddr & ~IO_PAGE_MASK); > - base_paddr =3D __pa(oaddr & IO_PAGE_MASK); > prot =3D HV_PCI_MAP_ATTR_READ; > if (direction !=3D DMA_TO_DEVICE) > prot |=3D HV_PCI_MAP_ATTR_WRITE; > @@ -403,8 +410,8 @@ static dma_addr_t dma_4v_map_page(struct device *dev,= struct page *page, > =20 > iommu_batch_start(dev, prot, entry); > =20 > - for (i =3D 0; i < npages; i++, base_paddr +=3D IO_PAGE_SIZE) { > - long err =3D iommu_batch_add(base_paddr, mask); > + for (i =3D 0; i < npages; i++, phys +=3D IO_PAGE_SIZE) { > + long err =3D iommu_batch_add(phys, mask); > if (unlikely(err < 0L)) > goto iommu_map_fail; > } > @@ -426,7 +433,7 @@ static dma_addr_t dma_4v_map_page(struct device *dev,= struct page *page, > return DMA_MAPPING_ERROR; > } > =20 > -static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, > +static void dma_4v_unmap_phys(struct device *dev, dma_addr_t bus_addr, > size_t sz, enum dma_data_direction direction, > unsigned long attrs) > { > @@ -686,8 +693,8 @@ static int dma_4v_supported(struct device *dev, u64 d= evice_mask) > static const struct dma_map_ops sun4v_dma_ops =3D { > .alloc =3D dma_4v_alloc_coherent, > .free =3D dma_4v_free_coherent, > - .map_page =3D dma_4v_map_page, > - .unmap_page =3D dma_4v_unmap_page, > + .map_phys =3D dma_4v_map_phys, > + .unmap_phys =3D dma_4v_unmap_phys, > .map_sg =3D dma_4v_map_sg, > .unmap_sg =3D dma_4v_unmap_sg, > .dma_supported =3D dma_4v_supported, > diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c > index d8376f61b4d0..d409cb450de4 100644 > --- a/arch/sparc/mm/io-unit.c > +++ b/arch/sparc/mm/io-unit.c > @@ -94,13 +94,14 @@ static int __init iounit_init(void) > subsys_initcall(iounit_init); > =20 > /* One has to hold iounit->lock to call this */ > -static unsigned long iounit_get_area(struct iounit_struct *iounit, unsig= ned long vaddr, int size) > +static dma_addr_t iounit_get_area(struct iounit_struct *iounit, > + phys_addr_t phys, int size) > { > int i, j, k, npages; > unsigned long rotor, scan, limit; > iopte_t iopte; > =20 > - npages =3D ((vaddr & ~PAGE_MASK) + size + (PAGE_SIZE-1)) >> PAGE= _SHIFT; > + npages =3D (offset_in_page(phys) + size + (PAGE_SIZE - 1)) >> PAGE_SHIF= T; > =20 > /* A tiny bit of magic ingredience :) */ > switch (npages) { > @@ -109,7 +110,7 @@ static unsigned long iounit_get_area(struct iounit_st= ruct *iounit, unsigned long > default: i =3D 0x0213; break; > } > =09 > - IOD(("iounit_get_area(%08lx,%d[%d])=3D", vaddr, size, npages)); > + IOD(("%s(%pa,%d[%d])=3D", __func__, &phys, size, npages)); > =09 > next: j =3D (i & 15); > rotor =3D iounit->rotor[j - 1]; > @@ -124,7 +125,8 @@ nexti: scan =3D find_next_zero_bit(iounit->bmap, limi= t, scan); > } > i >>=3D 4; > if (!(i & 15)) > - panic("iounit_get_area: Couldn't find free iopte slots for (%08lx,%d)= \n", vaddr, size); > + panic("iounit_get_area: Couldn't find free iopte slots for (%pa,%d)\n= ", > + &phys, size); > goto next; > } > for (k =3D 1, scan++; k < npages; k++) > @@ -132,30 +134,29 @@ nexti: scan =3D find_next_zero_bit(iounit->bmap, li= mit, scan); > goto nexti; > iounit->rotor[j - 1] =3D (scan < limit) ? scan : iounit->limit[j - 1]; > scan -=3D npages; > - iopte =3D MKIOPTE(__pa(vaddr & PAGE_MASK)); > - vaddr =3D IOUNIT_DMA_BASE + (scan << PAGE_SHIFT) + (vaddr & ~PAGE_MASK)= ; > + iopte =3D MKIOPTE(phys & PAGE_MASK); > + phys =3D IOUNIT_DMA_BASE + (scan << PAGE_SHIFT) + offset_in_page(phys); > for (k =3D 0; k < npages; k++, iopte =3D __iopte(iopte_val(iopte) + 0x1= 00), scan++) { > set_bit(scan, iounit->bmap); > sbus_writel(iopte_val(iopte), &iounit->page_table[scan]); > } > - IOD(("%08lx\n", vaddr)); > - return vaddr; > + IOD(("%pa\n", &phys)); > + return phys; > } > =20 > -static dma_addr_t iounit_map_page(struct device *dev, struct page *page, > - unsigned long offset, size_t len, enum dma_data_direction dir, > - unsigned long attrs) > +static dma_addr_t iounit_map_phys(struct device *dev, phys_addr_t phys, > + size_t len, enum dma_data_direction dir, unsigned long attrs) > { > - void *vaddr =3D page_address(page) + offset; > struct iounit_struct *iounit =3D dev->archdata.iommu; > - unsigned long ret, flags; > + unsigned long flags; > + dma_addr_t ret; > =09 > /* XXX So what is maxphys for us and how do drivers know it? */ > if (!len || len > 256 * 1024) > return DMA_MAPPING_ERROR; > =20 > spin_lock_irqsave(&iounit->lock, flags); > - ret =3D iounit_get_area(iounit, (unsigned long)vaddr, len); > + ret =3D iounit_get_area(iounit, phys, len); > spin_unlock_irqrestore(&iounit->lock, flags); > return ret; > } > @@ -171,14 +172,15 @@ static int iounit_map_sg(struct device *dev, struct= scatterlist *sgl, int nents, > /* FIXME: Cache some resolved pages - often several sg entries are to t= he same page */ > spin_lock_irqsave(&iounit->lock, flags); > for_each_sg(sgl, sg, nents, i) { > - sg->dma_address =3D iounit_get_area(iounit, (unsigned long) sg_virt(sg= ), sg->length); > + sg->dma_address =3D > + iounit_get_area(iounit, sg_phys(sg), sg->length); > sg->dma_length =3D sg->length; > } > spin_unlock_irqrestore(&iounit->lock, flags); > return nents; > } > =20 > -static void iounit_unmap_page(struct device *dev, dma_addr_t vaddr, size= _t len, > +static void iounit_unmap_phys(struct device *dev, dma_addr_t vaddr, size= _t len, > enum dma_data_direction dir, unsigned long attrs) > { > struct iounit_struct *iounit =3D dev->archdata.iommu; > @@ -279,8 +281,8 @@ static const struct dma_map_ops iounit_dma_ops =3D { > .alloc =3D iounit_alloc, > .free =3D iounit_free, > #endif > - .map_page =3D iounit_map_page, > - .unmap_page =3D iounit_unmap_page, > + .map_phys =3D iounit_map_phys, > + .unmap_phys =3D iounit_unmap_phys, > .map_sg =3D iounit_map_sg, > .unmap_sg =3D iounit_unmap_sg, > }; > diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c > index 5a5080db800f..f48adf62724a 100644 > --- a/arch/sparc/mm/iommu.c > +++ b/arch/sparc/mm/iommu.c > @@ -181,18 +181,20 @@ static void iommu_flush_iotlb(iopte_t *iopte, unsig= ned int niopte) > } > } > =20 > -static dma_addr_t __sbus_iommu_map_page(struct device *dev, struct page = *page, > - unsigned long offset, size_t len, bool per_page_flush) > +static dma_addr_t __sbus_iommu_map_phys(struct device *dev, phys_addr_t = paddr, > + size_t len, bool per_page_flush, unsigned long attrs) > { > struct iommu_struct *iommu =3D dev->archdata.iommu; > - phys_addr_t paddr =3D page_to_phys(page) + offset; > - unsigned long off =3D paddr & ~PAGE_MASK; > + unsigned long off =3D offset_in_page(paddr); > unsigned long npages =3D (off + len + PAGE_SIZE - 1) >> PAGE_SHIFT; > unsigned long pfn =3D __phys_to_pfn(paddr); > unsigned int busa, busa0; > iopte_t *iopte, *iopte0; > int ioptex, i; > =20 > + if (unlikely(attrs & DMA_ATTR_MMIO)) > + return DMA_MAPPING_ERROR; > + > /* XXX So what is maxphys for us and how do drivers know it? */ > if (!len || len > 256 * 1024) > return DMA_MAPPING_ERROR; > @@ -202,10 +204,10 @@ static dma_addr_t __sbus_iommu_map_page(struct devi= ce *dev, struct page *page, > * XXX Is this a good assumption? > * XXX What if someone else unmaps it here and races us? > */ > - if (per_page_flush && !PageHighMem(page)) { > + if (per_page_flush && !PhysHighMem(paddr)) { > unsigned long vaddr, p; > =20 > - vaddr =3D (unsigned long)page_address(page) + offset; > + vaddr =3D (unsigned long)phys_to_virt(paddr); > for (p =3D vaddr & PAGE_MASK; p < vaddr + len; p +=3D PAGE_SIZE) > flush_page_for_dma(p); > } > @@ -231,19 +233,19 @@ static dma_addr_t __sbus_iommu_map_page(struct devi= ce *dev, struct page *page, > return busa0 + off; > } > =20 > -static dma_addr_t sbus_iommu_map_page_gflush(struct device *dev, > - struct page *page, unsigned long offset, size_t len, > - enum dma_data_direction dir, unsigned long attrs) > +static dma_addr_t sbus_iommu_map_phys_gflush(struct device *dev, > + phys_addr_t phys, size_t len, enum dma_data_direction dir, > + unsigned long attrs) > { > flush_page_for_dma(0); > - return __sbus_iommu_map_page(dev, page, offset, len, false); > + return __sbus_iommu_map_phys(dev, phys, len, false, attrs); > } > =20 > -static dma_addr_t sbus_iommu_map_page_pflush(struct device *dev, > - struct page *page, unsigned long offset, size_t len, > - enum dma_data_direction dir, unsigned long attrs) > +static dma_addr_t sbus_iommu_map_phys_pflush(struct device *dev, > + phys_addr_t phys, size_t len, enum dma_data_direction dir, > + unsigned long attrs) > { > - return __sbus_iommu_map_page(dev, page, offset, len, true); > + return __sbus_iommu_map_phys(dev, phys, len, true, attrs); > } > =20 > static int __sbus_iommu_map_sg(struct device *dev, struct scatterlist *s= gl, > @@ -254,8 +256,8 @@ static int __sbus_iommu_map_sg(struct device *dev, st= ruct scatterlist *sgl, > int j; > =20 > for_each_sg(sgl, sg, nents, j) { > - sg->dma_address =3D__sbus_iommu_map_page(dev, sg_page(sg), > - sg->offset, sg->length, per_page_flush); > + sg->dma_address =3D __sbus_iommu_map_phys(dev, sg_phys(sg), > + sg->length, per_page_flush, attrs); > if (sg->dma_address =3D=3D DMA_MAPPING_ERROR) > return -EIO; > sg->dma_length =3D sg->length; > @@ -277,7 +279,7 @@ static int sbus_iommu_map_sg_pflush(struct device *de= v, struct scatterlist *sgl, > return __sbus_iommu_map_sg(dev, sgl, nents, dir, attrs, true); > } > =20 > -static void sbus_iommu_unmap_page(struct device *dev, dma_addr_t dma_add= r, > +static void sbus_iommu_unmap_phys(struct device *dev, dma_addr_t dma_add= r, > size_t len, enum dma_data_direction dir, unsigned long attrs) > { > struct iommu_struct *iommu =3D dev->archdata.iommu; > @@ -303,7 +305,7 @@ static void sbus_iommu_unmap_sg(struct device *dev, s= truct scatterlist *sgl, > int i; > =20 > for_each_sg(sgl, sg, nents, i) { > - sbus_iommu_unmap_page(dev, sg->dma_address, sg->length, dir, > + sbus_iommu_unmap_phys(dev, sg->dma_address, sg->length, dir, > attrs); > sg->dma_address =3D 0x21212121; > } > @@ -426,8 +428,8 @@ static const struct dma_map_ops sbus_iommu_dma_gflush= _ops =3D { > .alloc =3D sbus_iommu_alloc, > .free =3D sbus_iommu_free, > #endif > - .map_page =3D sbus_iommu_map_page_gflush, > - .unmap_page =3D sbus_iommu_unmap_page, > + .map_phys =3D sbus_iommu_map_phys_gflush, > + .unmap_phys =3D sbus_iommu_unmap_phys, > .map_sg =3D sbus_iommu_map_sg_gflush, > .unmap_sg =3D sbus_iommu_unmap_sg, > }; > @@ -437,8 +439,8 @@ static const struct dma_map_ops sbus_iommu_dma_pflush= _ops =3D { > .alloc =3D sbus_iommu_alloc, > .free =3D sbus_iommu_free, > #endif > - .map_page =3D sbus_iommu_map_page_pflush, > - .unmap_page =3D sbus_iommu_unmap_page, > + .map_phys =3D sbus_iommu_map_phys_pflush, > + .unmap_phys =3D sbus_iommu_unmap_phys, > .map_sg =3D sbus_iommu_map_sg_pflush, > .unmap_sg =3D sbus_iommu_unmap_sg, > }; This change has just been reported to cause a regression with the igb driver on some SPARC server systems: Feb 16 15:20:22 sparcy kernel: igb 0000:0c:00.0 enp12s0f0: igb: enp12s0f0 N= IC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX=20 Feb 16 15:20:23 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000000a7d:1:2736c000] failed with status 8=20 Feb 16 15:20:23 sparcy kernel: igb 0000:0c:00.0: TX DMA map failed=20 Feb 16 15:20:23 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000000a7e:1:2736c000] failed with status 8=20 Feb 16 15:20:23 sparcy kernel: igb 0000:0c:00.0: TX DMA map failed=20 Feb 16 15:20:23 sparcy kernel: igb 0000:0c:00.1 enp12s0f1: igb: enp12s0f1 N= IC Link is Up 100 Mbps Full Duplex, Flow Control: RX=20 Feb 16 15:20:23 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 000001c02af:1:2736e000] failed with status 8=20 Feb 16 15:20:23 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 0000038009f:1:27390000] failed with status 8=20 Feb 16 15:20:23 sparcy kernel: igb 0000:0c:00.1: TX DMA map failed=20 Feb 16 15:20:23 sparcy last message buffered 1 times=20 Feb 16 15:20:23 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 000001c02b1:1:2736e000] failed with status 8=20 Feb 16 15:20:23 sparcy kernel: igb 0000:0c:00.0: TX DMA map failed=20 Feb 16 15:20:24 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000000a80:1:2736c000] failed with status 8=20 Feb 16 15:20:24 sparcy kernel: igb 0000:0c:00.0: TX DMA map failed=20 Feb 16 15:20:24 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000000a81:1:2736c000] failed with status 8=20 Feb 16 15:20:24 sparcy kernel: igb 0000:0c:00.0: TX DMA map failed=20 Feb 16 15:20:24 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000200000:1:2738e000] failed with status 8=20 Feb 16 15:20:24 sparcy kernel: igb 0000:0c:00.1: TX DMA map failed=20 Feb 16 15:20:24 sparcy kernel: iommu_batch_flush: ATU map of [00000400:2:10= 00000000a82:1:2736c000] failed with status 8=20 Feb 16 15:20:24 sparcy kernel: igb 0000:0c:00.1: TX DMA map failed Please see also the discussion in [1]. Adrian > [1] https://github.com/sparclinux/issues/issues/75 --=20 .''`. John Paul Adrian Glaubitz : :' : Debian Developer `. `' Physicist `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913 From xen-devel-bounces@lists.xenproject.org Tue Feb 17 12:56:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 12:56:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234963.1538027 (Exim 4.92) (envelope-from ) id 1vsKch-0004y4-1A; Tue, 17 Feb 2026 12:56:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234963.1538027; Tue, 17 Feb 2026 12:56:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKcg-0004xx-T2; Tue, 17 Feb 2026 12:56:14 +0000 Received: by outflank-mailman (input) for mailman id 1234963; Tue, 17 Feb 2026 12:56:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKcf-0004xm-AS for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 12:56:14 +0000 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 02e53af7-0c00-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 13:56:03 +0100 (CET) Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20260217125600euoutp01e702ba17a82df7a26cb54abe09518e80~VCfFtKJNi2750327503euoutp01K; Tue, 17 Feb 2026 12:56:00 +0000 (GMT) Received: from eusmtip1.samsung.com (unknown [203.254.199.221]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20260217125600eucas1p2f5a7aaf272ec1e8419eb4f30114ae4c0~VCfFifkBN0465704657eucas1p2k; Tue, 17 Feb 2026 12:56:00 +0000 (GMT) Received: from [106.210.134.192] (unknown [106.210.134.192]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20260217125557eusmtip157747204999f9293afbbfbea0aadd349~VCfCuB9mO1169311693eusmtip1R; Tue, 17 Feb 2026 12:55:57 +0000 (GMT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 02e53af7-0c00-11f1-b164-2bf370ae4941 DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20260217125600euoutp01e702ba17a82df7a26cb54abe09518e80~VCfFtKJNi2750327503euoutp01K DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1771332961; bh=kPHvBI1Pan3M4iaidTIFZnbtqSz3AZ7jPYAHqyBo5u8=; h=Date:Subject:To:Cc:From:In-Reply-To:References:From; b=qE2Na2wFoGobnNwByWm49yVZUxp6ZyqvGOKUcTxQmO/J9J6nwYoOSde40k3tzupbf 5drCH58ib86rmTAuEFK3Dh2gBz0w2T0sLKmgAdsu5bu3cX1d1C762Ho+VBd2ZtAcrr Rpa2eUVwXatWI/hNEoqzx/baF+s1uCvrB4JykOMY= Message-ID: <7131d609-b083-4264-818a-21de38c1c3ed@samsung.com> Date: Tue, 17 Feb 2026 13:55:56 +0100 MIME-Version: 1.0 User-Agent: Betterbird (Windows) Subject: Re: [PATCH v5 11/14] sparc: Use physical address DMA mapping To: John Paul Adrian Glaubitz , Leon Romanovsky , Robin Murphy , Russell King , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Richard Henderson , Matt Turner , Thomas Bogendoerfer , "James E.J. Bottomley" , Helge Deller , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Geoff Levand , "David S. Miller" , Andreas Larsson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux Content-Language: en-US From: Marek Szyprowski In-Reply-To: Content-Transfer-Encoding: 8bit X-CMS-MailID: 20260217125600eucas1p2f5a7aaf272ec1e8419eb4f30114ae4c0 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-RootMTR: 20260217123216eucas1p2d74189a3cdf08e9301bebf1840491364 X-EPHeader: CA X-CMS-RootMailID: 20260217123216eucas1p2d74189a3cdf08e9301bebf1840491364 References: <20251015-remove-map-page-v5-0-3bbfe3a25cdf@kernel.org> <20251015-remove-map-page-v5-11-3bbfe3a25cdf@kernel.org> On 17.02.2026 13:27, John Paul Adrian Glaubitz wrote: > On Wed, 2025-10-15 at 12:12 +0300, Leon Romanovsky wrote: >> From: Leon Romanovsky >> >> Convert sparc architecture DMA code to use .map_phys callback. >> >> Signed-off-by: Leon Romanovsky >> --- >> arch/sparc/kernel/iommu.c | 30 +++++++++++++++++----------- >> arch/sparc/kernel/pci_sun4v.c | 31 ++++++++++++++++++----------- >> arch/sparc/mm/io-unit.c | 38 ++++++++++++++++++----------------- >> arch/sparc/mm/iommu.c | 46 ++++++++++++++++++++++--------------------- >> 4 files changed, 82 insertions(+), 63 deletions(-) >> >> diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c >> index da0363692528..46ef88bc9c26 100644 >> --- a/arch/sparc/kernel/iommu.c >> +++ b/arch/sparc/kernel/iommu.c >> @@ -260,26 +260,35 @@ static void dma_4u_free_coherent(struct device *dev, size_t size, >> free_pages((unsigned long)cpu, order); >> } >> >> -static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, >> - unsigned long offset, size_t sz, >> - enum dma_data_direction direction, >> +static dma_addr_t dma_4u_map_phys(struct device *dev, phys_addr_t phys, >> + size_t sz, enum dma_data_direction direction, >> unsigned long attrs) >> { >> struct iommu *iommu; >> struct strbuf *strbuf; >> iopte_t *base; >> unsigned long flags, npages, oaddr; >> - unsigned long i, base_paddr, ctx; >> + unsigned long i, ctx; >> u32 bus_addr, ret; >> unsigned long iopte_protection; >> >> + if (unlikely(attrs & DMA_ATTR_MMIO)) >> + /* >> + * This check is included because older versions of the code >> + * lacked MMIO path support, and my ability to test this path >> + * is limited. However, from a software technical standpoint, >> + * there is no restriction, as the following code operates >> + * solely on physical addresses. >> + */ >> + goto bad_no_ctx; >> + >> iommu = dev->archdata.iommu; >> strbuf = dev->archdata.stc; >> >> if (unlikely(direction == DMA_NONE)) >> goto bad_no_ctx; >> >> - oaddr = (unsigned long)(page_address(page) + offset); >> + oaddr = (unsigned long)(phys_to_virt(phys)); >> npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); >> npages >>= IO_PAGE_SHIFT; >> >> @@ -296,7 +305,6 @@ static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, >> bus_addr = (iommu->tbl.table_map_base + >> ((base - iommu->page_table) << IO_PAGE_SHIFT)); >> ret = bus_addr | (oaddr & ~IO_PAGE_MASK); >> - base_paddr = __pa(oaddr & IO_PAGE_MASK); >> if (strbuf->strbuf_enabled) >> iopte_protection = IOPTE_STREAMING(ctx); >> else >> @@ -304,8 +312,8 @@ static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, >> if (direction != DMA_TO_DEVICE) >> iopte_protection |= IOPTE_WRITE; >> >> - for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) >> - iopte_val(*base) = iopte_protection | base_paddr; >> + for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE) >> + iopte_val(*base) = iopte_protection | phys; 'base_paddr' was aligned to start of a page before this patch, while 'phys' includes the offset within a page. Could You check if the following change fixes the issue? diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c index 46ef88bc9c26..edb0ffb21e2f 100644 --- a/arch/sparc/kernel/iommu.c +++ b/arch/sparc/kernel/iommu.c @@ -312,6 +312,7 @@ static dma_addr_t dma_4u_map_phys(struct device *dev, phys_addr_t phys,         if (direction != DMA_TO_DEVICE)                 iopte_protection |= IOPTE_WRITE; +       phys -= offset_in_page(phys);         for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE)                 iopte_val(*base) = iopte_protection | phys; >> ... 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Since this functionality is not >> yet implemented, continue_new_vcpu() is currently provided as a stub. >> The prev argument is going to be set by RISC-V ABI (prev will be stored in >> a0) when __context_swtich() will be introduced and called from >> context_switch(). >> >> Update the STACK_SIZE definition and introduce STACK_ORDER (to align with >> other architectures) for allocating the vCPU stack. > Yet you don't really need STACK_ORDER, as you use vzalloc() (unlike in > particular Arm, but also x86). If there's no expected other use of the > constant, I'd suggest to omit it, to avoid the false impression that > RISC-V is like (again in particular) Arm in regards to how the stack is > being allocated. Yes, this is the only one usage of STACK_ORDER constant so it could be omitted. >> --- /dev/null >> +++ b/xen/arch/riscv/domain.c >> @@ -0,0 +1,58 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +static void continue_new_vcpu(struct vcpu *prev) >> +{ >> + BUG_ON("unimplemented\n"); >> +} >> + >> +static void __init __maybe_unused build_assertions(void) >> +{ >> + /* >> + * Enforce the requirement documented in struct cpu_info that >> + * guest_cpu_user_regs must be the first field. >> + */ >> + BUILD_BUG_ON(offsetof(struct cpu_info, guest_cpu_user_regs) != 0); >> +} > Nit: Generally we have this kind of function at the bottom of source files. > >> +int arch_vcpu_create(struct vcpu *v) >> +{ >> + int rc = 0; >> + void *stack = vzalloc(STACK_SIZE); >> + >> + if ( !stack ) >> + return -ENOMEM; >> + >> + v->arch.cpu_info = stack + STACK_SIZE - sizeof(struct cpu_info); > Perhaps better sizeof(*v->arch.cpu_info), to connect lhs and rhs? > >> + v->arch.xen_saved_context.sp = (register_t)v->arch.cpu_info; >> + v->arch.xen_saved_context.ra = (register_t)continue_new_vcpu; >> + >> + /* Idle VCPUs don't need the rest of this setup */ >> + if ( is_idle_vcpu(v) ) >> + return rc; > I'd suggest "return 0" here to make clear it's a success path. Then > possible uses of "rc" earlier in the function also won't affect this. > > With all of the adjustments (happy to carry out while committing, as long > as you agree) > Acked-by: Jan Beulich I am okay with suggested adjustments. Thanks a lot! ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 12:59:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 12:59:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1234982.1538046 (Exim 4.92) (envelope-from ) id 1vsKfV-000686-Lw; Tue, 17 Feb 2026 12:59:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1234982.1538046; Tue, 17 Feb 2026 12:59:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKfV-00067z-J4; Tue, 17 Feb 2026 12:59:09 +0000 Received: by outflank-mailman (input) for mailman id 1234982; Tue, 17 Feb 2026 12:59:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKfT-00067t-M0 for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 12:59:07 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6cf20670-0c00-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 13:58:59 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-4837907f535so28973065e9.3 for ; Tue, 17 Feb 2026 04:58:59 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 04:58:58 -0800 (PST) Message-ID: <753e14da-39e3-41d0-bbbc-0e10c9594b9f@suse.com> Date: Tue, 17 Feb 2026 13:58:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] domain: skip more stuff for idle's vCPU-s in vcpu_create() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 17.02.2026 12:46, Roger Pau Monné wrote: > On Tue, Feb 17, 2026 at 12:17:35PM +0100, Jan Beulich wrote: >> On 17.02.2026 12:04, Roger Pau Monné wrote: >>> On Mon, Feb 16, 2026 at 04:54:30PM +0100, Jan Beulich wrote: >>>> @@ -516,7 +516,8 @@ struct vcpu *vcpu_create(struct domain * >>>> } >>>> >>>> /* Must be called after making new vcpu visible to for_each_vcpu(). */ >>>> - vcpu_check_shutdown(v); >>>> + if ( !is_idle_domain(d) ) >>>> + vcpu_check_shutdown(v); >>> >>> I would possibly leave this as-is. I agree that the idle domain will >>> never shut down, but it's possibly best to needlessly call into >>> vcpu_check_shutdown() for the idle domain rather than adding the extra >>> conditional for the common case? >> >> I'd prefer to keep it conditional: Calling the function for the idle >> domain gives a wrong impression, plus it may be the only one where the >> shutdown lock is used for that domain. We may want to make lock init >> conditional in domain_create() as well (possibly with other things we >> needlessly do for idle or more generally system domains). > > I've been thinking about this, and I'm not sure whether it's the best > approach to avoid initializing locks or lists for the idle > vCPUs/domain. > > It's certainly good to avoid initializing stuff that consumes memory > or other resources, but skipping plain initialization (iow: setting of > values) of fields that are in the respective structs seems dangerous > to a certain degree. If for whatever reason we end up with stray > calls from the idle vCPUs/domain into functions that use those fields > it's likely safer to have them initialized, rather than tripping into > some uninitialized pointer or deadlock trying to acquire and > uninitiated lock. Otoh without doing so it's pretty unlikely that we would spot such stray calls. Which better would be avoided imo. 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Tue, 17 Feb 2026 05:02:36 -0800 (PST) Message-ID: <4253dd88-b408-43dc-90d3-f2d1d3c892b0@suse.com> Date: Tue, 17 Feb 2026 14:02:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/6] xen/riscv: add zImage kernel loading support To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <308c5bc1de15b23c643d48f975799739f44dde8d.1770821989.git.oleksii.kurochko@gmail.com> <0bca8843-9c52-4544-88a6-87ddb110095e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 12:58, Oleksii Kurochko wrote: > On 2/16/26 5:31 PM, Jan Beulich wrote: >> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>> Introduce support for loading a Linux zImage kernel on RISC-V. >> Before I look here in any detail - where would a zImage come from? I can't >> spot any support for it in Linux'es arch/riscv/Makefile (whereas >> arch/arm/Makefile has such). > > Good point. > > It is something that should be renamed as not Arm64 (Arm32 really has such > target), not RISC-V doesn't really work with zImage. They are using Image plus > Image.gz as compressed image. > > Maybe it would be better to rename kernel_zimage_probe() to something more > generic kernel_image_probe(). Well, it's two things. In the description you explicitly say zImage. That's simply misleading. Renaming the function (if indeed it copes with more than just zImage) would likely be a good thing too, but needs sorting with its maintainers. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 13:15:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 13:15:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235010.1538074 (Exim 4.92) (envelope-from ) id 1vsKvP-0001B6-87; Tue, 17 Feb 2026 13:15:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235010.1538074; Tue, 17 Feb 2026 13:15:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKvP-0001Az-4R; Tue, 17 Feb 2026 13:15:35 +0000 Received: by outflank-mailman (input) for mailman id 1235010; Tue, 17 Feb 2026 13:15:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsKvO-0001Ap-0Y for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 13:15:34 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bb7aebfa-0c02-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 14:15:31 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 43946406EF; Tue, 17 Feb 2026 13:15:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7BCD7C4CEF7; Tue, 17 Feb 2026 13:15:28 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bb7aebfa-0c02-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771334129; bh=IFqWRnMOe90PHPZ6ogIhD60Li5AyK3EFhOC6WZ8V4S8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=F44Ix8zfCzwWI4AQs9GQP2t1ynVHWLNSCY3twBxZFDsxlSu/RfSxZcW9hg0L7WEMK DVLz5necSLs8Vd9sUbcqNxHiXhSe1wgYUNVz9W3t3HjIlpnMvOSIidbsZRLiskWn68 xItdSgwjZ64haQEHc9AA+Car4oFuKE6jJy6K1oZ9qp0NfO17s8m5QhB5G3se54yqng +Woyi/px6vIOOUpaq+Jzvi7e5oKdunoebhikfsFPd3HTxF9VWSvih4dM6ug2R8hcj/ MvelNqZrwI6p0ECzsvxqAg+vPD6IuKSVLKEs3YzKCjc2YZAO5l2Mn9P1+IofP43CvT 66YAmYLUGAOHw== Date: Tue, 17 Feb 2026 15:15:25 +0200 From: Leon Romanovsky To: Marek Szyprowski Cc: John Paul Adrian Glaubitz , Robin Murphy , Russell King , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Richard Henderson , Matt Turner , Thomas Bogendoerfer , "James E.J. Bottomley" , Helge Deller , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Geoff Levand , "David S. Miller" , Andreas Larsson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux Subject: Re: [PATCH v5 11/14] sparc: Use physical address DMA mapping Message-ID: <20260217131525.GK12989@unreal> References: <20251015-remove-map-page-v5-0-3bbfe3a25cdf@kernel.org> <20251015-remove-map-page-v5-11-3bbfe3a25cdf@kernel.org> <7131d609-b083-4264-818a-21de38c1c3ed@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <7131d609-b083-4264-818a-21de38c1c3ed@samsung.com> On Tue, Feb 17, 2026 at 01:55:56PM +0100, Marek Szyprowski wrote: > On 17.02.2026 13:27, John Paul Adrian Glaubitz wrote: > > On Wed, 2025-10-15 at 12:12 +0300, Leon Romanovsky wrote: > >> From: Leon Romanovsky > >> > >> Convert sparc architecture DMA code to use .map_phys callback. > >> > >> Signed-off-by: Leon Romanovsky > >> --- > >> arch/sparc/kernel/iommu.c | 30 +++++++++++++++++----------- > >> arch/sparc/kernel/pci_sun4v.c | 31 ++++++++++++++++++----------- > >> arch/sparc/mm/io-unit.c | 38 ++++++++++++++++++----------------- > >> arch/sparc/mm/iommu.c | 46 ++++++++++++++++++++++--------------------- > >> 4 files changed, 82 insertions(+), 63 deletions(-) <...> > >> @@ -296,7 +305,6 @@ static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, > >> bus_addr = (iommu->tbl.table_map_base + > >> ((base - iommu->page_table) << IO_PAGE_SHIFT)); > >> ret = bus_addr | (oaddr & ~IO_PAGE_MASK); > >> - base_paddr = __pa(oaddr & IO_PAGE_MASK); > >> if (strbuf->strbuf_enabled) > >> iopte_protection = IOPTE_STREAMING(ctx); > >> else > >> @@ -304,8 +312,8 @@ static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, > >> if (direction != DMA_TO_DEVICE) > >> iopte_protection |= IOPTE_WRITE; > >> > >> - for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) > >> - iopte_val(*base) = iopte_protection | base_paddr; > >> + for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE) > >> + iopte_val(*base) = iopte_protection | phys; > > 'base_paddr' was aligned to start of a page before this patch, while > 'phys'includes the offset within a page. Thanks for the fix. I had assumed we needed to revert all changes in iounit_get_area(). Thanks > > > Could You check if the following change fixes the issue? > > diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c > index 46ef88bc9c26..edb0ffb21e2f 100644 > --- a/arch/sparc/kernel/iommu.c > +++ b/arch/sparc/kernel/iommu.c > @@ -312,6 +312,7 @@ static dma_addr_t dma_4u_map_phys(struct device > *dev, phys_addr_t phys, > if (direction != DMA_TO_DEVICE) > iopte_protection |= IOPTE_WRITE; > > + phys -= offset_in_page(phys); > for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE) > iopte_val(*base) = iopte_protection | phys; > > >> ... > > Best regards > -- > Marek Szyprowski, PhD > Samsung R&D Institute Poland > From xen-devel-bounces@lists.xenproject.org Tue Feb 17 13:58:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 13:58:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235048.1538084 (Exim 4.92) (envelope-from ) id 1vsLaT-0006ox-CW; Tue, 17 Feb 2026 13:58:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235048.1538084; Tue, 17 Feb 2026 13:58:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsLaT-0006oq-9O; Tue, 17 Feb 2026 13:58:01 +0000 Received: by outflank-mailman (input) for mailman id 1235048; Tue, 17 Feb 2026 13:57:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsLaR-0006oi-RP for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 13:57:59 +0000 Received: from outpost1.zedat.fu-berlin.de (outpost1.zedat.fu-berlin.de [130.133.4.66]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a8ed250e-0c08-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 14:57:56 +0100 (CET) Received: from inpost2.zedat.fu-berlin.de ([130.133.4.69]) by outpost.zedat.fu-berlin.de (Exim 4.99) with esmtps (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1vsLa1-00000003Yoo-11bO; Tue, 17 Feb 2026 14:57:33 +0100 Received: from p5dc55f29.dip0.t-ipconnect.de ([93.197.95.41] helo=[192.168.178.61]) by inpost2.zedat.fu-berlin.de (Exim 4.99) with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1vsLa0-00000002m9f-3s0R; Tue, 17 Feb 2026 14:57:33 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a8ed250e-0c08-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=fu-berlin.de; s=fub01; h=MIME-Version:Content-Transfer-Encoding: Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID:From: Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:In-Reply-To: References; bh=Pwz8t6PMdZ7Eyt0zG9XbbpQPro+70AXMQDf5xeeq3xY=; t=1771336676; x=1771941476; b=BTJfoUA5/Tssd/r89oNlyy+EYXq6gbr1AO+jgHGFHmuw4S1GS1dTscqK0jRoi ami5YzaozGjKFTpEYYz+1+ek8ythDO6BzyiAQ7yA7hZl+jHIBlkUgD6/bkzpFzhuLjDlhWfKif4QR g/FGh/ce0NFMJKEcbmQDHW7qW1OvI6HRhyXKZgvjTDRV6QoBoEtdjEsMPl9xlDA+WXYjdTRREgLBw WuRGfstyOupcvyD40ziEa8seSC9zPdPLPwlbnjEpQgYVzOiLhqkAZSAGaQ2jBwuSb0PVC5x9XFUQE DwoJIpVN3aSykl85Jx1+SawA2LXKHJfctjN3ZsCotUHwsUacaQ==; Message-ID: <8317613a286ab637ac29740433ff51286ebbbaca.camel@physik.fu-berlin.de> Subject: Re: [PATCH v5 11/14] sparc: Use physical address DMA mapping From: John Paul Adrian Glaubitz To: Marek Szyprowski , Leon Romanovsky , Robin Murphy , Russell King , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Richard Henderson , Matt Turner , Thomas Bogendoerfer , "James E.J. Bottomley" , Helge Deller , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Geoff Levand , "David S. Miller" , Andreas Larsson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux Date: Tue, 17 Feb 2026 14:57:31 +0100 In-Reply-To: <7131d609-b083-4264-818a-21de38c1c3ed@samsung.com> References: <20251015-remove-map-page-v5-0-3bbfe3a25cdf@kernel.org> <20251015-remove-map-page-v5-11-3bbfe3a25cdf@kernel.org> <7131d609-b083-4264-818a-21de38c1c3ed@samsung.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 MIME-Version: 1.0 X-Original-Sender: glaubitz@physik.fu-berlin.de X-Originating-IP: 93.197.95.41 X-ZEDAT-Hint: PO Hi Marek, On Tue, 2026-02-17 at 13:55 +0100, Marek Szyprowski wrote: > On 17.02.2026 13:27, John Paul Adrian Glaubitz wrote: > > On Wed, 2025-10-15 at 12:12 +0300, Leon Romanovsky wrote: > > > From: Leon Romanovsky > > >=20 > > > Convert sparc architecture DMA code to use .map_phys callback. > > >=20 > > > Signed-off-by: Leon Romanovsky > > > --- > > > arch/sparc/kernel/iommu.c | 30 +++++++++++++++++----------- > > > arch/sparc/kernel/pci_sun4v.c | 31 ++++++++++++++++++----------- > > > arch/sparc/mm/io-unit.c | 38 ++++++++++++++++++--------------= --- > > > arch/sparc/mm/iommu.c | 46 ++++++++++++++++++++++----------= ----------- > > > 4 files changed, 82 insertions(+), 63 deletions(-) > > >=20 > > > diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c > > > index da0363692528..46ef88bc9c26 100644 > > > --- a/arch/sparc/kernel/iommu.c > > > +++ b/arch/sparc/kernel/iommu.c > > > @@ -260,26 +260,35 @@ static void dma_4u_free_coherent(struct device = *dev, size_t size, > > > free_pages((unsigned long)cpu, order); > > > } > > > =20 > > > -static dma_addr_t dma_4u_map_page(struct device *dev, struct page *p= age, > > > - unsigned long offset, size_t sz, > > > - enum dma_data_direction direction, > > > +static dma_addr_t dma_4u_map_phys(struct device *dev, phys_addr_t ph= ys, > > > + size_t sz, enum dma_data_direction direction, > > > unsigned long attrs) > > > { > > > struct iommu *iommu; > > > struct strbuf *strbuf; > > > iopte_t *base; > > > unsigned long flags, npages, oaddr; > > > - unsigned long i, base_paddr, ctx; > > > + unsigned long i, ctx; > > > u32 bus_addr, ret; > > > unsigned long iopte_protection; > > > =20 > > > + if (unlikely(attrs & DMA_ATTR_MMIO)) > > > + /* > > > + * This check is included because older versions of the code > > > + * lacked MMIO path support, and my ability to test this path > > > + * is limited. However, from a software technical standpoint, > > > + * there is no restriction, as the following code operates > > > + * solely on physical addresses. > > > + */ > > > + goto bad_no_ctx; > > > + > > > iommu =3D dev->archdata.iommu; > > > strbuf =3D dev->archdata.stc; > > > =20 > > > if (unlikely(direction =3D=3D DMA_NONE)) > > > goto bad_no_ctx; > > > =20 > > > - oaddr =3D (unsigned long)(page_address(page) + offset); > > > + oaddr =3D (unsigned long)(phys_to_virt(phys)); > > > npages =3D IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); > > > npages >>=3D IO_PAGE_SHIFT; > > > =20 > > > @@ -296,7 +305,6 @@ static dma_addr_t dma_4u_map_page(struct device *= dev, struct page *page, > > > bus_addr =3D (iommu->tbl.table_map_base + > > > ((base - iommu->page_table) << IO_PAGE_SHIFT)); > > > ret =3D bus_addr | (oaddr & ~IO_PAGE_MASK); > > > - base_paddr =3D __pa(oaddr & IO_PAGE_MASK); > > > if (strbuf->strbuf_enabled) > > > iopte_protection =3D IOPTE_STREAMING(ctx); > > > else > > > @@ -304,8 +312,8 @@ static dma_addr_t dma_4u_map_page(struct device *= dev, struct page *page, > > > if (direction !=3D DMA_TO_DEVICE) > > > iopte_protection |=3D IOPTE_WRITE; > > > =20 > > > - for (i =3D 0; i < npages; i++, base++, base_paddr +=3D IO_PAGE_SIZE= ) > > > - iopte_val(*base) =3D iopte_protection | base_paddr; > > > + for (i =3D 0; i < npages; i++, base++, phys +=3D IO_PAGE_SIZE) > > > + iopte_val(*base) =3D iopte_protection | phys; >=20 > 'base_paddr' was aligned to start of a page before this patch, while=20 > 'phys'=C2=A0includes the offset within a page. >=20 >=20 > Could You check if the following change fixes the issue? >=20 > diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c > index 46ef88bc9c26..edb0ffb21e2f 100644 > --- a/arch/sparc/kernel/iommu.c > +++ b/arch/sparc/kernel/iommu.c > @@ -312,6 +312,7 @@ static dma_addr_t dma_4u_map_phys(struct device=20 > *dev, phys_addr_t phys, > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (direction !=3D DMA_TO_DEV= ICE) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 iopte_protection |=3D IOPTE_WRITE; >=20 > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 phys -=3D offset_in_page(phys); > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 for (i =3D 0; i < npages; i++= , base++, phys +=3D IO_PAGE_SIZE) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 iopte_val(*base) =3D iopte_protection | phys; Thanks, I have forwarded your patch and asked the user to answer here if po= ssible [1]. Adrian > [1] https://github.com/sparclinux/issues/issues/75#issuecomment-391479186= 2 --=20 .''`. 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Tue, 17 Feb 2026 06:03:39 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 15:03:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 03/16] xen/riscv: build setup code as .init To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > At the moment, all code and data in setup.c are marked with > __init or __init_data, "... which is intended to remain this way." Nit: It's __initdata. so leverage this by using setup.init.o > instead of setup.o in Makefile. > > Suggested-by: Jan Beulich > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich (once again happy to make adjustments while committing) Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 14:23:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 14:23:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235074.1538111 (Exim 4.92) (envelope-from ) id 1vsLyq-0002wz-HU; Tue, 17 Feb 2026 14:23:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235074.1538111; Tue, 17 Feb 2026 14:23:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsLyq-0002ws-Eq; Tue, 17 Feb 2026 14:23:12 +0000 Received: by outflank-mailman (input) for mailman id 1235074; Tue, 17 Feb 2026 14:23:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsLyo-0002wm-ML for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 14:23:10 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2ee4e7c4-0c0c-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 15:23:09 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4837634de51so14457725e9.1 for ; Tue, 17 Feb 2026 06:23:09 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 06:23:08 -0800 (PST) Message-ID: <07e6d8a4-c825-4d65-ab27-60ced2f25e79@suse.com> Date: Tue, 17 Feb 2026 15:23:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 04/16] xen/riscv: implement vcpu_csr_init() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <7c58dfbac99694811e4276858b48baa211331229.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7c58dfbac99694811e4276858b48baa211331229.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -6,10 +6,74 @@ > #include > #include > > +#include > +#include > +#include > #include > > struct csr_masks __ro_after_init csr_masks; > > +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ > + BIT(CAUSE_FETCH_ACCESS, U) | \ > + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ > + BIT(CAUSE_BREAKPOINT, U) | \ > + BIT(CAUSE_MISALIGNED_LOAD, U) | \ > + BIT(CAUSE_LOAD_ACCESS, U) | \ > + BIT(CAUSE_MISALIGNED_STORE, U) | \ > + BIT(CAUSE_STORE_ACCESS, U) | \ > + BIT(CAUSE_USER_ECALL, U) | \ > + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ > + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ > + BIT(CAUSE_STORE_PAGE_FAULT, U)) > + > +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) > + > +static void vcpu_csr_init(struct vcpu *v) > +{ > + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; > + > + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; > + > + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; > + > + /* > + * VS should access only the time counter directly. > + * Everything else should trap. > + */ > + v->arch.hcounteren = HCOUNTEREN_TM; > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) > + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) > + { > + register_t hstateen0 = 0; > + > + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) > + /* > + * If the hypervisor extension is implemented, the same three > + * bits are defined also in hypervisor CSR hstateen0 but concern > + * only the state potentially accessible to a virtual machine > + * executing in privilege modes VS and VU: > + * bit 60 CSRs siselect and sireg (really vsiselect and > + * vsireg) > + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really > + * vsiph, vsieh, and vstopi) > + * bit 58 all state of IMSIC guest interrupt files, including > + * CSR stopei (really vstopei) > + * If one of these bits is zero in hstateen0, and the same bit is > + * one in mstateen0, then an attempt to access the corresponding > + * state from VS or VU-mode raises a virtual instruction exception. > + */ > + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; > + > + /* Allow guest to access CSR_ENVCFG */ > + hstateen0 |= SMSTATEEN0_HSENVCFG; I continue to be puzzled by the use of = vs |=. If you use |=, best do so uniformly. Then inserting new code ahead of the one you have now is not a problem. I wonder anyway why you don't do (omitting commentary): register_t hstateen0 = SMSTATEEN0_HSENVCFG; if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) hstateen0 |= SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; As to CSR_ENVCFG - what's that referring to? I'm aware of menvcfg, henvcfg, and senvcfg. But I'm unaware of plain envcfg, and there's also no CSR_ENVCFG constant in riscv_encoding.h afaics. I assume it's senvcfg that you mean here. And then - is this CSR unconditionally available? The "Supervisor ISA" isn't called an extension, yet at the same time it's also part of the separate "privileged" specification, not the general one. > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -48,6 +48,12 @@ struct arch_vcpu { > } xen_saved_context; > > struct cpu_info *cpu_info; > + > + register_t hcounteren; > + register_t hedeleg; > + register_t henvcfg; > + register_t hideleg; > + register_t hstateen0; > }; One question about the ordering here: It looks to be alphabetically sorted right now, yet I wonder whether that's optimal. Some CSRs might typically be used together, in which case they may best live close together (for chances to be good that they end up in the same cache line). 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48371998777sm402436275e9.1.2026.02.17.06.23.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 17 Feb 2026 06:23:35 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3f644c50-0c0c-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771338216; x=1771943016; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=11JyZZS+qJmiFN3fNB+Iee1JkfEd9hcyAJUVgAJ0YHw=; b=RuHXJUPrXBRc/Gi7UBK91ySzqLmZ98Jy+7SZYHoJIWkBQjKha20NFHXHCTIqisSCbO JnRTc8TyHfDCz014x7PNnRyqqc3PmMeqcjptz4EnLjZpKCCfIrEpa+N3LqRWHP32vRd8 TtTsW5qln/Go82hiVsJ0oSLYFq+PqUp1zeW/oQADe7O5cFhBRxQK+ywHsIwP/KH5+BIs FNF10zIDfpWWioibEueiIffi11+adUj7X96W9foQmu+vIQj37LwXB7PBSDWTQjdyOiAW 4hgNMtgGMTxOSYACa6SPuO2iVvxjHPNSA9QgErwj5cop4JHKmThAlCy941nSJWrAQT+Y fGYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771338216; x=1771943016; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=11JyZZS+qJmiFN3fNB+Iee1JkfEd9hcyAJUVgAJ0YHw=; b=sVRYfQQhbrAf1o4uD1sFjF+fTC07m+xR7bjoJia3YlZeYgrFGbGL/kLQf2FvgIzDR0 EAmnpwB38O1LoFxc/J4C2cC2PaqdABrGUU3D5UiZqi4qGwXSqCab0xp0N/8DfwXoyVsS YuifM6A/fVv91bMFp5FA0hKK2vy5yCS/QZoICICaZ1FiV11lwYshAStIy3cQS35jEhnN yL0Hi2bFX6Zea9Jpnk+/HZUBbs4pzorTMZp0mEpjlI/rwkTKzV4tgqVWpR5m8QSSBxF2 NN4ZWcC9F+hLRkOXbcTvqRONx4E1Owz/60Ksz8Gqc+1cDjmP/KyBwlXacqz87qQkiiTn G1rQ== X-Forwarded-Encrypted: i=1; AJvYcCWDFBFaIgb1eJS/TyP7JSjPzwqd2D8CYjOWk8inR+DFO9FRKtqU7CwDEImyO6HndNsPLlOdYSa8Sw0=@lists.xenproject.org X-Gm-Message-State: AOJu0Yxda+aGbxr1YjLV+jqoV2mim62rTEB/gLHJ48a/i9rc2kRZHhsa 9dRrMylMlpFSr77qsqn9PeEyo9TnBUWJXemzxpnXiUJL3jSQTp+R/Kml X-Gm-Gg: AZuq6aIHkiFEuqxG6eb3HyKSr5jhJ/5KIf++CZFahlCgEMZnoFBqVHokAYZ2Q5L0MSw qtRPrtZjWaJNwlWeq1+98TL1DlGkSu/Wn5q5il5TtSt4/4MYjofk06o2DOv1lozTAkQAsM/yakx IZ/29XD8i6KHi/ZMZUp4cfgJtjXMJH/z6p6e8hHyd2J3k5PFYB0sv65HD0KdQd3t5Yw5V5vVGop +tvw1iA1jfE3E2AY9a1UKvHMWXdS0R+upi1Ado8rJnqTKU+pdTcP+XVl/ARpV9JBnWRSZDHEptt hMHlz1Hfn2O8sZY6rhuB/Mk3rohQG+vpAHodHzZlB2Gi1bHHdAIHCHr8yAQjNjDeNfzHXGdJ5RC mOtZ40XQ0QvTTVbUZUGy8ZyX0wjUxAhzJQoeq7+MVBk5uZbdLcRu+e2fHZKrnEU66KtO2zGrxQ+ +d7Brc/vjs9XqhDA2KkwQkTY1rU41huJyc4soqDF1FDybeu9lnJOjlVUeIBkQpjlX42D9p1/mUB D4= X-Received: by 2002:a05:600c:c165:b0:483:722c:a3d1 with SMTP id 5b1f17b1804b1-48378da52a1mr193686835e9.16.1771338216091; Tue, 17 Feb 2026 06:23:36 -0800 (PST) Message-ID: <974f0b55-3ead-4892-92c0-707be1303834@gmail.com> Date: Tue, 17 Feb 2026 15:23:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/16] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Jan Beulich Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <06c3b8f88803039a3d900c8cb2f1fd9d05f44e3e.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/17/26 12:37 PM, Jan Beulich wrote: > On 13.02.2026 17:28, Oleksii Kurochko wrote: >> Some hypervisor CSRs expose optional functionality and may not implement >> all architectural bits. Writing unsupported bits can either be ignored >> or raise an exception depending on the platform. >> >> Detect the set of writable bits for selected hypervisor CSRs at boot and >> store the resulting masks for later use. This allows safely programming >> these CSRs during vCPU context switching and avoids relying on hardcoded >> architectural assumptions. >> >> Note that csr_set() is used instead of csr_write() to write all ones to >> the mask, as the CSRRS instruction, according to the RISC-V specification, >> sets only those bits that are writable (note that the quote consider only >> non-read-only CSRs as writing to read-only CSRs according to the spec. >> will raise an exception): >> Any bit that is high in rs1 will cause the corresponding bit to be set >> in the CSR, if that CSR bit is writable. >> In contrast, the CSRRW instruction does not take CSR bit writability into >> account, which could lead to unintended side effects when writing all ones >> to a CSR. >> >> Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, >> hstateen0 registers as only them are going to be used in the follow up >> patch. >> >> If the Smstateen extension is not implemented, hstateen0 cannot be read >> because the register is considered non-existent. Instructions that attempt >> to access a CSR that is not implemented or not visible in the current mode >> are reserved and will raise an illegal-instruction exception. >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in V4: >> - Move csr_masks defintion to domain.c. Make it static as at the moment >> it is going to be used only in domain.c. > Except that ... > >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -2,9 +2,14 @@ >> >> #include >> #include >> +#include >> #include >> #include >> >> +#include >> + >> +struct csr_masks __ro_after_init csr_masks; > ... it's not static here and even has ... > >> --- a/xen/arch/riscv/include/asm/setup.h >> +++ b/xen/arch/riscv/include/asm/setup.h >> @@ -5,6 +5,15 @@ >> >> #include >> >> +struct csr_masks { >> + register_t hedeleg; >> + register_t henvcfg; >> + register_t hideleg; >> + register_t hstateen0; >> +}; >> + >> +extern struct csr_masks csr_masks; > ... a declaration here. If you want to keep it non-static, it (and the struct > decl) likely wants moving elsewhere. Whereas if you truly want it to be static, > the struct decl would want moving to domain.c as well. Wrong patch version. I made it static so csr_masks declaration and struct csr_masks were in domain.c. Also, init_csr_masks() was moved to domain.c too. I will update the patch version next time. > >> --- a/xen/arch/riscv/setup.c >> +++ b/xen/arch/riscv/setup.c >> @@ -70,6 +70,25 @@ static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) >> return fdt; >> } >> >> +void __init init_csr_masks(void) >> +{ >> + register_t old; > As indicated before, this would better be ... > >> +#define INIT_CSR_MASK(csr, field) do { \ >> + old = csr_read(CSR_##csr); \ >> + csr_set(CSR_##csr, ULONG_MAX); \ >> + csr_masks.field = csr_read(CSR_##csr); \ >> + csr_write(CSR_##csr, old); \ >> +} while (0) > ... local to the scope the macro introduces. IOW with both this and the > earlier remark, let's try to strive to have scope and exposure of variables > as narrow as possible (unless of course there are clear reasons not to). > > And btw, wouldn't you again better use csr_swap() here? It makes sense, I'll use csr_swap() instead of pair csr_read() and csr_write(). Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 14:25:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 14:25:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235089.1538132 (Exim 4.92) (envelope-from ) id 1vsM0a-00040l-5l; Tue, 17 Feb 2026 14:25:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235089.1538132; Tue, 17 Feb 2026 14:25:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsM0a-00040e-29; Tue, 17 Feb 2026 14:25:00 +0000 Received: by outflank-mailman (input) for mailman id 1235089; Tue, 17 Feb 2026 14:24:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsM0Y-00040W-Sy for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 14:24:58 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6f6aacf9-0c0c-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 15:24:57 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-43591b55727so4840335f8f.3 for ; Tue, 17 Feb 2026 06:24:57 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Thanks a lot for doing that! ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 14:43:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 14:43:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235101.1538141 (Exim 4.92) (envelope-from ) id 1vsMIL-00071E-Jr; Tue, 17 Feb 2026 14:43:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235101.1538141; Tue, 17 Feb 2026 14:43:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMIL-000717-GZ; Tue, 17 Feb 2026 14:43:21 +0000 Received: by outflank-mailman (input) for mailman id 1235101; Tue, 17 Feb 2026 14:43:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMIK-000711-8R for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 14:43:20 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id fefc4c39-0c0e-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 15:43:17 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4806bf39419so45417995e9.1 for ; Tue, 17 Feb 2026 06:43:17 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 06:43:16 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 15:43:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 05/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <63661b60f5e1678c93f7ea34e5cf479ca28bc80d.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <63661b60f5e1678c93f7ea34e5cf479ca28bc80d.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > Based on Linux kernel v6.16.0. > Note that smp_wmb() is used instead of smp_mb__before_atomic() as what > we want to guarantee that if a bit in irqs_pending_mask is obversable > that the correspondent bit in irqs_pending is observable too. > > Add lockless tracking of pending vCPU interrupts using atomic bitops. > Two bitmaps are introduced: > - irqs_pending — interrupts currently pending for the vCPU > - irqs_pending_mask — bits that have changed in irqs_pending > > The design follows a multi-producer, single-consumer model, where the > consumer is the vCPU itself. Producers may set bits in > irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is > performed only by the consumer via xchg(). The consumer must not write > to irqs_pending and must not act on bits that are not set in the mask. > Otherwise, extra synchronization should be provided. > > On RISC-V interrupts are not injected via guest registers, so pending > interrupts must be recorded in irqs_pending (using the new > vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating > HVIP before returning control to the guest. The consumer side is > implemented in a follow-up patch. > > A barrier between updating irqs_pending and setting the corresponding > mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees > that if the consumer observes a mask bit set, the corresponding pending > bit is also visible. This prevents missed interrupts during the flush. > > It is possible that a guest could have pending bit in the hardware > register without being marked pending in irq_pending bitmap as: > According to the RISC-V ISA specification: > Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and > interrupt-enable bits for VS-level software interrupts. VSSIP in hip > is an alias (writable) of the same bit in hvip. > Additionally: > When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only > zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and > hie.VSSIE. > This means the guest may modify vsip.SSIP, which implicitly updates > hip.VSSIP and the bit being written with 1 would also trigger an interrupt > as according to the RISC-V spec: > These conditions for an interrupt trap to occur must be evaluated in a > bounded amount of time from when an interrupt becomes, or ceases to be, > pending in sip, and must also be evaluated immediately following the > execution of an SRET instruction or an explicit write to a CSR on which > these interrupt trap conditions expressly depend (including sip, sie and > sstatus). > What means that IRQ_VS_SOFT must be synchronized separately, what is done > in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be > synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as > PMU isn't supported now. > > For the remaining VS-level interrupt types (IRQ_VS_TIMER and > IRQ_VS_EXT), the specification states they cannot be modified by the guest > and are read-only because of: "cannot be modified by the guest" is still meaning about anything. Aren't you intending to merely talk about their pending bits? Then all of ... > Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable > bits for VS-level external interrupts. VSEIP is read-only in hip, and is > the logical-OR of these interrupt sources: > • bit VSEIP of hvip; > • the bit of hgeip selected by hstatus.VGEIN; and > • any other platform-specific external interrupt signal directed to > VS-level. > Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable > bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the > logical-OR of hvip.VSTIP and any other platform-specific timer interrupt > signal directed to VS-level. > and > When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. > Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. > > When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. > Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. > and also, ... this is largely irrelevant, while ... > Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable > bits for supervisor-level external interrupts. If implemented, SEIP is > read-only in sip, and is set and cleared by the execution environment, > typically through a platform-specific interrupt controller. > > Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable > bits for supervisor-level timer interrupts. If implemented, STIP is > read-only in sip, and is set and cleared by the execution environment ... this is important. > Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() > and vcpu_unset_interrupt(), and flush them during the call of > vcpu_flush_interrupts() (which is introduced in follow up patch). > > vcpu_sync_interrupts(), which is called just before entering the VM, > slightly bends the rule that the irqs_pending bit must be written > first, followed by updating the corresponding bit in irqs_pending_mask. > However, it still respects the core guarantee that the producer never > clears the mask and only writes to irqs_pending if it is the one that > flipped the corresponding mask bit from 0 to 1. > Moreover, since the consumer won't run concurrently because > vcpu_sync_interrupts() and the consumer path are going to be invoked > equentially immediately before VM entry, it is safe to slightly relax Nit: There was an 's' lost at the start of the line. > @@ -127,3 +128,73 @@ void arch_vcpu_destroy(struct vcpu *v) > { > vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); > } > + > +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) > +{ > + /* We only allow VS-mode software, timer, and external interrupts */ > + if ( irq != IRQ_VS_SOFT && > + irq != IRQ_VS_TIMER && > + irq != IRQ_VS_EXT ) > + return -EINVAL; > + > + set_bit(irq, v->arch.irqs_pending); > + /* > + * The counterpart of this barrier is the one encoded implicitly in xchg() > + * which is used in consumer part (vcpu_flush_interrupts()). > + */ > + smp_wmb(); > + set_bit(irq, v->arch.irqs_pending_mask); Wasn't this meant to go away with ... > + if ( !test_and_set_bit(irq, v->arch.irqs_pending_mask) ) ... the introduction of this? > + vcpu_kick(v); Nit: Bad indentation. As to the test_and_set_bit(): In isolation here this looks correct, but when taking ... > + return 0; > +} > + > +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) > +{ > + /* We only allow VS-mode software, timer, external interrupts */ > + if ( irq != IRQ_VS_SOFT && > + irq != IRQ_VS_TIMER && > + irq != IRQ_VS_EXT ) > + return -EINVAL; > + > + clear_bit(irq, v->arch.irqs_pending); > + /* > + * The counterpart of this barrier is the one encoded implicitly in xchg() > + * which is used in consumer part (vcpu_flush_interrupts()). > + */ > + smp_wmb(); > + set_bit(irq, v->arch.irqs_pending_mask); > + > + return 0; > +} ... this into account - what about vcpu_unset_interrupt() followed by vcpu_set_interrupt()? Shouldn't that also result in a kick? I.e. shouldn't the condition above be whether either of the two bits transitioned from 0 to 1? > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -54,6 +54,25 @@ struct arch_vcpu { > register_t henvcfg; > register_t hideleg; > register_t hstateen0; > + register_t hvip; > + > + register_t vsie; > + > + /* > + * VCPU interrupts > + * > + * We have a lockless approach for tracking pending VCPU interrupts > + * implemented using atomic bitops. The irqs_pending bitmap represent > + * pending interrupts whereas irqs_pending_mask represent bits changed > + * in irqs_pending. Our approach is modeled around multiple producer > + * and single consumer problem where the consumer is the VCPU itself. > + * > + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts > + * on RV32 host. > + */ > +#define RISCV_VCPU_NR_IRQS MAX(BITS_PER_LONG, 64) In the revlog you mention also taking care of "the case if AIA isn't used". I can't spot anything like this here. > --- a/xen/arch/riscv/traps.c > +++ b/xen/arch/riscv/traps.c > @@ -169,6 +169,13 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) > die(); > } > > +static void check_for_pcpu_work(void) > +{ > + struct vcpu *c = current; As indicated, please try to get used to using conventional variable names. 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Tue, 17 Feb 2026 06:50:51 -0800 (PST) Message-ID: <692bfb04-ed05-4c8b-a0d8-1a5ed383c877@suse.com> Date: Tue, 17 Feb 2026 15:50:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/16] xen/riscv: introduce tracking of pending vCPU interrupts, part 2 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4e10c95d883c0d447b9e33a6d6a92e911aed6a23.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4e10c95d883c0d447b9e33a6d6a92e911aed6a23.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -198,3 +198,34 @@ void vcpu_sync_interrupts(struct vcpu *v) > # error "Update v->arch.vsieh" > #endif > } > + > +static void vcpu_update_hvip(const struct vcpu *v) > +{ > + csr_write(CSR_HVIP, v->arch.hvip); > +} > + > +void vcpu_flush_interrupts(struct vcpu *v) > +{ > + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) > + { > + register_t *hvip = &v->arch.hvip; > + > + unsigned long mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); > + unsigned long val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; Nit: As mentioned before, blank lines should not normally occur between declarations (unless there are overly many of them). With the blank line removed, personally I think things would end up slightly neater if hvip was declared last. > + *hvip &= ~mask; > + *hvip |= val; > + > + vcpu_update_hvip(v); > + } > + > +/* > + * Flush AIA high interrupts. > + * > + * It is necessary to do only for CONFIG_RISCV_32 which isn't > + * supported now. > + */ > +#ifdef CONFIG_RISCV_32 May I suggest for this to move ahead of the comment, and for the comment to be properly indented by one level? With the adjustments: Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 14:56:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 14:56:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235117.1538161 (Exim 4.92) (envelope-from ) id 1vsMVQ-0000tS-S7; Tue, 17 Feb 2026 14:56:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235117.1538161; Tue, 17 Feb 2026 14:56:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMVQ-0000tL-PG; Tue, 17 Feb 2026 14:56:52 +0000 Received: by outflank-mailman (input) for mailman id 1235117; Tue, 17 Feb 2026 14:56:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMVP-0000sy-08 for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 14:56:51 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id dcc11085-0c10-11f1-9ccf-f158ae23cfc8; Tue, 17 Feb 2026 15:56:39 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so48279455e9.1 for ; Tue, 17 Feb 2026 06:56:39 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Tue, 17 Feb 2026 06:56:38 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 15:56:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 04/16] xen/riscv: implement vcpu_csr_init() To: Jan Beulich Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <7c58dfbac99694811e4276858b48baa211331229.1770999383.git.oleksii.kurochko@gmail.com> <07e6d8a4-c825-4d65-ab27-60ced2f25e79@suse.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: <07e6d8a4-c825-4d65-ab27-60ced2f25e79@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/17/26 3:23 PM, Jan Beulich wrote: > On 13.02.2026 17:28, Oleksii Kurochko wrote: >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -6,10 +6,74 @@ >> #include >> #include >> >> +#include >> +#include >> +#include >> #include >> >> struct csr_masks __ro_after_init csr_masks; >> >> +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ >> + BIT(CAUSE_FETCH_ACCESS, U) | \ >> + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ >> + BIT(CAUSE_BREAKPOINT, U) | \ >> + BIT(CAUSE_MISALIGNED_LOAD, U) | \ >> + BIT(CAUSE_LOAD_ACCESS, U) | \ >> + BIT(CAUSE_MISALIGNED_STORE, U) | \ >> + BIT(CAUSE_STORE_ACCESS, U) | \ >> + BIT(CAUSE_USER_ECALL, U) | \ >> + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ >> + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ >> + BIT(CAUSE_STORE_PAGE_FAULT, U)) >> + >> +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) >> + >> +static void vcpu_csr_init(struct vcpu *v) >> +{ >> + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; >> + >> + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; >> + >> + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; >> + >> + /* >> + * VS should access only the time counter directly. >> + * Everything else should trap. >> + */ >> + v->arch.hcounteren = HCOUNTEREN_TM; >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) >> + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) >> + { >> + register_t hstateen0 = 0; >> + >> + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) >> + /* >> + * If the hypervisor extension is implemented, the same three >> + * bits are defined also in hypervisor CSR hstateen0 but concern >> + * only the state potentially accessible to a virtual machine >> + * executing in privilege modes VS and VU: >> + * bit 60 CSRs siselect and sireg (really vsiselect and >> + * vsireg) >> + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really >> + * vsiph, vsieh, and vstopi) >> + * bit 58 all state of IMSIC guest interrupt files, including >> + * CSR stopei (really vstopei) >> + * If one of these bits is zero in hstateen0, and the same bit is >> + * one in mstateen0, then an attempt to access the corresponding >> + * state from VS or VU-mode raises a virtual instruction exception. >> + */ >> + hstateen0 = SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; >> + >> + /* Allow guest to access CSR_ENVCFG */ >> + hstateen0 |= SMSTATEEN0_HSENVCFG; > I continue to be puzzled by the use of = vs |=. If you use |=, best do so > uniformly. Then inserting new code ahead of the one you have now is not a > problem. I wonder anyway why you don't do (omitting commentary): > > register_t hstateen0 = SMSTATEEN0_HSENVCFG; > > if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) > hstateen0 |= SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; > > As to CSR_ENVCFG - what's that referring to? I'm aware of menvcfg, henvcfg, > and senvcfg. But I'm unaware of plain envcfg, and there's also no CSR_ENVCFG > constant in riscv_encoding.h afaics. I assume it's senvcfg that you mean > here. I referred to CSR_SENVCFG, I just automatically applied the way how it is defined in Linux kernel and Linux kernel abstracts it as CSR_ENVCFG as it could be booted in M-mode or S-mode. There is no such definition in Xen as we don't use it. > And then - is this CSR unconditionally available? The "Supervisor ISA" > isn't called an extension, yet at the same time it's also part of the > separate "privileged" specification, not the general one. I don't know, the available specs aren't precise here. Considering that OpenSBI(menvcfg) or Linux(menvcfg or senvcfg) uses them unconditionally then an assumption that CSR_*ENVCFG unconditionally exist could be done. Anyway, a ENVCFG bit in hstateen0 depends only on RISCV_ISA_EXT_smstateen (or Ssstateen extension) then it is okay to set that bit and even CSR_*ENVCFG isn't implemented a trap to Xen will happen and it should be handled somehow separately as I mentioned above Linux kernel uses them unconditionally. > >> --- a/xen/arch/riscv/include/asm/domain.h >> +++ b/xen/arch/riscv/include/asm/domain.h >> @@ -48,6 +48,12 @@ struct arch_vcpu { >> } xen_saved_context; >> >> struct cpu_info *cpu_info; >> + >> + register_t hcounteren; >> + register_t hedeleg; >> + register_t henvcfg; >> + register_t hideleg; >> + register_t hstateen0; >> }; > One question about the ordering here: It looks to be alphabetically sorted > right now, yet I wonder whether that's optimal. Some CSRs might typically > be used together, in which case they may best live close together (for > chances to be good that they end up in the same cache line). Make sense, I will group then hedeleg and hideleg. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:00:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:00:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235127.1538172 (Exim 4.92) (envelope-from ) id 1vsMYS-0001iD-Dh; Tue, 17 Feb 2026 15:00:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235127.1538172; Tue, 17 Feb 2026 15:00:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMYS-0001i6-Ax; Tue, 17 Feb 2026 15:00:00 +0000 Received: by outflank-mailman (input) for mailman id 1235127; Tue, 17 Feb 2026 14:59:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMYR-0001i0-AK for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 14:59:59 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 53277553-0c11-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 15:59:57 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4837907f535so30213365e9.3 for ; Tue, 17 Feb 2026 06:59:57 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 17 Feb 2026 06:59:57 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 15:59:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/16] xen/riscv: introduce basic vtimer infrastructure for guests To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <7426e2d974bfe67786c67709d487c7f64c22ae58.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7426e2d974bfe67786c67709d487c7f64c22ae58.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > Lay the groundwork for guest timer support by introducing a per-vCPU > virtual timer backed by Xen’s common timer infrastructure. > > The virtual timer is programmed in response to the guest SBI > sbi_set_timer() call and injects a virtual supervisor timer interrupt > into the vCPU when it expires. > > While a dedicated struct vtimer is not strictly required at present, > it is expected to become necessary once SSTC support is introduced. > In particular, it will need to carry additional state such as whether > SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) > to be saved and restored across context switches, and time delta state > (e.g. HTIMEDELTA) required for use cases such as migration. Introducing > struct vtimer now avoids a later refactoring. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich with a question and a remark. > @@ -126,6 +130,8 @@ int arch_vcpu_create(struct vcpu *v) > > void arch_vcpu_destroy(struct vcpu *v) > { > + vcpu_timer_destroy(v); It feels pretty late to do this, yet I notice vcpu_teardown() doesn't invoke any per-arch function (yet). There's arch_domain_teardown(), though, which technically could do this for all vCPU-s in a domain. > --- /dev/null > +++ b/xen/arch/riscv/include/asm/vtimer.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * (c) 2023-2024 Vates > + */ Is this correct? Is this needed here? Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:20:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:20:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235138.1538182 (Exim 4.92) (envelope-from ) id 1vsMsg-0005p8-11; Tue, 17 Feb 2026 15:20:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235138.1538182; Tue, 17 Feb 2026 15:20:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMsf-0005p1-U9; Tue, 17 Feb 2026 15:20:53 +0000 Received: by outflank-mailman (input) for mailman id 1235138; Tue, 17 Feb 2026 15:20:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsMsf-0005ov-6T for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 15:20:53 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3ebe7f0c-0c14-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 16:20:51 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-48336a6e932so26166585e9.3 for ; Tue, 17 Feb 2026 07:20:52 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Introducing >> struct vtimer now avoids a later refactoring. >> >> Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > with a question and a remark. > >> @@ -126,6 +130,8 @@ int arch_vcpu_create(struct vcpu *v) >> >> void arch_vcpu_destroy(struct vcpu *v) >> { >> + vcpu_timer_destroy(v); > It feels pretty late to do this, yet I notice vcpu_teardown() doesn't invoke > any per-arch function (yet). There's arch_domain_teardown(), though, which > technically could do this for all vCPU-s in a domain. Why it isn't enough to be implicitly called by domain_destroy()? > >> --- /dev/null >> +++ b/xen/arch/riscv/include/asm/vtimer.h >> @@ -0,0 +1,20 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +/* >> + * (c) 2023-2024 Vates >> + */ > Is this correct? Is this needed here? I'll just drop that to be aligned with other headers. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:28:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:28:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235147.1538192 (Exim 4.92) (envelope-from ) id 1vsN0F-0006aS-Np; Tue, 17 Feb 2026 15:28:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235147.1538192; Tue, 17 Feb 2026 15:28:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN0F-0006aL-L8; Tue, 17 Feb 2026 15:28:43 +0000 Received: by outflank-mailman (input) for mailman id 1235147; Tue, 17 Feb 2026 15:28:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN0E-0006aF-83 for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Tue, 17 Feb 2026 16:28:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: tighten translate_get_page() To: Jan Beulich , "xen-devel@lists.xenproject.org" CC: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Oleksii Kurochko References: <1d898900-1072-4ea6-ac4c-1262905cab29@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <1d898900-1072-4ea6-ac4c-1262905cab29@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C6186:EE_|SA3PR12MB9227:EE_ X-MS-Office365-Filtering-Correlation-Id: ebf29c3d-5cad-4540-8170-08de6e39326e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MOuVGzpZeyMRQeA1aN16vTX29bVYCP6OXILmc8mc47pwGdlp1vmxlEhk1AOjaHQkZiwYGT8d0Eu0+l1K0G9aimE3+lXkhSGUwrx8awpE5v+LnHrKSpmJ9jMwzaV7a0+0Hen3zm5W+ckLLDevJNYH42GwO/gTLGig26c0cQayZIfZOXBvNessmX+J1Cs+sS4LZx0WMrk+truv0O73rO0BIgLMxcXkhPRIQ9T0R9gkCLXyYdjQCbvWm8+Gm3rzMOjP+q+XJwYWfavCY0/EFws3XMPZW9S5HSZIoLDW0i8xgV1OjH4V+yO9Aw07ZsDYlsoW3tWPavwXhu3GADPCDk5LGfuMq0dEfo52uikCdaG1hL9umba/afdq8TU5H8OJl1TDs2dBE1NvOodqlqQGLDUh6zhloWMfdwfoOr8x3he+k8qZHlDdATyGJQMUzzBxwCph X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Feb 2026 15:28:27.0152 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ebf29c3d-5cad-4540-8170-08de6e39326e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6186.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9227 On 16/02/2026 16:20, Jan Beulich wrote: > Permitting writes when the P2M type says "read-only" can't be correct. > > Fixes: 1661158723a ("xen/arm: Extend copy_to_guest to support copying from/to guest physical address") > Signed-off-by: Jan Beulich Reviewed-by: Michal Orzel > --- > What exactly p2m_ram_ro means on Arm is unclear: The comment next to its > definition says one thing, its use in get_page_from_gfn() says another. > (I remember raising this point before, i.e. it feels a little odd that the > ambiguity still exists.) The patch here assumes the comment is what is > wrong. > > --- a/xen/arch/arm/guestcopy.c > +++ b/xen/arch/arm/guestcopy.c > @@ -44,7 +44,7 @@ static struct page_info *translate_get_p > if ( !page ) > return NULL; > > - if ( !p2m_is_ram(p2mt) ) > + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) > { > put_page(page); > return NULL; The ambiguity you mention is indeed problematic. This mixes page type with p2m type. The comment "The p2m_type is based on the type of the page" admits this conflation for DOMID_XEN. AFAICT, p2m_ram_ro is not used on Arm for normal domains. The only use is in get_page_from_gfn() for DOMID_XEN. Maybe we could change get_page_from_gfn() to always return p2m_ram_rw since DOMID_XEN has direct 1:1 access anyway? ~Michal From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:28:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:28:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235149.1538201 (Exim 4.92) (envelope-from ) id 1vsN0Q-0006rO-VZ; Tue, 17 Feb 2026 15:28:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235149.1538201; Tue, 17 Feb 2026 15:28:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN0Q-0006rF-SF; Tue, 17 Feb 2026 15:28:54 +0000 Received: by outflank-mailman (input) for mailman id 1235149; Tue, 17 Feb 2026 15:28:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN0P-0006qe-Lm for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 15:28:53 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 58ff8469-0c15-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 16:28:45 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso35250665e9.1 for ; Tue, 17 Feb 2026 07:28:45 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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I can't >>> spot any support for it in Linux'es arch/riscv/Makefile (whereas >>> arch/arm/Makefile has such). >> Good point. >> >> It is something that should be renamed as not Arm64 (Arm32 really has such >> target), not RISC-V doesn't really work with zImage. They are using Image plus >> Image.gz as compressed image. >> >> Maybe it would be better to rename kernel_zimage_probe() to something more >> generic kernel_image_probe(). > Well, it's two things. In the description you explicitly say zImage. That's > simply misleading. Agree, it should be just Image, I'll update that part of commit description in the next version. > Renaming the function (if indeed it copes with more than > just zImage) would likely be a good thing too, but needs sorting with its > maintainers. I will suggest that then in a separate patch. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:31:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:31:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235165.1538212 (Exim 4.92) (envelope-from ) id 1vsN36-0000CC-GG; Tue, 17 Feb 2026 15:31:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235165.1538212; Tue, 17 Feb 2026 15:31:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN36-0000C5-Ct; Tue, 17 Feb 2026 15:31:40 +0000 Received: by outflank-mailman (input) for mailman id 1235165; Tue, 17 Feb 2026 15:31:39 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsN35-0000Bz-2W for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 15:31:39 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bf13e409-0c15-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 16:31:37 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id D7CAB440D2; Tue, 17 Feb 2026 15:31:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8316CC4CEF7; Tue, 17 Feb 2026 15:31:34 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bf13e409-0c15-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771342295; bh=puQ35sN/YP9u5FxyFRkjewp/UfRrxV3//5EaxXedHyg=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=smLe5CfoaNmYtMa6Y9oXNUytHPZBHk+R9q4sXcVExwHoQBFyyp+a8CUiYwQEEHEyB t2RVHuf4r6bCw4yWm8YKkY+4qxlXV4mPaPEGQSLxrRHt17ESVYi+ULmfIajYedIhnK 9lTLbMi2InG33oHj3s7ntktZVPKV5gSoIXSID/sWRkq4MdkTWndFDP6FprkoQEAfuK ca1Xz0fB1npBWAXE8Cpn2CouqTPdEr3gdw7+reV1VGIHuvtcAK6NjFitMoOhZ0cTgX C4rabPJR4A6lh4Xo4zWQgn2PgcCyvJlxvQA2ZabY15zW03EovDPl4tX/2Jla6ZBpjO BQVJRWFsz+ing== Date: Tue, 17 Feb 2026 07:31:32 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: dmukhin@ford.com cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org Subject: Re: [PATCH v5] xen/domain: introduce DOMID_ANY In-Reply-To: <20260205235126.3764953-1-dmukhin@ford.com> Message-ID: References: <20260205235126.3764953-1-dmukhin@ford.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 5 Feb 2026, dmukhin@ford.com wrote: > From: Denis Mukhin > > Add a new symbol DOMID_ANY to improve the readability of the code. > > Update all relevant domid_alloc() call sites and harden the domid_alloc() > input value check. > > Also, fix problem with passing invalid domain IDs in > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > uses 0xffff as domain ID. > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > Signed-off-by: Denis Mukhin Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Tue Feb 17 15:36:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 15:36:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235171.1538221 (Exim 4.92) (envelope-from ) id 1vsN7W-0000l1-WC; Tue, 17 Feb 2026 15:36:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235171.1538221; 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Tue, 17 Feb 2026 07:36:05 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 16:36:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/16] xen/riscv: introduce basic vtimer infrastructure for guests To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <7426e2d974bfe67786c67709d487c7f64c22ae58.1770999383.git.oleksii.kurochko@gmail.com> <211c492f-23e1-44ae-8601-ecbce8650e0d@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <211c492f-23e1-44ae-8601-ecbce8650e0d@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 17.02.2026 16:20, Oleksii Kurochko wrote: > > On 2/17/26 3:59 PM, Jan Beulich wrote: >> On 13.02.2026 17:28, Oleksii Kurochko wrote: >>> Lay the groundwork for guest timer support by introducing a per-vCPU >>> virtual timer backed by Xen’s common timer infrastructure. >>> >>> The virtual timer is programmed in response to the guest SBI >>> sbi_set_timer() call and injects a virtual supervisor timer interrupt >>> into the vCPU when it expires. >>> >>> While a dedicated struct vtimer is not strictly required at present, >>> it is expected to become necessary once SSTC support is introduced. >>> In particular, it will need to carry additional state such as whether >>> SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) >>> to be saved and restored across context switches, and time delta state >>> (e.g. HTIMEDELTA) required for use cases such as migration. Introducing >>> struct vtimer now avoids a later refactoring. >>> >>> Signed-off-by: Oleksii Kurochko >> Acked-by: Jan Beulich >> with a question and a remark. >> >>> @@ -126,6 +130,8 @@ int arch_vcpu_create(struct vcpu *v) >>> >>> void arch_vcpu_destroy(struct vcpu *v) >>> { >>> + vcpu_timer_destroy(v); >> It feels pretty late to do this, yet I notice vcpu_teardown() doesn't invoke >> any per-arch function (yet). There's arch_domain_teardown(), though, which >> technically could do this for all vCPU-s in a domain. > > Why it isn't enough to be implicitly called by domain_destroy()? It's enough; what I wonder is why it's done so late. Technically anything that can be torn down in domain_kill() would better be torn down there already. Just to leave as little baggage as possible to the rest of the running system. For this particular one: If a domain was killed when some of its vCPU-s still had timers pending, why would those need keeping on the respective lists, and why would their handlers still need running once those timers expire? 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Tue, 17 Feb 2026 07:42:16 -0800 (PST) Message-ID: Date: Tue, 17 Feb 2026 16:42:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 12/16] xen/riscv: introduce sbi_set_timer() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <6d811ceefa3bfc4e6bd5d11b0a4d4eef886bc693.1770999383.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6d811ceefa3bfc4e6bd5d11b0a4d4eef886bc693.1770999383.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.02.2026 17:28, Oleksii Kurochko wrote: > Introduce a function pointer for sbi_set_timer(), since different OpenSBI > versions may implement the TIME extension with different extension IDs > and/or function IDs. > > If the TIME extension is not available, fall back to the legacy timer > mechanism. This is useful when Xen runs as a guest under another Xen, > because the TIME extension is not currently virtualised and therefore > will not appear as available. > Despite of the fact that sbi_set_timer_v01 is introduced and used as > fall back, SBI v0.1 still isn't fully supported (with the current SBI > calls usage, sbi_rfence_v01 should be introduced too), so panic() > in sbi_init() isn't removed. > > The sbi_set_timer() pointer will be used by reprogram_timer() to program > Xen’s physical timer as without SSTC extension there is no any other > option except SBI call to do that as only M-timer is available for us. > > Use dprintk() for all the cases to print that a speicifc SBI extension > is available as it isn't really necessary in case of release builds. > > Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > --- > Changes in v4: > - Add "stime_value is in absolute time" to the comment above declaration > of sbi_set_timer() function pointer. Yet it still ... > @@ -134,6 +138,23 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, > int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, > size_t size, unsigned long vmid); > > +/* > + * Programs the clock for next event after stime_value time. stime_value is in > + * absolute time. This function must clear the pending timer interrupt bit as > + * well. ... says "after" when, as per my understanding, it's "at or after". At which point the final "time" in the sentence becomes bogus (says me as a non- native speaker). Which in turn is what my v3 comment was triggered by, as "after stime_value time" to me suggests something relative ("this amount of time needs to pass"), when that's not what is meant, as the added sentence now tries to clarify. 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Tue, 17 Feb 2026 07:54:37 -0800 (PST) Message-ID: <9163d0b9-f77e-4c13-b986-2d890bdf8ccd@suse.com> Date: Tue, 17 Feb 2026 16:54:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: tighten translate_get_page() To: "Orzel, Michal" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Oleksii Kurochko , "xen-devel@lists.xenproject.org" References: <1d898900-1072-4ea6-ac4c-1262905cab29@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 16:28, Orzel, Michal wrote: > > > On 16/02/2026 16:20, Jan Beulich wrote: >> Permitting writes when the P2M type says "read-only" can't be correct. >> >> Fixes: 1661158723a ("xen/arm: Extend copy_to_guest to support copying from/to guest physical address") >> Signed-off-by: Jan Beulich > Reviewed-by: Michal Orzel Thanks. >> --- >> What exactly p2m_ram_ro means on Arm is unclear: The comment next to its >> definition says one thing, its use in get_page_from_gfn() says another. >> (I remember raising this point before, i.e. it feels a little odd that the >> ambiguity still exists.) The patch here assumes the comment is what is >> wrong. >> >> --- a/xen/arch/arm/guestcopy.c >> +++ b/xen/arch/arm/guestcopy.c >> @@ -44,7 +44,7 @@ static struct page_info *translate_get_p >> if ( !page ) >> return NULL; >> >> - if ( !p2m_is_ram(p2mt) ) >> + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) >> { >> put_page(page); >> return NULL; > > The ambiguity you mention is indeed problematic. This mixes page type with p2m > type. The comment "The p2m_type is based on the type of the page" admits this > conflation for DOMID_XEN. > > AFAICT, p2m_ram_ro is not used on Arm for normal domains. The only use is in > get_page_from_gfn() for DOMID_XEN. Maybe we could change get_page_from_gfn() to > always return p2m_ram_rw since DOMID_XEN has direct 1:1 access anyway? But that's not correct for cases where share_xen_page_with_privileged_guest() is passed SHARE_ro. XENMAPSPACE_gmfn_foreign requests have to result in r/o mappings in that case. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 17 16:59:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 16:59:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235213.1538255 (Exim 4.92) (envelope-from ) id 1vsOPR-00040f-52; Tue, 17 Feb 2026 16:58:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235213.1538255; Tue, 17 Feb 2026 16:58:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsOPR-00040Y-1W; Tue, 17 Feb 2026 16:58:49 +0000 Received: by outflank-mailman (input) for mailman id 1235213; Tue, 17 Feb 2026 16:58:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsOPP-00040S-9K for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 16:58:47 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ebca3b22-0c21-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 17:58:45 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4806cc07ce7so41771085e9.1 for ; Tue, 17 Feb 2026 08:58:45 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Producers may set bits in >> irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is >> performed only by the consumer via xchg(). The consumer must not write >> to irqs_pending and must not act on bits that are not set in the mask. >> Otherwise, extra synchronization should be provided. >> >> On RISC-V interrupts are not injected via guest registers, so pending >> interrupts must be recorded in irqs_pending (using the new >> vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating >> HVIP before returning control to the guest. The consumer side is >> implemented in a follow-up patch. >> >> A barrier between updating irqs_pending and setting the corresponding >> mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees >> that if the consumer observes a mask bit set, the corresponding pending >> bit is also visible. This prevents missed interrupts during the flush. >> >> It is possible that a guest could have pending bit in the hardware >> register without being marked pending in irq_pending bitmap as: >> According to the RISC-V ISA specification: >> Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and >> interrupt-enable bits for VS-level software interrupts. VSSIP in hip >> is an alias (writable) of the same bit in hvip. >> Additionally: >> When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only >> zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and >> hie.VSSIE. >> This means the guest may modify vsip.SSIP, which implicitly updates >> hip.VSSIP and the bit being written with 1 would also trigger an interrupt >> as according to the RISC-V spec: >> These conditions for an interrupt trap to occur must be evaluated in a >> bounded amount of time from when an interrupt becomes, or ceases to be, >> pending in sip, and must also be evaluated immediately following the >> execution of an SRET instruction or an explicit write to a CSR on which >> these interrupt trap conditions expressly depend (including sip, sie and >> sstatus). >> What means that IRQ_VS_SOFT must be synchronized separately, what is done >> in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be >> synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as >> PMU isn't supported now. >> >> For the remaining VS-level interrupt types (IRQ_VS_TIMER and >> IRQ_VS_EXT), the specification states they cannot be modified by the guest >> and are read-only because of: > "cannot be modified by the guest" is still meaning about anything. Aren't you > intending to merely talk about their pending bits? Then all of ... I will use the "the pending bits are read-only" instead of "cannot be modified by guest" and keep only information about SEIP and STIP bits. > >> Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable >> bits for VS-level external interrupts. VSEIP is read-only in hip, and is >> the logical-OR of these interrupt sources: >> • bit VSEIP of hvip; >> • the bit of hgeip selected by hstatus.VGEIN; and >> • any other platform-specific external interrupt signal directed to >> VS-level. >> Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable >> bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the >> logical-OR of hvip.VSTIP and any other platform-specific timer interrupt >> signal directed to VS-level. >> and >> When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. >> Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. >> >> When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. >> Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. >> and also, > ... this is largely irrelevant, while ... > >> Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable >> bits for supervisor-level external interrupts. If implemented, SEIP is >> read-only in sip, and is set and cleared by the execution environment, >> typically through a platform-specific interrupt controller. >> >> Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable >> bits for supervisor-level timer interrupts. If implemented, STIP is >> read-only in sip, and is set and cleared by the execution environment > ... this is important. > >> Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() >> and vcpu_unset_interrupt(), and flush them during the call of >> vcpu_flush_interrupts() (which is introduced in follow up patch). >> >> vcpu_sync_interrupts(), which is called just before entering the VM, >> slightly bends the rule that the irqs_pending bit must be written >> first, followed by updating the corresponding bit in irqs_pending_mask. >> However, it still respects the core guarantee that the producer never >> clears the mask and only writes to irqs_pending if it is the one that >> flipped the corresponding mask bit from 0 to 1. >> Moreover, since the consumer won't run concurrently because >> vcpu_sync_interrupts() and the consumer path are going to be invoked >> equentially immediately before VM entry, it is safe to slightly relax > Nit: There was an 's' lost at the start of the line. > >> @@ -127,3 +128,73 @@ void arch_vcpu_destroy(struct vcpu *v) >> { >> vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); >> } >> + >> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* We only allow VS-mode software, timer, and external interrupts */ >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; >> + >> + set_bit(irq, v->arch.irqs_pending); >> + /* >> + * The counterpart of this barrier is the one encoded implicitly in xchg() >> + * which is used in consumer part (vcpu_flush_interrupts()). >> + */ >> + smp_wmb(); >> + set_bit(irq, v->arch.irqs_pending_mask); > Wasn't this meant to go away with ... > >> + if ( !test_and_set_bit(irq, v->arch.irqs_pending_mask) ) > ... the introduction of this? Yes, set_bit() should be dropped. > >> + vcpu_kick(v); > Nit: Bad indentation. > > As to the test_and_set_bit(): In isolation here this looks correct, but > when taking ... > >> + return 0; >> +} >> + >> +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* We only allow VS-mode software, timer, external interrupts */ >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; >> + >> + clear_bit(irq, v->arch.irqs_pending); >> + /* >> + * The counterpart of this barrier is the one encoded implicitly in xchg() >> + * which is used in consumer part (vcpu_flush_interrupts()). >> + */ >> + smp_wmb(); >> + set_bit(irq, v->arch.irqs_pending_mask); >> + >> + return 0; >> +} > ... this into account - what about vcpu_unset_interrupt() followed by > vcpu_set_interrupt()? Shouldn't that also result in a kick? I.e. > shouldn't the condition above be whether either of the two bits > transitioned from 0 to 1? Then it looks like it is enough to detect that pending bit in irqs_pending bitmap transitioned from 0 to 1. > >> --- a/xen/arch/riscv/include/asm/domain.h >> +++ b/xen/arch/riscv/include/asm/domain.h >> @@ -54,6 +54,25 @@ struct arch_vcpu { >> register_t henvcfg; >> register_t hideleg; >> register_t hstateen0; >> + register_t hvip; >> + >> + register_t vsie; >> + >> + /* >> + * VCPU interrupts >> + * >> + * We have a lockless approach for tracking pending VCPU interrupts >> + * implemented using atomic bitops. The irqs_pending bitmap represent >> + * pending interrupts whereas irqs_pending_mask represent bits changed >> + * in irqs_pending. Our approach is modeled around multiple producer >> + * and single consumer problem where the consumer is the VCPU itself. >> + * >> + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts >> + * on RV32 host. >> + */ >> +#define RISCV_VCPU_NR_IRQS MAX(BITS_PER_LONG, 64) > In the revlog you mention also taking care of "the case if AIA isn't used". > I can't spot anything like this here. I don't mention as all the cases are covered by such definition of RISCV_VCPU_NR_IRQS. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 17:07:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 17:07:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235231.1538265 (Exim 4.92) (envelope-from ) id 1vsOXj-0005jl-2J; Tue, 17 Feb 2026 17:07:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235231.1538265; Tue, 17 Feb 2026 17:07:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsOXi-0005je-VT; Tue, 17 Feb 2026 17:07:22 +0000 Received: by outflank-mailman (input) for mailman id 1235231; Tue, 17 Feb 2026 17:07:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsOXh-0005jG-KK for xen-devel@lists.xenproject.org; Tue, 17 Feb 2026 17:07:21 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1ed1ab98-0c23-11f1-b164-2bf370ae4941; Tue, 17 Feb 2026 18:07:20 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-483770e0b25so39279865e9.0 for ; Tue, 17 Feb 2026 09:07:20 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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This is useful when Xen runs as a guest under another Xen, >> because the TIME extension is not currently virtualised and therefore >> will not appear as available. >> Despite of the fact that sbi_set_timer_v01 is introduced and used as >> fall back, SBI v0.1 still isn't fully supported (with the current SBI >> calls usage, sbi_rfence_v01 should be introduced too), so panic() >> in sbi_init() isn't removed. >> >> The sbi_set_timer() pointer will be used by reprogram_timer() to program >> Xen’s physical timer as without SSTC extension there is no any other >> option except SBI call to do that as only M-timer is available for us. >> >> Use dprintk() for all the cases to print that a speicifc SBI extension >> is available as it isn't really necessary in case of release builds. >> >> Signed-off-by: Oleksii Kurochko >> Acked-by: Jan Beulich >> --- >> Changes in v4: >> - Add "stime_value is in absolute time" to the comment above declaration >> of sbi_set_timer() function pointer. > Yet it still ... > >> @@ -134,6 +138,23 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, >> int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, >> size_t size, unsigned long vmid); >> >> +/* >> + * Programs the clock for next event after stime_value time. stime_value is in >> + * absolute time. This function must clear the pending timer interrupt bit as >> + * well. > ... says "after" when, as per my understanding, it's "at or after". At which > point the final "time" in the sentence becomes bogus (says me as a non- > native speaker). Which in turn is what my v3 comment was triggered by, as > "after stime_value time" to me suggests something relative ("this amount of > time needs to pass"), when that's not what is meant, as the added sentence > now tries to clarify. I will rephrase then the first sentence in the following way: Programs the clock for next event at (or after) stime_value. ... ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 17 22:04:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 17 Feb 2026 22:04:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235279.1538274 (Exim 4.92) (envelope-from ) id 1vsTBO-0005mo-Sn; Tue, 17 Feb 2026 22:04:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235279.1538274; Tue, 17 Feb 2026 22:04:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsTBO-0005mh-Q3; Tue, 17 Feb 2026 22:04:38 +0000 Received: by outflank-mailman (input) for mailman id 1235279; Tue, 17 Feb 2026 22:04:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsTBN-0005mb-Mq for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: goH/hzFLQS2em/ACxGvsyCrG+3jfJA1SukxfM6e3BeH/kwR9736b8RkvFMtLvi4ACbAHtQckisidntU2utxcKzyOoDz2Ujh+6OPAB1s1bh4XbpnN7ptCd5BOkJvgW4jKjFxfZ6mKmhp41dA8zucipTZ6GFU9soY2rOGl6/NHsO4DCW2yXgeWNeFyz9b1dcbsUulDgzDy2RvsDPasgyAJueRYS9mCyvrH7shWzcwVXVPlChVPvz2bzc+8IVQ+bjF9/IPPVTsC8gsu4X3ROUW5u+HxXSbYAuEOY02sImvhqnL9s2t6BlVrih3G8X4XSDD2AMf8k824v0UNNf6S28bmyLivPjJ6NsF1lKolbXGLhKj9QTqUzsGfDga5tfa8Kvs3XjKdSvcFTnzFuu7shUthksEYDGvN1if20FEV+7DNHuric4FHqtq3rw9GHwBu0bj2 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Feb 2026 22:04:26.4114 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6aa54668-d19a-4e03-939c-08de6e708414 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004684.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8454 On 2/10/26 05:53, Jan Beulich wrote: > Before adding more private stuff to xen/vpci.h, split it up. In order to > be able to include the private header first in a CU, the per-arch struct > decls also need to move (to new asm/vpci.h files). > > While adjusting the test harness'es Makefile, also switch the pre-existing > header symlink-ing rule to a pattern one. > > Apart from in the test harness code, things only move; no functional > change intended. > > Signed-off-by: Jan Beulich > --- > Subsequently, at least on x86 more stuff may want moving into asm/vpci.h. > --- > v4: New. > > --- a/tools/tests/vpci/Makefile > +++ b/tools/tests/vpci/Makefile > @@ -14,8 +14,8 @@ else > $(warning HOSTCC != CC, will not run test) > endif > > -$(TARGET): vpci.c vpci.h list.h main.c emul.h > - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c > +$(TARGET): vpci.c vpci.h list.h private.h main.c emul.h > + $(CC) $(CFLAGS_xeninclude) -include emul.h -g -o $@ vpci.c main.c > > .PHONY: clean > clean: Can you please add the generated private.h to be removed upon "make clean"? Also, can you please add tools/tests/vpci/private.h to .gitignore? > --- /dev/null > +++ b/xen/arch/arm/include/asm/vpci.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +#ifndef ARM_VPCI_H > +#define ARM_VPCI_H > + > +/* Arch-specific MSI data for vPCI. */ > +struct vpci_arch_msi { > +}; > + > +/* Arch-specific MSI-X entry data for vPCI. */ > +struct vpci_arch_msix_entry { > +}; > + > +#endif /* ARM_VPCI_H */ Out of curiosity (not asking for any changes), why did you include an emacs footer on the x86 header but not here? Otherwise, the rest of the patch looks good to me. From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:22:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:22:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235313.1538284 (Exim 4.92) (envelope-from ) id 1vscob-0008TM-9M; Wed, 18 Feb 2026 08:21:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235313.1538284; Wed, 18 Feb 2026 08:21:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscob-0008TF-6R; Wed, 18 Feb 2026 08:21:45 +0000 Received: by outflank-mailman (input) for mailman id 1235313; Wed, 18 Feb 2026 08:21:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscoZ-0008T9-96 for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 08:21:43 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d7de64d8-0ca2-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 09:21:37 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 5925B3E6D0; Wed, 18 Feb 2026 08:21:36 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 893403EA65; Wed, 18 Feb 2026 08:21:35 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id HcFZII92lWkvHQAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 08:21:35 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d7de64d8-0ca2-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771402896; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=OYoDmUH9lbkTBURMFRYZYYI6iouhuBtpfCapQgEqDZ8=; b=mumQ2dSroxqx6zt+Ap8HTM0DwIHDjYg5G2rkTfGqr0XF50J9oS7P1iax3mkDWYDGIX05mq VX/pMUcA0pFYr7ZTj5XfgBOOOEBabHE1Wg4S0+rOQYd/osFxFh8Tnl1dVhywbfaL5k3mSq YTambJKAYcAGVGpkGonRfwPP/SogtlM= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771402896; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=OYoDmUH9lbkTBURMFRYZYYI6iouhuBtpfCapQgEqDZ8=; b=mumQ2dSroxqx6zt+Ap8HTM0DwIHDjYg5G2rkTfGqr0XF50J9oS7P1iax3mkDWYDGIX05mq VX/pMUcA0pFYr7ZTj5XfgBOOOEBabHE1Wg4S0+rOQYd/osFxFh8Tnl1dVhywbfaL5k3mSq YTambJKAYcAGVGpkGonRfwPP/SogtlM= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, llvm@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Andy Lutomirski , Peter Zijlstra , Xin Li , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Josh Poimboeuf Subject: [PATCH v3 00/16] x86/msr: Inline rdmsr/wrmsr instructions Date: Wed, 18 Feb 2026 09:21:17 +0100 Message-ID: <20260218082133.400602-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-1.30 / 50.00]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_TWELVE(0.00)[36]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FREEMAIL_CC(0.00)[suse.com,kernel.org,redhat.com,alien8.de,linux.intel.com,zytor.com,intel.com,google.com,microsoft.com,oracle.com,lists.xenproject.org,broadcom.com,infradead.org,gmail.com]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,imap1.dmz-prg2.suse.org:helo]; RCVD_VIA_SMTP_AUTH(0.00)[]; TAGGED_RCPT(0.00)[lkml]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Spam-Flag: NO X-Spam-Score: -1.30 X-Spam-Level: When building a kernel with CONFIG_PARAVIRT_XXL the paravirt infrastructure will always use functions for reading or writing MSRs, even when running on bare metal. Switch to inline RDMSR/WRMSR instructions in this case, reducing the paravirt overhead. The first patch is a prerequisite fix for alternative patching. Its is needed due to the initial indirect call needs to be padded with NOPs in some cases with the following patches. In order to make this less intrusive, some further reorganization of the MSR access helpers is done in the patches 1-6. The next 4 patches are converting the non-paravirt case to use direct inlining of the MSR access instructions, including the WRMSRNS instruction and the immediate variants of RDMSR and WRMSR if possible. Patches 11-13 are some further preparations for making the real switch to directly patch in the native MSR instructions easier. Patch 14 is switching the paravirt MSR function interface from normal call ABI to one more similar to the native MSR instructions. Patch 15 is a little cleanup patch. Patch 16 is the final step for patching in the native MSR instructions when not running as a Xen PV guest. This series has been tested to work with Xen PV and on bare metal. Note that there is more room for improvement. This series is sent out to get a first impression how the code will basically look like. Right now the same problem is solved differently for the paravirt and the non-paravirt cases. In case this is not desired, there are two possibilities to merge the two implementations. Both solutions have the common idea to have rather similar code for paravirt and non-paravirt variants, but just use a different main macro for generating the respective code. For making the code of both possible scenarios more similar, the following variants are possible: 1. Remove the micro-optimizations of the non-paravirt case, making it similar to the paravirt code in my series. This has the advantage of being more simple, but might have a very small negative performance impact (probably not really detectable). 2. Add the same micro-optimizations to the paravirt case, requiring to enhance paravirt patching to support a to be patched indirect call in the middle of the initial code snipplet. In both cases the native MSR function variants would no longer be usable in the paravirt case, but this would mostly affect Xen, as it would need to open code the WRMSR/RDMSR instructions to be used instead the native_*msr*() functions. Changes since V2: - switch back to the paravirt approach Changes since V1: - Use Xin Li's approach for inlining - Several new patches Juergen Gross (16): x86/alternative: Support alt_replace_call() with instructions after call coco/tdx: Rename MSR access helpers x86/sev: Replace call of native_wrmsr() with native_wrmsrq() KVM: x86: Remove the KVM private read_msr() function x86/msr: Minimize usage of native_*() msr access functions x86/msr: Move MSR trace calls one function level up x86/opcode: Add immediate form MSR instructions x86/extable: Add support for immediate form MSR instructions x86/msr: Use the alternatives mechanism for WRMSR x86/msr: Use the alternatives mechanism for RDMSR x86/alternatives: Add ALTERNATIVE_4() x86/paravirt: Split off MSR related hooks into new header x86/paravirt: Prepare support of MSR instruction interfaces x86/paravirt: Switch MSR access pv_ops functions to instruction interfaces x86/msr: Reduce number of low level MSR access helpers x86/paravirt: Use alternatives for MSR access with paravirt arch/x86/coco/sev/internal.h | 7 +- arch/x86/coco/tdx/tdx.c | 8 +- arch/x86/hyperv/ivm.c | 2 +- arch/x86/include/asm/alternative.h | 6 + arch/x86/include/asm/fred.h | 2 +- arch/x86/include/asm/kvm_host.h | 10 - arch/x86/include/asm/msr.h | 345 ++++++++++++++++------ arch/x86/include/asm/paravirt-msr.h | 148 ++++++++++ arch/x86/include/asm/paravirt.h | 67 ----- arch/x86/include/asm/paravirt_types.h | 57 ++-- arch/x86/include/asm/qspinlock_paravirt.h | 4 +- arch/x86/kernel/alternative.c | 5 +- arch/x86/kernel/cpu/mshyperv.c | 7 +- arch/x86/kernel/kvmclock.c | 2 +- arch/x86/kernel/paravirt.c | 42 ++- arch/x86/kvm/svm/svm.c | 16 +- arch/x86/kvm/vmx/tdx.c | 2 +- arch/x86/kvm/vmx/vmx.c | 8 +- arch/x86/lib/x86-opcode-map.txt | 5 +- arch/x86/mm/extable.c | 35 ++- arch/x86/xen/enlighten_pv.c | 52 +++- arch/x86/xen/pmu.c | 4 +- tools/arch/x86/lib/x86-opcode-map.txt | 5 +- tools/objtool/check.c | 1 + 24 files changed, 576 insertions(+), 264 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-msr.h -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:22:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235316.1538295 (Exim 4.92) (envelope-from ) id 1vscox-0000O4-Kn; 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bh=nmkFHBBGmW1gFmVNGJrsFCQB+9CCXKUbJdAXWGghiNM=; b=gPtQAbrJ0W7jHHybeb0/Ufmin0ifKbAt6AzDrXFVFWbzpGlMPQ513v+jLWpWyygbuuKCBW zvWvrj/Au4wcSx6zt5y3JgpiB1DHq5jfCdDlc598xegpKWZY05VaShPPyaNUEujUBe8Aoi gqO7WjvpxpLP4DNzZVL0nxAEg1zRuAM= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771402924; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nmkFHBBGmW1gFmVNGJrsFCQB+9CCXKUbJdAXWGghiNM=; b=gPtQAbrJ0W7jHHybeb0/Ufmin0ifKbAt6AzDrXFVFWbzpGlMPQ513v+jLWpWyygbuuKCBW zvWvrj/Au4wcSx6zt5y3JgpiB1DHq5jfCdDlc598xegpKWZY05VaShPPyaNUEujUBe8Aoi gqO7WjvpxpLP4DNzZVL0nxAEg1zRuAM= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, kvm@vger.kernel.org Cc: Juergen Gross , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Sean Christopherson , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v3 05/16] x86/msr: Minimize usage of native_*() msr access functions Date: Wed, 18 Feb 2026 09:21:22 +0100 Message-ID: <20260218082133.400602-6-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[20]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:email,zytor.com:email]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 X-Spam-Level: In order to prepare for some MSR access function reorg work, switch most users of native_{read|write}_msr[_safe]() to the more generic rdmsr*()/wrmsr*() variants. For now this will have some intermediate performance impact with paravirtualization configured when running on bare metal, but this is a prereq change for the planned direct inlining of the rdmsr/wrmsr instructions with this configuration. The main reason for this switch is the planned move of the MSR trace function invocation from the native_*() functions to the generic rdmsr*()/wrmsr*() variants. Without this switch the users of the native_*() functions would lose the related tracing entries. Note that the Xen related MSR access functions will not be switched, as these will be handled after the move of the trace hooks. Signed-off-by: Juergen Gross Acked-by: Sean Christopherson Acked-by: Wei Liu Reviewed-by: H. Peter Anvin (Intel) --- arch/x86/hyperv/ivm.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 7 +++++-- arch/x86/kernel/kvmclock.c | 2 +- arch/x86/kvm/svm/svm.c | 16 ++++++++-------- arch/x86/xen/pmu.c | 4 ++-- 5 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c index 651771534cae..1b2222036a0b 100644 --- a/arch/x86/hyperv/ivm.c +++ b/arch/x86/hyperv/ivm.c @@ -327,7 +327,7 @@ int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu) asm volatile("movl %%ds, %%eax;" : "=a" (vmsa->ds.selector)); hv_populate_vmcb_seg(vmsa->ds, vmsa->gdtr.base); - vmsa->efer = native_read_msr(MSR_EFER); + rdmsrq(MSR_EFER, vmsa->efer); vmsa->cr4 = native_read_cr4(); vmsa->cr3 = __native_read_cr3(); diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 579fb2c64cfd..9bebb1a1ebee 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -111,9 +111,12 @@ void hv_para_set_sint_proxy(bool enable) */ u64 hv_para_get_synic_register(unsigned int reg) { + u64 val; + if (WARN_ON(!ms_hyperv.paravisor_present || !hv_is_synic_msr(reg))) return ~0ULL; - return native_read_msr(reg); + rdmsrq(reg, val); + return val; } /* @@ -123,7 +126,7 @@ void hv_para_set_synic_register(unsigned int reg, u64 val) { if (WARN_ON(!ms_hyperv.paravisor_present || !hv_is_synic_msr(reg))) return; - native_write_msr(reg, val); + wrmsrq(reg, val); } u64 hv_get_msr(unsigned int reg) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b5991d53fc0e..1002bdd45c0f 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -197,7 +197,7 @@ static void kvm_setup_secondary_clock(void) void kvmclock_disable(void) { if (msr_kvm_system_time) - native_write_msr(msr_kvm_system_time, 0); + wrmsrq(msr_kvm_system_time, 0); } static void __init kvmclock_init_mem(void) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 8f8bc863e214..1c0e7cae9e49 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -389,12 +389,12 @@ static void svm_init_erratum_383(void) return; /* Use _safe variants to not break nested virtualization */ - if (native_read_msr_safe(MSR_AMD64_DC_CFG, &val)) + if (rdmsrq_safe(MSR_AMD64_DC_CFG, &val)) return; val |= (1ULL << 47); - native_write_msr_safe(MSR_AMD64_DC_CFG, val); + wrmsrq_safe(MSR_AMD64_DC_CFG, val); erratum_383_found = true; } @@ -554,9 +554,9 @@ static int svm_enable_virtualization_cpu(void) u64 len, status = 0; int err; - err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len); + err = rdmsrq_safe(MSR_AMD64_OSVW_ID_LENGTH, &len); if (!err) - err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status); + err = rdmsrq_safe(MSR_AMD64_OSVW_STATUS, &status); if (err) osvw_status = osvw_len = 0; @@ -2029,7 +2029,7 @@ static bool is_erratum_383(void) if (!erratum_383_found) return false; - if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &value)) + if (rdmsrq_safe(MSR_IA32_MC0_STATUS, &value)) return false; /* Bit 62 may or may not be set for this mce */ @@ -2040,11 +2040,11 @@ static bool is_erratum_383(void) /* Clear MCi_STATUS registers */ for (i = 0; i < 6; ++i) - native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0); + wrmsrq_safe(MSR_IA32_MCx_STATUS(i), 0); - if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) { + if (!rdmsrq_safe(MSR_IA32_MCG_STATUS, &value)) { value &= ~(1ULL << 2); - native_write_msr_safe(MSR_IA32_MCG_STATUS, value); + wrmsrq_safe(MSR_IA32_MCG_STATUS, value); } /* Flush tlb to evict multi-match entries */ diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c index 8f89ce0b67e3..d49a3bdc448b 100644 --- a/arch/x86/xen/pmu.c +++ b/arch/x86/xen/pmu.c @@ -323,7 +323,7 @@ static u64 xen_amd_read_pmc(int counter) u64 val; msr = amd_counters_base + (counter * amd_msr_step); - native_read_msr_safe(msr, &val); + rdmsrq_safe(msr, &val); return val; } @@ -349,7 +349,7 @@ static u64 xen_intel_read_pmc(int counter) else msr = MSR_IA32_PERFCTR0 + counter; - native_read_msr_safe(msr, &val); + rdmsrq_safe(msr, &val); return val; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:22:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:22:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235329.1538305 (Exim 4.92) (envelope-from ) id 1vscpZ-00010E-SL; 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Wed, 18 Feb 2026 08:22:43 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1DE2A3EA65; Wed, 18 Feb 2026 08:22:43 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id aOkqBtN2lWkuHwAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 08:22:43 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ff90fd4c-0ca2-11f1-b164-2bf370ae4941 Authentication-Results: smtp-out1.suse.de; none From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Boris Ostrovsky , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v3 12/16] x86/paravirt: Split off MSR related hooks into new header Date: Wed, 18 Feb 2026 09:21:29 +0100 Message-ID: <20260218082133.400602-13-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: 85F953E704 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: Move the WRMSR, RDMSR and RDPMC related parts of paravirt.h and paravirt_types.h into a new header file paravirt-msr.h. Signed-off-by: Juergen Gross --- V3: - new patch --- arch/x86/include/asm/msr.h | 2 +- arch/x86/include/asm/paravirt-msr.h | 46 +++++++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 45 -------------------------- arch/x86/include/asm/paravirt_types.h | 13 -------- arch/x86/kernel/paravirt.c | 14 +++++--- arch/x86/xen/enlighten_pv.c | 11 ++++--- tools/objtool/check.c | 1 + 7 files changed, 63 insertions(+), 69 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-msr.h diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 990268dea5ad..66f57265f2f8 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -308,7 +308,7 @@ static inline u64 native_read_pmc(int counter) } #ifdef CONFIG_PARAVIRT_XXL -#include +#include #else static __always_inline u64 read_msr(u32 msr) { diff --git a/arch/x86/include/asm/paravirt-msr.h b/arch/x86/include/asm/paravirt-msr.h new file mode 100644 index 000000000000..b299864b438a --- /dev/null +++ b/arch/x86/include/asm/paravirt-msr.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_X86_PARAVIRT_MSR_H +#define _ASM_X86_PARAVIRT_MSR_H + +#include + +struct pv_msr_ops { + /* Unsafe MSR operations. These will warn or panic on failure. */ + u64 (*read_msr)(u32 msr); + void (*write_msr)(u32 msr, u64 val); + + /* Safe MSR operations. Returns 0 or -EIO. */ + int (*read_msr_safe)(u32 msr, u64 *val); + int (*write_msr_safe)(u32 msr, u64 val); + + u64 (*read_pmc)(int counter); +} __no_randomize_layout; + +extern struct pv_msr_ops pv_ops_msr; + +static __always_inline u64 read_msr(u32 msr) +{ + return PVOP_CALL1(u64, pv_ops_msr, read_msr, msr); +} + +static __always_inline void write_msr(u32 msr, u64 val) +{ + PVOP_VCALL2(pv_ops_msr, write_msr, msr, val); +} + +static __always_inline int read_msr_safe(u32 msr, u64 *val) +{ + return PVOP_CALL2(int, pv_ops_msr, read_msr_safe, msr, val); +} + +static __always_inline int write_msr_safe(u32 msr, u64 val) +{ + return PVOP_CALL2(int, pv_ops_msr, write_msr_safe, msr, val); +} + +static __always_inline u64 rdpmc(int counter) +{ + return PVOP_CALL1(u64, pv_ops_msr, read_pmc, counter); +} + +#endif /* _ASM_X86_PARAVIRT_MSR_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index 6b3aed5c2309..fcda593dd5c9 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -130,51 +130,6 @@ static inline void __write_cr4(unsigned long x) PVOP_VCALL1(pv_ops, cpu.write_cr4, x); } -static inline u64 paravirt_read_msr(u32 msr) -{ - return PVOP_CALL1(u64, pv_ops, cpu.read_msr, msr); -} - -static inline void paravirt_write_msr(u32 msr, u64 val) -{ - PVOP_VCALL2(pv_ops, cpu.write_msr, msr, val); -} - -static inline int paravirt_read_msr_safe(u32 msr, u64 *val) -{ - return PVOP_CALL2(int, pv_ops, cpu.read_msr_safe, msr, val); -} - -static inline int paravirt_write_msr_safe(u32 msr, u64 val) -{ - return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val); -} - -static __always_inline u64 read_msr(u32 msr) -{ - return paravirt_read_msr(msr); -} - -static __always_inline int read_msr_safe(u32 msr, u64 *p) -{ - return paravirt_read_msr_safe(msr, p); -} - -static __always_inline void write_msr(u32 msr, u64 val) -{ - paravirt_write_msr(msr, val); -} - -static __always_inline int write_msr_safe(u32 msr, u64 val) -{ - return paravirt_write_msr_safe(msr, val); -} - -static __always_inline u64 rdpmc(int counter) -{ - return PVOP_CALL1(u64, pv_ops, cpu.read_pmc, counter); -} - static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries) { PVOP_VCALL2(pv_ops, cpu.alloc_ldt, ldt, entries); diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h index 4f5ae0068aab..1e7188247c1f 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -67,19 +67,6 @@ struct pv_cpu_ops { void (*cpuid)(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx); - /* Unsafe MSR operations. These will warn or panic on failure. */ - u64 (*read_msr)(u32 msr); - void (*write_msr)(u32 msr, u64 val); - - /* - * Safe MSR operations. - * Returns 0 or -EIO. - */ - int (*read_msr_safe)(u32 msr, u64 *val); - int (*write_msr_safe)(u32 msr, u64 val); - - u64 (*read_pmc)(int counter); - void (*start_context_switch)(struct task_struct *prev); void (*end_context_switch)(struct task_struct *next); #endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 792fa96b3233..089a87ac1582 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -109,11 +109,6 @@ struct paravirt_patch_template pv_ops = { .cpu.read_cr0 = native_read_cr0, .cpu.write_cr0 = native_write_cr0, .cpu.write_cr4 = native_write_cr4, - .cpu.read_msr = native_read_msr, - .cpu.write_msr = native_write_msr, - .cpu.read_msr_safe = native_read_msr_safe, - .cpu.write_msr_safe = native_write_msr_safe, - .cpu.read_pmc = native_read_pmc, .cpu.load_tr_desc = native_load_tr_desc, .cpu.set_ldt = native_set_ldt, .cpu.load_gdt = native_load_gdt, @@ -215,6 +210,15 @@ struct paravirt_patch_template pv_ops = { }; #ifdef CONFIG_PARAVIRT_XXL +struct pv_msr_ops pv_ops_msr = { + .read_msr = native_read_msr, + .write_msr = native_write_msr, + .read_msr_safe = native_read_msr_safe, + .write_msr_safe = native_write_msr_safe, + .read_pmc = native_read_pmc, +}; +EXPORT_SYMBOL(pv_ops_msr); + NOKPROBE_SYMBOL(native_load_idt); #endif diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 0a6a50f3e9a9..b94437f26cc0 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1366,11 +1366,6 @@ asmlinkage __visible void __init xen_start_kernel(struct start_info *si) pv_ops.cpu.read_cr0 = xen_read_cr0; pv_ops.cpu.write_cr0 = xen_write_cr0; pv_ops.cpu.write_cr4 = xen_write_cr4; - pv_ops.cpu.read_msr = xen_read_msr; - pv_ops.cpu.write_msr = xen_write_msr; - pv_ops.cpu.read_msr_safe = xen_read_msr_safe; - pv_ops.cpu.write_msr_safe = xen_write_msr_safe; - pv_ops.cpu.read_pmc = xen_read_pmc; pv_ops.cpu.load_tr_desc = paravirt_nop; pv_ops.cpu.set_ldt = xen_set_ldt; pv_ops.cpu.load_gdt = xen_load_gdt; @@ -1391,6 +1386,12 @@ asmlinkage __visible void __init xen_start_kernel(struct start_info *si) pv_ops.cpu.start_context_switch = xen_start_context_switch; pv_ops.cpu.end_context_switch = xen_end_context_switch; + pv_ops_msr.read_msr = xen_read_msr; + pv_ops_msr.write_msr = xen_write_msr; + pv_ops_msr.read_msr_safe = xen_read_msr_safe; + pv_ops_msr.write_msr_safe = xen_write_msr_safe; + pv_ops_msr.read_pmc = xen_read_pmc; + xen_init_irq_ops(); /* diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 37f87c4a0134..d400cb435757 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -529,6 +529,7 @@ static struct { } pv_ops_tables[] = { { .name = "pv_ops", }, { .name = "pv_ops_lock", }, + { .name = "pv_ops_msr", }, { .name = NULL, .idx_off = -1 } }; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:22:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:22:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235331.1538315 (Exim 4.92) (envelope-from ) id 1vscpl-0001IO-3b; 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bh=YIRfbYWA3AyTyEt3oMdg3/rXPYmNZ/UV1Y+E3VErVSU=; b=tAFbBNCqTpWC2hvnzZrO/Khw42r+3dzMJT1Ses2y0pedNH1gnAUQHe8xRSYY95lMSoMoos gQkwLkXvpmqxwwsoaPNNqjNU5YkHAc9Z51O60pyPP7sfOsdUcWjGk3fcv3RelZ/RTR4AyO tKJb/LvT5eYPEGpE7kZtOBpLGmWQSK8= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771402974; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YIRfbYWA3AyTyEt3oMdg3/rXPYmNZ/UV1Y+E3VErVSU=; b=tAFbBNCqTpWC2hvnzZrO/Khw42r+3dzMJT1Ses2y0pedNH1gnAUQHe8xRSYY95lMSoMoos gQkwLkXvpmqxwwsoaPNNqjNU5YkHAc9Z51O60pyPP7sfOsdUcWjGk3fcv3RelZ/RTR4AyO tKJb/LvT5eYPEGpE7kZtOBpLGmWQSK8= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v3 14/16] x86/paravirt: Switch MSR access pv_ops functions to instruction interfaces Date: Wed, 18 Feb 2026 09:21:31 +0100 Message-ID: <20260218082133.400602-15-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO In order to prepare for inlining RDMSR/WRMSR instructions via alternatives directly when running not in a Xen PV guest, switch the interfaces of the MSR related pvops callbacks to ones similar of the related instructions. In order to prepare for supporting the immediate variants of RDMSR/WRMSR use a 64-bit interface instead of the 32-bit one of RDMSR/WRMSR. Signed-off-by: Juergen Gross --- V3: - former patch 5 of V1 has been split - use 64-bit interface (Xin Li) --- arch/x86/include/asm/paravirt-msr.h | 49 ++++++++++++++++++++++++----- arch/x86/kernel/paravirt.c | 36 ++++++++++++++++++--- arch/x86/xen/enlighten_pv.c | 45 +++++++++++++++++++------- 3 files changed, 107 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/paravirt-msr.h b/arch/x86/include/asm/paravirt-msr.h index b299864b438a..4ce690b05600 100644 --- a/arch/x86/include/asm/paravirt-msr.h +++ b/arch/x86/include/asm/paravirt-msr.h @@ -6,36 +6,69 @@ struct pv_msr_ops { /* Unsafe MSR operations. These will warn or panic on failure. */ - u64 (*read_msr)(u32 msr); - void (*write_msr)(u32 msr, u64 val); + struct paravirt_callee_save read_msr; + struct paravirt_callee_save write_msr; /* Safe MSR operations. Returns 0 or -EIO. */ - int (*read_msr_safe)(u32 msr, u64 *val); - int (*write_msr_safe)(u32 msr, u64 val); + struct paravirt_callee_save read_msr_safe; + struct paravirt_callee_save write_msr_safe; u64 (*read_pmc)(int counter); } __no_randomize_layout; extern struct pv_msr_ops pv_ops_msr; +#define PV_PROLOGUE_MSR(func) \ + PV_SAVE_COMMON_CALLER_REGS \ + PV_PROLOGUE_MSR_##func + +#define PV_EPILOGUE_MSR(func) PV_RESTORE_COMMON_CALLER_REGS + +#define PV_CALLEE_SAVE_REGS_MSR_THUNK(func) \ + __PV_CALLEE_SAVE_REGS_THUNK(func, ".text", MSR) + static __always_inline u64 read_msr(u32 msr) { - return PVOP_CALL1(u64, pv_ops_msr, read_msr, msr); + u64 val; + + asm volatile(PARAVIRT_CALL + : "=a" (val), ASM_CALL_CONSTRAINT + : paravirt_ptr(pv_ops_msr, read_msr), "c" (msr) + : "rdx"); + + return val; } static __always_inline void write_msr(u32 msr, u64 val) { - PVOP_VCALL2(pv_ops_msr, write_msr, msr, val); + asm volatile(PARAVIRT_CALL + : ASM_CALL_CONSTRAINT + : paravirt_ptr(pv_ops_msr, write_msr), "c" (msr), "a" (val) + : "memory", "rdx"); } static __always_inline int read_msr_safe(u32 msr, u64 *val) { - return PVOP_CALL2(int, pv_ops_msr, read_msr_safe, msr, val); + int err; + + asm volatile(PARAVIRT_CALL + : [err] "=d" (err), "=a" (*val), ASM_CALL_CONSTRAINT + : paravirt_ptr(pv_ops_msr, read_msr_safe), "c" (msr)); + + return err ? -EIO : 0; } static __always_inline int write_msr_safe(u32 msr, u64 val) { - return PVOP_CALL2(int, pv_ops_msr, write_msr_safe, msr, val); + int err; + + asm volatile(PARAVIRT_CALL + : [err] "=a" (err), ASM_CALL_CONSTRAINT + : paravirt_ptr(pv_ops_msr, write_msr_safe), + "c" (msr), "a" (val) + : "memory", "rdx"); + + return err ? -EIO : 0; } static __always_inline u64 rdpmc(int counter) diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 089a87ac1582..c0d78e4536c9 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -49,12 +49,40 @@ unsigned long pv_native_save_fl(void); void pv_native_irq_disable(void); void pv_native_irq_enable(void); unsigned long pv_native_read_cr2(void); +void pv_native_rdmsr(void); +void pv_native_wrmsr(void); +void pv_native_rdmsr_safe(void); +void pv_native_wrmsr_safe(void); DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text); DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text); DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text); DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text); DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text); +DEFINE_ASM_FUNC(pv_native_rdmsr, + "1: rdmsr\n" + "shl $32, %rdx; or %rdx, %rax\n" + "2:\n" + _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_RDMSR), .noinstr.text); +DEFINE_ASM_FUNC(pv_native_wrmsr, + "mov %rax, %rdx; shr $32, %rdx\n" + "1: wrmsr\n" + "2:\n" + _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR), .noinstr.text); +DEFINE_ASM_FUNC(pv_native_rdmsr_safe, + "1: rdmsr\n" + "shl $32, %rdx; or %rdx, %rax\n" + "xor %edx, %edx\n" + "2:\n" + _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %%edx), + .noinstr.text); +DEFINE_ASM_FUNC(pv_native_wrmsr_safe, + "mov %rax, %rdx; shr $32, %rdx\n" + "1: wrmsr\n" + "xor %eax, %eax\n" + "2:\n" + _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %%eax), + .noinstr.text); #endif static noinstr void pv_native_safe_halt(void) @@ -211,10 +239,10 @@ struct paravirt_patch_template pv_ops = { #ifdef CONFIG_PARAVIRT_XXL struct pv_msr_ops pv_ops_msr = { - .read_msr = native_read_msr, - .write_msr = native_write_msr, - .read_msr_safe = native_read_msr_safe, - .write_msr_safe = native_write_msr_safe, + .read_msr = __PV_IS_CALLEE_SAVE(pv_native_rdmsr), + .write_msr = __PV_IS_CALLEE_SAVE(pv_native_wrmsr), + .read_msr_safe = __PV_IS_CALLEE_SAVE(pv_native_rdmsr_safe), + .write_msr_safe = __PV_IS_CALLEE_SAVE(pv_native_wrmsr_safe), .read_pmc = native_read_pmc, }; EXPORT_SYMBOL(pv_ops_msr); diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index b94437f26cc0..fed312a17033 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1154,15 +1154,32 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err) } } -static int xen_read_msr_safe(u32 msr, u64 *val) +/* + * Prototypes for functions called via PV_CALLEE_SAVE_REGS_THUNK() in order + * to avoid warnings with "-Wmissing-prototypes". + */ +struct xen_rdmsr_safe_ret { + u64 val; + int err; +}; +struct xen_rdmsr_safe_ret xen_read_msr_safe(u32 msr); +int xen_write_msr_safe(u32 msr, u64 val); +u64 xen_read_msr(u32 msr); +void xen_write_msr(u32 msr, u64 val); +#define PV_PROLOGUE_RDMSR "mov %ecx, %edi;" +#define PV_PROLOGUE_WRMSR "mov %ecx, %edi; mov %rax, %rsi;" + +__visible struct xen_rdmsr_safe_ret xen_read_msr_safe(u32 msr) { - int err = 0; + struct xen_rdmsr_safe_ret ret = { 0, 0 }; - *val = xen_do_read_msr(msr, &err); - return err; + ret.val = xen_do_read_msr(msr, &ret.err); + return ret; } +#define PV_PROLOGUE_MSR_xen_read_msr_safe PV_PROLOGUE_RDMSR +PV_CALLEE_SAVE_REGS_MSR_THUNK(xen_read_msr_safe); -static int xen_write_msr_safe(u32 msr, u64 val) +__visible int xen_write_msr_safe(u32 msr, u64 val) { int err = 0; @@ -1170,20 +1187,26 @@ static int xen_write_msr_safe(u32 msr, u64 val) return err; } +#define PV_PROLOGUE_MSR_xen_write_msr_safe PV_PROLOGUE_WRMSR +PV_CALLEE_SAVE_REGS_MSR_THUNK(xen_write_msr_safe); -static u64 xen_read_msr(u32 msr) +__visible u64 xen_read_msr(u32 msr) { int err = 0; return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL); } +#define PV_PROLOGUE_MSR_xen_read_msr PV_PROLOGUE_RDMSR +PV_CALLEE_SAVE_REGS_MSR_THUNK(xen_read_msr); -static void xen_write_msr(u32 msr, u64 val) +__visible void xen_write_msr(u32 msr, u64 val) { int err; xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL); } +#define PV_PROLOGUE_MSR_xen_write_msr PV_PROLOGUE_WRMSR +PV_CALLEE_SAVE_REGS_MSR_THUNK(xen_write_msr); /* This is called once we have the cpu_possible_mask */ void __init xen_setup_vcpu_info_placement(void) @@ -1386,10 +1409,10 @@ asmlinkage __visible void __init xen_start_kernel(struct start_info *si) pv_ops.cpu.start_context_switch = xen_start_context_switch; pv_ops.cpu.end_context_switch = xen_end_context_switch; - pv_ops_msr.read_msr = xen_read_msr; - pv_ops_msr.write_msr = xen_write_msr; - pv_ops_msr.read_msr_safe = xen_read_msr_safe; - pv_ops_msr.write_msr_safe = xen_write_msr_safe; + pv_ops_msr.read_msr = PV_CALLEE_SAVE(xen_read_msr); + pv_ops_msr.write_msr = PV_CALLEE_SAVE(xen_write_msr); + pv_ops_msr.read_msr_safe = PV_CALLEE_SAVE(xen_read_msr_safe); + pv_ops_msr.write_msr_safe = PV_CALLEE_SAVE(xen_write_msr_safe); pv_ops_msr.read_pmc = xen_read_pmc; xen_init_irq_ops(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:23:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:23:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235333.1538325 (Exim 4.92) (envelope-from ) id 1vscps-0001gm-Dt; Wed, 18 Feb 2026 08:23:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235333.1538325; Wed, 18 Feb 2026 08:23:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscps-0001ge-AO; Wed, 18 Feb 2026 08:23:04 +0000 Received: by outflank-mailman (input) for mailman id 1235333; Wed, 18 Feb 2026 08:23:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscpq-0001cj-Pa for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 08:23:02 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [2a07:de40:b251:101:10:150:64:1]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 098ffe0e-0ca3-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 09:23:00 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 59ECA3E6F0; Wed, 18 Feb 2026 08:23:00 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 109203EA65; Wed, 18 Feb 2026 08:23:00 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id FfbiAuR2lWlFHwAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 08:23:00 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 098ffe0e-0ca3-11f1-9ccf-f158ae23cfc8 Authentication-Results: smtp-out1.suse.de; none From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v3 15/16] x86/msr: Reduce number of low level MSR access helpers Date: Wed, 18 Feb 2026 09:21:32 +0100 Message-ID: <20260218082133.400602-16-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Queue-Id: 59ECA3E6F0 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Score: -4.00 X-Spam-Level: X-Spam-Flag: NO X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Some MSR access helpers are redundant now, so remove the no longer needed ones. Signed-off-by: Juergen Gross --- arch/x86/include/asm/msr.h | 15 ++------------- arch/x86/xen/enlighten_pv.c | 4 ++-- 2 files changed, 4 insertions(+), 15 deletions(-) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 66f57265f2f8..84e82c0bb9b1 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -272,22 +272,11 @@ static __always_inline void native_wrmsr(u32 msr, u32 low, u32 high) native_wrmsrq(msr, (u64)high << 32 | low); } -static inline u64 native_read_msr(u32 msr) -{ - return native_rdmsrq(msr); -} - static inline int native_read_msr_safe(u32 msr, u64 *val) { return __rdmsr(msr, val, EX_TYPE_RDMSR_SAFE) ? -EIO : 0; } -/* Can be uninlined because referenced by paravirt */ -static inline void notrace native_write_msr(u32 msr, u64 val) -{ - native_wrmsrq(msr, val); -} - /* Can be uninlined because referenced by paravirt */ static inline int notrace native_write_msr_safe(u32 msr, u64 val) { @@ -312,7 +301,7 @@ static inline u64 native_read_pmc(int counter) #else static __always_inline u64 read_msr(u32 msr) { - return native_read_msr(msr); + return native_rdmsrq(msr); } static __always_inline int read_msr_safe(u32 msr, u64 *p) @@ -322,7 +311,7 @@ static __always_inline int read_msr_safe(u32 msr, u64 *p) static __always_inline void write_msr(u32 msr, u64 val) { - native_write_msr(msr, val); + native_wrmsrq(msr, val); } static __always_inline int write_msr_safe(u32 msr, u64 val) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index fed312a17033..612a512e2a67 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1091,7 +1091,7 @@ static u64 xen_do_read_msr(u32 msr, int *err) if (err) *err = native_read_msr_safe(msr, &val); else - val = native_read_msr(msr); + val = native_rdmsrq(msr); switch (msr) { case MSR_IA32_APICBASE: @@ -1150,7 +1150,7 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err) if (err) *err = native_write_msr_safe(msr, val); else - native_write_msr(msr, val); + native_wrmsrq(msr, val); } } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:37:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:37:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235356.1538335 (Exim 4.92) (envelope-from ) id 1vsd3S-0003tK-Gy; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xQC0A0ioxfNnjWu2KcMwwtK4EKeucVhpPDqHfSMGONrDnh9Ah7SbkbFn8H93mu/6jDRfhfL9xd1BkEHoorLDQl3UsqQpd9VbVWJbuBc4w0IBxsmjsa9t2teCArA9VD0slY7oxS4YfMW+l7BLH/tn9ARhwBLO29VF6TVkxwmC/B3xv1nLkqQrR55Gqh1bc9mHVsERXVZc/x4jMLJLShAEvPHkSjHAi28sEawkNn4O40US8smYizgw65bQ7KkNt9g4oOVkMYhPbJpKtvHuY3CZWuaORE5xC9FL6fIPm882fVdom/jFI0Qt+vmxrnVUEk1eFjodvnw8pqb4BOLya6KUoTCzTYSt9N14U9vzvjwviTvZjltA5DNIF5PTR90mI/NBnRiRgtbmtP/A0oxf9RxbBLbld80m4TzvLSU72cGL+49p/f3GMEj3cKWQdol83lqr X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 08:36:48.3254 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f35c64d8-ee01-4961-f0eb-08de6ec8db3c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001505.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8911 On 17/02/2026 16:54, Jan Beulich wrote: > On 17.02.2026 16:28, Orzel, Michal wrote: >> >> >> On 16/02/2026 16:20, Jan Beulich wrote: >>> Permitting writes when the P2M type says "read-only" can't be correct. >>> >>> Fixes: 1661158723a ("xen/arm: Extend copy_to_guest to support copying from/to guest physical address") >>> Signed-off-by: Jan Beulich >> Reviewed-by: Michal Orzel > > Thanks. > >>> --- >>> What exactly p2m_ram_ro means on Arm is unclear: The comment next to its >>> definition says one thing, its use in get_page_from_gfn() says another. >>> (I remember raising this point before, i.e. it feels a little odd that the >>> ambiguity still exists.) The patch here assumes the comment is what is >>> wrong. >>> >>> --- a/xen/arch/arm/guestcopy.c >>> +++ b/xen/arch/arm/guestcopy.c >>> @@ -44,7 +44,7 @@ static struct page_info *translate_get_p >>> if ( !page ) >>> return NULL; >>> >>> - if ( !p2m_is_ram(p2mt) ) >>> + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) >>> { >>> put_page(page); >>> return NULL; >> >> The ambiguity you mention is indeed problematic. This mixes page type with p2m >> type. The comment "The p2m_type is based on the type of the page" admits this >> conflation for DOMID_XEN. >> >> AFAICT, p2m_ram_ro is not used on Arm for normal domains. The only use is in >> get_page_from_gfn() for DOMID_XEN. Maybe we could change get_page_from_gfn() to >> always return p2m_ram_rw since DOMID_XEN has direct 1:1 access anyway? > > But that's not correct for cases where share_xen_page_with_privileged_guest() > is passed SHARE_ro. XENMAPSPACE_gmfn_foreign requests have to result in r/o > mappings in that case. Yes. Therefore, on Arm: - p2m_ram_ro is never stored in P2M tables for normal domains - it's only used by get_page_from_gfn() for DOMID_XEN pages - it's used as a signal to install p2m_map_foreign_ro mappings The code should stay as is then and we could modify the comment to say: /* Read-only RAM; only used for DOMID_XEN */ ~Michal From xen-devel-bounces@lists.xenproject.org Wed Feb 18 08:52:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 08:52:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235364.1538345 (Exim 4.92) (envelope-from ) id 1vsdIV-0006gt-Mw; Wed, 18 Feb 2026 08:52:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235364.1538345; Wed, 18 Feb 2026 08:52:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsdIV-0006gm-Jy; Wed, 18 Feb 2026 08:52:39 +0000 Received: by outflank-mailman (input) for mailman id 1235364; Wed, 18 Feb 2026 08:52:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsdIU-0006gg-Rv for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 08:52:38 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2cc4f526-0ca7-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 09:52:37 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-43638a3330dso3933183f8f.0 for ; Wed, 18 Feb 2026 00:52:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 18 Feb 2026 00:52:36 -0800 (PST) Message-ID: <00aa15b0-b1bf-47cb-ab67-bc32d68f56e4@suse.com> Date: Wed, 18 Feb 2026 09:52:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/5] vPCI: introduce private header To: Stewart Hildebrand Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> <4fda7acb-e1a4-4a24-982e-4cae90048018@suse.com> <3bbe1fc7-ed6e-43ee-bcee-17502ba56539@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3bbe1fc7-ed6e-43ee-bcee-17502ba56539@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 17.02.2026 23:04, Stewart Hildebrand wrote: > On 2/10/26 05:53, Jan Beulich wrote: >> Before adding more private stuff to xen/vpci.h, split it up. In order to >> be able to include the private header first in a CU, the per-arch struct >> decls also need to move (to new asm/vpci.h files). >> >> While adjusting the test harness'es Makefile, also switch the pre-existing >> header symlink-ing rule to a pattern one. >> >> Apart from in the test harness code, things only move; no functional >> change intended. >> >> Signed-off-by: Jan Beulich >> --- >> Subsequently, at least on x86 more stuff may want moving into asm/vpci.h. >> --- >> v4: New. >> >> --- a/tools/tests/vpci/Makefile >> +++ b/tools/tests/vpci/Makefile >> @@ -14,8 +14,8 @@ else >> $(warning HOSTCC != CC, will not run test) >> endif >> >> -$(TARGET): vpci.c vpci.h list.h main.c emul.h >> - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c >> +$(TARGET): vpci.c vpci.h list.h private.h main.c emul.h >> + $(CC) $(CFLAGS_xeninclude) -include emul.h -g -o $@ vpci.c main.c >> >> .PHONY: clean >> clean: > > Can you please add the generated private.h to be removed upon "make clean"? > > Also, can you please add tools/tests/vpci/private.h to .gitignore? Oops, yes, of course. >> --- /dev/null >> +++ b/xen/arch/arm/include/asm/vpci.h >> @@ -0,0 +1,13 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +#ifndef ARM_VPCI_H >> +#define ARM_VPCI_H >> + >> +/* Arch-specific MSI data for vPCI. */ >> +struct vpci_arch_msi { >> +}; >> + >> +/* Arch-specific MSI-X entry data for vPCI. */ >> +struct vpci_arch_msix_entry { >> +}; >> + >> +#endif /* ARM_VPCI_H */ > > Out of curiosity (not asking for any changes), why did you include an emacs > footer on the x86 header but not here? > > Otherwise, the rest of the patch looks good to me. Well - I copied the original files and then reduced them to just what I wanted to move here. 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Misra C:2012 rule 20.6 disallows this altogether, though. Use helper always-inline functions instead. In sh_audit_l1_table(), along with reducing the scope of "gfn", which now isn't used anymore by the if() side of the conditional, also reduce the scope of two other adjacent variables. For audit_magic() note that both which parameters are needed and what their types are is attributed to AUDIT_FAIL() accessing variables which aren't passed as arguments to it. No functional change intended. Of course codegen does change with this, first and foremost in register allocation. Reported-by: Andrew Cooper Signed-off-by: Jan Beulich --- Leaving even the fetching of current to the helper in sh_rm_write_access_from_l1() looks tidier to me overall, albeit this means the fetch will now occur once per present L1E. Converting the #if to if() and #ifdef to if(IS_ENABLED()) wouldn't work here, as identifiers are used which aren't available when the respective conditions are false. Note that I tested this only on top of https://lists.xen.org/archives/html/xen-devel/2023-05/msg01140.html, but I have no reason to assume that there is a problematic interaction. Of course it would be really nice if the rest of that series finally could go in. --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -395,7 +395,7 @@ static inline mfn_t cf_check sh_next_pag shadow_set_l2e(d, sl2e, new_sl2e, sl2mfn, SH_type_fl1_shadow, sh_next_page) static inline u32 -guest_index(void *ptr) +guest_index(const void *ptr) { return (u32)((unsigned long)ptr & ~PAGE_MASK) / sizeof(guest_l1e_t); } @@ -3549,16 +3549,25 @@ static int cf_check sh_guess_wrmap( } #endif +/* Remember the last shadow that we shot a writeable mapping in */ +static always_inline void store_last_writeable_pte_smfn( + const struct domain *d, mfn_t sl1mfn) +{ +#if SHADOW_OPTIMIZATIONS & SHOPT_WRITABLE_HEURISTIC + struct vcpu *curr = current; + + if ( curr->domain == d ) + curr->arch.paging.shadow.last_writeable_pte_smfn = mfn_x(sl1mfn); +#endif +} + int cf_check sh_rm_write_access_from_l1( struct domain *d, mfn_t sl1mfn, mfn_t readonly_mfn) /* Excises all writeable mappings to readonly_mfn from this l1 shadow table */ { shadow_l1e_t *sl1e; int done = 0; -#if SHADOW_OPTIMIZATIONS & SHOPT_WRITABLE_HEURISTIC - struct vcpu *curr = current; mfn_t base_sl1mfn = sl1mfn; /* Because sl1mfn changes in the foreach */ -#endif FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { @@ -3568,11 +3577,9 @@ int cf_check sh_rm_write_access_from_l1( shadow_l1e_t ro_sl1e = shadow_l1e_remove_flags(*sl1e, _PAGE_RW); shadow_set_l1e(d, sl1e, ro_sl1e, p2m_ram_rw, sl1mfn); -#if SHADOW_OPTIMIZATIONS & SHOPT_WRITABLE_HEURISTIC - /* Remember the last shadow that we shot a writeable mapping in */ - if ( curr->domain == d ) - curr->arch.paging.shadow.last_writeable_pte_smfn = mfn_x(base_sl1mfn); -#endif + + store_last_writeable_pte_smfn(d, base_sl1mfn); + if ( (mfn_to_page(readonly_mfn)->u.inuse.type_info & PGT_count_mask) == 0 ) /* This breaks us cleanly out of the FOREACH macro */ @@ -3882,12 +3889,36 @@ static const char *sh_audit_flags(const return NULL; } +static always_inline bool audit_magic( + const guest_l1e_t *gl1e, mfn_t gl1mfn, + const shadow_l1e_t *sl1e, mfn_t sl1mfn) +{ + bool done = false; + +#if SHADOW_OPTIMIZATIONS & SHOPT_FAST_FAULT_PATH + if ( !sh_l1e_is_gnp(*sl1e) ) + { + gfn_t gfn = sh_l1e_mmio_get_gfn(*sl1e); + + ASSERT(sh_l1e_is_mmio(*sl1e)); + + if ( !gfn_eq(gfn, guest_l1e_get_gfn(*gl1e)) ) + AUDIT_FAIL(1, + "shadow MMIO gfn is %" SH_PRI_gfn " but guest gfn is %" SH_PRI_gfn, + gfn_x(gfn), gfn_x(guest_l1e_get_gfn(*gl1e))); + } + else if ( guest_l1e_get_flags(*gl1e) & _PAGE_PRESENT ) + AUDIT_FAIL(1, "shadow is GNP magic but guest is present"); +#endif + + return done; +} + int cf_check sh_audit_l1_table(struct domain *d, mfn_t sl1mfn, mfn_t x) { guest_l1e_t *gl1e, *gp; shadow_l1e_t *sl1e; - mfn_t mfn, gmfn, gl1mfn; - gfn_t gfn; + mfn_t gl1mfn; p2m_type_t p2mt; const char *s; int done = 0; @@ -3906,28 +3937,10 @@ int cf_check sh_audit_l1_table(struct do #endif gl1e = gp = map_domain_page(gl1mfn); - FOREACH_PRESENT_L1E(sl1mfn, sl1e, &gl1e, done, { - + FOREACH_PRESENT_L1E(sl1mfn, sl1e, &gl1e, done, + { if ( sh_l1e_is_magic(*sl1e) ) - { -#if (SHADOW_OPTIMIZATIONS & SHOPT_FAST_FAULT_PATH) - if ( sh_l1e_is_gnp(*sl1e) ) - { - if ( guest_l1e_get_flags(*gl1e) & _PAGE_PRESENT ) - AUDIT_FAIL(1, "shadow is GNP magic but guest is present"); - } - else - { - ASSERT(sh_l1e_is_mmio(*sl1e)); - gfn = sh_l1e_mmio_get_gfn(*sl1e); - if ( gfn_x(gfn) != gfn_x(guest_l1e_get_gfn(*gl1e)) ) - AUDIT_FAIL(1, "shadow MMIO gfn is %" SH_PRI_gfn - " but guest gfn is %" SH_PRI_gfn, - gfn_x(gfn), - gfn_x(guest_l1e_get_gfn(*gl1e))); - } -#endif - } + done = audit_magic(gl1e, gl1mfn, sl1e, sl1mfn); else { s = sh_audit_flags(d, 1, guest_l1e_get_flags(*gl1e), @@ -3936,9 +3949,10 @@ int cf_check sh_audit_l1_table(struct do if ( SHADOW_AUDIT & SHADOW_AUDIT_ENTRIES_MFNS ) { - gfn = guest_l1e_get_gfn(*gl1e); - mfn = shadow_l1e_get_mfn(*sl1e); - gmfn = get_gfn_query_unlocked(d, gfn_x(gfn), &p2mt); + gfn_t gfn = guest_l1e_get_gfn(*gl1e); + mfn_t mfn = shadow_l1e_get_mfn(*sl1e); + mfn_t gmfn = get_gfn_query_unlocked(d, gfn_x(gfn), &p2mt); + if ( !p2m_is_grant(p2mt) && !mfn_eq(gmfn, mfn) ) AUDIT_FAIL(1, "bad translation: gfn %" SH_PRI_gfn " --> %" PRI_mfn " != mfn %" PRI_mfn, @@ -4027,6 +4041,17 @@ int cf_check sh_audit_l2_table(struct do } #if GUEST_PAGING_LEVELS >= 4 +static always_inline unsigned int type_from_gl3e( + const struct domain *d, const guest_l3e_t *gl3e) +{ +#ifdef CONFIG_PV32 + if ( guest_index(gl3e) == 3 && is_pv_32bit_domain(d) ) + return SH_type_l2h_shadow; +#endif + + return SH_type_l2_shadow; +} + int cf_check sh_audit_l3_table(struct domain *d, mfn_t sl3mfn, mfn_t x) { guest_l3e_t *gl3e, *gp; @@ -4056,14 +4081,10 @@ int cf_check sh_audit_l3_table(struct do if ( SHADOW_AUDIT & SHADOW_AUDIT_ENTRIES_MFNS ) { - unsigned int t = SH_type_l2_shadow; + unsigned int t = type_from_gl3e(d, gl3e); gfn = guest_l3e_get_gfn(*gl3e); mfn = shadow_l3e_get_mfn(*sl3e); -#ifdef CONFIG_PV32 - if ( guest_index(gl3e) == 3 && is_pv_32bit_domain(d) ) - t = SH_type_l2h_shadow; -#endif gmfn = get_shadow_status( d, get_gfn_query_unlocked(d, gfn_x(gfn), &p2mt), t); if ( !mfn_eq(gmfn, mfn) ) From xen-devel-bounces@lists.xenproject.org Wed Feb 18 09:52:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 09:52:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235388.1538364 (Exim 4.92) (envelope-from ) id 1vseE8-0006aC-AX; Wed, 18 Feb 2026 09:52:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235388.1538364; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org Subject: [PATCH v2 0/2] xen/xenbus: better handle backend crash Date: Wed, 18 Feb 2026 10:52:03 +0100 Message-ID: <20260218095205.453657-1-jgross@suse.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-1.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCPT_COUNT_TWELVE(0.00)[16]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; TAGGED_RCPT(0.00)[netdev]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -1.80 X-Spam-Level: This small series fixes PV-device frontend side handling in case the backend crashed and has come up again. The old device will be discarded and the replacement can be used instead. Changes in V2: - fixed one comment related build warning Juergen Gross (2): xenbus: add xenbus_device parameter to xenbus_read_driver_state() xen/xenbus: better handle backend crash drivers/net/xen-netfront.c | 34 +++++++++--------- drivers/pci/xen-pcifront.c | 8 ++--- drivers/scsi/xen-scsifront.c | 2 +- drivers/xen/xen-pciback/xenbus.c | 10 +++--- drivers/xen/xenbus/xenbus_client.c | 17 +++++++-- drivers/xen/xenbus/xenbus_probe.c | 42 ++++++++++++++++++++-- drivers/xen/xenbus/xenbus_probe_frontend.c | 2 +- include/xen/xenbus.h | 4 ++- 8 files changed, 84 insertions(+), 35 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 09:52:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 09:52:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235389.1538375 (Exim 4.92) (envelope-from ) id 1vseED-0006o2-HX; Wed, 18 Feb 2026 09:52:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235389.1538375; Wed, 18 Feb 2026 09:52:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vseED-0006nv-Dp; Wed, 18 Feb 2026 09:52:17 +0000 Received: by outflank-mailman (input) for mailman id 1235389; Wed, 18 Feb 2026 09:52:16 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vseEC-0006na-6V for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 09:52:16 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 80498518-0caf-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 10:52:13 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 496CB3E6CC; Wed, 18 Feb 2026 09:52:13 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id D48623EA65; Wed, 18 Feb 2026 09:52:12 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 25S1MsyLlWnqfQAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 09:52:12 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 80498518-0caf-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771408333; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6an1q48KjRbAhbQVvdoHYoaIrt1Vz4lUP6AS4HcAAwE=; b=HwDxVjLb5rzDl98jUuVjANDuW0gyL4FJdreRStmSyureZa5ALvayYjScEEWK1ueAgSPLG2 jNYC5qBwn0mUXSImvJfemPNtD2iXHRxpT8NsXkaDIiLAFbWL3Rn2lg2KJqS46DqXsoWwhM uJJkkR0Y5EEtyMsOifaOGmOjBTifh40= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771408333; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6an1q48KjRbAhbQVvdoHYoaIrt1Vz4lUP6AS4HcAAwE=; b=HwDxVjLb5rzDl98jUuVjANDuW0gyL4FJdreRStmSyureZa5ALvayYjScEEWK1ueAgSPLG2 jNYC5qBwn0mUXSImvJfemPNtD2iXHRxpT8NsXkaDIiLAFbWL3Rn2lg2KJqS46DqXsoWwhM uJJkkR0Y5EEtyMsOifaOGmOjBTifh40= From: Juergen Gross To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org, =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH v2 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() Date: Wed, 18 Feb 2026 10:52:04 +0100 Message-ID: <20260218095205.453657-2-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218095205.453657-1-jgross@suse.com> References: <20260218095205.453657-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Score: -5.80 X-Spam-Level: X-Spamd-Result: default: False [-5.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; TO_DN_SOME(0.00)[]; TAGGED_RCPT(0.00)[netdev]; R_RATELIMIT(0.00)[to_ip_from(RLsote1drt81dzioaq3931x19g)]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO In order to prepare checking the xenbus device status in xenbus_read_driver_state(), add the pointer to struct xenbus_device as a parameter. Signed-off-by: Juergen Gross Tested-by: Marek Marczykowski-Górecki Signed-off-by: Juergen Gross --- V2: - add dev parameter description (kernel test robot) --- drivers/net/xen-netfront.c | 34 +++++++++++----------- drivers/pci/xen-pcifront.c | 8 ++--- drivers/scsi/xen-scsifront.c | 2 +- drivers/xen/xen-pciback/xenbus.c | 10 +++---- drivers/xen/xenbus/xenbus_client.c | 4 ++- drivers/xen/xenbus/xenbus_probe.c | 6 ++-- drivers/xen/xenbus/xenbus_probe_frontend.c | 2 +- include/xen/xenbus.h | 3 +- 8 files changed, 36 insertions(+), 33 deletions(-) diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index 0969d5c9f6b7..2c414b77dd0f 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c @@ -1646,7 +1646,7 @@ static int xennet_xdp_set(struct net_device *dev, struct bpf_prog *prog, /* avoid the race with XDP headroom adjustment */ wait_event(module_wq, - xenbus_read_driver_state(np->xbdev->otherend) == + xenbus_read_driver_state(np->xbdev, np->xbdev->otherend) == XenbusStateReconfigured); np->netfront_xdp_enabled = true; @@ -1764,9 +1764,9 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev) do { xenbus_switch_state(dev, XenbusStateInitialising); err = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) != + xenbus_read_driver_state(dev, dev->otherend) != XenbusStateClosed && - xenbus_read_driver_state(dev->otherend) != + xenbus_read_driver_state(dev, dev->otherend) != XenbusStateUnknown, XENNET_TIMEOUT); } while (!err); @@ -2627,31 +2627,31 @@ static void xennet_bus_close(struct xenbus_device *dev) { int ret; - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) return; do { xenbus_switch_state(dev, XenbusStateClosing); ret = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosing || - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosed || - xenbus_read_driver_state(dev->otherend) == - XenbusStateUnknown, - XENNET_TIMEOUT); + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosing || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosed || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateUnknown, + XENNET_TIMEOUT); } while (!ret); - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) return; do { xenbus_switch_state(dev, XenbusStateClosed); ret = wait_event_timeout(module_wq, - xenbus_read_driver_state(dev->otherend) == - XenbusStateClosed || - xenbus_read_driver_state(dev->otherend) == - XenbusStateUnknown, - XENNET_TIMEOUT); + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateClosed || + xenbus_read_driver_state(dev, dev->otherend) == + XenbusStateUnknown, + XENNET_TIMEOUT); } while (!ret); } diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c index 11636634ae51..cd22bf984024 100644 --- a/drivers/pci/xen-pcifront.c +++ b/drivers/pci/xen-pcifront.c @@ -856,7 +856,7 @@ static void pcifront_try_connect(struct pcifront_device *pdev) int err; /* Only connect once */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitialised) return; @@ -876,7 +876,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) enum xenbus_state prev_state; - prev_state = xenbus_read_driver_state(pdev->xdev->nodename); + prev_state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); if (prev_state >= XenbusStateClosing) goto out; @@ -895,7 +895,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) static void pcifront_attach_devices(struct pcifront_device *pdev) { - if (xenbus_read_driver_state(pdev->xdev->nodename) == + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) == XenbusStateReconfiguring) pcifront_connect(pdev); } @@ -909,7 +909,7 @@ static int pcifront_detach_devices(struct pcifront_device *pdev) struct pci_dev *pci_dev; char str[64]; - state = xenbus_read_driver_state(pdev->xdev->nodename); + state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); if (state == XenbusStateInitialised) { dev_dbg(&pdev->xdev->dev, "Handle skipped connect.\n"); /* We missed Connected and need to initialize. */ diff --git a/drivers/scsi/xen-scsifront.c b/drivers/scsi/xen-scsifront.c index 924025305753..ef74d4da5ab0 100644 --- a/drivers/scsi/xen-scsifront.c +++ b/drivers/scsi/xen-scsifront.c @@ -1175,7 +1175,7 @@ static void scsifront_backend_changed(struct xenbus_device *dev, return; } - if (xenbus_read_driver_state(dev->nodename) == + if (xenbus_read_driver_state(dev, dev->nodename) == XenbusStateInitialised) scsifront_do_lun_hotplug(info, VSCSIFRONT_OP_ADD_LUN); diff --git a/drivers/xen/xen-pciback/xenbus.c b/drivers/xen/xen-pciback/xenbus.c index b11e401f1b1e..4bd1c7a8957e 100644 --- a/drivers/xen/xen-pciback/xenbus.c +++ b/drivers/xen/xen-pciback/xenbus.c @@ -149,12 +149,12 @@ static int xen_pcibk_attach(struct xen_pcibk_device *pdev) mutex_lock(&pdev->dev_lock); /* Make sure we only do this setup once */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitialised) goto out; /* Wait for frontend to state that it has published the configuration */ - if (xenbus_read_driver_state(pdev->xdev->otherend) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->otherend) != XenbusStateInitialised) goto out; @@ -374,7 +374,7 @@ static int xen_pcibk_reconfigure(struct xen_pcibk_device *pdev, dev_dbg(&pdev->xdev->dev, "Reconfiguring device ...\n"); mutex_lock(&pdev->dev_lock); - if (xenbus_read_driver_state(pdev->xdev->nodename) != state) + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != state) goto out; err = xenbus_scanf(XBT_NIL, pdev->xdev->nodename, "num_devs", "%d", @@ -572,7 +572,7 @@ static int xen_pcibk_setup_backend(struct xen_pcibk_device *pdev) /* It's possible we could get the call to setup twice, so make sure * we're not already connected. */ - if (xenbus_read_driver_state(pdev->xdev->nodename) != + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != XenbusStateInitWait) goto out; @@ -662,7 +662,7 @@ static void xen_pcibk_be_watch(struct xenbus_watch *watch, struct xen_pcibk_device *pdev = container_of(watch, struct xen_pcibk_device, be_watch); - switch (xenbus_read_driver_state(pdev->xdev->nodename)) { + switch (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename)) { case XenbusStateInitWait: xen_pcibk_setup_backend(pdev); break; diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c index 2dc874fb5506..e502435145ae 100644 --- a/drivers/xen/xenbus/xenbus_client.c +++ b/drivers/xen/xenbus/xenbus_client.c @@ -931,12 +931,14 @@ static int xenbus_unmap_ring_hvm(struct xenbus_device *dev, void *vaddr) /** * xenbus_read_driver_state - read state from a store path + * @dev: xenbus device pointer * @path: path for driver * * Returns: the state of the driver rooted at the given store path, or * XenbusStateUnknown if no state can be read. */ -enum xenbus_state xenbus_read_driver_state(const char *path) +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, + const char *path) { enum xenbus_state result; int err = xenbus_gather(XBT_NIL, path, "state", "%d", &result, NULL); diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c index 9f9011cd7447..2eed06ba5d38 100644 --- a/drivers/xen/xenbus/xenbus_probe.c +++ b/drivers/xen/xenbus/xenbus_probe.c @@ -191,7 +191,7 @@ void xenbus_otherend_changed(struct xenbus_watch *watch, return; } - state = xenbus_read_driver_state(dev->otherend); + state = xenbus_read_driver_state(dev, dev->otherend); dev_dbg(&dev->dev, "state is %d, (%s), %s, %s\n", state, xenbus_strstate(state), dev->otherend_watch.node, path); @@ -364,7 +364,7 @@ void xenbus_dev_remove(struct device *_dev) * closed. */ if (!drv->allow_rebind || - xenbus_read_driver_state(dev->nodename) == XenbusStateClosing) + xenbus_read_driver_state(dev, dev->nodename) == XenbusStateClosing) xenbus_switch_state(dev, XenbusStateClosed); } EXPORT_SYMBOL_GPL(xenbus_dev_remove); @@ -514,7 +514,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, size_t stringlen; char *tmpstring; - enum xenbus_state state = xenbus_read_driver_state(nodename); + enum xenbus_state state = xenbus_read_driver_state(NULL, nodename); if (state != XenbusStateInitialising) { /* Device is not new, so ignore it. This can happen if a diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c index f04707d1f667..ca04609730df 100644 --- a/drivers/xen/xenbus/xenbus_probe_frontend.c +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c @@ -253,7 +253,7 @@ static int print_device_status(struct device *dev, void *data) } else if (xendev->state < XenbusStateConnected) { enum xenbus_state rstate = XenbusStateUnknown; if (xendev->otherend) - rstate = xenbus_read_driver_state(xendev->otherend); + rstate = xenbus_read_driver_state(xendev, xendev->otherend); pr_warn("Timeout connecting to device: %s (local state %d, remote state %d)\n", xendev->nodename, xendev->state, rstate); } diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h index c94caf852aea..15319da65b7f 100644 --- a/include/xen/xenbus.h +++ b/include/xen/xenbus.h @@ -228,7 +228,8 @@ int xenbus_unmap_ring_vfree(struct xenbus_device *dev, void *vaddr); int xenbus_alloc_evtchn(struct xenbus_device *dev, evtchn_port_t *port); int xenbus_free_evtchn(struct xenbus_device *dev, evtchn_port_t port); -enum xenbus_state xenbus_read_driver_state(const char *path); +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, + const char *path); __printf(3, 4) void xenbus_dev_error(struct xenbus_device *dev, int err, const char *fmt, ...); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 09:52:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 09:52:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235390.1538384 (Exim 4.92) (envelope-from ) id 1vseEG-00073A-NN; Wed, 18 Feb 2026 09:52:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235390.1538384; Wed, 18 Feb 2026 09:52:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vseEG-000731-Ko; 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none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771408338; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Us/u84SsxFMO0tl1d+eBym7mS0CVvhetUanmuDsPoqE=; b=C65Oht9X6FM1TbuBFE3CaVYZlsnmaR9Nss+awa/RYN8fsCAsnGCLQVIy/KV9SrI5PFePYa jRWpttC0vb0wu4IoTttLhb8Wxcy5Zjz7vc/rlEzvuXlqjeX3cRICn1+EL3XjiOS7X0Btnl NYaJKyFJOO1XXlz08F2XDfJfAgaVPUE= From: Juergen Gross To: linux-kernel@vger.kernel.org Cc: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH v2 2/2] xen/xenbus: better handle backend crash Date: Wed, 18 Feb 2026 10:52:05 +0100 Message-ID: <20260218095205.453657-3-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218095205.453657-1-jgross@suse.com> References: <20260218095205.453657-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Score: -7.30 X-Spam-Level: X-Spamd-Result: default: False [-7.30 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_FIVE(0.00)[6]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO When the backend domain crashes, coordinated device cleanup is not possible (as it involves waiting for the backend state change). In that case, toolstack forcefully removes frontend xenstore entries. xenbus_dev_changed() handles this case, and triggers device cleanup. It's possible that toolstack manages to connect new device in that place, before xenbus_dev_changed() notices the old one is missing. If that happens, new one won't be probed and will forever remain in XenbusStateInitialising. Fix this by checking the frontend's state in Xenstore. In case it has been reset to XenbusStateInitialising by Xen tools, consider this being the result of an unplug+plug operation. It's important that cleanup on such unplug doesn't modify Xenstore entries (especially the "state" key) as it belong to the new device to be probed - changing it would derail establishing connection to the new backend (most likely, closing the device before it was even connected). Handle this case by setting new xenbus_device->vanished flag to true, and check it before changing state entry. And even if xenbus_dev_changed() correctly detects the device was forcefully removed, the cleanup handling is still racy. Since this whole handling doesn't happened in a single Xenstore transaction, it's possible that toolstack might put a new device there already. Avoid re-creating the state key (which in the case of loosing the race would actually close newly attached device). The problem does not apply to frontend domain crash, as this case involves coordinated cleanup. Problem originally reported at https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#t, including reproduction steps. Based-on-patch-by: Marek Marczykowski-Górecki Signed-off-by: Juergen Gross Tested-by: Marek Marczykowski-Górecki --- drivers/xen/xenbus/xenbus_client.c | 13 +++++++++-- drivers/xen/xenbus/xenbus_probe.c | 36 ++++++++++++++++++++++++++++++ include/xen/xenbus.h | 1 + 3 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c index e502435145ae..19672b08a680 100644 --- a/drivers/xen/xenbus/xenbus_client.c +++ b/drivers/xen/xenbus/xenbus_client.c @@ -226,8 +226,9 @@ __xenbus_switch_state(struct xenbus_device *dev, struct xenbus_transaction xbt; int current_state; int err, abort; + bool vanished = false; - if (state == dev->state) + if (state == dev->state || dev->vanished) return 0; again: @@ -242,6 +243,10 @@ __xenbus_switch_state(struct xenbus_device *dev, err = xenbus_scanf(xbt, dev->nodename, "state", "%d", ¤t_state); if (err != 1) goto abort; + if (current_state != dev->state && current_state == XenbusStateInitialising) { + vanished = true; + goto abort; + } err = xenbus_printf(xbt, dev->nodename, "state", "%d", state); if (err) { @@ -256,7 +261,7 @@ __xenbus_switch_state(struct xenbus_device *dev, if (err == -EAGAIN && !abort) goto again; xenbus_switch_fatal(dev, depth, err, "ending transaction"); - } else + } else if (!vanished) dev->state = state; return 0; @@ -941,6 +946,10 @@ enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, const char *path) { enum xenbus_state result; + + if (dev && dev->vanished) + return XenbusStateUnknown; + int err = xenbus_gather(XBT_NIL, path, "state", "%d", &result, NULL); if (err) result = XenbusStateUnknown; diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c index 2eed06ba5d38..eb260eceb4d2 100644 --- a/drivers/xen/xenbus/xenbus_probe.c +++ b/drivers/xen/xenbus/xenbus_probe.c @@ -444,6 +444,9 @@ static void xenbus_cleanup_devices(const char *path, struct bus_type *bus) info.dev = NULL; bus_for_each_dev(bus, NULL, &info, cleanup_dev); if (info.dev) { + dev_warn(&info.dev->dev, + "device forcefully removed from xenstore\n"); + info.dev->vanished = true; device_unregister(&info.dev->dev); put_device(&info.dev->dev); } @@ -659,6 +662,39 @@ void xenbus_dev_changed(const char *node, struct xen_bus_type *bus) return; dev = xenbus_device_find(root, &bus->bus); + /* + * Backend domain crash results in not coordinated frontend removal, + * without going through XenbusStateClosing. If this is a new instance + * of the same device Xen tools will have reset the state to + * XenbusStateInitializing. + * It might be that the backend crashed early during the init phase of + * device setup, in which case the known state would have been + * XenbusStateInitializing. So test the backend domid to match the + * saved one. In case the new backend happens to have the same domid as + * the old one, we can just carry on, as there is no inconsistency + * resulting in this case. + */ + if (dev && !strcmp(bus->root, "device")) { + enum xenbus_state state = xenbus_read_driver_state(dev, dev->nodename); + unsigned int backend = xenbus_read_unsigned(root, "backend-id", + dev->otherend_id); + + if (state == XenbusStateInitialising && + (state != dev->state || backend != dev->otherend_id)) { + /* + * State has been reset, assume the old one vanished + * and new one needs to be probed. + */ + dev_warn(&dev->dev, + "state reset occurred, reconnecting\n"); + dev->vanished = true; + } + if (dev->vanished) { + device_unregister(&dev->dev); + put_device(&dev->dev); + dev = NULL; + } + } if (!dev) xenbus_probe_node(bus, type, root); else diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h index 15319da65b7f..8ca15743af7f 100644 --- a/include/xen/xenbus.h +++ b/include/xen/xenbus.h @@ -80,6 +80,7 @@ struct xenbus_device { const char *devicetype; const char *nodename; const char *otherend; + bool vanished; int otherend_id; struct xenbus_watch otherend_watch; struct device dev; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 10:39:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 10:39:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235426.1538410 (Exim 4.92) (envelope-from ) id 1vsexc-0004YO-Dv; Wed, 18 Feb 2026 10:39:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235426.1538410; Wed, 18 Feb 2026 10:39:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsexc-0004YH-Aw; Wed, 18 Feb 2026 10:39:12 +0000 Received: by outflank-mailman (input) for mailman id 1235426; Wed, 18 Feb 2026 10:39:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsexa-0004YB-TO for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 10:39:10 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0ecf01c5-0cb6-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 11:39:09 +0100 (CET) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-435a11957f6so4323464f8f.0 for ; Wed, 18 Feb 2026 02:39:09 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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>> It is needed for allocate_memory() for guest domains, so it is expected >> to be compile-time constant with the current code of common dom0less >> approach. >> >> It represents the start of RAM address for DomU and the maximum RAM size >> (the actual size will be calculated based on what is mentioned in DomU node >> in dts) and then will be used to generate memory node for DomU (GUEST_RAM0_BASE >> as RAM start address and min(GUEST_RAM0_SIZE, dts->domU->memory->size) as a >> RAM size). >> >>> And >>> if so, why would guests be limited to just 2 Gb? >> It is enough for guest domain I am using in dom0less mode. > And what others may want to use RISC-V for once it actually becomes usable > isn't relevant? As you start adding things to the public headers, you will > need to understand that you can't change easily what once was put there. > Everything there is part of the ABI, and the ABI needs to remain stable > (within certain limits). Considering this ... > >>> That may more efficiently >>> be RV32 guests then, with perhaps just an RV32 hypervisor. >> I didn't get this point. Could you please explain differently what do you >> mean? > If all you want are 2Gb guests, why would such guests be 64-bit? And with > (iirc) RV32 permitting more than 4Gb (via PPN being 22 bits wide), perhaps > even a 32-bit hypervisor would suffice? ... now I can agree that Xen should permit bigger amount of RAM. At least, (2^34-1) should be allowed for RV32 and so for RV64 so it could be used like a base for both of them. As RV64 allows (2^56 - 1) it makes sense to add another bank to cover range from 2^34 to (2^56 -1) for RV64 (and ifdef this second bank for RV64). Would it be better? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 18 10:46:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 10:46:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235435.1538420 (Exim 4.92) (envelope-from ) id 1vsf4F-00066U-2j; Wed, 18 Feb 2026 10:46:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235435.1538420; Wed, 18 Feb 2026 10:46:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsf4F-00066N-08; Wed, 18 Feb 2026 10:46:03 +0000 Received: by outflank-mailman (input) for mailman id 1235435; Wed, 18 Feb 2026 10:46:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsf4D-00065y-VC for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 10:46:01 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ffb86221-0cb6-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 11:45:54 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4837907f535so37533635e9.3 for ; Wed, 18 Feb 2026 02:45:54 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 18 Feb 2026 02:45:53 -0800 (PST) Message-ID: <82c65bab-f9a1-497a-a16d-79b29c4d4045@suse.com> Date: Wed, 18 Feb 2026 11:45:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 6/6] xen/riscv: enable DOMAIN_BUILD_HELPERS To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <6ab04f3584e45795dc82c25f62a6c950913f5c7d.1770821989.git.oleksii.kurochko@gmail.com> <760d7b95-2e76-453c-8d13-ca4432eb22e5@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <760d7b95-2e76-453c-8d13-ca4432eb22e5@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 11:39, Oleksii Kurochko wrote: > > On 2/13/26 2:11 PM, Jan Beulich wrote: >> On 13.02.2026 13:54, Oleksii Kurochko wrote: >>> On 2/12/26 5:39 PM, Jan Beulich wrote: >>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>>>> --- a/xen/include/public/arch-riscv.h >>>>> +++ b/xen/include/public/arch-riscv.h >>>>> @@ -50,6 +50,14 @@ typedef uint64_t xen_ulong_t; >>>>> >>>>> #if defined(__XEN__) || defined(__XEN_TOOLS__) >>>>> >>>>> +#define GUEST_RAM_BANKS 1 >>>>> + >>>>> +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ >>>>> +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) >>>>> + >>>>> +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } >>>>> +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } >>>> Hmm, does RISC-V really want to go with compile-time constants here? >>> It is needed for allocate_memory() for guest domains, so it is expected >>> to be compile-time constant with the current code of common dom0less >>> approach. >>> >>> It represents the start of RAM address for DomU and the maximum RAM size >>> (the actual size will be calculated based on what is mentioned in DomU node >>> in dts) and then will be used to generate memory node for DomU (GUEST_RAM0_BASE >>> as RAM start address and min(GUEST_RAM0_SIZE, dts->domU->memory->size) as a >>> RAM size). >>> >>>> And >>>> if so, why would guests be limited to just 2 Gb? >>> It is enough for guest domain I am using in dom0less mode. >> And what others may want to use RISC-V for once it actually becomes usable >> isn't relevant? As you start adding things to the public headers, you will >> need to understand that you can't change easily what once was put there. >> Everything there is part of the ABI, and the ABI needs to remain stable >> (within certain limits). > > Considering this ... > >>>> That may more efficiently >>>> be RV32 guests then, with perhaps just an RV32 hypervisor. >>> I didn't get this point. Could you please explain differently what do you >>> mean? >> If all you want are 2Gb guests, why would such guests be 64-bit? And with >> (iirc) RV32 permitting more than 4Gb (via PPN being 22 bits wide), perhaps >> even a 32-bit hypervisor would suffice? > > ... now I can agree that Xen should permit bigger amount of RAM. At least, > (2^34-1) should be allowed for RV32 and so for RV64 so it could be used > like a base for both of them. As RV64 allows (2^56 - 1) it makes sense > to add another bank to cover range from 2^34 to (2^56 -1) for RV64 (and ifdef > this second bank for RV64). > > Would it be better? Having a 2nd bank right away for RV64 would seem better to me, yes. Whether that means going all the way up to 2^56 I don't know. In whether a public header can be changed, it also matters whether these #define-s actually are meant to be exposed to guests (vs. merely the tool stack). Longer-term, however, this is going to change (as we intend to move to a fully stable ABI). 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Wed, 18 Feb 2026 03:30:03 -0800 (PST) MIME-Version: 1.0 References: <6eee1cbcbfc221b0a6af00f7ec5ccc52f8bd5b75.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <6eee1cbcbfc221b0a6af00f7ec5ccc52f8bd5b75.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 18 Feb 2026 13:30:00 +0200 X-Gm-Features: AaiRm52xyBeRm91RyPK0I2h_h6RAGSKr83z1z4zK6_QrSWXpdscmc0pKtt9OcXo Message-ID: Subject: Re: [RFC PATCH 13/19] arm/gic: VPE scheduling To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > GICv4 needs to know which VCPU is currently scheduled to be able to > deliver VLPIs. Implement switching of VPEs on VCPU context switch by > extending the existing save/restore mechanism used for GICv2 and GICv3. > > Scheduling a VPE is done by setting up the VPENDBASER and VPROPBASER > registers to the appropriate tables for the currently running VCPU. When > scheduling out, preserve the IDAI and PendingLast bits from VPENDBASER. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v2.c | 2 +- > xen/arch/arm/gic-v3.c | 9 +- > xen/arch/arm/gic-v4-its.c | 138 +++++++++++++++++++++++++ > xen/arch/arm/gic-vgic.c | 6 ++ > xen/arch/arm/include/asm/gic.h | 2 +- > xen/arch/arm/include/asm/gic_v3_defs.h | 6 ++ > xen/arch/arm/include/asm/gic_v4_its.h | 9 ++ > xen/arch/arm/include/asm/vgic.h | 2 + > 8 files changed, 170 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > index 0cd41eac12..c16fa5d67e 100644 > --- a/xen/arch/arm/gic-v2.c > +++ b/xen/arch/arm/gic-v2.c > @@ -181,7 +181,7 @@ static void gicv2_save_state(struct vcpu *v) > writel_gich(0, GICH_HCR); > } > > -static void gicv2_restore_state(const struct vcpu *v) > +static void gicv2_restore_state(struct vcpu *v) > { > int i; > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index d4af332b0e..07736179db 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -133,7 +133,7 @@ bool gic_is_gicv4(void) > #endif > > /* per-cpu re-distributor base */ > -static DEFINE_PER_CPU(void __iomem*, rbase); > +DEFINE_PER_CPU(void __iomem*, rbase); > > #define GICD (gicv3.map_dbase) > #define GICD_RDIST_BASE (this_cpu(rbase)) > @@ -475,13 +475,15 @@ static void gicv3_save_state(struct vcpu *v) > * are now visible to the system register interface > */ > dsb(sy); > + if ( gic_is_gicv4() ) > + vgic_v4_put(v, false); > gicv3_save_lrs(v); > save_aprn_regs(&v->arch.gic); > v->arch.gic.v3.vmcr =3D READ_SYSREG(ICH_VMCR_EL2); > v->arch.gic.v3.sre_el1 =3D READ_SYSREG(ICC_SRE_EL1); > } > > -static void gicv3_restore_state(const struct vcpu *v) > +static void gicv3_restore_state(struct vcpu *v) > { > register_t val; > > @@ -510,6 +512,9 @@ static void gicv3_restore_state(const struct vcpu *v) > restore_aprn_regs(&v->arch.gic); > gicv3_restore_lrs(v); > > + if ( gic_is_gicv4() ) > + vgic_v4_load(v); > + > /* > * Make sure all stores are visible the GIC > */ > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > index fac3b44a94..6a550a65b2 100644 > --- a/xen/arch/arm/gic-v4-its.c > +++ b/xen/arch/arm/gic-v4-its.c > @@ -18,6 +18,7 @@ > * GNU General Public License for more details. > */ > > +#include > #include > #include > #include > @@ -44,6 +45,21 @@ void __init gicv4_its_vpeid_allocator_init(void) > panic("Could not allocate VPEID bitmap space\n"); > } > > +static void __iomem *gic_data_rdist_vlpi_base(unsigned int cpu) > +{ > + /* > + * Each Redistributor defines two 64KB frames in the physical addres= s map. > + * In GICv4, there are two additional 64KB frames. > + * The frames for each Redistributor must be contiguous and must be > + * ordered as follows: > + * 1. RD_base > + * 2. SGI_base > + * 3. VLPI_base > + * 4. Reserved > + */ > + return GICD_RDIST_BASE_CPU(cpu) + SZ_128K; > +} > + > static int __init its_alloc_vpeid(struct its_vpe *vpe) > { > int id; > @@ -571,3 +587,125 @@ int its_send_cmd_vinv(struct host_its *its, struct = its_device *dev, > > return gicv3_its_wait_commands(its); > } > + > +static uint64_t read_vpend_dirty_clean(void __iomem *vlpi_base, > + unsigned int count) > +{ > + uint64_t val; > + bool clean; > + > + do { > + val =3D gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); > + /* Poll GICR_VPENDBASER.Dirty until it reads 0. */ > + clean =3D !(val & GICR_VPENDBASER_Dirty); > + if ( !clean ) > + { > + count--; > + cpu_relax(); > + udelay(1); > + } > + } while ( !clean && count ); > + > + if ( !clean ) > + { > + printk(XENLOG_WARNING "ITS virtual pending table not totally par= sed\n"); > + val |=3D GICR_VPENDBASER_PendingLast; > + } > + > + return val; > +} > + > +/* > + * When a vPE is made resident, the GIC starts parsing the virtual pendi= ng > + * table to deliver pending interrupts. This takes place asynchronously, > + * and can at times take a long while. > + */ > +static void its_wait_vpt_parse_complete(void __iomem *vlpi_base) > +{ > + if ( !gic_support_vptValidDirty() ) > + return; > + > + read_vpend_dirty_clean(vlpi_base, 500); > +} > + > +static uint64_t its_clear_vpend_valid(void __iomem *vlpi_base, uint64_t = clr, > + uint64_t set) > +{ > + unsigned int count =3D 1000000; /* 1s! */ The 1s timeout looks too large for a context=E2=80=91switch path. Consider a much smaller bound (or async handling) and warn on timeout, rather than potentially stalling the scheduler. > + uint64_t val; > + > + /* > + * Clearing the Valid bit informs the Redistributor that a context > + * switch is taking place. > + */ > + val =3D gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); > + val &=3D ~GICR_VPENDBASER_Valid; > + val &=3D ~clr; > + val |=3D set; > + gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); > + > + return read_vpend_dirty_clean(vlpi_base, count); > +} > + > +static void its_make_vpe_resident(struct its_vpe *vpe, unsigned int cpu) > +{ > + void __iomem *vlpi_base =3D gic_data_rdist_vlpi_base(cpu); > + uint64_t val; > + > + /* Switch in this VM's virtual property table. */ > + val =3D virt_to_maddr(vpe->its_vm->vproptable) & GENMASK(51, 12); > + val |=3D gicv3_its_get_cacheability() << GICR_VPROPBASER_INNER_CACHE= ABILITY_SHIFT; > + val |=3D gicv3_its_get_shareability() << GICR_VPROPBASER_SHAREABILIT= Y_SHIFT; > + val |=3D GIC_BASER_CACHE_SameAsInner << GICR_VPROPBASER_OUTER_CACHEA= BILITY_SHIFT; Nit: cacheability/shareability are taken from a global ITS quirk. If different ITSes can report different attributes, we would need per=E2=80=91ITS values here. Otherwise, a short note that Xen assumes homogeneous ITS attributes would help. > + val |=3D (HOST_LPIS_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; > + gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); The VPROPBASER value is constant per VM. We could precompute and store it in struct its_vm at init, then just write the cached value here instead of recomputing each time. > + > + /* Switch in this VCPU's VPT. */ > + val =3D virt_to_maddr(vpe->vpendtable) & GENMASK(51, 16); > + val |=3D gicv3_its_get_cacheability() << GICR_VPENDBASER_INNER_CACHE= ABILITY_SHIFT; > + val |=3D gicv3_its_get_shareability() << GICR_VPENDBASER_SHAREABILIT= Y_SHIFT; > + val |=3D GIC_BASER_CACHE_SameAsInner << GICR_VPENDBASER_OUTER_CACHEA= BILITY_SHIFT; > + /* > + * When the GICR_VPENDBASER.Valid bit is written from 0 to 1, > + * this bit is RES1. > + */ > + val |=3D GICR_VPENDBASER_PendingLast; > + val |=3D vpe->idai ? GICR_VPENDBASER_IDAI : 0; > + val |=3D GICR_VPENDBASER_Valid; > + gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); > + > + its_wait_vpt_parse_complete(vlpi_base); > +} > + > +static void its_make_vpe_non_resident(struct its_vpe *vpe, unsigned int = cpu) > +{ > + void __iomem *vlpi_base =3D gic_data_rdist_vlpi_base(cpu); > + uint64_t val; > + > + val =3D its_clear_vpend_valid(vlpi_base, 0, 0); > + vpe->idai =3D val & GICR_VPENDBASER_IDAI; > + vpe->pending_last =3D val & GICR_VPENDBASER_PendingLast; > +} > + > +void vgic_v4_load(struct vcpu *vcpu) > +{ > + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; > + > + > + if ( vpe->resident ) gicv3_restore_state() call vgic_v4_load when gic_is_gicv4() is true, even if its_vpe is NULL. The same story about vgic_v4_put. > + return; > + > + its_make_vpe_resident(vpe, vcpu->processor); > + vpe->resident =3D true; > +} > + > +void vgic_v4_put(struct vcpu *vcpu, bool need_db) nit: unused need_db > +{ > + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; > + > + if ( !vpe->resident ) > + return; > + > + its_make_vpe_non_resident(vpe, vcpu->processor); > + vpe->resident =3D false; > +} > diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c > index ea48c5375a..44db142dbd 100644 > --- a/xen/arch/arm/gic-vgic.c > +++ b/xen/arch/arm/gic-vgic.c > @@ -377,6 +377,12 @@ int vgic_vcpu_pending_irq(struct vcpu *v) > } > } > > +#ifdef CONFIG_GICV4 > + if ( gic_is_gicv4() ) > + if ( v->arch.vgic.its_vpe->pending_last ) Should we check its_vpe too? > + rc =3D 1; > +#endif > + > out: > spin_unlock_irqrestore(&v->arch.vgic.lock, flags); > return rc; > diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gi= c.h > index afb1cc3751..04a20bdca5 100644 > --- a/xen/arch/arm/include/asm/gic.h > +++ b/xen/arch/arm/include/asm/gic.h > @@ -362,7 +362,7 @@ struct gic_hw_operations { > /* Save GIC registers */ > void (*save_state)(struct vcpu *v); > /* Restore GIC registers */ > - void (*restore_state)(const struct vcpu *v); > + void (*restore_state)(struct vcpu *v); > /* Dump GIC LR register information */ > void (*dump_state)(const struct vcpu *v); > > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/includ= e/asm/gic_v3_defs.h > index 3a7d18ef59..0db75309cf 100644 > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > @@ -257,6 +257,12 @@ struct rdist_region { > bool single_rdist; > }; > > +/* per-cpu re-distributor base */ > +DECLARE_PER_CPU(void __iomem*, rbase); > + > +#define GICD_RDIST_BASE (this_cpu(rbase)) looks like possible macro redefinition, see gic-v3.c Best regards, Mykola > +#define GICD_RDIST_BASE_CPU(cpu) (per_cpu(rbase, cpu)) > + > #endif /* __ASM_ARM_GIC_V3_DEFS_H__ */ > > /* > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > index ba81b25bde..37b6b92f0c 100644 > --- a/xen/arch/arm/include/asm/gic_v4_its.h > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -56,6 +56,15 @@ void gicv4_its_vpeid_allocator_init(void); > #define GICR_VPROPBASER 0x0070 > #define GICR_VPENDBASER 0x0078 > > +#define GICR_VPROPBASER_OUTER_CACHEABILITY_SHIFT 56 > +#define GICR_VPROPBASER_SHAREABILITY_SHIFT 10 > +#define GICR_VPROPBASER_SHAREABILITY_MASK \ > + (3UL << GICR_VPROPBASER_SHAREABILITY_SHIFT) > +#define GICR_VPROPBASER_INNER_CACHEABILITY_SHIFT 7 > +#define GICR_VPROPBASER_INNER_CACHEABILITY_MASK \ > + (7UL << GICR_VPROPBASER_INNER_CACHEABILITY_SHIFT) > +#define GICR_VPROPBASER_IDBITS_MASK 0x1f > + > #define GICR_VPENDBASER_Dirty (1UL << 60) > #define GICR_VPENDBASER_PendingLast (1UL << 61) > #define GICR_VPENDBASER_IDAI (1UL << 62) > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index 580310fec4..9ef667decb 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -417,6 +417,8 @@ bool gic_is_gicv4(void); > int vgic_v4_its_vm_init(struct domain *d); > void vgic_v4_free_its_vm(struct domain *d); > int vgic_v4_its_vpe_init(struct vcpu *vcpu); > +void vgic_v4_load(struct vcpu *vcpu); > +void vgic_v4_put(struct vcpu *vcpu, bool need_db); > #endif /* !CONFIG_NEW_VGIC */ > > /*** Common VGIC functions used by Xen arch code ****/ > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 11:31:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 11:31:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235469.1538440 (Exim 4.92) (envelope-from ) id 1vsflo-0004KF-Gg; Wed, 18 Feb 2026 11:31:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235469.1538440; Wed, 18 Feb 2026 11:31:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsflo-0004K8-DI; Wed, 18 Feb 2026 11:31:04 +0000 Received: by outflank-mailman (input) for mailman id 1235469; Wed, 18 Feb 2026 11:31:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsfln-0003bf-5d for xen-devel@lists.xenproject.org; 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Is it a real extension, or just something that happens to work? > Misra C:2012 rule 20.6 disallows this altogether, > though. Use helper always-inline functions instead. > > In sh_audit_l1_table(), along with reducing the scope of "gfn", which now > isn't used anymore by the if() side of the conditional, also reduce the > scope of two other adjacent variables. > > For audit_magic() note that both which parameters are needed and what > their types are is attributed to AUDIT_FAIL() accessing variables which > aren't passed as arguments to it. This is grammatically awkward.  IMO it would be clearer to say "For audit_magic() note that there are more parameters than might seem necessary, caused by the expectations of AUDIT_FAIL()."  > > No functional change intended. Of course codegen does change with this, > first and foremost in register allocation. > > Reported-by: Andrew Cooper > Signed-off-by: Jan Beulich Definitely a more surgical fix than my approach. I was attempting to turn FOREACH_*() into real for() loops behind the scenes, so we don't have the {code} as a parameter, and get real break's rather than magic behaviour with the _done variable.  The problem is that ever helper is different, and there's rather more hidden under the covers than appear at first glance. I'd still like to make this approach work in due course, for the ease of following the logic if nothing else, but its hard enough to not be a couple of hours work, and not high enough on my priority list right now. > --- > Leaving even the fetching of current to the helper in > sh_rm_write_access_from_l1() looks tidier to me overall, albeit this means > the fetch will now occur once per present L1E. This will not make a dent in the performance of the shadow code. > Converting the #if to if() and #ifdef to if(IS_ENABLED()) wouldn't work > here, as identifiers are used which aren't available when the respective > conditions are false. Personally, I'd have put this in the main commit message, because it's the justification for why out-of-line static inline's need to be used. > > Note that I tested this only on top of > https://lists.xen.org/archives/html/xen-devel/2023-05/msg01140.html, but I > have no reason to assume that there is a problematic interaction. Of > course it would be really nice if the rest of that series finally could go > in. > > --- a/xen/arch/x86/mm/shadow/multi.c > +++ b/xen/arch/x86/mm/shadow/multi.c > @@ -395,7 +395,7 @@ static inline mfn_t cf_check sh_next_pag > shadow_set_l2e(d, sl2e, new_sl2e, sl2mfn, SH_type_fl1_shadow, sh_next_page) > > static inline u32 > -guest_index(void *ptr) > +guest_index(const void *ptr) > { > return (u32)((unsigned long)ptr & ~PAGE_MASK) / sizeof(guest_l1e_t); > } While fine per say, this doesn't appear to be related to the patch? Everything else looks fine. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 18 11:31:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 11:31:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235474.1538451 (Exim 4.92) (envelope-from ) id 1vsfmA-0004lF-NR; Wed, 18 Feb 2026 11:31:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235474.1538451; Wed, 18 Feb 2026 11:31:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsfmA-0004l8-Ki; Wed, 18 Feb 2026 11:31:26 +0000 Received: by outflank-mailman (input) for mailman id 1235474; Wed, 18 Feb 2026 11:31:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsfm9-00046b-9i for xen-devel@lists.xenproject.org; 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Wed, 18 Feb 2026 03:31:22 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Wed, 18 Feb 2026 13:30:00 +0200 X-Gm-Features: AaiRm51Fr3YTyjMCneA3a-mdmhwduL52fJf_BXgXYD2zkSB0SaQyfD3EZGcDbsE Message-ID: Subject: Re: [RFC PATCH 12/19] arm/gic: Add VPENDBASER/VPROPBASER accessors To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Mykyta, Thank you for the patch! On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Implement accessors for GICv4 registers VPENDBASER and VPROPBASER. > VPENDBASER access needs special handling to clear the Valid bit before > writing a new value. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/include/asm/gic_v4_its.h | 38 +++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > index fb0ef37bbe..ba81b25bde 100644 > --- a/xen/arch/arm/include/asm/gic_v4_its.h > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -17,6 +17,8 @@ > * along with this program; If not, see . > */ > > +#include > + > #ifndef __ASM_ARM_GICV4_ITS_H__ > #define __ASM_ARM_GICV4_ITS_H__ > > @@ -50,6 +52,42 @@ struct event_vlpi_map { > }; > > void gicv4_its_vpeid_allocator_init(void); > + > +#define GICR_VPROPBASER 0x0070 > +#define GICR_VPENDBASER 0x0078 > + > +#define GICR_VPENDBASER_Dirty (1UL << 60) > +#define GICR_VPENDBASER_PendingLast (1UL << 61) > +#define GICR_VPENDBASER_IDAI (1UL << 62) > +#define GICR_VPENDBASER_Valid (1UL << 63) > + > +#define GICR_VPENDBASER_OUTER_CACHEABILITY_SHIFT 56 > +#define GICR_VPENDBASER_SHAREABILITY_SHIFT 10 > +#define GICR_VPENDBASER_INNER_CACHEABILITY_SHIFT 7 > + > +#define gits_read_vpropbaser(c) readq_relaxed(c) > +#define gits_write_vpropbaser(v, c) {writeq_relaxed(v, c);} > + > +/* > + * GICR_VPENDBASER - the Valid bit must be cleared before changing > + * anything else. > + */ > +static inline void gits_write_vpendbaser(uint64_t val, void __iomem *add= r) > +{ > + uint64_t tmp; > + > + tmp =3D readq_relaxed(addr); > + while ( tmp & GICR_VPENDBASER_Valid ) The loop clearing GICR_VPENDBASER_Valid has no timeout. If the bit never clears, we can spin forever. Please add a bounded retry (and warn on timeout), similar to other polling paths. Best regards, Mykola > + { > + tmp &=3D ~GICR_VPENDBASER_Valid; > + writeq_relaxed(tmp, addr); > + tmp =3D readq_relaxed(addr); > + } > + > + writeq_relaxed(val, addr); > +} > +#define gits_read_vpendbaser(c) readq_relaxed(c) > + > #endif > > /* > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 11:31:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 11:31:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235481.1538461 (Exim 4.92) (envelope-from ) id 1vsfmR-00058t-Uo; Wed, 18 Feb 2026 11:31:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235481.1538461; Wed, 18 Feb 2026 11:31:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsfmR-00058m-Rj; Wed, 18 Feb 2026 11:31:43 +0000 Received: by outflank-mailman (input) for mailman id 1235481; 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Wed, 18 Feb 2026 03:31:39 -0800 (PST) MIME-Version: 1.0 References: <1e37aecc73c38669c1f3d41a4a829a5a5b54f836.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <1e37aecc73c38669c1f3d41a4a829a5a5b54f836.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 18 Feb 2026 13:30:00 +0200 X-Gm-Features: AaiRm50UDIzBfUaeIoVD_xNuZeWBgCal9aDMFO_taxs3XLr73HLJazNwofz0cB4 Message-ID: Subject: Re: [RFC PATCH 11/19] arm/its: Add ITS VM and VPE allocation/teardown To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Mykyta, Thank you for the patch! On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Do necessary allocations for GICv4 VLPI injection. > When creating a domain allocate its_vm and property tables. > For each VCPU allocate a VPe with a unique vpe id and separate pending ta= ble. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 157 ++++++++++++---- > xen/arch/arm/gic-v3-lpi.c | 61 +++++- > xen/arch/arm/gic-v3.c | 18 ++ > xen/arch/arm/gic-v4-its.c | 259 ++++++++++++++++++++++++++ > xen/arch/arm/include/asm/gic_v3_its.h | 17 ++ > xen/arch/arm/include/asm/gic_v4_its.h | 1 + > xen/arch/arm/include/asm/vgic.h | 3 + > xen/arch/arm/vgic.c | 25 ++- > 8 files changed, 496 insertions(+), 45 deletions(-) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index 2328595a85..fb1d2709be 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -31,6 +31,8 @@ > LIST_HEAD(host_its_list); > > > +unsigned int nvpeid =3D 16; > + > /* > * It is unlikely that a platform implements ITSes with different quirks= , > * so assume they all share the same. > @@ -228,7 +230,7 @@ int gicv3_its_wait_commands(struct host_its *hw_its) > return -ETIMEDOUT; > } > > -static uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, > +uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, > uint64_t reg) > { > reg &=3D ~GENMASK(51, 16); > @@ -443,6 +445,54 @@ struct its_baser *its_get_baser(struct host_its *hw_= its, uint32_t type) > return NULL; > } > > +bool its_alloc_table_entry(struct its_baser *baser, uint32_t id) > +{ > + uint64_t reg =3D baser->val; > + bool indirect =3D reg & GITS_BASER_INDIRECT; > + unsigned int idx; > + __le64 *table; > + unsigned int entry_size =3D GITS_BASER_ENTRY_SIZE(reg); > + > + /* Don't allow id that exceeds single, flat table limit */ > + if ( !indirect ) > + return (id < (baser->table_size / entry_size)); > + > + /* Compute 1st level table index & check if that exceeds table limit= */ > + idx =3D id / (baser->pagesz / entry_size); > + if ( idx >=3D (baser->pagesz / GITS_LVL1_ENTRY_SIZE) ) > + return false; > + > + table =3D baser->base; > + > + /* Allocate memory for 2nd level table */ > + if (!table[idx]) > + { > + unsigned int page_size =3D baser->pagesz; > + void *buffer; > + > + buffer =3D alloc_xenheap_pages(get_order_from_bytes(page_size), > + gicv3_its_get_memflags()); > + if ( !buffer ) > + return -ENOMEM; returns -ENOMEM from a bool function, so OOM looks like success. --- does not zero the new L2 table before publishing it. See, Arm IHI 0069H.b, 5.2.1 The ITS tables: Behavior is UNPREDICTABLE if: - Memory that is used for the level 2 tables does not contain zeros at the time of the new allocation for use by the ITS. --- The L2 tables allocated here are never freed. If this is intended as =E2=80=9Callocate once for ITS lifetime=E2=80=9D, please add a = short comment stating that, to avoid the appearance of a leak. > + > + /* Flush Lvl2 table to PoC if hw doesn't support coherency */ > + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) > + clean_and_invalidate_dcache_va_range(buffer, page_size); > + > + table[idx] =3D cpu_to_le64(virt_to_maddr(buffer) | GITS_VALID_BI= T); Before writing virt_to_maddr(buffer) into the L1 entry, should we validate that the physical address is encodable? > + > + /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ > + if ( gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC ) > + clean_and_invalidate_dcache_va_range(table + idx, > + GITS_LVL1_ENTRY_SIZE); > + > + /* Ensure updated table contents are visible to ITS hardware */ > + dsb(sy); > + } > + > + return true; > +} > + > static int its_map_baser(void __iomem *basereg, uint64_t regc, > unsigned int nr_items, struct its_baser *baser) > { > @@ -737,13 +787,75 @@ static int gicv3_its_map_host_events(struct host_it= s *its, > return ret; > } > > - /* TODO: Consider using INVALL here. Didn't work on the model, thoug= h. */ > + return 0; > +} > + > +static bool its_alloc_device_table(struct host_its *hw_its, uint32_t dev= _id) > +{ > + struct its_baser *baser; > + > + baser =3D its_get_baser(hw_its, GITS_BASER_TYPE_DEVICE); > + if ( !baser ) > + return false; > + > + return its_alloc_table_entry(baser, dev_id); > +} > + > +struct its_device *its_create_device(struct host_its *hw_its, > + uint32_t host_devid, uint64_t nr_ev= ents) > +{ > + void *itt_addr =3D NULL; > + struct its_device *dev =3D NULL; > + int ret; > + > + /* Sanitise the provided hardware values against the host ITS. */ > + if ( host_devid >=3D BIT(hw_its->devid_bits, UL) ) > + return NULL; > + > + dev =3D xzalloc(struct its_device); > + if ( !dev ) > + return NULL; > + > + /* An Interrupt Translation Table needs to be 256-byte aligned. */ > + dev->itt_order =3D get_order_from_bytes(nr_events * hw_its->itte_siz= e); > + itt_addr =3D alloc_xenheap_pages(dev->itt_order, gicv3_its_get_memfl= ags()); > + if ( !itt_addr ) > + goto fail_dev; > + > + clean_and_invalidate_dcache_va_range(itt_addr, > + nr_events * hw_its->itte_size); clean_and_invalidate_dcache_va_range() is unconditional. Should this be guarded by gicv3_its_get_cacheability() <=3D GIC_BASER_CACHE_nC as in other paths? It avoids a redundant flush on coherent systems. > + > > - ret =3D its_send_cmd_sync(its, 0); > + if ( !its_alloc_device_table(hw_its, host_devid) ) > + goto fail_itt; > + > + ret =3D its_send_cmd_mapd(hw_its, host_devid, max(fls(nr_events - 1)= , 1U), > + virt_to_maddr(itt_addr), true); > if ( ret ) > - return ret; > + goto fail_itt; > > - return gicv3_its_wait_commands(its); > + dev->itt_addr =3D itt_addr; > + dev->hw_its =3D hw_its; > + dev->host_devid =3D host_devid; > + dev->eventids =3D nr_events; > + > + return dev; > + > +fail_itt: > + free_xenheap_pages(itt_addr, dev->itt_order); > +fail_dev: > + xfree(dev); > + > + return NULL; > +} > + > +static void its_free_device(struct its_device *dev) > +{ > + xfree(dev->host_lpi_blocks); does not release host LPI blocks via gicv3_free_host_lpi_block(). > + xfree(dev->itt_addr); uses xfree() for itt_addr, but it comes from alloc_xenheap_pages(). > + if ( dev->pend_irqs ) nit: xfree checks if the provided pointer is equal to NULL > + xfree(dev->pend_irqs); > + xfree(dev); > } > > /* > @@ -758,12 +870,10 @@ int gicv3_its_map_guest_device(struct domain *d, > paddr_t guest_doorbell, uint32_t guest_de= vid, > uint64_t nr_events, bool valid) > { > - void *itt_addr =3D NULL; > struct host_its *hw_its; > struct its_device *dev =3D NULL; > struct rb_node **new =3D &d->arch.vgic.its_devices.rb_node, *parent = =3D NULL; > int i, ret =3D -ENOENT; /* "i" must be signed to check for >=3D= 0 below. */ > - unsigned int order; > > hw_its =3D gicv3_its_find_by_doorbell(host_doorbell); > if ( !hw_its ) > @@ -823,23 +933,12 @@ int gicv3_its_map_guest_device(struct domain *d, > if ( !valid ) > goto out_unlock; > > - ret =3D -ENOMEM; > - > - /* An Interrupt Translation Table needs to be 256-byte aligned. */ > - order =3D get_order_from_bytes(max(nr_events * hw_its->itte_size, 25= 6UL)); > - itt_addr =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); > - if ( !itt_addr ) > - goto out_unlock; > - > - memset(itt_addr, 0, PAGE_SIZE << order); > - > - clean_and_invalidate_dcache_va_range(itt_addr, > - nr_events * hw_its->itte_size); > - > - dev =3D xzalloc(struct its_device); > + dev =3D its_create_device(hw_its, host_devid, nr_events); > if ( !dev ) > goto out_unlock; > > + ret =3D -ENOMEM; > + > /* > * Allocate the pending_irqs for each virtual LPI. They will be put > * into the domain's radix tree upon the guest's MAPTI command. > @@ -860,14 +959,6 @@ int gicv3_its_map_guest_device(struct domain *d, > if ( !dev->host_lpi_blocks ) > goto out_unlock; > > - ret =3D its_send_cmd_mapd(hw_its, host_devid, fls(nr_events - 1), > - virt_to_maddr(itt_addr), true); > - if ( ret ) > - goto out_unlock; > - > - dev->itt_addr =3D itt_addr; > - dev->itt_order =3D order; > - dev->hw_its =3D hw_its; > dev->guest_doorbell =3D guest_doorbell; > dev->guest_devid =3D guest_devid; > dev->host_devid =3D host_devid; > @@ -920,13 +1011,7 @@ out_unlock: > > out: > if ( dev ) > - { > - xfree(dev->pend_irqs); > - xfree(dev->host_lpi_blocks); > - } > - if ( itt_addr ) > - free_xenheap_pages(itt_addr, order); > - xfree(dev); > + its_free_device(dev); > > return ret; > } > diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c > index c029d5d7a4..3c2649b695 100644 > --- a/xen/arch/arm/gic-v3-lpi.c > +++ b/xen/arch/arm/gic-v3-lpi.c > @@ -58,6 +58,7 @@ static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redis= t); > > #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) > #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) > +uint32_t lpi_id_bits; > > static union host_lpi *gic_get_host_lpi(uint32_t plpi) > { > @@ -202,14 +203,11 @@ void gicv3_lpi_update_host_entry(uint32_t host_lpi,= int domain_id, > write_u64_atomic(&hlpip->data, hlpi.data); > } > > -static int gicv3_lpi_allocate_pendtable(unsigned int cpu) > +struct page_info *lpi_allocate_pendtable(void) > { > void *pendtable; > unsigned int order; > > - if ( per_cpu(lpi_redist, cpu).pending_table ) > - return -EBUSY; > - > /* > * The pending table holds one bit per LPI and even covers bits for > * interrupt IDs below 8192, so we allocate the full range. > @@ -219,20 +217,34 @@ static int gicv3_lpi_allocate_pendtable(unsigned in= t cpu) > order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (u= nsigned long)SZ_64K)); > pendtable =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); > if ( !pendtable ) > - return -ENOMEM; > + return NULL; > > memset(pendtable, 0, PAGE_SIZE << order); > /* Make sure the physical address can be encoded in the register. */ > if ( virt_to_maddr(pendtable) & ~GENMASK(51, 16) ) > { > free_xenheap_pages(pendtable, order); > - return -ERANGE; > + return NULL; > } > clean_and_invalidate_dcache_va_range(pendtable, > lpi_data.max_host_lpi_ids / 8); > > - per_cpu(lpi_redist, cpu).pending_table =3D pendtable; > + return virt_to_page(pendtable); > +} > + > +static int gicv3_lpi_allocate_pendtable(unsigned int cpu) > +{ > + struct page_info *pendtable; > + > + if ( per_cpu(lpi_redist, cpu).pending_table ) > + return -EBUSY; > + > + pendtable =3D lpi_allocate_pendtable(); > + if ( !pendtable ) > + return -EINVAL; > > + per_cpu(lpi_redist, cpu).pending_table =3D page_to_virt(pendtable); > + > return 0; > } > > @@ -274,6 +286,38 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdi= st_base) > return 0; > } > > +void *lpi_allocate_proptable(void) Since this helper is used to allocate the table programmed via GICR_VPROPBASER (vLPI configuration table), it may be clearer to name it lpi_allocate_vproptable() (and lpi_free_vproptable()) to avoid confusion with the physical PROPBASER path. > +{ > + void *table; > + int order; > + > + /* The property table holds one byte per LPI. */ > + order =3D get_order_from_bytes(lpi_data.max_host_lpi_ids); Do we really need to allocate one byte per *ID* here? AFAIU for the (V)PROPBASER configuration table the entry for LPI N is at (base + (N - 8192)), so the table needs only (max_host_lpi_ids - 8192) bytes, not max_host_lpi_ids bytes. Arm IHI 0069H.b, 5.1.1 "LPI Configuration tables" states: For any LPI N, the location of the table entry is defined by (base address + (N - 8192)). Also see "GICv3 and GICv4 Software Overview" (DAI 0492B), section "LPI Configuration table": Size in bytes =3D 2^(GICR_PROPBASER.IDbits+1) =E2=80=93 8192 The "extra bytes" are relevant for the *pending* table semantics, not for the configuration table. With the current allocation size, we also init/flush only (max_host_lpi_ids - 8192) bytes, leaving a tail uninitialized. Either allocate the adjusted size, or init/flush the full allocated range. --- nit: VPROPBASER is VM-wide (vLPI configuration is global to all vPEs in a VM). It may be worth making the chosen IDbits/table size an explicit per-VM value, i.e. based on programmed value from VPROPBASER. > + table =3D alloc_xenheap_pages(order, gicv3_its_get_memflags()); > + if ( !table ) > + return NULL; > + > + /* Make sure the physical address can be encoded in the register. */ > + if ( (virt_to_maddr(table) & ~GENMASK(51, 12)) ) > + { > + free_xenheap_pages(table, order); > + return NULL; > + } > + memset(table, GIC_PRI_IRQ | LPI_PROP_RES1, MAX_NR_HOST_LPIS); > + clean_and_invalidate_dcache_va_range(table, MAX_NR_HOST_LPIS); > + > + return table; > +} > + > +void lpi_free_proptable(void *vproptable) > +{ > + int order; > + > + /* The property table holds one byte per LPI. */ > + order =3D get_order_from_bytes(lpi_data.max_host_lpi_ids); > + free_xenheap_pages(vproptable, order); > +} > + > /* > * Tell a redistributor about the (shared) property table, allocating on= e > * if not already done. > @@ -314,7 +358,8 @@ static int gicv3_lpi_set_proptable(void __iomem * rdi= st_base) > } > > /* Encode the number of bits needed, minus one */ > - reg |=3D fls(lpi_data.max_host_lpi_ids - 1) - 1; > + lpi_id_bits =3D fls(lpi_data.max_host_lpi_ids - 1); > + reg |=3D lpi_id_bits - 1; > > reg |=3D virt_to_maddr(lpi_data.lpi_property); > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 14852d18c2..d4af332b0e 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -2083,6 +2083,22 @@ static bool gic_dist_supports_lpis(void) > return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); > } > > +#ifdef CONFIG_GICV4 > +static void __init gicv4_init(void) > +{ > + gicv3_info.hw_version =3D GIC_V4; We should derive the HW version from GICD/GICR/GITS_PIDR2 in the common GICv3/4 init path instead of hard=E2=80=91coding GIC_V4 based on con= fig. That avoids config=E2=80=91dependent values and keeps version detection consistent. > + > + > + gicv4_its_vpeid_allocator_init(); > + > +} > +#else > +static void __init gicv4_init(void) > +{ > + ASSERT_UNREACHABLE(); > +} > +#endif > + > /* Set up the GIC */ > static int __init gicv3_init(void) > { > @@ -2157,6 +2173,8 @@ static int __init gicv3_init(void) > > gicv3_hyp_init(); > > + if ( gic_is_gicv4() ) > + gicv4_init(); > out: > spin_unlock(&gicv3.lock); > > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > index 358d0bffb9..fac3b44a94 100644 > --- a/xen/arch/arm/gic-v4-its.c > +++ b/xen/arch/arm/gic-v4-its.c > @@ -27,6 +27,83 @@ > #include > > > +/* > + * VPE ID is at most 16 bits. > + * Using a bitmap here limits us to 65536 concurrent VPEs. > + */ > +static unsigned long *vpeid_mask; > + > +static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOCKED; > + > +void __init gicv4_its_vpeid_allocator_init(void) > +{ > + /* Allocate space for vpeid_mask based on MAX_VPEID */ > + vpeid_mask =3D xzalloc_array(unsigned long, BITS_TO_LONGS(MAX_VPEID)= ); > + > + if ( !vpeid_mask ) > + panic("Could not allocate VPEID bitmap space\n"); > +} > + > +static int __init its_alloc_vpeid(struct its_vpe *vpe) Several helpers in gic-v4-its.c are marked __init (e.g. its_alloc_vpeid(), its_free_vpeid(), its_vpe_init(), its_vpe_teardown()), but they are called from vcpu_vgic_init() via vgic_v4_its_vpe_init(). This is not init-only code, and may cause section mismatch warnings or runtime issues once init sections are freed. Please drop __init for these functions. --- vpe is unused > +{ > + int id; > + > + spin_lock(&vpeid_alloc_lock); > + > + id =3D find_first_zero_bit(vpeid_mask, MAX_VPEID); > + > + if ( id =3D=3D MAX_VPEID ) > + { > + id =3D -EBUSY; > + printk(XENLOG_ERR "VPEID pool exhausted\n"); > + goto out; > + } > + > + set_bit(id, vpeid_mask); > + > +out: > + spin_unlock(&vpeid_alloc_lock); > + > + return id; > +} > + > +static void __init its_free_vpeid(uint32_t vpe_id) > +{ > + spin_lock(&vpeid_alloc_lock); > + > + clear_bit(vpe_id, vpeid_mask); > + > + spin_unlock(&vpeid_alloc_lock); > +} > + > +static bool __init its_alloc_vpe_entry(uint32_t vpe_id) > +{ > + struct host_its *hw_its; > + > + /* > + * Make sure the L2 tables are allocated on *all* v4 ITSs. We > + * could try and only do it on ITSs corresponding to devices > + * that have interrupts targeted at this VPE, but the > + * complexity becomes crazy. > + */ > + list_for_each_entry(hw_its, &host_its_list, entry) > + { > + struct its_baser *baser; > + > + if ( !hw_its->is_v4 ) > + continue; > + > + baser =3D its_get_baser(hw_its, GITS_BASER_TYPE_VCPU); > + if ( !baser ) > + return false; > + > + if ( !its_alloc_table_entry(baser, vpe_id) ) > + return false; > + } > + > + return true; > +} > + > static int its_send_cmd_vsync(struct host_its *its, uint16_t vpeid) > { > uint64_t cmd[4]; > @@ -39,6 +116,188 @@ static int its_send_cmd_vsync(struct host_its *its, = uint16_t vpeid) > return its_send_command(its, cmd); > } > > +static int its_send_cmd_vmapp(struct host_its *its, struct its_vpe *vpe, > + bool valid) > +{ > + uint64_t cmd[4]; > + uint16_t vpeid =3D vpe->vpe_id; > + uint64_t vpt_addr; > + int ret; > + > + cmd[0] =3D GITS_CMD_VMAPP; > + cmd[1] =3D (uint64_t)vpeid << 32; > + cmd[2] =3D valid ? GITS_VALID_BIT : 0; > + > + /* Unmap command */ > + if ( !valid ) > + goto out; > + > + /* Target redistributor */ > + cmd[2] |=3D encode_rdbase(its, vpe->col_idx, 0x0); > + vpt_addr =3D virt_to_maddr(vpe->vpendtable); > + cmd[3] =3D (vpt_addr & GENMASK(51, 16)) | > + ((HOST_LPIS_NRBITS - 1) & GENMASK(4, 0)); > + > + out: > + ret =3D its_send_command(its, cmd); > + > + return ret; > +} > + > +static int its_send_cmd_vinvall(struct host_its *its, struct its_vpe *vp= e) > +{ > + uint64_t cmd[4]; > + uint16_t vpeid =3D vpe->vpe_id; > + > + cmd[0] =3D GITS_CMD_VINVALL; > + cmd[1] =3D (uint64_t)vpeid << 32; > + cmd[2] =3D 0x00; > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > +static int its_map_vpe(struct host_its *its, struct its_vpe *vpe) > +{ > + int ret; > + > + /* > + * VMAPP command maps the vPE to the target RDbase, including an > + * associated virtual LPI Pending table. > + */ > + ret =3D its_send_cmd_vmapp(its, vpe, true); > + if ( ret ) > + return ret; > + > + ret =3D its_send_cmd_vinvall(its, vpe); > + if ( ret ) > + return ret; > + > + ret =3D its_send_cmd_vsync(its, vpe->vpe_id); > + if ( ret ) > + return ret; Error handling for ITS commands is minimal. If VMAPP succeeds and VINVALL/VSYNC fails, we return without rollback or recovery. Should we consider retrying (e.g. via CWRITER.Retry), or detect error/stall via GITS_TYPER.SEIS / GITS_CREADR.Stalled and unmap the VPE on failure? > + > + return 0; > +} > +static int __init its_vpe_init(struct its_vpe *vpe) > +{ > + int vpe_id, rc =3D -ENOMEM; > + struct page_info *vpendtable; > + struct host_its *hw_its; > + > + /* Allocate vpe id */ > + vpe_id =3D its_alloc_vpeid(vpe); > + if ( vpe_id < 0 ) > + return rc; > + > + /* Allocate VPT */ > + vpendtable =3D lpi_allocate_pendtable(); > + > + if ( !vpendtable ) > + goto fail_vpt; > + > + if ( !its_alloc_vpe_entry(vpe_id) ) > + goto fail_entry; > + > + rwlock_init(&vpe->lock); > + vpe->vpe_id =3D vpe_id; > + vpe->vpendtable =3D page_to_virt(vpendtable); > + /* > + * We eagerly inform all the v4 ITS and map vPE to the first > + * possible CPU > + */ > + vpe->col_idx =3D cpumask_first(&cpu_online_map); > + list_for_each_entry(hw_its, &host_its_list, entry) > + { > + if ( !hw_its->is_v4 ) > + continue; > + > + if ( its_map_vpe(hw_its, vpe) ) If its_map_vpe() fails for a later ITS, we should unmap the VPE on the ITSes already handled. its_vpe_teardown() frees SW allocations (vpe too) but does not undo prior VMAPPs, leaving stale mappings behind. > + goto fail_entry; > + } > + > + return 0; > + > + fail_entry: > + xfree(page_to_virt(vpendtable)); failure path frees vpendtable with xfree(), but it was allocated with alloc_xenheap_pages(). --- The fail path frees vpendtable locally, and the caller then calls its_vpe_teardown() on error. This risks double=E2=80=91free, Please have a single owner for cleanup. > + fail_vpt: > + its_free_vpeid(vpe_id); > + > + return rc; > +} > + > +static void __init its_vpe_teardown(struct its_vpe *vpe) > +{ > + unsigned int order; > + > + order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (u= nsigned long)SZ_64K)); > + its_free_vpeid(vpe->vpe_id); > + free_xenheap_pages(vpe->vpendtable, order); > + xfree(vpe); > +} > + > +int vgic_v4_its_vm_init(struct domain *d) > +{ > + unsigned int nr_vcpus =3D d->max_vcpus; > + int ret =3D -ENOMEM; > + > + if ( !gicv3_its_host_has_its() ) > + return 0; > + > + d->arch.vgic.its_vm =3D xzalloc(struct its_vm); > + if ( !d->arch.vgic.its_vm ) > + return ret; > + > + d->arch.vgic.its_vm->vpes =3D xzalloc_array(struct its_vpe *, nr_vcp= us); > + if ( !d->arch.vgic.its_vm->vpes ) > + goto fail_vpes; > + d->arch.vgic.its_vm->nr_vpes =3D nr_vcpus; > + > + d->arch.vgic.its_vm->vproptable =3D lpi_allocate_proptable(); > + if ( !d->arch.vgic.its_vm->vproptable ) > + goto fail_vprop; > + > + return 0; > + > +fail_vprop: > + xfree(d->arch.vgic.its_vm->vpes) > + fail_vpes: > + xfree(d->arch.vgic.its_vm); use XFREE to cleanup the its_vm ptr too > + > + return ret; > +} > + > +void vgic_v4_free_its_vm(struct domain *d) > +{ > + struct its_vm *its_vm =3D d->arch.vgic.its_vm; > + if ( its_vm->vpes ) nit: no need to check the ptr it is done by xfree > + xfree(its_vm->vpes); > + if ( its_vm->vproptable ) nit: looks like it is safe to pass NULL ptr to lpi_free_proptable > + lpi_free_proptable(its_vm); passes its_vm to lpi_free_proptable(), not its_vm->vproptable. > +} > + > +int vgic_v4_its_vpe_init(struct vcpu *vcpu) > +{ > + int ret; > + struct its_vm *its_vm =3D vcpu->domain->arch.vgic.its_vm; > + unsigned int vcpuid =3D vcpu->vcpu_id; > + > + vcpu->arch.vgic.its_vpe =3D xzalloc(struct its_vpe); > + if ( !vcpu->arch.vgic.its_vpe ) > + return -ENOMEM; > + > + its_vm->vpes[vcpuid] =3D vcpu->arch.vgic.its_vpe; its_vm->vpes[vcpuid] is assigned before its_vpe_init(). If its_vpe_init() fails, the array keeps a stale pointer. Either move the assignment after success, or clear it on failure. > + vcpu->arch.vgic.its_vpe->its_vm =3D its_vm; > + > + ret =3D its_vpe_init(vcpu->arch.vgic.its_vpe); > + if ( ret ) > + { > + its_vpe_teardown(vcpu->arch.vgic.its_vpe); > + return ret; > + } > + return 0; > +} > + > static int its_send_cmd_vmapti(struct host_its *its, struct its_device *= dev, > uint32_t eventid) > { > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index bd2696f354..411beb81c8 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -77,6 +77,7 @@ > #define GITS_BASER_ENTRY_SIZE_SHIFT 48 > #define GITS_BASER_ENTRY_SIZE(reg) = \ > ((((reg) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f)= + 1) > +#define GITS_LVL1_ENTRY_SIZE 8UL > #define GITS_BASER_SHAREABILITY_SHIFT 10 > #define GITS_BASER_PAGE_SIZE_SHIFT 8 > #define GITS_BASER_SIZE_MASK 0xff > @@ -117,9 +118,19 @@ > /* We allocate LPIs on the hosts in chunks of 32 to reduce handling over= head. */ > #define LPI_BLOCK 32U > > +extern unsigned int nvpeid; > +/* The maximum number of VPEID bits supported by VLPI commands */ > +#define ITS_MAX_VPEID_BITS nvpeid > +#define MAX_VPEID (1UL << ITS_MAX_VPEID_BITS) > + > #ifdef CONFIG_GICV4 > #include > #endif > + > +extern uint32_t lpi_id_bits; > +#define HOST_LPIS_NRBITS lpi_id_bits > +#define MAX_HOST_LPIS BIT(lpi_id_bits, UL) > + > /* > * Describes a device which is using the ITS and is used by a guest. > * Since device IDs are per ITS (in contrast to vLPIs, which are per > @@ -169,6 +180,7 @@ struct host_its { > void *cmd_buf; > unsigned int flags; > struct its_baser tables[GITS_BASER_NR_REGS]; > + bool is_v4; > }; > > /* Map a collection for this host CPU to each host ITS. */ > @@ -273,8 +285,13 @@ struct pending_irq *gicv3_assign_guest_event(struct = domain *d, > void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, > uint32_t virt_lpi); > struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type); > +bool its_alloc_table_entry(struct its_baser *baser, uint32_t id); > +struct page_info *lpi_allocate_pendtable(void); > +void *lpi_allocate_proptable(void); > +void lpi_free_proptable(void *vproptable); > void lpi_write_config(uint8_t *prop_table, uint32_t lpi, uint8_t clr, > uint8_t set); > +uint64_t encode_rdbase(struct host_its *hw_its, unsigned int cpu, uint64= _t reg); > int its_send_command(struct host_its *hw_its, const void *its_cmd); > > struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell, > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > index 722247ec60..fb0ef37bbe 100644 > --- a/xen/arch/arm/include/asm/gic_v4_its.h > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -49,6 +49,7 @@ struct event_vlpi_map { > unsigned int nr_vlpis; > }; > > +void gicv4_its_vpeid_allocator_init(void); > #endif > > /* > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index f12d736808..580310fec4 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -414,6 +414,9 @@ bool gic_is_gicv4(void); > #define gic_is_gicv4() (false) > #endif > > +int vgic_v4_its_vm_init(struct domain *d); > +void vgic_v4_free_its_vm(struct domain *d); > +int vgic_v4_its_vpe_init(struct vcpu *vcpu); > #endif /* !CONFIG_NEW_VGIC */ > > /*** Common VGIC functions used by Xen arch code ****/ > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 0da8c1a425..6baf870ad5 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -22,6 +22,7 @@ > > #include > #include > +#include > #include > > > @@ -329,6 +330,15 @@ int domain_vgic_init(struct domain *d, unsigned int = nr_spis) > for ( i =3D 0; i < NR_GIC_SGI; i++ ) > set_bit(i, d->arch.vgic.allocated_irqs); > > + if ( gic_is_gicv4() ) > + { > + ret =3D vgic_v4_its_vm_init(d); > + if ( ret ) > + { > + printk(XENLOG_ERR "GICv4 its vm allocation failed\n"); > + return ret; > + } > + } > return 0; > } > > @@ -366,11 +376,14 @@ void domain_vgic_free(struct domain *d) > #endif > xfree(d->arch.vgic.pending_irqs); > xfree(d->arch.vgic.allocated_irqs); > + > + if ( gic_is_gicv4() ) > + vgic_v4_free_its_vm(d); vgic_v4_free_its_vm() on gic_is_gicv4() even when no ITS, so its_vm can be NULL. Best regards, Mykola > } > > int vcpu_vgic_init(struct vcpu *v) > { > - int i; > + int i, ret; > > v->arch.vgic.private_irqs =3D xzalloc(struct vgic_irq_rank); > if ( v->arch.vgic.private_irqs =3D=3D NULL ) > @@ -389,6 +402,16 @@ int vcpu_vgic_init(struct vcpu *v) > INIT_LIST_HEAD(&v->arch.vgic.lr_pending); > spin_lock_init(&v->arch.vgic.lock); > > + if ( gic_is_gicv4() && gicv3_its_host_has_its()) > + { > + ret =3D vgic_v4_its_vpe_init(v); > + if ( ret ) > + { > + printk(XENLOG_ERR "GICv4 its vpe allocation failed\n"); > + return ret; > + } > + } > + > return 0; > } > > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 12:42:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 12:42:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235526.1538486 (Exim 4.92) (envelope-from ) id 1vsgt0-0005XP-3P; Wed, 18 Feb 2026 12:42:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235526.1538486; Wed, 18 Feb 2026 12:42:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsgt0-0005XI-0s; Wed, 18 Feb 2026 12:42:34 +0000 Received: by outflank-mailman (input) for mailman id 1235526; Wed, 18 Feb 2026 12:42:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsgsy-0005XC-9U for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 12:42:32 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 499158e1-0cc7-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 13:42:29 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4358fb60802so604531f8f.1 for ; Wed, 18 Feb 2026 04:42:29 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 18 Feb 2026 04:42:29 -0800 (PST) Message-ID: Date: Wed, 18 Feb 2026 13:42:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: don't use #if in macro invocations To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <23951625-939c-4658-8146-84c1f12381d0@suse.com> <60a1bc11-f9a6-48c3-b7d8-d007799fbe91@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <60a1bc11-f9a6-48c3-b7d8-d007799fbe91@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 18.02.2026 12:30, Andrew Cooper wrote: > On 18/02/2026 9:03 am, Jan Beulich wrote: >> As per the standard this is UB, i.e. we're building on a defacto extension >> in the compilers we use. > > Is it a real extension, or just something that happens to work? I was hoping I would not need to go through that large swath of gcc doc to actually figure, because ... >> Misra C:2012 rule 20.6 disallows this altogether, >> though. ... this I assumed was reason enough. Still, now that you forced me to: In The C Preprocessor the behavior is described as intentional, but not as an extension (section "Directives Within Macro Arguments"). Now you get to judge whether that's a "real" extension or a "de-facto" one. >> Use helper always-inline functions instead. >> >> In sh_audit_l1_table(), along with reducing the scope of "gfn", which now >> isn't used anymore by the if() side of the conditional, also reduce the >> scope of two other adjacent variables. >> >> For audit_magic() note that both which parameters are needed and what >> their types are is attributed to AUDIT_FAIL() accessing variables which >> aren't passed as arguments to it. > > This is grammatically awkward.  IMO it would be clearer to say "For > audit_magic() note that there are more parameters than might seem > necessary, caused by the expectations of AUDIT_FAIL()."  I've switched to using that, but one aspect is lost this way: I would have preferred both gl1e and sl1e to be plain entries, not pointers to ones. >> --- >> Leaving even the fetching of current to the helper in >> sh_rm_write_access_from_l1() looks tidier to me overall, albeit this means >> the fetch will now occur once per present L1E. > > This will not make a dent in the performance of the shadow code. > >> Converting the #if to if() and #ifdef to if(IS_ENABLED()) wouldn't work >> here, as identifiers are used which aren't available when the respective >> conditions are false. > > Personally, I'd have put this in the main commit message, because it's > the justification for why out-of-line static inline's need to be used. I was wondering, so I've moved this up. >> --- a/xen/arch/x86/mm/shadow/multi.c >> +++ b/xen/arch/x86/mm/shadow/multi.c >> @@ -395,7 +395,7 @@ static inline mfn_t cf_check sh_next_pag >> shadow_set_l2e(d, sl2e, new_sl2e, sl2mfn, SH_type_fl1_shadow, sh_next_page) >> >> static inline u32 >> -guest_index(void *ptr) >> +guest_index(const void *ptr) >> { >> return (u32)((unsigned long)ptr & ~PAGE_MASK) / sizeof(guest_l1e_t); >> } > > While fine per say, this doesn't appear to be related to the patch? It does, the compiler told me to: type_from_gl3e() uses it, and I really want to keep the const-s on both of its parameters. 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Specifically, ... >>> >>>> --- a/xen/include/xen/domain.h >>>> +++ b/xen/include/xen/domain.h >>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); >>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) >>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) >>>> >>>> +/* >>>> + * Is the domain using the host memory layout? >>>> + * >>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. >>>> + * To avoid any trouble finding space, it is easier to force using the >>>> + * host memory layout. >>>> + * >>>> + * The hardware domain will use the host layout regardless of >>>> + * direct-mapped because some OS may rely on a specific address ranges >>>> + * for the devices. >>>> + */ >>>> +#ifndef domain_use_host_layout >>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ >>>> + is_hardware_domain(d)) >>> ... is_domain_direct_mapped() isn't something that I'd like to see further >>> proliferate in common (non-DT) code. >> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware >> domain) on x86 as well. In fact, we already have a working prototype, >> although it is not suitable for upstream yet. >> >> In addition to the PSP use case that we discussed a few months ago, >> where the PSP is not behind an IOMMU and therefore exchanged addresses >> must be 1:1 mapped, we also have a new use case. We are running the full >> Xen-based automotive stack on an Azure instance where SVM (vmentry and >> vmexit) is available, but an IOMMU is not present. All virtual machines >> are configured as PVH. > Hmm. Then adjustments need making, for commentary and macro to be correct > on x86. First and foremost none of what is there is true for PV. As is_domain_direct_mapped() returns always false for x86, so domain_use_host_layout macro will return incorrect value for non-hardware domains (dom0?). And as PV domains are not auto_translated domains so are always direct-mapped, so technically is_domain_direct_mapped() (or domain_use_host_layout()) should return true in such case. (I assume it is also true for every domain except HVM according to the comment /* HVM guests are translated.  PV guests are not. */ in xc_dom_translated and the comment above definition of XENFEAT_direct_mapped: /* ...not auto_translated domains (x86 only) are always direct-mapped*/). Is my understanding correct? Then isn't that a problem of how is_domain_direct_mapped() is defined for x86? Shouldn't it be defined like:   #define is_domain_direct_mapped(d) (!paging_mode_translate(d) || ((d)->cdf & CDF_directmap)) Would it be better to move "!paging_mode_translate(d) || " to the definition of domain_use_host_layout()? Could you please explain what is wrong with the comment? Probably, except:   * To avoid any trouble finding space, it is easier to force using the   * host memory layout. everything else should be true for x86. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 18 13:12:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 13:12:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235551.1538510 (Exim 4.92) (envelope-from ) id 1vshLh-0001aD-Hz; Wed, 18 Feb 2026 13:12:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235551.1538510; Wed, 18 Feb 2026 13:12:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vshLh-0001a6-F3; Wed, 18 Feb 2026 13:12:13 +0000 Received: by outflank-mailman (input) for mailman id 1235551; Wed, 18 Feb 2026 13:12:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vshLg-0001a0-DM for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 13:12:12 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6cd62f2e-0ccb-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 14:12:07 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-43945763558so2340625f8f.3 for ; Wed, 18 Feb 2026 05:12:07 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 18 Feb 2026 05:12:06 -0800 (PST) Message-ID: <0c0061ab-acdb-4ceb-92e2-ca4e591ee741@suse.com> Date: Wed, 18 Feb 2026 14:12:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header To: Oleksii Kurochko Cc: Romain Caritey , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org, Stefano Stabellini References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> <5eb4ba3b-f7b6-4cfb-ab67-60198c3f8572@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eb4ba3b-f7b6-4cfb-ab67-60198c3f8572@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 18.02.2026 13:58, Oleksii Kurochko wrote: > > On 2/17/26 8:34 AM, Jan Beulich wrote: >> On 16.02.2026 19:42, Stefano Stabellini wrote: >>> On Mon, 16 Feb 2026, Jan Beulich wrote: >>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>>>> domain_use_host_layout() is generic enough to be moved to the >>>>> common header xen/domain.h. >>>> Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... >>>> >>>>> --- a/xen/include/xen/domain.h >>>>> +++ b/xen/include/xen/domain.h >>>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); >>>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) >>>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) >>>>> >>>>> +/* >>>>> + * Is the domain using the host memory layout? >>>>> + * >>>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. >>>>> + * To avoid any trouble finding space, it is easier to force using the >>>>> + * host memory layout. >>>>> + * >>>>> + * The hardware domain will use the host layout regardless of >>>>> + * direct-mapped because some OS may rely on a specific address ranges >>>>> + * for the devices. >>>>> + */ >>>>> +#ifndef domain_use_host_layout >>>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ >>>>> + is_hardware_domain(d)) >>>> ... is_domain_direct_mapped() isn't something that I'd like to see further >>>> proliferate in common (non-DT) code. >>> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware >>> domain) on x86 as well. In fact, we already have a working prototype, >>> although it is not suitable for upstream yet. >>> >>> In addition to the PSP use case that we discussed a few months ago, >>> where the PSP is not behind an IOMMU and therefore exchanged addresses >>> must be 1:1 mapped, we also have a new use case. We are running the full >>> Xen-based automotive stack on an Azure instance where SVM (vmentry and >>> vmexit) is available, but an IOMMU is not present. All virtual machines >>> are configured as PVH. >> Hmm. Then adjustments need making, for commentary and macro to be correct >> on x86. First and foremost none of what is there is true for PV. > > As is_domain_direct_mapped() returns always false for x86, so > domain_use_host_layout macro will return incorrect value for non-hardware > domains (dom0?). And as PV domains are not auto_translated domains so are > always direct-mapped, so technically is_domain_direct_mapped() (or > domain_use_host_layout()) should return true in such case. Hmm? PV domains aren't direct-mapped. Direct-map was introduced by Arm for some special purpose (absence of IOMMU iirc). > (I assume it is also true for every domain except HVM according to the comment > /* HVM guests are translated.  PV guests are not. */ in xc_dom_translated and > the comment above definition of XENFEAT_direct_mapped: /* ...not auto_translated > domains (x86 only) are always direct-mapped*/). > > Is my understanding correct? > > Then isn't that a problem of how is_domain_direct_mapped() is defined > for x86? Shouldn't it be defined like: >   #define is_domain_direct_mapped(d) (!paging_mode_translate(d) || ((d)->cdf & CDF_directmap)) > > Would it be better to move "!paging_mode_translate(d) || " to the definition > of domain_use_host_layout()? > > Could you please explain what is wrong with the comment? Probably, except: >   * To avoid any trouble finding space, it is easier to force using the >   * host memory layout. > everything else should be true for x86. "The hardware domain will use ..." isn't true for PV Dom0. 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Still, now that you forced me to: In > The C Preprocessor the behavior is described as intentional, but not as an > extension (section "Directives Within Macro Arguments"). Now you get to > judge whether that's a "real" extension or a "de-facto" one. Sorry - all I was trying to do was judge whether it was fair to call it UB like this or not. The MISRA complaint alone is fine justification for the patch. Given this, I'd suggest dropping "defacto" as the easiest way of making this a little more precise. > >>> Use helper always-inline functions instead. >>> >>> In sh_audit_l1_table(), along with reducing the scope of "gfn", which now >>> isn't used anymore by the if() side of the conditional, also reduce the >>> scope of two other adjacent variables. >>> >>> For audit_magic() note that both which parameters are needed and what >>> their types are is attributed to AUDIT_FAIL() accessing variables which >>> aren't passed as arguments to it. >> This is grammatically awkward.  IMO it would be clearer to say "For >> audit_magic() note that there are more parameters than might seem >> necessary, caused by the expectations of AUDIT_FAIL()."  > I've switched to using that, but one aspect is lost this way: I would have > preferred both gl1e and sl1e to be plain entries, not pointers to ones. > >>> --- >>> Leaving even the fetching of current to the helper in >>> sh_rm_write_access_from_l1() looks tidier to me overall, albeit this means >>> the fetch will now occur once per present L1E. >> This will not make a dent in the performance of the shadow code. >> >>> Converting the #if to if() and #ifdef to if(IS_ENABLED()) wouldn't work >>> here, as identifiers are used which aren't available when the respective >>> conditions are false. >> Personally, I'd have put this in the main commit message, because it's >> the justification for why out-of-line static inline's need to be used. > I was wondering, so I've moved this up. > >>> --- a/xen/arch/x86/mm/shadow/multi.c >>> +++ b/xen/arch/x86/mm/shadow/multi.c >>> @@ -395,7 +395,7 @@ static inline mfn_t cf_check sh_next_pag >>> shadow_set_l2e(d, sl2e, new_sl2e, sl2mfn, SH_type_fl1_shadow, sh_next_page) >>> >>> static inline u32 >>> -guest_index(void *ptr) >>> +guest_index(const void *ptr) >>> { >>> return (u32)((unsigned long)ptr & ~PAGE_MASK) / sizeof(guest_l1e_t); >>> } >> While fine per say, this doesn't appear to be related to the patch? > It does, the compiler told me to: type_from_gl3e() uses it, and I really > want to keep the const-s on both of its parameters. Oh of course.  I'd gone looking explicitly, and failed to spot it. Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:11:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:11:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235585.1538529 (Exim 4.92) (envelope-from ) id 1vsiHD-0001HS-1X; Wed, 18 Feb 2026 14:11:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235585.1538529; Wed, 18 Feb 2026 14:11:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiHC-0001HL-V1; Wed, 18 Feb 2026 14:11:38 +0000 Received: by outflank-mailman (input) for mailman id 1235585; Wed, 18 Feb 2026 14:11:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiHC-0001HF-Fm for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:11:38 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b9ae9775-0cd3-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 15:11:32 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 2DD614146E2B; Wed, 18 Feb 2026 09:11:15 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b9ae9775-0cd3-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com Subject: Re: Re: Re: Re: [PATCH v3 2/2] x86/svm: Use the virtual NMI when available Date: Wed, 18 Feb 2026 14:10:48 +0000 Message-ID: <20260218141125.15807-1-abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <4fa87ec0-8daf-4c62-bf34-56b23cf06531@citrix.com> References: <4fa87ec0-8daf-4c62-bf34-56b23cf06531@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On 16/02/2026 10:39 pm, Andrew Cooper wrote: >On 16/02/2026 4:10 pm, Abdelkareem Abdelsaamad wrote: >> On 16/02/2026 10:15 am, Andrew Cooper wrote: >>> So what happens to the NMI we're trying to inject when NMIs are >>> currently blocked? >> Ah, I see this... >> The handling flow will eventually land on the function svm_enable_intr_window >> with HVM_INTR_SHADOW_NMI. >What happens is that you drop the NMI on the floor and discard it. Note >how svm_inject_nmi() has no return value, and therefore must not fail. >It is buggy to check the blocked bit when injecting using this >mechanism. The blocked bit roughly equates to "NMI in progress" in the >guest, and it is explicitly possible to queue another NMI while the >first is in progress. >Both pending and masked being set roughly means "One NMI in progress, >and one queued", which is a perfectly fine state to be in. Right, Actually, I see the changes in the svm_get_interrupt_shadow and the svm_enable_intr_window functions are not correct. There should not be changes in the two functions. The vNMI handling for multiple\concurrent NMIs should first set the vnmi_pending bit for the first NMI. The subsequent NMI should either see the vnmi_pending bit is still set, in which case, it should be just dropped, i.e, do nothing or it can see the vnmi_pending is cleared in which case the current vNMI might be is in progress or might be completed but the code should safely not consider the NMI as blocked, if the vnmi_blocking is set. The confusion, I had, is due to looking at the KVM codebase. The upstream commit fa4c027a7956 ("KVM: x86: Add support for SVM's Virtual NMI") [1] that was later fixed with the fixing upstream commit b2ce89978889 ("KVM: SVM: vNMI pending bit is V_NMI_PENDING_MASK not V_NMI_BLOCKING_MASK") [2]. --Abdelkareem [1]https://lore.kernel.org/r/20230227084016.3368-11-santosh.shukla@amd.com [2]https://lore.kernel.org/r/be4ca192eb0c1e69a210db3009ca984e6a54ae69.1684495380.git.maciej.szmigiero@oracle.com From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:22:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:22:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235613.1538540 (Exim 4.92) (envelope-from ) id 1vsiRT-0002w1-0A; Wed, 18 Feb 2026 14:22:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235613.1538540; Wed, 18 Feb 2026 14:22:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiRS-0002vt-Sa; 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pr=C Message-ID: Date: Wed, 18 Feb 2026 09:21:48 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: fix unmapped access trapping on GICv2 hardware To: , Stefano Stabellini , Julien Grall , Michal Orzel CC: Bertrand Marquis , Volodymyr Babchuk References: <20260205190128.38716-1-stewart.hildebrand@amd.com> Content-Language: en-US From: Stewart Hildebrand In-Reply-To: <20260205190128.38716-1-stewart.hildebrand@amd.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D8:EE_|IA1PR12MB7759:EE_ X-MS-Office365-Filtering-Correlation-Id: 1f5b78c0-afb2-4a54-b438-08de6ef90fa7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026|13003099007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Vk5OMjUwbmo3K2dnY1ZTcTQxeURiRUtZWXVpaGxtVy85YmxndTMycTJTekRl?= =?utf-8?B?L0ZHSE0wSGVKZUNWUUowdWhBcWZMcW1iQXZzWGtacXRVV3orQlIwNTRWYUhG?= =?utf-8?B?ZlZWWm1lNzY3a2lsTXJuZ0NYOHI5TjVCTWFBSlpBQmI0Y1hodjFQL2crY3pM?= =?utf-8?B?ZUZuTHFOejBRRVM4dEVDeFM2V2NSSEw1dWZKY1krb3o5bndZU0hMdlUzZVRa?= =?utf-8?B?NForNjhmM0V0ZWE1VEV4NHdnNHlFZTQxRkxjWFVmbmZ5MXFRNTJpTlJmWW5n?= =?utf-8?B?ejh6LzVtMXF5clRzVTdtaUZ0UFZFa0xUMFpDTFNEMVR0bCtJQ0NjOUJGUktX?= =?utf-8?B?M3NjZHRYMG54RGtIRjR3U2w0Yy9jZmY3eHR3NDF6WWd0aFc0WEhsTUxHR2pw?= =?utf-8?B?NUEva2R0MlJtTzZKLzlVK1Q3WTIyS0tRaFVJek42OEV4NmpudVJLc1ZPd2hm?= =?utf-8?B?WmM3bHBSS2FQekp1UThWbEUyaXJIa0cvdmdiaXo0TERvRiszVDJYRjM1ZVRm?= =?utf-8?B?bDlvaGdETU5jTFk5a3JxUS93QW9CZklweFNYY3MwQkFvaUhPNmNZNmFwcnV5?= =?utf-8?B?SkRFSG10UkppVGxJRU5RNmowS3lOWXNiWlNJV2ZMSXhnNU5EaGpIMXQvMUxH?= =?utf-8?B?M0x0empndG92RklNMWRqS05aSU51V3I4alVjMkR3UmNENmxOKythbkZGNE95?= =?utf-8?B?RFVKVUZSQVdkcytXUGdCaGNHSG0xa05ud0tLeVJRbW84dUJLQk1RczlVUzFu?= =?utf-8?B?dVlPdzdxK2Y1ZXBJMXVjbWt3ejd0eHR6Y2hvZy9XbkVpeVBhZXNVZk9OZkVF?= =?utf-8?B?ZUd0Q1J0NXZaUmdvY3B0cG40VGFiZUdsWnQxWHUzTzZZeW0xOTdyOUxsUjZC?= =?utf-8?B?dm0vSzhjKzk5WFJ1Tkg3WTFXbUlYOGlsdTFkUG81c3FHN1Y5aUY1SEJ5blBG?= =?utf-8?B?dFg5TTN4Q253SWRaeGtXQVFKOWRMaDFlUjJPRzFJZFNyRTZlenlzc3FaSGxq?= =?utf-8?B?YXkrbEd6ekhaQ3JrUHhSSkxDYmVRQVhKSGZOZk1TYU5GZU81UFBoYnhmVExs?= =?utf-8?B?T3Y5aGpvaEZ0NVhoODlYNGVJdGNaZCtKZ1NIQjZ2WXJhR1ZKeDYxaTJLTHcz?= =?utf-8?B?d3BpRkVBOGp0ajZTVS9BUEhUL2huTmJWZElJL05iK041TXdsSS9Id1pqUFBY?= =?utf-8?B?YkRBL1M5OStxRXgzN1JCbVFNQ3IweXpmQ2RHUllXb08vbk94cEV3dmRISWVz?= =?utf-8?B?VWZCSWwxQ1AyRTE0T2dIUlZFcnFkK1VJVFR1TmdpQTE5U21TZnJVM3pmWEFT?= =?utf-8?B?aFRjbTh5L21jRUZzamhGa28xaURwM0gzTUpHbFZ6ZmpiSTNVQjhabFYxaFhL?= =?utf-8?B?dFZmK3JHMGFxSFNXMWpzekU5eTlqVXp6bTlaM0hPNzVsY3NkNWplQUw5R0Vi?= =?utf-8?B?c2o0Ukt0ZVdZU01sMmZxaVhYeXRrMXVucEtvbUI5a2RSdXhTSDN5QXhkWG52?= =?utf-8?B?YlppM3hUR3RLVTlHK3J5K2hpYjV6OGpjdzNGV0VmVUJnTGIzV0x5NXRYZzRO?= =?utf-8?B?YVJqZ1NNbWJIeGI3RXphYU9OY2NDaDNITjczK2gzbURtTU85Slp1YmYwWjZ6?= =?utf-8?B?Z1pMdzExSEtVTnUrNG1hcTZ6cXRhdWlLOUNRL2JmcHdVWXhENlNoRExacTZa?= =?utf-8?B?dndxWm1OY1dyRWhDM3VlM05reWhvNHhyRFFPdkxPd0M0WGZiK1hBdmQ5UUlT?= =?utf-8?B?aTI0aEp3WXN1TTJNZFdSMm9JUVhXTWd3Lzg3NHRvRW10WXZMK3lGS2Y4Mm5a?= =?utf-8?B?bk5KdEwzQmZTaTlSL0xnUzc3MHl4WkJ6R282Z2UrbG5Jcm5kbThNYSt2eTh3?= =?utf-8?B?d092eDQxSUxKYjdvdzQxYTBTQk1taEZoSkxwWWc4bGNBTm54dzlSajZ2M243?= =?utf-8?B?Z0hhT1BRZWh4TXNuR1EwS01qMDEzVEwvN0s1YmtydnhZRnpvS3VVcW01RlJa?= =?utf-8?B?a0Z0Umw4a0cxVm1GVkg5Rjg4d2FBTXZ6US9JZjJjcUs2d2R3NytZUWlQZCs2?= =?utf-8?B?Wkt6clJiUzdwby9VOXd4VC8zMEdXRlpLcjF1YnQ2ekZRZlEvR1UreHdUL240?= =?utf-8?B?QVlqdUNmWGcxNVUwYm8rNVdCMGNIRXIrOUV5V1hObjI1a1RZOGhIZkt1RnRW?= =?utf-8?B?MDJtUGNFdVNBa0M4dnJSdFNJZVFWSlN1TUxoUjNvWnBUbnp0K3g4SFU0YllK?= =?utf-8?B?dWlWYmF1YzRtNlFCbkM3dHA2MmR3PT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026)(13003099007);DIR:OUT;SFP:1101; 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To be clear, domU interrupts with vGICv2 are currently broken when XEN_DOMCTL_CDF_trap_unmapped_accesses is not set. On 2/5/26 14:01, Stewart Hildebrand wrote: > Since 4dbcb0653621, the vGICv2 CPU interface is mapped in a deferred > manner. On domains with XEN_DOMCTL_CDF_trap_unmapped_accesses unset on > GICv2 hardware, the vGICv2 CPU interface fails to be mapped. A visible > symptom is that a domU gets stuck at: > > [ 0.177983] smp: Bringing up secondary CPUs ... > > Move the 2nd check_p2m earlier so it's prioritized over try_handle_mmio. > > Fixes: 980aff4e8fcd ("xen/arm: Add way to disable traps on accesses to unmapped addresses") > Signed-off-by: Stewart Hildebrand > --- > This should be backported to 4.21. > > Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2010469665 > --- > xen/arch/arm/traps.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c > index 040c0f2e0db1..0c01f37ad6b4 100644 > --- a/xen/arch/arm/traps.c > +++ b/xen/arch/arm/traps.c > @@ -1915,6 +1915,14 @@ static void do_trap_stage2_abort_guest(struct cpu_user_regs *regs, > if ( info.dabt_instr.state == INSTR_ERROR ) > goto inject_abt; > > + /* > + * If the instruction syndrome was invalid, then we already checked if > + * this was due to a P2M fault. So no point to check again as the result > + * will be the same. > + */ > + if ( (info.dabt_instr.state == INSTR_VALID) && check_p2m(is_data, gpa) ) > + return; > + > state = try_handle_mmio(regs, &info); > > switch ( state ) > @@ -1939,14 +1947,6 @@ static void do_trap_stage2_abort_guest(struct cpu_user_regs *regs, > break; > } > > - /* > - * If the instruction syndrome was invalid, then we already checked if > - * this was due to a P2M fault. So no point to check again as the result > - * will be the same. > - */ > - if ( (info.dabt_instr.state == INSTR_VALID) && check_p2m(is_data, gpa) ) > - return; > - > break; > } > default: From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:33:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:33:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235630.1538552 (Exim 4.92) (envelope-from ) id 1vsicg-0004bx-FG; Wed, 18 Feb 2026 14:33:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235630.1538552; Wed, 18 Feb 2026 14:33:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsicg-0004bq-CN; Wed, 18 Feb 2026 14:33:50 +0000 Received: by outflank-mailman (input) for mailman id 1235630; Wed, 18 Feb 2026 14:33:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsicf-0004bk-Qk for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:33:49 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d28bc651-0cd6-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 15:33:43 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771425207254478.0252896232721; Wed, 18 Feb 2026 06:33:27 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d28bc651-0cd6-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; t=1771425210; cv=none; d=zohomail.com; s=zohoarc; b=Mt8NjpYdVvVbqSowi6i8dG+8QRvhPPCbTvilU5Ww+VM/luTMeDypAJH+Lvs6xcPe5M75IZKQ5yVwCe9pm1NbpX2RuQhmLJ+5k3gnkuk7yk7bI6EfKwjcQ7lNUA41XZzKKI0m6hE8MVzYtEMC9js9Uv6/jx4N+gNhqsJdRMTqfxA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771425210; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZJveh3Bcm2/0NjwL5by88BzuPoySivzwVr45jGAQkOQ=; b=dk3XXqYEHyg2Thxi7fTqt1tveMYbBsT9wUdpQogmBp+LmcL0f0F1jrV2EB3IpH/H1rkHiPlyhN46TnPjgOn53l1TujI9N59T1Pnk4rKQ8+FEXKGw2fHKJ3AHbJyWCM69ZwA1CzBwPjTVg1psBWJWflbJler0O/nXAi1lmbFZ6aE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771425210; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=ZJveh3Bcm2/0NjwL5by88BzuPoySivzwVr45jGAQkOQ=; b=IAc+x+jP8ATYP9SqWc1QHrVAc2+HPILy9o7nNHXGhaKU3nX+JlRgkDUEImmOM7Qs 1uEJCcwZGipvMXWbxTYOTBnfo1UWN/3zdVEAVRTVU/OEiCk7DtilAhgmeqPWhOxFlLJ g9xfMWOTyEBRhp8QiuDvMI2lgZC9tmA/Rwau0nzw= Message-ID: Date: Wed, 18 Feb 2026 09:33:25 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jan Beulich Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/17/26 04:34, Jan Beulich wrote: > On 16.02.2026 22:57, Daniel P. Smith wrote: >> When using XSM Flask, passing DOMIND_INVALID will result in a NULL pointer > > Nit: DOMID_INVALID > ack. >> reference from the passing of NULL as the target domain to >> xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the >> target domain is NULL opens the opportunity to circumvent the XSM >> get_domain_state access check. This is due to the fact that the call to >> xsm_domctl() for get_domain_state op is a no-op check, deferring to >> xsm_get_domain_state(). >> >> Modify the helper get_domain_state() to ensure the requesting domain has >> get_domain_state access for the target domain, whether the target domain is >> explicitly set or implicitly determined with a domain state search. In the case >> of access not being allowed for a domain found during an implicit search, the >> search will continue to the next domain whose state has changed. >> >> Signed-off-by: Daniel P. Smith >> Reported-by: Chris Rogers >> Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") > > Nit: Fixes: first (or at least ahead of S-o-b) and other tags chronologically > ordered, please. > >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> domid_t *domid) >> { >> - unsigned int dom; >> + unsigned int dom = 0; >> int rc = -ENOENT; >> struct domain *hdl; >> >> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> >> if ( d ) >> { >> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >> + if ( rc ) >> + return rc; >> + >> set_domain_state_info(info, d); >> >> return 0; >> @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> >> while ( dom_state_changed ) >> { >> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); >> if ( dom >= DOMID_FIRST_RESERVED ) >> break; >> - if ( test_and_clear_bit(dom, dom_state_changed) ) >> + if ( test_bit(dom, dom_state_changed) ) >> { >> *domid = dom; > > This is problematic wrt other work (already talked about in the distant past, > but sadly only making little progress) towards trying to pull some of the > sub-ops out of the domctl-locked region. This subop is one of the prime > candidates, yet only if the test_and_clear_bit() remains here. > Okay, but we can't be clearing the bit if the src domain doesn't have access. When considering that xsm_domctl() does a no-op check for XEN_DOMCTL_get_domain_state, deferring to xsm_get_domain_state(), then any domain could invoke the OP with DOMID_INVALID and clear the bit before access is checked. If you want to ensure atomic operations on the bit field, while I am not a fan of this, a combination with set_bit() could be done. Let the test_and_clear_bit() remain and then if access check fails, use set_bit() to put it back. Would that be sufficient for your objective? >> @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> >> if ( d ) >> { >> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >> + if ( rc ) >> + { >> + rcu_unlock_domain(d); >> + rc = -ENOENT; > > As you don't otherwise use xsm_get_domain_state()'s return value, the need > for this assignment can be eliminated by putting the function call straight > in the if(). Then again, to address the remark above, overall code structure > will need to change quite a bit anyway (so the remark here may be moot). > I can drop the use of rc here and inline it. >> + dom++; > > It may be nice to eliminate the need to have this in two places (here and ... > >> + continue; >> + } >> + >> set_domain_state_info(info, d); >> >> rcu_unlock_domain(d); >> @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> else >> memset(info, 0, sizeof(*info)); >> >> + clear_bit(dom, dom_state_changed); >> rc = 0; >> >> break; >> } >> + >> + dom++; >> } > > ... here), by having the variable's initializer be -1 and then using dom + 1 > in the find_next_bit() invocation. If you want this way, then there are two options, make dom no longer unsigned or be willing to allow unsigned int overflow. If we go with the former, If you agree, I would leave it as an int as that should cover the range of valid domids. v/r, dps From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:38:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:38:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235639.1538563 (Exim 4.92) (envelope-from ) id 1vsih4-0005Dq-VU; Wed, 18 Feb 2026 14:38:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235639.1538563; Wed, 18 Feb 2026 14:38:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsih4-0005Dj-Sg; Wed, 18 Feb 2026 14:38:22 +0000 Received: by outflank-mailman (input) for mailman id 1235639; Wed, 18 Feb 2026 14:38:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsih4-0005Dd-BF for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:38:22 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 78935b69-0cd7-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 15:38:20 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-48336a6e932so33093645e9.3 for ; Wed, 18 Feb 2026 06:38:20 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Specifically, ... >>>>> >>>>>> --- a/xen/include/xen/domain.h >>>>>> +++ b/xen/include/xen/domain.h >>>>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); >>>>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) >>>>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) >>>>>> >>>>>> +/* >>>>>> + * Is the domain using the host memory layout? >>>>>> + * >>>>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. >>>>>> + * To avoid any trouble finding space, it is easier to force using the >>>>>> + * host memory layout. >>>>>> + * >>>>>> + * The hardware domain will use the host layout regardless of >>>>>> + * direct-mapped because some OS may rely on a specific address ranges >>>>>> + * for the devices. >>>>>> + */ >>>>>> +#ifndef domain_use_host_layout >>>>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ >>>>>> + is_hardware_domain(d)) >>>>> ... is_domain_direct_mapped() isn't something that I'd like to see further >>>>> proliferate in common (non-DT) code. >>>> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware >>>> domain) on x86 as well. In fact, we already have a working prototype, >>>> although it is not suitable for upstream yet. >>>> >>>> In addition to the PSP use case that we discussed a few months ago, >>>> where the PSP is not behind an IOMMU and therefore exchanged addresses >>>> must be 1:1 mapped, we also have a new use case. We are running the full >>>> Xen-based automotive stack on an Azure instance where SVM (vmentry and >>>> vmexit) is available, but an IOMMU is not present. All virtual machines >>>> are configured as PVH. >>> Hmm. Then adjustments need making, for commentary and macro to be correct >>> on x86. First and foremost none of what is there is true for PV. >> As is_domain_direct_mapped() returns always false for x86, so >> domain_use_host_layout macro will return incorrect value for non-hardware >> domains (dom0?). And as PV domains are not auto_translated domains so are >> always direct-mapped, so technically is_domain_direct_mapped() (or >> domain_use_host_layout()) should return true in such case. > Hmm? PV domains aren't direct-mapped. Direct-map was introduced by Arm for > some special purpose (absence of IOMMU iirc). I made such conclusion because of the comments in the code mentioned below: - https://elixir.bootlin.com/xen/v4.21.0/source/tools/libs/guest/xg_dom_x86.c#L1880 - https://elixir.bootlin.com/xen/v4.21.0/source/xen/include/public/features.h#L107 Also, in the comment where it is introduced (d66bf122c0a "xen: introduce XENFEAT_direct_mapped and XENFEAT_not_direct_mapped") is mentioned that: XENFEAT_direct_mapped is always set for not auto-translated guests. > >> (I assume it is also true for every domain except HVM according to the comment >> /* HVM guests are translated.  PV guests are not. */ in xc_dom_translated and >> the comment above definition of XENFEAT_direct_mapped: /* ...not auto_translated >> domains (x86 only) are always direct-mapped*/). >> >> Is my understanding correct? >> >> Then isn't that a problem of how is_domain_direct_mapped() is defined >> for x86? Shouldn't it be defined like: >>   #define is_domain_direct_mapped(d) (!paging_mode_translate(d) || ((d)->cdf & CDF_directmap)) >> >> Would it be better to move "!paging_mode_translate(d) || " to the definition >> of domain_use_host_layout()? >> >> Could you please explain what is wrong with the comment? Probably, except: >>   * To avoid any trouble finding space, it is easier to force using the >>   * host memory layout. >> everything else should be true for x86. > "The hardware domain will use ..." isn't true for PV Dom0. And then just pure is_hardware_domain(d) inside macros isn't correct too, right? So it should be (... || (!is_pv_domain(d) && is_hardware_domain(d))) ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:48:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:48:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235656.1538573 (Exim 4.92) (envelope-from ) id 1vsiqb-0006yM-VH; Wed, 18 Feb 2026 14:48:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235656.1538573; Wed, 18 Feb 2026 14:48:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqb-0006yF-SI; Wed, 18 Feb 2026 14:48:13 +0000 Received: by outflank-mailman (input) for mailman id 1235656; Wed, 18 Feb 2026 14:48:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqa-0006y4-G3 for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:48:12 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d7a2748c-0cd8-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 15:48:10 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id DA5AF4147501; Wed, 18 Feb 2026 09:47:52 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d7a2748c-0cd8-11f1-b164-2bf370ae4941 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v4 0/2] Virtual NMI Date: Wed, 18 Feb 2026 14:47:59 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, the Xen hypervisor delivers NMIs to the guests using the Event Injection mechanism. The Event Injection mechanism does not block the delivery of subsequent NMIs. So, the Xen Hypervisor tracks the NMI delivery and its completion (by intercepting the IRET instruction) before sending a new NMI. With the 4th generation AMD EPYC, a hardware NMI virtualization support, Virtual NMI (VNMI), is introduced. The vNMI allows the hypervisor to inject the NMI into the guest w/o using Event Injection mechanism. No need to track the guest NMI and intercepting the IRET instruction. NMI Virtualization support is indicated by CPUID Fn8000_000A_EDX[VNMI] = 1.[1] NMI Virtualization is enabled by setting V_NMI_ENABLE (bit 26 in offset 60h of the VMCB). Enabling NMI Virtualization requires the NMI intercept bit to be set. An attempt to run a guest with V_NMI_ENABLE without the NMI intercept bit set results in #VMEXIT(INVALID) [1] Three new bits are added to the VMCB field at offset 60h to provide NMI virtualization hardware support: V_NMI(11): Indicates whether a virtual NMI is pending in the guest. The processor will clear V_NMI once it takes the virtual NMI. V_NMI_MASK(12): Indicates whether virtual NMIs are masked. The processor will set V_NMI_MASK once it takes the virtual NMI. V_NMI_MASK is cleared when the guest successfully completes an IRET instruction or #VMEXIT occurs while delivering the virtual NMI. V_NMI_ENABLE(26): Enables NMI virtualization. [1] [1] https://docs.amd.com/v/u/en-US/24593_3.43 --- Changes in v4: - Delete the changes in svm_get_interrupt_shadow. The vNMI handling for multiple\concurrent NMIs should not be considered blocked if vnmi_pending and vnmi_blockking are set. - Fix formatting indentation in the svm_inject_nmi function. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2334257666 --- Changes in v3: - Delete the introduced hvm_function_table::vNMI boolean and all the 3 vNMI hooks, hvm_function_table::is_vnmi_enabled, hvm_function_table::is_vnmi_masked and hvm_function_table::set_vnmi_pending. - Use the HVM_INTR_SHADOW_NMI to indicate that the NMI is blocked rather than the usage of HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2327265341 --- Changes in v2: - Merge the patches for "svm/vnmi: introduce the vnmi bit support in the cpuid feature set" and "svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB" into the one patch "x86/svm: Add Enumerations for the SVM virtual NMI". - Change the patch subject "svm/vnmi: Add support for the SVM Virtual NMI" to "x86/svm: Use virtual NMI when available" - Move the print out of the VNMI capability to the patch "x86/svm: Use virtual NMI when available" when it is being used. - Remove the hvm_intblk_vnmi enumeration that was introduced for the separate masked vNMI handling. - Introduce the hvm_function_table's is_vnmi_enabled callback to allow for the SVM implementation to verify that the VNMI is enabled by checking the VMCB bits in addition to the CPUID reported support. - Change the the name of the hvm_function_table's callback is_vnmi_pending to is_vnmi_masked. - The svm_inject_nmi function gains a check for the distinct NMI injection handling when the VNMI is enabled. - Simplify the check of AMD SVM Hardware support for the VNMI. The check cpu_has_svm_vnmi is performed unconditionally. - Simplify the introduced changes diff for the vintr_t union for the VNMI bits support. - Adopt the Xen formatting guidelines for the control structures. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2325298577 --- Abdelkareem Abdelsaamad (2): x86/svm: Add Enumerations for the SVM virtual NMI x86/svm: Use the virtual NMI when available xen/arch/x86/hvm/svm/intr.c | 8 ++++++++ xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/vmcb.c | 2 ++ xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 5 files changed, 19 insertions(+), 2 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:48:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:48:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235657.1538578 (Exim 4.92) (envelope-from ) id 1vsiqc-00071O-6d; Wed, 18 Feb 2026 14:48:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235657.1538578; Wed, 18 Feb 2026 14:48:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqc-00070B-1J; Wed, 18 Feb 2026 14:48:14 +0000 Received: by outflank-mailman (input) for mailman id 1235657; Wed, 18 Feb 2026 14:48:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqb-0006y4-4f for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:48:13 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d8eb9ddf-0cd8-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 15:48:12 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 10F7C4147503; Wed, 18 Feb 2026 09:47:54 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d8eb9ddf-0cd8-11f1-b164-2bf370ae4941 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v4 1/2] x86/svm: Add Enumerations for the SVM virtual NMI Date: Wed, 18 Feb 2026 14:48:00 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD platforms. The feature support is indicated by the CPUID Fn8000_000A_EDX[25] = 1. Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the VMCB structure's vintr_t: vintr_t(11) - Virtual NMI is pending. vintr_t(12) - Virtual NMI is masked. vintr_t(26) - Enable NMI virtualization. Signed-off-by: Abdelkareem Abdelsaamad Reviewed-by: Teddy Astie --- xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 69f6047394..13ccfd3ff9 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -336,13 +336,17 @@ typedef union u64 tpr: 8; u64 irq: 1; u64 vgif: 1; - u64 rsvd0: 6; + u64 : 1; + u64 vnmi_pending: 1; + u64 vnmi_blocking:1; + u64 : 3; u64 prio: 4; u64 ign_tpr: 1; u64 rsvd1: 3; u64 intr_masking: 1; u64 vgif_enable: 1; - u64 rsvd2: 6; + u64 vnmi_enable: 1; + u64 : 5; u64 vector: 8; u64 rsvd3: 24; } fields; diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 15f0268be7..a35a61273b 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ static inline bool cpu_has_svm_feature(unsigned int feat) @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) #define MSR_INTERCEPT_NONE 0 -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:48:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:48:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235660.1538592 (Exim 4.92) (envelope-from ) id 1vsiqk-0007UE-BS; Wed, 18 Feb 2026 14:48:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235660.1538592; Wed, 18 Feb 2026 14:48:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqk-0007U7-86; Wed, 18 Feb 2026 14:48:22 +0000 Received: by outflank-mailman (input) for mailman id 1235660; Wed, 18 Feb 2026 14:48:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiqi-0007Sy-Oy for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:48:20 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d9ffa53a-0cd8-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 15:48:14 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id CD85C414750A; Wed, 18 Feb 2026 09:47:56 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d9ffa53a-0cd8-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v4 2/2] x86/svm: Use the virtual NMI when available Date: Wed, 18 Feb 2026 14:48:01 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit With the Virtual NMI (vNMI), the pending NMI is simply stuffed into the VMCB and handed off to the hardware. There is no need for the artificial tracking of the NMI handling completion with the IRET instruction interception. Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware accelerated feature when the AMD platform supports the vNMI. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/intr.c | 8 ++++++++ xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/vmcb.c | 2 ++ 3 files changed, 11 insertions(+) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b85..996362f8a6 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -33,6 +33,14 @@ static void svm_inject_nmi(struct vcpu *v) u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); intinfo_t event; + if ( vmcb->_vintr.fields.vnmi_enable ) + { + if ( !vmcb->_vintr.fields.vnmi_pending ) + vmcb->_vintr.fields.vnmi_pending = 1; + + return; + } + event.raw = 0; event.v = true; event.type = X86_ET_NMI; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..815565c33f 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2524,6 +2524,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..e90bbac332 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; + return 0; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 14:50:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 14:50:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235699.1538603 (Exim 4.92) (envelope-from ) id 1vsiso-000141-M4; Wed, 18 Feb 2026 14:50:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235699.1538603; Wed, 18 Feb 2026 14:50:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsiso-00013u-J3; Wed, 18 Feb 2026 14:50:30 +0000 Received: by outflank-mailman (input) for mailman id 1235699; Wed, 18 Feb 2026 14:50:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsism-00013o-Ol for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 14:50:28 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 29070bf7-0cd9-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 15:50:26 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-48374014a77so49399995e9.3 for ; Wed, 18 Feb 2026 06:50:26 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 18 Feb 2026 06:50:25 -0800 (PST) Message-ID: <74060a96-110f-4d6f-bbad-361021315884@suse.com> Date: Wed, 18 Feb 2026 15:50:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header To: Oleksii Kurochko , Stefano Stabellini Cc: Romain Caritey , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> <5eb4ba3b-f7b6-4cfb-ab67-60198c3f8572@gmail.com> <0c0061ab-acdb-4ceb-92e2-ca4e591ee741@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 18.02.2026 15:38, Oleksii Kurochko wrote: > On 2/18/26 2:12 PM, Jan Beulich wrote: >> On 18.02.2026 13:58, Oleksii Kurochko wrote: >>> On 2/17/26 8:34 AM, Jan Beulich wrote: >>>> On 16.02.2026 19:42, Stefano Stabellini wrote: >>>>> On Mon, 16 Feb 2026, Jan Beulich wrote: >>>>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: >>>>>>> domain_use_host_layout() is generic enough to be moved to the >>>>>>> common header xen/domain.h. >>>>>> Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... >>>>>> >>>>>>> --- a/xen/include/xen/domain.h >>>>>>> +++ b/xen/include/xen/domain.h >>>>>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); >>>>>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) >>>>>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) >>>>>>> >>>>>>> +/* >>>>>>> + * Is the domain using the host memory layout? >>>>>>> + * >>>>>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. >>>>>>> + * To avoid any trouble finding space, it is easier to force using the >>>>>>> + * host memory layout. >>>>>>> + * >>>>>>> + * The hardware domain will use the host layout regardless of >>>>>>> + * direct-mapped because some OS may rely on a specific address ranges >>>>>>> + * for the devices. >>>>>>> + */ >>>>>>> +#ifndef domain_use_host_layout >>>>>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ >>>>>>> + is_hardware_domain(d)) >>>>>> ... is_domain_direct_mapped() isn't something that I'd like to see further >>>>>> proliferate in common (non-DT) code. >>>>> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware >>>>> domain) on x86 as well. In fact, we already have a working prototype, >>>>> although it is not suitable for upstream yet. >>>>> >>>>> In addition to the PSP use case that we discussed a few months ago, >>>>> where the PSP is not behind an IOMMU and therefore exchanged addresses >>>>> must be 1:1 mapped, we also have a new use case. We are running the full >>>>> Xen-based automotive stack on an Azure instance where SVM (vmentry and >>>>> vmexit) is available, but an IOMMU is not present. All virtual machines >>>>> are configured as PVH. >>>> Hmm. Then adjustments need making, for commentary and macro to be correct >>>> on x86. First and foremost none of what is there is true for PV. >>> As is_domain_direct_mapped() returns always false for x86, so >>> domain_use_host_layout macro will return incorrect value for non-hardware >>> domains (dom0?). And as PV domains are not auto_translated domains so are >>> always direct-mapped, so technically is_domain_direct_mapped() (or >>> domain_use_host_layout()) should return true in such case. >> Hmm? PV domains aren't direct-mapped. Direct-map was introduced by Arm for >> some special purpose (absence of IOMMU iirc). > > I made such conclusion because of the comments in the code mentioned below: > - https://elixir.bootlin.com/xen/v4.21.0/source/tools/libs/guest/xg_dom_x86.c#L1880 > - https://elixir.bootlin.com/xen/v4.21.0/source/xen/include/public/features.h#L107 > > Also, in the comment where it is introduced (d66bf122c0a "xen: introduce XENFEAT_direct_mapped and XENFEAT_not_direct_mapped") > is mentioned that: > XENFEAT_direct_mapped is always set for not auto-translated guests. Hmm, this you're right with, and XENVER_get_features handling indeed has if ( !paging_mode_translate(d) || is_domain_direct_mapped(d) ) fi.submap |= (1U << XENFEAT_direct_mapped); Which now I have a vague recollection of not having been happy with back at the time. Based solely on the GFN == MFN statement this may be correct, but "GFN" is a questionable term for PV in the first place. See how e.g. common/memory.c resorts to using GPFN and GMFN, in line with commentary in public/memory.h. What the above demonstrates quite well though is that there's no direct relationship between XENFEAT_direct_mapped and is_domain_direct_mapped(). >>> (I assume it is also true for every domain except HVM according to the comment >>> /* HVM guests are translated.  PV guests are not. */ in xc_dom_translated and >>> the comment above definition of XENFEAT_direct_mapped: /* ...not auto_translated >>> domains (x86 only) are always direct-mapped*/). >>> >>> Is my understanding correct? >>> >>> Then isn't that a problem of how is_domain_direct_mapped() is defined >>> for x86? Shouldn't it be defined like: >>>   #define is_domain_direct_mapped(d) (!paging_mode_translate(d) || ((d)->cdf & CDF_directmap)) >>> >>> Would it be better to move "!paging_mode_translate(d) || " to the definition >>> of domain_use_host_layout()? >>> >>> Could you please explain what is wrong with the comment? Probably, except: >>>   * To avoid any trouble finding space, it is easier to force using the >>>   * host memory layout. >>> everything else should be true for x86. >> "The hardware domain will use ..." isn't true for PV Dom0. > > And then just pure is_hardware_domain(d) inside macros isn't correct too, right? > So it should be (... || (!is_pv_domain(d) && is_hardware_domain(d))) Stefano, please can you guide Oleksii to put there something which is both correct and will cover your intended use case as well? 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Smith" Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 15:33, Daniel P. Smith wrote: > On 2/17/26 04:34, Jan Beulich wrote: >> On 16.02.2026 22:57, Daniel P. Smith wrote: >>> --- a/xen/common/domain.c >>> +++ b/xen/common/domain.c >>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >>> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> domid_t *domid) >>> { >>> - unsigned int dom; >>> + unsigned int dom = 0; >>> int rc = -ENOENT; >>> struct domain *hdl; >>> >>> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> >>> if ( d ) >>> { >>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>> + if ( rc ) >>> + return rc; >>> + >>> set_domain_state_info(info, d); >>> >>> return 0; >>> @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> >>> while ( dom_state_changed ) >>> { >>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); >>> if ( dom >= DOMID_FIRST_RESERVED ) >>> break; >>> - if ( test_and_clear_bit(dom, dom_state_changed) ) >>> + if ( test_bit(dom, dom_state_changed) ) >>> { >>> *domid = dom; >> >> This is problematic wrt other work (already talked about in the distant past, >> but sadly only making little progress) towards trying to pull some of the >> sub-ops out of the domctl-locked region. This subop is one of the prime >> candidates, yet only if the test_and_clear_bit() remains here. > > Okay, but we can't be clearing the bit if the src domain doesn't have > access. When considering that xsm_domctl() does a no-op check for > XEN_DOMCTL_get_domain_state, deferring to xsm_get_domain_state(), then > any domain could invoke the OP with DOMID_INVALID and clear the bit > before access is checked. > > If you want to ensure atomic operations on the bit field, while I am not > a fan of this, a combination with set_bit() could be done. Let the > test_and_clear_bit() remain and then if access check fails, use > set_bit() to put it back. Would that be sufficient for your objective? No, that could then confuse a legitimate (for that domain) caller. IOW you would still build upon the domctl lock serializing things. I think you want to do the XSM check first, and only then use test_and_clear_bit(). >>> @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> >>> if ( d ) >>> { >>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>> + if ( rc ) >>> + { >>> + rcu_unlock_domain(d); >>> + rc = -ENOENT; >> >> As you don't otherwise use xsm_get_domain_state()'s return value, the need >> for this assignment can be eliminated by putting the function call straight >> in the if(). Then again, to address the remark above, overall code structure >> will need to change quite a bit anyway (so the remark here may be moot). > > I can drop the use of rc here and inline it. > >>> + dom++; >> >> It may be nice to eliminate the need to have this in two places (here and ... >> >>> + continue; >>> + } >>> + >>> set_domain_state_info(info, d); >>> >>> rcu_unlock_domain(d); >>> @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> else >>> memset(info, 0, sizeof(*info)); >>> >>> + clear_bit(dom, dom_state_changed); >>> rc = 0; >>> >>> break; >>> } >>> + >>> + dom++; >>> } >> >> ... here), by having the variable's initializer be -1 and then using dom + 1 >> in the find_next_bit() invocation. > > If you want this way, then there are two options, make dom no longer > unsigned or be willing to allow unsigned int overflow. If we go with the > former, If you agree, I would leave it as an int as that should cover > the range of valid domids. I wouldn't outright nak use of plain int, but I'm putting in effort to remove such undue uses of that type. Unsigned overflow is well-defined aiui, so I see no reason why the variable can't remain "unsigned int". Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 18 15:07:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 15:07:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235760.1538622 (Exim 4.92) (envelope-from ) id 1vsj9f-0003bH-BC; Wed, 18 Feb 2026 15:07:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235760.1538622; Wed, 18 Feb 2026 15:07:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsj9f-0003bA-8S; Wed, 18 Feb 2026 15:07:55 +0000 Received: by outflank-mailman (input) for mailman id 1235760; Wed, 18 Feb 2026 15:07:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsj9e-0003b4-JX for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 15:07:54 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 97454d08-0cdb-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 16:07:51 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 177142725546081.76358738386705; Wed, 18 Feb 2026 07:07:35 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 97454d08-0cdb-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771427258; cv=none; d=zohomail.com; s=zohoarc; b=MdXFggL9Jv86EBPvlQJvKF4D+lOwWk37N/jR09q7SdI841lGo2up72Bki3oPRkPOMZ0OcGE0WFl6CQTtJdnPTbPjPmVWgrTW4+Ef4yL1PIkrBnRdQhmktVypD/RnlcSjREo9iCXBOal7WjDYUn94E7mePKsS/oE+RxrC6FPhKa4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771427258; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=SLiF2dzEyNveNiVrCEoCf3nJAv8q/LyeCq3ExQJQuB4=; b=GnFVMCAeA05Lvc3vcVnAL+SgdCQRztfx43iCMlgshHXaZxlFA1k0Fsi14hJn8oeB5iDCaRKY1gByUkmrXJrIjDz9sgF67D2AjSpdHvAXYISd7K6VAtO9rxSi+mVvGLwlQMtEsLHJVQZYcmFZaITsaZLNakfUrb9UdSzXFGSmpNA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771427258; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=SLiF2dzEyNveNiVrCEoCf3nJAv8q/LyeCq3ExQJQuB4=; b=JqsAw03dBieLeH8kRZAd05QBuFNXg13CErScmVVGwc2+8HsNqUO0178xI75/HKue pxBSt7MTm6vscjA+It8Pu8z6aPnAuMQefHDI2lWste006hqZ/HTo9BhtmWpdFn/i4J5 vlM1xxufqK5g07yMtinadZEkx7VBxESpPOfhTucw= Message-ID: <053d2624-2891-4534-83f0-b05e190afe3b@apertussolutions.com> Date: Wed, 18 Feb 2026 10:07:33 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding Content-Language: en-US To: Stefano Stabellini , Jan Beulich Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/13/26 15:09, Stefano Stabellini wrote: > On Tue, 10 Feb 2026, Jan Beulich wrote: >> On 10.02.2026 00:23, Stefano Stabellini wrote: >>> On Mon, 9 Feb 2026, Jan Beulich wrote: >>>> On 05.02.2026 00:37, Stefano Stabellini wrote: >>>>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from >>>>> global to VIRQ_DOMAIN to allow other domains to bind to it. >>>>> >>>>> Note that Linux silently falls back to polling when binding fails, which >>>>> masks the issue. >>>>> >>>>> Signed-off-by: Jason Andryuk >>>>> Signed-off-by: Stefano Stabellini >>>> >>>> Technically this is an ABI change, and hence I'm uncertain it can go without >>>> that aspect being at least mentioned, perhaps even its implications properly >>>> discussed. >>> >>> I am not sure if it qualifies as an ABI change or not but I am happy to >>> expand the commit message in any way you might suggest. >>> >>> The jist of it is already in the commit message, really the key element >>> is that VIRQ_CONSOLE can be bound by multiple domains. >>> >>> Aside from spelling out "this is an ABI change" what do you have in >>> mind? >> >> What I mean is discussion of the implications for domains using the vIRQ. >> Previously most domains would have attempts to bind this vIRQ rejected. >> Technically it is possible that kernels had code paths blindly doing the >> binding, relying on it to work only when running as Dom0. And really, you >> appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, >> without which its binding wasn't possible at all before (except for the >> hardware domain, which get_global_virq_handler() falls back to when no >> other domain is set). Or am I mis-reading things, as I can't spot any use >> of VIRQ_CONSOLE under tools/, whereas I would have expected provisions >> for (host) console handling to be delegated to a separate control or >> console domain? Of course other toolstacks (the XAPI-based one for >> example) might actually have such provisions. >> >> And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously >> is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type >> vIRQ-s. Yet this vIRQ isn't supposed to be universally available to >> every DomU. Instead the ->console->input_allowed checking is kind of >> substituting such a check, which iirc Daniel said (in more general >> context) shouldn't ever be done. IOW in patch 5 you're actually effecting >> policy, which should be XSM's job aiui. >> >> Bottom line: The patch may need to be more involved, but at the very >> least the description would need updating to justify it being as simple >> as it is right now. > > What do you think of this: > > --- > > xen/console: change VIRQ_CONSOLE from global to per-domain > > Previously VIRQ_CONSOLE was a global VIRQ (VIRQ_GLOBAL type), meaning > only the hardware domain (or a domain explicitly set via > XEN_DOMCTL_set_virq_handler) could bind it. Any other domain attempting > to bind would fail with -EBUSY because get_global_virq_handler() would > return hwdom by default. > > This patch changes VIRQ_CONSOLE to VIRQ_DOMAIN type, allowing any domain > to bind it independently, similar to VIRQ_ARGO. The console notification > is now sent via send_guest_domain_virq() directly to the focus domain > rather than through send_global_virq(). > > Implications: > > 1. Guest kernels that previously called bind on VIRQ_CONSOLE blindly > will now succeed. Linux handles binding failure gracefully by falling > back to polling, so this should not cause regressions. > > 2. XEN_DOMCTL_set_virq_handler can no longer be used with VIRQ_CONSOLE. > The domctl explicitly rejects non-VIRQ_GLOBAL types. This means > toolstacks that relied on set_virq_handler to delegate console handling > to a separate console domain will need to use a different mechanism. > Note: No known in-tree toolstack uses set_virq_handler with VIRQ_CONSOLE. > > 3. VIRQ_DOMAIN bindings are not subject to XSM checks beyond the > standard event channel allocation policy. Access control for console > input is enforced via the per-domain console->input_allowed flag, > which is set for: > - The hardware domain (by default in domain_create()) > - dom0less domains on ARM (in construct_domU()) > - The PV shim domain on x86 (in pv_shim_setup_dom()) > - Domains with vpl011 using the Xen backend (in domain_vpl011_init()) Actually this goes back to the concern I have raised many times, is_hardware_domain() always serves a double purpose. The explicit check that the domain is where the hardware is, but also the implicit access control check that it is allowed to do the hardware access. The implicit access control check is a subversion of XSM and the reality is that the input_allowed flag is just unmasking this subversion for an explicit access control check outside the purview of xsm. v/r, dps From xen-devel-bounces@lists.xenproject.org Wed Feb 18 15:15:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 15:15:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235769.1538632 (Exim 4.92) (envelope-from ) id 1vsjGR-0005B5-10; Wed, 18 Feb 2026 15:14:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235769.1538632; Wed, 18 Feb 2026 15:14:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjGQ-0005Ay-UZ; Wed, 18 Feb 2026 15:14:54 +0000 Received: by outflank-mailman (input) for mailman id 1235769; Wed, 18 Feb 2026 15:14:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjGP-0005As-NM for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 15:14:53 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9230145e-0cdc-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 16:14:51 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so59828295e9.1 for ; Wed, 18 Feb 2026 07:14:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org, Stefano Stabellini References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> <053d2624-2891-4534-83f0-b05e190afe3b@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <053d2624-2891-4534-83f0-b05e190afe3b@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 16:07, Daniel P. Smith wrote: > On 2/13/26 15:09, Stefano Stabellini wrote: >> On Tue, 10 Feb 2026, Jan Beulich wrote: >>> On 10.02.2026 00:23, Stefano Stabellini wrote: >>>> On Mon, 9 Feb 2026, Jan Beulich wrote: >>>>> On 05.02.2026 00:37, Stefano Stabellini wrote: >>>>>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from >>>>>> global to VIRQ_DOMAIN to allow other domains to bind to it. >>>>>> >>>>>> Note that Linux silently falls back to polling when binding fails, which >>>>>> masks the issue. >>>>>> >>>>>> Signed-off-by: Jason Andryuk >>>>>> Signed-off-by: Stefano Stabellini >>>>> >>>>> Technically this is an ABI change, and hence I'm uncertain it can go without >>>>> that aspect being at least mentioned, perhaps even its implications properly >>>>> discussed. >>>> >>>> I am not sure if it qualifies as an ABI change or not but I am happy to >>>> expand the commit message in any way you might suggest. >>>> >>>> The jist of it is already in the commit message, really the key element >>>> is that VIRQ_CONSOLE can be bound by multiple domains. >>>> >>>> Aside from spelling out "this is an ABI change" what do you have in >>>> mind? >>> >>> What I mean is discussion of the implications for domains using the vIRQ. >>> Previously most domains would have attempts to bind this vIRQ rejected. >>> Technically it is possible that kernels had code paths blindly doing the >>> binding, relying on it to work only when running as Dom0. And really, you >>> appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, >>> without which its binding wasn't possible at all before (except for the >>> hardware domain, which get_global_virq_handler() falls back to when no >>> other domain is set). Or am I mis-reading things, as I can't spot any use >>> of VIRQ_CONSOLE under tools/, whereas I would have expected provisions >>> for (host) console handling to be delegated to a separate control or >>> console domain? Of course other toolstacks (the XAPI-based one for >>> example) might actually have such provisions. >>> >>> And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously >>> is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type >>> vIRQ-s. Yet this vIRQ isn't supposed to be universally available to >>> every DomU. Instead the ->console->input_allowed checking is kind of >>> substituting such a check, which iirc Daniel said (in more general >>> context) shouldn't ever be done. IOW in patch 5 you're actually effecting >>> policy, which should be XSM's job aiui. >>> >>> Bottom line: The patch may need to be more involved, but at the very >>> least the description would need updating to justify it being as simple >>> as it is right now. >> >> What do you think of this: >> >> --- >> >> xen/console: change VIRQ_CONSOLE from global to per-domain >> >> Previously VIRQ_CONSOLE was a global VIRQ (VIRQ_GLOBAL type), meaning >> only the hardware domain (or a domain explicitly set via >> XEN_DOMCTL_set_virq_handler) could bind it. Any other domain attempting >> to bind would fail with -EBUSY because get_global_virq_handler() would >> return hwdom by default. >> >> This patch changes VIRQ_CONSOLE to VIRQ_DOMAIN type, allowing any domain >> to bind it independently, similar to VIRQ_ARGO. The console notification >> is now sent via send_guest_domain_virq() directly to the focus domain >> rather than through send_global_virq(). >> >> Implications: >> >> 1. Guest kernels that previously called bind on VIRQ_CONSOLE blindly >> will now succeed. Linux handles binding failure gracefully by falling >> back to polling, so this should not cause regressions. >> >> 2. XEN_DOMCTL_set_virq_handler can no longer be used with VIRQ_CONSOLE. >> The domctl explicitly rejects non-VIRQ_GLOBAL types. This means >> toolstacks that relied on set_virq_handler to delegate console handling >> to a separate console domain will need to use a different mechanism. >> Note: No known in-tree toolstack uses set_virq_handler with VIRQ_CONSOLE. >> >> 3. VIRQ_DOMAIN bindings are not subject to XSM checks beyond the >> standard event channel allocation policy. Access control for console >> input is enforced via the per-domain console->input_allowed flag, >> which is set for: >> - The hardware domain (by default in domain_create()) >> - dom0less domains on ARM (in construct_domU()) >> - The PV shim domain on x86 (in pv_shim_setup_dom()) >> - Domains with vpl011 using the Xen backend (in domain_vpl011_init()) > > Actually this goes back to the concern I have raised many times, > is_hardware_domain() always serves a double purpose. The explicit check > that the domain is where the hardware is, but also the implicit access > control check that it is allowed to do the hardware access. The implicit > access control check is a subversion of XSM and the reality is that the > input_allowed flag is just unmasking this subversion for an explicit > access control check outside the purview of xsm. I don't think I can deduce from this what your view is on the change proposed. There is, as per what you say, an existing issue with is_hardware_domain(). (Likely at some point you'll propose patches to address this.) What I can't conclude is whether you deem this new issue "okay(ish)" on the basis that some vaguely related issue already exists, or whether you object to this new way of "subversion". Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 18 15:32:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 15:32:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235784.1538642 (Exim 4.92) (envelope-from ) id 1vsjXa-00086q-E5; Wed, 18 Feb 2026 15:32:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235784.1538642; Wed, 18 Feb 2026 15:32:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjXa-00086j-BW; Wed, 18 Feb 2026 15:32:38 +0000 Received: by outflank-mailman (input) for mailman id 1235784; Wed, 18 Feb 2026 15:32:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjXZ-00086a-07 for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 15:32:37 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0b27d431-0cdf-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 16:32:34 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771428738518314.377186003945; Wed, 18 Feb 2026 07:32:18 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0b27d431-0cdf-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; t=1771428741; cv=none; d=zohomail.com; s=zohoarc; b=QeVDekkCz7Hg6om11Fnf/bHZX7NfPngvtHxKfXB+w7s4TSgGinEG3nWIlOH1A5yYqruwGc7w/tpwZjjC3PN4ZBVGyhbvH13cg2kk5YUmvALmL75Tw+DAiZRi5x2kyn17sFHFRZKP/G1Zx2tQh/Z2D4sPG3ffCk8xDvHLX6ep+Ms= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771428741; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=E35620rmUtu6PylGVwk0u/YqL4VTmXOxI+NG527ONzs=; b=VsNcJnZgpQyAbBkyMii9nOd8ehlpmTnFyqkDHP8uAMM9GdXoFokrDAGhN986e30DmHoodyeyFW7qgPVKdHU4rGq0f40Q2C3Fxe92Vb2gZiV4kUIJfJDM9h5anuLuELcZiGfU5EszbuVc+Mhytg9ugxUKVq+Bi5bZbszfnUWeLQE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771428741; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=E35620rmUtu6PylGVwk0u/YqL4VTmXOxI+NG527ONzs=; b=c/HoKttM+dXpW7w75GKyxD7cqHxG5pE8ovNL1Au3rt/OXycdWCAcXneNb33GTyi8 2uyUjF3S5MCWwScIAiBXmldmYaaXlf1PUUVBJyz/0TTnFVr9L3sYRtNJFKrSG2c8I/U x5rR/KTf4H5+OzLACL59/EvUpg/dxdJbo0uXcCnE= Message-ID: <2ac8e0ec-54ab-4485-b0f4-a49920726d0f@apertussolutions.com> Date: Wed, 18 Feb 2026 10:32:16 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jan Beulich Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> <57074bdb-6af9-4cd8-b1da-d348757ca168@suse.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <57074bdb-6af9-4cd8-b1da-d348757ca168@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/18/26 10:03, Jan Beulich wrote: > On 18.02.2026 15:33, Daniel P. Smith wrote: >> On 2/17/26 04:34, Jan Beulich wrote: >>> On 16.02.2026 22:57, Daniel P. Smith wrote: >>>> --- a/xen/common/domain.c >>>> +++ b/xen/common/domain.c >>>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >>>> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> domid_t *domid) >>>> { >>>> - unsigned int dom; >>>> + unsigned int dom = 0; >>>> int rc = -ENOENT; >>>> struct domain *hdl; >>>> >>>> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> >>>> if ( d ) >>>> { >>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>> + if ( rc ) >>>> + return rc; >>>> + >>>> set_domain_state_info(info, d); >>>> >>>> return 0; >>>> @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> >>>> while ( dom_state_changed ) >>>> { >>>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); >>>> if ( dom >= DOMID_FIRST_RESERVED ) >>>> break; >>>> - if ( test_and_clear_bit(dom, dom_state_changed) ) >>>> + if ( test_bit(dom, dom_state_changed) ) >>>> { >>>> *domid = dom; >>> >>> This is problematic wrt other work (already talked about in the distant past, >>> but sadly only making little progress) towards trying to pull some of the >>> sub-ops out of the domctl-locked region. This subop is one of the prime >>> candidates, yet only if the test_and_clear_bit() remains here. >> >> Okay, but we can't be clearing the bit if the src domain doesn't have >> access. When considering that xsm_domctl() does a no-op check for >> XEN_DOMCTL_get_domain_state, deferring to xsm_get_domain_state(), then >> any domain could invoke the OP with DOMID_INVALID and clear the bit >> before access is checked. >> >> If you want to ensure atomic operations on the bit field, while I am not >> a fan of this, a combination with set_bit() could be done. Let the >> test_and_clear_bit() remain and then if access check fails, use >> set_bit() to put it back. Would that be sufficient for your objective? > > No, that could then confuse a legitimate (for that domain) caller. IOW > you would still build upon the domctl lock serializing things. I think > you want to do the XSM check first, and only then use test_and_clear_bit(). > Currently, acquiring the struct domain pointer is inside the if condition. This would have to be moved outside the if condition to be able to do the access check before calling the bit operation. Which brings up the question for me, if it is reordered in this fashion, why not use clear_bit(), aiui it should be atomic as well. >>>> @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> >>>> if ( d ) >>>> { >>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>> + if ( rc ) >>>> + { >>>> + rcu_unlock_domain(d); >>>> + rc = -ENOENT; >>> >>> As you don't otherwise use xsm_get_domain_state()'s return value, the need >>> for this assignment can be eliminated by putting the function call straight >>> in the if(). Then again, to address the remark above, overall code structure >>> will need to change quite a bit anyway (so the remark here may be moot). >> >> I can drop the use of rc here and inline it. >> >>>> + dom++; >>> >>> It may be nice to eliminate the need to have this in two places (here and ... >>> >>>> + continue; >>>> + } >>>> + >>>> set_domain_state_info(info, d); >>>> >>>> rcu_unlock_domain(d); >>>> @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> else >>>> memset(info, 0, sizeof(*info)); >>>> >>>> + clear_bit(dom, dom_state_changed); >>>> rc = 0; >>>> >>>> break; >>>> } >>>> + >>>> + dom++; >>>> } >>> >>> ... here), by having the variable's initializer be -1 and then using dom + 1 >>> in the find_next_bit() invocation. >> >> If you want this way, then there are two options, make dom no longer >> unsigned or be willing to allow unsigned int overflow. If we go with the >> former, If you agree, I would leave it as an int as that should cover >> the range of valid domids. > > I wouldn't outright nak use of plain int, but I'm putting in effort to remove > such undue uses of that type. Unsigned overflow is well-defined aiui, so I > see no reason why the variable can't remain "unsigned int". Honestly, I'm not sure why it was not domid_t in the first place. I can't keep all the rules, but I thought MISRA frowned on overflow usages (abuse?) like this. If you will ack it with it as a uint or as a domid_t, then I have no issue doing it this way. v/r, dps From xen-devel-bounces@lists.xenproject.org Wed Feb 18 15:47:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 15:47:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235804.1538654 (Exim 4.92) (envelope-from ) id 1vsjm6-0001c4-Jt; Wed, 18 Feb 2026 15:47:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235804.1538654; Wed, 18 Feb 2026 15:47:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjm6-0001bw-Fj; Wed, 18 Feb 2026 15:47:38 +0000 Received: by outflank-mailman (input) for mailman id 1235804; Wed, 18 Feb 2026 15:47:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjm5-0001aX-Am for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 15:47:37 +0000 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [2a00:1450:4864:20::42a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 251cd65f-0ce1-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 16:47:35 +0100 (CET) Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-4376acce52eso3572443f8f.1 for ; Wed, 18 Feb 2026 07:47:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> <57074bdb-6af9-4cd8-b1da-d348757ca168@suse.com> <2ac8e0ec-54ab-4485-b0f4-a49920726d0f@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2ac8e0ec-54ab-4485-b0f4-a49920726d0f@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 16:32, Daniel P. Smith wrote: > On 2/18/26 10:03, Jan Beulich wrote: >> On 18.02.2026 15:33, Daniel P. Smith wrote: >>> On 2/17/26 04:34, Jan Beulich wrote: >>>> On 16.02.2026 22:57, Daniel P. Smith wrote: >>>>> --- a/xen/common/domain.c >>>>> +++ b/xen/common/domain.c >>>>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >>>>> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>> domid_t *domid) >>>>> { >>>>> - unsigned int dom; >>>>> + unsigned int dom = 0; >>>>> int rc = -ENOENT; >>>>> struct domain *hdl; >>>>> >>>>> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>> >>>>> if ( d ) >>>>> { >>>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>>> + if ( rc ) >>>>> + return rc; >>>>> + >>>>> set_domain_state_info(info, d); >>>>> >>>>> return 0; >>>>> @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>> >>>>> while ( dom_state_changed ) >>>>> { >>>>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); >>>>> if ( dom >= DOMID_FIRST_RESERVED ) >>>>> break; >>>>> - if ( test_and_clear_bit(dom, dom_state_changed) ) >>>>> + if ( test_bit(dom, dom_state_changed) ) >>>>> { >>>>> *domid = dom; >>>> >>>> This is problematic wrt other work (already talked about in the distant past, >>>> but sadly only making little progress) towards trying to pull some of the >>>> sub-ops out of the domctl-locked region. This subop is one of the prime >>>> candidates, yet only if the test_and_clear_bit() remains here. >>> >>> Okay, but we can't be clearing the bit if the src domain doesn't have >>> access. When considering that xsm_domctl() does a no-op check for >>> XEN_DOMCTL_get_domain_state, deferring to xsm_get_domain_state(), then >>> any domain could invoke the OP with DOMID_INVALID and clear the bit >>> before access is checked. >>> >>> If you want to ensure atomic operations on the bit field, while I am not >>> a fan of this, a combination with set_bit() could be done. Let the >>> test_and_clear_bit() remain and then if access check fails, use >>> set_bit() to put it back. Would that be sufficient for your objective? >> >> No, that could then confuse a legitimate (for that domain) caller. IOW >> you would still build upon the domctl lock serializing things. I think >> you want to do the XSM check first, and only then use test_and_clear_bit(). > > Currently, acquiring the struct domain pointer is inside the if > condition. This would have to be moved outside the if condition to be > able to do the access check before calling the bit operation. Which > brings up the question for me, if it is reordered in this fashion, why > not use clear_bit(), aiui it should be atomic as well. The problem isn't with clear_bit() by itself (yes, it is atomic), but with how things want doing here: The test-and-clear ensures data for a given domain can only be retrieved exactly once (until the bit would be set another time later). With test split from clear, multiple callers could get data for the same domain, as in the window between test and clear a 2nd caller can come in and also commit to returning data for that domain. (Given the restriction on who can invoke this, one might conclude no such race is possible, but that single domain could process things on multiple vCPU-s, and would then wrongly be notified twice for the same domain.) >>>>> @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>> >>>>> if ( d ) >>>>> { >>>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>>> + if ( rc ) >>>>> + { >>>>> + rcu_unlock_domain(d); >>>>> + rc = -ENOENT; >>>> >>>> As you don't otherwise use xsm_get_domain_state()'s return value, the need >>>> for this assignment can be eliminated by putting the function call straight >>>> in the if(). Then again, to address the remark above, overall code structure >>>> will need to change quite a bit anyway (so the remark here may be moot). >>> >>> I can drop the use of rc here and inline it. >>> >>>>> + dom++; >>>> >>>> It may be nice to eliminate the need to have this in two places (here and ... >>>> >>>>> + continue; >>>>> + } >>>>> + >>>>> set_domain_state_info(info, d); >>>>> >>>>> rcu_unlock_domain(d); >>>>> @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>> else >>>>> memset(info, 0, sizeof(*info)); >>>>> >>>>> + clear_bit(dom, dom_state_changed); >>>>> rc = 0; >>>>> >>>>> break; >>>>> } >>>>> + >>>>> + dom++; >>>>> } >>>> >>>> ... here), by having the variable's initializer be -1 and then using dom + 1 >>>> in the find_next_bit() invocation. >>> >>> If you want this way, then there are two options, make dom no longer >>> unsigned or be willing to allow unsigned int overflow. If we go with the >>> former, If you agree, I would leave it as an int as that should cover >>> the range of valid domids. >> >> I wouldn't outright nak use of plain int, but I'm putting in effort to remove >> such undue uses of that type. Unsigned overflow is well-defined aiui, so I >> see no reason why the variable can't remain "unsigned int". > > Honestly, I'm not sure why it was not domid_t in the first place. I > can't keep all the rules, but I thought MISRA frowned on overflow usages > (abuse?) like this. If you will ack it with it as a uint or as a > domid_t, then I have no issue doing it this way. A patch without changing the type I would ack. A switch to domid_t, if indeed correct (I simply didn't go check yet), likely would want to be a separate change. Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 18 15:50:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 15:50:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235812.1538662 (Exim 4.92) (envelope-from ) id 1vsjoX-0003A0-Ue; Wed, 18 Feb 2026 15:50:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235812.1538662; Wed, 18 Feb 2026 15:50:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjoX-00039t-S1; Wed, 18 Feb 2026 15:50:09 +0000 Received: by outflank-mailman (input) for mailman id 1235812; Wed, 18 Feb 2026 15:50:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsjoX-00039n-An for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <259b799d-33bb-4180-9816-f9bc316b8d9f@amd.com> Date: Wed, 18 Feb 2026 10:50:01 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/5] vPCI: move vpci_init_capabilities() to a separate file To: Jan Beulich , "xen-devel@lists.xenproject.org" CC: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> Content-Language: en-US From: Stewart Hildebrand In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000C:EE_|SA1PR12MB9469:EE_ X-MS-Office365-Filtering-Correlation-Id: e5e801c2-8075-4995-9811-08de6f055f85 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?dWI2ZzRrYW1XajNSSzI2N091bHR5dEZUVTAvWG43M1QzT1lCY2g1cUpxMC9O?= =?utf-8?B?RXl6dWVCYk5GbGZaaEhEbWtJWmpQL3licHByNE5kL2FqYWs5a0M1MVZoQld0?= =?utf-8?B?RjUwVytJWkhDZ1NHV3JGWXFZZWhuM25FSXRTSDR5dGJUN0UzODBjVE91NkZO?= =?utf-8?B?T3lGNlNiOWdGc3hnMEc1SG1VSGViVGtNRFMybVlOeDFOeGRieUszN2s5QVE0?= =?utf-8?B?ekJ5Lyt6aXU4TGFiVHA0eERZWWdqVVVLclZGT1Z2RkhJZGhsVHpyNyt2QVlr?= =?utf-8?B?QW9QVEJwdXhiQkN6MTZUVno5VHBvaERPRTVub3ZrVU50RTV5SnNjZnJRVUVa?= =?utf-8?B?S3pWYTZOd0Vpa2daRFBNbld3MHdNYTNpWDFHSXhQTzRLSjVqUUQydkZ3VDFJ?= =?utf-8?B?cDh5SEYrK3Fqc0VnUEMwd2RDRTN3V05wU2k2MVhwcUNBU3dMNDgzOGtLTUdK?= =?utf-8?B?TEZDNDIwL1BtODZ4OVhOZUxGZUtJdXhHZUxsK1N0M2Q2SUNrWHlnejc4dzht?= =?utf-8?B?OXE0dXZHNTd4SlRSSmN0ZHVmRnpraGZOUVRONGVGMTNWd2dxb1RqN1lvR1hz?= =?utf-8?B?Umo4RmU5WVREbFg2ZGhIMjF0eHpNT1lQZm1JYXd5S3oxZzNEanN0U3BtaVll?= =?utf-8?B?N01LTTMwVitxUWJBYldpRFA4YmRZVnU1czEzRDU4V1NqdGM5VzZPYTdDZXVy?= =?utf-8?B?MUY4dzE4eHptY095dG9FS2psRk5TQTkrcTZtRFhuWEp4anFGM2NqUkxUWWI1?= =?utf-8?B?elJVcExJdTJWdW5YV1Z3TkhDb0t3STVLd2doYVphaFVtYWhTZVhGSElJL0dY?= =?utf-8?B?TTF3ekpUVnQxYmRuU2ViMDQ4WFlCemFkbHZkT0NlNXdzSnN1djkzLzU4aDZu?= =?utf-8?B?OUZDTFVEZHRMN3IwakJHMzdZZmhGc0JlMElRb3hJeHRzb1pMVmdHQ2VOYWFF?= =?utf-8?B?RnpzTmRENWsrNUFOSXdBUW5BMDJ4VXlTQmRBaWRXQllkK281Rlp4VnRvN1Vs?= =?utf-8?B?ejY5eTRXZEVxN0I2Q25ES3l5QXBKMDRXOFBWeG9ZVkw5M1BidzJST090ak84?= =?utf-8?B?UjJxaFhQNm1SRXVRWXFLSUFOa092UjlCQVBTdXRLMExhS0ZGS05Wd0NvM2tC?= =?utf-8?B?c1VqRjIra0o3dElOLzZIV3dLeTVxMmJ3ODM0bERHQWh2R01zWnY3a1EwZDJP?= =?utf-8?B?QTZ0cTRUdm5FL1QzYUZITzQrbnV4enh5Nlh2UTVaYU5oME5XeTgxZWMxbDBz?= =?utf-8?B?UngyS0dtbnpsSEU2aVB0Z29sTG1ENUd1SFo1dDJBakxFTTZJWUQxR3JBdFpG?= =?utf-8?B?d3pIU2doR09sR2dSSEQvZkhqRnk0bjQ5NVFVYWRoemludkllV2pqdzJ2Q2hi?= =?utf-8?B?MXo5bmhZMlZXaFBlZGNvMkFGN2JMUkd6dUVXRmQrdUZtRXpldEhVQzhoRXdN?= =?utf-8?B?Z0k4MnBlY3RtOEZEeUxIc3ZHc1NZVFNtUy94c2Q0WXVGemR2NVBVU0JmbVlI?= =?utf-8?B?RmV4R05hT2kyeHowZTY4ZGpvbG9oNVNZdWpDZ1N5QjJ3WisvZk50RWlVWER0?= =?utf-8?B?K1diWDJsZCtNZ3NrY2V1ZWJqaHJ3RnpwMTMvQkFLWERCdjFmQ0kxNG9CQUJ6?= =?utf-8?B?dC83VmErb1RreFlySzkwbzJRUmUvVlFOM0lnOVAvTmc5N2U5SmJvR2d4UzRN?= =?utf-8?B?UHdmMWtOQ053TEVuMis2OG9UeHZQRzQyTlJhUVd1N1FQcUdvUzFndFU5WXh6?= =?utf-8?B?ZlJXTGdZQm1Ycm91ZFk1N3B5ZmlFMTFscXE2aFdEMU80TENLZGR6SXdJMWR0?= =?utf-8?B?dFFXWmRuU3oyRER0eURJRElETE4vNktPZTNyWWVWakZBNWE1NHdHOVBhZ1c1?= =?utf-8?B?cmljMkZrNWJtMkdMR3BPMCtldjBwanN4Z2ZFTERqMnVJdithR3FpYll4SmVU?= =?utf-8?B?NmlHaTV1ODZrZDh4czQySGlLanFKck40ZnRJNmN5d21GQzAyclhMV1JjR2Yz?= =?utf-8?B?V2ZzVnp2dWkyY0RHVkNLb3lFaTVnTEVEU21BUGpBYklKNktvRnUvcEtXL2Rr?= =?utf-8?B?Q1hydlQ2L0Z2cnJWYnNQNnJ2aW1ySCtJQjlDaTE0cGkwcGpjQnFCc3dLazNk?= =?utf-8?B?SU1OTk1OU1NJQnVkOFczd3MvVEJFbXExNSthUmJoTENvaUtLWlNUaEVyVTFY?= =?utf-8?B?YnVaS3ByQmFIbUYyZlZkYVJHRUEwd25jNU0raHRwYTJEY2FGSHdwUXJ4aUNW?= =?utf-8?B?azdpNTFsMXd0WHlQRi9MS2d3dlVBPT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024)(7053199007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0g6y1M5VhnkZ1WjYa5NmelttlMXnUN0HE4EkYoItzSLBOO12mZ1dKMYZ9GwjQwDnch1Tfq5zSy5B9zArP2eSCID9NJBYxqgkzmwzLgD1a3yxNdTLNNL7bakfr/c/USyvu2fGYOjlPF73FOaTFq+r1waDcQ0bdzGJOBBxrdqXXEZ4IVbSxOPGF92zwnCw6Td/00GCXKgfxHcvYYIg90ookUGgI1VegreEIurGpY3auNNACVLeqBSOnWPcUOcLxjjRJdcwqw7RLdA5Dl/Zo+J+eRxUruPqIcUGJve47XW1XZp+qqjLhTizOndP5lZpJchyuTMa8SfAMGVG+nq2sh5zlGhI+5wRGG7C9bpZOJ2+rOeSB8ScS2ToRyiYlW+aC1KPaSkvI9mLfhtO583eM2k7D7HQt9vRD9NXkaUvvGYwpFT7iAWj9ZuYP4VguXGgp0F7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 15:50:00.0766 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e5e801c2-8075-4995-9811-08de6f055f85 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000C.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9469 On 2/10/26 05:54, Jan Beulich wrote: > Let's keep capability handling together. Start with moving > vpci_init_capabilities() and its helpers, plus splitting out of its > cleanup counterpart. > > Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand > --- > vpci_get_register(), while now only used by cap.c, didn't look like it > would want moving there. OK. It seems potential opportunities for compiler optimizations would be small anyway, and this is not a hot path. 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ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771430893; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=fWRXMj7PK6kMHx6AVdRzCrEyKuz94e5VKxOetrzHKTQ=; b=JSH1WcTpJG2IAQ2NEhj+qb1ldiJzCMfmMrbPcfY2BHDs7rFX2pY4Q9TqQBalBTk6 mX2j7mGAUwvjQk1ZIxvDnmGXauw2DPlsxj1cMsSDE2MPVANv4iHJu4bQRLNxenkrnDu bEWgEGO92Vb97NCxAVrH8rB8hsb7rCwZ3PTvRXcs= Message-ID: <89173609-0089-4c89-a924-2feb88e77308@apertussolutions.com> Date: Wed, 18 Feb 2026 11:08:08 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/5] xen: change VIRQ_CONSOLE to VIRQ_DOMAIN to allow non-hwdom binding Content-Language: en-US To: Jan Beulich Cc: Stefano Stabellini , grygorii_strashko@epam.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, jason.andryuk@amd.com, victorm.lira@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org, Stefano Stabellini References: <20260204233712.3396752-2-stefano.stabellini@amd.com> <82c06e52-1db0-46e5-be9f-7ca0360ffc70@suse.com> <43e80ad6-7b42-42de-b36f-1a9079589912@suse.com> <053d2624-2891-4534-83f0-b05e190afe3b@apertussolutions.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/18/26 10:14, Jan Beulich wrote: > On 18.02.2026 16:07, Daniel P. Smith wrote: >> On 2/13/26 15:09, Stefano Stabellini wrote: >>> On Tue, 10 Feb 2026, Jan Beulich wrote: >>>> On 10.02.2026 00:23, Stefano Stabellini wrote: >>>>> On Mon, 9 Feb 2026, Jan Beulich wrote: >>>>>> On 05.02.2026 00:37, Stefano Stabellini wrote: >>>>>>> Today only hwdom can bind VIRQ_CONSOLE. This patch changes the virq from >>>>>>> global to VIRQ_DOMAIN to allow other domains to bind to it. >>>>>>> >>>>>>> Note that Linux silently falls back to polling when binding fails, which >>>>>>> masks the issue. >>>>>>> >>>>>>> Signed-off-by: Jason Andryuk >>>>>>> Signed-off-by: Stefano Stabellini >>>>>> >>>>>> Technically this is an ABI change, and hence I'm uncertain it can go without >>>>>> that aspect being at least mentioned, perhaps even its implications properly >>>>>> discussed. >>>>> >>>>> I am not sure if it qualifies as an ABI change or not but I am happy to >>>>> expand the commit message in any way you might suggest. >>>>> >>>>> The jist of it is already in the commit message, really the key element >>>>> is that VIRQ_CONSOLE can be bound by multiple domains. >>>>> >>>>> Aside from spelling out "this is an ABI change" what do you have in >>>>> mind? >>>> >>>> What I mean is discussion of the implications for domains using the vIRQ. >>>> Previously most domains would have attempts to bind this vIRQ rejected. >>>> Technically it is possible that kernels had code paths blindly doing the >>>> binding, relying on it to work only when running as Dom0. And really, you >>>> appear to break XEN_DOMCTL_set_virq_handler when used with VIRQ_CONSOLE, >>>> without which its binding wasn't possible at all before (except for the >>>> hardware domain, which get_global_virq_handler() falls back to when no >>>> other domain is set). Or am I mis-reading things, as I can't spot any use >>>> of VIRQ_CONSOLE under tools/, whereas I would have expected provisions >>>> for (host) console handling to be delegated to a separate control or >>>> console domain? Of course other toolstacks (the XAPI-based one for >>>> example) might actually have such provisions. >>>> >>>> And then there's the XSM question: XEN_DOMCTL_set_virq_handler obviously >>>> is subject to XSM checking. The same isn't true for VIRQ_DOMAIN-type >>>> vIRQ-s. Yet this vIRQ isn't supposed to be universally available to >>>> every DomU. Instead the ->console->input_allowed checking is kind of >>>> substituting such a check, which iirc Daniel said (in more general >>>> context) shouldn't ever be done. IOW in patch 5 you're actually effecting >>>> policy, which should be XSM's job aiui. >>>> >>>> Bottom line: The patch may need to be more involved, but at the very >>>> least the description would need updating to justify it being as simple >>>> as it is right now. >>> >>> What do you think of this: >>> >>> --- >>> >>> xen/console: change VIRQ_CONSOLE from global to per-domain >>> >>> Previously VIRQ_CONSOLE was a global VIRQ (VIRQ_GLOBAL type), meaning >>> only the hardware domain (or a domain explicitly set via >>> XEN_DOMCTL_set_virq_handler) could bind it. Any other domain attempting >>> to bind would fail with -EBUSY because get_global_virq_handler() would >>> return hwdom by default. >>> >>> This patch changes VIRQ_CONSOLE to VIRQ_DOMAIN type, allowing any domain >>> to bind it independently, similar to VIRQ_ARGO. The console notification >>> is now sent via send_guest_domain_virq() directly to the focus domain >>> rather than through send_global_virq(). >>> >>> Implications: >>> >>> 1. Guest kernels that previously called bind on VIRQ_CONSOLE blindly >>> will now succeed. Linux handles binding failure gracefully by falling >>> back to polling, so this should not cause regressions. >>> >>> 2. XEN_DOMCTL_set_virq_handler can no longer be used with VIRQ_CONSOLE. >>> The domctl explicitly rejects non-VIRQ_GLOBAL types. This means >>> toolstacks that relied on set_virq_handler to delegate console handling >>> to a separate console domain will need to use a different mechanism. >>> Note: No known in-tree toolstack uses set_virq_handler with VIRQ_CONSOLE. >>> >>> 3. VIRQ_DOMAIN bindings are not subject to XSM checks beyond the >>> standard event channel allocation policy. Access control for console >>> input is enforced via the per-domain console->input_allowed flag, >>> which is set for: >>> - The hardware domain (by default in domain_create()) >>> - dom0less domains on ARM (in construct_domU()) >>> - The PV shim domain on x86 (in pv_shim_setup_dom()) >>> - Domains with vpl011 using the Xen backend (in domain_vpl011_init()) >> >> Actually this goes back to the concern I have raised many times, >> is_hardware_domain() always serves a double purpose. The explicit check >> that the domain is where the hardware is, but also the implicit access >> control check that it is allowed to do the hardware access. The implicit >> access control check is a subversion of XSM and the reality is that the >> input_allowed flag is just unmasking this subversion for an explicit >> access control check outside the purview of xsm. > > I don't think I can deduce from this what your view is on the change proposed. > There is, as per what you say, an existing issue with is_hardware_domain(). > (Likely at some point you'll propose patches to address this.) What I can't > conclude is whether you deem this new issue "okay(ish)" on the basis that some > vaguely related issue already exists, or whether you object to this new way > of "subversion". Digging deeper, the underlying issue is that when struct domain_console was introduced and now this series is building upon it. The struct domain_console_patch added a resource access control check point for all domains through input_allowed that went around XSM. Now we are here with this series that is exposing what was done. To your question, am I okay(ish) with this. Not really, but it's also not the fault of Stefano or his series that the earlier commit laid this landmine for him. With all that said, thinking about it in totality, the fine-grained access control does needs to be there for tightly controlled environments, but is not necessary for a general security posture. Plus, I am going to have to think about how to correctly inlay the XSM check, which is outside the scope of this series. All of that is to say, I am not okay but don't feel it's right to block this series over it. v/r, dps From xen-devel-bounces@lists.xenproject.org Wed Feb 18 16:22:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 16:22:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235853.1538696 (Exim 4.92) (envelope-from ) id 1vskJR-0000YV-Vi; Wed, 18 Feb 2026 16:22:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235853.1538696; Wed, 18 Feb 2026 16:22:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vskJR-0000YO-TB; Wed, 18 Feb 2026 16:22:05 +0000 Received: by outflank-mailman (input) for mailman id 1235853; Wed, 18 Feb 2026 16:22:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vskJP-0000Wm-SB for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 16:22:03 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f38de3fe-0ce5-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 17:22:01 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771431707179904.2711152236781; Wed, 18 Feb 2026 08:21:47 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f38de3fe-0ce5-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771431710; cv=none; d=zohomail.com; s=zohoarc; b=HVTqkwuY4xSbqqfiI2cEKDN2464fNaHWW3P/+/kXZ7lbGwrFhMl56bWluKb6cql2Qh/smWb7IPvow9QO6rQ2UFapw/YxjufrCC2f8KSSnMYKzMMnJI+4JKu5hwNxyOD4+l6U2LthLQqggF6XoNzeAADyKiHxErX2hFv851TWnbs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771431710; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=xfAiDqNkrzWnT7mwYeVwSEgNvECd4Q6JW0hgC7t/hpo=; b=jMk6ftF4fmkmeEEKv1SP27JHSbVQw8hlpJr0RJKbkJfjTc31p2a/UIo6B/deNaq7npuCSEbIxcdZ/97Zx8d0E2rUgEvb9JdA8rrcH77KnC5OMzz6sLUila2PUENdorsadytA5sxEpmpbbkQyErdBDufB/GaZcWBu7Nu0W1W8lTQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771431710; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=xfAiDqNkrzWnT7mwYeVwSEgNvECd4Q6JW0hgC7t/hpo=; b=mbdUvqlrxzjCF0VZgUc2k/lDeHP7kIR43HpqlMIwkb7n1Qzn6dU30PpmObO3wohG czcKUI51O/aGKyMxlA414cojKAEZHl0iNXAK2h8M8DYm6/FdfhGIQ+Czwv+TIVhPArA v+q17dxLB4kKWimIh0MtSLSMyysaeANoTKxWs49Y= Message-ID: <9b4e512e-c78f-436a-99ed-08e0371cb886@apertussolutions.com> Date: Wed, 18 Feb 2026 11:21:45 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jan Beulich Cc: Chris Rogers , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260216215748.20398-1-dpsmith@apertussolutions.com> <1a1d8db1-d553-470a-8678-b879385b2fec@suse.com> <57074bdb-6af9-4cd8-b1da-d348757ca168@suse.com> <2ac8e0ec-54ab-4485-b0f4-a49920726d0f@apertussolutions.com> <158de6d6-f7ef-453c-9c78-00c4d785bcd1@suse.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <158de6d6-f7ef-453c-9c78-00c4d785bcd1@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/18/26 10:47, Jan Beulich wrote: > On 18.02.2026 16:32, Daniel P. Smith wrote: >> On 2/18/26 10:03, Jan Beulich wrote: >>> On 18.02.2026 15:33, Daniel P. Smith wrote: >>>> On 2/17/26 04:34, Jan Beulich wrote: >>>>> On 16.02.2026 22:57, Daniel P. Smith wrote: >>>>>> --- a/xen/common/domain.c >>>>>> +++ b/xen/common/domain.c >>>>>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >>>>>> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>>> domid_t *domid) >>>>>> { >>>>>> - unsigned int dom; >>>>>> + unsigned int dom = 0; >>>>>> int rc = -ENOENT; >>>>>> struct domain *hdl; >>>>>> >>>>>> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>>> >>>>>> if ( d ) >>>>>> { >>>>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>>>> + if ( rc ) >>>>>> + return rc; >>>>>> + >>>>>> set_domain_state_info(info, d); >>>>>> >>>>>> return 0; >>>>>> @@ -238,10 +242,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>>> >>>>>> while ( dom_state_changed ) >>>>>> { >>>>>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>>>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom); >>>>>> if ( dom >= DOMID_FIRST_RESERVED ) >>>>>> break; >>>>>> - if ( test_and_clear_bit(dom, dom_state_changed) ) >>>>>> + if ( test_bit(dom, dom_state_changed) ) >>>>>> { >>>>>> *domid = dom; >>>>> >>>>> This is problematic wrt other work (already talked about in the distant past, >>>>> but sadly only making little progress) towards trying to pull some of the >>>>> sub-ops out of the domctl-locked region. This subop is one of the prime >>>>> candidates, yet only if the test_and_clear_bit() remains here. >>>> >>>> Okay, but we can't be clearing the bit if the src domain doesn't have >>>> access. When considering that xsm_domctl() does a no-op check for >>>> XEN_DOMCTL_get_domain_state, deferring to xsm_get_domain_state(), then >>>> any domain could invoke the OP with DOMID_INVALID and clear the bit >>>> before access is checked. >>>> >>>> If you want to ensure atomic operations on the bit field, while I am not >>>> a fan of this, a combination with set_bit() could be done. Let the >>>> test_and_clear_bit() remain and then if access check fails, use >>>> set_bit() to put it back. Would that be sufficient for your objective? >>> >>> No, that could then confuse a legitimate (for that domain) caller. IOW >>> you would still build upon the domctl lock serializing things. I think >>> you want to do the XSM check first, and only then use test_and_clear_bit(). >> >> Currently, acquiring the struct domain pointer is inside the if >> condition. This would have to be moved outside the if condition to be >> able to do the access check before calling the bit operation. Which >> brings up the question for me, if it is reordered in this fashion, why >> not use clear_bit(), aiui it should be atomic as well. > > The problem isn't with clear_bit() by itself (yes, it is atomic), but > with how things want doing here: The test-and-clear ensures data for a > given domain can only be retrieved exactly once (until the bit would be > set another time later). With test split from clear, multiple callers > could get data for the same domain, as in the window between test and > clear a 2nd caller can come in and also commit to returning data for > that domain. (Given the restriction on who can invoke this, one might > conclude no such race is possible, but that single domain could process > things on multiple vCPU-s, and would then wrongly be notified twice for > the same domain.) Thinking further, you are correct the rcu_read_lock will not be enough. The test_and_clear call will ensure this thread is the one that read and cleared the bit. >>>>>> @@ -249,6 +253,15 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>>> >>>>>> if ( d ) >>>>>> { >>>>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>>>> + if ( rc ) >>>>>> + { >>>>>> + rcu_unlock_domain(d); >>>>>> + rc = -ENOENT; >>>>> >>>>> As you don't otherwise use xsm_get_domain_state()'s return value, the need >>>>> for this assignment can be eliminated by putting the function call straight >>>>> in the if(). Then again, to address the remark above, overall code structure >>>>> will need to change quite a bit anyway (so the remark here may be moot). >>>> >>>> I can drop the use of rc here and inline it. >>>> >>>>>> + dom++; >>>>> >>>>> It may be nice to eliminate the need to have this in two places (here and ... >>>>> >>>>>> + continue; >>>>>> + } >>>>>> + >>>>>> set_domain_state_info(info, d); >>>>>> >>>>>> rcu_unlock_domain(d); >>>>>> @@ -256,10 +269,13 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>>>> else >>>>>> memset(info, 0, sizeof(*info)); >>>>>> >>>>>> + clear_bit(dom, dom_state_changed); >>>>>> rc = 0; >>>>>> >>>>>> break; >>>>>> } >>>>>> + >>>>>> + dom++; >>>>>> } >>>>> >>>>> ... here), by having the variable's initializer be -1 and then using dom + 1 >>>>> in the find_next_bit() invocation. >>>> >>>> If you want this way, then there are two options, make dom no longer >>>> unsigned or be willing to allow unsigned int overflow. If we go with the >>>> former, If you agree, I would leave it as an int as that should cover >>>> the range of valid domids. >>> >>> I wouldn't outright nak use of plain int, but I'm putting in effort to remove >>> such undue uses of that type. Unsigned overflow is well-defined aiui, so I >>> see no reason why the variable can't remain "unsigned int". >> >> Honestly, I'm not sure why it was not domid_t in the first place. I >> can't keep all the rules, but I thought MISRA frowned on overflow usages >> (abuse?) like this. If you will ack it with it as a uint or as a >> domid_t, then I have no issue doing it this way. > > A patch without changing the type I would ack. A switch to domid_t, if indeed > correct (I simply didn't go check yet), likely would want to be a separate > change. Then I will leave it uint and init it to -1. v/r, dps From xen-devel-bounces@lists.xenproject.org Wed Feb 18 16:58:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 16:58:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235870.1538706 (Exim 4.92) (envelope-from ) id 1vsksY-0004l7-Kl; Wed, 18 Feb 2026 16:58:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235870.1538706; Wed, 18 Feb 2026 16:58:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsksY-0004l0-HY; Wed, 18 Feb 2026 16:58:22 +0000 Received: by outflank-mailman (input) for mailman id 1235870; Wed, 18 Feb 2026 16:58:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsksX-0004ku-Mu for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 16:58:21 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 06a45d4c-0ceb-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 17:58:19 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-43591b55727so39223f8f.3 for ; Wed, 18 Feb 2026 08:58:19 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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On context switch-in, restore HGATP and VSATP in the > required order. > > Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes > only when required (e.g. on VMID reuse or generation change). > > This provides the necessary infrastructure for correct p2m context switching > on RISC-V. > > Signed-off-by: Oleksii Kurochko > --- > Changes in v3: > - Add comment above p2m_ctxt_switch_{to, from}(). > - Code style fixes. > - Refactor p2m_ctxt_switch_to(). > - Update the comment at the end of p2m_ctxt_switch_from(). > - Refactor the code of p2m_handle_vmenter(). > --- > Changes in v2: > - Add vsatp field declaration to arch_vcpu. > - s/p2m_ctx_switch_{from,to}/p2m_ctxt_switch_{from,to}. > - Introduce p2m_handle_vmenter() for proper handling of VMID, > hgatp and vsatp updates. > - Introduce is_p2m_switch_finished and init it inisde > p2m_ctx_switch_to() for furhter handling in p2m_handle_vmenter(). > - Code style fixes. > - Add is_idle_vcpu() check in p2m_ctxt_switch_from(). > - use csr_swap() in p2m_ctxt_switch_from(). > - move flush_tlb_guest_local() to the end if p2m_handle_vmenter() and > drop unnessary anymore comments. > - Correct printk()'s arguments in p2m_handle_vmenter(). > --- > xen/arch/riscv/include/asm/domain.h | 1 + > xen/arch/riscv/include/asm/p2m.h | 4 ++ > xen/arch/riscv/p2m.c | 79 +++++++++++++++++++++++++++++ > xen/arch/riscv/traps.c | 2 + > 4 files changed, 86 insertions(+) > > diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h > index 3da2387cb197..42bb678fcbf9 100644 > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -59,6 +59,7 @@ struct arch_vcpu { > register_t hstateen0; > register_t hvip; > > + register_t vsatp; > register_t vsie; > > /* > diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h > index f63b5dec99b1..60f27f9b347e 100644 > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) > struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > p2m_type_t *t); > > +void p2m_ctxt_switch_from(struct vcpu *p); > +void p2m_ctxt_switch_to(struct vcpu *n); > +void p2m_handle_vmenter(void); > + > #endif /* ASM__RISCV__P2M_H */ > > /* > diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c > index 0abeb374c110..7ae854707174 100644 > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > > return get_page(page, p2m->domain) ? page : NULL; > } > + > +/* Should be called before other CSRs are stored to avoid speculation */ > +void p2m_ctxt_switch_from(struct vcpu *p) > +{ > + if ( is_idle_vcpu(p) ) > + return; > + > + /* > + * No mechanism is provided to atomically change vsatp and hgatp > + * together. Hence, to prevent speculative execution causing one > + * guest’s VS-stage translations to be cached under another guest’s > + * VMID, world-switch code should zero vsatp, then swap hgatp, then > + * finally write the new vsatp value what will be done in > + * p2m_handle_vmenter(). > + */ > + p->arch.vsatp = csr_swap(CSR_VSATP, 0); > + > + /* > + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() > + * or/and in p2m_handle_vmenter(). > + */ > +} > + > +/* Should be called after other CSRs are restored to avoid speculation */ > +void p2m_ctxt_switch_to(struct vcpu *n) > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); > + > + if ( is_idle_vcpu(n) ) > + return; > + > + csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); > + /* > + * As VMID is unique per vCPU and just re-used here thereby there is no > + * need for G-stage TLB flush here. > + */ > + > + csr_write(CSR_VSATP, n->arch.vsatp); > + /* > + * As at the start of context switch VSATP were set to 0, so no speculation > + * could happen thereby there is no need for VS TLB flush here. > + */ > +} I think we need to flush the VS-stage TLB unconditionally here. It is possible that `p->arch.vsatp.ASID == n->arch.vsatp.ASID`, in which case the new vCPU could reuse stale VS-stage TLB entries that do not belong to it. I considered performing the flush conditionally, but that would require checking not only the ASID, but also whether the PPN differs. In addition, we would need to verify that the old and new vCPUs do not belong to different domains, since the same VSATP PPN value could appear in different domains. This starts to look like overcomplication for a marginal optimization, so an unconditional VS-stage TLB flush seems simpler and safer. Do you think this optimization is worth pursuing at this stage? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed Feb 18 17:16:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 17:16:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235882.1538717 (Exim 4.92) (envelope-from ) id 1vslAB-0007ZW-2i; Wed, 18 Feb 2026 17:16:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235882.1538717; Wed, 18 Feb 2026 17:16:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslAB-0007ZP-03; Wed, 18 Feb 2026 17:16:35 +0000 Received: by outflank-mailman (input) for mailman id 1235882; Wed, 18 Feb 2026 17:16:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslAA-0007ZJ-4I for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: X6P0wmkyf8IiEt/nlUUy2Xd2uXAPXevoy6oWn0jHnSoI7MHBJqFvYClf4Z+NaLzxqqkPNgibdw5/krAVfPX6J6AIbaOv4feaRwGN/8aYIG47DeYxJpzhtZzWZ0ccS1woBM2FyyXWOdBMhw4Zgw+jtMFBMibUhajDT0BqzwMFYur4zfWrDwgshCIPIEgCiVDX/Ke6FSI7Dnx6yunwD9G1KVb39/4rk3IffOS1uR5NsLXIvTeSPqBgWH9rYq7CJqQoxrtB042lWeiSvDwMsyuFrMbpnO2/CHST+aTx7a8k04+vcNOmIhEv8w5q9dQXOSxS//ZjnemXC4cWP97UKlyRn8mo+9MJm5Ytr5aJmmawcjyR2WAg3nwfGLk5yIWnUD4RTrRSiiaklhaQ/UIQ1v6SxOQJpArrW+9awci/p9122DGEu0ADdQuuLAahWtxqWfX3 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 17:16:21.6841 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 859e8b51-1303-481c-7ea2-08de6f11700c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000209.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8562 On 18/02/2026 15:21, Stewart Hildebrand wrote: > Gentle ping. Sorry, I'm quite busy these days. > > To be clear, domU interrupts with vGICv2 are currently broken when > XEN_DOMCTL_CDF_trap_unmapped_accesses is not set. > > On 2/5/26 14:01, Stewart Hildebrand wrote: >> Since 4dbcb0653621, the vGICv2 CPU interface is mapped in a deferred >> manner. On domains with XEN_DOMCTL_CDF_trap_unmapped_accesses unset on >> GICv2 hardware, the vGICv2 CPU interface fails to be mapped. A visible >> symptom is that a domU gets stuck at: >> >> [ 0.177983] smp: Bringing up secondary CPUs ... >> >> Move the 2nd check_p2m earlier so it's prioritized over try_handle_mmio. >> >> Fixes: 980aff4e8fcd ("xen/arm: Add way to disable traps on accesses to unmapped addresses") >> Signed-off-by: Stewart Hildebrand I investigated whether the reordering is safe and it looks ok: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed Feb 18 17:35:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 17:35:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235899.1538730 (Exim 4.92) (envelope-from ) id 1vslS7-0001zu-IX; Wed, 18 Feb 2026 17:35:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235899.1538730; Wed, 18 Feb 2026 17:35:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslS7-0001zn-Fg; Wed, 18 Feb 2026 17:35:07 +0000 Received: by outflank-mailman (input) for mailman id 1235899; Wed, 18 Feb 2026 17:35:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslS5-0001zR-Lc for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 17:35:05 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 286a82be-0cf0-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 18:35:03 +0100 (CET) Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 6E67E4EE77EB; Wed, 18 Feb 2026 18:35:02 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 286a82be-0cf0-11f1-b164-2bf370ae4941 Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1771436102; b=nyig5CSGCK2zBrWyVIJDyzyGSaODA9vA4yRH1xaAzuq73mgS3H7uskWjM3XpxGnqN9Xx jOMXrqFHYqxhIGyZlxaa4aLacIaQKoj52UM9x8TymFRVLCCpRrdj2FPJRkxke/Y9kVn8o 3RIri8YmoJG+ZoTkFdMFkuyObZZQpt2F9aSLv7Ik9ro/K8fzpuN1jKo943NDFSl4m1Im7 rtSoVwwBQfeAMZqsrwoUMpIS7uEHdQO0ToZkueHOd7W/riY+Fxy9w8d0Ke42FlpbQ7Ag+ FX6I9L+6EZK1ETbm79lldkcfoD6m0FQzLJ5zv4BZwN2a8qROZeVSKBGn5OYvSS7ZpiJNL I9/EF/qaZAxAxCyizB+IcW9vktWIP1foob1KW6wgH/9iVJnIfGnU2ET3neE+xk2wus7bm K4ThFcnXIHoKP70H1k9BJqRnEj81tN3YFe9/yga8DKiHRwMH0NnhZ7g0Kxsi89we/YD9e 9G4n4QGlgjmDR+2A0OcYwaRVSFCau5IlZvr28rrEf16/7DPED94eQ/6z4ozAEI4bdcAuf /sVCclpnH8rHOLoN8R2dSctdvwpkbqU2JTj4Bsk4+UpwBtrlcfYg45Ao2vOegsZXiuYxI om95JvmPugtBlkiH3Z16zFZNj6CXFddjS2jFnBOdy0dmU9qWp5ka+5GEgaeJGsg= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1771436102; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=f5mTqAhO4yMhbGETNkMlHBOPiyW1jV9cH35c+Gm1F60=; b=C2th59N435j/I+RSGeLq87otN8fgdzSDgx2ryK5IE1bsUPom0qABf0qXuqvfQOShcNOx 9YVIngfLakooFs/MbLaYSSKf9S+wQcUDBf7UljqL2+e88GhAtAQsx5QVKIKxDdR8YMei1 0IVEZvQgj3eV1XhrBZjHhHKAQC4CXOLxyslP6rLHDO9gaSvnnWIPH009CqNfB+N4P38/y TLasaEw6oSbrggDTNxuo+mMczUTZlCzUpz3QXfa2zhLx2VeD0jJpg0byy6Xe2l3dmKfNW AHJC4DOK1MlNEfxi3qj50LWC/k3oZdeVfKAe4OZ6v1z6nw8e9qgpv7WknjsrxcFpkbaQr H10A4B8kCxWMXglnmRGXOMQ9Z4hS0FiKFcG30OPm44atWiGZSzl1RF1DQgxjTBGgH257a tITOHZAum82tSmaJ2Gn2GpzJ6XZ/hHj1fXe1Jazs/BOGxE46yTURROtJMUnV10MaKbjMm 2Pvq/hP3bJ2ARjoDuLaAO5EXcuk2jbdYs+KxLTsa6pmtXE+C7kxTg3hu+tNSbiFwAZFUN Z/5BYi51LiOgkfIXkXTHwynMv6iF4jjwytxZG+YeJGZ/mjriFwQ4kgaTwbGGrlUPylMOg GvlXeZbdeXYYdT5lEKgTBLzPfZVLuO4Psg5VJJscMx/z7UiO2bAP1oEYjuPPKgU= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 18 Feb 2026 18:35:02 +0100 From: Nicola Vetrini To: Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn?= =?UTF-8?Q?=C3=A9?= , xen-devel@lists.xenproject.org Subject: Re: [PATCH] x86/shadow: don't use #if in macro invocations In-Reply-To: References: <23951625-939c-4658-8146-84c1f12381d0@suse.com> <60a1bc11-f9a6-48c3-b7d8-d007799fbe91@citrix.com> Message-ID: <91756558bcee548bacf6264f898c2162@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-18 13:42, Jan Beulich wrote: > On 18.02.2026 12:30, Andrew Cooper wrote: >> On 18/02/2026 9:03 am, Jan Beulich wrote: >>> As per the standard this is UB, i.e. we're building on a defacto >>> extension >>> in the compilers we use. >> >> Is it a real extension, or just something that happens to work? > > I was hoping I would not need to go through that large swath of gcc doc > to > actually figure, because ... > >>> Misra C:2012 rule 20.6 disallows this altogether, >>> though. > > ... this I assumed was reason enough. Still, now that you forced me to: > In > The C Preprocessor the behavior is described as intentional, but not as > an > extension (section "Directives Within Macro Arguments"). Now you get to > judge whether that's a "real" extension or a "de-facto" one. > Well, since another alternative preprocessor may behave differently or even choke on this construct (on any instance!) my guess would be to regard this as a GNU extension. FWIW MISRA disallows this completely because it can lead to UB 87 from C99: "There are sequences of preprocessing tokens within the list of macro arguments that would otherwise act as preprocessing directives (6.10.3)." So it just sidesteps the issue without having to look at the actual token being formed and make our lives as tool implementors a tad easier. Perhaps a reference to the GCC preprocessor docs could be added in the commit message or in the code, just to save some brain cycles again next time. >>> Use helper always-inline functions instead. >>> >>> In sh_audit_l1_table(), along with reducing the scope of "gfn", which >>> now >>> isn't used anymore by the if() side of the conditional, also reduce >>> the >>> scope of two other adjacent variables. >>> >>> For audit_magic() note that both which parameters are needed and what >>> their types are is attributed to AUDIT_FAIL() accessing variables >>> which >>> aren't passed as arguments to it. >> >> This is grammatically awkward.  IMO it would be clearer to say "For >> audit_magic() note that there are more parameters than might seem >> necessary, caused by the expectations of AUDIT_FAIL()."  > > I've switched to using that, but one aspect is lost this way: I would > have > preferred both gl1e and sl1e to be plain entries, not pointers to ones. > >>> --- >>> Leaving even the fetching of current to the helper in >>> sh_rm_write_access_from_l1() looks tidier to me overall, albeit this >>> means >>> the fetch will now occur once per present L1E. >> >> This will not make a dent in the performance of the shadow code. >> >>> Converting the #if to if() and #ifdef to if(IS_ENABLED()) wouldn't >>> work >>> here, as identifiers are used which aren't available when the >>> respective >>> conditions are false. >> >> Personally, I'd have put this in the main commit message, because it's >> the justification for why out-of-line static inline's need to be used. > > I was wondering, so I've moved this up. > >>> --- a/xen/arch/x86/mm/shadow/multi.c >>> +++ b/xen/arch/x86/mm/shadow/multi.c >>> @@ -395,7 +395,7 @@ static inline mfn_t cf_check sh_next_pag >>> shadow_set_l2e(d, sl2e, new_sl2e, sl2mfn, SH_type_fl1_shadow, >>> sh_next_page) >>> >>> static inline u32 >>> -guest_index(void *ptr) >>> +guest_index(const void *ptr) >>> { >>> return (u32)((unsigned long)ptr & ~PAGE_MASK) / >>> sizeof(guest_l1e_t); >>> } >> >> While fine per say, this doesn't appear to be related to the patch? > > It does, the compiler told me to: type_from_gl3e() uses it, and I > really > want to keep the const-s on both of its parameters. > > Jan -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 17:44:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 17:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235908.1538740 (Exim 4.92) (envelope-from ) id 1vslb1-0003d9-Cs; Wed, 18 Feb 2026 17:44:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235908.1538740; Wed, 18 Feb 2026 17:44:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslb1-0003d2-AF; Wed, 18 Feb 2026 17:44:19 +0000 Received: by outflank-mailman (input) for mailman id 1235908; Wed, 18 Feb 2026 17:44:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vslb0-0003cw-3w for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 17:44:18 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 70ccb601-0cf1-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 18:44:15 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id A7E664363D; Wed, 18 Feb 2026 17:44:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 54290C116D0; Wed, 18 Feb 2026 17:44:13 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 70ccb601-0cf1-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771436653; bh=Fudqi39z3fKIjZN21JHFU9sp7Q8l8iy+U+/yWrTdC3Y=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=bwaxpARdI1IwCU7FcAI2SYSxnBe2vufuu+wpk2Yyd/5+yt+PIQZiJ2bIh1nu9+s0S oHgnfB7ek7MZDe+w7w3//NWm0Xwod0AJDeCeoBt7Hs5w0gVYr3P6MWVFRSArsteZpG 9g/EvgnwdcOgHRse8jAlN5j0YZrt3x1yiPLbjxq4Zkt2ORakaSLb/CY5Mh74Bekwn8 t22kRm8mZo7bBhik52x58TczcFyzmzBLH0XI3WSfwwNo5y+IILXKi37YtiQhUsH4zq SJC5CvNbWSBGfNRf/Vh06PQ9nK9bwV8FLwuw3AVNnVmkl03XbRDFdJ7pWlqtRMJVFa I/UhxLmcFSP1g== Date: Wed, 18 Feb 2026 11:44:11 -0600 From: Bjorn Helgaas To: Juergen Gross Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-scsi@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org, Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= Subject: Re: [PATCH v2 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() Message-ID: <20260218174411.GA3434134@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260218095205.453657-2-jgross@suse.com> On Wed, Feb 18, 2026 at 10:52:04AM +0100, Juergen Gross wrote: > In order to prepare checking the xenbus device status in > xenbus_read_driver_state(), add the pointer to struct xenbus_device > as a parameter. > > Signed-off-by: Juergen Gross > Tested-by: Marek Marczykowski-Górecki > Signed-off-by: Juergen Gross > --- > V2: > - add dev parameter description (kernel test robot) > --- > drivers/net/xen-netfront.c | 34 +++++++++++----------- > drivers/pci/xen-pcifront.c | 8 ++--- Acked-by: Bjorn Helgaas # drivers/pci/xen-pcifront.c > drivers/scsi/xen-scsifront.c | 2 +- > drivers/xen/xen-pciback/xenbus.c | 10 +++---- > drivers/xen/xenbus/xenbus_client.c | 4 ++- > drivers/xen/xenbus/xenbus_probe.c | 6 ++-- > drivers/xen/xenbus/xenbus_probe_frontend.c | 2 +- > include/xen/xenbus.h | 3 +- > 8 files changed, 36 insertions(+), 33 deletions(-) > > diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c > index 0969d5c9f6b7..2c414b77dd0f 100644 > --- a/drivers/net/xen-netfront.c > +++ b/drivers/net/xen-netfront.c > @@ -1646,7 +1646,7 @@ static int xennet_xdp_set(struct net_device *dev, struct bpf_prog *prog, > > /* avoid the race with XDP headroom adjustment */ > wait_event(module_wq, > - xenbus_read_driver_state(np->xbdev->otherend) == > + xenbus_read_driver_state(np->xbdev, np->xbdev->otherend) == > XenbusStateReconfigured); > np->netfront_xdp_enabled = true; > > @@ -1764,9 +1764,9 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev) > do { > xenbus_switch_state(dev, XenbusStateInitialising); > err = wait_event_timeout(module_wq, > - xenbus_read_driver_state(dev->otherend) != > + xenbus_read_driver_state(dev, dev->otherend) != > XenbusStateClosed && > - xenbus_read_driver_state(dev->otherend) != > + xenbus_read_driver_state(dev, dev->otherend) != > XenbusStateUnknown, XENNET_TIMEOUT); > } while (!err); > > @@ -2627,31 +2627,31 @@ static void xennet_bus_close(struct xenbus_device *dev) > { > int ret; > > - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) > + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) > return; > do { > xenbus_switch_state(dev, XenbusStateClosing); > ret = wait_event_timeout(module_wq, > - xenbus_read_driver_state(dev->otherend) == > - XenbusStateClosing || > - xenbus_read_driver_state(dev->otherend) == > - XenbusStateClosed || > - xenbus_read_driver_state(dev->otherend) == > - XenbusStateUnknown, > - XENNET_TIMEOUT); > + xenbus_read_driver_state(dev, dev->otherend) == > + XenbusStateClosing || > + xenbus_read_driver_state(dev, dev->otherend) == > + XenbusStateClosed || > + xenbus_read_driver_state(dev, dev->otherend) == > + XenbusStateUnknown, > + XENNET_TIMEOUT); > } while (!ret); > > - if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed) > + if (xenbus_read_driver_state(dev, dev->otherend) == XenbusStateClosed) > return; > > do { > xenbus_switch_state(dev, XenbusStateClosed); > ret = wait_event_timeout(module_wq, > - xenbus_read_driver_state(dev->otherend) == > - XenbusStateClosed || > - xenbus_read_driver_state(dev->otherend) == > - XenbusStateUnknown, > - XENNET_TIMEOUT); > + xenbus_read_driver_state(dev, dev->otherend) == > + XenbusStateClosed || > + xenbus_read_driver_state(dev, dev->otherend) == > + XenbusStateUnknown, > + XENNET_TIMEOUT); > } while (!ret); > } > > diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c > index 11636634ae51..cd22bf984024 100644 > --- a/drivers/pci/xen-pcifront.c > +++ b/drivers/pci/xen-pcifront.c > @@ -856,7 +856,7 @@ static void pcifront_try_connect(struct pcifront_device *pdev) > int err; > > /* Only connect once */ > - if (xenbus_read_driver_state(pdev->xdev->nodename) != > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != > XenbusStateInitialised) > return; > > @@ -876,7 +876,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) > enum xenbus_state prev_state; > > > - prev_state = xenbus_read_driver_state(pdev->xdev->nodename); > + prev_state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); > > if (prev_state >= XenbusStateClosing) > goto out; > @@ -895,7 +895,7 @@ static int pcifront_try_disconnect(struct pcifront_device *pdev) > > static void pcifront_attach_devices(struct pcifront_device *pdev) > { > - if (xenbus_read_driver_state(pdev->xdev->nodename) == > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) == > XenbusStateReconfiguring) > pcifront_connect(pdev); > } > @@ -909,7 +909,7 @@ static int pcifront_detach_devices(struct pcifront_device *pdev) > struct pci_dev *pci_dev; > char str[64]; > > - state = xenbus_read_driver_state(pdev->xdev->nodename); > + state = xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename); > if (state == XenbusStateInitialised) { > dev_dbg(&pdev->xdev->dev, "Handle skipped connect.\n"); > /* We missed Connected and need to initialize. */ > diff --git a/drivers/scsi/xen-scsifront.c b/drivers/scsi/xen-scsifront.c > index 924025305753..ef74d4da5ab0 100644 > --- a/drivers/scsi/xen-scsifront.c > +++ b/drivers/scsi/xen-scsifront.c > @@ -1175,7 +1175,7 @@ static void scsifront_backend_changed(struct xenbus_device *dev, > return; > } > > - if (xenbus_read_driver_state(dev->nodename) == > + if (xenbus_read_driver_state(dev, dev->nodename) == > XenbusStateInitialised) > scsifront_do_lun_hotplug(info, VSCSIFRONT_OP_ADD_LUN); > > diff --git a/drivers/xen/xen-pciback/xenbus.c b/drivers/xen/xen-pciback/xenbus.c > index b11e401f1b1e..4bd1c7a8957e 100644 > --- a/drivers/xen/xen-pciback/xenbus.c > +++ b/drivers/xen/xen-pciback/xenbus.c > @@ -149,12 +149,12 @@ static int xen_pcibk_attach(struct xen_pcibk_device *pdev) > > mutex_lock(&pdev->dev_lock); > /* Make sure we only do this setup once */ > - if (xenbus_read_driver_state(pdev->xdev->nodename) != > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != > XenbusStateInitialised) > goto out; > > /* Wait for frontend to state that it has published the configuration */ > - if (xenbus_read_driver_state(pdev->xdev->otherend) != > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->otherend) != > XenbusStateInitialised) > goto out; > > @@ -374,7 +374,7 @@ static int xen_pcibk_reconfigure(struct xen_pcibk_device *pdev, > dev_dbg(&pdev->xdev->dev, "Reconfiguring device ...\n"); > > mutex_lock(&pdev->dev_lock); > - if (xenbus_read_driver_state(pdev->xdev->nodename) != state) > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != state) > goto out; > > err = xenbus_scanf(XBT_NIL, pdev->xdev->nodename, "num_devs", "%d", > @@ -572,7 +572,7 @@ static int xen_pcibk_setup_backend(struct xen_pcibk_device *pdev) > /* It's possible we could get the call to setup twice, so make sure > * we're not already connected. > */ > - if (xenbus_read_driver_state(pdev->xdev->nodename) != > + if (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename) != > XenbusStateInitWait) > goto out; > > @@ -662,7 +662,7 @@ static void xen_pcibk_be_watch(struct xenbus_watch *watch, > struct xen_pcibk_device *pdev = > container_of(watch, struct xen_pcibk_device, be_watch); > > - switch (xenbus_read_driver_state(pdev->xdev->nodename)) { > + switch (xenbus_read_driver_state(pdev->xdev, pdev->xdev->nodename)) { > case XenbusStateInitWait: > xen_pcibk_setup_backend(pdev); > break; > diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c > index 2dc874fb5506..e502435145ae 100644 > --- a/drivers/xen/xenbus/xenbus_client.c > +++ b/drivers/xen/xenbus/xenbus_client.c > @@ -931,12 +931,14 @@ static int xenbus_unmap_ring_hvm(struct xenbus_device *dev, void *vaddr) > > /** > * xenbus_read_driver_state - read state from a store path > + * @dev: xenbus device pointer > * @path: path for driver > * > * Returns: the state of the driver rooted at the given store path, or > * XenbusStateUnknown if no state can be read. > */ > -enum xenbus_state xenbus_read_driver_state(const char *path) > +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, > + const char *path) > { > enum xenbus_state result; > int err = xenbus_gather(XBT_NIL, path, "state", "%d", &result, NULL); > diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c > index 9f9011cd7447..2eed06ba5d38 100644 > --- a/drivers/xen/xenbus/xenbus_probe.c > +++ b/drivers/xen/xenbus/xenbus_probe.c > @@ -191,7 +191,7 @@ void xenbus_otherend_changed(struct xenbus_watch *watch, > return; > } > > - state = xenbus_read_driver_state(dev->otherend); > + state = xenbus_read_driver_state(dev, dev->otherend); > > dev_dbg(&dev->dev, "state is %d, (%s), %s, %s\n", > state, xenbus_strstate(state), dev->otherend_watch.node, path); > @@ -364,7 +364,7 @@ void xenbus_dev_remove(struct device *_dev) > * closed. > */ > if (!drv->allow_rebind || > - xenbus_read_driver_state(dev->nodename) == XenbusStateClosing) > + xenbus_read_driver_state(dev, dev->nodename) == XenbusStateClosing) > xenbus_switch_state(dev, XenbusStateClosed); > } > EXPORT_SYMBOL_GPL(xenbus_dev_remove); > @@ -514,7 +514,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, > size_t stringlen; > char *tmpstring; > > - enum xenbus_state state = xenbus_read_driver_state(nodename); > + enum xenbus_state state = xenbus_read_driver_state(NULL, nodename); > > if (state != XenbusStateInitialising) { > /* Device is not new, so ignore it. This can happen if a > diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c > index f04707d1f667..ca04609730df 100644 > --- a/drivers/xen/xenbus/xenbus_probe_frontend.c > +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c > @@ -253,7 +253,7 @@ static int print_device_status(struct device *dev, void *data) > } else if (xendev->state < XenbusStateConnected) { > enum xenbus_state rstate = XenbusStateUnknown; > if (xendev->otherend) > - rstate = xenbus_read_driver_state(xendev->otherend); > + rstate = xenbus_read_driver_state(xendev, xendev->otherend); > pr_warn("Timeout connecting to device: %s (local state %d, remote state %d)\n", > xendev->nodename, xendev->state, rstate); > } > diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h > index c94caf852aea..15319da65b7f 100644 > --- a/include/xen/xenbus.h > +++ b/include/xen/xenbus.h > @@ -228,7 +228,8 @@ int xenbus_unmap_ring_vfree(struct xenbus_device *dev, void *vaddr); > int xenbus_alloc_evtchn(struct xenbus_device *dev, evtchn_port_t *port); > int xenbus_free_evtchn(struct xenbus_device *dev, evtchn_port_t port); > > -enum xenbus_state xenbus_read_driver_state(const char *path); > +enum xenbus_state xenbus_read_driver_state(const struct xenbus_device *dev, > + const char *path); > > __printf(3, 4) > void xenbus_dev_error(struct xenbus_device *dev, int err, const char *fmt, ...); > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Wed Feb 18 19:14:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 19:14:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235944.1538751 (Exim 4.92) (envelope-from ) id 1vsmzd-0006Hu-Gj; Wed, 18 Feb 2026 19:13:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235944.1538751; Wed, 18 Feb 2026 19:13:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsmzd-0006Hn-Cr; Wed, 18 Feb 2026 19:13:49 +0000 Received: by outflank-mailman (input) for mailman id 1235944; Wed, 18 Feb 2026 19:13:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsmzc-0006Ha-LH for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 19:13:48 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f18b903b-0cfd-11f1-9ccf-f158ae23cfc8; Wed, 18 Feb 2026 20:13:45 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771442013028766.098741949677; Wed, 18 Feb 2026 11:13:33 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f18b903b-0cfd-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; t=1771442015; cv=none; d=zohomail.com; s=zohoarc; b=Ge3gzbpeAUp+XtLApcWZpNBAZv0oLMDjCtHZgiiavFdmAlLGOEJ2cOngiFQMpvZTp8TVyEdm4FKKs8clWfZDGiMLV25gynnAHM3w7//FJUy1sBVvMGK3auguKGjhpQTvKgZa/qUhJfDNCxlQIZ5PaHKic2w4SSC/YMv0frt04TQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771442015; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=co65X2ipz281/zfrv1FcGAsrzzR3sJZcw4PMaqb9Nn0=; b=g5qtz8xPoA22JrKZoTokwN3CYmdcsMk8E4Dd7Fxbd50b6EgLf6G5JtQbMhs+QrGT0EflNLV6IEALLAw/nSqrGVdRIZjCyiP1DfaO6qwmZLHNO6DpEi0sj1QekpI08MU+iJBWPkh7mWLeYHs1fzp9y3mmBF0eETFyLp6tA7JZnyk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771442015; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=co65X2ipz281/zfrv1FcGAsrzzR3sJZcw4PMaqb9Nn0=; b=gdxwCTZGZ6LJB3GJ0eTXlLhoMznXnsUYrbRbKl7V8U2U88fkXvImFYMoPdpXqyXN i6/0mv0ToNjpLc0nGmTVSEnhLZtz9Jm9aJjQ29A37kKJwcw4EBP3ZrK/TRptLPVumCF hB1lsBy38rJtcb9kji6d6wDpe7yBp77IxeZ4qEI4= From: "Daniel P. Smith" To: xen-devel@lists.xenproject.org Cc: "Daniel P. Smith" , Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [BUG v2] common/domctl: xsm update for get_domain_state access Date: Wed, 18 Feb 2026 14:08:55 -0500 Message-Id: <20260218190855.7272-1-dpsmith@apertussolutions.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External When using XSM Flask, passing DOMID_INVALID will result in a NULL pointer reference from the passing of NULL as the target domain to xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the target domain is NULL opens the opportunity to circumvent the XSM get_domain_state access check. This is due to the fact that the call to xsm_domctl() for get_domain_state op is a no-op check, deferring to xsm_get_domain_state(). Modify the helper get_domain_state() to ensure the requesting domain has get_domain_state access for the target domain, whether the target domain is explicitly set or implicitly determined with a domain state search. In the case of access not being allowed for a domain found during an implicit search, the search will continue to the next domain whose state has changed. Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") Reported-by: Chris Rogers Reported-by: Dmytro Firsov Signed-off-by: Daniel P. Smith --- Changes in v2: - fix commit message - init dom as -1 - rework loop logic to use test_and_clear_bit() --- xen/common/domain.c | 27 +++++++++++++++++++++------ xen/common/domctl.c | 7 ++----- 2 files changed, 23 insertions(+), 11 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index de6fdf59236e..2ffec331a8d1 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, domid_t *domid) { - unsigned int dom; + unsigned int dom = -1; int rc = -ENOENT; struct domain *hdl; @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, if ( d ) { + rc = xsm_get_domain_state(XSM_XS_PRIV, d); + if ( rc ) + return rc; + set_domain_state_info(info, d); return 0; @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, while ( dom_state_changed ) { - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); if ( dom >= DOMID_FIRST_RESERVED ) break; + + d = rcu_lock_domain_by_id(dom); + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) + { + rcu_unlock_domain(d); + d = NULL; + continue; + } + if ( test_and_clear_bit(dom, dom_state_changed) ) { *domid = dom; - d = rcu_lock_domain_by_id(dom); - if ( d ) { set_domain_state_info(info, d); - rcu_unlock_domain(d); } else memset(info, 0, sizeof(*info)); rc = 0; - break; } + + if ( d ) + { + rcu_unlock_domain(d); + d = NULL; + } } out: diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 29a7726d32d0..2eedc639c72a 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) break; case XEN_DOMCTL_get_domain_state: - ret = xsm_get_domain_state(XSM_XS_PRIV, d); - if ( ret ) - break; - - copyback = 1; ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); + if ( !ret ) + copyback = 1; break; default: -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 20:54:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 20:54:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235964.1538760 (Exim 4.92) (envelope-from ) id 1vsoZA-0001Ta-AX; Wed, 18 Feb 2026 20:54:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235964.1538760; Wed, 18 Feb 2026 20:54:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsoZA-0001TT-7I; Wed, 18 Feb 2026 20:54:36 +0000 Received: by outflank-mailman (input) for mailman id 1235964; Wed, 18 Feb 2026 20:54:35 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsoZ9-0001TN-CR for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 20:54:35 +0000 Received: from mail.zytor.com (terminus.zytor.com [2607:7c80:54:3::136]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 046f633b-0d0c-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 21:54:32 +0100 (CET) Received: from ehlo.thunderbird.net (c-76-133-66-138.hsd1.ca.comcast.net [76.133.66.138]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 61IKbu3I2307125 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Wed, 18 Feb 2026 12:37:56 -0800 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 046f633b-0d0c-11f1-b164-2bf370ae4941 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 61IKbu3I2307125 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2026012301; t=1771447078; bh=/4gUyx2Ogqc4pykP2NXlf3ww6HtU65MDbCy+ciTKta0=; h=Date:From:To:CC:Subject:In-Reply-To:References:From; b=txRKTC99yxQoQhaycyi7tJEOgs9h1U2j5kNLU2/1fwUwtmdQCUwUeEffkAabj72/F ukff8fZVPMHYRTwmPLaZZGgZSRPefZOtaglDoqq/xRMxcmW0y0HbctJr8LQsjWYLQK O6BowOLQ73YDd32xR02o7iliOviwQfGShMkbSfNL1NNO3hDb124q5coP7LtTukCrv8 eFIsqBvQBtd8mP5roCm/HLGwm3E5AbDDDTSL/htD5wmZD5oyabOgyU4N/H2+l29yfi tegGzouqXoi0lCfrG4Cfb4XcWEQvgvnEJNiY8Xg+H/e8oJU5xeLp+CxABvSA1teX2D ggrrWY1MeeKrQ== Date: Wed, 18 Feb 2026 12:37:50 -0800 From: "H. Peter Anvin" To: Juergen Gross , linux-kernel@vger.kernel.org, x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, llvm@lists.linux.dev CC: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Andy Lutomirski , Peter Zijlstra , Xin Li , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Josh Poimboeuf , andy.cooper@citrix.com Subject: Re: [PATCH v3 00/16] x86/msr: Inline rdmsr/wrmsr instructions User-Agent: K-9 Mail for Android In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> Message-ID: <3D1FE2A7-F237-4232-9E39-6AFC75F3A4F0@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On February 18, 2026 12:21:17 AM PST, Juergen Gross wro= te: >When building a kernel with CONFIG_PARAVIRT_XXL the paravirt >infrastructure will always use functions for reading or writing MSRs, >even when running on bare metal=2E > >Switch to inline RDMSR/WRMSR instructions in this case, reducing the >paravirt overhead=2E > >The first patch is a prerequisite fix for alternative patching=2E Its >is needed due to the initial indirect call needs to be padded with >NOPs in some cases with the following patches=2E > >In order to make this less intrusive, some further reorganization of >the MSR access helpers is done in the patches 1-6=2E > >The next 4 patches are converting the non-paravirt case to use direct >inlining of the MSR access instructions, including the WRMSRNS >instruction and the immediate variants of RDMSR and WRMSR if possible=2E > >Patches 11-13 are some further preparations for making the real switch >to directly patch in the native MSR instructions easier=2E > >Patch 14 is switching the paravirt MSR function interface from normal >call ABI to one more similar to the native MSR instructions=2E > >Patch 15 is a little cleanup patch=2E > >Patch 16 is the final step for patching in the native MSR instructions >when not running as a Xen PV guest=2E > >This series has been tested to work with Xen PV and on bare metal=2E > >Note that there is more room for improvement=2E This series is sent out >to get a first impression how the code will basically look like=2E Does that mean you are considering this patchset an RFC? If so, you should= put that in the subject header=2E=20 >Right now the same problem is solved differently for the paravirt and >the non-paravirt cases=2E In case this is not desired, there are two >possibilities to merge the two implementations=2E Both solutions have >the common idea to have rather similar code for paravirt and >non-paravirt variants, but just use a different main macro for >generating the respective code=2E For making the code of both possible >scenarios more similar, the following variants are possible: > >1=2E Remove the micro-optimizations of the non-paravirt case, making > it similar to the paravirt code in my series=2E This has the > advantage of being more simple, but might have a very small > negative performance impact (probably not really detectable)=2E > >2=2E Add the same micro-optimizations to the paravirt case, requiring > to enhance paravirt patching to support a to be patched indirect > call in the middle of the initial code snipplet=2E > >In both cases the native MSR function variants would no longer be >usable in the paravirt case, but this would mostly affect Xen, as it >would need to open code the WRMSR/RDMSR instructions to be used >instead the native_*msr*() functions=2E > >Changes since V2: >- switch back to the paravirt approach > >Changes since V1: >- Use Xin Li's approach for inlining >- Several new patches > >Juergen Gross (16): > x86/alternative: Support alt_replace_call() with instructions after > call > coco/tdx: Rename MSR access helpers > x86/sev: Replace call of native_wrmsr() with native_wrmsrq() > KVM: x86: Remove the KVM private read_msr() function > x86/msr: Minimize usage of native_*() msr access functions > x86/msr: Move MSR trace calls one function level up > x86/opcode: Add immediate form MSR instructions > x86/extable: Add support for immediate form MSR instructions > x86/msr: Use the alternatives mechanism for WRMSR > x86/msr: Use the alternatives mechanism for RDMSR > x86/alternatives: Add ALTERNATIVE_4() > x86/paravirt: Split off MSR related hooks into new header > x86/paravirt: Prepare support of MSR instruction interfaces > x86/paravirt: Switch MSR access pv_ops functions to instruction > interfaces > x86/msr: Reduce number of low level MSR access helpers > x86/paravirt: Use alternatives for MSR access with paravirt > > arch/x86/coco/sev/internal=2Eh | 7 +- > arch/x86/coco/tdx/tdx=2Ec | 8 +- > arch/x86/hyperv/ivm=2Ec | 2 +- > arch/x86/include/asm/alternative=2Eh | 6 + > arch/x86/include/asm/fred=2Eh | 2 +- > arch/x86/include/asm/kvm_host=2Eh | 10 - > arch/x86/include/asm/msr=2Eh | 345 ++++++++++++++++------ > arch/x86/include/asm/paravirt-msr=2Eh | 148 ++++++++++ > arch/x86/include/asm/paravirt=2Eh | 67 ----- > arch/x86/include/asm/paravirt_types=2Eh | 57 ++-- > arch/x86/include/asm/qspinlock_paravirt=2Eh | 4 +- > arch/x86/kernel/alternative=2Ec | 5 +- > arch/x86/kernel/cpu/mshyperv=2Ec | 7 +- > arch/x86/kernel/kvmclock=2Ec | 2 +- > arch/x86/kernel/paravirt=2Ec | 42 ++- > arch/x86/kvm/svm/svm=2Ec | 16 +- > arch/x86/kvm/vmx/tdx=2Ec | 2 +- > arch/x86/kvm/vmx/vmx=2Ec | 8 +- > arch/x86/lib/x86-opcode-map=2Etxt | 5 +- > arch/x86/mm/extable=2Ec | 35 ++- > arch/x86/xen/enlighten_pv=2Ec | 52 +++- > arch/x86/xen/pmu=2Ec | 4 +- > tools/arch/x86/lib/x86-opcode-map=2Etxt | 5 +- > tools/objtool/check=2Ec | 1 + > 24 files changed, 576 insertions(+), 264 deletions(-) > create mode 100644 arch/x86/include/asm/paravirt-msr=2Eh > Could you clarify *on the high design level* what "go back to the paravirt= approach" means, and the motivation for that? Note that for Xen *most* MSRs fall in one of two categories: those that ar= e dropped entirely and those that are just passed straight on to the hardwa= re=2E I don't know if anyone cares about optimizing PV Xen anymore, but at least= in theory Xen can un-paravirtualize most sites=2E From xen-devel-bounces@lists.xenproject.org Wed Feb 18 20:54:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 20:54:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235967.1538771 (Exim 4.92) (envelope-from ) id 1vsoZW-0001nr-Hg; Wed, 18 Feb 2026 20:54:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235967.1538771; Wed, 18 Feb 2026 20:54:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsoZW-0001nk-EA; Wed, 18 Feb 2026 20:54:58 +0000 Received: by outflank-mailman (input) for mailman id 1235967; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: j+1/VnwnT4dZ5ZesgDCAav69Ya6GLWf89XjEqTirhT70eB7kNRAM7GIDmjOIhBBHGcUrQk2f4VVZMZORLzC4fbZfl4vcEiZ1a2XJsui8t+XtBaq2JUh4PsNazzvMMao/tb8dJJq9c3CPpRpqDxJcdZBGVuJ12qPUVR5/VNScl/vfIqykcGxBeH3RD0FQ9s21NdGoJNscNDxdTEfMxQAvbO+VEErboQUSsjRL3xkJVE9Tc+yOBSh0hcwQ/k5+AE5aTHSZXKyRxz6DoNKxCbilZE0J8MSaLexGTaA+8jEB1CMtRAhDe/db6or1rjZVisKAZVdvxpUl12jhMOAkWHFuwc3CsAwqp+p2vY4/M3AELBqdi+IKYb/6Ou/LQzEqy09zuG4Dz/8722SFuWeFrR5MaFlj2WuSdUzQ+qmWDUP/ATM0DnAzRmCT9j3TpesDKJeF X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 20:54:44.9787 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9b412dde-e375-43b2-6429-08de6f2ff238 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6191.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7747 On 2/10/26 05:54, Jan Beulich wrote: > ... both for when the functions are invoked and where they live in source. > Don't invoke them directly in vpci_init_header(), but instead first thing > in vpci_init_capabilities(). > > Suggested-by: Roger Pau Monné > Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand From xen-devel-bounces@lists.xenproject.org Wed Feb 18 21:00:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 21:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235978.1538782 (Exim 4.92) (envelope-from ) id 1vsoeh-0003df-43; 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Wed, 18 Feb 2026 13:00:13 -0800 (PST) MIME-Version: 1.0 References: <7cddaf16eb840dbd1480d7a1d6ddb0cbf0357113.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <7cddaf16eb840dbd1480d7a1d6ddb0cbf0357113.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 18 Feb 2026 23:00:00 +0200 X-Gm-Features: AaiRm50MYv7_n41CHSJKAdiZG8efxiYNMXq7H1DjszAKXsvqy98sSsZC_EjfK_4 Message-ID: Subject: Re: [RFC PATCH 14/19] arm/its: VPE affinity changes To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > When a VCPU is migrated to another PCPU, its VPE affinity must be > updated. Hook into VPE scheduling to ensure that the VPE to be scheduled > is located on the correct PCPU, if not, move it with VMOVP command. > > VMOVP needs to be issued on all ITSes in the system, and in the same > order, unlsess single VMOVP capable ITS is used. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 55 ++++++++++++++ > xen/arch/arm/gic-v4-its.c | 105 ++++++++++++++++++++++++++ > xen/arch/arm/include/asm/gic_v3_its.h | 12 +++ > 3 files changed, 172 insertions(+) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index fb1d2709be..be840fbc8f 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -31,6 +31,8 @@ > LIST_HEAD(host_its_list); > > > +unsigned long its_list_map; > + > unsigned int nvpeid =3D 16; > > /* > @@ -612,10 +614,47 @@ static int gicv3_disable_its(struct host_its *hw_it= s) > return -ETIMEDOUT; > } > > +static int __init its_compute_its_list_map(struct host_its *hw_its) > +{ > + int its_number; > + uint32_t ctlr; > + > + its_number =3D find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX= ); > + if ( its_number >=3D GICv4_ITS_LIST_MAX ) > + { > + printk(XENLOG_ERR > + "ITS@%lx: No ITSList entry available!\n", hw_its->addr); > + return -EINVAL; > + } > + > + ctlr =3D readl_relaxed(hw_its->its_base + GITS_CTLR); > + ctlr &=3D ~GITS_CTLR_ITS_NUMBER; > + ctlr |=3D its_number << GITS_CTLR_ITS_NUMBER_SHIFT; > + writel_relaxed(ctlr, hw_its->its_base + GITS_CTLR); > + ctlr =3D readl_relaxed(hw_its->its_base + GITS_CTLR); > + if ( (ctlr & GITS_CTLR_ITS_NUMBER) !=3D > + (its_number << GITS_CTLR_ITS_NUMBER_SHIFT) ) > + { > + its_number =3D ctlr & GITS_CTLR_ITS_NUMBER; > + its_number >>=3D GITS_CTLR_ITS_NUMBER_SHIFT; > + } > + > + if ( test_and_set_bit(its_number, &its_list_map) ) > + { > + printk(XENLOG_ERR > + "ITS@%lx: Duplicate ITSList entry %d\n", > + hw_its->addr, its_number); > + return -EINVAL; > + } > + > + return its_number; > +} > + > static int gicv3_its_init_single_its(struct host_its *hw_its) > { > uint64_t reg; > int i, ret; > + int its_number; > > hw_its->its_base =3D ioremap_nocache(hw_its->addr, hw_its->size); > if ( !hw_its->its_base ) > @@ -633,6 +672,22 @@ static int gicv3_its_init_single_its(struct host_its= *hw_its) > hw_its->itte_size =3D GITS_TYPER_ITT_SIZE(reg); > if ( reg & GITS_TYPER_PTA ) > hw_its->flags |=3D HOST_ITS_USES_PTA; > + hw_its->is_v4 =3D reg & GITS_TYPER_VLPIS; hw_its->is_v4 =3D reg & GITS_TYPER_VLPIS only tells us that VLPI is supported, not the GIC architecture revision. The name is_v4 is misleading. Consider renaming to has_vlpis (or similar) and use GITS_PIDR2 when you need the GIC arch revision. > + if ( hw_its->is_v4 ) > + { > + if ( !(reg & GITS_TYPER_VMOVP) ) > + { > + its_number =3D its_compute_its_list_map(hw_its); > + if ( its_number < 0 ) > + return its_number; > + dprintk(XENLOG_INFO, > + "ITS@%lx: Using ITS number %d\n", > + hw_its->addr, its_number); > + } > + else > + dprintk(XENLOG_INFO, > + "ITS@%lx: Single VMOVP capable\n", hw_its->addr); > + } > spin_lock_init(&hw_its->cmd_lock); > > for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > index 6a550a65b2..175fda7acb 100644 > --- a/xen/arch/arm/gic-v4-its.c > +++ b/xen/arch/arm/gic-v4-its.c > @@ -36,6 +36,9 @@ static unsigned long *vpeid_mask; > > static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOCKED; > > +static uint16_t vmovp_seq_num; > +static spinlock_t vmovp_lock =3D SPIN_LOCK_UNLOCKED; > + > void __init gicv4_its_vpeid_allocator_init(void) > { > /* Allocate space for vpeid_mask based on MAX_VPEID */ > @@ -242,6 +245,57 @@ static int __init its_vpe_init(struct its_vpe *vpe) > return rc; > } > > +static int its_send_cmd_vmovp(struct its_vpe *vpe) > +{ > + uint16_t vpeid =3D vpe->vpe_id; > + int ret; > + struct host_its *hw_its; > + > + if ( !its_list_map ) > + { > + uint64_t cmd[4]; > + > + hw_its =3D list_first_entry(&host_its_list, struct host_its, ent= ry); > + cmd[0] =3D GITS_CMD_VMOVP; > + cmd[1] =3D (uint64_t)vpeid << 32; > + cmd[2] =3D encode_rdbase(hw_its, vpe->col_idx, 0x0); > + cmd[3] =3D 0x00; > + > + return its_send_command(hw_its, cmd); Docs says VMOVP should be followed by VSYNC to synchronize the context when moving a vPE across CommonLPIAff groups. Here we issue VMOVP and return without VSYNC. Should we add a VSYNC (for both the single=E2=80=91ITS and ITSList paths)? > + } > + > + /* > + * If using the its_list "feature", we need to make sure that all IT= Ss > + * receive all VMOVP commands in the same order. The only way > + * to guarantee this is to make vmovp a serialization point. > + */ > + spin_lock(&vmovp_lock); > + > + vmovp_seq_num++; > + > + /* Emit VMOVPs */ > + list_for_each_entry(hw_its, &host_its_list, entry) > + { > + uint64_t cmd[4]; > + > + cmd[0] =3D GITS_CMD_VMOVP | ((uint64_t)vmovp_seq_num << 32); > + cmd[1] =3D its_list_map | ((uint64_t)vpeid << 32); > + cmd[2] =3D encode_rdbase(hw_its, vpe->col_idx, 0x0); > + cmd[3] =3D 0x00; > + > + ret =3D its_send_command(hw_its, cmd); We iterate over all ITSes and send VMOVP to each. Should this be limited to ITSes participating in the ITSList (and/or only v4 ITSes that can have the vPE mapping)? Sending to unrelated ITSes looks unnecessary and may be incorrect. --- If its_send_command() fails for one ITS in the loop, the VPE affinity update becomes inconsistent across ITSes. Do we need a rollback or a recovery path (e.g. retry, VSYNC, or mark vPE unusable)? > + if ( ret ) > + { > + spin_unlock(&vmovp_lock); > + return ret; > + } > + } > + > + spin_unlock(&vmovp_lock); > + > + return 0; > +} > + > static void __init its_vpe_teardown(struct its_vpe *vpe) > { > unsigned int order; > @@ -687,6 +741,52 @@ static void its_make_vpe_non_resident(struct its_vpe= *vpe, unsigned int cpu) > vpe->pending_last =3D val & GICR_VPENDBASER_PendingLast; > } > > +static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) > +{ > + spin_lock_irqsave(&vpe->vpe_lock, *flags); vpe_lock is used but never initialized. > + return vpe->col_idx; > +} > + > +static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long *flag= s) > +{ > + spin_unlock_irqrestore(&vpe->vpe_lock, *flags); > +} > + > +static int gicv4_vpe_set_affinity(struct vcpu *vcpu) > +{ > + struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; > + unsigned int from, to =3D vcpu->processor; > + unsigned long flags; > + int ret =3D 0; > + > + /* > + * Changing affinity is mega expensive, so let's be as lazy as > + * we can and only do it if we really have to. Also, if mapped > + * into the proxy device, we need to move the doorbell interrupt > + * to its new location. > + * > + * Another thing is that changing the affinity of a vPE affects > + * *other interrupts* such as all the vLPIs that are routed to > + * this vPE. This means that we must ensure nobody samples > + * vpe->col_idx during the update, hence the lock below which > + * must also be taken on any vLPI handling path that evaluates > + * vpe->col_idx, such as reg-based vLPI invalidation. > + */ > + from =3D vpe_to_cpuid_lock(vpe, &flags); > + if ( from =3D=3D to ) > + goto out; > + > + vpe->col_idx =3D to; updates col_idx before VMOVP; on error it is not restored. > + > + ret =3D its_send_cmd_vmovp(vpe); > + if ( ret ) > + goto out; > + > + out: > + vpe_to_cpuid_unlock(vpe, &flags); > + return ret; > +} > + > void vgic_v4_load(struct vcpu *vcpu) > { > struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; > @@ -695,6 +795,11 @@ void vgic_v4_load(struct vcpu *vcpu) > if ( vpe->resident ) > return; > > + /* > + * Before making the VPE resident, make sure the redistributor > + * corresponding to our current CPU expects us here > + */ > + WARN_ON(gicv4_vpe_set_affinity(vcpu)); If gicv4_vpe_set_affinity() fails, continuing to make the vPE resident on the new CPU is very likely wrong: vLPI routing / doorbells can now target the wrong redistributor. Best regards, Mykola > its_make_vpe_resident(vpe, vcpu->processor); > vpe->resident =3D true; > } > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index 411beb81c8..f03a8fad47 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -43,6 +43,9 @@ > #define GITS_CTLR_QUIESCENT BIT(31, UL) > #define GITS_CTLR_ENABLE BIT(0, UL) > > +#define GITS_CTLR_ITS_NUMBER_SHIFT 4 > +#define GITS_CTLR_ITS_NUMBER (0xfUL << GITS_CTLR_ITS_NUMBER_S= HIFT) > + > #define GITS_TYPER_PTA BIT(19, UL) > #define GITS_TYPER_DEVIDS_SHIFT 13 > #define GITS_TYPER_DEVIDS_MASK (0x1fUL << GITS_TYPER_DEVIDS_SHI= FT) > @@ -60,6 +63,8 @@ > GITS_TYPER_ITT_SIZE_SHI= FT) + 1) > #define GITS_TYPER_PHYSICAL (1U << 0) > > +#define GITS_TYPER_VLPIS (1UL << 1) > +#define GITS_TYPER_VMOVP (1UL << 37) > #define GITS_BASER_INDIRECT BIT(62, UL) > #define GITS_BASER_INNER_CACHEABILITY_SHIFT 59 > #define GITS_BASER_TYPE_SHIFT 56 > @@ -118,6 +123,12 @@ > /* We allocate LPIs on the hosts in chunks of 32 to reduce handling over= head. */ > #define LPI_BLOCK 32U > > +/* > + * Maximum number of ITSs when GITS_TYPER.VMOVP =3D=3D 0, using the > + * ITSList mechanism to perform inter-ITS synchronization. > + */ > +#define GICv4_ITS_LIST_MAX 16 > + > extern unsigned int nvpeid; > /* The maximum number of VPEID bits supported by VLPI commands */ > #define ITS_MAX_VPEID_BITS nvpeid > @@ -214,6 +225,7 @@ struct __lpi_data { > extern struct __lpi_data lpi_data; > > extern struct list_head host_its_list; > +extern unsigned long its_list_map; > > int its_send_cmd_discard(struct host_its *its, struct its_device *dev, > uint32_t eventid); > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 21:01:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 21:01:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235983.1538790 (Exim 4.92) (envelope-from ) id 1vsofP-00046S-DW; Wed, 18 Feb 2026 21:01:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235983.1538790; Wed, 18 Feb 2026 21:01:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsofP-00046L-A0; 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Wed, 18 Feb 2026 13:00:59 -0800 (PST) MIME-Version: 1.0 References: <61859ae57032ad2da9c0eec5fb30dbe4ecc8c0df.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <61859ae57032ad2da9c0eec5fb30dbe4ecc8c0df.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 18 Feb 2026 23:00:00 +0200 X-Gm-Features: AaiRm53n3EmBwUxALY7GPhvWahItL8c0jiQeFPwEZyPGTixMCakiKxxJgn4efF0 Message-ID: Subject: Re: [RFC PATCH 15/19] arm: Add gicv4 to domain creation To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Allow creating domains with GIC_V4 version. I am not convinced we should extend the public domctl ABI with XEN_DOMCTL_CONFIG_GIC_V4/V4_1. The GIC spec treats v4 as an extension of v3: Because GICv4 is an extension of GICv3, all references to GICv3 in this manual apply equally to GICv4, unless explicitly indicated otherwise. Any changes for GICv4.1 are indicated accordingly. >From a guest ABI perspective, a v4-capable system is still a GICv3 programmer's model, with additional optional features (e.g. vLPI/ vPE/ITS commands). Those features should be enabled/queried via the relevant capability bits, not by inventing new "GIC version" domctl values. So I'd prefer: * keep gic_hw_version accurate internally (v3/v4/v4.1 as needed), but * for domctl configuration, treat v4.x as XEN_DOMCTL_CONFIG_GIC_V3, and keep dom0less DT generation using the gicv3 node. This avoids growing the public ABI and toolstack churn for something that is effectively a v3 + extensions model. Best regards, Mykola > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/dom0less-build.c | 1 + > xen/arch/arm/domain.c | 16 ++++++++++++++++ > xen/arch/arm/vgic.c | 2 ++ > xen/include/public/arch-arm.h | 2 ++ > 4 files changed, 21 insertions(+) > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.= c > index 4181c10538..3c4b074b05 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -157,6 +157,7 @@ int __init make_intc_domU_node(struct kernel_info *ki= nfo) > { > #ifdef CONFIG_GICV3 > case GIC_V3: > + case GIC_V4: > return make_gicv3_domU_node(kinfo); > #endif > #ifdef CONFIG_VGICV2 > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 507df807ed..864e5511c9 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -604,6 +604,14 @@ int arch_sanitise_domain_config(struct xen_domctl_cr= eatedomain *config) > config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V3; > break; > > + case GIC_V4: > + config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V4; > + break; > + > + case GIC_V4_1: > + config->arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_V4_1; > + break; > + > default: > ASSERT_UNREACHABLE(); > return -EINVAL; > @@ -679,6 +687,14 @@ int arch_domain_create(struct domain *d, > d->arch.vgic.version =3D GIC_V3; > break; > > + case XEN_DOMCTL_CONFIG_GIC_V4: > + d->arch.vgic.version =3D GIC_V4; > + break; > + > + case XEN_DOMCTL_CONFIG_GIC_V4_1: > + d->arch.vgic.version =3D GIC_V4_1; > + break; > + > default: > BUG(); > } > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 6baf870ad5..e5752faeb7 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -153,6 +153,7 @@ int domain_vgic_register(struct domain *d, unsigned i= nt *mmio_count) > { > #ifdef CONFIG_GICV3 > case GIC_V3: > + case GIC_V4: > if ( vgic_v3_init(d, mmio_count) ) > return -ENODEV; > break; > @@ -929,6 +930,7 @@ unsigned int vgic_max_vcpus(unsigned int domctl_vgic_= version) > > #ifdef CONFIG_GICV3 > case XEN_DOMCTL_CONFIG_GIC_V3: > + case XEN_DOMCTL_CONFIG_GIC_V4: > return 4096; > #endif > > diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.= h > index 96365e5603..12690cf3ac 100644 > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -322,6 +322,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); > #define XEN_DOMCTL_CONFIG_GIC_NATIVE 0 > #define XEN_DOMCTL_CONFIG_GIC_V2 1 > #define XEN_DOMCTL_CONFIG_GIC_V3 2 > +#define XEN_DOMCTL_CONFIG_GIC_V4 3 > +#define XEN_DOMCTL_CONFIG_GIC_V4_1 4 > > #define XEN_DOMCTL_CONFIG_TEE_NONE 0 > #define XEN_DOMCTL_CONFIG_TEE_OPTEE 1 > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 21:01:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 21:01:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1235993.1538801 (Exim 4.92) (envelope-from ) id 1vsogF-0004fX-MP; Wed, 18 Feb 2026 21:01:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1235993.1538801; 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Wed, 18 Feb 2026 13:01:51 -0800 (PST) MIME-Version: 1.0 References: <13bab832bed00832d7597105a33ab2f215e626ce.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <13bab832bed00832d7597105a33ab2f215e626ce.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Wed, 18 Feb 2026 23:00:00 +0200 X-Gm-Features: AaiRm529IKmljNPd7An2WyanH56X6HM_g-zRbmWyByLv-WdgMIC_WBTlSqjBpJo Message-ID: Subject: Re: [RFC PATCH 16/19] arm/gic: Fix LR group handling for GICv4 To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable This commit can likely be dropped if we apply the approach from the review of the previous one (i.e. do not introduce per-domain GIC_V4/V4_1 versions in the domctl ABI and keep guests on XEN_DOMCTL_CONFIG_GIC_V3). In that case current->domain->arch.vgic.version would remain GIC_V3 for v4-capable systems too, so the existing checks (=3D=3D GIC_V3) already cove= r the intended behaviour. If we keep v4/v4.1 as distinct internal values, then using >=3D GIC_V3 is fine, but please avoid relying on numeric ordering of enums unless that ordering is explicitly guaranteed. Thanks, Mykola On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Extend the check to mark interrupts as Group1 for all GIC versions >=3D 3 > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 07736179db..1cb3169b72 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -1366,10 +1366,10 @@ static void gicv3_update_lr(int lr, unsigned int = virq, uint8_t priority, > val =3D (((uint64_t)state & 0x3) << ICH_LR_STATE_SHIFT); > > /* > - * When the guest is GICv3, all guest IRQs are Group 1, as Group0 > - * would result in a FIQ in the guest, which it wouldn't expect > + * When the guest is GICv3/GICv4/GICv4.1, all guest IRQs are Group 1= , as > + * Group0 would result in a FIQ in the guest, which it wouldn't expe= ct > */ > - if ( current->domain->arch.vgic.version =3D=3D GIC_V3 ) > + if ( current->domain->arch.vgic.version >=3D GIC_V3 ) > val |=3D ICH_LR_GRP1; > > val |=3D (uint64_t)priority << ICH_LR_PRIORITY_SHIFT; > @@ -1455,10 +1455,10 @@ static void gicv3_write_lr(int lr, const struct g= ic_lr *lr_reg) > } > > /* > - * When the guest is using vGICv3, all the IRQs are Group 1. Group 0 > - * would result in a FIQ, which will not be expected by the guest OS= . > + * When the guest is using vGICv3/vGICv4/vGICv4.1, all the IRQs are = Group 1. > + * Group 0 would result in a FIQ, which will not be expected by the = guest OS. > */ > - if ( vgic_version =3D=3D GIC_V3 ) > + if ( vgic_version >=3D GIC_V3 ) > lrv |=3D ICH_LR_GRP1; > > gicv3_ich_write_lr(lr, lrv); > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Feb 18 21:59:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 21:59:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236009.1538811 (Exim 4.92) (envelope-from ) id 1vspZM-0003YE-Pl; Wed, 18 Feb 2026 21:58:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236009.1538811; Wed, 18 Feb 2026 21:58:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vspZM-0003Y7-Mq; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fTgqEJ9TaBoDaEEwDqIICcAJJTHpbZgbvseOrVCEUGktPYBVEeo1awkyiaEcdcfst61VRqLajT3pjxGzxx2x0QOuHf64F0lolxsy4kzdAYgCVq1jI6M8qHWfilz8vvEJ3HfeyuYA0TcBiyUT27+U4NC80IfXJ7NrXdz0TuQ9kFntCUupxoF0LQxV135mLkD/QtsunY1ffSUZJxF/yUeIHaCGSPpphpmvFRwgNQsChZbFyfd0pXZT8AJasJXy6WL/MzICz7lac2ceV7xbgLbCuis5cAi/tDqOLPoK0Alex6e6Sxc73Yn4TiKG+CAyRt12MYq0RlSrWn1eYogMV4ljCB0nWkx1YhgWIxU2pfHDhYGhZCEpkdsg7CxU6OSxFH/gg+V7G6VNJBpRAoTpC6i2bUgulCWxETKrahvlnNerzU+ykIH5oyPOFRzY6yFxjnn+ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 21:58:39.0379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3aaf5f5a-b5d8-447c-559a-08de6f38df78 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5801 On 2/10/26 05:53, Jan Beulich wrote: > --- a/xen/include/xen/vpci.h > +++ b/xen/include/xen/vpci.h > @@ -30,20 +19,6 @@ typedef struct { > */ > #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) > > -#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ > - static const vpci_capability_t name##_entry \ > - __used_section(".data.rel.ro.vpci") = { \ > - .id = (cap), \ > - .init = (finit), \ > - .cleanup = (fclean), \ > - .is_ext = (ext), \ > - } > - > -#define REGISTER_VPCI_CAP(name, finit, fclean) \ > - REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) > -#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ > - REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) > - > int __must_check vpci_init_header(struct pci_dev *pdev); Nit: I suppose vpci_init_header() could also move to the new private header file From xen-devel-bounces@lists.xenproject.org Wed Feb 18 23:05:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 18 Feb 2026 23:05:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236020.1538821 (Exim 4.92) (envelope-from ) id 1vsqb6-0003ps-Ej; Wed, 18 Feb 2026 23:04:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236020.1538821; Wed, 18 Feb 2026 23:04:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsqb6-0003pl-BI; Wed, 18 Feb 2026 23:04:44 +0000 Received: by outflank-mailman (input) for mailman id 1236020; Wed, 18 Feb 2026 23:04:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsqb4-0003pd-6p for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /9T6LI4vVB1Ae6sRy32++Rd1RSIkx6c7TndmsCRrFHQoJGTdWuKvCYUy4XMALY2VybZ8Is+dvjxKTreRJ3VswY//3rGVcMYJQqegrgMnKwkI8vpu5zSj3VULCxA5ht3F+SBbaPIbrmpmnycjJV97F2IWDh6gnTKAI3AqBNYvc0h+oN66GuDfYrwiizQyDUY3FuwtZnbeUvwVZJhrCQ8wj2wke/NzS9Wu8KthBNAr8yIDjBefRwYj1N8CUme8c9Oavbwvf1E3MJ639GPijfHJZvOoKrKqunsKlrFNeXgic7vDkCgj2oZ87bDrTuG+2FqVmsPH5gzu7FTEMoC1ebU8ppAu57KnmvABSrrhna8ROFH1a9qQxxPnPLC2hvfnNyp/roT4smpD5MXfu14XOT02OatyW4631hV7xC380FnK5unAk645Ibe9p/qVDPXtYQUn X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 23:04:31.5712 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4d8b565c-9b2a-4fa3-2973-08de6f42135a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066EA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5645 On 2026-02-18 14:08, Daniel P. Smith wrote: > When using XSM Flask, passing DOMID_INVALID will result in a NULL pointer > reference from the passing of NULL as the target domain to > xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the > target domain is NULL opens the opportunity to circumvent the XSM > get_domain_state access check. This is due to the fact that the call to > xsm_domctl() for get_domain_state op is a no-op check, deferring to > xsm_get_domain_state(). > > Modify the helper get_domain_state() to ensure the requesting domain has > get_domain_state access for the target domain, whether the target domain is > explicitly set or implicitly determined with a domain state search. In the case > of access not being allowed for a domain found during an implicit search, the > search will continue to the next domain whose state has changed. > > Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") > Reported-by: Chris Rogers > Reported-by: Dmytro Firsov > Signed-off-by: Daniel P. Smith > --- > Changes in v2: > - fix commit message > - init dom as -1 > - rework loop logic to use test_and_clear_bit() > --- > xen/common/domain.c | 27 +++++++++++++++++++++------ > xen/common/domctl.c | 7 ++----- > 2 files changed, 23 insertions(+), 11 deletions(-) > > diff --git a/xen/common/domain.c b/xen/common/domain.c > index de6fdf59236e..2ffec331a8d1 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, > int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > domid_t *domid) > { > - unsigned int dom; > + unsigned int dom = -1; > int rc = -ENOENT; > struct domain *hdl; > > @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > if ( d ) > { > + rc = xsm_get_domain_state(XSM_XS_PRIV, d); > + if ( rc ) > + return rc; > + > set_domain_state_info(info, d); > > return 0; > @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, Between the two hunks is this: hdl = lock_dom_exc_handler(); /* * Only domain registered for VIRQ_DOM_EXC event is allowed to query * domains having changed state. */ if ( current->domain != hdl ) { rc = -EACCES; goto out; } So it is only the domain with VIRQ_DOM_EXC that can enter the while loop: > > while ( dom_state_changed ) > { > - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); > + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); > if ( dom >= DOMID_FIRST_RESERVED ) > break; > + > + d = rcu_lock_domain_by_id(dom); > + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) ... if the VIRQ_DOM_EXC owner is denied for domain d ... > + { > + rcu_unlock_domain(d); > + d = NULL; > + continue; ... the caller would continue ... > + } > + > if ( test_and_clear_bit(dom, dom_state_changed) ) ... and this bit would never be cleared. Should the VIRQ_DOM_EXC owner always get to clear the bit even if it cannot see the result? Is this too much of a corner case to care about? The patch generally seems okay aside from this. > { > *domid = dom; > > - d = rcu_lock_domain_by_id(dom); > - > if ( d ) > { > set_domain_state_info(info, d); > - > rcu_unlock_domain(d); > } > else > memset(info, 0, sizeof(*info)); > > rc = 0; > - > break; > } > + > + if ( d ) > + { > + rcu_unlock_domain(d); > + d = NULL; > + } > } > > out: > diff --git a/xen/common/domctl.c b/xen/common/domctl.c > index 29a7726d32d0..2eedc639c72a 100644 > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) > break; > > case XEN_DOMCTL_get_domain_state: > - ret = xsm_get_domain_state(XSM_XS_PRIV, d); With the initial NULL deref issue, I wondered if this wouldn't be better off modified to drop the d param - xsm_get_domain_state(XSM_XS_PRIV) - and changing flask permissions like: allow dom0_t xen_t:xen get_domain_state; That would gate the external call, and individual domain permissions could be checked with xsm_getdomaininfo(), or a new hook if you don't want to re-use. But as your approach avoids passing NULL, it seems okay to me. It also doesn't change the flask policy, which is nice. Thanks, Jason > - if ( ret ) > - break; > - > - copyback = 1; > ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); > + if ( !ret ) > + copyback = 1; > break; > > default: From xen-devel-bounces@lists.xenproject.org Thu Feb 19 00:26:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 00:26:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236037.1538830 (Exim 4.92) (envelope-from ) id 1vsrs5-0005vc-Ks; Thu, 19 Feb 2026 00:26:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236037.1538830; Thu, 19 Feb 2026 00:26:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsrs5-0005vV-IA; Thu, 19 Feb 2026 00:26:21 +0000 Received: by outflank-mailman (input) for mailman id 1236037; Thu, 19 Feb 2026 00:26:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsrs4-0005vN-2O for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 00:26:20 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9adfe53b-0d29-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 01:26:17 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 07B4440AC8; Thu, 19 Feb 2026 00:26:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 34496C116D0; Thu, 19 Feb 2026 00:26:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9adfe53b-0d29-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771460775; bh=Y1VUzMYKJDjgFUQ3wVOPgQU63jZVKJBlr6oc8WI+E5c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=V40kfbcmMkKV1sqVv9HEUtEVV/FOX6e4CXhZJ1pnPZw+dcTMhwNHsEZPDIIswzL/2 43fu6Wm9IFRykRmGcLhuJU4k/jOTF3Ea+5q4J2Pemio96wc815odedUnHe8fSgokFh zMXe0CfrSh2zqxca5ezs+T2xSu3fDUOn8A7r7NCRG6sQiHokeh0cNNvK+NXL1fQ331 0Hc460EnKsc6gHOpRzLVw+lSifseCwd9IaveMqxqys1FNj/1Hg8Xk/fTWYWXA0dtw/ 10kmlItuN4VW8IP6fvvuWVJ69Jc36mhP1PsUKWOm76TurBqEyx3v1o7Ov4qSY2BS7K +rAL5/pwi5c5A== Date: Wed, 18 Feb 2026 16:26:14 -0800 From: Jakub Kicinski To: Juergen Gross Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-scsi@vger.kernel.org, Stefano Stabellini , Oleksandr Tyshchenko , Andrew Lunn , "David S. Miller" , Eric Dumazet , Paolo Abeni , Bjorn Helgaas , "James E.J. Bottomley" , "Martin K. Petersen" , xen-devel@lists.xenproject.org, Marek =?UTF-8?B?TWFyY3p5a293c2tpLUfDs3JlY2tp?= Subject: Re: [PATCH v2 1/2] xenbus: add xenbus_device parameter to xenbus_read_driver_state() Message-ID: <20260218162614.09b8c41b@kernel.org> In-Reply-To: <20260218095205.453657-2-jgross@suse.com> References: <20260218095205.453657-1-jgross@suse.com> <20260218095205.453657-2-jgross@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 18 Feb 2026 10:52:04 +0100 Juergen Gross wrote: > drivers/net/xen-netfront.c | 34 +++++++++++----------- Acked-by: Jakub Kicinski -- pw-bot: nap From xen-devel-bounces@lists.xenproject.org Thu Feb 19 06:27:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 06:27:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236057.1538842 (Exim 4.92) (envelope-from ) id 1vsxUy-00068p-8S; Thu, 19 Feb 2026 06:26:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236057.1538842; Thu, 19 Feb 2026 06:26:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsxUy-00068i-47; Thu, 19 Feb 2026 06:26:52 +0000 Received: by outflank-mailman (input) for mailman id 1236057; Thu, 19 Feb 2026 06:26:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vsxUw-00068c-7b for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 06:26:50 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f81fd2b3-0d5b-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 07:26:48 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-435f177a8f7so524756f8f.1 for ; Wed, 18 Feb 2026 22:26:48 -0800 (PST) Received: from ?IPV6:2003:ca:b70c:6a43:c9a6:464e:db69:c159? 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Wed, 18 Feb 2026 22:26:47 -0800 (PST) Message-ID: Date: Thu, 19 Feb 2026 07:26:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/5] vPCI: introduce private header To: Stewart Hildebrand Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> <4fda7acb-e1a4-4a24-982e-4cae90048018@suse.com> <997450bd-3c01-47d9-a0db-21b58fdbc8c6@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <997450bd-3c01-47d9-a0db-21b58fdbc8c6@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 22:58, Stewart Hildebrand wrote: > On 2/10/26 05:53, Jan Beulich wrote: >> --- a/xen/include/xen/vpci.h >> +++ b/xen/include/xen/vpci.h >> @@ -30,20 +19,6 @@ typedef struct { >> */ >> #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) >> >> -#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ >> - static const vpci_capability_t name##_entry \ >> - __used_section(".data.rel.ro.vpci") = { \ >> - .id = (cap), \ >> - .init = (finit), \ >> - .cleanup = (fclean), \ >> - .is_ext = (ext), \ >> - } >> - >> -#define REGISTER_VPCI_CAP(name, finit, fclean) \ >> - REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) >> -#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ >> - REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) >> - >> int __must_check vpci_init_header(struct pci_dev *pdev); > Nit: I suppose vpci_init_header() could also move to the new private header file Hmm, yes, will do. I wonder why I didn't, as I went by being pretty aggressive in moving, to then move back what needs exposing to the outside. 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Peter Anvin" , linux-kernel@vger.kernel.org, x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, llvm@lists.linux.dev Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. 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Peter Anvin" , linux-kernel@vger.kernel.org, x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, llvm@lists.linux.dev Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Andy Lutomirski , Peter Zijlstra , Xin Li , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Josh Poimboeuf , andy.cooper@citrix.com Message-ID: Subject: Re: [PATCH v3 00/16] x86/msr: Inline rdmsr/wrmsr instructions References: <20260218082133.400602-1-jgross@suse.com> <3D1FE2A7-F237-4232-9E39-6AFC75F3A4F0@zytor.com> In-Reply-To: <3D1FE2A7-F237-4232-9E39-6AFC75F3A4F0@zytor.com> --------------IF9DvLhbTUfw0F0uwtC2r0ls Content-Type: multipart/mixed; boundary="------------L0CZrd40rvK39oWo3hvXsB63" --------------L0CZrd40rvK39oWo3hvXsB63 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMTguMDIuMjYgMjE6MzcsIEguIFBldGVyIEFudmluIHdyb3RlOg0KPiBPbiBGZWJydWFy eSAxOCwgMjAyNiAxMjoyMToxNyBBTSBQU1QsIEp1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNl 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Wed, 18 Feb 2026 22:29:36 -0800 (PST) Message-ID: <3a6ad6f9-76d0-4f50-b741-4960a77d2f5c@suse.com> Date: Thu, 19 Feb 2026 07:29:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org, Stefano Stabellini References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 18.02.2026 17:58, Oleksii Kurochko wrote: > > On 2/13/26 5:29 PM, Oleksii Kurochko wrote: >> Introduce helpers to manage VS-stage and G-stage translation state during >> vCPU context switches. >> >> As VSATP and HGATP cannot be updated atomically, clear VSATP on context >> switch-out to prevent speculative VS-stage translations from being associated >> with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the >> required order. >> >> Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes >> only when required (e.g. on VMID reuse or generation change). >> >> This provides the necessary infrastructure for correct p2m context switching >> on RISC-V. >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v3: >>   - Add comment above p2m_ctxt_switch_{to, from}(). >>   - Code style fixes. >>   - Refactor p2m_ctxt_switch_to(). >>   - Update the comment at the end of p2m_ctxt_switch_from(). >>   - Refactor the code of p2m_handle_vmenter(). >> --- >> Changes in v2: >>   - Add vsatp field declaration to arch_vcpu. >>   - s/p2m_ctx_switch_{from,to}/p2m_ctxt_switch_{from,to}. >>   - Introduce p2m_handle_vmenter() for proper handling of VMID, >>     hgatp and vsatp updates. >>   - Introduce is_p2m_switch_finished and init it inisde >>     p2m_ctx_switch_to() for furhter handling in p2m_handle_vmenter(). >>   - Code style fixes. >>   - Add is_idle_vcpu() check in p2m_ctxt_switch_from(). >>   - use csr_swap() in p2m_ctxt_switch_from(). >>   - move flush_tlb_guest_local() to the end if p2m_handle_vmenter() and >>     drop unnessary anymore comments. >>   - Correct printk()'s arguments in p2m_handle_vmenter(). >> --- >>   xen/arch/riscv/include/asm/domain.h |  1 + >>   xen/arch/riscv/include/asm/p2m.h    |  4 ++ >>   xen/arch/riscv/p2m.c                | 79 +++++++++++++++++++++++++++++ >>   xen/arch/riscv/traps.c              |  2 + >>   4 files changed, 86 insertions(+) >> >> diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h >> index 3da2387cb197..42bb678fcbf9 100644 >> --- a/xen/arch/riscv/include/asm/domain.h >> +++ b/xen/arch/riscv/include/asm/domain.h >> @@ -59,6 +59,7 @@ struct arch_vcpu { >>       register_t hstateen0; >>       register_t hvip; >>   +    register_t vsatp; >>       register_t vsie; >>         /* >> diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h >> index f63b5dec99b1..60f27f9b347e 100644 >> --- a/xen/arch/riscv/include/asm/p2m.h >> +++ b/xen/arch/riscv/include/asm/p2m.h >> @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) >>   struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>                                           p2m_type_t *t); >>   +void p2m_ctxt_switch_from(struct vcpu *p); >> +void p2m_ctxt_switch_to(struct vcpu *n); >> +void p2m_handle_vmenter(void); >> + >>   #endif /* ASM__RISCV__P2M_H */ >>     /* >> diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c >> index 0abeb374c110..7ae854707174 100644 >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -1434,3 +1434,82 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, >>         return get_page(page, p2m->domain) ? page : NULL; >>   } >> + >> +/* Should be called before other CSRs are stored to avoid speculation */ >> +void p2m_ctxt_switch_from(struct vcpu *p) >> +{ >> +    if ( is_idle_vcpu(p) ) >> +        return; >> + >> +    /* >> +     * No mechanism is provided to atomically change vsatp and hgatp >> +     * together. Hence, to prevent speculative execution causing one >> +     * guest’s VS-stage translations to be cached under another guest’s >> +     * VMID, world-switch code should zero vsatp, then swap hgatp, then >> +     * finally write the new vsatp value what will be done in >> +     * p2m_handle_vmenter(). >> +     */ >> +    p->arch.vsatp = csr_swap(CSR_VSATP, 0); >> + >> +    /* >> +     * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() >> +     * or/and in p2m_handle_vmenter(). >> +     */ >> +} >> + >> +/* Should be called after other CSRs are restored to avoid speculation */ >> +void p2m_ctxt_switch_to(struct vcpu *n) >> +{ >> +    struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); >> + >> +    if ( is_idle_vcpu(n) ) >> +        return; >> + >> +    csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); >> +    /* >> +     * As VMID is unique per vCPU and just re-used here thereby there is no >> +     * need for G-stage TLB flush here. >> +     */ >> + >> +    csr_write(CSR_VSATP, n->arch.vsatp); >> +    /* >> +     * As at the start of context switch VSATP were set to 0, so no speculation >> +     * could happen thereby there is no need for VS TLB flush here. >> +     */ >> +} > > I think we need to flush the VS-stage TLB unconditionally here. It is possible > that `p->arch.vsatp.ASID == n->arch.vsatp.ASID`, in which case the new vCPU > could reuse stale VS-stage TLB entries that do not belong to it. > > I considered performing the flush conditionally, but that would require checking > not only the ASID, but also whether the PPN differs. In addition, we would need > to verify that the old and new vCPUs do not belong to different domains, since > the same VSATP PPN value could appear in different domains. > > This starts to look like overcomplication for a marginal optimization, so an > unconditional VS-stage TLB flush seems simpler and safer. > > Do you think this optimization is worth pursuing at this stage? Let's start simple and optimize later. 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Smith" , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 00:04, Jason Andryuk wrote: > On 2026-02-18 14:08, Daniel P. Smith wrote: >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> domid_t *domid) >> { >> - unsigned int dom; >> + unsigned int dom = -1; >> int rc = -ENOENT; >> struct domain *hdl; >> >> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> >> if ( d ) >> { >> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >> + if ( rc ) >> + return rc; >> + >> set_domain_state_info(info, d); >> >> return 0; >> @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > Between the two hunks is this: > > hdl = lock_dom_exc_handler(); > > /* > * Only domain registered for VIRQ_DOM_EXC event is allowed to query > * domains having changed state. > */ > if ( current->domain != hdl ) > { > rc = -EACCES; > goto out; > } > > So it is only the domain with VIRQ_DOM_EXC that can enter the while loop: > >> >> while ( dom_state_changed ) >> { >> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >> if ( dom >= DOMID_FIRST_RESERVED ) >> break; >> + >> + d = rcu_lock_domain_by_id(dom); >> + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) > > ... if the VIRQ_DOM_EXC owner is denied for domain d ... > >> + { >> + rcu_unlock_domain(d); >> + d = NULL; >> + continue; > > ... the caller would continue ... > >> + } >> + >> if ( test_and_clear_bit(dom, dom_state_changed) ) > > ... and this bit would never be cleared. Should the VIRQ_DOM_EXC owner > always get to clear the bit even if it cannot see the result? I don't think so, no. Whenever a legitimate consumer occurs (the owner of VIRQ_DOM_EXC can change, after all), it'll then consume the bits as needed. More generally, I think we're better off not making the code here depend too much on that special VIRQ_DOM_EXC property. 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Smith" , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------fVcjL7tDyLmtviyNFhIpRlCM" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------fVcjL7tDyLmtviyNFhIpRlCM Content-Type: multipart/mixed; boundary="------------Uqq6ry7BW0mSsmCrqc0Frrvi"; protected-headers="v1" From: Juergen Gross To: Jan Beulich , Jason Andryuk Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , xen-devel@lists.xenproject.org Message-ID: Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> In-Reply-To: Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------Uqq6ry7BW0mSsmCrqc0Frrvi Content-Type: multipart/mixed; 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Smith" Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260218190855.7272-1-dpsmith@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 20:08, Daniel P. Smith wrote: > @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > > while ( dom_state_changed ) > { > - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); > + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); > if ( dom >= DOMID_FIRST_RESERVED ) > break; > + > + d = rcu_lock_domain_by_id(dom); > + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) > + { > + rcu_unlock_domain(d); > + d = NULL; This looks unnecessary; the next loop iteration will set d unconditionally, and d isn't (and wasn't) used past the loop. Plus there is also no such clearing after the other rcu_unlock_domain(). > + continue; > + } This cleanup here also is redundant with the one done further down. Imo where possible we should prefer to have only a single such instance, which looks to be easily possible by using ... > if ( test_and_clear_bit(dom, dom_state_changed) ) if ( (!d || !xsm_get_domain_state(XSM_XS_PRIV, d)) && test_and_clear_bit(dom, dom_state_changed) ) or if ( (d && xsm_get_domain_state(XSM_XS_PRIV, d)) || !test_and_clear_bit(dom, dom_state_changed) ) { ... continue; } albeit then the reduction of indentation of the subsequent code would cause quite a bit more code churn. > { > *domid = dom; > > - d = rcu_lock_domain_by_id(dom); > - > if ( d ) > { > set_domain_state_info(info, d); > - > rcu_unlock_domain(d); > } > else > memset(info, 0, sizeof(*info)); > > rc = 0; > - > break; I don't think the blank lines need dropping for the purpose of the patch? Yes, they may seem excessive, but nevertheless some prefer to have rather too many of them than too few. (Personally I don't mind their removal, but that really doesn't look to belong here.) > } > + > + if ( d ) > + { > + rcu_unlock_domain(d); > + d = NULL; > + } > } > > out: > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) > break; > > case XEN_DOMCTL_get_domain_state: > - ret = xsm_get_domain_state(XSM_XS_PRIV, d); > - if ( ret ) > - break; > - > - copyback = 1; > ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); > + if ( !ret ) > + copyback = 1; Nit: As you need to touch this, please switch to using "true". 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Smith" , xen-devel@lists.xenproject.org, Jason Andryuk References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 12:03, Juergen Gross wrote: > On 19.02.26 11:52, Jan Beulich wrote: >> On 19.02.2026 00:04, Jason Andryuk wrote: >>> On 2026-02-18 14:08, Daniel P. Smith wrote: >>>> --- a/xen/common/domain.c >>>> +++ b/xen/common/domain.c >>>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, >>>> int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> domid_t *domid) >>>> { >>>> - unsigned int dom; >>>> + unsigned int dom = -1; >>>> int rc = -ENOENT; >>>> struct domain *hdl; >>>> >>>> @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> >>>> if ( d ) >>>> { >>>> + rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>> + if ( rc ) >>>> + return rc; >>>> + >>>> set_domain_state_info(info, d); >>>> >>>> return 0; >>>> @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> >>> Between the two hunks is this: >>> >>> hdl = lock_dom_exc_handler(); >>> >>> /* >>> * Only domain registered for VIRQ_DOM_EXC event is allowed to query >>> * domains having changed state. >>> */ >>> if ( current->domain != hdl ) >>> { >>> rc = -EACCES; >>> goto out; >>> } >>> >>> So it is only the domain with VIRQ_DOM_EXC that can enter the while loop: >>> >>>> >>>> while ( dom_state_changed ) >>>> { >>>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >>>> if ( dom >= DOMID_FIRST_RESERVED ) >>>> break; >>>> + >>>> + d = rcu_lock_domain_by_id(dom); >>>> + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) >>> >>> ... if the VIRQ_DOM_EXC owner is denied for domain d ... >>> >>>> + { >>>> + rcu_unlock_domain(d); >>>> + d = NULL; >>>> + continue; >>> >>> ... the caller would continue ... >>> >>>> + } >>>> + >>>> if ( test_and_clear_bit(dom, dom_state_changed) ) >>> >>> ... and this bit would never be cleared. Should the VIRQ_DOM_EXC owner >>> always get to clear the bit even if it cannot see the result? >> >> I don't think so, no. Whenever a legitimate consumer occurs (the owner of >> VIRQ_DOM_EXC can change, after all), it'll then consume the bits as needed. >> More generally, I think we're better off not making the code here depend >> too much on that special VIRQ_DOM_EXC property. > > OTOH a new VIRQ_DOM_EXC owner will result in a complete reset of the bitmap > anyway (that is: the bits for all existing domains will be set, while all > others will be cleared). Yes, while writing my reply I wondered whether I should mention that. To keep things a little more simple, I didn't. Plus for this aspect the last sentence of my earlier reply also applies. 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Smith" , xen-devel@lists.xenproject.org, Jason Andryuk References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------lSNMTYhfEJZeV2m89XtxJhnW" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------lSNMTYhfEJZeV2m89XtxJhnW Content-Type: multipart/mixed; boundary="------------Jeuqcxlt1tCQ5sZLkJ7N1Dci"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , xen-devel@lists.xenproject.org, Jason Andryuk Message-ID: <539aceb3-8e94-4476-a538-77c1eb47e188@suse.com> Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> In-Reply-To: <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 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XJldRWooAW3O/dj5UTjqEhFLbDeuv8R4KeON/KDoUHMRGSVY7siTgGxR0LCTXHGs5TpqEECsBPC 7JPh0+hrSQFSbAiOR9Ca6bCKxfK9qpmjFIYF1ZRCNhUdUTzl5fug0ssic7fxntE/qxIUjNssNZF S3Tejw== X-Received: by 2002:ac2:4e0b:0:b0:59d:e2f4:3fda with SMTP id 2adb3069b0e04-59f6d353e94mr5204097e87.15.1771500694113; Thu, 19 Feb 2026 03:31:34 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Thu, 19 Feb 2026 13:30:00 +0200 X-Gm-Features: AaiRm51Apm7sIIJJGgwklv7hfE0ykWU46owng2WKu_jdM0zGipNMrr19vnfFAXQ Message-ID: Subject: Re: [RFC PATCH 19/19] arm/gicv4: Add GICv4 to the build system To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Add a config option to enable GICv4 support and include the > corresponding source file in the build system. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/Kconfig | 6 ++++++ > xen/arch/arm/Makefile | 1 + > 2 files changed, 7 insertions(+) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 442d353b43..c18eca9f9a 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -255,6 +255,12 @@ config ARM64_BTI > Branch Target Identification support. > This feature is not supported in Xen. > > +config GICV4 > + bool "GICv4 driver" nit: I would rename this to something more specific, e.g.: "GICv4 vLPI direct injection (experimental)", as this is not a standalone GIC driver but v4 ITS extensions for direct vLPI delivery. It may also be worth gating it under "if UNSUPPORTED", since this builds on the ITS code path which is currently marked as unsupported. > + depends on GICV3 && HAS_ITS > + help > + Driver for ARM Generic Interrupt Controller v4 extension. Maybe expand the help text a bit, for example: Enable direct injection of vLPIs using the GICv4 ITS extensions. This adds support for vPE/vLPI management via ITS commands such as VMAPP, VMAPTI and (on vCPU migration) VMOVP, plus handling of per-vPE doorbell LPIs used by Xen to reschedule vCPUs when vLPIs are pending. Note: This relies on the (currently unsupported) ITS code path in Xen and is considered experimental. Best regards, Mykola > + > source "arch/arm/tee/Kconfig" > > config PARTIAL_EMULATION > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 95bc7ad25e..8569df571b 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -27,6 +27,7 @@ obj-y +=3D gic.o > obj-$(CONFIG_GICV2) +=3D gic-v2.o > obj-$(CONFIG_GICV3) +=3D gic-v3.o > obj-$(CONFIG_HAS_ITS) +=3D gic-v3-its.o > +obj-$(CONFIG_GICV4) +=3D gic-v4-its.o > obj-$(CONFIG_HAS_ITS) +=3D gic-v3-lpi.o > obj-y +=3D guestcopy.o > obj-y +=3D guest_atomics.o > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 11:31:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 11:31:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236165.1538930 (Exim 4.92) (envelope-from ) id 1vt2G4-00057q-0a; Thu, 19 Feb 2026 11:31:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236165.1538930; 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Thu, 19 Feb 2026 03:31:43 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Thu, 19 Feb 2026 13:30:00 +0200 X-Gm-Features: AaiRm52xq-kPLxnj8N_bv0GgnnsmKULu84PI9AiwhOXUAGXZnd3sUEsIGovxq6g Message-ID: Subject: Re: [RFC PATCH 17/19] arm/gicv4: Handle doorbells To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > When GIC wants to inject a virtual interrupt to a VCPU that is not > currently scheduled, it sends a kick for a hypervisor to schedule it. To > receive such kicks, we need to set up a doorbell interrupt for each VPE. > > Add changes necessary to allocate, mask/unmask and handle doorbell > interrupts for each VPE. When a doorbell interrupt is received, set the > pending_last flag for the corresponding VPE and kick it, so that the > hypervisor schedules the VCPU to handle pending VLPIs. > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 13 ++- > xen/arch/arm/gic-v3-lpi.c | 69 ++++++++++---- > xen/arch/arm/gic-v4-its.c | 127 ++++++++++++++++++++++++++ > xen/arch/arm/include/asm/gic_v3_its.h | 6 +- > xen/arch/arm/vgic-v3-its.c | 14 ++- > 5 files changed, 203 insertions(+), 26 deletions(-) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index be840fbc8f..fa5c1eb6d1 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -1016,8 +1016,11 @@ int gicv3_its_map_guest_device(struct domain *d, > > dev->guest_doorbell =3D guest_doorbell; > dev->guest_devid =3D guest_devid; > - dev->host_devid =3D host_devid; > - dev->eventids =3D nr_events; > + > + #ifdef CONFIG_GICV4 > + spin_lock_init(&dev->event_map.vlpi_lock); > + dev->event_map.nr_lpis =3D nr_events; > + #endif > > rb_link_node(&dev->rbnode, parent, new); > rb_insert_color(&dev->rbnode, &d->arch.vgic.its_devices); > @@ -1142,7 +1145,8 @@ int gicv3_remove_guest_event(struct domain *d, padd= r_t vdoorbell_address, > if ( host_lpi =3D=3D INVALID_LPI ) > return -EINVAL; > > - gicv3_lpi_update_host_entry(host_lpi, d->domain_id, INVALID_LPI); > + gicv3_lpi_update_host_entry(host_lpi, d->domain_id, INVALID_LPI, > + false, INVALID_VCPU_ID); > > return 0; > } > @@ -1169,7 +1173,8 @@ struct pending_irq *gicv3_assign_guest_event(struct= domain *d, > if ( !pirq ) > return NULL; > > - gicv3_lpi_update_host_entry(host_lpi, d->domain_id, virt_lpi); > + gicv3_lpi_update_host_entry(host_lpi, d->domain_id, virt_lpi, > + false, INVALID_VCPU_ID); > > return pirq; > } > diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c > index 3c2649b695..37f1aa1064 100644 > --- a/xen/arch/arm/gic-v3-lpi.c > +++ b/xen/arch/arm/gic-v3-lpi.c > @@ -39,7 +39,7 @@ union host_lpi { > struct { > uint32_t virt_lpi; > uint16_t dom_id; > - uint16_t pad; > + uint16_t db_vcpu_id; > }; > }; > > @@ -161,24 +161,48 @@ void gicv3_do_LPI(unsigned int lpi) > * ignore them, as they have no further state and no-one can expect > * to see them if they have not been mapped. > */ > - if ( hlpi.virt_lpi =3D=3D INVALID_LPI ) > + if ( hlpi.virt_lpi =3D=3D INVALID_LPI && hlpi.db_vcpu_id =3D=3D INVA= LID_VCPU_ID ) > goto out; > > d =3D rcu_lock_domain_by_id(hlpi.dom_id); > if ( !d ) > goto out; > > - /* > - * TODO: Investigate what to do here for potential interrupt storms. > - * As we keep all host LPIs enabled, for disabling LPIs we would nee= d > - * to queue a ITS host command, which we avoid so far during a guest= 's > - * runtime. Also re-enabling would trigger a host command upon the > - * guest sending a command, which could be an attack vector for > - * hogging the host command queue. > - * See the thread around here for some background: > - * https://lists.xen.org/archives/html/xen-devel/2016-12/msg00003.ht= ml > - */ > - vgic_vcpu_inject_lpi(d, hlpi.virt_lpi); > + /* It is a doorbell interrupt. */ > + if ( hlpi.db_vcpu_id !=3D INVALID_VCPU_ID ) > + { > +#ifdef CONFIG_GICV4 > + struct vcpu *v =3D d->vcpu[hlpi.db_vcpu_id]; > + > + /* We got the message, no need to fire again */ > + its_vpe_mask_db(v->arch.vgic.its_vpe); > + > + /* > + * Update the pending_last flag that indicates that VLPIs are pe= nding. > + * And the corresponding vcpu is also kicked into action. > + */ > + v->arch.vgic.its_vpe->pending_last =3D true; This write is not synchronized. pending_last is touched from the LPI handler path, so please use the appropriate vPE lock here, or make it an atomic/WRITE_ONCE with a clear concurrency rationale. As-is this is a data race. > + > + vcpu_kick(v); > +#else > + printk(XENLOG_WARNING > + "Doorbell LPI is only suooprted on GICV4\n"); > +#endif > + } > + else > + { > + /* > + * TODO: Investigate what to do here for potential interrupt sto= rms. > + * As we keep all host LPIs enabled, for disabling LPIs we would= need > + * to queue a ITS host command, which we avoid so far during a g= uest's > + * runtime. Also re-enabling would trigger a host command upon t= he > + * guest sending a command, which could be an attack vector for > + * hogging the host command queue. > + * See the thread around here for some background: > + * https://lists.xen.org/archives/html/xen-devel/2016-12/msg0000= 3.html > + */ > + vgic_vcpu_inject_lpi(d, hlpi.virt_lpi); > + } > > rcu_unlock_domain(d); > > @@ -187,7 +211,8 @@ out: > } > > void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, > - uint32_t virt_lpi) > + uint32_t virt_lpi, bool is_db, > + uint16_t db_vcpu_id) > { > union host_lpi *hlpip, hlpi; > > @@ -197,8 +222,16 @@ void gicv3_lpi_update_host_entry(uint32_t host_lpi, = int domain_id, > > hlpip =3D &lpi_data.host_lpis[host_lpi / HOST_LPIS_PER_PAGE][host_lp= i % HOST_LPIS_PER_PAGE]; > > - hlpi.virt_lpi =3D virt_lpi; > - hlpi.dom_id =3D domain_id; > + if ( !is_db ) > + { > + hlpi.virt_lpi =3D virt_lpi; > + hlpi.dom_id =3D domain_id; > + } > + else > + { > + hlpi.dom_id =3D domain_id; > + hlpi.db_vcpu_id =3D db_vcpu_id; > + } > > write_u64_atomic(&hlpip->data, hlpi.data); > } > @@ -595,6 +628,7 @@ int gicv3_allocate_host_lpi_block(struct domain *d, u= int32_t *first_lpi) > */ > hlpi.virt_lpi =3D INVALID_LPI; > hlpi.dom_id =3D d->domain_id; > + hlpi.db_vcpu_id =3D INVALID_VCPU_ID; > write_u64_atomic(&lpi_data.host_lpis[chunk][lpi_idx + i].data, > hlpi.data); > > @@ -602,7 +636,8 @@ int gicv3_allocate_host_lpi_block(struct domain *d, u= int32_t *first_lpi) > * Enable this host LPI, so we don't have to do this during the > * guest's runtime. > */ > - lpi_data.lpi_property[lpi + i] |=3D LPI_PROP_ENABLED; > + lpi_write_config(lpi_data.lpi_property, lpi + i + LPI_OFFSET, 0x= ff, > + LPI_PROP_ENABLED); > } > > lpi_data.next_free_lpi =3D lpi + LPI_BLOCK; > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > index 175fda7acb..0462976b93 100644 > --- a/xen/arch/arm/gic-v4-its.c > +++ b/xen/arch/arm/gic-v4-its.c > @@ -157,6 +157,9 @@ static int its_send_cmd_vmapp(struct host_its *its, s= truct its_vpe *vpe, > cmd[3] =3D (vpt_addr & GENMASK(51, 16)) | > ((HOST_LPIS_NRBITS - 1) & GENMASK(4, 0)); > > + /* Default doorbell interrupt */ > + cmd[1] |=3D (uint64_t)vpe->vpe_db_lpi; Doorbell LPI is a GICv4.1 addition; for GICv4.0 this should not be set. > + > out: > ret =3D its_send_command(its, cmd); > > @@ -296,6 +299,37 @@ static int its_send_cmd_vmovp(struct its_vpe *vpe) > return 0; > } > > + > +static void its_vpe_send_inv_db(struct its_vpe *vpe) > +{ > + // struct its_device *dev =3D vpe_proxy.dev; > + // unsigned long flags; > + > + // spin_lock_irqsave(&vpe_proxy.lock, flags); > + // gicv4_vpe_db_proxy_map_locked(vpe); > + // its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_eve= nt); > + // spin_unlock_irqrestore(&vpe_proxy.lock, flags); > +} > + > +static void its_vpe_inv_db(struct its_vpe *vpe) > +{ > + its_vpe_send_inv_db(vpe); > +} > + > +void its_vpe_mask_db(struct its_vpe *vpe) > +{ > + /* Only clear enable bit. */ > + lpi_write_config(lpi_data.lpi_property, vpe->vpe_db_lpi, LPI_PROP_EN= ABLED, 0); > + its_vpe_inv_db(vpe); > +} > + > +static void its_vpe_unmask_db(struct its_vpe *vpe) > +{ > + /* Only set enable bit. */ > + lpi_write_config(lpi_data.lpi_property, vpe->vpe_db_lpi, 0, LPI_PROP= _ENABLED); > + its_vpe_inv_db(vpe); > +} > + > static void __init its_vpe_teardown(struct its_vpe *vpe) > { > unsigned int order; > @@ -309,6 +343,8 @@ static void __init its_vpe_teardown(struct its_vpe *v= pe) > int vgic_v4_its_vm_init(struct domain *d) > { > unsigned int nr_vcpus =3D d->max_vcpus; > + unsigned int nr_db_lpis, nr_chunks, i =3D 0; > + uint32_t *db_lpi_bases; > int ret =3D -ENOMEM; > > if ( !gicv3_its_host_has_its() ) > @@ -326,9 +362,31 @@ int vgic_v4_its_vm_init(struct domain *d) > d->arch.vgic.its_vm->vproptable =3D lpi_allocate_proptable(); > if ( !d->arch.vgic.its_vm->vproptable ) > goto fail_vprop; > + /* Allocate a doorbell interrupt for each VPE. */ > + nr_db_lpis =3D d->arch.vgic.its_vm->nr_vpes; > + nr_chunks =3D DIV_ROUND_UP(nr_db_lpis, LPI_BLOCK); > + db_lpi_bases =3D xzalloc_array(uint32_t, nr_chunks); > + if ( !db_lpi_bases ) > + goto fail_db_bases; > + > + do { > + /* Allocate doorbell interrupts in chunks of LPI_BLOCK (=3D32). = */ > + ret =3D gicv3_allocate_host_lpi_block(d, &db_lpi_bases[i]); > + if ( ret ) > + goto fail_db; > + } while ( ++i < nr_chunks ); > + > + d->arch.vgic.its_vm->db_lpi_bases =3D db_lpi_bases; > + d->arch.vgic.its_vm->nr_db_lpis =3D nr_db_lpis; > > return 0; > > +fail_db: > + while ( --i >=3D 0 ) 'i' is unsigned, so --i >=3D 0 is always true. This will loop forever. > + gicv3_free_host_lpi_block(d->arch.vgic.its_vm->db_lpi_bases[i]); The fail path frees via d->arch.vgic.its_vm->db_lpi_bases, but this pointer is only assigned on the success path. On failure it can be NULL/uninitialized. Please free via the local db_lpi_bases[] (and then xfree(db_lpi_bases)), or assign its_vm->db_lpi_bases before entering the allocation loop. > + xfree(db_lpi_bases); > +fail_db_bases: > + lpi_free_proptable(d->arch.vgic.its_vm->vproptable); > fail_vprop: > xfree(d->arch.vgic.its_vm->vpes); > fail_vpes: > @@ -340,8 +398,13 @@ fail_vprop: > void vgic_v4_free_its_vm(struct domain *d) > { > struct its_vm *its_vm =3D d->arch.vgic.its_vm; > + int nr_chunks =3D DIV_ROUND_UP(its_vm->nr_db_lpis, LPI_BLOCK); > if ( its_vm->vpes ) > xfree(its_vm->vpes); > + while ( --nr_chunks >=3D 0 ) > + gicv3_free_host_lpi_block(its_vm->db_lpi_bases[nr_chunks]); > + if ( its_vm->db_lpi_bases ) > + xfree(its_vm->db_lpi_bases); > if ( its_vm->vproptable ) > lpi_free_proptable(its_vm); > } > @@ -357,14 +420,29 @@ int vgic_v4_its_vpe_init(struct vcpu *vcpu) > return -ENOMEM; > > its_vm->vpes[vcpuid] =3D vcpu->arch.vgic.its_vpe; > + vcpu->arch.vgic.its_vpe =3D vcpu->arch.vgic.its_vpe; This is a no-op self-assignment; please remove. > + vcpu->arch.vgic.its_vpe->vpe_db_lpi =3D its_vm->db_lpi_bases[vcpuid/= 32] + (vcpuid % 32); > + /* > + * Sometimes vlpi gets firstly mapped before associated vpe > + * becoming resident, so in case missing the interrupt, we intend to > + * enable doorbell at the initialization stage > + */ > + > vcpu->arch.vgic.its_vpe->its_vm =3D its_vm; > > + gicv3_lpi_update_host_entry(vcpu->arch.vgic.its_vpe->vpe_db_lpi, > + vcpu->domain->domain_id, INVALID_LPI, tr= ue, > + vcpu->vcpu_id); > + > + > ret =3D its_vpe_init(vcpu->arch.vgic.its_vpe); > if ( ret ) > { > its_vpe_teardown(vcpu->arch.vgic.its_vpe); > return ret; > } > + its_vpe_unmask_db(vcpu->arch.vgic.its_vpe); > + > return 0; > } > > @@ -800,6 +878,7 @@ void vgic_v4_load(struct vcpu *vcpu) > * corresponding to our current CPU expects us here > */ > WARN_ON(gicv4_vpe_set_affinity(vcpu)); > + its_vpe_mask_db(vpe); > its_make_vpe_resident(vpe, vcpu->processor); > vpe->resident =3D true; > } > @@ -812,5 +891,53 @@ void vgic_v4_put(struct vcpu *vcpu, bool need_db) > return; > > its_make_vpe_non_resident(vpe, vcpu->processor); > + if ( need_db ) > + /* Enable the doorbell, as the guest is going to block */ > + its_vpe_unmask_db(vpe); > vpe->resident =3D false; > } > + > +static int its_vlpi_set_doorbell(struct its_vlpi_map *map, bool enable) > +{ > + if (map->db_enabled =3D=3D enable) > + return 0; > + > + map->db_enabled =3D enable; > + > + /* > + * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI > + * value or to 1023, depending on the enable bit. But that > + * would be issuing a mapping for an /existing/ DevID+EventID > + * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI > + * to the /same/ vPE, using this opportunity to adjust the doorbell. > + */ > + return its_send_cmd_vmovi(map->dev->hw_its, map); > +} > + > +int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, > + bool needs_inv) > +{ > + struct its_vlpi_map *map; > + unsigned int cpu; > + int ret; > + > + if ( !pirq->vlpi_map ) > + return -EINVAL; > + > + map =3D pirq->vlpi_map; > + > + /* Cache the updated property and update the vproptable. */ > + map->properties =3D property; > + lpi_write_config(map->vm->vproptable, pirq->irq, 0xff, property); > + > + if ( needs_inv ) > + { > + cpu =3D map->vm->vpes[map->vpe_idx]->col_idx; > + ret =3D its_inv_lpi(map->dev->hw_its, map->dev, map->eventid, cp= u); > + if ( ret ) > + return ret; > + } > + > + return its_vlpi_set_doorbell(map, property & LPI_PROP_ENABLED); > +} > + > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index f03a8fad47..dababe97cd 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -295,7 +295,9 @@ struct pending_irq *gicv3_assign_guest_event(struct d= omain *d, > uint32_t vdevid, uint32_t e= ventid, > uint32_t virt_lpi); > void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, > - uint32_t virt_lpi); > + uint32_t virt_lpi, bool is_db, > + uint16_t db_vcpu_id); > + > struct its_baser *its_get_baser(struct host_its *hw_its, uint32_t type); > bool its_alloc_table_entry(struct its_baser *baser, uint32_t id); > struct page_info *lpi_allocate_pendtable(void); > @@ -322,6 +324,8 @@ bool event_is_forwarded_to_vcpu(struct its_device *de= v, uint32_t eventid); > void its_vpe_mask_db(struct its_vpe *vpe); > #endif > int gicv4_its_vlpi_unmap(struct pending_irq *pirq); > +int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, > + bool needs_inv); > > /* ITS quirks handling. */ > uint64_t gicv3_its_get_cacheability(void); > diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c > index 94f7dd7d90..0a740ad68f 100644 > --- a/xen/arch/arm/vgic-v3-its.c > +++ b/xen/arch/arm/vgic-v3-its.c > @@ -387,7 +387,7 @@ out_unlock: > * property table and update the virtual IRQ's state in the given pendin= g_irq. > * Must be called with the respective VGIC VCPU lock held. > */ > -static int update_lpi_property(struct domain *d, struct pending_irq *p) > +int update_lpi_property(struct domain *d, struct pending_irq *p, bool ne= eds_inv) I don=E2=80=99t see any out-of-file users of update_lpi_property(). If it=E2=80=99s still file-local, keep it static. Best regards, Mykola > { > paddr_t addr; > uint8_t property; > @@ -417,6 +417,9 @@ static int update_lpi_property(struct domain *d, stru= ct pending_irq *p) > else > clear_bit(GIC_IRQ_GUEST_ENABLED, &p->status); > > + if ( pirq_is_tied_to_hw(p) ) > + return its_vlpi_prop_update(p, property, needs_inv); > + > return 0; > } > > @@ -430,6 +433,9 @@ static int update_lpi_property(struct domain *d, stru= ct pending_irq *p) > */ > static void update_lpi_vgic_status(struct vcpu *v, struct pending_irq *p= ) > { > + if ( pirq_is_tied_to_hw(p) ) > + return; > + > ASSERT(spin_is_locked(&v->arch.vgic.lock)); > > if ( test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) ) > @@ -479,7 +485,7 @@ static int its_handle_inv(struct virt_its *its, uint6= 4_t *cmdptr) > spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); > > /* Read the property table and update our cached status. */ > - if ( update_lpi_property(d, p) ) > + if ( update_lpi_property(d, p, true) ) > goto out_unlock; > > /* Check whether the LPI needs to go on a VCPU. */ > @@ -552,7 +558,7 @@ static int its_handle_invall(struct virt_its *its, ui= nt64_t *cmdptr) > > vlpi =3D pirqs[i]->irq; > /* If that fails for a single LPI, carry on to handle the re= st. */ > - err =3D update_lpi_property(its->d, pirqs[i]); > + err =3D update_lpi_property(its->d, pirqs[i], false); > if ( !err ) > update_lpi_vgic_status(vcpu, pirqs[i]); > else > @@ -785,7 +791,7 @@ static int its_handle_mapti(struct virt_its *its, uin= t64_t *cmdptr) > * We don't need the VGIC VCPU lock here, because the pending_irq is= n't > * in the radix tree yet. > */ > - ret =3D update_lpi_property(its->d, pirq); > + ret =3D update_lpi_property(its->d, pirq, true); > if ( ret ) > goto out_remove_host_entry; > > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 12:15:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 12:15:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236196.1538941 (Exim 4.92) (envelope-from ) id 1vt2wV-0002hR-8G; Thu, 19 Feb 2026 12:15:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236196.1538941; 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i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=iVWQvwAHlrWAyEjqQylfVKxysdT9hftzKejSBSQ5E+8=; b=toQT+n/19pvF3RgNil2XFu71XSMH9o5139mSWzKamTwpfwfaGlvrJA6RCuywLnSS uxS/udbdoprDbtZNMtMTqHuSkfS4l91ZD+L4kJA/BzwpYNOfQ8RcRdRilcH08ztJX8R mAsLW+O+dStaJUjYr4L8y7YfLcrmJqERw59yMFX0= Message-ID: Date: Thu, 19 Feb 2026 07:15:16 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jason Andryuk , xen-devel@lists.xenproject.org Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ZohoMailClient: External On 2/18/26 18:04, Jason Andryuk wrote: > On 2026-02-18 14:08, Daniel P. Smith wrote: >> When using XSM Flask, passing DOMID_INVALID will result in a NULL pointer >> reference from the passing of NULL as the target domain to >> xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() >> when the >> target domain is NULL opens the opportunity to circumvent the XSM >> get_domain_state access check. This is due to the fact that the call to >> xsm_domctl() for get_domain_state op is a no-op check, deferring to >> xsm_get_domain_state(). >> >> Modify the helper get_domain_state() to ensure the requesting domain has >> get_domain_state access for the target domain, whether the target >> domain is >> explicitly set or implicitly determined with a domain state search. In >> the case >> of access not being allowed for a domain found during an implicit >> search, the >> search will continue to the next domain whose state has changed. >> >> Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") >> Reported-by: Chris Rogers >> Reported-by: Dmytro Firsov >> Signed-off-by: Daniel P. Smith >> --- >> Changes in v2: >> - fix commit message >> - init dom as -1 >> - rework loop logic to use test_and_clear_bit() >> --- >>   xen/common/domain.c | 27 +++++++++++++++++++++------ >>   xen/common/domctl.c |  7 ++----- >>   2 files changed, 23 insertions(+), 11 deletions(-) >> >> diff --git a/xen/common/domain.c b/xen/common/domain.c >> index de6fdf59236e..2ffec331a8d1 100644 >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct >> xen_domctl_get_domain_state *info, >>   int get_domain_state(struct xen_domctl_get_domain_state *info, >> struct domain *d, >>                        domid_t *domid) >>   { >> -    unsigned int dom; >> +    unsigned int dom = -1; >>       int rc = -ENOENT; >>       struct domain *hdl; >> @@ -219,6 +219,10 @@ int get_domain_state(struct >> xen_domctl_get_domain_state *info, struct domain *d, >>       if ( d ) >>       { >> +        rc = xsm_get_domain_state(XSM_XS_PRIV, d); >> +        if ( rc ) >> +            return rc; >> + >>           set_domain_state_info(info, d); >>           return 0; >> @@ -238,28 +242,39 @@ int get_domain_state(struct >> xen_domctl_get_domain_state *info, struct domain *d, > > Between the two hunks is this: > >     hdl = lock_dom_exc_handler(); > >     /* >      * Only domain registered for VIRQ_DOM_EXC event is allowed to query >      * domains having changed state. >      */ >     if ( current->domain != hdl ) >     { >         rc = -EACCES; >         goto out; >     } > > So it is only the domain with VIRQ_DOM_EXC that can enter the while loop: > >>       while ( dom_state_changed ) >>       { >> -        dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >> +        dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >>           if ( dom >= DOMID_FIRST_RESERVED ) >>               break; >> + >> +        d = rcu_lock_domain_by_id(dom); >> +        if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) > > ... if the VIRQ_DOM_EXC owner is denied for domain d ... > >> +        { >> +            rcu_unlock_domain(d); >> +            d = NULL; >> +            continue; > > ... the caller would continue ... > >> +        } >> + >>           if ( test_and_clear_bit(dom, dom_state_changed) ) > > ... and this bit would never be cleared.  Should the VIRQ_DOM_EXC owner > always get to clear the bit even if it cannot see the result?  Is this > too much of a corner case to care about? If we want to go down this discussion path, here is yet another example access control decisions are getting codified directly against properties of a domain, in particular against VIRQ's which were waived from XSM control. If having access to certain VIRQ's is going to be a privilege determination, then perhaps we should visit whether they should be labeled objects like physical IRQs. > The patch generally seems okay aside from this. > >>           { >>               *domid = dom; >> -            d = rcu_lock_domain_by_id(dom); >> - >>               if ( d ) >>               { >>                   set_domain_state_info(info, d); >> - >>                   rcu_unlock_domain(d); >>               } >>               else >>                   memset(info, 0, sizeof(*info)); >>               rc = 0; >> - >>               break; >>           } >> + >> +        if ( d ) >> +        { >> +            rcu_unlock_domain(d); >> +            d = NULL; >> +        } >>       } >>    out: >> diff --git a/xen/common/domctl.c b/xen/common/domctl.c >> index 29a7726d32d0..2eedc639c72a 100644 >> --- a/xen/common/domctl.c >> +++ b/xen/common/domctl.c >> @@ -860,12 +860,9 @@ long >> do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >>           break; >>       case XEN_DOMCTL_get_domain_state: >> -        ret = xsm_get_domain_state(XSM_XS_PRIV, d); > > With the initial NULL deref issue, I wondered if this wouldn't be better > off modified to drop the d param - xsm_get_domain_state(XSM_XS_PRIV) - > and changing flask permissions like: > allow dom0_t xen_t:xen get_domain_state; > > That would gate the external call, and individual domain permissions > could be checked with xsm_getdomaininfo(), or a new hook if you don't > want to re-use. > > But as your approach avoids passing NULL, it seems okay to me.  It also > doesn't change the flask policy, which is nice. That's a plain nack from me. Whether it is viewed as a pipe dream or not, my goal continues to be to work towards enabling the ability to have a truly disaggregated platform. In the original architecture, it was envisioned to have multiple toolstack domains, each responsible for a distinct set of domains. In terms of implementation, that would mean multiple xenstored instances, each with a purview over a subset of domains. v/r, dps From xen-devel-bounces@lists.xenproject.org Thu Feb 19 12:35:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 12:35:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236212.1538950 (Exim 4.92) (envelope-from ) id 1vt3FH-0005cg-OX; Thu, 19 Feb 2026 12:35:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236212.1538950; Thu, 19 Feb 2026 12:35:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3FH-0005cZ-Ln; Thu, 19 Feb 2026 12:35:03 +0000 Received: by outflank-mailman (input) for mailman id 1236212; Thu, 19 Feb 2026 12:35:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3FG-0005cT-8D for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 12:35:02 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 67387bfd-0d8f-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 13:35:00 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771504484423733.3181470285288; Thu, 19 Feb 2026 04:34:44 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 67387bfd-0d8f-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771504486; cv=none; d=zohomail.com; s=zohoarc; b=lBepdT/Ew5vZqsL1fXGwvGxejPXdmhZByteLxv/5t36CwgqzF7lnTugvFtJsSRDvhKCBVbiylcrvEMSwl86MnczXe4WVoRu69MiZcblNFH+vuy5Cf6ijU/B5BbivREVqSyLZlHK4GBYBk0otNwZ8MwABiMLCzspEFzFoE/S7YSo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771504486; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=F1wZfFOs0/T43vHPOK5xak/XPmakW0Otq8nN80dcJhE=; b=RzmQhtbfLQnQUjCSiMdSjX/B7g6l8aJjoUe/vsquDLm7L2POTsFZIs/s6Yo3xrLyT+T6yB47snGM5akJne6ARm13gfU42Yf3yN8pnguAUL1iyRnpvBlUDba2BefwZvlO+xHujxMHG3nOJ3R6ZImVUkddggtCqzTh9xJh1x2HbQ0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771504486; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=F1wZfFOs0/T43vHPOK5xak/XPmakW0Otq8nN80dcJhE=; b=us9n8T2XRdNjx7DZyMl/dXWWcfCvN75IP7IPkf0gXXXre4uUpgjmslZ2Qa8PenRV kyiwsfzM99SnKzLNxkYu8s4hhaFVta5ff68E9NXyFjvhz7H7bO7Yjng7fN2egIEchhD 4kZt9D+lb8dsAgh/bokIZa90dWY27ya2O9UDlP40= Message-ID: Date: Thu, 19 Feb 2026 07:34:43 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jan Beulich Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/19/26 06:11, Jan Beulich wrote: > On 18.02.2026 20:08, Daniel P. Smith wrote: >> @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >> >> while ( dom_state_changed ) >> { >> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >> if ( dom >= DOMID_FIRST_RESERVED ) >> break; >> + >> + d = rcu_lock_domain_by_id(dom); >> + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) >> + { >> + rcu_unlock_domain(d); >> + d = NULL; > > This looks unnecessary; the next loop iteration will set d unconditionally, > and d isn't (and wasn't) used past the loop. Plus there is also no such > clearing after the other rcu_unlock_domain(). > If the src domain didn't have the permission on any of the target domains, then *d will leak the last domain checked back to the caller. While I didn't see it being used after the call site, it's a good principle not to leak from a function an object for which access was denied. This is not an issue for the later location where rcu_unlock_domain() is called, because at that point the src domain does have domain state privilege for the target domain. >> + continue; >> + } > > This cleanup here also is redundant with the one done further down. Imo where > possible we should prefer to have only a single such instance, which looks to > be easily possible by using ... > >> if ( test_and_clear_bit(dom, dom_state_changed) ) > > > if ( (!d || !xsm_get_domain_state(XSM_XS_PRIV, d)) && > test_and_clear_bit(dom, dom_state_changed) ) > > or > > if ( (d && xsm_get_domain_state(XSM_XS_PRIV, d)) || > !test_and_clear_bit(dom, dom_state_changed) ) > { > ... > continue; > } > > albeit then the reduction of indentation of the subsequent code would cause > quite a bit more code churn. > I would prefer the latter to keep the clearing of d to NULL only when access was denied. >> { >> *domid = dom; >> >> - d = rcu_lock_domain_by_id(dom); >> - >> if ( d ) >> { >> set_domain_state_info(info, d); >> - >> rcu_unlock_domain(d); >> } >> else >> memset(info, 0, sizeof(*info)); >> >> rc = 0; >> - >> break; > > I don't think the blank lines need dropping for the purpose of the patch? > Yes, they may seem excessive, but nevertheless some prefer to have rather > too many of them than too few. (Personally I don't mind their removal, > but that really doesn't look to belong here.) > Okay, but as you state above, with the compounding of the if statement, the indentation will go away and the whole section will a remove/add section to the diff. Would you still want the line spacing maintained? >> } >> + >> + if ( d ) >> + { >> + rcu_unlock_domain(d); >> + d = NULL; >> + } >> } >> >> out: >> --- a/xen/common/domctl.c >> +++ b/xen/common/domctl.c >> @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >> break; >> >> case XEN_DOMCTL_get_domain_state: >> - ret = xsm_get_domain_state(XSM_XS_PRIV, d); >> - if ( ret ) >> - break; >> - >> - copyback = 1; >> ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); >> + if ( !ret ) >> + copyback = 1; > > Nit: As you need to touch this, please switch to using "true". Just to be clear, you mean switching to a conditional statement vs testing for not zero? v/r, dps From xen-devel-bounces@lists.xenproject.org Thu Feb 19 12:40:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 12:40:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236219.1538961 (Exim 4.92) (envelope-from ) id 1vt3KP-0007Fl-AH; Thu, 19 Feb 2026 12:40:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236219.1538961; Thu, 19 Feb 2026 12:40:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3KP-0007Fe-6m; Thu, 19 Feb 2026 12:40:21 +0000 Received: by outflank-mailman (input) for mailman id 1236219; Thu, 19 Feb 2026 12:40:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3KN-0007FF-NB for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 12:40:19 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 258cd1de-0d90-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 13:40:18 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-4359a16a400so816446f8f.1 for ; Thu, 19 Feb 2026 04:40:18 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796abe3b3sm55413183f8f.18.2026.02.19.04.40.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Feb 2026 04:40:16 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 258cd1de-0d90-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771504817; x=1772109617; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=e/hnJGsbYECh62D+eq9NM/uLdPm+ckbQThjyfCBxx5I=; b=bYeM98bjpZHzjNpMfYZPkO0z2jygO2A3VOqyddyCpiOw+r5i4gjCUM0t3XMvN+JCzl toXR4CnMQrnF3p7vH91IS0bJ4iPnpod/d6c0GQm6BVNv7Zq/aQlLOVIYr2sk8rwkV4vl kKJoa6vneGql/uR87ZYG6z3WPLKEiB88WiyvHXhioRwMgsqz7R6yF+UPSIJg/paaG0Vc PRwkDH4pRX+A39N8kt6qgbN59i8D3Q01vpoaqNyGFFCsAZ/ZhMRDVF2bRSb8zwKkU8/1 JLHbggJcvPGZSUU2dd+fSqssr79H5NbYhIOYGrbEAsmnvHzxqY9GF+RRMJgaYNhqyx0F KAJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771504817; x=1772109617; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=e/hnJGsbYECh62D+eq9NM/uLdPm+ckbQThjyfCBxx5I=; b=POhco86qhjOkmz8A3cAh8Qe7AwFVP2MUZGrNcrf4QImTUpeAECz82AfEUMyuqp4N2U SKZSRvs7PT+FXO1tjkThoFv5SpmCVesrDOTJR75p12teigZ9EEuMBcVQvKuYidhESf6G Vxtt6+CjykGngpfsGQyiCSzuakfMgWaj5lxgdHfVFQZ3UWhWUnF413vf5yiVsZFq7vKi N/HcA3X00O/Zgn8cb8PZgiH2rYbn7+/yRsm+wOXFUoVn1uDWyjrg3rmXMdKOPrE37BmD cC1tQfp8J7AhEx7JncZbQ4JskkNOk66YxI9ymLuKueWvMo0sYZ839PZdTu1dXC8OrTBg RdRw== X-Gm-Message-State: AOJu0YyZ7NbBcwFw5DotecTM9xBTC18sckC2PRbD64t0h2MDCjQgl0g+ EmJMoBlPJPLqGAp1w+7wdHBEVREEeq0HVFOBb8gzf8QK4cBTirmwh+ANVlp2+Q== X-Gm-Gg: AZuq6aKAF0MLdLzYaA39RDfuIbRCKcZtLeBkQaVd0KwVjXDQVLuxwfhpzzRn9xjJrhI cV8+Hudbhavhc5ieY7SkGzl9zVxsfWqEW8RXyEcjR2bHDRNonNHf6cVO74W/1LwHGptHY/C7nQS 6IcddIKvdOI91XSvV9y3KZqfvjzDNdhycCD5DZBqwJNSPYvrYexqEiWL9NP6To9w0J1nk4mhf7Y KWibhRTr8SNAyaqy6zdqC7ZzJE9YaWV16I8Pv9BR9d9GjdwvBfp2wprpi7g3+YwRU8T43V/7BZJ w49YBF7IGWOfw+ywBeHPHnVzYgQUf5ND3KEyg98ci/xeKOBxixii+TFso0u4gK4cNXri+1fJdDr tJjpfZVYedogbkWG72ZdEQKSUeL8gG/N5YHWFe8P9Ez90WlwvCopaKCtzjZiXIdmWqZ/WKrbURB X9Uf58h1Ky5S+j02eVQV+mEzmFQOCBFKAZowv/KTLJyRQpUjf1q7uuHlKLO2pxlhVbmw== X-Received: by 2002:a05:6000:601:b0:430:f742:fbb8 with SMTP id ffacd0b85a97d-43958e02bcdmr8913730f8f.21.1771504817136; Thu, 19 Feb 2026 04:40:17 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4] xen/riscv: add p2m context switch handling for VSATP and HGATP Date: Thu, 19 Feb 2026 13:40:06 +0100 Message-ID: <5756356294dc066d835269334d0f3347fe24cec4.1771504676.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce helpers to manage VS-stage and G-stage translation state during vCPU context switches. As VSATP and HGATP cannot be updated atomically, clear VSATP on context switch-out to prevent speculative VS-stage translations from being associated with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the required order. Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes only when required (e.g. on VMID reuse or generation change). This provides the necessary infrastructure for correct p2m context switching on RISC-V. Signed-off-by: Oleksii Kurochko --- Changes in v4: - in p2m_handle_vmenter(): - Drop call of flush_tlb_guest_local() as it isn't necessary. - use 'unsigned short' for old_vmid and new_vmid. - Rename local variable c to curr. - Update the comments inside the function. - Update the comment above p2m_ctxt_swithch_from() as we don't care about the order while *_ctxt_switch_from happens as CSR_* registers aren't being updated and only stored. (Only CSR_VSATP is set to 0 to prevent speculation when *_ctxt_switch_to() functions will be called) We only care that p2m_ctxt_switch_from() is called before CRSs restoring is started. - Update the comment inside p2m_ctxt_switch_from(). - p2m_ctxt_switch_to() updates: - Update the comment above. - Add call of flush_tlb_guest_local() after setting of VSATP to avoid usage of stale translations for new vCPU. - Rebase on top of staging, so check_for_pcpu_work() is introduced here instead of vtimer patch series. --- Changes in v3: - Add comment above p2m_ctxt_switch_{to, from}(). - Code style fixes. - Refactor p2m_ctxt_switch_to(). - Update the comment at the end of p2m_ctxt_switch_from(). - Refactor the code of p2m_handle_vmenter(). --- Changes in v2: - Add vsatp field declaration to arch_vcpu. - s/p2m_ctx_switch_{from,to}/p2m_ctxt_switch_{from,to}. - Introduce p2m_handle_vmenter() for proper handling of VMID, hgatp and vsatp updates. - Introduce is_p2m_switch_finished and init it inisde p2m_ctx_switch_to() for furhter handling in p2m_handle_vmenter(). - Code style fixes. - Add is_idle_vcpu() check in p2m_ctxt_switch_from(). - use csr_swap() in p2m_ctxt_switch_from(). - move flush_tlb_guest_local() to the end if p2m_handle_vmenter() and drop unnessary anymore comments. - Correct printk()'s arguments in p2m_handle_vmenter(). --- xen/arch/riscv/include/asm/domain.h | 2 + xen/arch/riscv/include/asm/p2m.h | 4 ++ xen/arch/riscv/p2m.c | 100 ++++++++++++++++++++++++++++ xen/arch/riscv/traps.c | 8 +++ 4 files changed, 114 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index f78f145258d6..5aec627a7adb 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -48,6 +48,8 @@ struct arch_vcpu { } xen_saved_context; struct cpu_info *cpu_info; + + register_t vsatp; }; struct paging_domain { diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index f63b5dec99b1..60f27f9b347e 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -255,6 +255,10 @@ static inline bool p2m_is_locked(const struct p2m_domain *p2m) struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, p2m_type_t *t); +void p2m_ctxt_switch_from(struct vcpu *p); +void p2m_ctxt_switch_to(struct vcpu *n); +void p2m_handle_vmenter(void); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 0abeb374c110..89e5db606fc8 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1434,3 +1434,103 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, return get_page(page, p2m->domain) ? page : NULL; } + +/* + * Must be called before restoring CSRs to avoid potential speculation using + * an incorrect set of page tables during updates of VSATP and HGATP. + */ +void p2m_ctxt_switch_from(struct vcpu *p) +{ + if ( is_idle_vcpu(p) ) + return; + + /* + * No mechanism is provided to atomically change vsatp and hgatp + * together. Hence, to prevent speculative execution causing one + * guest’s VS-stage translations to be cached under another guest’s + * VMID, world-switch code should zero vsatp, then swap hgatp, then + * finally write the new vsatp value what will be done in + * p2m_ctxt_switch_to(). + * Note, that also HGATP update could happen in p2m_handle_vmenter(). + */ + p->arch.vsatp = csr_swap(CSR_VSATP, 0); + + /* + * Nothing to do with HGATP as it will be update in p2m_ctxt_switch_to() + * or/and in p2m_handle_vmenter(). + */ +} + +/* + * As speculation may occur at any time, an incorrect set of page tables could + * be used. Therefore, this function must be called only after all other guest + * CSRs have been restored. Otherwise, VS-stage translations could be populated + * using stale control state (e.g. SEPC still referring to the previous guest) + * while VSATP and HGATP already point to the new guest. + */ +void p2m_ctxt_switch_to(struct vcpu *n) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(n->domain); + + if ( is_idle_vcpu(n) ) + return; + + csr_write(CSR_HGATP, construct_hgatp(p2m, n->arch.vmid.vmid)); + /* + * As VMID is unique per vCPU and just re-used here thereby there is no + * need for G-stage TLB flush here. + */ + + csr_write(CSR_VSATP, n->arch.vsatp); + + /* + * Since n->arch.vsatp.ASID may equal p->arch.vsatp.ASID, + * flush the VS-stage TLB to prevent the new guest from + * using stale (not belongs to it) translations. + * ASID equality is not the only potential issue here. + * + * TODO: This could be optimized by making the flush + * conditional. + */ + flush_tlb_guest_local(); +} + +void p2m_handle_vmenter(void) +{ + struct vcpu *curr = current; + struct p2m_domain *p2m = p2m_get_hostp2m(curr->domain); + struct vcpu_vmid *p_vmid = &curr->arch.vmid; + unsigned short old_vmid, new_vmid; + bool need_flush; + + BUG_ON(is_idle_vcpu(curr)); + + old_vmid = p_vmid->vmid; + need_flush = vmid_handle_vmenter(p_vmid); + new_vmid = p_vmid->vmid; + +#ifdef P2M_DEBUG + printk("%pv: oldvmid(%d) new_vmid(%d), need_flush(%d)\n", + curr, old_vmid, new_vmid, need_flush); +#endif + + /* + * There is no need to set VSATP to 0 to stop speculation before updating + * HGATP, as VSATP is not modified here. + */ + if ( old_vmid != new_vmid ) + csr_write(CSR_HGATP, construct_hgatp(p2m, p_vmid->vmid)); + + /* + * There is also no need to flush G-stage TLB unconditionally as old VMID + * won't be reused until need_flush is set to true. + */ + if ( unlikely(need_flush) ) + local_hfence_gvma_all(); + + /* + * There is also no need to flush the VS-stage TLB: even if speculation + * occurs (VSATP + old HGATP were used), it will use the old VMID, which + * won't be reused until need_flush is set to true. + */ +} diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index c81a4f79a0d2..9fca941526f6 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -169,6 +169,11 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +static void check_for_pcpu_work(void) +{ + p2m_handle_vmenter(); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -222,6 +227,9 @@ void do_trap(struct cpu_user_regs *cpu_regs) do_unexpected_trap(cpu_regs); break; } + + if ( cpu_regs->hstatus & HSTATUS_SPV ) + check_for_pcpu_work(); } void vcpu_show_execution_state(struct vcpu *v) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 12:44:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 12:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236231.1538971 (Exim 4.92) (envelope-from ) id 1vt3On-0007sb-05; Thu, 19 Feb 2026 12:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236231.1538971; Thu, 19 Feb 2026 12:44:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3Om-0007sU-TZ; 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a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771505087; x=1771775087; bh=ekWC7xbCItHTVzn4dwCJQg3s6mD0YG5ENhFdY0aWNz4=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=e0T40mm+9tjpxFrxDRrbShiZc7ptlQtvldKDeh7c/bJHmxyI37g+pQn+uuAg+h2Y7 bS3ECWlk1a23/UgtFFLvLRKmE6ByNlH2NS3MVJhOwTQta/eOKvqLh3rqtTQcybhqxY GvQWPgSiCplAWqvLhc8kuZvcR/Wj/TPg8y7sxJ4l20N8MVJpGKFXbLqfbY4pTR/nL8 qyxF6l6Zrf86z9JSB9X2aINUIoB0O9retu5Iq4IdoXENPm3XFGMrzUg1czfEeeMi+H d3aH7ZIWCImsm2Q8xTsa/AMCsj+FNbHhyX5sAkBFC96LmpZlj6lPMLmGTkU8iPFMRf 6rdgCnYi8yJrw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771505087; x=1771765587; i=julian.vetter@vates.tech; bh=ekWC7xbCItHTVzn4dwCJQg3s6mD0YG5ENhFdY0aWNz4=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=wbTIi4ceiE5yhOIngd9xgYNx9XGvCUo/2nUSf/wZ7HBUa+78OThcGhm55Eo0hIN2E LjUQWK/Xt2BqokGNksPn0h9z2Z7YtWoNtNrdyTFcJkPGr+nsDsFK3krESadOjhrS5O XVQx6c3E+eIaFhjwgXZlrFSVmD2vfi+PcQyjkdCchrQxFXjf3RXX6LOWYPu1yZtr3Q 8M3cZezYOB/7rfYG1MGTiraDoDTdNFEkScnFRz71bzuvMruka4+X8v/jLEDA7Rtshv js9VV4y1CDYhJsOb6X3WmDllzn8MXnswupJ1MONHRyOTP/EQOdxK7O1cSPNMn6qBJq x2/QjV9Z+t/JA== From: "Julian Vetter" Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771505086332 Message-Id: <993fafc6-330b-4680-8284-983efb7694f8@vates.tech> To: "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" Cc: xen-devel@lists.xenproject.org, "Jan Beulich" , "Andrew Cooper" References: <20260209113412.2603088-1-julian.vetter@vates.tech> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.a51c4b1ad364496ab8140e652e13eaad?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260219:md Date: Thu, 19 Feb 2026 12:44:47 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 2/9/26 14:16, Roger Pau Monn=C3=A9 wrote: > On Mon, Feb 09, 2026 at 11:34:18AM +0000, Julian Vetter wrote: >> x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI >> addresses and IO-APIC RTEs only provide an 8-bit destination field. >> Without extended destination ID support, Linux limits the maximum usable >> APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, >> advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, >> signalling that guests may use MSI address bits 11:5 and IO-APIC RTE >> bits 55:49 as additional high destination ID bits. This expands the >> destination ID from 8 to 15 bits. >> >> Signed-off-by: Julian Vetter >> --- >> xen/arch/x86/cpuid.c | 9 +++++++++ >> xen/arch/x86/hvm/irq.c | 11 ++++++++++- >> xen/arch/x86/hvm/vioapic.c | 2 +- >> xen/arch/x86/hvm/vmsi.c | 4 ++-- >> xen/arch/x86/include/asm/hvm/hvm.h | 4 ++-- >> xen/arch/x86/include/asm/hvm/vioapic.h | 13 +++++++++++++ >> xen/arch/x86/include/asm/msi.h | 3 +++ >> 7 files changed, 40 insertions(+), 6 deletions(-) >> >> diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c >> index d85be20d86..fb17c71d74 100644 >> --- a/xen/arch/x86/cpuid.c >> +++ b/xen/arch/x86/cpuid.c >> @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vc= pu *v, uint32_t leaf, >> res->a |=3D XEN_HVM_CPUID_DOMID_PRESENT; >> res->c =3D d->domain_id; >> >> + /* >> + * Advertise extended destination ID support. This allows guest= s to use >> + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC R= TE for >> + * additional destination ID bits, expanding the addressable AP= IC ID >> + * range from 8 to 15 bits. This is required for x2APIC guests = with >> + * APIC IDs > 255. >> + */ >> + res->a |=3D XEN_HVM_CPUID_EXT_DEST_ID; > > This cannot be unilaterally advertised: you need a QEMU (or in general > any device model that manages PCI passthrough) to understand the > extended destination mode. This requires the introduction of > a new XEN_DOMCTL_bind_pt_irq equivalent hypercall, that can take an > extended destination ID not limited to 256 values: > > struct xen_domctl_bind_pt_irq { > [...] > uint32_t gflags; > #define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff > > When doing PCI passthrough it's QEMU the entity that decodes the MSI > address and data fields, and hence would need expanding (and > negotiation with Xen) about whether the Extended ID feature can be > advertised. > > It would be good to introduce a new XEN_DMOP_* set of hypercalls that > support Extended ID to do the PCI passthrough interrupt binding. Thank you for your feedback. But wouldn't it be enough if QEMU extracts the additional bits from the gflags and pass it on to XEN? In pt_irq_create_bind I already extract the additional bits. In QEMU the function msi_dest_id would just need to extract the additional bits before calling xc_domain_update_msi_irq. The gflags argument in xc_domain_update_msi_irq is 32Bits, so there is enough room to pass the additional bits. What do you think? Thank you Julian > > Thanks, Roger. -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 19 13:08:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 13:08:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236249.1538981 (Exim 4.92) (envelope-from ) id 1vt3lu-0002jL-PV; Thu, 19 Feb 2026 13:08:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236249.1538981; Thu, 19 Feb 2026 13:08:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3lu-0002jE-MI; Thu, 19 Feb 2026 13:08:46 +0000 Received: by outflank-mailman (input) for mailman id 1236249; Thu, 19 Feb 2026 13:08:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt3lt-0002j8-Jl for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 13:08:45 +0000 Received: from mail145-20.atl61.mandrillapp.com (mail145-20.atl61.mandrillapp.com [198.2.145.20]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1d0b5caf-0d94-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 14:08:42 +0100 (CET) Received: from pmta06.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail145-20.atl61.mandrillapp.com (Mailchimp) with ESMTP id 4fGtx472t9zCf9KLH for ; Thu, 19 Feb 2026 13:08:40 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id bb76dc39ba5247aa8f7d123dbbb7a841; Thu, 19 Feb 2026 13:08:40 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1d0b5caf-0d94-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771506521; x=1771776521; bh=/fo12rAPwmkJaFjqfpPkWAjleZNdG1jgC/lHmOpnuYs=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ePKgnaMeaEllxd5sF2U8uuqH8FnHCjy6Ze3YFPX2Dwih3zwe25zJBqGUcqmfsd2L4 H80KhC6OLtAyEuLdAPkKll0SL9ClyPHYbeyDb8mA8LJeyugm3YAgE3ubp6GqYfyEnX dO5CuwFsTOq+Ui0V6b34KTYyTXLDaekY/F1AMbP33z+Py+EEaMNRkGItml0ZhnBGVL IUE/LnLgk618YCuL9/iT+EwUpclJxRXxhyHM/s8lRsHKHCRQmBebvBlPD6vRzz48WV QrvjiZhABcV7o39OPOjxkd87J5M17DSbg801e4wN8f8u5UGnDzPnfBfXs76+drh/wG RXsA2ZEaFYLIQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771506521; x=1771767021; i=julian.vetter@vates.tech; bh=/fo12rAPwmkJaFjqfpPkWAjleZNdG1jgC/lHmOpnuYs=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=jLeATzysIUb8DC2nIT7lVvggQHNR0fkA2zLUr/xmFwJIeyLOTw7HejwUZ72mkX3JS 7zhc2yRX2soGZ9MsdVtY/1BUS6HDAOQjHMp3l3eZCAx3JsmaLmM2LpKPGNB/eLoOmn PS01t4PT7W6zL/bF5RyK2liS8BUyxVxMk9GuuRS+oQABnp67YqNRfs1mTvqfRrfkIZ 91OBWyOpNL1T5lNEFFatzPuEZsWBRUXR8BCgQkN5zWewNfHn59VUneyyuovYftJByy TayYWzgiyEA+H83aZmeK3tHgSZACbQPqh6eKeF34KSF/uzdWPLkIMR/qMchbCo8OB2 JUKZy/dXf+5QQ== From: "Julian Vetter" Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771506519994 Message-Id: To: "Teddy Astie" , xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" References: <20260209113412.2603088-1-julian.vetter@vates.tech> <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> In-Reply-To: <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.bb76dc39ba5247aa8f7d123dbbb7a841?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260219:md Date: Thu, 19 Feb 2026 13:08:40 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 2/9/26 14:40, Teddy Astie wrote: > Hello, > > Some comments, mostly code style, nothing functionnal. > > Le 09/02/2026 =C3=A0 12:36, Julian Vetter a =C3=A9crit=C2=A0: >> x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI >> addresses and IO-APIC RTEs only provide an 8-bit destination field. >> Without extended destination ID support, Linux limits the maximum usable >> APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, >> advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, >> signalling that guests may use MSI address bits 11:5 and IO-APIC RTE >> bits 55:49 as additional high destination ID bits. This expands the >> destination ID from 8 to 15 bits. >> >> Signed-off-by: Julian Vetter >> --- >> xen/arch/x86/cpuid.c | 9 +++++++++ >> xen/arch/x86/hvm/irq.c | 11 ++++++++++- >> xen/arch/x86/hvm/vioapic.c | 2 +- >> xen/arch/x86/hvm/vmsi.c | 4 ++-- >> xen/arch/x86/include/asm/hvm/hvm.h | 4 ++-- >> xen/arch/x86/include/asm/hvm/vioapic.h | 13 +++++++++++++ >> xen/arch/x86/include/asm/msi.h | 3 +++ >> 7 files changed, 40 insertions(+), 6 deletions(-) >> >> diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c >> index d85be20d86..fb17c71d74 100644 >> --- a/xen/arch/x86/cpuid.c >> +++ b/xen/arch/x86/cpuid.c >> @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vc= pu *v, uint32_t leaf, >> res->a |=3D XEN_HVM_CPUID_DOMID_PRESENT; >> res->c =3D d->domain_id; >> >> + /* >> + * Advertise extended destination ID support. This allows guest= s to use >> + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC R= TE for >> + * additional destination ID bits, expanding the addressable AP= IC ID >> + * range from 8 to 15 bits. This is required for x2APIC guests = with >> + * APIC IDs > 255. >> + */ >> + res->a |=3D XEN_HVM_CPUID_EXT_DEST_ID; >> + >> /* >> * Per-vCPU event channel upcalls are implemented and work >> * correctly with PIRQs routed over event channels. >> diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c >> index 5f64361113..2cc14d37d4 100644 >> --- a/xen/arch/x86/hvm/irq.c >> +++ b/xen/arch/x86/hvm/irq.c >> @@ -374,7 +374,16 @@ int hvm_set_pci_link_route(struct domain *d, u8 lin= k, u8 isa_irq) >> int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) >> { >> uint32_t tmp =3D (uint32_t) addr; >> - uint8_t dest =3D (tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID= _SHIFT; >> + /* >> + * Standard MSI destination: address bits 19:12 (8 bits). >> + * Extended MSI destination: address bits 11:5 (7 more bits). >> + * When XEN_HVM_CPUID_EXT_DEST_ID is advertised, the guest may use >> + * bits 11:5 for high destination ID bits, expanding to 15 bits tot= al. > > As we always advertise XEN_HVM_CPUID_EXT_DEST_ID, I would rather say > > > As XEN_HVM_CPUID_EXT_DEST_ID is advertised, ... > >> + * For legacy guests these bits are 0, so this is backwards-compati= ble. > > "Guests unaware of this feature set these bits to 0, ..." > >> + */ >> + uint32_t dest =3D >> + (((tmp & MSI_ADDR_EXT_DEST_ID_MASK) >> MSI_ADDR_EXT_DEST_ID_SHI= FT) << 8) | >> + ((tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT); > > I wonder if we should introduce a macro like you did for IO-APIC > (VIOAPIC_RTE_DEST). > >> uint8_t dest_mode =3D !!(tmp & MSI_ADDR_DESTMODE_MASK); >> uint8_t delivery_mode =3D (data & MSI_DATA_DELIVERY_MODE_MASK) >> >> MSI_DATA_DELIVERY_MODE_SHIFT; >> diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c >> index 7c725f9e47..263b1bd5cb 100644 >> --- a/xen/arch/x86/hvm/vioapic.c >> +++ b/xen/arch/x86/hvm/vioapic.c >> @@ -411,7 +411,7 @@ static void ioapic_inj_irq( >> >> static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int= pin) >> { >> - uint16_t dest =3D vioapic->redirtbl[pin].fields.dest_id; >> + uint32_t dest =3D VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); > > I would rather introduce a new field in vioapic_redir_entry for the > extended dest part; and compute dest from that and dest_id. Here I have a question. This struct is a public ABI struct. vioapic_redir_entry is defined in xen/include/public/arch-x86/hvm/save.h. It's part of XENs VM save/restore operation. It is used by libxc and toolstacks to migrate VMs between hosts. Changing the struct might be undesirable? Yes, it would make the code cleaner. having a bit entry for the extended dest bits. What's the general opinion on this? With the VIOAPIC_RTE_DEST macro I avoided touching this struct... > >> uint8_t dest_mode =3D vioapic->redirtbl[pin].fields.dest_mode; >> uint8_t delivery_mode =3D vioapic->redirtbl[pin].fields.delivery_= mode; >> uint8_t vector =3D vioapic->redirtbl[pin].fields.vector; >> diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c >> index 27b1f089e2..dca191b4f1 100644 >> --- a/xen/arch/x86/hvm/vmsi.c >> +++ b/xen/arch/x86/hvm/vmsi.c >> @@ -66,7 +66,7 @@ static void vmsi_inj_irq( >> >> int vmsi_deliver( >> struct domain *d, int vector, >> - uint8_t dest, uint8_t dest_mode, >> + uint32_t dest, uint8_t dest_mode, >> uint8_t delivery_mode, uint8_t trig_mode) >> { >> struct vlapic *target; >> @@ -125,7 +125,7 @@ void vmsi_deliver_pirq(struct domain *d, const struc= t hvm_pirq_dpci *pirq_dpci) >> } >> >> /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id *= / >> -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t des= t_mode) >> +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t de= st_mode) >> { >> int dest_vcpu_id =3D -1, w =3D 0; >> struct vcpu *v; >> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/a= sm/hvm/hvm.h >> index 7d9774df59..11256d5e67 100644 >> --- a/xen/arch/x86/include/asm/hvm/hvm.h >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >> @@ -295,11 +295,11 @@ uint64_t hvm_get_guest_time_fixed(const struct vcp= u *v, uint64_t at_tsc); >> >> int vmsi_deliver( >> struct domain *d, int vector, >> - uint8_t dest, uint8_t dest_mode, >> + uint32_t dest, uint8_t dest_mode, >> uint8_t delivery_mode, uint8_t trig_mode); >> struct hvm_pirq_dpci; >> void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *= pirq_dpci); >> -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t des= t_mode); >> +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t de= st_mode); >> >> enum hvm_intblk >> hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack); >> diff --git a/xen/arch/x86/include/asm/hvm/vioapic.h b/xen/arch/x86/inclu= de/asm/hvm/vioapic.h >> index 68af6dce79..b49eb348d5 100644 >> --- a/xen/arch/x86/include/asm/hvm/vioapic.h >> +++ b/xen/arch/x86/include/asm/hvm/vioapic.h >> @@ -32,6 +32,19 @@ >> #define VIOAPIC_EDGE_TRIG 0 >> #define VIOAPIC_LEVEL_TRIG 1 >> >> +/* >> + * Extract the destination ID from a 64-bit IO-APIC RTE, including the >> + * extended bits (55:49) used when XEN_HVM_CPUID_EXT_DEST_ID is adverti= sed. >> + */ >> +#define IO_APIC_REDIR_DEST_SHIFT 56 >> +#define IO_APIC_REDIR_DEST_MASK 0xffULL >> +#define IO_APIC_REDIR_EXT_DEST_SHIFT 49 >> +#define IO_APIC_REDIR_EXT_DEST_MASK 0x7fULL >> + >> +#define VIOAPIC_RTE_DEST(rte) \ >> + ((((rte) >> IO_APIC_REDIR_DEST_SHIFT) & IO_APIC_REDIR_DEST_MASK) | = \ >> + (((rte) >> IO_APIC_REDIR_EXT_DEST_SHIFT) & IO_APIC_REDIR_EXT_DEST_= MASK) << 8) >> + >> #define VIOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000U >> #define VIOAPIC_MEM_LENGTH 0x100 >> >> diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/m= si.h >> index 00059d4a3a..b7a132e5b5 100644 >> --- a/xen/arch/x86/include/asm/msi.h >> +++ b/xen/arch/x86/include/asm/msi.h >> @@ -54,6 +54,9 @@ >> #define=09 MSI_ADDR_DEST_ID_MASK=09=090x00ff000 >> #define MSI_ADDR_DEST_ID(dest)=09=09(((dest) << MSI_ADDR_DEST_ID_SHI= FT) & MSI_ADDR_DEST_ID_MASK) >> >> +#define MSI_ADDR_EXT_DEST_ID_SHIFT=095 >> +#define MSI_ADDR_EXT_DEST_ID_MASK=090x0000fe0 >> + >> /* MAX fixed pages reserved for mapping MSIX tables. */ >> #define FIX_MSIX_MAX_PAGES 512 >> > > > > -- > Teddy Astie | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 19 13:24:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 13:24:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236259.1538990 (Exim 4.92) (envelope-from ) id 1vt40P-0005US-Vd; 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Smith" Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 13:34, Daniel P. Smith wrote: > On 2/19/26 06:11, Jan Beulich wrote: >> On 18.02.2026 20:08, Daniel P. Smith wrote: >>> @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>> >>> while ( dom_state_changed ) >>> { >>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >>> if ( dom >= DOMID_FIRST_RESERVED ) >>> break; >>> + >>> + d = rcu_lock_domain_by_id(dom); >>> + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) >>> + { >>> + rcu_unlock_domain(d); >>> + d = NULL; >> >> This looks unnecessary; the next loop iteration will set d unconditionally, >> and d isn't (and wasn't) used past the loop. Plus there is also no such >> clearing after the other rcu_unlock_domain(). >> > > If the src domain didn't have the permission on any of the target > domains, then *d will leak the last domain checked back to the caller. > While I didn't see it being used after the call site, it's a good > principle not to leak from a function an object for which access was denied. I don't follow: What do you mean by "*d will leak"? d is local to this function; no domain pointer is being returned. >>> + continue; >>> + } >> >> This cleanup here also is redundant with the one done further down. Imo where >> possible we should prefer to have only a single such instance, which looks to >> be easily possible by using ... >> >>> if ( test_and_clear_bit(dom, dom_state_changed) ) >> >> >> if ( (!d || !xsm_get_domain_state(XSM_XS_PRIV, d)) && >> test_and_clear_bit(dom, dom_state_changed) ) >> >> or >> >> if ( (d && xsm_get_domain_state(XSM_XS_PRIV, d)) || >> !test_and_clear_bit(dom, dom_state_changed) ) >> { >> ... >> continue; >> } >> >> albeit then the reduction of indentation of the subsequent code would cause >> quite a bit more code churn. > > I would prefer the latter to keep the clearing of d to NULL only when > access was denied. I again don't understand, as ... >>> { >>> *domid = dom; >>> >>> - d = rcu_lock_domain_by_id(dom); >>> - >>> if ( d ) >>> { >>> set_domain_state_info(info, d); >>> - >>> rcu_unlock_domain(d); >>> } >>> else >>> memset(info, 0, sizeof(*info)); >>> >>> rc = 0; >>> - >>> break; ... this code would remain unchanged apart from the reduced indentation. >> I don't think the blank lines need dropping for the purpose of the patch? >> Yes, they may seem excessive, but nevertheless some prefer to have rather >> too many of them than too few. (Personally I don't mind their removal, >> but that really doesn't look to belong here.) > > Okay, but as you state above, with the compounding of the if statement, > the indentation will go away and the whole section will a remove/add > section to the diff. Would you still want the line spacing maintained? As said, I don't mind those particular blank lines being dropped (if that's because adjacent lines are touched anyway). >>> --- a/xen/common/domctl.c >>> +++ b/xen/common/domctl.c >>> @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >>> break; >>> >>> case XEN_DOMCTL_get_domain_state: >>> - ret = xsm_get_domain_state(XSM_XS_PRIV, d); >>> - if ( ret ) >>> - break; >>> - >>> - copyback = 1; >>> ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); >>> + if ( !ret ) >>> + copyback = 1; >> >> Nit: As you need to touch this, please switch to using "true". > > Just to be clear, you mean switching to a conditional statement vs > testing for not zero? No. I mean using "true" in place of "1", since copyback is of type "bool". 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Thu, 19 Feb 2026 05:28:53 -0800 (PST) Message-ID: Date: Thu, 19 Feb 2026 14:28:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Advertise and support extended destination IDs for MSI/IO-APIC To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org References: <20260209113412.2603088-1-julian.vetter@vates.tech> <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 19.02.2026 14:08, Julian Vetter wrote: > On 2/9/26 14:40, Teddy Astie wrote: >> Le 09/02/2026 à 12:36, Julian Vetter a écrit : >>> --- a/xen/arch/x86/hvm/vioapic.c >>> +++ b/xen/arch/x86/hvm/vioapic.c >>> @@ -411,7 +411,7 @@ static void ioapic_inj_irq( >>> >>> static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) >>> { >>> - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; >>> + uint32_t dest = VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); >> >> I would rather introduce a new field in vioapic_redir_entry for the >> extended dest part; and compute dest from that and dest_id. > > Here I have a question. This struct is a public ABI struct. > vioapic_redir_entry is defined in > xen/include/public/arch-x86/hvm/save.h. It's part of XENs VM > save/restore operation. It is used by libxc and toolstacks to migrate > VMs between hosts. Changing the struct might be undesirable? Yes, it > would make the code cleaner. having a bit entry for the extended dest > bits. What's the general opinion on this? With the VIOAPIC_RTE_DEST > macro I avoided touching this struct... Which in turn raises the question: How do you migrate those bits? It looks like you're losing them. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 19 13:29:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 13:29:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236273.1539011 (Exim 4.92) (envelope-from ) id 1vt45k-0006Ru-T0; Thu, 19 Feb 2026 13:29:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236273.1539011; Thu, 19 Feb 2026 13:29:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt45k-0006Rn-PG; Thu, 19 Feb 2026 13:29:16 +0000 Received: by outflank-mailman (input) for mailman id 1236273; Thu, 19 Feb 2026 13:29:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt45i-00064f-Bm for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 13:29:14 +0000 Received: from mx1.somlen.de (typhoon.somlen.de [89.238.64.140]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f9cb4172-0d96-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 14:29:11 +0100 (CET) Received: by mx1.somlen.de with ESMTPSA id 6F6F95030D0; Thu, 19 Feb 2026 14:29:10 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f9cb4172-0d96-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daemonizer.de; s=202303; t=1771507750; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UYCYLf3Qbb8Q/36IvP2edHC4iIn3vZFJTLRG5oXBiDc=; b=pqcQKLJ5mDxPHH5cRkdxCDCkFUghGgX/jSuTidg0OHOB594p5JcDQTU5n306VtUXYytS4K OzSl+fnfkaU/ZUnD1J4kEb6xyBKYKCbolcQj6mNWm1gaudbpE+5MLGjWJPsJOS/oW+jjhy 2ahcWdH0BuipYfPG8HuFB/rKG/dIYC7oJWvaBDAeT4+MJnjj/BYpGdxCKIQjk8cZ1vG7Jt XHoYes87ESAfOOXGvhP9pdl4TkAA951cF//4WZ4qlEoWDVpRjIuNDnMDZay/1+6D7HuOo+ T3pfz+0fFflAyUar2gbY63havN6F0QWuykcF1MU+xFtIN1ZzvEpEgsYZYigKHA== From: Maximilian Engelhardt To: xen-devel@lists.xenproject.org, Anthony PERARD Cc: Jan Beulich , Anthony PERARD , Juergen Gross Subject: Re: [XEN PATCH] libxl: Fix device_add QMP calls with QEMU 9.2 and newer Date: Thu, 19 Feb 2026 14:29:07 +0100 Message-ID: <2692705.Lt9SDvczpP@localhost> In-Reply-To: References: <20251215135124.11410-1-anthony@xenproject.org> <92e6ecac-7a5f-4831-8116-0c34856f1175@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8" On Monday, 15 December 2025 15:41:02 CET Anthony PERARD wrote: > On Mon, Dec 15, 2025 at 03:11:53PM +0100, Jan Beulich wrote: > > On 15.12.2025 14:51, Anthony PERARD wrote: > > > From: Anthony PERARD > > > > > > QEMU used to ignore JSON types and do conversion string <-> integer > > > automatically for the command "device_add", but that was removed in > > > QEMU 9.2 (428d1789df91 ("docs/about: Belatedly document tightening of > > > QMP device_add checking")). > > > > And older qemu accepts integers as well? > > As the QEMU document explains about the removed feature is that they > should. We already have two users of `device_add` which use integers for > some arguments. And just to be sure, I've just tested with QEMU 8.0, the > patch works fine. > > Cheers, Can this patch be picked for the stable branches? I'm in particular interested in 4.20 which is in Debian stable. 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Thu, 19 Feb 2026 05:32:40 -0800 (PST) Message-ID: <8f7bafe8-c27e-45c3-8811-f079c4fb6e61@suse.com> Date: Thu, 19 Feb 2026 14:32:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/7] xen/console: use bool as return value from printk_ratelimit() To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-3-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-3-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > From: Denis Mukhin > > {do_,}printk_ratelimit() are predicates. Make that pronounced by updating the > return value to boolean. > > Not a functional change. > > Signed-off-by: Denis Mukhin Acked-by: Jan Beulich Yet to make it explicit: I'm not quite sure I want to ack patch 1. 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Thu, 19 Feb 2026 05:35:55 -0800 (PST) Message-ID: <2eba7de1-a8e2-4c45-affb-8ecb91278707@suse.com> Date: Thu, 19 Feb 2026 14:35:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/7] xen/console: add build-time rate-limiting controls To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-4-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-4-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > From: Denis Mukhin > > Introduce CONFIG_PRINTK_RATELIMIT_MS and CONFIG_PRINTK_RATELIMIT_BURST > for configuring rate-limiting policy at the compile time. > > Use symbols for global rate-limiting initialization in the console driver. > > Signed-off-by: Denis Mukhin I'm not sure this is a direction we want to move into, so just one formal remark below. > --- a/xen/drivers/char/Kconfig > +++ b/xen/drivers/char/Kconfig > @@ -103,3 +103,28 @@ config XHCI > Enabling this option makes Xen use extra ~230KiB memory, even if XHCI UART > is not selected. > If you have an x86 based system with USB3, say Y. > + > +config PRINTK_RATELIMIT_MS > + int "printk rate-limiting time window (milliseconds)" > + default 5000 > + help > + Specifies the time window, in milliseconds, for rate-limited printk > + messages. No more than `CONFIG_PRINTK_RATELIMIT_BURST` messages will be > + printed within this window. > + > + Setting this value to 0 disables rate-limiting entirely. > + > + Rate-limited messages are those controlled by the `loglvl` and > + `guest_loglvl` command-line parameters. > + > +config PRINTK_RATELIMIT_BURST > + int "printk rate-limited message burst size" > + default 10 > + help > + Defines the maximum number of rate-limited printk messages that may be > + printed within each `CONFIG_PRINTK_RATELIMIT_MS` time window. > + > + Setting this value to 0 disables rate-limiting entirely. > + > + Rate-limited messages are those controlled by the `loglvl` and > + `guest_loglvl` command-line parameters. printk() is implemented under drivers/char/, but I'm unconvinced of placing such pretty much global controls here (rather than in common/Kconfig). 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Thu, 19 Feb 2026 05:37:57 -0800 (PST) Message-ID: <4531d175-2e37-4b37-a157-82742a87dd18@suse.com> Date: Thu, 19 Feb 2026 14:37:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/7] xen/console: add run-time rate-limiting controls To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-5-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-5-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > From: Denis Mukhin > > Add new "printk_ratelimit_ms" and "printk_ratelimit_burst" command line > parameters for global rate-limiting controls. > > Drop `const` and add `__read_mostly` for both global parameters > printk_ratelimit_{ms,burst}. > > Update command line documentation. > > Signed-off-by: Denis Mukhin Like for the previous patch, I'm not sure we want/need this, so again only two formal things: > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -2077,6 +2077,33 @@ compression is selected at build time from Kconfig. > This is a mask of C-states which are to be used preferably. This option is > applicable only on hardware were certain C-states are exclusive of one another. > > +### printk_ratelimit_ms New options want to use dashes in favor of underscores. > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -344,6 +344,20 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) > do_adj_thresh(key); > } > > +/* > + * Global rate-limiting controls for printk(). > + */ > + > +/* Minimum time in ms between messages */ > +static unsigned int __read_mostly printk_ratelimit_ms = > + CONFIG_PRINTK_RATELIMIT_MS; > +integer_param("printk_ratelimit_ms", printk_ratelimit_ms); > + > +/* Number of messages we send before ratelimiting */ > +static unsigned int __read_mostly printk_ratelimit_burst = > + CONFIG_PRINTK_RATELIMIT_BURST; > +integer_param("printk_ratelimit_burst", printk_ratelimit_burst); > + > /* > * ******************************************************** > * *************** ACCESS TO CONSOLE RING ***************** > @@ -1320,14 +1334,6 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, > return false; > } > > -/* Minimum time in ms between messages */ > -static const unsigned int printk_ratelimit_ms = > - CONFIG_PRINTK_RATELIMIT_MS; > - > -/* Number of messages we send before ratelimiting */ > -static const unsigned int printk_ratelimit_burst = > - CONFIG_PRINTK_RATELIMIT_BURST; > - > bool printk_ratelimit(void) > { > return do_printk_ratelimit(printk_ratelimit_ms, printk_ratelimit_burst); Do things really need moving around? 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Thu, 19 Feb 2026 05:44:44 -0800 (PST) Message-ID: <6ad27357-277b-4236-8c82-2cf358aaadc6@suse.com> Date: Thu, 19 Feb 2026 14:44:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/7] xen/console: correct leaky-bucket rate limiter To: dmukhin@ford.com, xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-6-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > From: Denis Mukhin > > Use existing printk_ratelimit_ms and printk_ratelimit_burst variables in > do_printk_ratelimit() instead of hardcoded values 5000 and 10 respectively. > > Ensure rate limiter is disabled if either printk_ratelimit_ms or > printk_ratelimit_burst is 0. Make sure no unnecessary initialization is done > in the corner case. > > Also, simplify the limiter code by using min(). > > Signed-off-by: Denis Mukhin > --- > Changes since v1: > - new patch > --- > xen/drivers/char/console.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c > index f607e8f84d7a..e3962512d282 100644 > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -1291,21 +1291,27 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, > unsigned int ratelimit_burst) > { > static DEFINE_SPINLOCK(ratelimit_lock); > - static unsigned long toks = 10 * 5 * 1000; Shouldn't this have been adjusted already in patches 3 and 4? > + static unsigned long toks; > static unsigned long last_msg; > static unsigned int missed; > unsigned long flags; > - unsigned long long now = NOW(); /* ns */ > + unsigned long long now; > unsigned long ms; > > + if ( !printk_ratelimit_burst || !printk_ratelimit_burst ) > + return true; > + > + if ( !toks ) > + toks = printk_ratelimit_burst * printk_ratelimit_ms; This multiplication can overflow (which is avoidable on 64-bit arch-es, but needs checking for on 32-bit ones in any event). > + now = NOW(); /* ns */ > do_div(now, 1000000); > ms = (unsigned long)now; > > spin_lock_irqsave(&ratelimit_lock, flags); > toks += ms - last_msg; > last_msg = ms; > - if ( toks > (ratelimit_burst * ratelimit_ms)) > - toks = ratelimit_burst * ratelimit_ms; > + toks = min(toks, (unsigned long)(ratelimit_burst * ratelimit_ms)); If you need the product anyway, calculate it once (correctly) and then you won't need a cast here either. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 19 13:52:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 13:52:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236322.1539061 (Exim 4.92) (envelope-from ) id 1vt4SW-0004i6-JK; Thu, 19 Feb 2026 13:52:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236322.1539061; Thu, 19 Feb 2026 13:52:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt4SW-0004hz-Fa; Thu, 19 Feb 2026 13:52:48 +0000 Received: by outflank-mailman (input) for mailman id 1236322; Thu, 19 Feb 2026 13:52:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt4SU-0004ht-JC for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 13:52:46 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 43680ca5-0d9a-11f1-9ccf-f158ae23cfc8; Thu, 19 Feb 2026 14:52:44 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fGvvt3RSYz5QlX0x for ; Thu, 19 Feb 2026 13:52:42 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 810292f8c720492387bbb50698c81adf; Thu, 19 Feb 2026 13:52:42 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 43680ca5-0d9a-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771509162; x=1771779162; bh=BBrVcbbNtwYn8Bw8VHyl0I/9e0TWPexjO3vd3ypTCUs=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Y6GFnuQLdEYX56T1dQPrfWjf1M95TXBSENnYgNxvQILOtV57zy9A81UycTDKQEFS1 dVgwvqv6mJAzZM8CaIOZbboY3AhNoKe2FX8v0XIFXQFtcUmVOoleteetlG0L/QOip+ WSZNG3WPJbK7nlrbyDncPh9gsIOrcZNC1HY1ZueyXzARSV3CRaXPvzzQP2i3KezVgb 0tVB/Cyp+1i6JJfTA1v8EUo7OO5RWw0McChbhLQvwnwCIrz2kJICyAq89HEwnyEFE0 46fhpHk/yx9N12GZA3ffTEkSesoW5oqy6dyP9QcPZl+Dp+8Zw21rYOVq0K0klwSbDT V6LaeRyaBBJMg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771509162; x=1771769662; i=julian.vetter@vates.tech; bh=BBrVcbbNtwYn8Bw8VHyl0I/9e0TWPexjO3vd3ypTCUs=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=QjnaUTfrn8wvnGNntTEyL1T2KVAS4lefsc1PGHCWhKSIw84Rqdk3odDc1IhB70MU6 IwiUq5kd4K61/P+N1ZZQTye19rHLWEb1oFS5TdBg8+tBhFfrhetaLuRqo7hHVGljSF n3FKE+h5Zy5f+j2FQBhY/ht+ezkgIu7uWVEpY39uDErmOZiRmqOfw4eN6NwMq9GQZq QS1WqcVhMImd4RUjvs/7ng6ctkAh4n7D950jIxvhSdZt4wCk360ox6+r5M9NN/x+lj 1WTtLmGeAzrGmO/MUTNVfPt87inPrxOOScSXc4RNHPWovnQHirKkJtEQ7GUUMtLN/p 5HrqWfHlGHUNQ== From: "Julian Vetter" Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771509161453 Message-Id: To: "Jan Beulich" Cc: "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Teddy Astie" , xen-devel@lists.xenproject.org References: <20260209113412.2603088-1-julian.vetter@vates.tech> <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.810292f8c720492387bbb50698c81adf?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260219:md Date: Thu, 19 Feb 2026 13:52:42 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 2/19/26 14:28, Jan Beulich wrote: > On 19.02.2026 14:08, Julian Vetter wrote: >> On 2/9/26 14:40, Teddy Astie wrote: >>> Le 09/02/2026 =C3=A0 12:36, Julian Vetter a =C3=A9crit=C2=A0: >>>> --- a/xen/arch/x86/hvm/vioapic.c >>>> +++ b/xen/arch/x86/hvm/vioapic.c >>>> @@ -411,7 +411,7 @@ static void ioapic_inj_irq( >>>> >>>> static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned = int pin) >>>> { >>>> - uint16_t dest =3D vioapic->redirtbl[pin].fields.dest_id; >>>> + uint32_t dest =3D VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); >>> >>> I would rather introduce a new field in vioapic_redir_entry for the >>> extended dest part; and compute dest from that and dest_id. >> >> Here I have a question. This struct is a public ABI struct. >> vioapic_redir_entry is defined in >> xen/include/public/arch-x86/hvm/save.h. It's part of XENs VM >> save/restore operation. It is used by libxc and toolstacks to migrate >> VMs between hosts. Changing the struct might be undesirable? Yes, it >> would make the code cleaner. having a bit entry for the extended dest >> bits. What's the general opinion on this? With the VIOAPIC_RTE_DEST >> macro I avoided touching this struct... > > Which in turn raises the question: How do you migrate those bits? It look= s > like you're losing them. The bits are preserved correctly. The migration saves/restores the full uint64_t bit union member, not the individual bit fields. But, the issue is maybe in the other direction? If we migrate a VM from a new XEN (where the guest has programmed extended dest IDs into RTEs) to an old XEN that doesn't understand them. The raw bits would be restored correctly into bits, but the old XENs vioapic_deliver only reads fields.dest_id (8 bits) and would silently ignore the extended bits. The guest would end up with broken interrupt routing to vCPUs with APIC ID > 255. But there is not much we can do?! > > Jan -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 19 14:11:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 14:11:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236341.1539070 (Exim 4.92) (envelope-from ) id 1vt4kn-0007x9-1n; Thu, 19 Feb 2026 14:11:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236341.1539070; Thu, 19 Feb 2026 14:11:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt4km-0007x2-VG; Thu, 19 Feb 2026 14:11:40 +0000 Received: by outflank-mailman (input) for mailman id 1236341; Thu, 19 Feb 2026 14:11:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt4kl-0007ww-Sv for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 14:11:39 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e77976f1-0d9c-11f1-9ccf-f158ae23cfc8; Thu, 19 Feb 2026 15:11:37 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4837584120eso7333855e9.1 for ; Thu, 19 Feb 2026 06:11:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 19 Feb 2026 06:11:36 -0800 (PST) Message-ID: <171f74cf-9456-4d55-b730-7f9016a09ff6@suse.com> Date: Thu, 19 Feb 2026 15:11:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/7] xen/console: correct leaky-bucket rate limiter To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-6-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -1291,21 +1291,27 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, > unsigned int ratelimit_burst) > { > static DEFINE_SPINLOCK(ratelimit_lock); > - static unsigned long toks = 10 * 5 * 1000; > + static unsigned long toks; > static unsigned long last_msg; > static unsigned int missed; > unsigned long flags; > - unsigned long long now = NOW(); /* ns */ > + unsigned long long now; > unsigned long ms; > > + if ( !printk_ratelimit_burst || !printk_ratelimit_burst ) > + return true; > + > + if ( !toks ) > + toks = printk_ratelimit_burst * printk_ratelimit_ms; Btw, instead of this I wonder whether it wouldn't be neater to use the nested functions extension of the compiler: void __constructor __init init(void) { toks = printk_ratelimit_burst * printk_ratelimit_ms; } If we wanted this, we'd need to record the extension use in docs/misra/C-language-toolchain.rst, though. Plus init_constructors() would need invoking _far_ earlier (perhaps right after command line parsing). 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Thu, 19 Feb 2026 06:13:38 -0800 (PST) Message-ID: Date: Thu, 19 Feb 2026 15:13:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/7] xen/console: use s_time_t for time accounting in do_printk_ratelimit() To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-7-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-7-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -1291,12 +1291,10 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, > unsigned int ratelimit_burst) > { > static DEFINE_SPINLOCK(ratelimit_lock); > - static unsigned long toks; > - static unsigned long last_msg; > + static s_time_t toks, last_msg; > + s_time_t now, ms; For now (i.e. return values of NOW()) s_time_t is appropriate to use. For millisecond values and alike it isn't, though. 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Thu, 19 Feb 2026 06:18:49 -0800 (PST) Message-ID: Date: Thu, 19 Feb 2026 15:18:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 7/7] xen/console: simplify printouts in do_printk_ratelimit() To: dmukhin@ford.com Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org References: <20260206202424.2054758-1-dmukhin@ford.com> <20260206202424.2054758-8-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260206202424.2054758-8-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.02.2026 21:24, dmukhin@ford.com wrote: > From: Denis Mukhin > > Simplify the code around notification of how many messages have been > rate-limited. "Simplify" in what dimension? > --- > xen/drivers/char/console.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) Diffstat says there's no difference. > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -1318,15 +1318,15 @@ static bool do_printk_ratelimit(unsigned int ratelimit_ms, > spin_unlock(&ratelimit_lock); > if ( lost ) > { > - char lost_str[10]; > + char msg[40]; > + > + snprintf(msg, sizeof(msg), > + "printk: %u messages suppressed\n", lost); Having snprintf() process a longer string means there's more runtime overhead. > - snprintf(lost_str, sizeof(lost_str), "%u", lost); > /* console_lock may already be acquired by printk(). */ > rspin_lock(&console_lock); > printk_start_of_line(CONSOLE_PREFIX); > - __putstr("printk: "); > - __putstr(lost_str); > - __putstr(" messages suppressed.\n"); > + __putstr(msg); > rspin_unlock(&console_lock); > } > local_irq_restore(flags); The net win therefore looks to be one __putstr() where previously we had three. While it's less obvious then that the array size is actually large enough. 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Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/19/26 08:23, Jan Beulich wrote: > On 19.02.2026 13:34, Daniel P. Smith wrote: >> On 2/19/26 06:11, Jan Beulich wrote: >>> On 18.02.2026 20:08, Daniel P. Smith wrote: >>>> @@ -238,28 +242,39 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, >>>> >>>> while ( dom_state_changed ) >>>> { >>>> - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>> + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); >>>> if ( dom >= DOMID_FIRST_RESERVED ) >>>> break; >>>> + >>>> + d = rcu_lock_domain_by_id(dom); >>>> + if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) >>>> + { >>>> + rcu_unlock_domain(d); >>>> + d = NULL; >>> >>> This looks unnecessary; the next loop iteration will set d unconditionally, >>> and d isn't (and wasn't) used past the loop. Plus there is also no such >>> clearing after the other rcu_unlock_domain(). >>> >> >> If the src domain didn't have the permission on any of the target >> domains, then *d will leak the last domain checked back to the caller. >> While I didn't see it being used after the call site, it's a good >> principle not to leak from a function an object for which access was denied. > > I don't follow: What do you mean by "*d will leak"? d is local to this function; > no domain pointer is being returned. > My bad, you are correct, will drop. >>>> + continue; >>>> + } >>> >>> This cleanup here also is redundant with the one done further down. Imo where >>> possible we should prefer to have only a single such instance, which looks to >>> be easily possible by using ... >>> >>>> if ( test_and_clear_bit(dom, dom_state_changed) ) >>> >>> >>> if ( (!d || !xsm_get_domain_state(XSM_XS_PRIV, d)) && >>> test_and_clear_bit(dom, dom_state_changed) ) >>> >>> or >>> >>> if ( (d && xsm_get_domain_state(XSM_XS_PRIV, d)) || >>> !test_and_clear_bit(dom, dom_state_changed) ) >>> { >>> ... >>> continue; >>> } >>> >>> albeit then the reduction of indentation of the subsequent code would cause >>> quite a bit more code churn. >> >> I would prefer the latter to keep the clearing of d to NULL only when >> access was denied. > > I again don't understand, as ... > >>>> { >>>> *domid = dom; >>>> >>>> - d = rcu_lock_domain_by_id(dom); >>>> - >>>> if ( d ) >>>> { >>>> set_domain_state_info(info, d); >>>> - >>>> rcu_unlock_domain(d); >>>> } >>>> else >>>> memset(info, 0, sizeof(*info)); >>>> >>>> rc = 0; >>>> - >>>> break; > > ... this code would remain unchanged apart from the reduced indentation. > >>> I don't think the blank lines need dropping for the purpose of the patch? >>> Yes, they may seem excessive, but nevertheless some prefer to have rather >>> too many of them than too few. (Personally I don't mind their removal, >>> but that really doesn't look to belong here.) >> >> Okay, but as you state above, with the compounding of the if statement, >> the indentation will go away and the whole section will a remove/add >> section to the diff. Would you still want the line spacing maintained? > > As said, I don't mind those particular blank lines being dropped (if that's > because adjacent lines are touched anyway). > ack. >>>> --- a/xen/common/domctl.c >>>> +++ b/xen/common/domctl.c >>>> @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >>>> break; >>>> >>>> case XEN_DOMCTL_get_domain_state: >>>> - ret = xsm_get_domain_state(XSM_XS_PRIV, d); >>>> - if ( ret ) >>>> - break; >>>> - >>>> - copyback = 1; >>>> ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); >>>> + if ( !ret ) >>>> + copyback = 1; >>> >>> Nit: As you need to touch this, please switch to using "true". >> >> Just to be clear, you mean switching to a conditional statement vs >> testing for not zero? > > No. I mean using "true" in place of "1", since copyback is of type "bool". > ack. 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bh=qYK2ZDaHL3CDGHtV+ngCMUktxVage+/6HNdZScp0ESE=; b=Top2128g7fBLA8L7RxRslNLcDETj1XYPxo97d3rODJE9XGxsSB+pOYVu3/BakmdbWGrR49eb1QrKVXuWtM2h/xuKKFs0wzSHEakDM+EL83TT7P7srhJ5J1tbVOxVKIBn8bVGN1bMli4M/9CEQ9EIrZdGxqXL1MK8x0YWOJzBoiA= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: <88098c92-b905-49bf-be78-ccc794b1d5e0@amd.com> Date: Thu, 19 Feb 2026 06:31:05 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Jan Beulich CC: Chris Rogers , Dmytro Firsov , Andrew Cooper , "Anthony PERARD" , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Daniel P. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: skQTELzijJ7mplWEKKqpn+RXhYSSRHCsGASFqYKGg7q5ASnQmi+D/Jc+QJQdIuQdT9+YDhrHYytFCfmfWeJRT+3yKFCFxazl/UT0ZAvxm/UHcWa56AhBkiMMDR7zTLWmX+jYWAdlBAgS4nL6muT93a1/K5UIALb2VqxbImZ31o4hQKFQs3BU7kwHFqwzSVbLq7SXVrVPr1D+UrZ8t19bE35a6nrAO5KYzOBPqrCpLSy3DpD6sp1zjjdLVfvCDb8W/3S3g04YzfyV6UIDDbDFfl0lQIaVy7xUb5J8I4+PQhEc//R3RYm4N9msFBPSmGwMhODRYAwRF640iDbrvpCXSdodLF5ymeiirRJc16VD2AMr84+7J06LtJG7woA1gKTnvm0Zil1Jw5krcjVAicAcRNw8d8Ps4IBrBMRzBaD0h2aHDXdks/qvdcjzua/vpzn0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Feb 2026 14:37:04.8519 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c23c847-32eb-4c89-7863-08de6fc45a1e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7535 On 2026-02-19 06:21, Jürgen Groß wrote: > On 19.02.26 12:13, Jan Beulich wrote: >> On 19.02.2026 12:03, Juergen Gross wrote: >>> On 19.02.26 11:52, Jan Beulich wrote: >>>> On 19.02.2026 00:04, Jason Andryuk wrote: >>>>> On 2026-02-18 14:08, Daniel P. Smith wrote: >>>>>> --- a/xen/common/domain.c >>>>>> +++ b/xen/common/domain.c >>>>>> @@ -210,7 +210,7 @@ static void set_domain_state_info(struct >>>>>> xen_domctl_get_domain_state *info, >>>>>>     int get_domain_state(struct xen_domctl_get_domain_state *info, >>>>>> struct domain *d, >>>>>>                          domid_t *domid) >>>>>>     { >>>>>> -    unsigned int dom; >>>>>> +    unsigned int dom = -1; >>>>>>         int rc = -ENOENT; >>>>>>         struct domain *hdl; >>>>>> @@ -219,6 +219,10 @@ int get_domain_state(struct >>>>>> xen_domctl_get_domain_state *info, struct domain *d, >>>>>>         if ( d ) >>>>>>         { >>>>>> +        rc = xsm_get_domain_state(XSM_XS_PRIV, d); >>>>>> +        if ( rc ) >>>>>> +            return rc; >>>>>> + >>>>>>             set_domain_state_info(info, d); >>>>>>             return 0; >>>>>> @@ -238,28 +242,39 @@ int get_domain_state(struct >>>>>> xen_domctl_get_domain_state *info, struct domain *d, >>>>> >>>>> Between the two hunks is this: >>>>> >>>>>        hdl = lock_dom_exc_handler(); >>>>> >>>>>        /* >>>>>         * Only domain registered for VIRQ_DOM_EXC event is allowed >>>>> to query >>>>>         * domains having changed state. >>>>>         */ >>>>>        if ( current->domain != hdl ) >>>>>        { >>>>>            rc = -EACCES; >>>>>            goto out; >>>>>        } >>>>> >>>>> So it is only the domain with VIRQ_DOM_EXC that can enter the while >>>>> loop: >>>>> >>>>>>         while ( dom_state_changed ) >>>>>>         { >>>>>> -        dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); >>>>>> +        dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, >>>>>> dom + 1); >>>>>>             if ( dom >= DOMID_FIRST_RESERVED ) >>>>>>                 break; >>>>>> + >>>>>> +        d = rcu_lock_domain_by_id(dom); >>>>>> +        if ( d && xsm_get_domain_state(XSM_XS_PRIV, d) ) >>>>> >>>>> ... if the VIRQ_DOM_EXC owner is denied for domain d ... >>>>> >>>>>> +        { >>>>>> +            rcu_unlock_domain(d); >>>>>> +            d = NULL; >>>>>> +            continue; >>>>> >>>>> ... the caller would continue ... >>>>> >>>>>> +        } >>>>>> + >>>>>>             if ( test_and_clear_bit(dom, dom_state_changed) ) >>>>> >>>>> ... and this bit would never be cleared.  Should the VIRQ_DOM_EXC >>>>> owner >>>>> always get to clear the bit even if it cannot see the result? >>>> >>>> I don't think so, no. Whenever a legitimate consumer occurs (the >>>> owner of >>>> VIRQ_DOM_EXC can change, after all), it'll then consume the bits as >>>> needed. >>>> More generally, I think we're better off not making the code here >>>> depend >>>> too much on that special VIRQ_DOM_EXC property. >>> >>> OTOH a new VIRQ_DOM_EXC owner will result in a complete reset of the >>> bitmap >>> anyway (that is: the bits for all existing domains will be set, while >>> all >>> others will be cleared). >> >> Yes, while writing my reply I wondered whether I should mention that. >> To keep >> things a little more simple, I didn't. Plus for this aspect the last >> sentence >> of my earlier reply also applies. > > I believe flask settings can be changed, right? > > If so, clearing the bit would be affecting the scenario where the > VIRQ_DOM_EXC > is NOT changed, but the flask settings are updated to allow it obtaining > info > about d. Yes, this could happen, so the bits should remain set. Thanks, Jason From xen-devel-bounces@lists.xenproject.org Thu Feb 19 14:42:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 14:42:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236414.1539134 (Exim 4.92) (envelope-from ) id 1vt5E8-00064r-AZ; Thu, 19 Feb 2026 14:42:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236414.1539134; Thu, 19 Feb 2026 14:42:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt5E8-00064k-62; Thu, 19 Feb 2026 14:42:00 +0000 Received: by outflank-mailman (input) for mailman id 1236414; Thu, 19 Feb 2026 14:41:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt5E6-00064e-Nn for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 14:41:58 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2318b972-0da1-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 15:41:56 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771512105172179.85618630309523; Thu, 19 Feb 2026 06:41:45 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2318b972-0da1-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771512109; cv=none; d=zohomail.com; s=zohoarc; b=GmPpSgtzR0jw990HLRwR+n9r9u4wy9qoV+v5rZpJrOPcPBXLgXQzLnTWcib+f0SNDxExEIr8mND2FKQ8swEOxBWHocVjR+SRkYNG+XzGCAtkDwOpgSjcyoR/hHl2uFwoHOdf5FcVDSKc4k1Zf/8VdnQdS+EOn4RwYMGsIoHYECQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771512109; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=kEm1nq/NUwA6BJvciL7qaSBoCWLjHLldQ4dQbjG98JM=; b=D6RmEA12LVy/ekj8BI+n30etJR4AsRd526cQ4ohkSl+t0MQd7xTLfte9X+lo6b6ITKJQSq9bmL0/JrQbhkNtPLo6qs6zLC2u+jFlgYLik+1xHytS/nJwZKAy2t1aQBQBoJe/dESBosQywqiwEYY5WxomtTibD8ciC8UuCr3CFHM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771512109; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=kEm1nq/NUwA6BJvciL7qaSBoCWLjHLldQ4dQbjG98JM=; b=Pxfyp7ab3aTY+emXhJgAC8CO/NzZvEZR/n7vYXGhi3Qk3u2S0TYEXAM/TeQQPSKK w9Ke/LsyWWpa52td4Svey23ilpsZbz5f4OjlSa2ee3Pd16arCb90l20EltIBdLYprD+ gAez8u92bh2uuVRFX7y0xGdbg+O0/AMFX80X/ynQ= From: "Daniel P. Smith" To: xen-devel@lists.xenproject.org Cc: "Daniel P. Smith" , Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [BUG v3] common/domctl: xsm update for get_domain_state access Date: Thu, 19 Feb 2026 09:37:07 -0500 Message-Id: <20260219143707.1588-1-dpsmith@apertussolutions.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External When using XSM Flask, passing DOMID_INVALID will result in a NULL pointer reference from the passing of NULL as the target domain to xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the target domain is NULL opens the opportunity to circumvent the XSM get_domain_state access check. This is due to the fact that the call to xsm_domctl() for get_domain_state op is a no-op check, deferring to xsm_get_domain_state(). Modify the helper get_domain_state() to ensure the requesting domain has get_domain_state access for the target domain, whether the target domain is explicitly set or implicitly determined with a domain state search. In the case of access not being allowed for a domain found during an implicit search, the search will continue to the next domain whose state has changed. Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") Reported-by: Chris Rogers Reported-by: Dmytro Firsov Signed-off-by: Daniel P. Smith --- Changes in v3: - collapse if statements - dropped unnecessary NULL - use true for copyback Changes in v2: - fix commit message - init dom as -1 - rework loop logic to use test_and_clear_bit() --- xen/common/domain.c | 37 ++++++++++++++++++++++--------------- xen/common/domctl.c | 7 ++----- 2 files changed, 24 insertions(+), 20 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index de6fdf59236e..73d6c72d9709 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -210,7 +210,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, domid_t *domid) { - unsigned int dom; + unsigned int dom = -1; int rc = -ENOENT; struct domain *hdl; @@ -219,6 +219,10 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, if ( d ) { + rc = xsm_get_domain_state(XSM_XS_PRIV, d); + if ( rc ) + return rc; + set_domain_state_info(info, d); return 0; @@ -238,28 +242,31 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, while ( dom_state_changed ) { - dom = find_first_bit(dom_state_changed, DOMID_MASK + 1); + dom = find_next_bit(dom_state_changed, DOMID_MASK + 1, dom + 1); if ( dom >= DOMID_FIRST_RESERVED ) break; - if ( test_and_clear_bit(dom, dom_state_changed) ) - { - *domid = dom; - - d = rcu_lock_domain_by_id(dom); + d = rcu_lock_domain_by_id(dom); + if ( (d && xsm_get_domain_state(XSM_XS_PRIV, d)) || + !test_and_clear_bit(dom, dom_state_changed) ) + { if ( d ) - { - set_domain_state_info(info, d); - rcu_unlock_domain(d); - } - else - memset(info, 0, sizeof(*info)); + continue; + } - rc = 0; + *domid = dom; - break; + if ( d ) + { + set_domain_state_info(info, d); + rcu_unlock_domain(d); } + else + memset(info, 0, sizeof(*info)); + + rc = 0; + break; } out: diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 29a7726d32d0..93738931c575 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -860,12 +860,9 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) break; case XEN_DOMCTL_get_domain_state: - ret = xsm_get_domain_state(XSM_XS_PRIV, d); - if ( ret ) - break; - - copyback = 1; ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); + if ( !ret ) + copyback = true; break; default: -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 14:49:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 14:49:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236429.1539142 (Exim 4.92) (envelope-from ) id 1vt5LS-0006xq-3M; Thu, 19 Feb 2026 14:49:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236429.1539142; Thu, 19 Feb 2026 14:49:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt5LS-0006xj-0M; Thu, 19 Feb 2026 14:49:34 +0000 Received: by outflank-mailman (input) for mailman id 1236429; Thu, 19 Feb 2026 14:49:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt5LQ-0006vg-WB for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 14:49:33 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3311f969-0da2-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 15:49:31 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-65b94e0a875so1462643a12.0 for ; Thu, 19 Feb 2026 06:49:32 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5b:2f01:4042:c03:ce4d:a5a1? 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Smith" , xen-devel@lists.xenproject.org References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> <539aceb3-8e94-4476-a538-77c1eb47e188@suse.com> <88098c92-b905-49bf-be78-ccc794b1d5e0@amd.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <88098c92-b905-49bf-be78-ccc794b1d5e0@amd.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------wK0FRF8waLqxf8xu0gQ0gcfZ" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------wK0FRF8waLqxf8xu0gQ0gcfZ Content-Type: multipart/mixed; boundary="------------vMzHeRKnqIsoas9yupWsUKj6"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jason Andryuk , Jan Beulich Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , xen-devel@lists.xenproject.org Message-ID: Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> <7a334660-95db-4f6e-beb5-9115372567bb@suse.com> <539aceb3-8e94-4476-a538-77c1eb47e188@suse.com> <88098c92-b905-49bf-be78-ccc794b1d5e0@amd.com> In-Reply-To: <88098c92-b905-49bf-be78-ccc794b1d5e0@amd.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP 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Thu, 19 Feb 2026 07:10:26 -0800 (PST) Message-ID: Date: Thu, 19 Feb 2026 16:10:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/hvm: Advertise and support extended destination IDs for MSI/IO-APIC To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org References: <20260209113412.2603088-1-julian.vetter@vates.tech> <87be26c1-52fe-438f-8aad-1d5ea0f0a325@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 19.02.2026 14:52, Julian Vetter wrote: > > > On 2/19/26 14:28, Jan Beulich wrote: >> On 19.02.2026 14:08, Julian Vetter wrote: >>> On 2/9/26 14:40, Teddy Astie wrote: >>>> Le 09/02/2026 à 12:36, Julian Vetter a écrit : >>>>> --- a/xen/arch/x86/hvm/vioapic.c >>>>> +++ b/xen/arch/x86/hvm/vioapic.c >>>>> @@ -411,7 +411,7 @@ static void ioapic_inj_irq( >>>>> >>>>> static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) >>>>> { >>>>> - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; >>>>> + uint32_t dest = VIOAPIC_RTE_DEST(vioapic->redirtbl[pin].bits); >>>> >>>> I would rather introduce a new field in vioapic_redir_entry for the >>>> extended dest part; and compute dest from that and dest_id. >>> >>> Here I have a question. This struct is a public ABI struct. >>> vioapic_redir_entry is defined in >>> xen/include/public/arch-x86/hvm/save.h. It's part of XENs VM >>> save/restore operation. It is used by libxc and toolstacks to migrate >>> VMs between hosts. Changing the struct might be undesirable? Yes, it >>> would make the code cleaner. having a bit entry for the extended dest >>> bits. What's the general opinion on this? With the VIOAPIC_RTE_DEST >>> macro I avoided touching this struct... >> >> Which in turn raises the question: How do you migrate those bits? It looks >> like you're losing them. > > The bits are preserved correctly. The migration saves/restores the full > uint64_t bit union member, not the individual bit fields. Which is, aiui, only because for the IO-APIC we haven't introduced "check" hooks, yet. Which, yes, ... > But, the issue > is maybe in the other direction? If we migrate a VM from a new XEN > (where the guest has programmed extended dest IDs into RTEs) to an old > XEN that doesn't understand them. The raw bits would be restored > correctly into bits, but the old XENs vioapic_deliver only reads > fields.dest_id (8 bits) and would silently ignore the extended bits. The > guest would end up with broken interrupt routing to vCPUs with APIC ID > > 255. ... goes along of what you're saying here. > But there is not much we can do?! The bits need explicitly migrating (which may well be as part of the RTE, as you describe), with checking as mentioned above in place. That checking would refuse the migration prior to your patch (or when the feature is disabled for the guest), and allow it through afterwards (when the feature is enabled for the guest). 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Smith" Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260219143707.1588-1-dpsmith@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260219143707.1588-1-dpsmith@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 15:37, Daniel P. Smith wrote: > When using XSM Flask, passing DOMID_INVALID will result in a NULL pointer > reference from the passing of NULL as the target domain to > xsm_get_domain_state(). Simply not invoking xsm_get_domain_state() when the > target domain is NULL opens the opportunity to circumvent the XSM > get_domain_state access check. This is due to the fact that the call to > xsm_domctl() for get_domain_state op is a no-op check, deferring to > xsm_get_domain_state(). > > Modify the helper get_domain_state() to ensure the requesting domain has > get_domain_state access for the target domain, whether the target domain is > explicitly set or implicitly determined with a domain state search. In the case > of access not being allowed for a domain found during an implicit search, the > search will continue to the next domain whose state has changed. > > Fixes: 3ad3df1bd0aa ("xen: add new domctl get_domain_state") > Reported-by: Chris Rogers > Reported-by: Dmytro Firsov > Signed-off-by: Daniel P. Smith Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Feb 19 15:42:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 15:42:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236488.1539173 (Exim 4.92) (envelope-from ) id 1vt6AT-0006xj-AM; Thu, 19 Feb 2026 15:42:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236488.1539173; Thu, 19 Feb 2026 15:42:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6AT-0006xb-6f; Thu, 19 Feb 2026 15:42:17 +0000 Received: by outflank-mailman (input) for mailman id 1236488; Thu, 19 Feb 2026 15:42:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6AS-0006xV-8Q for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 15:42:16 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8ffecd98-0da9-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 16:42:14 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso12629405e9.0 for ; Thu, 19 Feb 2026 07:42:14 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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(We actually leverage the same facts in find_next{,_zero}_bit() as well.) This way in __scanbit() the TZCNT alternative can be engaged. Signed-off-by: Jan Beulich --- Register allocation (and hence effects on code size of the change here) is pretty "interesting". The compiler doesn't look to realize that while for 64-bit insns it doesn't matter which GPR is used (a REX prefix is needed anyway), 32-bit insns can be helped by preferring the low 8 GPRs. (Granted the inline assembly in __scanbit() may also be a little difficult to deal with.) --- a/xen/arch/x86/bitops.c +++ b/xen/arch/x86/bitops.c @@ -35,8 +35,8 @@ unsigned int __find_next_bit( if ( bit != 0 ) { /* Look for a bit in the first word. */ - set = __scanbit(*p >> bit, BITS_PER_LONG - bit); - if ( set < (BITS_PER_LONG - bit) ) + set = __scanbit(*p >> bit, BITS_PER_LONG); + if ( set < BITS_PER_LONG ) return (offset + set); offset += BITS_PER_LONG - bit; p++; @@ -85,8 +85,8 @@ unsigned int __find_next_zero_bit( if ( bit != 0 ) { /* Look for zero in the first word. */ - set = __scanbit(~(*p >> bit), BITS_PER_LONG - bit); - if ( set < (BITS_PER_LONG - bit) ) + set = __scanbit(~*p >> bit, BITS_PER_LONG); + if ( set < BITS_PER_LONG ) return (offset + set); offset += BITS_PER_LONG - bit; p++; From xen-devel-bounces@lists.xenproject.org Thu Feb 19 15:43:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 15:43:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236495.1539184 (Exim 4.92) (envelope-from ) id 1vt6BH-0007PK-JI; Thu, 19 Feb 2026 15:43:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236495.1539184; Thu, 19 Feb 2026 15:43:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6BH-0007PD-Fb; Thu, 19 Feb 2026 15:43:07 +0000 Received: by outflank-mailman (input) for mailman id 1236495; Thu, 19 Feb 2026 15:43:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6BG-0006xV-T3 for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 15:43:06 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id aed94d37-0da9-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 16:43:06 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4377174e1ebso825546f8f.3 for ; Thu, 19 Feb 2026 07:43:06 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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No change in generated code. Signed-off-by: Jan Beulich --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -343,7 +343,7 @@ static always_inline unsigned int __scan if ( o__ >= s__ ) \ r__ = s__; \ else if ( __builtin_constant_p(size) && s__ <= BITS_PER_LONG ) \ - r__ = o__ + __scanbit(*(const unsigned long *)(a__) >> o__, s__); \ + r__ = o__ + __scanbit(*a__ >> o__, s__); \ else if ( __builtin_constant_p(off) && !o__ ) \ r__ = __find_first_bit(a__, s__); \ else \ @@ -375,7 +375,7 @@ static always_inline unsigned int __scan if ( o__ >= s__ ) \ r__ = s__; \ else if ( __builtin_constant_p(size) && s__ <= BITS_PER_LONG ) \ - r__ = o__ + __scanbit(~*(const unsigned long *)(a__) >> o__, s__); \ + r__ = o__ + __scanbit(~*a__ >> o__, s__); \ else if ( __builtin_constant_p(off) && !o__ ) \ r__ = __find_first_zero_bit(a__, s__); \ else \ From xen-devel-bounces@lists.xenproject.org Thu Feb 19 15:49:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 15:49:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236504.1539194 (Exim 4.92) (envelope-from ) id 1vt6H2-0008AU-6P; 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Acked-by: Andrew Cooper > > --- a/xen/arch/x86/include/asm/bitops.h > +++ b/xen/arch/x86/include/asm/bitops.h > @@ -343,7 +343,7 @@ static always_inline unsigned int __scan > if ( o__ >= s__ ) \ > r__ = s__; \ > else if ( __builtin_constant_p(size) && s__ <= BITS_PER_LONG ) \ > - r__ = o__ + __scanbit(*(const unsigned long *)(a__) >> o__, s__); \ > + r__ = o__ + __scanbit(*a__ >> o__, s__); \ > else if ( __builtin_constant_p(off) && !o__ ) \ > r__ = __find_first_bit(a__, s__); \ > else \ > @@ -375,7 +375,7 @@ static always_inline unsigned int __scan > if ( o__ >= s__ ) \ > r__ = s__; \ > else if ( __builtin_constant_p(size) && s__ <= BITS_PER_LONG ) \ > - r__ = o__ + __scanbit(~*(const unsigned long *)(a__) >> o__, s__); \ > + r__ = o__ + __scanbit(~*a__ >> o__, s__); \ > else if ( __builtin_constant_p(off) && !o__ ) \ > r__ = __find_first_zero_bit(a__, s__); \ > else \ From xen-devel-bounces@lists.xenproject.org Thu Feb 19 15:50:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 15:50:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236511.1539202 (Exim 4.92) (envelope-from ) id 1vt6IH-0001D5-DB; Thu, 19 Feb 2026 15:50:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236511.1539202; Thu, 19 Feb 2026 15:50:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6IH-0001Cy-AH; Thu, 19 Feb 2026 15:50:21 +0000 Received: by outflank-mailman (input) for mailman id 1236511; Thu, 19 Feb 2026 15:50:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6IG-0001Ch-Fk for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 15:50:20 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b0b0d687-0daa-11f1-9ccf-f158ae23cfc8; Thu, 19 Feb 2026 16:50:18 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4837584120eso8255895e9.1 for ; Thu, 19 Feb 2026 07:50:18 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 19 Feb 2026 07:50:18 -0800 (PST) Message-ID: <924f3ef2-7883-4322-a921-edc814c96719@suse.com> Date: Thu, 19 Feb 2026 16:50:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Connor Davis , Oleksii Kurochko , Bertrand Marquis , Volodymyr Babchuk From: Jan Beulich Subject: [PATCH] ioremap() et al Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit I found an old todo item, carrying out of which then made me notice another anomaly. 1: make ioremap_attr() common 2: make ioremap_wc() x86 only (for the time being) Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 19 15:52:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 15:52:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236522.1539214 (Exim 4.92) (envelope-from ) id 1vt6Jy-0001n5-SO; Thu, 19 Feb 2026 15:52:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236522.1539214; Thu, 19 Feb 2026 15:52:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6Jy-0001my-Op; Thu, 19 Feb 2026 15:52:06 +0000 Received: by outflank-mailman (input) for mailman id 1236522; Thu, 19 Feb 2026 15:52:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6Jx-0001ms-92 for xen-devel@lists.xenproject.org; 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Thu, 19 Feb 2026 07:51:57 -0800 (PST) Message-ID: <81e4f7e0-df57-4a5b-b16d-fe668682d94c@suse.com> Date: Thu, 19 Feb 2026 16:51:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] make ioremap_attr() common From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Connor Davis , Oleksii Kurochko , Bertrand Marquis , Volodymyr Babchuk , Timothy Pearson References: <924f3ef2-7883-4322-a921-edc814c96719@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <924f3ef2-7883-4322-a921-edc814c96719@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit This core backing function is uniform; what varies across architectures are the attributes passed and hence the wrappers around it. Yet of course extra checking or special handling may be needed per arch, so introduce a suitable hook. Permit such a hook to return both adjusted and un-adjusted (for the page offset) pointers. Signed-off-by: Jan Beulich --- Declarations (or inline counterparts) aren't being moved around, to avoid the need to touch source files using the functions. Quite possibly they want to consistently go into xen/io.h and asm/io.h. Of course ioremap.c could also go into lib/. For RISC-V the wrappers likely should become inline functions? PPC doesn't reference any of the functions just yet, so gets only a declaration. For Arm, a TODO item is deliberately retained, yet seeing the use of ioremap_wc() in domain building (which by itself is questionable, see next patch) I wonder if that's even feasible as long as we don't have memremap() or alike. --- a/xen/arch/arm/include/asm/io.h +++ b/xen/arch/arm/include/asm/io.h @@ -1,6 +1,8 @@ #ifndef _ASM_IO_H #define _ASM_IO_H +#include + #if defined(CONFIG_ARM_32) # include #elif defined(CONFIG_ARM_64) @@ -9,6 +11,16 @@ # error "unknown ARM variant" #endif +#ifdef CONFIG_MPU +void __iomem *mpu_ioremap_attr(paddr_t start, size_t len, pte_attr_t flags); +#define arch_ioremap_attr mpu_ioremap_attr +#else +/* + * ioremap_attr() should only be used to remap device address ranges. + * TODO: Add an arch hook to verify this assumption. + */ +#endif + #endif /* * Local variables: --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -5,6 +5,7 @@ #include #include #include +#include #if defined(CONFIG_ARM_32) # include @@ -200,13 +201,12 @@ extern int prepare_secondary_mm(int cpu) extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); /* Helper function to setup memory management */ void setup_mm_helper(void); -/* map a physical range in virtual memory */ -void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes); static inline void __iomem *ioremap_nocache(paddr_t start, size_t len) { return ioremap_attr(start, len, PAGE_HYPERVISOR_NOCACHE); } +#define ioremap ioremap_nocache static inline void __iomem *ioremap_cache(paddr_t start, size_t len) { --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -455,11 +455,6 @@ unsigned long get_upper_mfn_bound(void) return max_page - 1; } -void *ioremap(paddr_t pa, size_t len) -{ - return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE); -} - /* * Local variables: * mode: C --- a/xen/arch/arm/mmu/pt.c +++ b/xen/arch/arm/mmu/pt.c @@ -206,23 +206,6 @@ void clear_fixmap(unsigned int map) BUG_ON(res != 0); } -/* - * This function should only be used to remap device address ranges - * TODO: add a check to verify this assumption - */ -void *ioremap_attr(paddr_t start, size_t len, unsigned int attributes) -{ - mfn_t mfn = _mfn(PFN_DOWN(start)); - unsigned int offs = start & (PAGE_SIZE - 1); - unsigned int nr = PFN_UP(offs + len); - void *ptr = __vmap(&mfn, nr, 1, 1, attributes, VMAP_DEFAULT); - - if ( ptr == NULL ) - return NULL; - - return ptr + offs; -} - static int create_xen_table(lpae_t *entry) { mfn_t mfn; --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -9,6 +9,8 @@ #include #include #include + +#include #include #include #include @@ -593,7 +595,7 @@ void free_init_memory(void) spin_unlock(&xen_mpumap_lock); } -void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags) +void __iomem *mpu_ioremap_attr(paddr_t start, size_t len, pte_attr_t flags) { paddr_t start_pg = round_pgdown(start); paddr_t end_pg = round_pgup(start_pg + len); --- a/xen/arch/ppc/include/asm/io.h +++ b/xen/arch/ppc/include/asm/io.h @@ -13,4 +13,6 @@ #define writew(v,c) ({ (void)(v); (void)(c); BUG_ON("unimplemented"); }) #define writel(v,c) ({ (void)(v); (void)(c); BUG_ON("unimplemented"); }) +void __iomem *ioremap(paddr_t pa, size_t len); + #endif /* __ASM_PPC_IO_H__ */ --- a/xen/arch/riscv/include/asm/io.h +++ b/xen/arch/riscv/include/asm/io.h @@ -41,6 +41,7 @@ #include #include +void __iomem *ioremap(paddr_t pa, size_t len); void __iomem *ioremap_cache(paddr_t pa, size_t len); void __iomem *ioremap_wc(paddr_t pa, size_t len); --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -587,20 +587,6 @@ void *__init arch_vmap_virt_end(void) return (void *)(VMAP_VIRT_START + VMAP_VIRT_SIZE); } -static void __iomem *ioremap_attr(paddr_t pa, size_t len, - pte_attr_t attributes) -{ - mfn_t mfn = _mfn(PFN_DOWN(pa)); - unsigned int offs = pa & (PAGE_SIZE - 1); - unsigned int nr = PFN_UP(offs + len); - void *ptr = __vmap(&mfn, nr, 1, 1, attributes, VMAP_DEFAULT); - - if ( ptr == NULL ) - return NULL; - - return ptr + offs; -} - void __iomem *ioremap_cache(paddr_t pa, size_t len) { return ioremap_attr(pa, len, PAGE_HYPERVISOR); --- a/xen/arch/x86/include/asm/io.h +++ b/xen/arch/x86/include/asm/io.h @@ -47,6 +47,9 @@ __OUT(b,"b",char) __OUT(w,"w",short) __OUT(l,,int) +void __iomem *x86_ioremap_attr(paddr_t pa, size_t len, pte_attr_t attr); +#define arch_ioremap_attr x86_ioremap_attr + /* * Boolean indicator and function used to handle platform specific I/O port * emulation. --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -611,7 +611,15 @@ void destroy_perdomain_mapping(struct do unsigned int nr); void free_perdomain_mappings(struct domain *d); -void __iomem *ioremap_wc(paddr_t pa, size_t len); +static inline void __iomem *ioremap(paddr_t pa, size_t len) +{ + return ioremap_attr(pa, len, PAGE_HYPERVISOR_UCMINUS); +} + +static inline void __iomem *ioremap_wc(paddr_t pa, size_t len) +{ + return ioremap_attr(pa, len, PAGE_HYPERVISOR_WC); +} extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -6166,41 +6166,15 @@ void *__init arch_vmap_virt_end(void) return fix_to_virt(__end_of_fixed_addresses); } -void __iomem *ioremap(paddr_t pa, size_t len) +void __iomem *x86_ioremap_attr(paddr_t pa, size_t len, pte_attr_t attr) { - mfn_t mfn = _mfn(PFN_DOWN(pa)); - void *va; - - WARN_ON(page_is_ram_type(mfn_x(mfn), RAM_TYPE_CONVENTIONAL)); + WARN_ON(page_is_ram_type(PFN_DOWN(pa), RAM_TYPE_CONVENTIONAL)); /* The low first Mb is always mapped. */ - if ( !((pa + len - 1) >> 20) ) - va = __va(pa); - else - { - unsigned int offs = pa & (PAGE_SIZE - 1); - unsigned int nr = PFN_UP(offs + len); - - va = __vmap(&mfn, nr, 1, 1, PAGE_HYPERVISOR_UCMINUS, VMAP_DEFAULT); - if ( va ) - va += offs; - } - - return (void __force __iomem *)va; -} - -void __iomem *__init ioremap_wc(paddr_t pa, size_t len) -{ - mfn_t mfn = _mfn(PFN_DOWN(pa)); - unsigned int offs = pa & (PAGE_SIZE - 1); - unsigned int nr = PFN_UP(offs + len); - void *va; - - WARN_ON(page_is_ram_type(mfn_x(mfn), RAM_TYPE_CONVENTIONAL)); - - va = __vmap(&mfn, nr, 1, 1, PAGE_HYPERVISOR_WC, VMAP_DEFAULT); + if ( !((pa + len - 1) >> 20) && attr == PAGE_HYPERVISOR_UCMINUS ) + return (void __force __iomem *)__va(pa); - return (void __force __iomem *)(va ? va + offs : NULL); + return NULL; } int create_perdomain_mapping(struct domain *d, unsigned long va, --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_GRANT_TABLE) += grant_table obj-y += guestcopy.o obj-y += gzip/ obj-$(CONFIG_HYPFS) += hypfs.o +obj-y += ioremap.o obj-$(CONFIG_IOREQ_SERVER) += ioreq.o obj-y += irq.o obj-y += kernel.o --- /dev/null +++ b/xen/common/ioremap.c @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include + +void __iomem *ioremap_attr(paddr_t pa, size_t len, pte_attr_t attr) +{ + void __iomem *ptr = NULL; + unsigned int offs = PAGE_OFFSET(pa); + +#ifdef arch_ioremap_attr + ptr = arch_ioremap_attr(pa, len, attr); + if ( PAGE_OFFSET(ptr) ) + return ptr; +#endif + + if ( IS_ENABLED(CONFIG_HAS_VMAP) && !ptr ) + { + mfn_t mfn = _mfn(PFN_DOWN(pa)); + + ptr = (void __force __iomem *)__vmap(&mfn, PFN_UP(offs + len), 1, 1, + attr, VMAP_DEFAULT); + } + + if ( !ptr ) + return NULL; + + return ptr + offs; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/include/xen/vmap.h +++ b/xen/include/xen/vmap.h @@ -121,9 +121,10 @@ void vfree(void *va); * * @param pa Physical base address of the MMIO region. * @param len Length of the MMIO region in octets. + * @param attr Attributes for the mapping. * @return Pointer to the mapped area on success; NULL otherwise. */ -void __iomem *ioremap(paddr_t pa, size_t len); +void __iomem *ioremap_attr(paddr_t pa, size_t len, pte_attr_t attr); /* Return the number of pages in the mapping starting at address 'va' */ unsigned int vmap_size(const void *va); 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Thu, 19 Feb 2026 07:53:48 -0800 (PST) Message-ID: <20adacfa-06ce-4508-916d-f15d8f17788f@suse.com> Date: Thu, 19 Feb 2026 16:53:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/2] make ioremap_wc() x86 only (for the time being) From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Alistair Francis , Connor Davis , Oleksii Kurochko , Bertrand Marquis References: <924f3ef2-7883-4322-a921-edc814c96719@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <924f3ef2-7883-4322-a921-edc814c96719@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Its use in domain building is questionable: Already at the point both uses were introduced, ioremap_cache() existed. I can't see why kernel and initrd would need mapping WC, when at the same time other similar mappings (in common/device-tree/) are done WB. With those uses replaced, neither Arm nor RISC-V have a need for the function anymore. Amends: d8972aa9645f ("xen/arm: kernel: Rework kernel_zimage_load to use the generic copy helper") Amends: bb7e6d565d92 ("xen/arm: domain_build: Rework initrd_load to use the generic copy helper") Signed-off-by: Jan Beulich --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -213,11 +213,6 @@ static inline void __iomem *ioremap_cach return ioremap_attr(start, len, PAGE_HYPERVISOR); } -static inline void __iomem *ioremap_wc(paddr_t start, size_t len) -{ - return ioremap_attr(start, len, PAGE_HYPERVISOR_WC); -} - /* XXX -- account for base */ #define mfn_valid(mfn) ({ \ unsigned long __m_f_n = mfn_x(mfn); \ --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -148,7 +148,7 @@ static void __init kernel_zimage_load(st printk("Loading zImage from %"PRIpaddr" to %"PRIpaddr"-%"PRIpaddr"\n", paddr, load_addr, load_addr + len); - kernel = ioremap_wc(paddr, len); + kernel = ioremap_cache(paddr, len); if ( !kernel ) panic("Unable to map the %pd kernel\n", info->bd.d); --- a/xen/arch/riscv/include/asm/io.h +++ b/xen/arch/riscv/include/asm/io.h @@ -43,7 +43,6 @@ void __iomem *ioremap(paddr_t pa, size_t len); void __iomem *ioremap_cache(paddr_t pa, size_t len); -void __iomem *ioremap_wc(paddr_t pa, size_t len); /* Generic IO read/write. These perform native-endian accesses. */ static inline void __raw_writeb(uint8_t val, volatile void __iomem *addr) --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -592,11 +592,6 @@ void __iomem *ioremap_cache(paddr_t pa, return ioremap_attr(pa, len, PAGE_HYPERVISOR); } -void __iomem *ioremap_wc(paddr_t pa, size_t len) -{ - return ioremap_attr(pa, len, PAGE_HYPERVISOR_WC); -} - void __iomem *ioremap(paddr_t pa, size_t len) { return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE); --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -395,7 +395,7 @@ void __init initrd_load(struct kernel_in if ( res ) panic("Cannot fix up \"linux,initrd-end\" property\n"); - initrd = ioremap_wc(paddr, len); + initrd = ioremap_cache(paddr, len); if ( !initrd ) panic("Unable to map the %pd initrd\n", kinfo->bd.d); From xen-devel-bounces@lists.xenproject.org Thu Feb 19 16:01:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 16:01:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236544.1539233 (Exim 4.92) (envelope-from ) id 1vt6Sf-0004bd-PL; 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Thu, 19 Feb 2026 08:01:00 -0800 (PST) MIME-Version: 1.0 References: <2bbe54851092309a0c23d68e60dfe93e4f77ef3a.1770046465.git.mykyta_poturai@epam.com> In-Reply-To: <2bbe54851092309a0c23d68e60dfe93e4f77ef3a.1770046465.git.mykyta_poturai@epam.com> From: Mykola Kvach Date: Thu, 19 Feb 2026 18:00:00 +0200 X-Gm-Features: AaiRm52L_JeDfZi0DDt7SBqE2rlixsJKGvPZFar3GwL2eg-hKMSl9Xof_uhr8cw Message-ID: Subject: Re: [RFC PATCH 18/19] arm/gic: Add VPE proxy support To: Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 2, 2026 at 6:14=E2=80=AFPM Mykyta Poturai wrote: > > Signed-off-by: Mykyta Poturai > --- > xen/arch/arm/gic-v3-its.c | 13 ++ > xen/arch/arm/gic-v3.c | 1 + > xen/arch/arm/gic-v4-its.c | 207 ++++++++++++++++++++++++- > xen/arch/arm/include/asm/gic_v3_defs.h | 7 + > xen/arch/arm/include/asm/gic_v3_its.h | 7 + > xen/arch/arm/include/asm/gic_v4_its.h | 5 + > xen/arch/arm/include/asm/vgic.h | 2 + > 7 files changed, 235 insertions(+), 7 deletions(-) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index fa5c1eb6d1..5979a82526 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -333,6 +333,19 @@ int its_send_cmd_discard(struct host_its *its, struc= t its_device *dev, > return its_send_command(its, cmd); > } > > +int its_send_cmd_movi(struct host_its *its, uint32_t deviceid, uint32_t = eventid, > + uint16_t icid) > +{ > + uint64_t cmd[4]; > + > + cmd[0] =3D GITS_CMD_MOVI | ((uint64_t)deviceid << 32); > + cmd[1] =3D eventid; > + cmd[2] =3D icid; > + cmd[3] =3D 0x00; > + > + return its_send_command(its, cmd); > +} > + > /* Set up the (1:1) collection mapping for the given host CPU. */ > int gicv3_its_setup_collection(unsigned int cpu) > { > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 1cb3169b72..fb80038f17 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -2096,6 +2096,7 @@ static void __init gicv4_init(void) > > gicv4_its_vpeid_allocator_init(); > > + gicv4_init_vpe_proxy(); This call ignores errors from gicv4_init_vpe_proxy(). If it returns an erro= r code, please handle it (propagate up, or at least log and bail out) to avoi= d continuing with a partially initialized proxy. > } > #else > static void __init gicv4_init(void) > diff --git a/xen/arch/arm/gic-v4-its.c b/xen/arch/arm/gic-v4-its.c > index 0462976b93..83ee0510ac 100644 > --- a/xen/arch/arm/gic-v4-its.c > +++ b/xen/arch/arm/gic-v4-its.c > @@ -39,6 +39,13 @@ static spinlock_t vpeid_alloc_lock =3D SPIN_LOCK_UNLOC= KED; > static uint16_t vmovp_seq_num; > static spinlock_t vmovp_lock =3D SPIN_LOCK_UNLOCKED; > > +static struct { > + spinlock_t lock; > + struct its_device *dev; > + struct its_vpe **vpes; > + int next_victim; > +} vpe_proxy; > + > void __init gicv4_its_vpeid_allocator_init(void) > { > /* Allocate space for vpeid_mask based on MAX_VPEID */ > @@ -201,6 +208,124 @@ static int its_map_vpe(struct host_its *its, struct= its_vpe *vpe) > > return 0; > } > +static int gicv4_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) > +{ > + int ret; > + > + /* Already unmapped? */ > + if ( vpe->vpe_proxy_event =3D=3D -1 ) > + return 0; > + > + ret =3D its_send_cmd_discard(vpe_proxy.dev->hw_its, vpe_proxy.dev, > + vpe->vpe_proxy_event); > + if ( ret ) > + return ret; > + vpe_proxy.vpes[vpe->vpe_proxy_event] =3D NULL; > + > + /* > + * We don't track empty slots at all, so let's move the > + * next_victim pointer to quickly reuse the unmapped slot > + */ > + if ( vpe_proxy.vpes[vpe_proxy.next_victim] ) > + vpe_proxy.next_victim =3D vpe->vpe_proxy_event; > + > + vpe->vpe_proxy_event =3D -1; > + > + return 0; > +} > + > +static void gicv4_vpe_db_proxy_unmap(struct its_vpe *vpe) > +{ > + if ( !gic_support_directLPI() ) > + { > + unsigned long flags; > + > + spin_lock_irqsave(&vpe_proxy.lock, flags); > + gicv4_vpe_db_proxy_unmap_locked(vpe); Both return values are ignored. If map_locked() fails and leaves vpe_proxy_event at the sentinel value, INV may use an invalid eventid. At minimum: check map_locked() and INV return codes and avoid issuing INV on failure. > + spin_unlock_irqrestore(&vpe_proxy.lock, flags); > + } > +} > + > +/* > + * If a GICv4.0 doesn't implement Direct LPIs (which is extremely > + * likely), the only way to perform an invalidate is to use a fake > + * device to issue an INV command, implying that the LPI has first > + * been mapped to some event on that device. Since this is not exactly > + * cheap, we try to keep that mapping around as long as possible, and > + * only issue an UNMAP if we're short on available slots. > + * > + * GICv4.1 mandates that we're able to invalidate by writing to a > + * MMIO register. And most of the time, we don't even have to invalidate > + * vPE doorbell, as the redistributor can be told whether to generate a > + * doorbell or not. > + */ > +static int gicv4_vpe_db_proxy_map_locked(struct its_vpe *vpe) > +{ > + int ret; > + > + /* Already mapped? */ > + if ( vpe->vpe_proxy_event !=3D -1 ) > + return 0; > + > + /* This slot was already allocated. Kick the other VPE out. */ > + if ( vpe_proxy.vpes[vpe_proxy.next_victim] ) > + { > + struct its_vpe *old_vpe =3D vpe_proxy.vpes[vpe_proxy.next_victim= ]; > + > + ret =3D gicv4_vpe_db_proxy_unmap_locked(old_vpe); > + if ( ret ) > + return ret; > + } > + > + /* Map the new VPE instead */ > + vpe_proxy.vpes[vpe_proxy.next_victim] =3D vpe; > + vpe->vpe_proxy_event =3D vpe_proxy.next_victim; > + vpe_proxy.next_victim =3D (vpe_proxy.next_victim + 1) % > + vpe_proxy.dev->eventids; > + > + return its_send_cmd_mapti(vpe_proxy.dev->hw_its, vpe_proxy.dev->host= _devid, The software state is committed before MAPTI completes. If MAPTI fails, the vpe stays "mapped" in SW (and next_victim advances), but HW doesn't have the translation. I think this needs rollback on failure (or update state only after MAPTI succeeds). > + vpe->vpe_proxy_event, vpe->vpe_db_lpi, > + vpe->col_idx); > +} > + > +int __init gicv4_init_vpe_proxy(void) > +{ > + struct host_its *hw_its; > + uint32_t devid; > + > + if ( gic_support_directLPI() ) > + { > + printk("ITS: Using DirectLPI for GICv4 VPE invalidation\n"); > + return 0; > + } > + > + /* Any ITS will do, even if not v4 */ > + hw_its =3D list_first_entry(&host_its_list, struct host_its, entry); host_its_list may be empty here. list_first_entry() is unsafe in that case please use list_first_entry_or_null() (or check list_empty()) and handle the NULL/empty case > + > + vpe_proxy.vpes =3D xzalloc_array(struct its_vpe *, nr_cpu_ids); > + if ( !vpe_proxy.vpes ) > + { > + printk(XENLOG_ERR "ITS: Can't allocate GICv4 VPE proxy device ar= ray\n"); > + return -ENOMEM; > + } > + > + /* Use the last possible DevID */ > + devid =3D BIT(hw_its->devid_bits, UL) - 1; This "pick the last DevID" policy looks fragile: it can collide with other Xen ITS users if they ever end up allocating across the full DevID space. > + vpe_proxy.dev =3D its_create_device(hw_its, devid, nr_cpu_ids); > + if ( !vpe_proxy.dev ) > + { > + printk(XENLOG_ERR "ITS: Can't allocate GICv4 VPE proxy device\n"= ); vpe_proxy.vpes is leaked when vpe_proxy.dev allocation fails > + return -ENOMEM; > + } > + > + spin_lock_init(&vpe_proxy.lock); > + vpe_proxy.next_victim =3D 0; > + printk(XENLOG_INFO > + "ITS: Allocated DevID %u as GICv4 VPE proxy device\n", devid)= ; > + > + return 0; > +} > + > static int __init its_vpe_init(struct its_vpe *vpe) > { > int vpe_id, rc =3D -ENOMEM; > @@ -224,6 +349,7 @@ static int __init its_vpe_init(struct its_vpe *vpe) > rwlock_init(&vpe->lock); > vpe->vpe_id =3D vpe_id; > vpe->vpendtable =3D page_to_virt(vpendtable); > + vpe->vpe_proxy_event =3D -1; > /* > * We eagerly inform all the v4 ITS and map vPE to the first > * possible CPU > @@ -299,16 +425,45 @@ static int its_send_cmd_vmovp(struct its_vpe *vpe) > return 0; > } > > +/* GICR_SYNCR.Busy =3D=3D 1 until the invalidation completes. */ > +static void wait_for_syncr(void __iomem *rdbase) > +{ > + while ( readl_relaxed(rdbase + GICR_SYNCR) & 1 ) > + cpu_relax(); This is an unbounded busy-wait. If SYNCR.Busy gets stuck (or RDbase is wrong), Xen can hang. It likely needs a timeout + error path (similar to other GIC polling loops). > +} > + > +void direct_lpi_inv(struct its_device *dev, uint32_t eventid, nit: dev and eventid is unused > + uint32_t db_lpi, unsigned int cpu) > +{ > + void __iomem *rdbase; > + uint64_t val; > + /* Register-based LPI invalidation for DB on GICv4.0 */ > + val =3D FIELD_PREP(GICR_INVLPIR_INTID, db_lpi); > + > + rdbase =3D per_cpu(rbase, cpu); > + writeq_relaxed(val, rdbase + GICR_INVLPIR); direct_lpi_inv() writes GICR_INVLPIR unconditionally. Note that writing GICR_INVLPIR/GICR_INVALLR while GICR_SYNCR.Busy=3D=3D1 is CONSTRAINED UNPREDICTABLE (the write may be ignored, or the invalidate may be performed). So we need to ensure Busy=3D=3D0 before issuing a new invalidate, not only wait after the write. Please add a pre-check loop (or serialize callers) to guarantee GICR_SYNCR.Busy=3D=3D0 before the INVLPIR write. proxy lock protects only the ITS proxy path; direct INVLPIR must also avoid writes while GICR_SYNCR.Busy=3D=3D1 (pre-check or separate lock) > + wait_for_syncr(rdbase); > +} > > static void its_vpe_send_inv_db(struct its_vpe *vpe) > { > - // struct its_device *dev =3D vpe_proxy.dev; > - // unsigned long flags; > + if ( gic_support_directLPI() ) > + { > + unsigned int cpu =3D vpe->col_idx; We read vpe->col_idx without the vpe lock. Should we use vpe_to_cpuid_lock() (or otherwise hold vpe_lock) to avoid a race with affinity updates? > > - // spin_lock_irqsave(&vpe_proxy.lock, flags); > - // gicv4_vpe_db_proxy_map_locked(vpe); > - // its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_eve= nt); > - // spin_unlock_irqrestore(&vpe_proxy.lock, flags); > + /* Target the redistributor this VPE is currently known on */ > + direct_lpi_inv(NULL, 0, vpe->vpe_db_lpi, cpu); I think we should document the ordering constraint at the point where we select between direct_lpi_inv() and the ITS/proxy invalidation path (its_vpe_send_inv_db()). The architecture requires register-based invalidation (GICR_INVLPIR / GICR_INVALLR + polling GICR_SYNCR.Busy) to be serialized against any ITS command that affects the same interrupt. Overlapping these operations is CONSTRAINED UNPREDICTABLE. > + } > + else > + { > + struct its_device *dev =3D vpe_proxy.dev; > + unsigned long flags; > + > + spin_lock_irqsave(&vpe_proxy.lock, flags); > + gicv4_vpe_db_proxy_map_locked(vpe); > + its_send_cmd_inv(dev->hw_its, dev->host_devid, vpe->vpe_proxy_ev= ent); Both return values are ignored. If map_locked() fails and leaves vpe_proxy_event at the sentinel value, INV may use an invalid eventid. At minimum: check map_locked() and INV return codes and avoid issuing INV on failure. Need to review and handle errors in other places too. > + spin_unlock_irqrestore(&vpe_proxy.lock, flags); > + } > } > > static void its_vpe_inv_db(struct its_vpe *vpe) > @@ -335,6 +490,7 @@ static void __init its_vpe_teardown(struct its_vpe *v= pe) > unsigned int order; > > order =3D get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (u= nsigned long)SZ_64K)); > + gicv4_vpe_db_proxy_unmap(vpe); > its_free_vpeid(vpe->vpe_id); > free_xenheap_pages(vpe->vpendtable, order); > xfree(vpe); > @@ -830,6 +986,43 @@ static void vpe_to_cpuid_unlock(struct its_vpe *vpe,= unsigned long *flags) > spin_unlock_irqrestore(&vpe->vpe_lock, *flags); > } > > +static void gicv4_vpe_db_proxy_move(struct its_vpe *vpe, unsigned int fr= om, > + unsigned int to) > +{ > + unsigned long flags; > + > + if ( gic_support_directLPI() ) > + { > + void __iomem *rdbase; > + > + rdbase =3D per_cpu(rbase, from); > + /* Clear potential pending state on the old redistributor */ > + writeq_relaxed(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); > + wait_for_syncr(rdbase); > + return; > + } > + > + spin_lock_irqsave(&vpe_proxy.lock, flags); > + > + gicv4_vpe_db_proxy_map_locked(vpe); > + > + /* MOVI instructs the appropriate Redistributor to move the pending = state */ > + its_send_cmd_movi(vpe_proxy.dev->hw_its, vpe_proxy.dev->host_devid, > + vpe->vpe_proxy_event, to); handle ret from its_send_cmd_movi > + > + /* > + * ARM spec says that If, after using MOVI to move an interrupt from > + * collection A to collection B, software moves the same interrupt a= gain > + * from collection B to collection C, a SYNC command must be used be= fore > + * the second MOVI for the Redistributor associated with collection = A to > + * ensure correct behavior. > + * So each time we issue VMOVI, we VSYNC the old VPE for good measur= e. > + */ > + WARN_ON(its_send_cmd_sync(vpe_proxy.dev->hw_its, from)); > + > + spin_unlock_irqrestore(&vpe_proxy.lock, flags); > +} > + > static int gicv4_vpe_set_affinity(struct vcpu *vcpu) > { > struct its_vpe *vpe =3D vcpu->arch.vgic.its_vpe; > @@ -859,6 +1052,7 @@ static int gicv4_vpe_set_affinity(struct vcpu *vcpu) > ret =3D its_send_cmd_vmovp(vpe); > if ( ret ) > goto out; > + gicv4_vpe_db_proxy_move(vpe, from, to); > > out: > vpe_to_cpuid_unlock(vpe, &flags); > @@ -940,4 +1134,3 @@ int its_vlpi_prop_update(struct pending_irq *pirq, u= int8_t property, > > return its_vlpi_set_doorbell(map, property & LPI_PROP_ENABLED); > } > - > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/includ= e/asm/gic_v3_defs.h > index 0db75309cf..b4d50516ef 100644 > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > @@ -20,6 +20,13 @@ > > #include > > +#ifndef FIELD_GET > +#define FIELD_GET(_mask, _reg) \ > + ((typeof(_mask))(((_reg) & (_mask)) >> (ffs64(_mask) - 1))) > +#endif > + > +#define FIELD_PREP(_mask, _val) \ > + (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask)) Guard this macro too, it can be redefined > /* > * Additional registers defined in GIC v3. > * Common GICD registers are defined in gic.h > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include= /asm/gic_v3_its.h > index dababe97cd..0e82625840 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -236,6 +236,11 @@ int its_inv_lpi(struct host_its *its, struct its_dev= ice *dev, > uint32_t eventid, unsigned int cpu); > int its_send_cmd_mapti(struct host_its *its, uint32_t deviceid, > uint32_t eventid, uint32_t pintid, uint16_t icid)= ; > +struct its_device *its_create_device(struct host_its *hw_its, > + uint32_t host_devid, uint64_t nr_ev= ents); > +int its_send_cmd_movi(struct host_its *its, uint32_t deviceid, uint32_t = eventid, > + uint16_t icid); > +int its_send_cmd_sync(struct host_its *its, unsigned int cpu); > #ifdef CONFIG_ACPI > unsigned long gicv3_its_make_hwdom_madt(const struct domain *d, > void *base_ptr); > @@ -326,6 +331,8 @@ void its_vpe_mask_db(struct its_vpe *vpe); > int gicv4_its_vlpi_unmap(struct pending_irq *pirq); > int its_vlpi_prop_update(struct pending_irq *pirq, uint8_t property, > bool needs_inv); > +void direct_lpi_inv(struct its_device *dev, uint32_t eventid, > + uint32_t db_lpi, unsigned int cpu); > > /* ITS quirks handling. */ > uint64_t gicv3_its_get_cacheability(void); > diff --git a/xen/arch/arm/include/asm/gic_v4_its.h b/xen/arch/arm/include= /asm/gic_v4_its.h > index 37b6b92f0c..1d800fdbaf 100644 > --- a/xen/arch/arm/include/asm/gic_v4_its.h > +++ b/xen/arch/arm/include/asm/gic_v4_its.h > @@ -52,6 +52,7 @@ struct event_vlpi_map { > }; > > void gicv4_its_vpeid_allocator_init(void); > +int gicv4_init_vpe_proxy(void); > > #define GICR_VPROPBASER 0x0070 > #define GICR_VPENDBASER 0x0078 > @@ -97,6 +98,10 @@ static inline void gits_write_vpendbaser(uint64_t val,= void __iomem *addr) > } > #define gits_read_vpendbaser(c) readq_relaxed(c) > > +#define GICR_INVLPIR_INTID GENMASK_ULL(31, 0) > +#define GICR_INVLPIR_VPEID GICR_INVALLR_VPEID > +#define GICR_INVLPIR_V GICR_INVALLR_V GICR_INVALLR_VPEID and GICR_INVALLR_V are not defined, so this does not build as-is. Also note that the V/VPEID fields in GICR_INVLPIR/INVALLR exist only for GICv4.1 (FEAT_GICv4p1). For GICv4.0 these bits are RES0. Best regards, Mykola > + > #endif > > /* > diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/v= gic.h > index 9ef667decb..558f81818c 100644 > --- a/xen/arch/arm/include/asm/vgic.h > +++ b/xen/arch/arm/include/asm/vgic.h > @@ -407,9 +407,11 @@ extern void vgic_check_inflight_irqs_pending(struct = vcpu *v, > > /* GICV4 functions */ > #ifdef CONFIG_GICV4 > +bool gic_support_directLPI(void); > bool gic_support_vptValidDirty(void); > bool gic_is_gicv4(void); > #else > +#define gic_support_directLPI() (false) > #define gic_support_vptValidDirty() (false) > #define gic_is_gicv4() (false) > #endif > -- > 2.51.2 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 16:19:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 16:19:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236569.1539242 (Exim 4.92) (envelope-from ) id 1vt6ki-0006gx-CL; Thu, 19 Feb 2026 16:19:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236569.1539242; Thu, 19 Feb 2026 16:19:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6ki-0006gq-9N; Thu, 19 Feb 2026 16:19:44 +0000 Received: by outflank-mailman (input) for mailman id 1236569; Thu, 19 Feb 2026 16:19:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6kh-0006gk-50 for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 16:19:43 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id cb149e07-0dae-11f1-9ccf-f158ae23cfc8; Thu, 19 Feb 2026 17:19:40 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-436e87589e8so1166553f8f.3 for ; Thu, 19 Feb 2026 08:19:40 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 19 Feb 2026 08:19:40 -0800 (PST) Message-ID: <67168bee-6a59-49ce-afcd-85df406679e2@suse.com> Date: Thu, 19 Feb 2026 17:19:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] x86/svm: Add Enumerations for the SVM virtual NMI To: Abdelkareem Abdelsaamad Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jason.andryuk@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 15:48, Abdelkareem Abdelsaamad wrote: > Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD > platforms. The feature support is indicated by the CPUID > Fn8000_000A_EDX[25] = 1. > > Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the > VMCB structure's vintr_t: > > vintr_t(11) - Virtual NMI is pending. > vintr_t(12) - Virtual NMI is masked. > vintr_t(26) - Enable NMI virtualization. > > Signed-off-by: Abdelkareem Abdelsaamad > Reviewed-by: Teddy Astie Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Feb 19 16:27:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 16:27:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236581.1539253 (Exim 4.92) (envelope-from ) id 1vt6rh-0008E3-2B; Thu, 19 Feb 2026 16:26:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236581.1539253; Thu, 19 Feb 2026 16:26:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6rg-0008Dw-Vl; Thu, 19 Feb 2026 16:26:56 +0000 Received: by outflank-mailman (input) for mailman id 1236581; Thu, 19 Feb 2026 16:26:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt6rf-0008Dq-Jt for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 16:26:55 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ccedce00-0daf-11f1-9ccf-f158ae23cfc8; Thu, 19 Feb 2026 17:26:53 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-483487335c2so11273465e9.2 for ; Thu, 19 Feb 2026 08:26:53 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 19 Feb 2026 08:26:52 -0800 (PST) Message-ID: <3989d531-00fc-4a78-b236-1693fda61b62@suse.com> Date: Thu, 19 Feb 2026 17:26:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/2] x86/svm: Use the virtual NMI when available To: Abdelkareem Abdelsaamad Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jason.andryuk@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18.02.2026 15:48, Abdelkareem Abdelsaamad wrote: > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -33,6 +33,14 @@ static void svm_inject_nmi(struct vcpu *v) > u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); > intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + if ( !vmcb->_vintr.fields.vnmi_pending ) > + vmcb->_vintr.fields.vnmi_pending = 1; Why the (inner) conditional? Also, as I think Teddy had already indicated before, might we better not use the _vintr field directly, but rather use the vmcb_[gs]et_vintr() wrappers? I notice nestedsvm.c open-codes many of the accesses, but elsewhere I see just one such case. The field name has a leading underscore for this reason, iirc. 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>> intinfo_t event; >> >> + if ( vmcb->_vintr.fields.vnmi_enable ) >> + { >> + if ( !vmcb->_vintr.fields.vnmi_pending ) >> + vmcb->_vintr.fields.vnmi_pending = 1; > Why the (inner) conditional? > > Also, as I think Teddy had already indicated before, might we better not use > the _vintr field directly, but rather use the vmcb_[gs]et_vintr() wrappers? vNMI is not covered by the TPR cleanbit, and needs to avoid that setter.  This register is a complete mess, given how it's grown over the generations. Leave it opencoded for now, and I'll see about cleaning things up when getting properly into the nested virt work. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Feb 19 17:06:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 17:06:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236613.1539273 (Exim 4.92) (envelope-from ) id 1vt7TF-0005xu-1g; Thu, 19 Feb 2026 17:05:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236613.1539273; Thu, 19 Feb 2026 17:05:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt7TE-0005xn-V4; Thu, 19 Feb 2026 17:05:44 +0000 Received: by outflank-mailman (input) for mailman id 1236613; Thu, 19 Feb 2026 17:05:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt7TD-0005xh-Gf for xen-devel@lists.xenproject.org; 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(We > actually leverage the same facts in find_next{,_zero}_bit() as well.) This > way in __scanbit() the TZCNT alternative can be engaged. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper I agree that we're already doing that in find_next{,_zero}_bit() and therefore ought to be safe here. What's really confusing about all of this is that __scanbit() differs from ffs() by wanting a return value in the range [1, 64).  With that in mind, I think we can do exactly the same as we do in arch_ffs(), but preloading with BITS_PER_LONG rather than -1.  That in turn removes the alternative and simplifies things further. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Feb 19 18:50:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 18:50:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236668.1539283 (Exim 4.92) (envelope-from ) id 1vt96D-0002kU-9C; Thu, 19 Feb 2026 18:50:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236668.1539283; Thu, 19 Feb 2026 18:50:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt96D-0002kL-54; Thu, 19 Feb 2026 18:50:05 +0000 Received: by outflank-mailman (input) for mailman id 1236668; Thu, 19 Feb 2026 18:50:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vt96C-0002U1-2I for xen-devel@lists.xenproject.org; Thu, 19 Feb 2026 18:50:04 +0000 Received: from sender4-of-o50.zoho.com (sender4-of-o50.zoho.com [136.143.188.50]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cb1211ad-0dc3-11f1-b164-2bf370ae4941; Thu, 19 Feb 2026 19:50:01 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771526981000758.3994514741934; Thu, 19 Feb 2026 10:49:41 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cb1211ad-0dc3-11f1-b164-2bf370ae4941 ARC-Seal: i=1; a=rsa-sha256; t=1771526985; cv=none; d=zohomail.com; s=zohoarc; b=T28865CASPrTt1LdptX8bwjVHOjUx7GzRf5bewXEHreiFb+3s1H/wzCUoBlCHWj8kDW2IAdI3Fmvt5FaUCgeXGK1mHN1xmTlLT2l0f5RECh1G84QMDydr9GtuzHJf7bkvk0MMi5xflJXQcGFhNOIw2xl5BRVzsxwwLY/jW/wgvA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771526985; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=VHY/T0wopJAWiL3NdiLTaFQP/Ul375gxAfFHesT4wrQ=; b=Qtv06B1ruySR2PJPiKFWiMlIp3InRHij5dDrolhr01ZiOebWPbHQUw5zqsdAmgQzf4K96/kSJLpZ90kNt6IyQqx41CAxnAEAZUYkB/XAK5w7glFrnFqlfFw0X74afKnSfweOYw8dIK9IPch9VzZJ4VJBRQ8tIArEF0rEOHVVFzc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771526985; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=VHY/T0wopJAWiL3NdiLTaFQP/Ul375gxAfFHesT4wrQ=; b=d8GMGpI9Y5a8t5/02gSNmGgq+1yfCmepExlAPW5oYFogmgpguLef9Ayh5mCdsi7q SDOHHUrXa8nxOQa/l6ggieI1p0hPx4lGkR2b6BSRo3npX8oXtrRDY9O5J9jL3yDL6yW 1myykh9hD3e3lGbyQxD9F36aQINf2BzR07YwcRHo= From: "Daniel P. Smith" To: xen-devel@lists.xenproject.org Cc: "Daniel P. Smith" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH] xsm: move the console read properly under xsm Date: Thu, 19 Feb 2026 13:45:03 -0500 Message-Id: <20260219184503.21918-1-dpsmith@apertussolutions.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External The access control for domU to read the console should be controlled via XSM. By moving it under XSM, FLASK will now be able to work correctly with the domU console read capability that was introduced recently. To enable console read under XSM, the legacy is_console field in struct domain was collapsed with the new input_allowed field in struct domain_console. Having two fields over console was redundant. By merging them together under the permissions field in struct domain_console, this allows better alignment with the existing fine grained access controls under FLASK. Signed-off-by: Daniel P. Smith --- xen/arch/arm/vpl011.c | 2 +- xen/arch/x86/pv/shim.c | 2 +- xen/common/device-tree/dom0less-build.c | 2 +- xen/common/domain.c | 1 - xen/drivers/char/console.c | 4 ++-- xen/include/xen/sched.h | 8 ++++---- xen/include/xsm/dummy.h | 17 ++++++++++++----- 7 files changed, 21 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index d0d17c76b72c..1461c27afed0 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -713,7 +713,7 @@ int domain_vpl011_init(struct domain *d, struct vpl011_init_info *info) } else { - d->console->input_allowed = true; + d->console->permissions = DOMAIN_CONSOLE_READ; vpl011->backend_in_domain = false; vpl011->backend.xen = xzalloc(struct vpl011_xen_backend); diff --git a/xen/arch/x86/pv/shim.c b/xen/arch/x86/pv/shim.c index bd29c53a2d34..03990dfc0e01 100644 --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -239,7 +239,7 @@ void __init pv_shim_setup_dom(struct domain *d, l4_pgentry_t *l4start, */ d->max_pages = domain_tot_pages(d); - d->console->input_allowed = true; + d->console->permissions = DOMAIN_CONSOLE_READ; } static void write_start_info(struct domain *d) diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 840d14419da2..d144720fe195 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -871,7 +871,7 @@ void __init create_domUs(void) dt_node_name(node), rc); #endif /* CONFIG_HAS_LLC_COLORING */ - ki.bd.d->is_console = true; + ki.bd.d->console->permissions = DOMAIN_CONSOLE_WRITE; dt_device_set_used_by(node, ki.bd.d->domain_id); rc = construct_domU(&ki, node); diff --git a/xen/common/domain.c b/xen/common/domain.c index 2e46207d2db0..331c048e2f72 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -999,7 +999,6 @@ struct domain *domain_create(domid_t domid, goto fail; spin_lock_init(&d->console->lock); - d->console->input_allowed = is_hardware_domain(d); /* * This assertion helps static analysis tools infer that config cannot be diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index bcd6d261491b..909e0fdb8c08 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -554,7 +554,7 @@ struct domain *console_get_domain(void) if ( !d ) return NULL; - if ( d->console->input_allowed ) + if ( !xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) return d; rcu_unlock_domain(d); @@ -595,7 +595,7 @@ static void console_switch_input(void) d = rcu_lock_domain_by_id(domid); if ( d ) { - if ( !d->console->input_allowed ) + if ( xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) { rcu_unlock_domain(d); continue; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 40a35fc15c65..3713664aaea5 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -377,8 +377,10 @@ struct evtchn_port_ops; /* Domain console settings. */ struct domain_console { - /* Permission to take ownership of the physical console input. */ - bool input_allowed; + /* XSM: permission to use HYPERCALL_console_io hypercall */ +#define DOMAIN_CONSOLE_READ (1u << 0) +#define DOMAIN_CONSOLE_WRITE (1u << 1) + unsigned int permissions; /* hvm_print_line() and guest_console_write() logging. */ unsigned int idx; @@ -528,8 +530,6 @@ struct domain bool auto_node_affinity; /* Is this guest fully privileged (aka dom0)? */ bool is_privileged; - /* XSM: permission to use HYPERCALL_console_io hypercall */ - bool is_console; /* Is this guest being debugged by dom0? */ bool debugger_attached; /* diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h index b8fd7aeedd9e..129823b8d37b 100644 --- a/xen/include/xsm/dummy.h +++ b/xen/include/xsm/dummy.h @@ -269,12 +269,19 @@ static XSM_INLINE int cf_check xsm_console_io( XSM_DEFAULT_ARG struct domain *d, int cmd) { XSM_ASSERT_ACTION(XSM_OTHER); - if ( d->is_console ) - return xsm_default_action(XSM_HOOK, d, NULL); -#ifdef CONFIG_VERBOSE_DEBUG - if ( cmd == CONSOLEIO_write ) - return xsm_default_action(XSM_HOOK, d, NULL); + switch ( cmd ) + { + case CONSOLEIO_read: + if ( d->console->permissions & DOMAIN_CONSOLE_READ ) + return xsm_default_action(XSM_HOOK, d, NULL); + break; + case CONSOLEIO_write: +#ifndef CONFIG_VERBOSE_DEBUG + if ( d->console->permissions & DOMAIN_CONSOLE_WRITE ) #endif + return xsm_default_action(XSM_HOOK, d, NULL); + break; + } return xsm_default_action(XSM_PRIV, d, NULL); } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 19 22:22:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 19 Feb 2026 22:22:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236735.1539293 (Exim 4.92) (envelope-from ) id 1vtCPi-0003cg-Oo; Thu, 19 Feb 2026 22:22:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236735.1539293; Thu, 19 Feb 2026 22:22:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtCPi-0003cZ-LE; Thu, 19 Feb 2026 22:22:26 +0000 Received: by outflank-mailman (input) for mailman id 1236735; Thu, 19 Feb 2026 22:22:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtCPh-0003c4-6U for xen-devel@lists.xenproject.org; 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> + > + vpci_cleanup_capabilities(pdev, true); In the case where pdev->ext_cfg transitions from true to false, it doesn't look like this would actually result in the respective capability->cleanup() hook being called, due to reliance on pci_find_ext_capability(). From xen-devel-bounces@lists.xenproject.org Fri Feb 20 00:44:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 00:44:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236771.1539302 (Exim 4.92) (envelope-from ) id 1vtEce-0004pH-Qg; Fri, 20 Feb 2026 00:43:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236771.1539302; Fri, 20 Feb 2026 00:43:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtEce-0004pA-Np; Fri, 20 Feb 2026 00:43:56 +0000 Received: by outflank-mailman (input) for mailman id 1236771; Fri, 20 Feb 2026 00:43:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtEce-0004p4-1f for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 00:43:56 +0000 Received: from fhigh-a4-smtp.messagingengine.com (fhigh-a4-smtp.messagingengine.com [103.168.172.155]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3a9c3b86-0df5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 01:43:53 +0100 (CET) Received: from phl-compute-10.internal (phl-compute-10.internal [10.202.2.50]) by mailfhigh.phl.internal (Postfix) with ESMTP id 2974D14000A4; Thu, 19 Feb 2026 19:43:52 -0500 (EST) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-10.internal (MEProxy); Thu, 19 Feb 2026 19:43:52 -0500 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 19 Feb 2026 19:43:50 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3a9c3b86-0df5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= invisiblethingslab.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:from:from:in-reply-to :message-id:mime-version:reply-to:subject:subject:to:to; s=fm3; t=1771548232; x=1771634632; bh=hKubb8dOWuRmnUzSNPpGPvNmcUjoXCor aP1dW3dZk0k=; b=PhPJmpqWdGXWw/XmDL5uzUT7/7ulhjaf15ogYHYWuqm7HQVe hqdpx0CNaG5H5Oiv8Qs7JIFerWf9nnoj8+s8c85g6M2yAfcFVu2V7HQdsk8cTI2s OHXJLJGVQoRC8jAG6EH0ojG02hdTSBZiaUWxthXomlbS+vL/5c/hiC8fzTmQhL29 kgEtclVd38nkAATe7FCX+r/w6GHIiaaQ1YGfIhZLhREyWC6Z+14cwGZPt4K8NDzW JBiDx3O5MBMlpMH+yiy9trxRkZ770gzOIwi2/4WrRQIO6CG+zcFxQJMrd4mjG5Sq es/BG+O/axmWZtpO1F+jZHqPphKnlP7yvQikQg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:message-id:mime-version:reply-to:subject :subject:to:to:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; t=1771548232; x=1771634632; bh=hKubb8dOWuRmnUzSNPpGPvNmcUjo XCoraP1dW3dZk0k=; b=U4FfCmFIOXHlemHrHV4SGCJfM56oLzR3UO+7VSyTNW11 Ic0F48FB2r3W6tIgolKSPGowZBqovQjow5+5vwkQYFB6xVZ1wvmA/C4xweifc8T/ fXHMZHGdL7OlsCC5grcucdJGy3gc3c5H3fNaM4iUgy9L9K2jnLzMTdLN2P3PAMsR UKuWFaDmcyWyBvJPEq2LirJcCzrKOUoasYvjWyc9h8+7FLYIVNLBmZ4pliM77aj7 ZaDVIdr0dwjTR9D/pY+DGFLEGGL4rQomOC9CXUBmopXKnmIiTkqdi5lBuj3vjpXg HY2pJGKhv4ztNY44p+msZIJjYLYrRgeEmy5BRFMz1Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgddvvdejtdduucetufdoteggodetrf dotffvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfurfetoffkrfgpnffqhgenuceu rghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujf gurhephffvvefufffkofggtgfgsehtkeertdertdejnecuhfhrohhmpeforghrvghkucfo rghrtgiihihkohifshhkihdqifpkrhgvtghkihcuoehmrghrmhgrrhgvkhesihhnvhhish hisghlvghthhhinhhgshhlrggsrdgtohhmqeenucggtffrrghtthgvrhhnpeelkefhudel teelleelteetveeffeetffekteetjeehlefggeekleeghefhtdehvdenucevlhhushhtvg hrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehmrghrmhgrrhgvkhesihhn vhhishhisghlvghthhhinhhgshhlrggsrdgtohhmpdhnsggprhgtphhtthhopeefpdhmoh guvgepshhmthhpohhuthdprhgtphhtthhopeigvghnqdguvghvvghlsehlihhsthhsrdig vghnphhrohhjvggtthdrohhrghdprhgtphhtthhopehmrghrmhgrrhgvkhesihhnvhhish hisghlvghthhhinhhgshhlrggsrdgtohhmpdhrtghpthhtoheprghnthhhohhnhidrphgv rhgrrhgusehvrghtvghsrdhtvggthh X-ME-Proxy: Feedback-ID: i1568416f:Fastmail From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Anthony PERARD Subject: [PATCH v2] tools: specify C standard explicitly Date: Fri, 20 Feb 2026 01:43:21 +0100 Message-ID: <20260220004344.1980775-1-marmarek@invisiblethingslab.com> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Archlinux just updated gcc to 15.2.1+r604+g0b99615a8aef-1, and that defaults now to GNU23 standard. This isn't what Xen codebase expects, for example libxl fails to build with: libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 447 | endptr = strchr(str, '='); | ^ libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 452 | endptr = strchr(str, ','); | ^ libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 454 | endptr = strchr(str, 0); | ^ libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 447 | endptr = strchr(str, '='); | ^ libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 452 | endptr = strchr(str, ','); | ^ libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 454 | endptr = strchr(str, 0); | ^ cc1: all warnings being treated as errors Specify GNU99 explicitly (same version as in the hypervisor, but the GNU dialect), to fix the build, and avoid such surprises in the future. Signed-off-by: Marek Marczykowski-Górecki --- As discussed in v1, I'm changing the standard version for now. Note GCC 14 used to default to -std=gnu17, so that should work too, but keep it consistent with the hypervisor. The v1 that adjusted libxl can be used anyway, but it's less backport-friendly. Changes in v2: - revert to old standard (specify it explicitly now), instead of adjusting the code to the new standard - this way is more backport-friendly --- tools/Rules.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/Rules.mk b/tools/Rules.mk index d9b9c740e964..de9100eb1681 100644 --- a/tools/Rules.mk +++ b/tools/Rules.mk @@ -38,6 +38,8 @@ ifeq ($(debug_symbols),y) CFLAGS += -g3 endif +CFLAGS += -std=gnu99 + ifneq ($(nosharedlibs),y) INSTALL_SHLIB = $(INSTALL_PROG) SYMLINK_SHLIB = ln -sf -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 00:56:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 00:56:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236780.1539313 (Exim 4.92) (envelope-from ) id 1vtEov-0006aQ-SM; Fri, 20 Feb 2026 00:56:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236780.1539313; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="2JULg39Ab87p/qQs" Content-Disposition: inline In-Reply-To: <20260220004344.1980775-1-marmarek@invisiblethingslab.com> --2JULg39Ab87p/qQs Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 20 Feb 2026 01:56:28 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: xen-devel@lists.xenproject.org Cc: Anthony PERARD Subject: Re: [PATCH v2] tools: specify C standard explicitly On Fri, Feb 20, 2026 at 01:43:21AM +0100, Marek Marczykowski-G=C3=B3recki w= rote: > Archlinux just updated gcc to 15.2.1+r604+g0b99615a8aef-1, and that > defaults now to GNU23 standard. This isn't what Xen codebase expects, for > example libxl fails to build with: >=20 > libxl_cpuid.c: In function =E2=80=98libxl_cpuid_parse_config_xend=E2= =80=99: > libxl_cpuid.c:447:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 447 | endptr =3D strchr(str, '=3D'); > | ^ > libxl_cpuid.c:452:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 452 | endptr =3D strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 454 | endptr =3D strchr(str, 0); > | ^ > libxl_cpuid.c: In function =E2=80=98libxl_cpuid_parse_config_xend=E2= =80=99: > libxl_cpuid.c:447:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 447 | endptr =3D strchr(str, '=3D'); > | ^ > libxl_cpuid.c:452:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 452 | endptr =3D strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 454 | endptr =3D strchr(str, 0); > | ^ > cc1: all warnings being treated as errors >=20 > Specify GNU99 explicitly (same version as in the hypervisor, but the > GNU dialect), to fix the build, and avoid such surprises in the future. >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Hm, I should have tested it more precisely. This actually does not solve the issue, it still fails to build on Arch. I did confirmed the -std=3Dgnu99 ended up in the relevant GCC call for libxl_cpuid.c. So, I guess iterate on v1? > --- > As discussed in v1, I'm changing the standard version for now. Note GCC > 14 used to default to -std=3Dgnu17, so that should work too, but keep it > consistent with the hypervisor. > The v1 that adjusted libxl can be used anyway, but it's less > backport-friendly. >=20 > Changes in v2: > - revert to old standard (specify it explicitly now), instead of > adjusting the code to the new standard - this way is more > backport-friendly > --- > tools/Rules.mk | 2 ++ > 1 file changed, 2 insertions(+) >=20 > diff --git a/tools/Rules.mk b/tools/Rules.mk > index d9b9c740e964..de9100eb1681 100644 > --- a/tools/Rules.mk > +++ b/tools/Rules.mk > @@ -38,6 +38,8 @@ ifeq ($(debug_symbols),y) > CFLAGS +=3D -g3 > endif > =20 > +CFLAGS +=3D -std=3Dgnu99 > + > ifneq ($(nosharedlibs),y) > INSTALL_SHLIB =3D $(INSTALL_PROG) > SYMLINK_SHLIB =3D ln -sf > --=20 > 2.51.0 >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --2JULg39Ab87p/qQs Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmXsT0ACgkQ24/THMrX 1yxyUQgAmJb42F7Ybn6YYZxAOWhtqAhRo8ImCxo8eecg2X5LMVyaR/MplriasJdy MhQl31MJ/soBVkqFqiPb0NHYOpFdOf3pivS+ZuxN/pO4FCVruLYICbHGA+5WSJ3n 3yDHyGpAqr89vdDsmKroxmXpnNmMwHG3Pr1nhAiORvVr1VleqTl/6kmsGtkTUxtf HMX/qgYdUFMdV4LmPG4EyH02vsgZQU+7m5UsbCjaBGmbm3lrnRkI98btW3f8RK+0 Cj14pf9Fw226ILSTSrCJYuFKdAh0jHUaA/vfuUKyk/IfuK2vf3GW8sj3alI1RAOt SVc3/DcMYMcnNFPXU4G7f1GdL48mZQ== =IixQ -----END PGP SIGNATURE----- --2JULg39Ab87p/qQs-- From xen-devel-bounces@lists.xenproject.org Fri Feb 20 06:17:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 06:17:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236815.1539323 (Exim 4.92) (envelope-from ) id 1vtJor-0004At-R1; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v5 00/21] paravirt: cleanup and reorg From: patchwork-bot+linux-riscv@kernel.org Message-Id: <177156064929.189817.13253801870624912064.git-patchwork-notify@kernel.org> Date: Fri, 20 Feb 2026 04:10:49 +0000 References: <20260105110520.21356-1-jgross@suse.com> In-Reply-To: <20260105110520.21356-1-jgross@suse.com> To: =?utf-8?b?SsO8cmdlbiBHcm/DnyA8amdyb3NzQHN1c2UuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, longli@microsoft.com, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, jikos@kernel.org, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, boris.ostrovsky@oracle.com, xen-devel@lists.xenproject.org, ajay.kaher@broadcom.com, alexey.makhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, linux@armlinux.org.uk, catalin.marinas@arm.com, chenhuacai@kernel.org, kernel@xen0n.name, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, chleroy@kernel.org, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, linux-arm-kernel@lists.infradead.org, pbonzini@redhat.com, vkuznets@redhat.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, daniel.lezcano@linaro.org, oleg@redhat.com Hello: This series was applied to riscv/linux.git (fixes) by Borislav Petkov (AMD) : On Mon, 5 Jan 2026 12:04:59 +0100 you wrote: > Some cleanups and reorg of paravirt code and headers: > > - The first 2 patches should be not controversial at all, as they > remove just some no longer needed #include and struct forward > declarations. > > - The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has > no real value, as it just changes a crash to a BUG() (the stack > trace will basically be the same). As the maintainer of the main > paravirt user (Xen) I have never seen this crash/BUG() to happen. > > [...] Here is the summary with links: - [v5,05/21] paravirt: Remove asm/paravirt_api_clock.h https://git.kernel.org/riscv/c/68b10fd40d49 - [v5,06/21] sched: Move clock related paravirt code to kernel/sched https://git.kernel.org/riscv/c/e6b2aa6d4004 - [v5,10/21] riscv/paravirt: Use common code for paravirt_steal_clock() https://git.kernel.org/riscv/c/ee9ffcf99f07 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 06:17:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 06:17:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236817.1539327 (Exim 4.92) (envelope-from ) id 1vtJos-0004CI-0k; Fri, 20 Feb 2026 06:16:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236817.1539327; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v2 00/21] paravirt: cleanup and reorg From: patchwork-bot+linux-riscv@kernel.org Message-Id: <177156065379.189817.4828097381020781784.git-patchwork-notify@kernel.org> Date: Fri, 20 Feb 2026 04:10:53 +0000 References: <20250917145220.31064-1-jgross@suse.com> In-Reply-To: <20250917145220.31064-1-jgross@suse.com> To: =?utf-8?b?SsO8cmdlbiBHcm/DnyA8amdyb3NzQHN1c2UuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, jikos@kernel.org, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, boris.ostrovsky@oracle.com, xen-devel@lists.xenproject.org, ajay.kaher@broadcom.com, alexey.makhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, linux@armlinux.org.uk, catalin.marinas@arm.com, chenhuacai@kernel.org, kernel@xen0n.name, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, linux-arm-kernel@lists.infradead.org, pbonzini@redhat.com, vkuznets@redhat.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, daniel.lezcano@linaro.org, oleg@redhat.com Hello: This series was applied to riscv/linux.git (fixes) by Borislav Petkov (AMD) : On Wed, 17 Sep 2025 16:51:59 +0200 you wrote: > Some cleanups and reorg of paravirt code and headers: > > - The first 2 patches should be not controversial at all, as they > remove just some no longer needed #include and struct forward > declarations. > > - The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has > no real value, as it just changes a crash to a BUG() (the stack > trace will basically be the same). As the maintainer of the main > paravirt user (Xen) I have never seen this crash/BUG() to happen. > > [...] Here is the summary with links: - [v2,05/21] paravirt: Remove asm/paravirt_api_clock.h https://git.kernel.org/riscv/c/68b10fd40d49 - [v2,06/21] sched: Move clock related paravirt code to kernel/sched (no matching commit) - [v2,10/21] riscv/paravirt: Use common code for paravirt_steal_clock() https://git.kernel.org/riscv/c/ee9ffcf99f07 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 06:17:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 06:17:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236822.1539346 (Exim 4.92) (envelope-from ) id 1vtJos-0004VF-Rw; Fri, 20 Feb 2026 06:16:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236822.1539346; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v4 00/21] paravirt: cleanup and reorg From: patchwork-bot+linux-riscv@kernel.org Message-Id: <177156065679.189817.6221298327341838079.git-patchwork-notify@kernel.org> Date: Fri, 20 Feb 2026 04:10:56 +0000 References: <20251127070844.21919-1-jgross@suse.com> In-Reply-To: <20251127070844.21919-1-jgross@suse.com> To: =?utf-8?b?SsO8cmdlbiBHcm/DnyA8amdyb3NzQHN1c2UuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, jikos@kernel.org, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, boris.ostrovsky@oracle.com, xen-devel@lists.xenproject.org, ajay.kaher@broadcom.com, alexey.makhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, linux@armlinux.org.uk, catalin.marinas@arm.com, chenhuacai@kernel.org, kernel@xen0n.name, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, linux-arm-kernel@lists.infradead.org, pbonzini@redhat.com, vkuznets@redhat.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, daniel.lezcano@linaro.org, oleg@redhat.com Hello: This series was applied to riscv/linux.git (fixes) by Borislav Petkov (AMD) : On Thu, 27 Nov 2025 08:08:23 +0100 you wrote: > Some cleanups and reorg of paravirt code and headers: > > - The first 2 patches should be not controversial at all, as they > remove just some no longer needed #include and struct forward > declarations. > > - The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has > no real value, as it just changes a crash to a BUG() (the stack > trace will basically be the same). As the maintainer of the main > paravirt user (Xen) I have never seen this crash/BUG() to happen. > > [...] Here is the summary with links: - [v4,05/21] paravirt: Remove asm/paravirt_api_clock.h https://git.kernel.org/riscv/c/68b10fd40d49 - [v4,06/21] sched: Move clock related paravirt code to kernel/sched (no matching commit) - [v4,10/21] riscv/paravirt: Use common code for paravirt_steal_clock() https://git.kernel.org/riscv/c/ee9ffcf99f07 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 06:17:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 06:17:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236818.1539334 (Exim 4.92) (envelope-from ) id 1vtJos-0004Gs-BG; Fri, 20 Feb 2026 06:16:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236818.1539334; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH 00/14] paravirt: cleanup and reorg From: patchwork-bot+linux-riscv@kernel.org Message-Id: <177156065229.189817.8309653371345159867.git-patchwork-notify@kernel.org> Date: Fri, 20 Feb 2026 04:10:52 +0000 References: <20250911063433.13783-1-jgross@suse.com> In-Reply-To: <20250911063433.13783-1-jgross@suse.com> To: =?utf-8?b?SsO8cmdlbiBHcm/DnyA8amdyb3NzQHN1c2UuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, jikos@kernel.org, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, boris.ostrovsky@oracle.com, xen-devel@lists.xenproject.org, ajay.kaher@broadcom.com, alexey.makhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, linux@armlinux.org.uk, catalin.marinas@arm.com, chenhuacai@kernel.org, kernel@xen0n.name, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, linux-arm-kernel@lists.infradead.org, pbonzini@redhat.com, vkuznets@redhat.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, daniel.lezcano@linaro.org Hello: This series was applied to riscv/linux.git (fixes) by Borislav Petkov (AMD) : On Thu, 11 Sep 2025 08:34:19 +0200 you wrote: > Some cleanups and reorg of paravirt code and headers: > > - The first 2 patches should be not controversial at all, as they > remove just some no longer needed #include and struct forward > declarations. > > - The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has > no real value, as it just changes a crash to a BUG() (the stack > trace will basically be the same). As the maintainer of the main > paravirt user (Xen) I have never seen this crash/BUG() to happen. > > [...] Here is the summary with links: - [05/14] paravirt: remove asm/paravirt_api_clock.h https://git.kernel.org/riscv/c/68b10fd40d49 - [06/14] sched: move clock related paravirt code to kernel/sched (no matching commit) - [10/14] riscv/paravirt: use common code for paravirt_steal_clock() https://git.kernel.org/riscv/c/ee9ffcf99f07 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 06:17:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 06:17:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236821.1539340 (Exim 4.92) (envelope-from ) id 1vtJos-0004Lz-Hu; Fri, 20 Feb 2026 06:16:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236821.1539340; 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charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v3 00/21] paravirt: cleanup and reorg From: patchwork-bot+linux-riscv@kernel.org Message-Id: <177156065529.189817.17016822219300820690.git-patchwork-notify@kernel.org> Date: Fri, 20 Feb 2026 04:10:55 +0000 References: <20251006074606.1266-1-jgross@suse.com> In-Reply-To: <20251006074606.1266-1-jgross@suse.com> To: =?utf-8?b?SsO8cmdlbiBHcm/DnyA8amdyb3NzQHN1c2UuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, jikos@kernel.org, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, boris.ostrovsky@oracle.com, xen-devel@lists.xenproject.org, ajay.kaher@broadcom.com, alexey.makhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, linux@armlinux.org.uk, catalin.marinas@arm.com, chenhuacai@kernel.org, kernel@xen0n.name, maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, linux-arm-kernel@lists.infradead.org, pbonzini@redhat.com, vkuznets@redhat.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, daniel.lezcano@linaro.org, oleg@redhat.com Hello: This series was applied to riscv/linux.git (fixes) by Borislav Petkov (AMD) : On Mon, 6 Oct 2025 09:45:45 +0200 you wrote: > Some cleanups and reorg of paravirt code and headers: > > - The first 2 patches should be not controversial at all, as they > remove just some no longer needed #include and struct forward > declarations. > > - The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has > no real value, as it just changes a crash to a BUG() (the stack > trace will basically be the same). As the maintainer of the main > paravirt user (Xen) I have never seen this crash/BUG() to happen. > > [...] Here is the summary with links: - [v3,05/21] paravirt: Remove asm/paravirt_api_clock.h https://git.kernel.org/riscv/c/68b10fd40d49 - [v3,06/21] sched: Move clock related paravirt code to kernel/sched (no matching commit) - [v3,10/21] riscv/paravirt: Use common code for paravirt_steal_clock() https://git.kernel.org/riscv/c/ee9ffcf99f07 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 07:14:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 07:14:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236883.1539374 (Exim 4.92) (envelope-from ) id 1vtKiB-0006JK-TW; Fri, 20 Feb 2026 07:14:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236883.1539374; Fri, 20 Feb 2026 07:14:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtKiB-0006JD-PA; Fri, 20 Feb 2026 07:14:03 +0000 Received: by outflank-mailman (input) for mailman id 1236883; Fri, 20 Feb 2026 07:14:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtKiB-0006J7-4Z for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 07:14:03 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bab719b9-0e2b-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 08:14:00 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-437711e9195so1159514f8f.1 for ; Thu, 19 Feb 2026 23:14:00 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 19 Feb 2026 23:13:59 -0800 (PST) Message-ID: Date: Fri, 20 Feb 2026 08:13:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 5/5] vPCI: re-init extended-capabilities when MMCFG availability changed To: Stewart Hildebrand Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> <67b1f190-a7a8-4cf2-89ca-7186204f0b56@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 23:21, Stewart Hildebrand wrote: > On 2/10/26 05:55, Jan Beulich wrote: >> --- a/xen/drivers/vpci/cap.c >> +++ b/xen/drivers/vpci/cap.c >> @@ -376,6 +379,20 @@ void vpci_cleanup_capabilities(struct pc >> } >> } >> >> +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) >> +{ >> + if ( !pdev->vpci ) >> + return 0; >> + >> + vpci_cleanup_capabilities(pdev, true); > In the case where pdev->ext_cfg transitions from true to false, it doesn't look > like this would actually result in the respective capability->cleanup() hook > being called, due to reliance on pci_find_ext_capability(). Hmm, indeed. Yet that's a problem with vpci_cleanup_capabilities(), not with the call here. It may have been merely latent until no later than b1543cf5751b ("PCI: don't look for ext-caps when there's no extended cfg space"). The cleanup hooks themselves (it's only one right now) then also may not access their respective capabilities anymore (nor even just try to locate them). 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Thu, 19 Feb 2026 23:34:09 -0800 (PST) Message-ID: <1415f4df-8191-4e94-a60a-9b7f0f2599be@suse.com> Date: Fri, 20 Feb 2026 08:34:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] tools: specify C standard explicitly To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Anthony PERARD , xen-devel@lists.xenproject.org References: <20260220004344.1980775-1-marmarek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 01:56, Marek Marczykowski-Górecki wrote: > On Fri, Feb 20, 2026 at 01:43:21AM +0100, Marek Marczykowski-Górecki wrote: >> Archlinux just updated gcc to 15.2.1+r604+g0b99615a8aef-1, and that >> defaults now to GNU23 standard. This isn't what Xen codebase expects, for >> example libxl fails to build with: >> >> libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: >> libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 447 | endptr = strchr(str, '='); >> | ^ >> libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 452 | endptr = strchr(str, ','); >> | ^ >> libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 454 | endptr = strchr(str, 0); >> | ^ >> libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: >> libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 447 | endptr = strchr(str, '='); >> | ^ >> libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 452 | endptr = strchr(str, ','); >> | ^ >> libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] >> 454 | endptr = strchr(str, 0); >> | ^ >> cc1: all warnings being treated as errors >> >> Specify GNU99 explicitly (same version as in the hypervisor, but the >> GNU dialect), to fix the build, and avoid such surprises in the future. >> >> Signed-off-by: Marek Marczykowski-Górecki > > Hm, I should have tested it more precisely. This actually does not solve > the issue, it still fails to build on Arch. I did confirmed the > -std=gnu99 ended up in the relevant GCC call for libxl_cpuid.c. Is it possible that it's not so much the compiler, but glibc, which is the problem here? > So, I guess iterate on v1? Perhaps. As per above it first needs to become clear where the issue is actually coming from. Otoh making the code suitably C23-const-correct will want to happen at some point anyway, I suppose. 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Start with moving > vpci_init_capabilities() and its helpers, plus splitting out of its > cleanup counterpart. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné > --- > vpci_get_register(), while now only used by cap.c, didn't look like it > would want moving there. I think it's best to keep the vpci_{get,add,remove}_register{,s}() functions in the same file. Thanks, Roger. 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Acked-by: Roger Pau Monné Roger. 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> >> + > >> + vpci_cleanup_capabilities(pdev, true); > > In the case where pdev->ext_cfg transitions from true to false, it doesn't look > > like this would actually result in the respective capability->cleanup() hook > > being called, due to reliance on pci_find_ext_capability(). > > Hmm, indeed. Yet that's a problem with vpci_cleanup_capabilities(), not > with the call here. It may have been merely latent until no later than > b1543cf5751b ("PCI: don't look for ext-caps when there's no extended cfg > space"). The cleanup hooks themselves (it's only one right now) then > also may not access their respective capabilities anymore (nor even just > try to locate them). Cleanup hooks should be idempotent, so in principle there should be no need to check whether the capability is present before attempting to clean it up. However cleanup_rebar() does check for the position of the capability, and the MMCFG having disappeared would prevent cleanup there. At least that capability needs to be adjusted to cache the position in the config space and the number of BARs, so that the cleanup hook doesn't rely on PCI config space accesses to fetch any of this. Thanks, Roger. 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Zap what > might be on record, and re-initialize things. > > No synchronization is added for the case where devices may already be in > use. That'll need sorting when (a) DomU support was added and (b) DomU-s > may run already while Dom0 / hwdom still boots (dom0less, Hyperlaunch). > > Signed-off-by: Jan Beulich > --- > vpci_reinit_ext_capabilities()'es return value isn't checked, as it > doesn't feel quite right to fail the hypercall because of this. At the > same time it also doesn't feel quite right to have the function return > "void". Thoughts? For the non hardwware domain case we could deassign the device from the domain? And print a warning message for both cases. > --- > v4: Make sure ->cleanup() and ->init() are invoked. > v3: New. > > --- a/xen/arch/x86/physdev.c > +++ b/xen/arch/x86/physdev.c > @@ -8,6 +8,8 @@ > #include > #include > #include > +#include > + > #include > #include > #include > @@ -169,7 +171,10 @@ int cf_check physdev_check_pci_extcfg(st > > ASSERT(pdev->seg == info->segment); > if ( pdev->bus >= info->start_bus && pdev->bus <= info->end_bus ) > + { > pci_check_extcfg(pdev); > + vpci_reinit_ext_capabilities(pdev); > + } > > return 0; > } > --- a/xen/drivers/vpci/cap.c > +++ b/xen/drivers/vpci/cap.c > @@ -285,13 +285,16 @@ static int vpci_init_ext_capability_list > return 0; > } > > -int vpci_init_capabilities(struct pci_dev *pdev) > +int vpci_init_capabilities(struct pci_dev *pdev, bool ext_only) > { > int rc; > > - rc = vpci_init_capability_list(pdev); > - if ( rc ) > - return rc; > + if ( !ext_only ) > + { > + rc = vpci_init_capability_list(pdev); > + if ( rc ) > + return rc; > + } > > rc = vpci_init_ext_capability_list(pdev); > if ( rc ) > @@ -305,7 +308,7 @@ int vpci_init_capabilities(struct pci_de > unsigned int pos = 0; > > if ( !is_ext ) > - pos = pci_find_cap_offset(pdev->sbdf, cap); > + pos = !ext_only ? pci_find_cap_offset(pdev->sbdf, cap) : 0; > else if ( is_hardware_domain(pdev->domain) ) > pos = pci_find_ext_capability(pdev, cap); > > @@ -349,7 +352,7 @@ int vpci_init_capabilities(struct pci_de > return 0; > } > > -void vpci_cleanup_capabilities(struct pci_dev *pdev) > +void vpci_cleanup_capabilities(struct pci_dev *pdev, bool ext_only) > { > for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) > { > @@ -361,7 +364,7 @@ void vpci_cleanup_capabilities(struct pc > continue; > > if ( !capability->is_ext ) > - pos = pci_find_cap_offset(pdev->sbdf, cap); > + pos = !ext_only ? pci_find_cap_offset(pdev->sbdf, cap) : 0; > else if ( is_hardware_domain(pdev->domain) ) > pos = pci_find_ext_capability(pdev, cap); > if ( pos ) > @@ -376,6 +379,20 @@ void vpci_cleanup_capabilities(struct pc > } > } > > +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) > +{ > + if ( !pdev->vpci ) > + return 0; > + > + vpci_cleanup_capabilities(pdev, true); > + > + if ( vpci_remove_registers(pdev->vpci, PCI_CFG_SPACE_SIZE, > + PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) ) > + ASSERT_UNREACHABLE(); > + > + return vpci_init_capabilities(pdev, true); I wonder here, in the context here, where the device is already assigned to a domain you likely need to take the vPCI lock to safely perform (parts of?) the cleanup and reinit. Otherwise you could free capability data while it's being accessed by the handlers. The only current extended capability (reBAR) doesn't have any internal state to free on cleanup, so it's all safe. But a cleanup like the MSI(-X) ones would be racy, as they free the structure without holding the vPCI lock. I think we need to be careful, and possibly adjust the cleanup functions so they can tolerate cleanup with possible concurrent accesses. Thanks, Roger. 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Otherwise the put_page() in p2m_entry_modify() won't be safe to do ahead of the entry being removed form the p2m and any cached states purged. While there also replace the error codes for unreachable paths to use EILSEQ. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/include/asm/p2m.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index ef6b02ff0bb6..1ceb248b9da6 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -1066,7 +1066,7 @@ static inline int p2m_entry_modify(struct p2m_domain *p2m, p2m_type_t nt, if ( !mfn_valid(nfn) || p2m != p2m_get_hostp2m(p2m->domain) ) { ASSERT_UNREACHABLE(); - return -EINVAL; + return -EILSEQ; } if ( !page_get_owner_and_reference(mfn_to_page(nfn)) ) @@ -1088,14 +1088,26 @@ static inline int p2m_entry_modify(struct p2m_domain *p2m, p2m_type_t nt, break; case p2m_map_foreign: - if ( !mfn_valid(ofn) || p2m != p2m_get_hostp2m(p2m->domain) ) + { + struct page_info *pg = mfn_valid(ofn) ? mfn_to_page(ofn) : NULL; + unsigned long ci = pg ? ACCESS_ONCE(pg->count_info) : 0; + + if ( !pg || p2m != p2m_get_hostp2m(p2m->domain) || + /* + * Rely on the caller also holding a reference to the page, so + * that the put_page() below doesn't cause the page to be + * freed, as it still has to be removed from the p2m. + */ + (ci & PGC_count_mask) <= (ci & PGC_allocated ? 2 : 1) || + !p2m->nr_foreign ) { ASSERT_UNREACHABLE(); - return -EINVAL; + return -EILSEQ; } - put_page(mfn_to_page(ofn)); + put_page(pg); p2m->nr_foreign--; break; + } default: break; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 10:10:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 10:10:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236981.1539454 (Exim 4.92) (envelope-from ) id 1vtNTJ-0007wq-SC; Fri, 20 Feb 2026 10:10:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236981.1539454; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HKXlsan698c3NGvQ" Content-Disposition: inline In-Reply-To: <1415f4df-8191-4e94-a60a-9b7f0f2599be@suse.com> --HKXlsan698c3NGvQ Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 20 Feb 2026 11:10:46 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Anthony PERARD , xen-devel@lists.xenproject.org Subject: Re: [PATCH v2] tools: specify C standard explicitly On Fri, Feb 20, 2026 at 08:34:08AM +0100, Jan Beulich wrote: > Is it possible that it's not so much the compiler, but glibc, which is the > problem here? Indeed, that's glibc. I tested it starting with CI container and updated packages one by one - it's about glic 2.42 -> 2.43. > > So, I guess iterate on v1? >=20 > Perhaps. As per above it first needs to become clear where the issue is > actually coming from. Otoh making the code suitably C23-const-correct will > want to happen at some point anyway, I suppose. I'll sent v3 with remarks from your review on v1 applied. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --HKXlsan698c3NGvQ Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmYMyYACgkQ24/THMrX 1yzdWgf8Cpg67921Ysro8oub0wobDe5cTBa0vWOWo9hBZlahhRbvyO5O9jtH/Ftj Syhl/Y2XwiIp20Qn3Qxd5v0xmr0nG2bSDmK9jKhbNI8NGO2nxk3TT5bPaCfhGC6v BgUChZR2xrdbmh/arTk65jMBxl5CrHvslEdyZl39b7hV0+LwxLMbG/MZfQC4Uoqf 3KNNRuVlsU/dPNz/NXfekw4TFWSFmCWIc1bXT8Iv7XZ1lEMmiuheqb2bM4ohDuRr 8cMHkxN457QyG7BVyOArOEKP4/+IEYdYAY5XWDDWZtUETG5b3t+zjZYAFTjBHo5v 9C/DBOB6FBlt0MFh1xjnzi2B59WT3A== =iqBY -----END PGP SIGNATURE----- --HKXlsan698c3NGvQ-- From xen-devel-bounces@lists.xenproject.org Fri Feb 20 10:21:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 10:21:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1236993.1539465 (Exim 4.92) (envelope-from ) id 1vtNd3-0001Jl-PZ; Fri, 20 Feb 2026 10:20:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1236993.1539465; Fri, 20 Feb 2026 10:20:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtNd3-0001Je-Mn; Fri, 20 Feb 2026 10:20:57 +0000 Received: by outflank-mailman (input) for mailman id 1236993; Fri, 20 Feb 2026 10:20:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtNd2-0001JW-KC for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 10:20:56 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d68e6bed-0e45-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 11:20:54 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-4359108fd24so1164870f8f.2 for ; Fri, 20 Feb 2026 02:20:54 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 20 Feb 2026 02:20:53 -0800 (PST) Message-ID: Date: Fri, 20 Feb 2026 11:20:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 5/5] vPCI: re-init extended-capabilities when MMCFG availability changed To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Stewart Hildebrand References: <25c65557-c97c-499c-a698-571e40cde563@suse.com> <67b1f190-a7a8-4cf2-89ca-7186204f0b56@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 10:28, Roger Pau Monné wrote: > On Tue, Feb 10, 2026 at 11:55:34AM +0100, Jan Beulich wrote: >> When Dom0 informs us about MMCFG usability, this may change whether >> extended capabilities are available (accessible) for devices. Zap what >> might be on record, and re-initialize things. >> >> No synchronization is added for the case where devices may already be in >> use. That'll need sorting when (a) DomU support was added and (b) DomU-s >> may run already while Dom0 / hwdom still boots (dom0less, Hyperlaunch). >> >> Signed-off-by: Jan Beulich >> --- >> vpci_reinit_ext_capabilities()'es return value isn't checked, as it >> doesn't feel quite right to fail the hypercall because of this. At the >> same time it also doesn't feel quite right to have the function return >> "void". Thoughts? > > For the non hardwware domain case we could deassign the device from > the domain? Will need to check. De-assigning is generally done only from domctl context, I think. I'm also uncertain what other things may break (in Xen or the toolstacks) if we take away a device in such a pretty much uncontrolled way. > And print a warning message for both cases. Can do, albeit I'm unsure what "both" refers to - I see only ... >> --- a/xen/arch/x86/physdev.c >> +++ b/xen/arch/x86/physdev.c >> @@ -8,6 +8,8 @@ >> #include >> #include >> #include >> +#include >> + >> #include >> #include >> #include >> @@ -169,7 +171,10 @@ int cf_check physdev_check_pci_extcfg(st >> >> ASSERT(pdev->seg == info->segment); >> if ( pdev->bus >= info->start_bus && pdev->bus <= info->end_bus ) >> + { >> pci_check_extcfg(pdev); >> + vpci_reinit_ext_capabilities(pdev); >> + } ... this. >> @@ -376,6 +379,20 @@ void vpci_cleanup_capabilities(struct pc >> } >> } >> >> +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) >> +{ >> + if ( !pdev->vpci ) >> + return 0; >> + >> + vpci_cleanup_capabilities(pdev, true); >> + >> + if ( vpci_remove_registers(pdev->vpci, PCI_CFG_SPACE_SIZE, >> + PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) ) >> + ASSERT_UNREACHABLE(); >> + >> + return vpci_init_capabilities(pdev, true); > > I wonder here, in the context here, where the device is already > assigned to a domain you likely need to take the vPCI lock to safely > perform (parts of?) the cleanup and reinit. Otherwise you could free > capability data while it's being accessed by the handlers. The lock isn't recursive, so I fear we'd deadlock if it was taken here. Furthermore this falls into "DomU support needs dealing with"; right now we assume Dom0 tells us about its final MCFG verdict ahead of putting devices in use. Once we need to consider devices already in use, I think we would further need to pause the owning domain. Also ... > The only current extended capability (reBAR) doesn't have any internal > state to free on cleanup, so it's all safe. But a cleanup like the > MSI(-X) ones would be racy, as they free the structure without holding > the vPCI lock. I think we need to be careful, and possibly adjust the > cleanup functions so they can tolerate cleanup with possible > concurrent accesses. ... to cover such. (For something like MSI(-X) it might then further be necessary to mask/disable interrupts, but hopefully we'll never have to deal with extended capabilities that would require this.) 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Fri, 20 Feb 2026 02:24:50 -0800 (PST) Message-ID: Date: Fri, 20 Feb 2026 11:24:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/p2m: clarify foreign map handling in p2m_entry_modify() To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20260220100509.49700-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220100509.49700-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 11:05, Roger Pau Monne wrote: > Introduce an extra check and comment to ensure the outer caller has > possibly taken an extra reference on the foreign page that's about to be > removed from the p2m. Otherwise the put_page() in p2m_entry_modify() won't > be safe to do ahead of the entry being removed form the p2m and any cached > states purged. > > While there also replace the error codes for unreachable paths to use > EILSEQ. > > No functional change intended. > > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich > --- a/xen/arch/x86/include/asm/p2m.h > +++ b/xen/arch/x86/include/asm/p2m.h > @@ -1066,7 +1066,7 @@ static inline int p2m_entry_modify(struct p2m_domain *p2m, p2m_type_t nt, > if ( !mfn_valid(nfn) || p2m != p2m_get_hostp2m(p2m->domain) ) > { > ASSERT_UNREACHABLE(); > - return -EINVAL; > + return -EILSEQ; > } > > if ( !page_get_owner_and_reference(mfn_to_page(nfn)) ) > @@ -1088,14 +1088,26 @@ static inline int p2m_entry_modify(struct p2m_domain *p2m, p2m_type_t nt, > break; > > case p2m_map_foreign: > - if ( !mfn_valid(ofn) || p2m != p2m_get_hostp2m(p2m->domain) ) > + { > + struct page_info *pg = mfn_valid(ofn) ? mfn_to_page(ofn) : NULL; > + unsigned long ci = pg ? ACCESS_ONCE(pg->count_info) : 0; > + > + if ( !pg || p2m != p2m_get_hostp2m(p2m->domain) || > + /* > + * Rely on the caller also holding a reference to the page, so > + * that the put_page() below doesn't cause the page to be > + * freed, as it still has to be removed from the p2m. > + */ > + (ci & PGC_count_mask) <= (ci & PGC_allocated ? 2 : 1) || > + !p2m->nr_foreign ) > { > ASSERT_UNREACHABLE(); > - return -EINVAL; > + return -EILSEQ; > } > - put_page(mfn_to_page(ofn)); > + put_page(pg); > p2m->nr_foreign--; > break; > + } > > default: > break; Unrelated to the particular change here, I wonder whether it's about time to out-of-line this ever-growing function. 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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a3dfd3d6sm22028005e9.3.2026.02.20.02.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 02:42:58 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ecca221b-0e48-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771584179; x=1772188979; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=pzVoneESGXvvOzUPiX+drad6Xn+qjY6oGfG1hwkXseU=; b=AI+ny7woVjInNpSXAJnkFdU29byAMU1N4AP1dP7WLCNQDTrPb7gHuxHyNQs/6ur73m NDytLLeCBJjrbwuIflSI0tdXSG4w2uOuM3FQLRa8jaDxQWHDokmwJfMlgxw+L1X8RtEe 1QOdGCpUNjNLH4f8d+dS2iQf8PgJ9nj9DIJUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771584179; x=1772188979; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=pzVoneESGXvvOzUPiX+drad6Xn+qjY6oGfG1hwkXseU=; b=alkfgjYqKTBq70x5i1AZCD7Sm13ATEa/FwV0l9cPjgI7DCgXIjGk+hf/sPhx6xpVKu E8AaNNkYLvCTHmNxf4BwwkwV/uWGQ77FJFqSd4okWlEw5UXqORfw2ITB3gTClP5zBoJd /DLbi8Gs2yVEAgbg/31uoR5OJ/gyj2P8kx5e5R2xYt9Lhx/oPKC1PHS/AefHz/E0rZiz DHYOXMKfipetl4wahbBE7xO0t3PeXSUmQR0gdOYMap0EMSwWopy9+rwh7hDdKXk1vanw 5KrPheVlNzxPWaBU8plrvYIWpO7skmA1JYA+CpJFdZodcIE4HkLSStaTM88o/4yn0s14 Kt4Q== X-Gm-Message-State: AOJu0YwnY64pnlPjdw+jrnKuMW0vJtL2q2nhb9/3JOyaP7F/WYfgGWAN pg29GdAWdvtoxm42mcrInz1TbQGQIC5FxLyG/XjWh0A3V3Q0sfndHRFEM+/yzxVZhJztQbA58ve eIhZdibQvn4aN X-Gm-Gg: AZuq6aJyPWfrW0xgdlmn8O1w61X5ek1O/5xRCf0HComhnyHV2txtOy+7Iej+esBGs+5 KZyFL68Qj9fGBm8wRV2MEh07/f0gVcMEJhO6hO5JN7rw4gVogUNbBIcA1MOohh+hxkUcG4gAh2s ugMt5Ovf1WhG1FZuZYRKQGtn/06Q4776oIMxm5YhBilDIpsnvZAOhjSe3rBqWHWJEEZohb+DI8m +kCs/jgl4zSgM6N7sltli2vZrYo+dyObOkTy09Wd9tiYjWzNiMej45l5FijA5PeNEW6TXCI9ugI 5zSiZTyHGoscYx6VDVgUvNOCAB+MlIEgE/oeafAfRIp70XzBEfDkRQF1eRSRO+2ib/3pXjkqh3a BvB56GGElxg4JB2wPQE8C2VJDRRtIFlHRTsSh+jsLKBGuuX6+RtGKbOl0jjXGCvejD6+7um1ANL /J8pkHuNNkTIzVgkNtUqeOtvaTKN4ixYvBX1u+hJmbH0XKjgUjQeTuBQhVx1lDEn0eUKMM8bc= X-Received: by 2002:a05:600c:4744:b0:47e:e7e5:ff32 with SMTP id 5b1f17b1804b1-4839e66d920mr89358325e9.34.1771584178584; Fri, 20 Feb 2026 02:42:58 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, kevin.lampis@citrix.com Subject: [PATCH] x86/cpu/intel: Limit the non-architectural constant_tsc model checks Date: Fri, 20 Feb 2026 10:42:57 +0000 Message-Id: <20260220104257.3405712-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sohil Mehta X86_FEATURE_CONSTANT_TSC is a Linux-defined, synthesized feature flag. It is used across several vendors. Intel CPUs will set the feature when the architectural CPUID.80000007.EDX[1] bit is set. There are also some Intel CPUs that have the X86_FEATURE_CONSTANT_TSC behavior but don't enumerate it with the architectural bit. Those currently have a model range check. Today, virtually all of the CPUs that have the CPUID bit *also* match the "model >= 0x0e" check. This is confusing. Instead of an open-ended check, pick some models (INTEL_IVYBRIDGE and P4_WILLAMETTE) as the end of goofy CPUs that should enumerate the bit but don't. These models are relatively arbitrary but conservative pick for this. This makes it obvious that later CPUs (like Family 18+) no longer need to synthesize X86_FEATURE_CONSTANT_TSC. Signed-off-by: Sohil Mehta Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/r/20250219184133.816753-14-sohil.mehta@intel.com Link: https://git.kernel.org/tip/fadb6f569b10bf668677add876ed50586931b8f3 [Port to Xen] Signed-off-by: Kevin Lampis Signed-off-by: Andrew Cooper --- xen/arch/x86/cpu/intel.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 584588e406f2..18b3c79dc97f 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -637,14 +637,13 @@ static void cf_check init_intel(struct cpuinfo_x86 *c) /* Work around errata */ Intel_errata_workarounds(c); - if ((c->x86 == 0xf && c->x86_model >= 0x03) || - (c->x86 == 0x6 && c->x86_model >= 0x0e)) - __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); if (cpu_has(c, X86_FEATURE_ITSC)) { __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability); __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability); - } + } else if ((c->vfm >= INTEL_P4_PRESCOTT && c->vfm <= INTEL_P4_CEDARMILL) || + (c->vfm >= INTEL_CORE_YONAH && c->vfm <= INTEL_IVYBRIDGE)) + __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) base-commit: 52e801093b6d9f72944328925588b227d7114f8e -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 10:54:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 10:54:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237018.1539495 (Exim 4.92) (envelope-from ) id 1vtO97-0006yn-OS; Fri, 20 Feb 2026 10:54:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237018.1539495; Fri, 20 Feb 2026 10:54:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtO97-0006yg-L7; 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Zap what > >> might be on record, and re-initialize things. > >> > >> No synchronization is added for the case where devices may already be in > >> use. That'll need sorting when (a) DomU support was added and (b) DomU-s > >> may run already while Dom0 / hwdom still boots (dom0less, Hyperlaunch). > >> > >> Signed-off-by: Jan Beulich > >> --- > >> vpci_reinit_ext_capabilities()'es return value isn't checked, as it > >> doesn't feel quite right to fail the hypercall because of this. At the > >> same time it also doesn't feel quite right to have the function return > >> "void". Thoughts? > > > > For the non hardwware domain case we could deassign the device from > > the domain? > > Will need to check. De-assigning is generally done only from domctl context, > I think. I'm also uncertain what other things may break (in Xen or the > toolstacks) if we take away a device in such a pretty much uncontrolled way. > > > And print a warning message for both cases. > > Can do, albeit I'm unsure what "both" refers to - I see only ... Oh, I mean print a warning message for both the hardware domain and the domU case. > >> --- a/xen/arch/x86/physdev.c > >> +++ b/xen/arch/x86/physdev.c > >> @@ -8,6 +8,8 @@ > >> #include > >> #include > >> #include > >> +#include > >> + > >> #include > >> #include > >> #include > >> @@ -169,7 +171,10 @@ int cf_check physdev_check_pci_extcfg(st > >> > >> ASSERT(pdev->seg == info->segment); > >> if ( pdev->bus >= info->start_bus && pdev->bus <= info->end_bus ) > >> + { > >> pci_check_extcfg(pdev); > >> + vpci_reinit_ext_capabilities(pdev); > >> + } > > ... this. > > >> @@ -376,6 +379,20 @@ void vpci_cleanup_capabilities(struct pc > >> } > >> } > >> > >> +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) > >> +{ > >> + if ( !pdev->vpci ) > >> + return 0; > >> + > >> + vpci_cleanup_capabilities(pdev, true); > >> + > >> + if ( vpci_remove_registers(pdev->vpci, PCI_CFG_SPACE_SIZE, > >> + PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) ) > >> + ASSERT_UNREACHABLE(); > >> + > >> + return vpci_init_capabilities(pdev, true); > > > > I wonder here, in the context here, where the device is already > > assigned to a domain you likely need to take the vPCI lock to safely > > perform (parts of?) the cleanup and reinit. Otherwise you could free > > capability data while it's being accessed by the handlers. > > The lock isn't recursive, so I fear we'd deadlock if it was taken here. Yeah, that's why I've put the "parts of" remark above, some of those functions already take the lock themselves. > Furthermore this falls into "DomU support needs dealing with"; right > now we assume Dom0 tells us about its final MCFG verdict ahead of > putting devices in use. Once we need to consider devices already in > use, I think we would further need to pause the owning domain. Also ... Agreed. So that this is clear, you might add an ASSERT() that the device is not assigned to a non-hardware domain when this reinit happens? > > The only current extended capability (reBAR) doesn't have any internal > > state to free on cleanup, so it's all safe. But a cleanup like the > > MSI(-X) ones would be racy, as they free the structure without holding > > the vPCI lock. I think we need to be careful, and possibly adjust the > > cleanup functions so they can tolerate cleanup with possible > > concurrent accesses. > > ... to cover such. (For something like MSI(-X) it might then further be > necessary to mask/disable interrupts, but hopefully we'll never have to > deal with extended capabilities that would require this.) Indeed. Something like MSI-X would be extra fun to deal with, but sooner or later we will need to handle it if we ever plan to support hot-unplug from domUs. In fact, the current cleanup_msi{,x}() helpers should already remove any interrupt bindings and free any mapped pIRQs, otherwise we rely on the PVH hardware domain having cleaned up the device properly before it being assigned to another domain? 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Intel CPUs will set the feature when > the architectural CPUID.80000007.EDX[1] bit is set. There are also some > Intel CPUs that have the X86_FEATURE_CONSTANT_TSC behavior but don't > enumerate it with the architectural bit. Those currently have a model > range check. > > Today, virtually all of the CPUs that have the CPUID bit *also* match > the "model >= 0x0e" check. This is confusing. Instead of an open-ended > check, pick some models (INTEL_IVYBRIDGE and P4_WILLAMETTE) as the end > of goofy CPUs that should enumerate the bit but don't. These models are > relatively arbitrary but conservative pick for this. > > This makes it obvious that later CPUs (like Family 18+) no longer need > to synthesize X86_FEATURE_CONSTANT_TSC. > > Signed-off-by: Sohil Mehta > Signed-off-by: Ingo Molnar > Link: https://lore.kernel.org/r/20250219184133.816753-14-sohil.mehta@intel.com > Link: https://git.kernel.org/tip/fadb6f569b10bf668677add876ed50586931b8f3 > [Port to Xen] > Signed-off-by: Kevin Lampis > Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné Thanks, Roger. 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I tested it starting with CI container and updated > packages one by one - it's about glic 2.42 -> 2.43. > >>> So, I guess iterate on v1? >> Perhaps. As per above it first needs to become clear where the issue is >> actually coming from. Otoh making the code suitably C23-const-correct will >> want to happen at some point anyway, I suppose. > I'll sent v3 with remarks from your review on v1 applied. > Agreed, the moment we limit tools to a specific std, we will fail to find stuff like this. In my copious free time, I keep on meaning to do one CI run with Xen forced the the newest std too, so we can pick up fixes as we go rather than finding them all in one go while trying to do something else in a hurry. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 20 12:12:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 12:12:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237068.1539528 (Exim 4.92) (envelope-from ) id 1vtPN4-0002MS-R8; Fri, 20 Feb 2026 12:12:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237068.1539528; Fri, 20 Feb 2026 12:12:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtPN4-0002ML-OE; Fri, 20 Feb 2026 12:12:34 +0000 Received: by outflank-mailman (input) for mailman id 1237068; Fri, 20 Feb 2026 12:12:33 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtPN3-0002MF-7c for xen-devel@lists.xenproject.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit Archlinux just updated glibc to 2.43+r5+g856c426a7534-1 and that causes libxl build failure: libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 447 | endptr = strchr(str, '='); | ^ libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 452 | endptr = strchr(str, ','); | ^ libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] 454 | endptr = strchr(str, 0); | ^ cc1: all warnings being treated as errors Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const endptr still is needed, to be compatible with the second argument to strtoul(). Add second variable for this reason. And while at it, move semicolon to its own line Signed-off-by: Marek Marczykowski-Górecki --- Changes in v3: - go back to adding consts, as it wasn't about GCC after all - reduce variable scope, move semicolon Changes in v2: - revert to old standard (specify it explicitly now), instead of adjusting the code to the new standard - this way is more backport-friendly --- tools/libs/light/libxl_cpuid.c | 21 ++++++++++++--------- tools/libs/light/libxl_internal.c | 2 +- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 8420b2465f39..14f08df33a14 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -440,29 +440,32 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, str = endptr + 1; entry = cpuid_find_match(policy, leaf, subleaf); for (str = endptr + 1; *str != 0;) { + const char *endptrc; + if (str[0] != 'e' || str[2] != 'x') { return 4; } value = str[1] - 'a'; - endptr = strchr(str, '='); - if (value > 3 || endptr == NULL) { + endptrc = strchr(str, '='); + if (value > 3 || endptrc == NULL) { return 4; } - str = endptr + 1; - endptr = strchr(str, ','); - if (endptr == NULL) { - endptr = strchr(str, 0); + str = endptrc + 1; + endptrc = strchr(str, ','); + if (endptrc == NULL) { + endptrc = strchr(str, 0); } - if (endptr - str != 32) { + if (endptrc - str != 32) { return 5; } entry->policy[value] = calloc(32 + 1, 1); strncpy(entry->policy[value], str, 32); entry->policy[value][32] = 0; - if (*endptr == 0) { + if (*endptrc == 0) { break; } - for (str = endptr + 1; *str == ' ' || *str == '\n'; str++); + for (str = endptrc + 1; *str == ' ' || *str == '\n'; str++) + ; } return 0; } diff --git a/tools/libs/light/libxl_internal.c b/tools/libs/light/libxl_internal.c index 2941ca0bbd0e..d70cfed7d88f 100644 --- a/tools/libs/light/libxl_internal.c +++ b/tools/libs/light/libxl_internal.c @@ -204,7 +204,7 @@ char *libxl__strndup(libxl__gc *gc, const char *c, size_t n) char *libxl__dirname(libxl__gc *gc, const char *s) { - char *c = strrchr(s, '/'); + const char *c = strrchr(s, '/'); if (!c) return NULL; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 12:37:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 12:37:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237089.1539539 (Exim 4.92) (envelope-from ) id 1vtPl3-0005Vg-M4; Fri, 20 Feb 2026 12:37:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237089.1539539; Fri, 20 Feb 2026 12:37:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtPl3-0005VZ-J5; Fri, 20 Feb 2026 12:37:21 +0000 Received: by outflank-mailman (input) for mailman id 1237089; Fri, 20 Feb 2026 12:37:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtPl1-0005VT-Rs for xen-devel@lists.xenproject.org; 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Fri, 20 Feb 2026 12:37:16 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e445cc86-0e58-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771591036; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=I+MaX3FDjdggozygtwrYHcnkihzneYlHj5Zme8bj3hU=; b=dpQC2Ojv2JKBvmoHZ3RJeqIWeGgF5wjtu3o33r6mNPYI4AVy/UWuuq6JgVVXlcwBAYWce6 CzFn3ZLddiXHwGmrDCNHK70quuXLNNkwBYDQ8sloFLu4/uahexeHN7/BPa4XsRckLBmbOB CEhnUuExEKMmfZzyVwFLENWGNBYvjEo= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=dpQC2Ojv DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1771591036; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; 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ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:dkim,suse.com:mid,imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Queue-Id: 7D2CD3E727 X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: Linus, Please git pull the following tag: git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1a-tag xen: branch for v7.0-rc1a It contains a single patch fixing a boot regression when running as a Xen PV guest. This issue was introduced in the 7.0 merge window. Thanks. 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Fri, 20 Feb 2026 06:06:57 -0800 (PST) Message-ID: <5ccdcb99-eeeb-4037-a253-3314f57b3368@suse.com> Date: Fri, 20 Feb 2026 15:06:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] libxl: constify some local variables for building with glibc 2.43 To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Anthony PERARD , Juergen Gross , xen-devel@lists.xenproject.org References: <20260220121220.52078-1-marmarek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220121220.52078-1-marmarek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 13:12, Marek Marczykowski-Górecki wrote: > Archlinux just updated glibc to 2.43+r5+g856c426a7534-1 and that > causes libxl build failure: > > libxl_cpuid.c: In function ‘libxl_cpuid_parse_config_xend’: > libxl_cpuid.c:447:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 447 | endptr = strchr(str, '='); > | ^ > libxl_cpuid.c:452:16: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 452 | endptr = strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] > 454 | endptr = strchr(str, 0); > | ^ > cc1: all warnings being treated as errors > > Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const > endptr still is needed, to be compatible with the second argument to > strtoul(). Add second variable for this reason. > > And while at it, move semicolon to its own line > > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Jan Beulich I'd like to note though that this can't be all that's needed for tools/ to build fine in such an environment. xenstored/core.c has two problematic uses of strrchr(), for example. Jan From xen-devel-bounces@lists.xenproject.org Fri Feb 20 14:13:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 14:13:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237162.1539570 (Exim 4.92) (envelope-from ) id 1vtRGE-0002nk-PU; Fri, 20 Feb 2026 14:13:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237162.1539570; Fri, 20 Feb 2026 14:13:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtRGE-0002nd-Ln; Fri, 20 Feb 2026 14:13:38 +0000 Received: by outflank-mailman (input) for mailman id 1237162; Fri, 20 Feb 2026 14:13:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtRGD-0002nX-Gg for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HgpfyErtE/Hzg3e7" Content-Disposition: inline In-Reply-To: <5ccdcb99-eeeb-4037-a253-3314f57b3368@suse.com> --HgpfyErtE/Hzg3e7 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 20 Feb 2026 15:13:29 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Anthony PERARD , Juergen Gross , xen-devel@lists.xenproject.org Subject: Re: [PATCH v3] libxl: constify some local variables for building with glibc 2.43 On Fri, Feb 20, 2026 at 03:06:56PM +0100, Jan Beulich wrote: > On 20.02.2026 13:12, Marek Marczykowski-G=C3=B3recki wrote: > > Archlinux just updated glibc to 2.43+r5+g856c426a7534-1 and that > > causes libxl build failure: > >=20 > > libxl_cpuid.c: In function =E2=80=98libxl_cpuid_parse_config_xend= =E2=80=99: > > libxl_cpuid.c:447:16: error: assignment discards =E2=80=98const=E2= =80=99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > > 447 | endptr =3D strchr(str, '=3D'); > > | ^ > > libxl_cpuid.c:452:16: error: assignment discards =E2=80=98const=E2= =80=99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > > 452 | endptr =3D strchr(str, ','); > > | ^ > > libxl_cpuid.c:454:20: error: assignment discards =E2=80=98const=E2= =80=99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > > 454 | endptr =3D strchr(str, 0); > > | ^ > > cc1: all warnings being treated as errors > >=20 > > Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const > > endptr still is needed, to be compatible with the second argument to > > strtoul(). Add second variable for this reason. > >=20 > > And while at it, move semicolon to its own line > >=20 > > Signed-off-by: Marek Marczykowski-G=C3=B3recki >=20 > Reviewed-by: Jan Beulich >=20 > I'd like to note though that this can't be all that's needed for tools/ to > build fine in such an environment. xenstored/core.c has two problematic u= ses > of strrchr(), for example. Hm, it builds fine for me, not sure why. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --HgpfyErtE/Hzg3e7 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmYbAkACgkQ24/THMrX 1yy+ZAf/TEAwadzTZ4NhpoNaF8CbYwtn2+W/1Ite/z681Jl9+ACuqtgEDyVAFQFo NX9s6/1MuV2q4ZVkMGM0WUaHdBK2r7zFLbcQ9OsiAOoq28f5HlSvfeyl8Lf3oHgY 6cuwRMANEgofCPCsy0NDCl+JbZimmFWomUmzUbuhWpPFfrSd++KamRHr61L9HCtM qzkS0zj0nVoyvwtm5x8j64zhN+hLpX9BC/Nk5U2RRxAatYUVGPC/mwM5dMl6TEeQ wo4FnCLJrw8mXDN5OFDamQO+Fpodbq0Pj7CUMjcNV9zaLHTrzFY+G8ghduN4Jf7f TUYpyiiidD/khoaGCX0IzhBMnGEC4w== =lym6 -----END PGP SIGNATURE----- --HgpfyErtE/Hzg3e7-- From xen-devel-bounces@lists.xenproject.org Fri Feb 20 14:46:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 14:46:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237191.1539580 (Exim 4.92) (envelope-from ) id 1vtRlP-0007Cb-3k; Fri, 20 Feb 2026 14:45:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237191.1539580; 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All it takes to avoid it is > to have a forward declaration of sh_update_cr3() in place. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper > --- > I find this and the respective Win7 related comment suspicious: If we > really need to "fix up" L3 entries "on demand", wouldn't we better retry > the shadow_get_and_create_l1e() rather than exit? The spurious page > fault that the guest observes can, after all, not be known to be non- > fatal inside the guest. That's purely an OS policy. > > Furthermore the sh_update_cr3() will also invalidate L3 entries which > were loaded successfully before, but invalidated by the guest > afterwards. I strongly suspect that the described hardware behavior is > _only_ to load previously not-present entries from the PDPT, but not > purge ones already marked present. IOW I think sh_update_cr3() would > need calling in an "incremental" mode here. (The alternative of doing > this in shadow_get_and_create_l3e() instead would likely be more > cumbersome.) > > Beyond the "on demand" L3 entry creation I also can't see what guest > actions could lead to the ASSERT() being inapplicable in the PAE case. > The 3-level code in shadow_get_and_create_l2e() doesn't consult guest > PDPTEs, and all other logic is similar to that for other modes. > > (See 89329d832aed ["x86 shadow: Update cr3 in PAE mode when guest walk > succeed but shadow walk fails"].) I recall this being an issue in flight when I joined Citrix, and relates to PDPTRs. Architecturally, PDPTRs are are loaded on MOV CR3, the TLB flushing subset of MOV CR0/4, and Task Switch, and are otherwise non-coherent with RAM.  PDPTRs are not shot down by INVLPG/#PF/etc (they're not part of the TLB state, they're "roots" of the paging structures like CR3 is). (If you recall, this was one of my major concerns with your PTE caching series, and I still need to figure out how to make this case work.) Intel maintains the behaviour with 4x PDPTR fields in the VMCS, but AMD punted on the problem by declaring that 32bit PAE paging under NPT would behave as "normal" PTEs and get loaded on demand. For a while, there was a threat in the APM saying that this behaviour might start applying to native scenarios too, but I recall AMD saying that this hadn't happened and was unlikely to. Either way.  All OSes need to cope with both behaviour.  It's probably easiest for Shadow to stick to strictly architectural behaviour, rather than trying to account for a behaviour that only manifests in another context. I vaguely recall discussion of Windows 7 expecting one behaviour and shadow implementing the other, but it was 15 years ago and probably at least partial speculation over an unfixed bug. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 20 14:47:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 14:47:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237196.1539589 (Exim 4.92) (envelope-from ) id 1vtRmd-0007fJ-B5; Fri, 20 Feb 2026 14:47:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237196.1539589; Fri, 20 Feb 2026 14:47:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtRmd-0007fC-7u; Fri, 20 Feb 2026 14:47:07 +0000 Received: by outflank-mailman (input) for mailman id 1237196; Fri, 20 Feb 2026 14:47:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtRmb-0007f2-SC for xen-devel@lists.xenproject.org; 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Move the invocation up > into the respective #ifdef, noting that while this moves it into the > locked region, emitting trace records with the paging lock held is okay > (as done elsewhere as well), just needlessly increasing lock holding > time a little. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Fri Feb 20 14:56:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 14:56:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237217.1539599 (Exim 4.92) (envelope-from ) id 1vtRvI-000182-9S; Fri, 20 Feb 2026 14:56:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237217.1539599; Fri, 20 Feb 2026 14:56:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtRvI-00017v-5g; Fri, 20 Feb 2026 14:56:04 +0000 Received: by outflank-mailman (input) for mailman id 1237217; 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Message-ID: <36a06fcd-c5cd-4f55-9757-4143879a5446@citrix.com> Date: Fri, 20 Feb 2026 14:55:55 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan Subject: Re: [PATCH v3 04/12] x86/shadow: use lighter weight mode checks To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <184df995-e668-1cea-6f9f-8e79a1ffcbbd@suse.com> <7684392b-82b4-a7cb-35dc-a5de8142eea2@suse.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <7684392b-82b4-a7cb-35dc-a5de8142eea2@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: LO6P123CA0038.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:2fe::15) To IA1PR03MB8288.namprd03.prod.outlook.com (2603:10b6:208:59e::6) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR03MB8288:EE_|DS2PR03MB8443:EE_ X-MS-Office365-Filtering-Correlation-Id: 763bef9f-a490-41a5-9a67-08de70902801 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016|7053199007; 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While > potentially useful outside of shadow-internal functions, when we already > know that we're dealing with a domain in shadow mode, the "paging" > checks are sufficient and cheaper. While the "shadow" ones commonly > translate to a MOV/AND/CMP/Jcc sequence, the "paging" ones typically > resolve to just TEST+Jcc. That's because shadow_*() are checking a minimum of 2 bits, while most of the paging_*() ones are only checking a single bit. > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:06:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:06:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237233.1539608 (Exim 4.92) (envelope-from ) id 1vtS56-00031Y-41; Fri, 20 Feb 2026 15:06:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237233.1539608; Fri, 20 Feb 2026 15:06:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtS56-00031R-1I; Fri, 20 Feb 2026 15:06:12 +0000 Received: by outflank-mailman (input) for mailman id 1237233; Fri, 20 Feb 2026 15:06:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtS54-00030g-Ux for xen-devel@lists.xenproject.org; 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There's therefore no point in putting extra pressure on the > (limited) pool of memory. > > While there also zap the sh_type_to_size[] entry when OOS is disabled > altogether. > > Signed-off-by: Jan Beulich > --- > v3: New. > > --- a/xen/arch/x86/mm/shadow/common.c > +++ b/xen/arch/x86/mm/shadow/common.c > @@ -61,7 +61,9 @@ const uint8_t sh_type_to_size[] = { > [SH_type_l4_64_shadow] = 1, > [SH_type_p2m_table] = 1, > [SH_type_monitor_table] = 1, > +#if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) > [SH_type_oos_snapshot] = 1, > +#endif > }; > #endif /* CONFIG_HVM */ > > @@ -1771,7 +1773,8 @@ static void sh_update_paging_modes(struc > #endif /* (SHADOW_OPTIMIZATIONS & SHOPT_VIRTUAL_TLB) */ > > #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) > - if ( mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) > + if ( !(d->options & XEN_DOMCTL_CDF_oos_off) && > + mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) > { > int i; > > I've never seen XEN_DOMCTL_CDF_oos_off used.  Xapi has no plumbing for this, and xl only inherited it from xend. At this point, OOS is the tested path and OOS_OFF is the untested path.  I think we should remove the flag and let OOS be unconditional like all the other shadow optimisations. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:08:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:08:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237240.1539619 (Exim 4.92) (envelope-from ) id 1vtS7D-0003ok-Gp; Fri, 20 Feb 2026 15:08:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237240.1539619; Fri, 20 Feb 2026 15:08:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtS7D-0003od-CV; Fri, 20 Feb 2026 15:08:23 +0000 Received: by outflank-mailman (input) for mailman id 1237240; Fri, 20 Feb 2026 15:08:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtS7C-0003oX-7J for xen-devel@lists.xenproject.org; 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OOS active also implies HVM. In > sh_remove_all_mappings() one of the two checks is redundant with an > earlier paging_mode_external() one (the other, however, needs to stay). > > Signed-off-by: Jan Beulich Preferably with the commit message tweaked, Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:16:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:16:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237263.1539638 (Exim 4.92) (envelope-from ) id 1vtSEk-0005wG-GJ; Fri, 20 Feb 2026 15:16:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237263.1539638; Fri, 20 Feb 2026 15:16:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtSEk-0005w9-Dh; Fri, 20 Feb 2026 15:16:10 +0000 Received: by outflank-mailman (input) for mailman id 1237263; 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This can happen when > no monitor table was present initially - we'd create one for the new > mode without updating old_mode. Correct this in two ways, each of which > would be sufficient on its own: Once by adding "else" to the second of > the involved if()s in the function, and then by setting the correct > initial mode for HVM domains in shadow_vcpu_init(). > > Further use the same predicate (paging_mode_external()) consistently > when dealing with shadow mode init/update/cleanup, rather than a mix of > is_hvm_vcpu() (init), is_hvm_domain() (update), and > paging_mode_external() (cleanup). > > Finally drop a redundant is_hvm_domain() from inside the bigger if() > (which is being converted to paging_mode_external()) in > sh_update_paging_modes(). > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:17:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:17:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237270.1539649 (Exim 4.92) (envelope-from ) id 1vtSFh-0006QR-PM; Fri, 20 Feb 2026 15:17:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237270.1539649; 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Yet even the original > amount was too high in certain cases. Switch to pre-allocating just as > much as is going to be needed. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:29:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:29:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237289.1539658 (Exim 4.92) (envelope-from ) id 1vtSRa-0000XN-Tg; Fri, 20 Feb 2026 15:29:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237289.1539658; Fri, 20 Feb 2026 15:29:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtSRa-0000XG-Qp; Fri, 20 Feb 2026 15:29:26 +0000 Received: by outflank-mailman (input) for mailman id 1237289; Fri, 20 Feb 2026 15:29:26 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtSRa-0000X8-1e for xen-devel@lists.xenproject.org; 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Misra C:2012 rule 20.6 disallows this altogether, > though. Use helper always-inline functions instead. > > In sh_audit_l1_table(), along with reducing the scope of "gfn", which now > isn't used anymore by the if() side of the conditional, also reduce the > scope of two other adjacent variables. > > For audit_magic() note that both which parameters are needed and what > their types are is attributed to AUDIT_FAIL() accessing variables which > aren't passed as arguments to it. > > No functional change intended. Of course codegen does change with this, > first and foremost in register allocation. > > Reported-by: Andrew Cooper > Signed-off-by: Jan Beulich I included this patch on an interim branch of other MISRA fixes of mine to get a run. https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/13198988953 There's one more violation still to fix:     if ( unlikely((level == 1)                   && sh_mfn_is_a_page_table(target_mfn) #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC )                   /* Unless the page is out of sync and the guest is                      writing to it. */                   && !(mfn_oos_may_write(target_mfn)                        && (ft == ft_demand_write)) #endif /* OOS */                   ) )         sflags &= ~_PAGE_RW; I also looked at this one previously.  Making mfn_oos_may_write() visible outside of SHOPT_OUT_OF_SYNC is quite invasive. Here, I suggest dropping the unlikely() as the easiest fix.  It's almost certainly useless anyway. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Feb 20 15:54:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 15:54:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237314.1539670 (Exim 4.92) (envelope-from ) id 1vtSpF-0004sM-QC; Fri, 20 Feb 2026 15:53:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237314.1539670; Fri, 20 Feb 2026 15:53:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtSpF-0004sF-MS; Fri, 20 Feb 2026 15:53:53 +0000 Received: by outflank-mailman (input) for mailman id 1237314; Fri, 20 Feb 2026 15:53:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtSpD-0004ri-Ps for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 15:53:52 +0000 Received: from mail186-12.suw21.mandrillapp.com (mail186-12.suw21.mandrillapp.com [198.2.186.12]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 590cbd79-0e74-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 16:53:50 +0100 (CET) Received: from pmta10.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail186-12.suw21.mandrillapp.com (Mailchimp) with ESMTP id 4fHZY90ttDz705b3m for ; Fri, 20 Feb 2026 15:53:49 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id e51af2fa70da414fa001341687f854fc; Fri, 20 Feb 2026 15:53:49 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 590cbd79-0e74-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771602829; x=1771872829; bh=fCUBpXi2ECBGejIhZTvDzf6iYF6WB1nBD+u/P8GLLAQ=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=xO/GeWlt/9NCO4z4Ge11zKyrbH8vbZqmOanQRT1jYG2Yr27nOwO2kZ4jptkFoorwq A71j0f/NcO3CbdEFRAfZrPFVIgNMwE6nMGMUvvWfGC4mMPTJ1/YqUINzW3DyJNrnzJ gTWq5gCyNuWsjtEx6xL9lQb9MzoWavQ3muArx+oHkPaWy6rsq+Q3U0pqhs2RTlmnzq MU8ElFQMjrFR7iaEEeXX1QMnP/gbFyPgU8eioIHKi2JStfIRH+Wn2CzYTedz1tAw7o P+m45FVd0s7M8kUepZPio5I0MA8yYETNK5G00N+ADMNjua2IE1JEv9zreLplMbJ6R5 P77YkaJJu2FfA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771602829; x=1771863329; i=teddy.astie@vates.tech; bh=fCUBpXi2ECBGejIhZTvDzf6iYF6WB1nBD+u/P8GLLAQ=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=HNWmI5SCPGMKNIAkqCmLwBPavGOgSRDST84Fv9Zgt4n42HGHUOkES0Uqzi+x/Bm0X 2ib9EGnuUuno4CWfdVx7GNEtSPQUVYz2+813zP3UseStSZN4+HHHHIGspwfhYGzY7R FdhJVD+zsLrpFO6EBF9oksJ2sXOT6EZd37u9cm9hYvfJksRRBcgG/g1kjlQaujRIwO t2zDnPc5p3MoKcSfPBDN3kIAoJTPfVBrGzJpkcCFOrUFsWc3KYbddyhz97X5cxWlte ATjtjugYHxSuPJ1b57hyJA4y0u32JShaOSo/0GQ8DSfDIkhZ8vPdbfKcqTSD33DC9X XRJZkm3bIPB7g== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=20v2]=20x86/platform:=20Adjust=20temperature=20sensors=20MSRs?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771602828211 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Tu Dinh" Message-Id: <08370f3b8b224493b8e66e8503a2fe0d07b73c33.1771600155.git.teddy.astie@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.e51af2fa70da414fa001341687f854fc?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260220:md Date: Fri, 20 Feb 2026 15:53:49 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Temperature sensors MSR were previously assumed to be available when "DTS" CPUID bit is set. This is not really the case : * MSR_IA32_THERM_STATUS is gated behind ACPI CPUID bit, only DTS-related bits of this MSR are gated behind the DTS CPUID * MSR_PACKAGE_THERM_STATUS is gated behind "PTM" CPUID Also adjust the MSR_TEMPERATURE_TARGET which is not architectural, but stable in practice, and required to be exposed for reliably querying CPU temperature. Fixes: 615c9f3f820 ("x86/platform: Expose DTS sensors MSR") Reported-by: Tu Dinh Signed-off-by: Teddy Astie --- since v1: * use acpi CPUID bit for MSR_IA32_THERM_STATUS * use pkg_therm_mgmt CPUID bit for MSR_PACKAGE_THERM_STATUS * review MSR_TEMPERATURE_TARGET MSR xen/arch/x86/platform_hypercall.c | 19 ++++++++++++++++++- xen/include/xen/lib/x86/cpu-policy.h | 2 +- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index c6c5135806..711427144e 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -89,9 +89,26 @@ static bool msr_read_allowed(unsigned int msr) return cpu_has_srbds_ctrl; case MSR_IA32_THERM_STATUS: + return host_cpu_policy.basic.acpi; + + /* + * This MSR is present on most Intel Core-family CPUs since Nehalem but is not an + * architectural MSR. No CPUID bit enumerates this MSR. + * + * This MSR exposes "temperature target" that is needed to compute the CPU + * temperature. The "temperature target" is a model specific value, and this MSR is + * the only known method of getting the one used for the CPU. On some CPU models with + * Intel SST-PP, the "temperature target" can vary over time. + * + * We assume all Intel CPUs with DTS may support this MSR; but reads can fail in case + * the platform doesn't actually support this MSR. + */ case MSR_TEMPERATURE_TARGET: + return boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + host_cpu_policy.basic.digital_temp_sensor; + case MSR_PACKAGE_THERM_STATUS: - return host_cpu_policy.basic.digital_temp_sensor; + return host_cpu_policy.basic.pkg_therm_mgmt; } if ( ppin_msr && msr == ppin_msr ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index db8d035589..d29e380359 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -132,7 +132,7 @@ struct cpu_policy :1, :1, :1, - :1, + pkg_therm_mgmt:1, hwp:1, hwp_interrupt:1, hwp_activity_window:1, -- 2.53.0 -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237334.1539693 (Exim 4.92) (envelope-from ) id 1vtTDw-0000bH-DI; Fri, 20 Feb 2026 16:19:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237334.1539693; Fri, 20 Feb 2026 16:19:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDw-0000aV-6w; Fri, 20 Feb 2026 16:19:24 +0000 Received: by outflank-mailman (input) for mailman id 1237334; Fri, 20 Feb 2026 16:19:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDv-0000Q4-BO for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:23 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e9a2c0b4-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:21 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-48375f10628so13917745e9.1 for ; Fri, 20 Feb 2026 08:19:21 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:19 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e9a2c0b4-0e77-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604360; x=1772209160; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eK3XS+ZcSRgZlqnrevGqXpYKxcWdI0GkuIch/PQdcy0=; b=NDgta6+CyvbVK2OUY/uGpTIJKsIfX+SQ6LFsR08RQ1ROYz4kzKCm9cQtYggz1+LUt3 wyf3SW0l9gDlvS2Q5Xr499f8ozS9caJMlFxR3llLkxaUFMAIhcT5RjbOodkq6T0YNNqu pC9XlXa/Zl4OXY+IoqKzneTQH9Uc2ER18AkIw+pEwHVpxA2Za95WVHfYBDo/6aTqam1Q R+vZqrdk4CBRWcVvShT9UAPY8+ISZXJTSK7mof5Wsf+hACrsaHrDftXxoQ2JZWNt0MgW bb/KB/cCliqzDmx1Bj5gY77hLTimSNDXedPVZBWrRVLskAHpoFZ3CS91R/SjryoZi0A2 dEQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604360; x=1772209160; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eK3XS+ZcSRgZlqnrevGqXpYKxcWdI0GkuIch/PQdcy0=; b=Kn1cRGLS9By5D7coJfsduro9jVbALWdfw5mozt80nKh/nRvcA21TNGwrMhBQEFTEok Wup5Waml3Qiv5f4bLCT9AHIXWSgzV/gX8ZoQLI9W/WLFeWtiJb9BMALWM2BDTB19tDuA SBKfa5nyBILPWQrghD+r7WP8QN14w93AcjktRnKWtPGDjNoLpXBZpS2I00Ieplz07dPH 0+VNYUwxIsADMmbpr60OEN5OSY1qibJ0FwKq3OGuG0g/Y0pqi2NvOSGmZ8UNwp4Lj24S N9dKQRxAf8xSsk58fHM3F7+rkA8xUexDtwSfEykL30e+YFfYNHYG2pD7mUtjycWiKDxM 7piA== X-Gm-Message-State: AOJu0Yye5ruioPtU0RGqGxo5HFDPSp43McUWfe6x0HjxODAjumZFMyKq 1hDKxJKFYp7bFM0oiCyNYYAl3pfCzFchi5wvl+PplCiktNbDBKJTs3R/AQLJzw== X-Gm-Gg: AZuq6aI4mA+LyZo6lHOE6iDfYxvCBiClDCCsJoxp2XHgbKONuQB/j0zs20khJI6+8Cu MW08ItSrWg6YRI1Js70EZ0RdTe/LV9NHD+SNR5zxzjYft4ItwuK14HCTCpvlFiNEaG/FrfuvATo gDNbTaTikeQZBI6zKhxpXKWOPXYBiq3S2zDhm8KhUMo9kEG0OgecLDazwHUdIeqdeLJOw+kfCe/ jYE8vwEhOT0po7Unxb5iy0pqq6MEmWyRKsRhZJ7+/TMOPXugODahkOxvtAgXp3fezRjxsv33IgS qqf45ooW43PVEF0rGP6WawEhkzeL0HLfLLamnbMmbzE9ZGSiM/hVC6gQMvQZBdFdYuL8wDDVOtV 8yLXKAGyFKxbF1IuJvSLy2JZVRM6fruo2Di3LAX2Z1W18mAZqqxdo+KuZn3HUvLg9UyQbsoJ1Nu 6pD7zaqjx2eN1l6HR6naCrgvrbykyIKyHh0+g3EckaJD+W3aaOiDTwDlkoo5xnm7xQJg== X-Received: by 2002:a05:600c:3e05:b0:477:7f4a:44b4 with SMTP id 5b1f17b1804b1-483a95b3df6mr1673015e9.1.1771604359949; Fri, 20 Feb 2026 08:19:19 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 02/14] xen/riscv: implement vcpu_csr_init() Date: Fri, 20 Feb 2026 17:18:57 +0100 Message-ID: <3d301ac4ca901f0aa471d6c4234301a0199fe5f7.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce vcpu_csr_init() to initialise hypervisor CSRs that control vCPU execution and virtualization behaviour before the vCPU is first scheduled. The function configures trap and interrupt delegation to VS-mode by setting the appropriate bits in the hedeleg and hideleg registers, initializes hstatus so that execution enters VS-mode when control is passed to the guest, and restricts guest access to hardware performance counters by initializing hcounteren, as unrestricted access would require additional handling in Xen. When the Smstateen and SSAIA extensions are available, access to AIA CSRs and IMSIC guest interrupt files is enabled by setting the corresponding bits in hstateen0, avoiding unnecessary traps into Xen (note that SVSLCT(Supervisor Virtual Select) name is used intead of CSRIND as OpenSBI uses such name and riscv_encoding.h is mostly based on it). If the Svpbmt extension is supported, the PBMTE bit is set in henvcfg to allow its use for VS-stage address translation. Guest access to the ENVCFG CSR is also enabled by setting ENVCFG bit in hstateen0, as a guest may need to control certain characteristics of the U-mode (VU-mode when V=1) execution environment. For CSRs that may contain read-only bits (e.g. hedeleg, hideleg, hstateen0), to the written value a correspondent mask is applied to avoid divergence between the software state and the actual CSR contents. As hstatus is not part of struct arch_vcpu (it already resides in struct cpu_user_regs), introduce vcpu_guest_cpu_user_regs() to provide a uniform way to access hstatus and other guest CPU user registers. This establishes a consistent and well-defined initial CSR state for vCPUs prior to their first context switch. Signed-off-by: Oleksii Kurochko --- Changes in v5: - Initialize of hstateen0 with SMSTATEEN0_HSENVCFG when a variable is defined. - Use |= for a code inside if (*_ssaia) case. - Put declaration of the registers hedeleg and hideleg together in arch_vcpu structure as they are typically used together so better chances to be in the same cache line. --- Changes in v4: - Move local variable hstateen0 into narrower scope. - Code style fixes. - Move the call of vcpu_csr_init(v) after if ( is_idle_vcpu() ) check in arcg_vcpu_create(). --- Changes in v3: - Add hypervisor register used to initalize vCPU state. - Apply masks introduced before instead of csr_write()/csr_read() pattern. --- Changes in v2: - As hstatus isn't a part of arch_vcpu structure (as it is already a part of cpu_user_regs) introduce vcpu_guest_cpu_user_regs() to be able to access hstatus and other CPU user regs. - Sort hideleg bit setting by value. Drop a stray blank. - Drop | when the first initialization of hcounteren and hennvcfg happen. - Introduce HEDELEG_DEFAULT. Sort set bits by value and use BIT() macros instead of open-coding it. - Apply pattern csr_write() -> csr_read() for hedeleg and hideleg instead of direct bit setting in v->arch.h{i,e}deleg as it could be that for some reason some bits of hedeleg and hideleg are r/o. The similar patter is used for hstateen0 as some of the bits could be r/o. - Add check that SSAIA is avaialable before setting of SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT bits. - Drop local variables hstatus, hideleg and hedeleg as they aren't used anymore. --- xen/arch/riscv/domain.c | 62 +++++++++++++++++++++ xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/riscv_encoding.h | 2 + 4 files changed, 72 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 8b05f0f23b77..c9494db0fbe7 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -8,6 +8,7 @@ #include #include +#include struct csr_masks { register_t hedeleg; @@ -16,6 +17,21 @@ struct csr_masks { register_t hstateen0; }; +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ + BIT(CAUSE_FETCH_ACCESS, U) | \ + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ + BIT(CAUSE_BREAKPOINT, U) | \ + BIT(CAUSE_MISALIGNED_LOAD, U) | \ + BIT(CAUSE_LOAD_ACCESS, U) | \ + BIT(CAUSE_MISALIGNED_STORE, U) | \ + BIT(CAUSE_STORE_ACCESS, U) | \ + BIT(CAUSE_USER_ECALL, U) | \ + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ + BIT(CAUSE_STORE_PAGE_FAULT, U)) + +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) + static struct csr_masks __ro_after_init csr_masks; void __init init_csr_masks(void) @@ -35,6 +51,50 @@ void __init init_csr_masks(void) INIT_CSR_MASK(HSTATEEN0, hstateen0); } +static void vcpu_csr_init(struct vcpu *v) +{ + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; + + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; + + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; + + /* + * VS should access only the time counter directly. + * Everything else should trap. + */ + v->arch.hcounteren = HCOUNTEREN_TM; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + /* Allow guest to access CSR_SENVCFG */ + register_t hstateen0 = SMSTATEEN0_HSENVCFG; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + /* + * If the hypervisor extension is implemented, the same three + * bits are defined also in hypervisor CSR hstateen0 but concern + * only the state potentially accessible to a virtual machine + * executing in privilege modes VS and VU: + * bit 60 CSRs siselect and sireg (really vsiselect and + * vsireg) + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really + * vsiph, vsieh, and vstopi) + * bit 58 all state of IMSIC guest interrupt files, including + * CSR stopei (really vstopei) + * If one of these bits is zero in hstateen0, and the same bit is + * one in mstateen0, then an attempt to access the corresponding + * state from VS or VU-mode raises a virtual instruction exception. + */ + hstateen0 |= SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; + + v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0; + } +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); @@ -57,6 +117,8 @@ int arch_vcpu_create(struct vcpu *v) if ( is_idle_vcpu(v) ) return 0; + vcpu_csr_init(v); + /* * As the vtimer and interrupt controller (IC) are not yet implemented, * return an error. diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 58c9f1506b7c..5fbee8182caa 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -48,6 +48,8 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_cpu_current(cpu) per_cpu(curr_vcpu, cpu) #define guest_cpu_user_regs() ({ BUG_ON("unimplemented"); NULL; }) +#define vcpu_guest_cpu_user_regs(vcpu) \ + (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) #define switch_stack_and_jump(stack, fn) do { \ asm volatile ( \ diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 5aec627a7adb..17be792afe7d 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -49,6 +49,12 @@ struct arch_vcpu { struct cpu_info *cpu_info; + register_t hcounteren; + register_t hedeleg; + register_t hideleg; + register_t henvcfg; + register_t hstateen0; + register_t vsatp; }; diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 1f7e612366f8..dd15731a86fa 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -228,6 +228,8 @@ #define ENVCFG_CBIE_INV _UL(0x3) #define ENVCFG_FIOM _UL(0x1) +#define HCOUNTEREN_TM BIT(1, U) + /* ===== User-level CSRs ===== */ /* User Trap Setup (N-extension) */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237333.1539685 (Exim 4.92) (envelope-from ) id 1vtTDw-0000Sw-0I; Fri, 20 Feb 2026 16:19:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237333.1539685; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:18 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e8b2aab6-0e77-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604359; x=1772209159; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VGHRmL2iWDUaQ6x5sen7QQ6MZAJ2q1tuNN96Ty+TTdE=; b=ZQLrgv8eFLYDpJg95KnrAGIIavZTmeLkRnxv06MDoVAzytzIjfz9He51eiBQBZPA/+ sW6KJO9Ej/pkMXWYJA7xDt0DtgVxx8vJ0ZIsIKfpqqNKaUIbZ2LccySj3sZZH5UITa7V YvqVT07i9gBRMAdLzD5KPrwa6TEOm0bmfHPa4ZsEgz14RjsoeHASsbMflfs0jwHbfwJP 4uYYctL4sS/u8g+Tf4cdBIFQqCJ7AqT9J6ypk9P/MR3w5WB47GFX4jcQ4cGgWve9XGc3 tRjawvmvPmWL7W2qXTuWNKT+WLmUBZmYHbKfxXRHCX74bxBuqcizNtSFhlbvFJhyFVe3 jngA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604359; x=1772209159; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=VGHRmL2iWDUaQ6x5sen7QQ6MZAJ2q1tuNN96Ty+TTdE=; b=Bwoh3DQ2B2ZCGboU76Mr25XXZdOke4rQ2eTzcFNbuHVjXDbBA0gqoU5JeWbVy0evtd taig8jAVlSw96ml3XmNUhV8OB0F3241jCeeObcQ0cEGRkhUj/opYyw2WSpW2jCuIbJnt EVgK252e1N1qpudxwgc5qfIT67V7RH61hlrnwyy5o1YZdPOojaNS9IqLqKcdCPaiK88s LSLZ8AqYVJF0qj/tv9CUevIlSe0hw2sT+9xQ2Fc/DhiAM9SJltIZShttuCQHZfgm6Vng fF+KpJqpTVudZKKk7LjOK12RHLXFeHMKVKhmgMsmPqP0VFsOaFLhzY2uAlLW26IWKdN8 L+6g== X-Gm-Message-State: AOJu0YyQrFhcZoAnSBuH8sspuEHAzUmKvFeqJD4Q4JPecDpqEQy3AAog ssHTBs8+IKljHgNYzYal9BlQmK6jjIUyIJQykuav6ebpPLDV9x2kieICfZ3JzQ== X-Gm-Gg: AZuq6aIpCwDzsomnfPtG/qmgUgtGeWIiplgi50mrmbN/GUOnAnw8wmZ1O8JsZZ3XaP5 2WaLP3Gfav3111EEgdWBTjDL4jtcARcJ7EU9jKNFBQm9LQuKMNR0nkMbhP9u0orTr9Y6GUFwgQp IvE83iK/P8braeEC8WRvqua0fwyW6mDqyVxG7ld07bu3YbKbaS8KdQRRK42dqidRZ/Ub7Zes5sF v3pFaA47OUVpeME4b+ejjO1ak1Z/LkRLCaji5jSLoc8+IuFYTIKWexJTHAkDKSpV+ePtaVwiVfd k+lvLg/XsvVER92TB1EatL1edCTO3eUsxkGddPLvbToSLrxbBRbDlg4acy1ZCsCvS8bNnD6A9HY BrKIOuwJsEjEauCVfpXRrOi/vcgz4nelcrma5h3YMZwkMYkaL7Adm2TdLP+lomt7MN/ljcBECt9 u+IdckcDy/sE7zSf79qsB8x7vWSXWUNzzv1gmZ8IiYR6C5zdwcg6nGXss23cTZ+czD2A== X-Received: by 2002:a05:6000:26cd:b0:436:369f:39f9 with SMTP id ffacd0b85a97d-4396f1a70b5mr756546f8f.57.1771604358526; Fri, 20 Feb 2026 08:19:18 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot Date: Fri, 20 Feb 2026 17:18:56 +0100 Message-ID: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Some hypervisor CSRs expose optional functionality and may not implement all architectural bits. Writing unsupported bits can either be ignored or raise an exception depending on the platform. Detect the set of writable bits for selected hypervisor CSRs at boot and store the resulting masks for later use. This allows safely programming these CSRs during vCPU context switching and avoids relying on hardcoded architectural assumptions. Note that csr_set() is used instead of csr_write() to write all ones to the mask, as the CSRRS instruction, according to the RISC-V specification, sets only those bits that are writable (note that the quote consider only non-read-only CSRs as writing to read-only CSRs according to the spec. will raise an exception): Any bit that is high in rs1 will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. In contrast, the CSRRW instruction does not take CSR bit writability into account, which could lead to unintended side effects when writing all ones to a CSR. Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, hstateen0 registers as only them are going to be used in the follow up patch. If the Smstateen extension is not implemented, hstateen0 cannot be read because the register is considered non-existent. Instructions that attempt to access a CSR that is not implemented or not visible in the current mode are reserved and will raise an illegal-instruction exception. Signed-off-by: Oleksii Kurochko --- Changes in V5: - Move everything related to csr_masks to domain.c and make it static. - Move declaration of old variable in init_csr_masks() inside INIT_CSR_MASK. - Use csr_swap() in INIT_CSR_MASK(). --- Changes in V4: - Move csr_masks defintion to domain.c. Make it static as at the moment it is going to be used only in domain.c. - Rename and refactor X macros inside init_csr_masks(). --- Changes in V3: - New patch. --- xen/arch/riscv/domain.c | 30 ++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/setup.h | 2 ++ xen/arch/riscv/setup.c | 2 ++ 3 files changed, 34 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index b60320b90def..8b05f0f23b77 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -2,9 +2,39 @@ #include #include +#include #include #include +#include +#include + +struct csr_masks { + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; +}; + +static struct csr_masks __ro_after_init csr_masks; + +void __init init_csr_masks(void) +{ +#define INIT_CSR_MASK(csr, field) do { \ + register_t old; \ + old = csr_read(CSR_##csr); \ + csr_set(CSR_##csr, ULONG_MAX); \ + csr_masks.field = csr_swap(CSR_##csr, old); \ +} while (0) + + INIT_CSR_MASK(HEDELEG, hedeleg); + INIT_CSR_MASK(HENVCFG, henvcfg); + INIT_CSR_MASK(HIDELEG, hideleg); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + INIT_CSR_MASK(HSTATEEN0, hstateen0); +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index c9d69cdf5166..2215894cfbb1 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -11,6 +11,8 @@ void setup_mm(void); void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); +void init_csr_masks(void); + #endif /* ASM__RISCV__SETUP_H */ /* diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9b4835960d20..bca6ca09eddd 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -137,6 +137,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, riscv_fill_hwcap(); + init_csr_masks(); + preinit_xen_time(); intc_preinit(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237332.1539679 (Exim 4.92) (envelope-from ) id 1vtTDv-0000QS-Oy; Fri, 20 Feb 2026 16:19:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237332.1539679; Fri, 20 Feb 2026 16:19:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDv-0000QL-JY; Fri, 20 Feb 2026 16:19:23 +0000 Received: by outflank-mailman (input) for mailman id 1237332; Fri, 20 Feb 2026 16:19:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDt-0000Q4-OT for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:21 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e80a2bcf-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:18 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-48378136adcso13904785e9.1 for ; Fri, 20 Feb 2026 08:19:18 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Since the SSTC extension is not supported by Xen, an emulated (SBI-based) timer is required. To address this, a virtual timer built on Xen’s timer infrastructure is introduced, with save/restore support and SBI-based programming. To provide full guest software–based timer support, the following components are also introduced: - arch_vcpu_{create,destroy}() to initialize the virtual timer and other vCPU-related state not directly tied to timer functionality. As part of this work, struct arch_vcpu is introduced to describe the internal state of a virtual CPU, along with vcpu_csr_init() to initialize the relevant CSR state. - Support functions required by the virtual timer, including: - vcpu_kick(), and a stub implementation of smp_send_event_check_mask() (since SMP is not yet supported in Xen), which is used by vcpu_kick(). - Support for guest timer programming via interception of the SBI legacy SET_TIMER call from guest. - Implement reprogram_timer() using introduced sbi_set_timer(). - Initial lockless tracking of pending vCPU interrupts using atomic bitmaps. - Handling of hypervisor timer interrupts and dispatch into Xen’s generic timer softirq. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2339388491 --- Changes in v5: - Merged to upstream/staging: xen/riscv: implement arch_vcpu_{create,destroy}() xen/riscv: build setup code as .init - Rebase this patch series on top of: https://lore.kernel.org/xen-devel/5756356294dc066d835269334d0f3347fe24cec4.1771504676.git.oleksii.kurochko@gmail.com/T/#u There is no logical dependency, only the potential merge conflict question. - Address comments from ML. --- Changes in v4: - Merged to upstream/staging: xen/riscv: avoid reading hstateen0 when Smstateen is not implemented - Address other comments from ML. --- Changes in v3: - Squash patch "xen/riscv: introduce struct arch_vcpu" into other patches of the patch series. - Merged to staging: - xen/riscv: implement stub for smp_send_event_check_mask() - Address other comments from ML. --- Changes in v2: - Add consumer part of tracking of pending vCPU interrupts. - Split patch "xen/riscv: init tasklet subsystem" to two. - Patches were acked: - xen/riscv: introduce vcpu_kick() implementation - xen/riscv: implement SBI legacy SET_TIMER support for guests - All other changes are patch-specific. Please check them. --- Oleksii Kurochko (14): xen/riscv: detect and store supported hypervisor CSR bits at boot xen/riscv: implement vcpu_csr_init() xen/riscv: introduce tracking of pending vCPU interrupts, part 1 xen/riscv: introduce tracking of pending vCPU interrupts, part 2 xen/time: move ticks<->ns helpers to common code xen/riscv: introduce basic vtimer infrastructure for guests xen/riscv: introduce vcpu_kick() implementation xen/riscv: add vtimer context switch helpers xen/riscv: implement SBI legacy SET_TIMER support for guests xen/riscv: introduce sbi_set_timer() xen/riscv: implement reprogram_timer() via SBI xen/riscv: handle hypervisor timer interrupts xen/riscv: init tasklet subsystem xen/riscv: implement sync_vcpu_execstate() xen/arch/arm/include/asm/time.h | 3 - xen/arch/arm/time.c | 11 - xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 231 +++++++++++++++++++- xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 33 +++ xen/arch/riscv/include/asm/perfc_defn.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/include/asm/sbi.h | 22 ++ xen/arch/riscv/include/asm/setup.h | 2 + xen/arch/riscv/include/asm/time.h | 5 - xen/arch/riscv/include/asm/vtimer.h | 20 ++ xen/arch/riscv/sbi.c | 40 +++- xen/arch/riscv/setup.c | 5 + xen/arch/riscv/stubs.c | 20 -- xen/arch/riscv/time.c | 44 ++++ xen/arch/riscv/traps.c | 20 ++ xen/arch/riscv/vsbi/legacy-extension.c | 6 + xen/arch/riscv/vtimer.c | 86 ++++++++ xen/include/xen/time.h | 11 + 22 files changed, 526 insertions(+), 44 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237337.1539724 (Exim 4.92) (envelope-from ) id 1vtTDz-0001My-3K; Fri, 20 Feb 2026 16:19:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237337.1539724; Fri, 20 Feb 2026 16:19:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDy-0001M4-SW; Fri, 20 Feb 2026 16:19:26 +0000 Received: by outflank-mailman (input) for mailman id 1237337; Fri, 20 Feb 2026 16:19:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDx-0000QF-C1 for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:25 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id eb99eeb8-0e77-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 17:19:24 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-43626796202so2065397f8f.3 for ; Fri, 20 Feb 2026 08:19:24 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:23 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: eb99eeb8-0e77-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604363; x=1772209163; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h8rDhEwL+Si1TVzLRrIFs43T5seQJmCokC0zj36jVKw=; b=Mltsu189idcgA+MU02SEnGj3vyjtiWKRvclUcij6eoSzIwMucd0oORU1UHNGSjCFnV V6x/O0eNZ59jw4GOIz3Es3tXsJejF+78WzwGZ7qaSw468uVeFeYrEerCaLtWsAy127pA B1WGFGQECanCs01n5luu+HpbHzpKHwAyi079P6BzWH9GDpPMY8r3AdNoAsdWpNTBEYaF ppaje8orhrOvgGWl+ZCbL38g/8OJzzPMHGsFJvORjfWYiP3NNa3l+cOJxCdO4OzkI7DK qMz8Mjh8OAUubUObV2rVmrtYcF9vCyxTUy38c930o5zLCbRGYxpg+Ti0B0dohyey3MnT z9Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604363; x=1772209163; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=h8rDhEwL+Si1TVzLRrIFs43T5seQJmCokC0zj36jVKw=; b=b7fcRwNRR+pxGhaVqPlax3e+rzavO9yD4oq970JrwTnnhzHo0YuNJVklxy8RvYt68t yS3UepytCWF8uyVnz9Qrg1mi7XJl5NuuyZBzm0gj7Piv0RzuFO/rSLhCMlXUEiH8TSeN rqLZK0Jp0RulrwAzONA62A3CE92VzFO5hUO+1rmDeu2QMTCYlXHCvmOpHbFWTy0Lus5B DkAfl0gmmkactOx8p9oAGn5oLJFBG034LjA8iXG4jPSBq7ndewAB2P4v2VWNaNoGFzgy /5ipYKIpqc0k6lx4L0tK613TC93UPSOuNX0EM+q0MkYHmljmmHQdoctjyDv4MSCaGKA4 Bd9Q== X-Gm-Message-State: AOJu0YwigyabrzhwfbLnOdwSSQ4i0xcXmGZbWqPyNB5Enw9ejkovXUOs 2UmTA/aIu7ZBahRcvKplUQY44YzWag7bN5uQdbzKUULpeP2E6g3Rzi6XcMf96w== X-Gm-Gg: AZuq6aLUefhGKddeaHsjadW6KuJYdrfasjaIywX6HH79VfIghI50T1E+KE4ibNCS3Ch a1MA9aN1FCZ6bkYw6BToGwk2CnA8wRWJI1WbYgPHf++ytM6tq26gHd2BEF93el1ReEVnBMx6v+s xDI+irNvMksIA/ua0tOt3DenK88HuovPzbpTKMIjwhjS/j4Emx/bCL4+mnO1sAJnIVXvdWHFwZ3 1f3kd1zidyg/atoT/eHgIuVLjZRrHkIeXP2ZnmwbiLlk6Atzw63zu11zIK0VDGXUyaXJ94Wks/v QxzNWrAlGl5+q4dJ7RuJD/Tyi46ARS0AA84/Rn6JOzzo7CSJ2rd+UyDDKti6ZaBkLAHMJqfd/zm GCrejBBRlGf0euoZ14GSEI1hoL4h8NC41QcBUAwSrKj4pM94uDFB+S0axNJzupjufJkSDPp6oY6 Vz03z7YlZ5OKLOgTttLmkSuEDkEumDsElrHtn/UXEc91wjk1OKkulPj3rNf8eP4y3hwGninw== X-Received: by 2002:a05:6000:40dc:b0:437:7268:8e1e with SMTP id ffacd0b85a97d-4396f181294mr829953f8f.51.1771604363451; Fri, 20 Feb 2026 08:19:23 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Connor Davis Subject: [PATCH v5 05/14] xen/time: move ticks<->ns helpers to common code Date: Fri, 20 Feb 2026 17:19:00 +0100 Message-ID: <83299215f631fced495d25d0b11ea5449cf9d6d1.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ticks_to_ns() and ns_to_ticks() are not architecture-specific, so provide a common implementation that is more resilient to overflow than the historical Arm version. This is not a practical issue for Arm, as the latest ARM ARM that timer frequency should be fixed at 1 GHz and older platforms used much lower rates, which is shy of 32-bit overflow. As the helpers are declared as static inline, they should not affect x86, which does not use them. On Arm, these helpers were historically implemented as out-of-line functions because the counter frequency was originally defined as static and unavailable to headers [1]. Later changes [2] removed this restriction, but the helpers remained unchanged. Now they can be implemented as static inline without any issues. Centralising the helpers avoids duplication and removes subtle differences between architectures while keeping the implementation simple. Drop redundant includes where already pulls it in. No functional change is intended. [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and XEN_SYSCTL_topologyinfo to common code Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - Add Reviewed-by: Jan Beulich . --- Changes in v2: - Move ns_to_ticks() and ticks_to_ns() to common code. --- xen/arch/arm/include/asm/time.h | 3 --- xen/arch/arm/time.c | 11 ----------- xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/include/asm/time.h | 5 ----- xen/arch/riscv/time.c | 1 + xen/include/xen/time.h | 11 +++++++++++ 6 files changed, 13 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index 49ad8c1a6d47..c194dbb9f52d 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -101,9 +101,6 @@ extern void init_timer_interrupt(void); /* Counter value at boot time */ extern uint64_t boot_count; -extern s_time_t ticks_to_ns(uint64_t ticks); -extern uint64_t ns_to_ticks(s_time_t ns); - void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index cc3fcf47b66a..a12912a106a0 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -27,7 +27,6 @@ #include #include #include -#include #include uint64_t __read_mostly boot_count; @@ -47,16 +46,6 @@ unsigned int timer_get_irq(enum timer_ppi ppi) return timer_irq[ppi]; } -/*static inline*/ s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz); -} - -/*static inline*/ uint64_t ns_to_ticks(s_time_t ns) -{ - return muldiv64(ns, 1000 * cpu_khz, SECONDS(1)); -} - static __initdata struct dt_device_node *timer; #ifdef CONFIG_ACPI diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index d2124b175521..2e85ff2b6e62 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -12,13 +12,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h index 1e7801e2ea0e..be3875b9984e 100644 --- a/xen/arch/riscv/include/asm/time.h +++ b/xen/arch/riscv/include/asm/time.h @@ -24,11 +24,6 @@ static inline cycles_t get_cycles(void) return csr_read(CSR_TIME); } -static inline s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, MILLISECS(1), cpu_khz); -} - void preinit_xen_time(void); #endif /* ASM__RISCV__TIME_H */ diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index e962f8518d78..2c7af0a5d63b 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -4,6 +4,7 @@ #include #include #include +#include #include unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index fe0d7a578a99..2185dd26a439 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -8,6 +8,7 @@ #ifndef __XEN_TIME_H__ #define __XEN_TIME_H__ +#include #include #include @@ -75,6 +76,16 @@ extern void send_timer_event(struct vcpu *v); void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds); +static inline s_time_t ticks_to_ns(uint64_t ticks) +{ + return muldiv64(ticks, MILLISECS(1), cpu_khz); +} + +static inline uint64_t ns_to_ticks(s_time_t ns) +{ + return muldiv64(ns, cpu_khz, MILLISECS(1)); +} + #include #endif /* __XEN_TIME_H__ */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237336.1539719 (Exim 4.92) (envelope-from ) id 1vtTDy-0001K0-PE; Fri, 20 Feb 2026 16:19:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237336.1539719; Fri, 20 Feb 2026 16:19:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDy-0001Jq-Lb; Fri, 20 Feb 2026 16:19:26 +0000 Received: by outflank-mailman (input) for mailman id 1237336; Fri, 20 Feb 2026 16:19:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDw-0000Q4-SQ for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:24 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id eaea89bd-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:23 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-48370174e18so13579565e9.2 for ; Fri, 20 Feb 2026 08:19:23 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Add the consumer side (vcpu_flush_interrupts()) of the lockless pending interrupt tracking introduced in part 1 (for producers). According, to the design only one consumer is possible, and it is vCPU itself. vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due to the lack of functionality) before the hypervisor returns control to the guest. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg() (with aquire semantics). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. The worst thing which could happen with such approach is that a new pending bit will be set to irqs_pending bitmap during update of hvip variable in vcpu_flush_interrupt() but it isn't problem as the new pending bit won't be lost and just be proceded during the next flush. As AIA specs introduced hviph register which would want to be updated when guest related AIA code vcpu_update_hvip() is introduced instead of just open-code it in vcpu_flush_interrupts(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Reorder the defintions of local variables (mask, val, hvip) in vcpu_flush_interrupts(). Also, drop a blank line between them. - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_flush_interrupts() and align the comment properly. - Add Acked-by: Jan Beulich . --- Changes in v4: - Move defintion of hvip local variable to narrower space in vcpu_flush_interrupts(). - Use initializers for mask and val variables. - Use local variable c as an argument of vcpu_flush_interrupts() in check_for_pcpu_work(). --- Changes in v3: - Update the error message in case of RV32 from "hviph" to v->arch.hviph. - Make const argument of vcpu_update_hvip. - Move local variables mask and val inside if() in vcpu_flush_interrupts(). - Call vcpu_flush_interrupts() in check_pcpu_work(). - Move vcpu_update_hvip() inside if() in vcpu_flush_interrupts(). --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 30 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/traps.c | 2 ++ 3 files changed, 33 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 335c41f3e5a1..636349c8c7e8 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -215,6 +215,36 @@ void vcpu_sync_interrupts(struct vcpu *v) #endif } +static void vcpu_update_hvip(const struct vcpu *v) +{ + csr_write(CSR_HVIP, v->arch.hvip); +} + +void vcpu_flush_interrupts(struct vcpu *v) +{ + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) + { + unsigned long mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); + unsigned long val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; + register_t *hvip = &v->arch.hvip; + + *hvip &= ~mask; + *hvip |= val; + + vcpu_update_hvip(v); + } + +#ifdef CONFIG_RISCV_32 + /* + * Flush AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't + * supported now. + */ +# error "Update v->arch.hviph" +#endif +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index b7241f2a79b1..2a454bfc083c 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -116,6 +116,7 @@ int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); void vcpu_sync_interrupts(struct vcpu *v); +void vcpu_flush_interrupts(struct vcpu *v); #endif /* ASM__RISCV__DOMAIN_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 551f886e3a69..244264c92a79 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -175,6 +175,8 @@ static void check_for_pcpu_work(void) vcpu_sync_interrupts(curr); + vcpu_flush_interrupts(curr); + p2m_handle_vmenter(); } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237338.1539733 (Exim 4.92) (envelope-from ) id 1vtTDz-0001Uz-Nw; Fri, 20 Feb 2026 16:19:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237338.1539733; Fri, 20 Feb 2026 16:19:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDz-0001Tw-CC; Fri, 20 Feb 2026 16:19:27 +0000 Received: by outflank-mailman (input) for mailman id 1237338; Fri, 20 Feb 2026 16:19:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDy-0000QF-8g for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:26 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ec58b540-0e77-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 17:19:25 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-48379a42f76so17969715e9.0 for ; Fri, 20 Feb 2026 08:19:25 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The virtual timer is programmed in response to the guest SBI sbi_set_timer() call and injects a virtual supervisor timer interrupt into the vCPU when it expires. While a dedicated struct vtimer is not strictly required at present, it is expected to become necessary once SSTC support is introduced. In particular, it will need to carry additional state such as whether SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) to be saved and restored across context switches, and time delta state (e.g. HTIMEDELTA) required for use cases such as migration. Introducing struct vtimer now avoids a later refactoring. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Drop copyright line from asm/vtimer.h. - Add Acked-by: Jan Beulich . --- Changes in v4: - Add vcpu_timer_destroy() to void arch_vcpu_destroy(). --- Changes in v3: - use one container_of() to get vcpu instead of two container_of()s. --- Changes in v2: - Drop domain_vtimer_init() as it does nothing. - Drop "struct vcpu *v;" from struct vtimer as it could be taken from arch_vcpu using container_of(). - Drop vtimer_initialized, use t->status == TIMER_STATUS_invalid instead to understand if timer was or wasn't initialized. - Drop inclusion of xen/domain.h as xen/sched.h already includes it. - s/ xen/time.h/ xen.timer.h in vtimer.c. - Drop ULL in if-conidtion in vtimer_set_timer() as with the cast it isn't necessary to have suffix ULL. - Add migrate timer to vtimer_set_timer() to be sure that vtimer will occur on pCPU it was ran, so the signalling to that vCPU will (commonly) be cheaper. - Check if the timeout has already expired and just inject the event in vtimer_vtimer_set_timer(). - Drop const for ticks argument of vtimer_set_timer(). - Merge two patches to one: - xen/riscv: introduce vtimer - xen/riscv: introduce vtimer_set_timer() and vtimer_expired() --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 10 +++- xen/arch/riscv/include/asm/domain.h | 3 ++ xen/arch/riscv/include/asm/vtimer.h | 17 +++++++ xen/arch/riscv/vtimer.c | 71 +++++++++++++++++++++++++++++ 5 files changed, 100 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index bc47e83b26d7..ffbd7062e214 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,6 +22,7 @@ obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ +obj-y += vtimer.o $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 636349c8c7e8..7027b5e9aa20 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -10,6 +10,7 @@ #include #include #include +#include struct csr_masks { register_t hedeleg; @@ -120,11 +121,14 @@ int arch_vcpu_create(struct vcpu *v) vcpu_csr_init(v); + if ( (rc = vcpu_vtimer_init(v)) ) + goto fail; + /* - * As the vtimer and interrupt controller (IC) are not yet implemented, + * As interrupt controller (IC) is not yet implemented, * return an error. * - * TODO: Drop this once the vtimer and IC are implemented. + * TODO: Drop this once IC is implemented. */ rc = -EOPNOTSUPP; goto fail; @@ -138,6 +142,8 @@ int arch_vcpu_create(struct vcpu *v) void arch_vcpu_destroy(struct vcpu *v) { + vcpu_timer_destroy(v); + vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 2a454bfc083c..a30ee450b36a 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -8,6 +8,7 @@ #include #include +#include struct vcpu_vmid { uint64_t generation; @@ -49,6 +50,8 @@ struct arch_vcpu { struct cpu_info *cpu_info; + struct vtimer vtimer; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h new file mode 100644 index 000000000000..111863610a92 --- /dev/null +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM__RISCV__VTIMER_H +#define ASM__RISCV__VTIMER_H + +#include + +struct vtimer { + struct timer timer; +}; + +int vcpu_vtimer_init(struct vcpu *v); +void vcpu_timer_destroy(struct vcpu *v); + +void vtimer_set_timer(struct vtimer *t, uint64_t ticks); + +#endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c new file mode 100644 index 000000000000..32d142bcdfcd --- /dev/null +++ b/xen/arch/riscv/vtimer.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include + +static void vtimer_expired(void *data) +{ + struct vtimer *t = data; + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + + vcpu_set_interrupt(v, IRQ_VS_TIMER); +} + +int vcpu_vtimer_init(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + init_timer(&t->timer, vtimer_expired, t, v->processor); + + return 0; +} + +void vcpu_timer_destroy(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + if ( t->timer.status == TIMER_STATUS_invalid ) + return; + + kill_timer(&v->arch.vtimer.timer); +} + +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) +{ + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + s_time_t expires = ticks_to_ns(ticks - boot_clock_cycles); + + vcpu_unset_interrupt(v, IRQ_VS_TIMER); + + /* + * According to the RISC-V sbi spec: + * If the supervisor wishes to clear the timer interrupt without + * scheduling the next timer event, it can either request a timer + * interrupt infinitely far into the future (i.e., (uint64_t)-1), + * or it can instead mask the timer interrupt by clearing sie.STIE CSR + * bit. + */ + if ( ticks == ((uint64_t)~0) ) + { + stop_timer(&t->timer); + + return; + } + + if ( expires < NOW() ) + { + /* + * Simplify the logic if the timeout has already expired and just + * inject the event. + */ + stop_timer(&t->timer); + vcpu_set_interrupt(v, IRQ_VS_TIMER); + + return; + } + + migrate_timer(&t->timer, smp_processor_id()); + set_timer(&t->timer, expires); +} -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237335.1539710 (Exim 4.92) (envelope-from ) id 1vtTDx-000145-K3; Fri, 20 Feb 2026 16:19:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237335.1539710; Fri, 20 Feb 2026 16:19:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDx-00013H-ET; Fri, 20 Feb 2026 16:19:25 +0000 Received: by outflank-mailman (input) for mailman id 1237335; Fri, 20 Feb 2026 16:19:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDv-0000QF-Gh for xen-devel@lists.xenproject.org; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:20 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ea46f877-0e77-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604361; x=1772209161; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wQxS5vKkI4AgCcQGHJP5Zmtdr2xZpVQrWww/XfYYZbE=; b=KUaHzIJwqWeNJK8m3t7a45AB7J41Bg5L91JEkQrRYDN3GLtfgv+j7Se4Tq8NbaDWGJ NxywdHRwXmwjE8OvTCENGXSgfIlxcoLLOFcXHvCsDDHVW9a07SOnCZ6q6NpaX5Ac3iq/ pclZsrJ9aIu95lbwUWtpTUF3I7zjRs824hUVxz2z6zDI2g2yqlK3FJb2apJQeoswtyTc SIchrff04PMMysxIew/RKSDAfYmMUMYbtsYa6Tz+zwAYOXg63lHICyP6qdXbullleCSm QpZE7PmrglLdfT5NX7YcbMPkvPIFvOhONiayadqVyUWRwkKqJDXP3bNBlgHrzjWqkx8l k6zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604361; x=1772209161; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=wQxS5vKkI4AgCcQGHJP5Zmtdr2xZpVQrWww/XfYYZbE=; b=rVpcYHrBdKBdtToznXK1dYfmQsI36jxAwuFg2FxsMad2VlcL84ZvVQn8KpPRYuBxmg 0UsiWQo96G/qOYXmCKzBbAZ7wCegMVD3xFWOPqEEysF+f4uY/bdwyhDZCQoz1XD4T56W a1mBpzX9XAagoaK/rdespNIKEp/vXthIs9Cx6cxpFmj4VB0/R+waD6G7pQi2H5Akuw2F awFDj1Q9Cdg/3hdLXzEHEcO4vtL5NOMQDBshjt1fQV+i7RFNWPGNaJUOSeHhIqfH9Fdc +Eh3qX7hH+7gvoC5FNZZPeOgtIRTupLLasXw/xunMYAGBrETwdmbQoyQhWrH3feKF/8c Qbew== X-Gm-Message-State: AOJu0YwXXE4TuqBx7v/8EV5Vb+W3+PlD5IYolD/71p9+ggvOuRNKXi7/ ZkBQ6VqzNOqwYd/OVyQhvdI2MDuk9OwwLJb/KFdt1LofCsLS/OT/xT3/jYZofw== X-Gm-Gg: AZuq6aJd7NiPmIs+g9W0zZp25sj0RlDFVXBpZh4NHQkr1EZiW5dUmTPudK14fjg+WyT w+BpxfxC2WZK6pcvmTdHVBLGXRfnA9kIPVUQVqiIf0IoW2nrkEY5TLgxmuEirunObfEcbmF0Akd pZ8/SwkSEpy+lzuzpLk4kTw1QqH4CLf1gLafthcS4hK8IzHaZnDdZYG8BbnO+N7vF7oJKAiJ19f wDgmoZTlz/o7x+y78R8EFbGvIFc1PPzwj86BFmiQgbMcO7AXFLicJ1aS0Uq5EVLqbh9C16qAC90 maP166FoxoSv3/evIZWIQ5VYdcrtyg/Dk5D7levlhD/GOMfFciZbjYFH+sGpwYZiQdU2Q3thowg /2h1OoK3e8IyQk3xlTMvOefr5Em12aMlLD387Kgoke51ez8jh58PfUmpfPB4o6y4V7ZDDO0N3oA 2rVO1KSn1Vka3r5Jt0vjvnRcs4uiIZ0XGm/FXiOq6gQmxs1/A7W6qDiKXM27HPnpH1lk1wBJCBm B40jrqO X-Received: by 2002:a05:6000:1aca:b0:436:3707:2be5 with SMTP id ffacd0b85a97d-4396f166a38mr820160f8f.15.1771604361146; Fri, 20 Feb 2026 08:19:21 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 03/14] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 Date: Fri, 20 Feb 2026 17:18:58 +0100 Message-ID: <8c2259991754f219ba030606f39d629eb365b01c.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on Linux kernel v6.16.0. Note that smp_wmb() is used instead of smp_mb__before_atomic() as what we want to guarantee that if a bit in irqs_pending_mask is obversable that the correspondent bit in irqs_pending is observable too. Add lockless tracking of pending vCPU interrupts using atomic bitops. Two bitmaps are introduced: - irqs_pending — interrupts currently pending for the vCPU - irqs_pending_mask — bits that have changed in irqs_pending The design follows a multi-producer, single-consumer model, where the consumer is the vCPU itself. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg(). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. On RISC-V interrupts are not injected via guest registers, so pending interrupts must be recorded in irqs_pending (using the new vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating HVIP before returning control to the guest. The consumer side is implemented in a follow-up patch. A barrier between updating irqs_pending and setting the corresponding mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees that if the consumer observes a mask bit set, the corresponding pending bit is also visible. This prevents missed interrupts during the flush. It is possible that a guest could have pending bit in the hardware register without being marked pending in irq_pending bitmap as: According to the RISC-V ISA specification: Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and interrupt-enable bits for VS-level software interrupts. VSSIP in hip is an alias (writable) of the same bit in hvip. Additionally: When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and hie.VSSIE. This means the guest may modify vsip.SSIP, which implicitly updates hip.VSSIP and the bit being written with 1 would also trigger an interrupt as according to the RISC-V spec: These conditions for an interrupt trap to occur must be evaluated in a bounded amount of time from when an interrupt becomes, or ceases to be, pending in sip, and must also be evaluated immediately following the execution of an SRET instruction or an explicit write to a CSR on which these interrupt trap conditions expressly depend (including sip, sie and sstatus). What means that IRQ_VS_SOFT must be synchronized separately, what is done in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as PMU isn't supported now. For the remaining VS-level interrupt types (IRQ_VS_TIMER and IRQ_VS_EXT), the specification states they cannot be modified by the guest and are read-only because of: Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable bits for VS-level external interrupts. VSEIP is read-only in hip, and is the logical-OR of these interrupt sources: • bit VSEIP of hvip; • the bit of hgeip selected by hstatus.VGEIN; and • any other platform-specific external interrupt signal directed to VS-level. Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the logical-OR of hvip.VSTIP and any other platform-specific timer interrupt signal directed to VS-level. and When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. and also, Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable bits for supervisor-level external interrupts. If implemented, SEIP is read-only in sip, and is set and cleared by the execution environment, typically through a platform-specific interrupt controller. Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable bits for supervisor-level timer interrupts. If implemented, STIP is read-only in sip, and is set and cleared by the execution environment Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() and vcpu_unset_interrupt(), and flush them during the call of vcpu_flush_interrupts() (which is introduced in follow up patch). vcpu_sync_interrupts(), which is called just before entering the VM, slightly bends the rule that the irqs_pending bit must be written first, followed by updating the corresponding bit in irqs_pending_mask. However, it still respects the core guarantee that the producer never clears the mask and only writes to irqs_pending if it is the one that flipped the corresponding mask bit from 0 to 1. Moreover, since the consumer won't run concurrently because vcpu_sync_interrupts() and the consumer path are going to be invoked sequentially immediately before VM entry, it is safe to slightly relax this ordering rule in vcpu_sync_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v5: - Update the commit message(). - Rename c to curr. - Update vcpu_set_interrupt() to use test_and_set_bit() for irqs_pending bitmask too. - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_sync_interrupts(). --- Changes in v4: - Update the commit message. - Update the comments in vcpu_(un)set_interrupt() and add the the comment above smp_wmb() barrier. - call vcpu_kick() only if the pending_mask bit going from 0 to 1. - Code style fixes. - Update defintion of RISCV_VCPU_NR_IRQS to cover potential RV128 case and the case if AIA isn't used. - latch current into a local variable in check_for_pcpu_work(). --- Changes in v3: - Use smp_wb() instead of smp_mb__before_atomic(). - Add explanation of the change above in the commit message. - Move vcpu_sync_interrupts() here to producers side. - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() is called. --- Changes in V2: - Move the patch before an introduction of vtimer. - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as vcpu structure starts out all zeros. - Drop const for irq argument of vcpu_{un}set_interrupt(). - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. - Drop IRQ_LOCAL_MAX as there is no usage for it now. --- xen/arch/riscv/domain.c | 75 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 23 +++++++++ xen/arch/riscv/traps.c | 4 ++ 3 files changed, 102 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index c9494db0fbe7..335c41f3e5a1 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -140,6 +141,80 @@ void arch_vcpu_destroy(struct vcpu *v) vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) +{ + bool kick_vcpu; + + /* We only allow VS-mode software, timer, and external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + kick_vcpu = !test_and_set_bit(irq, v->arch.irqs_pending); + + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + + kick_vcpu |= !test_and_set_bit(irq, v->arch.irqs_pending_mask); + + if ( kick_vcpu ) + vcpu_kick(v); + + return 0; +} + +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) +{ + /* We only allow VS-mode software, timer, external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + clear_bit(irq, v->arch.irqs_pending); + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + return 0; +} + +void vcpu_sync_interrupts(struct vcpu *v) +{ + unsigned long hvip; + + /* Read current HVIP and VSIE CSRs */ + v->arch.vsie = csr_read(CSR_VSIE); + + /* Sync-up HVIP.VSSIP bit changes done by Guest */ + hvip = csr_read(CSR_HVIP); + if ( ((v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL)) && + !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) ) + { + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + else + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + } + +#ifdef CONFIG_RISCV_32 + /* + * Sync-up AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported + * now. + */ +# error "Update v->arch.vsieh" +#endif +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 17be792afe7d..b7241f2a79b1 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,8 +54,26 @@ struct arch_vcpu { register_t hideleg; register_t henvcfg; register_t hstateen0; + register_t hvip; register_t vsatp; + register_t vsie; + + /* + * VCPU interrupts + * + * We have a lockless approach for tracking pending VCPU interrupts + * implemented using atomic bitops. The irqs_pending bitmap represent + * pending interrupts whereas irqs_pending_mask represent bits changed + * in irqs_pending. Our approach is modeled around multiple producer + * and single consumer problem where the consumer is the VCPU itself. + * + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts + * on RV32 host. + */ +#define RISCV_VCPU_NR_IRQS MAX(BITS_PER_LONG, 64) + DECLARE_BITMAP(irqs_pending, RISCV_VCPU_NR_IRQS); + DECLARE_BITMAP(irqs_pending_mask, RISCV_VCPU_NR_IRQS); }; struct paging_domain { @@ -94,6 +112,11 @@ static inline void update_guest_memory_policy(struct vcpu *v, static inline void arch_vcpu_block(struct vcpu *v) {} +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); + +void vcpu_sync_interrupts(struct vcpu *v); + #endif /* ASM__RISCV__DOMAIN_H */ /* diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 9fca941526f6..551f886e3a69 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -171,6 +171,10 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) static void check_for_pcpu_work(void) { + struct vcpu *curr = current; + + vcpu_sync_interrupts(curr); + p2m_handle_vmenter(); } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237339.1539749 (Exim 4.92) (envelope-from ) id 1vtTE1-00025X-S6; Fri, 20 Feb 2026 16:19:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237339.1539749; Fri, 20 Feb 2026 16:19:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE1-00025G-Of; Fri, 20 Feb 2026 16:19:29 +0000 Received: by outflank-mailman (input) for mailman id 1237339; Fri, 20 Feb 2026 16:19:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE0-0000Q4-7e for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:28 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ecf522b8-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:26 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-483487335c2so21410585e9.2 for ; Fri, 20 Feb 2026 08:19:26 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:25 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ecf522b8-0e77-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604366; x=1772209166; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L59NZMHr94doMxHYbooYqU+b+678IT1cbuVKqM3ukd0=; b=S3q7A04RZNKuGVC2lv5LmiXS+HfLUSjRnlEYQSFSd+kY1/djYWxWGOCcCdzZAdC0vf krFp6ARERyCLLJe6K7Wh/wQa1mvJvgZvY89qfqWItbrYRqW27lK4dwN7kUq2Rx0BxNjh Txjd3VtTEmAHVd10ucZASWcLu3YIZwvshGmzlCgE1e5UOzAr6heQcs0oAMbIKQOdtbGw iZRRj4Z0t28xLDnFQEL60NDGD5Tu+JvXnOo0mNi0UGMojlE7AdidHCwBl4Chh7rJjoS7 asb7XttRLkAbhTN2xh9V/KMZE73GHp20+7LWgB/ievKBCT1uRccjeQbcF9Safwili0C6 Z9xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604366; x=1772209166; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=L59NZMHr94doMxHYbooYqU+b+678IT1cbuVKqM3ukd0=; b=g30bC4tiGA6TiYCq0AxN7aDpEZDXb1q8biQpzhVqGUMLqI46Hq3YAvMZX72lg1Ozpi fq07J7nPRaxj3353/x3AMbctK5b6ULHtE4BUShaJ63HOpqlAXLvJYE56gIOOqwGbUiDY B1kKSlUretAoa+6cbtt+PVCoxrjZNCnyp4HXQTwJZZ8SwyXqPA2D9zdSo6v63S8usAqc Lb5MB2SzbVglZN6dNKU0AUXDtYpvWRycNwR+IZ1sdgV6QO9jorl0yiLTjJ3mipTjuY70 QiB/XceMmcFbtLThDnUq591Gn+os/iOs79GZaB5uyTkIu9EHSneuoiTuaW0toT1VTjX2 8SMg== X-Gm-Message-State: AOJu0Yy7jQW82Fm2OtdmwhnxG77jsXjdAVkRDJfErR0ykEAmkP4Zm4tD yRCcC3dr+3QF8U5Zc1VPGgHJ9QSmn9HfTCttGwXFPAZXjDrlrM6/C5Gb2EUbDQ== X-Gm-Gg: AZuq6aL04xf1LJdyNmv3B8TQtsKxLQ0IgFJC5Zst/YgHJSDUcFvL1nPCNZrkI+VfLeM yxywsRO7HOVj+HiuCDksuEVSwYXdso2u73vrIEIDp4Hl5P6KddhPD1azGVQ6yc2ppY0f63wrPcM VlD95Nhpoz2stXWWSinOVIy03qFf9BBvqgmcG0svyA2mO9RbArKtI/Jnq5I2PgjvrT0EzHpA6Sr 2gAzglBXfkFoLq+MLd5Ai0vP5EB/2o8FodcXpsYMpu/t4EshPXH7XQayfyBJnxL/5fud/eZ/pj7 acrlVDWrm6ujIyL3vMmiLPO7gM97s3d78bRvH3WotuRC1VJg4XwsmvW0uDQVK00a4itBM0AxX7x jZFiREkFFZl43RO4age6jJoq1+qo1spug/lQ/IPy8JL+kbICmpHldkRt3Th3rlo8Ok1m8pO5lKK gn31U6JBMC7AMgW341ZXJhMOLi2kqROIW//SSjavlhyps4iob+SDdf7kV8cEN6O8JVbw== X-Received: by 2002:a05:600c:3e8d:b0:47e:e9c9:23bc with SMTP id 5b1f17b1804b1-483a95f89b5mr1012965e9.30.1771604365821; Fri, 20 Feb 2026 08:19:25 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 07/14] xen/riscv: introduce vcpu_kick() implementation Date: Fri, 20 Feb 2026 17:19:02 +0100 Message-ID: <0d0c9a359699240cd812e1ba68385a864666d102.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a RISC-V implementation of vcpu_kick(), which unblocks the target vCPU and sends an event check IPI if the vCPU was running on another processor. This mirrors the behavior of Arm and enables proper vCPU wakeup handling on RISC-V. Remove the stub implementation from stubs.c, as it is now provided by arch/riscv/domain.c. Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, for example, by randconfig what will lead to CI build issues. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - Add asm/perfc_defn.h to provide vcpu_kick perfcoounter to cover the case when CONFIG_PERF_COUNTERS=y. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/domain.c | 14 ++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/perfc_defn.h | 3 +++ xen/arch/riscv/stubs.c | 5 ----- 4 files changed, 17 insertions(+), 6 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 7027b5e9aa20..fb5c21078172 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include #include +#include #include #include @@ -251,6 +253,18 @@ void vcpu_flush_interrupts(struct vcpu *v) #endif } +void vcpu_kick(struct vcpu *v) +{ + bool running = v->is_running; + + vcpu_unblock(v); + if ( running && v != current ) + { + perfc_incr(vcpu_kick); + smp_send_event_check_mask(cpumask_of(v->processor)); + } +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index 3824f31c395c..86c56251d5d7 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -7,7 +7,6 @@ generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h generic-y += percpu.h -generic-y += perfc_defn.h generic-y += random.h generic-y += softirq.h generic-y += vm_event.h diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h new file mode 100644 index 000000000000..8a4b945df662 --- /dev/null +++ b/xen/arch/riscv/include/asm/perfc_defn.h @@ -0,0 +1,3 @@ +/* This file is intended to be included multiple times. */ + +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index daadff0138e4..eedf8bf9350a 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -203,11 +203,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_kick(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - unsigned long hypercall_create_continuation(unsigned int op, const char *format, ...) { -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237340.1539758 (Exim 4.92) (envelope-from ) id 1vtTE4-0002Oq-6I; Fri, 20 Feb 2026 16:19:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237340.1539758; Fri, 20 Feb 2026 16:19:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE4-0002Oa-0q; Fri, 20 Feb 2026 16:19:32 +0000 Received: by outflank-mailman (input) for mailman id 1237340; Fri, 20 Feb 2026 16:19:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE2-0000Q4-Km for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:30 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ee24eed1-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:28 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-4376de3f128so1538330f8f.0 for ; Fri, 20 Feb 2026 08:19:28 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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At present, vtimer_ctxt_switch_from() is a no-op because the RISC-V SSTC extension, which provides a virtualization-aware timer, is not yet supported. Xen therefore relies the virtual (SBI-based) timer. The virtual timer uses Xen's internal timer infrastructure and must be associated with the pCPU on which the vCPU is currently running so that timer events can be delivered efficiently. As a result, vtimer_ctxt_switch_to() migrates the timer to the target pCPU when a vCPU is scheduled in. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - s/vtimer_ctx_switch_to/vtimer_ctxt_switch_to - s/vtimer_ctx_switch_from/vtimer_ctxt_switch_from - Add Acked-by: Jan Beulich . --- Changes in v2: - Align the parameters names for vtimer_ctx_switch_from() and vtimer_ctx_switch_to() in declarations to match the ones in the defintions to make Misra happy. - s/vtimer_save/vtimer_ctx_switch_from. - s/vtimer_restore/vtimer_ctx_switch_to. - Update the commit message. --- xen/arch/riscv/include/asm/vtimer.h | 3 +++ xen/arch/riscv/vtimer.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h index 111863610a92..b4d48d1a1732 100644 --- a/xen/arch/riscv/include/asm/vtimer.h +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -14,4 +14,7 @@ void vcpu_timer_destroy(struct vcpu *v); void vtimer_set_timer(struct vtimer *t, uint64_t ticks); +void vtimer_ctxt_switch_from(struct vcpu *p); +void vtimer_ctxt_switch_to(struct vcpu *n); + #endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c index 32d142bcdfcd..afd8a53a7387 100644 --- a/xen/arch/riscv/vtimer.c +++ b/xen/arch/riscv/vtimer.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include @@ -69,3 +70,17 @@ void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) migrate_timer(&t->timer, smp_processor_id()); set_timer(&t->timer, expires); } + +void vtimer_ctxt_switch_from(struct vcpu *p) +{ + ASSERT(!is_idle_vcpu(p)); + + /* Nothing to do at the moment as SSTC isn't supported now. */ +} + +void vtimer_ctxt_switch_to(struct vcpu *n) +{ + ASSERT(!is_idle_vcpu(n)); + + migrate_timer(&n->arch.vtimer.timer, n->processor); +} -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237341.1539764 (Exim 4.92) (envelope-from ) id 1vtTE4-0002RG-It; Fri, 20 Feb 2026 16:19:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237341.1539764; Fri, 20 Feb 2026 16:19:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE4-0002QD-AP; Fri, 20 Feb 2026 16:19:32 +0000 Received: by outflank-mailman (input) for mailman id 1237341; Fri, 20 Feb 2026 16:19:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE2-0000Q4-SE for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:30 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ee5bc87b-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:29 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-4362c635319so2097773f8f.2 for ; Fri, 20 Feb 2026 08:19:29 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler now programs the vCPU’s virtual timer via vtimer_set_timer() and returns SBI_SUCCESS. This enables guests using the legacy SBI timer interface to schedule timer events correctly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3 - v5: - Nothing changed. Only rebase. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/vsbi/legacy-extension.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c index 2e8df191c295..090c23440cea 100644 --- a/xen/arch/riscv/vsbi/legacy-extension.c +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -7,6 +7,7 @@ #include #include +#include static void vsbi_print_char(char c) { @@ -44,6 +45,11 @@ static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, ret = SBI_ERR_NOT_SUPPORTED; break; + case SBI_EXT_0_1_SET_TIMER: + vtimer_set_timer(¤t->arch.vtimer, regs->a0); + regs->a0 = SBI_SUCCESS; + break; + default: /* * TODO: domain_crash() is acceptable here while things are still under -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237343.1539775 (Exim 4.92) (envelope-from ) id 1vtTE6-0002pH-9w; Fri, 20 Feb 2026 16:19:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237343.1539775; Fri, 20 Feb 2026 16:19:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE6-0002oQ-3z; Fri, 20 Feb 2026 16:19:34 +0000 Received: by outflank-mailman (input) for mailman id 1237343; Fri, 20 Feb 2026 16:19:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE3-0000Q4-V6 for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:31 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ef079b3d-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:30 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso17009375e9.1 for ; Fri, 20 Feb 2026 08:19:30 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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If the TIME extension is not available, fall back to the legacy timer mechanism. This is useful when Xen runs as a guest under another Xen, because the TIME extension is not currently virtualised and therefore will not appear as available. Despite of the fact that sbi_set_timer_v01 is introduced and used as fall back, SBI v0.1 still isn't fully supported (with the current SBI calls usage, sbi_rfence_v01 should be introduced too), so panic() in sbi_init() isn't removed. The sbi_set_timer() pointer will be used by reprogram_timer() to program Xen’s physical timer as without SSTC extension there is no any other option except SBI call to do that as only M-timer is available for us. Use dprintk() for all the cases to print that a speicifc SBI extension is available as it isn't really necessary in case of release builds. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Add inclusion of to to deal with the compilation issue: ./arch/riscv/include/asm/sbi.h:156:30: error: expected ')' before 'sbi_set_timer' 156 | extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); - Rephrase the first sentence of the comment above declaration of sbi_set_timer pointer to function. --- Changes in v4: - Add "stime_value is in absolute time" to the comment above declaration of sbi_set_timer() function pointer. - Add Acked-by: Jan Beulich . --- Changes in v3: - Init sbi_set_timer with sbi_set_timer_v01 as fallback value. - Sort SBI IDs in the same way as SBI EXT IDs are declared. - Add __ro_after_init for sbi_set_timer variable. - use dprintk instead of printk to print information if SBI ext is available. --- Changes in v2: - Move up defintion of SBI_EXT_TIME_SET_TIMER and use the same padding as defintions around it. - Add an extra comment about stime_value granuality above declaration of sbi_set_timer function pointer. - Refactor implemetation of sbi_set_timer_v02(). - Provide fallback for sbi_set_timer_v01(). - Update the commit message. --- xen/arch/riscv/include/asm/sbi.h | 22 ++++++++++++++++++ xen/arch/riscv/sbi.c | 40 +++++++++++++++++++++++++++++++- 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index 79f7ff5c5501..ed7af200288f 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -13,6 +13,7 @@ #define ASM__RISCV__SBI_H #include +#include /* SBI-defined implementation ID */ #define SBI_XEN_IMPID 7 @@ -29,6 +30,7 @@ #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 +#define SBI_EXT_TIME 0x54494D45 /* SBI function IDs for BASE extension */ #define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 @@ -48,6 +50,9 @@ #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 +/* SBI function IDs for TIME extension */ +#define SBI_EXT_TIME_SET_TIMER 0x0 + #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f000000 #define SBI_SPEC_VERSION_MINOR_MASK 0x00ffffff @@ -134,6 +139,23 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, size_t size, unsigned long vmid); +/* + * Programs the clock for next event at (or after) stime_value. stime_value is + * in absolute time. This function must clear the pending timer interrupt bit + * as well. + * + * If the supervisor wishes to clear the timer interrupt without scheduling the + * next timer event, it can either request a timer interrupt infinitely far + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer + * interrupt by clearing sie.STIE CSR bit. + * + * The stime_value parameter represents absolute time measured in ticks. + * + * This SBI call returns 0 upon success or an implementation specific negative + * error code. + */ +extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); + /* * Initialize SBI library * diff --git a/xen/arch/riscv/sbi.c b/xen/arch/riscv/sbi.c index 425dce44c679..b4a7ae6940c1 100644 --- a/xen/arch/riscv/sbi.c +++ b/xen/arch/riscv/sbi.c @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, unsigned long arg4, unsigned long arg5); +static int cf_check sbi_set_timer_v02(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +static int cf_check sbi_set_timer_v01(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +int (* __ro_after_init sbi_set_timer)(uint64_t stime_value) = sbi_set_timer_v01; + int sbi_remote_sfence_vma(const cpumask_t *cpu_mask, vaddr_t start, size_t size) { @@ -324,7 +356,13 @@ int __init sbi_init(void) if ( sbi_probe_extension(SBI_EXT_RFENCE) > 0 ) { sbi_rfence = sbi_rfence_v02; - printk("SBI v0.2 RFENCE extension detected\n"); + dprintk(XENLOG_INFO, "SBI v0.2 RFENCE extension detected\n"); + } + + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) + { + sbi_set_timer = sbi_set_timer_v02; + dprintk(XENLOG_INFO, "SBI v0.2 TIME extension detected\n"); } } else -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237346.1539787 (Exim 4.92) (envelope-from ) id 1vtTE7-0002zD-KV; Fri, 20 Feb 2026 16:19:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237346.1539787; Fri, 20 Feb 2026 16:19:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE7-0002y2-4O; Fri, 20 Feb 2026 16:19:35 +0000 Received: by outflank-mailman (input) for mailman id 1237346; Fri, 20 Feb 2026 16:19:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE5-0000QF-OL for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:33 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f079f1ce-0e77-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 17:19:32 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-483770e0b25so23237935e9.0 for ; Fri, 20 Feb 2026 08:19:32 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler disables further timer interrupts by clearing SIE.STIE and raises TIMER_SOFTIRQ so the generic timer subsystem can perform its processing. Update do_trap() to dispatch IRQ_S_TIMER to this new handler. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Drop cause argument of timer_interrupt() as it isn't used inside the function and anyway it is pretty clear what is the cause inside timer_interrupt(). --- xen/arch/riscv/traps.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 244264c92a79..326f2be62823 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -180,6 +181,15 @@ static void check_for_pcpu_work(void) p2m_handle_vmenter(); } +static void timer_interrupt(void) +{ + /* Disable the timer to avoid more interrupts */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + /* Signal the generic timer code to do its work */ + raise_softirq(TIMER_SOFTIRQ); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -221,6 +231,10 @@ void do_trap(struct cpu_user_regs *cpu_regs) intc_handle_external_irqs(cpu_regs); break; + case IRQ_S_TIMER: + timer_interrupt(); + break; + default: intr_handled = false; break; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237345.1539783 (Exim 4.92) (envelope-from ) id 1vtTE7-0002vM-B3; Fri, 20 Feb 2026 16:19:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237345.1539783; Fri, 20 Feb 2026 16:19:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE6-0002uM-JO; Fri, 20 Feb 2026 16:19:34 +0000 Received: by outflank-mailman (input) for mailman id 1237345; Fri, 20 Feb 2026 16:19:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE5-0000QF-1W for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:33 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id efbaaea8-0e77-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 17:19:31 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso25267825e9.0 for ; Fri, 20 Feb 2026 08:19:31 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The privileged architecture only defines machine-mode timer interrupts (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) is optional and is not supported on the boards available to me, so the only viable approach today is to program the timer through SBI. reprogram_timer() enables/disables the supervisor timer interrupt and programs the next timer deadline using sbi_set_timer(). If the SBI call fails, the code panics, because sbi_set_timer() is expected to return either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to the latest ones). The SBI spec does not define a standard negative error code for this call, and without SSTC there is no alternative method to program the timer, so the SBI timer call must be available. reprogram_timer() currently returns int for compatibility with the existing prototype. While it might be cleaner to return bool, keeping the existing signature avoids premature changes in case sbi_set_timer() ever needs to return other values (based on which we could try to avoid panic-ing) in the future. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Correct the comments in reprogram_timer(). - Move enablement of timer interrupt after sbi_set_timer() to avoid potentially receiving a timer interrupt between these 2 operations. --- Changes in v2: - Add TODO comment above sbi_set_timer() call. - Update the commit message. --- xen/arch/riscv/stubs.c | 5 ----- xen/arch/riscv/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index eedf8bf9350a..2f3a0ce76af9 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -21,11 +21,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; /* time.c */ -int reprogram_timer(s_time_t timeout) -{ - BUG_ON("unimplemented"); -} - void send_timer_event(struct vcpu *v) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 2c7af0a5d63b..7efa76fdbcb1 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -7,6 +7,9 @@ #include #include +#include +#include + unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ uint64_t __ro_after_init boot_clock_cycles; @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) cpu_khz = rate / 1000; } +int reprogram_timer(s_time_t timeout) +{ + uint64_t deadline, now; + int rc; + + if ( timeout == 0 ) + { + /* Disable timer interrupt */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; + } + + deadline = ns_to_ticks(timeout) + boot_clock_cycles; + now = get_cycles(); + if ( deadline <= now ) + return 0; + + /* + * TODO: When the SSTC extension is supported, it would be preferable to + * use the supervisor timer registers directly here for better + * performance, since an SBI call and mode switch would no longer + * be required. + * + * This would also reduce reliance on a specific SBI implementation. + * For example, it is not ideal to panic() if sbi_set_timer() returns + * a non-zero value. Currently it can return 0 or -ENOSUPP, and + * without SSTC we still need an implementation because only the + * M-mode timer is available, and it can only be programmed in + * M-mode. + */ + if ( (rc = sbi_set_timer(deadline)) ) + panic("%s: timer wasn't set because: %d\n", __func__, rc); + + /* Enable timer interrupt */ + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; +} + void __init preinit_xen_time(void) { if ( acpi_disabled ) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:19:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:19:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237348.1539803 (Exim 4.92) (envelope-from ) id 1vtTE9-0003YD-So; Fri, 20 Feb 2026 16:19:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237348.1539803; Fri, 20 Feb 2026 16:19:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE9-0003X7-FS; Fri, 20 Feb 2026 16:19:37 +0000 Received: by outflank-mailman (input) for mailman id 1237348; Fri, 20 Feb 2026 16:19:35 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE6-0000QF-Oh for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:34 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f0f95195-0e77-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 17:19:33 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4836d4c26d3so21053935e9.2 for ; Fri, 20 Feb 2026 08:19:33 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - It was something wrong with prev. rebase. So fix that and move removing of sync_local_execstate() and sync_vcpu_execstate() to the next patch. --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Update the commit message. - Move implementation of sync_vcpu_execstate() to separate commit as it doesn't connect to tasklet subsystem. --- xen/arch/riscv/setup.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index bca6ca09eddd..cae49bb29626 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -133,6 +134,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, panic("Booting using ACPI isn't supported\n"); } + tasklet_subsys_init(); + init_IRQ(); riscv_fill_hwcap(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 16:27:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 16:27:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237427.1539819 (Exim 4.92) (envelope-from ) id 1vtTLm-0000Cd-LR; Fri, 20 Feb 2026 16:27:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237427.1539819; Fri, 20 Feb 2026 16:27:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTLm-0000CV-HG; Fri, 20 Feb 2026 16:27:30 +0000 Received: by outflank-mailman (input) for mailman id 1237427; Fri, 20 Feb 2026 16:27:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTE8-0000Q4-60 for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:36 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f19f704f-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:34 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-436356740e6so2400953f8f.2 for ; Fri, 20 Feb 2026 08:19:34 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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RISC-V does not support lazy context switching, so nothing is done in sync_vcpu_execstate() and sync_local_execstate(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - It was something wrong with prev. rebase. Drop stubs for sync_local_execstate() and sync_vcpu_execstate() in this patch. --- Changes in v4: - Drop footer as [PATCH] sched: move vCPU exec state barriers is merged to upstream/staging. - Add Acked-by: Jan Beulich . --- Changes in v3: - Align sync_vcpu_execstate() with patch: [PATCH] sched: move vCPU exec state barriers --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 10 ++++++++++ xen/arch/riscv/stubs.c | 10 ---------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index fb5c21078172..f3b22d05071d 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -265,6 +265,16 @@ void vcpu_kick(struct vcpu *v) } } +void sync_local_execstate(void) +{ + /* Nothing to do -- no lazy switching */ +} + +void sync_vcpu_execstate(struct vcpu *v) +{ + /* Nothing to do -- no lazy switching */ +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 2f3a0ce76af9..acbb5b9123ea 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -91,16 +91,6 @@ void continue_running(struct vcpu *same) BUG_ON("unimplemented"); } -void sync_local_execstate(void) -{ - BUG_ON("unimplemented"); -} - -void sync_vcpu_execstate(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - void startup_cpu_idle_loop(void) { BUG_ON("unimplemented"); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 20:50:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 20:50:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237584.1539829 (Exim 4.92) (envelope-from ) id 1vtXSO-00027r-Em; Fri, 20 Feb 2026 20:50:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237584.1539829; Fri, 20 Feb 2026 20:50:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtXSO-00027j-9c; Fri, 20 Feb 2026 20:50:36 +0000 Received: by outflank-mailman (input) for mailman id 1237584; Fri, 20 Feb 2026 20:50:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtXSM-00027b-KY for xen-devel@lists.xenproject.org; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771620631; bh=3dRYbSGOYHNdFaNWK6wZcdevTB2Eb6ruwxO03ukN0z8=; h=Subject:From:In-Reply-To:References:Date:To:Cc:From; b=db9IO140/sAYMpwqAFdXRVLITwcmjIUSz1s35plpFkKbFgjfAM7L3GNWleJiJtZE9 6IwfBm8jqy+AXiyI25P5tJPZZE8Kst+HasVKdJucTbjRxag64bDy8ct/3pH9VjAXtL DJcFTe6keEJcsLOl8hBxYt79t+JphnOskiQjwaSXb7bf8DxowHffUwm59k5YKfCOq4 /N79Avczmh8Xg10iemB/UQNI9MW/KFXcYlWjkXTQXrLp1EZ3/g9E744+fwd8CLVapv I4zKy+BF/EW5/vthrPIkyTZtS1Z+7fFSujUxkNOggoK8eVA8W8lYETIaAUkj8RErnI WipmMWLaWTQJg== Subject: Re: [GIT PULL] xen: branch for v7.0-rc1a From: pr-tracker-bot@kernel.org In-Reply-To: <20260220123715.834848-1-jgross@suse.com> References: <20260220123715.834848-1-jgross@suse.com> X-PR-Tracked-List-Id: Xen developer discussion X-PR-Tracked-Message-Id: <20260220123715.834848-1-jgross@suse.com> X-PR-Tracked-Remote: git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1a-tag X-PR-Tracked-Commit-Id: 5043d7ed39dfdce3107d6642aa31bb7736547104 X-PR-Merge-Tree: torvalds/linux.git X-PR-Merge-Refname: refs/heads/master X-PR-Merge-Commit-Id: c8cb804a8add8d6f41b3805441b2ad16e30fbcc0 Message-Id: <177162063897.902486.12071756067544962355.pr-tracker-bot@kernel.org> Date: Fri, 20 Feb 2026 20:50:38 +0000 To: Juergen Gross Cc: torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org The pull request you sent on Fri, 20 Feb 2026 13:37:15 +0100: > git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.0-rc1a-tag has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/c8cb804a8add8d6f41b3805441b2ad16e30fbcc0 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237610.1539855 (Exim 4.92) (envelope-from ) id 1vtYL5-0008V2-QS; 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No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/acpi/boot.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/acpi/boot.c b/xen/arch/arm/acpi/boot.c index db5085e15d84..4ac0fd8f51e8 100644 --- a/xen/arch/arm/acpi/boot.c +++ b/xen/arch/arm/acpi/boot.c @@ -264,14 +264,14 @@ int __init acpi_boot_table_init(void) if ( error ) { printk("%s: Unable to initialize table parser (%d)\n", - __FUNCTION__, error); + __func__, error); goto disable; } error = acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); if ( error ) { - printk("%s: FADT not found (%d)\n", __FUNCTION__, error); + printk("%s: FADT not found (%d)\n", __func__, error); goto disable; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237611.1539868 (Exim 4.92) (envelope-from ) id 1vtYL7-0000TE-12; Fri, 20 Feb 2026 21:47:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237611.1539868; Fri, 20 Feb 2026 21:47:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL6-0000T3-Up; Fri, 20 Feb 2026 21:47:08 +0000 Received: by outflank-mailman (input) for mailman id 1237611; Fri, 20 Feb 2026 21:47:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL5-0008Ew-Bg for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:07 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b309dc2b-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:06 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-48371119eacso24629185e9.2 for ; Fri, 20 Feb 2026 13:47:06 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b309dc2b-0ea5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624025; x=1772228825; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F7fA2pJ5wU91qVSnLRts4j2C2n/06cd+/6bA5bE+4M0=; b=P+n+Jw261ki3egld4sClFtEsttya0CKtnHY0fjtiQDUcqumvNYTw7kstErSWq9lOTL TALtfUpfIu3dOenbls9IFLPu9TOHtXbwLKPemXmvcoR4TMrvmCFTqVxao+d9ONSJr18q ZHozBulh3BnPltcJxS/fGhlalKyxpiPC/Bw/M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624025; x=1772228825; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=F7fA2pJ5wU91qVSnLRts4j2C2n/06cd+/6bA5bE+4M0=; b=OaB0e5ePqL2N7McG+sfJComQ59HIxmb8x6OXZWucT1grfs97HEAzx9aBf8JaiMANmf 6ySmiYTdyGMHnaF3k3yFWWEVfQgY7s5RjWUy3L2q7X9H8PxrPpsBFg6Ytxbs9o75ZZnu s+GoeRlOasmrM8FIY0Y6+r0q7fXdgcHrYgha5B8IJ/418G+pRhMyfI/VbWZ8Pls9sHbr zs+x4B2bU8ill1swSb/yYUIBr4VRPIRfnj5W0sE+1/GXnrvUGUV6Iw0KyJ9b/IV8rD/F uo78fmoy8pM/RVPqdS2yymqq821ZCfEJ5SVckLdr34koPwpsfSkffD3TQLHy9NecCg8q mSyQ== X-Gm-Message-State: AOJu0YyJdqi6wIXM+LRnvXhIsPsvwbn2cR0ZHJUTVo6fNZlFKzJfStuc x27OP9osicnYDBt/TZpM5RODQqqYMk9aZVX+BxGbAQF1vzce9NebObVT4+lqzqWRCT7nZwZohmA ZvFUVA+1D8g== X-Gm-Gg: AZuq6aLhvuAi5xMtiorQK/45A2MlTdhwnbLt2m8NvpDsaaqjWIbHxVXWETEwMn9qnsC mCEd96jRHs6UK65bAaXtdS/IzYUIrDEydfCUBgzljKpLbiYFJVk3zZLo9MrzZgqtkEoILNCX4FG L9GOc8lSPZ8FsAg0AfKHUc5UfS4u31nK2nyxa0TGhwYoptZdYwvreQ5mr5CbgTLTxfDeCsKZVdk 2UKqLGkfMd9c/3px8Ftn+kVE2HYbzZvU5xCiiNKm+bapFeD17evvnB/kMH1rc7tAnso+STxAlOT IFQnOBLNj0RLYS/MIggAu4tQl5cHrrORwkv5pYOVKVjQ5pjsyzHqTnXotpHnufaVxHE8lm40FMT pBN5zmZ/lEpucyZhlyH2Uh93HXvYO1cGV5HYfLULt0stY8Td+GuTrdi6hJufLEy3zan9mPyFZxR /RJ5Qqe5+6hnJ2nVOAPGIBID1yjbKuZf66yaq3IkEnklci0/mUy2q1mjvUV4p/jnitbAAagnQ= X-Received: by 2002:a05:600c:c4a5:b0:483:a2ce:f461 with SMTP id 5b1f17b1804b1-483a95eb453mr15945185e9.4.1771624025257; Fri, 20 Feb 2026 13:47:05 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 03/12] xen/argo: Fix MISRA violations around function parameters Date: Fri, 20 Feb 2026 21:46:44 +0000 Message-Id: <20260220214653.3497384-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For the ARM build only, Eclair reports a R8.4 violation because do_argo_op() cannot see its declaration. This means that x86 is picking hypercall-defs.h up transitively while ARM is not. Include xen/hypercall.h explicitly. Eclair also reports a R8.3 violation because of arg3 and arg4 differing in name with a raw_ prefix. Because hypercall-defs.h generates both do_argo_op() and compat_argo_op() from a single description, it's not possible to simply rename to raw_ in the declaration, as that would force doing the same rename in compat_argo_op(). In do_argo_op(), drop the split parameter handling, and perform the 32bit range check via an explicit cast. While adjusting the surrounding logic, drop unnecessary casts to void * for already pointer arguments in argo_printk(). No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/common/argo.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 029a82825ba8..28626e00a8cb 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -2084,18 +2085,17 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_addr, long do_argo_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) arg1, - XEN_GUEST_HANDLE_PARAM(void) arg2, unsigned long raw_arg3, - unsigned long raw_arg4) + XEN_GUEST_HANDLE_PARAM(void) arg2, unsigned long arg3, + unsigned long arg4) { struct domain *currd = current->domain; long rc; - unsigned int arg3 = raw_arg3, arg4 = raw_arg4; argo_dprintk("->do_argo_op(%u,%p,%p,%lu,0x%lx)\n", cmd, - (void *)arg1.p, (void *)arg2.p, raw_arg3, raw_arg4); + arg1.p, arg2.p, arg3, arg4); /* Reject numeric hypercall args outside 32-bit range */ - if ( (arg3 != raw_arg3) || (arg4 != raw_arg4) ) + if ( (arg3 != (uint32_t)arg3) || (arg4 != (uint32_t)arg4) ) return -EINVAL; if ( unlikely(!opt_argo) ) @@ -2248,7 +2248,7 @@ compat_argo_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) arg1, return rc; argo_dprintk("->compat_argo_op(%u,%p,%p,%lu,0x%lx)\n", cmd, - (void *)arg1.p, (void *)arg2.p, arg3, arg4); + arg1.p, arg2.p, arg3, arg4); send_addr_hnd = guest_handle_cast(arg1, xen_argo_send_addr_t); /* arg2: iovs, arg3: niov, arg4: message_type */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237608.1539839 (Exim 4.92) (envelope-from ) id 1vtYL4-0008FA-BL; Fri, 20 Feb 2026 21:47:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237608.1539839; Fri, 20 Feb 2026 21:47:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL4-0008F2-7l; Fri, 20 Feb 2026 21:47:06 +0000 Received: by outflank-mailman (input) for mailman id 1237608; Fri, 20 Feb 2026 21:47:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL3-0008Ew-OW for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:05 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b1f5e64b-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:04 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-483a233819aso21422275e9.3 for ; Fri, 20 Feb 2026 13:47:04 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b1f5e64b-0ea5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624023; x=1772228823; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=yGBm2Qu8JB9RHbibbfp7HlpdXgEWIgkhDqMgDac0Xk4=; b=Io9XjymCsQDDZDVoj5N1IhV5bPxuWzLKxe+ApAzm2HaWrhvW2ysmUYbgEPEePZWawu rmWAjio4Wa5E/EN7GAeuefHZlIl/mlZIoAZKxJqY4frXstJx0/n3a9KoC7z5tfuuZtIU 1Z9tjknxuqOwhVAFgY5Ba8U3hVLYmqGsmZaw4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624023; x=1772228823; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=yGBm2Qu8JB9RHbibbfp7HlpdXgEWIgkhDqMgDac0Xk4=; b=cqU6ga5SbmlKYp45B8M0R6Vgu/4j5IZljVXK27jKb2afftg0nU9C4nUipV7V1UZ26i nEMSYXQ+eUIdK9fQhW+XdNfQxtIB3AsW0NeA+SUuqjt5EzjgdQ73aljzsk+7DezoKC5I SjCCgIzD4QWPFDTnUOZgYg9HFM+GYuIa4Vnymz03iiyL8X9bn/8hNUiCeW+1gJoXnG4Y b7Ot2NDkRBrA2MikEQAWEmxcuIT1mryJPqS/8jd6eDwaCqZL5nFFaYR5sQzu6rBsUCeX 6v6Q0HI3d2Vwvip99AxrHEFT1X9N1DoNRkGVMdmA1F5HIrpFaEg0YzpF7LewoPKn7xkt utMQ== X-Gm-Message-State: AOJu0YzSn/qhp/fgzC0TAWfqPvIyFQoDwO37YbiG8mvTwPMQKGeT7Jyf gtvMH3yMQC3BQtiJu7VjEieuXFzmNN8uDAtM4G7Km5/4eFKIKBqIFy2yqRPouWnNmUVZdYA7GkX vaP2u X-Gm-Gg: AZuq6aLMJFe+F+H3qcxNg9OdohtuDCbVPz0kZlUwwUh0ZZ8GpfV7+n8TIt5Q26hGYJQ +644TQTazBV/+Wo6l9MrbjiKpFjOEtj99xQXd1MUogVlhXt8L8Sxi0YyWNBi3rQ09liNlD/5AkE /WfmL7xQcvcqcc3dVAGvL6Ks0EGxA3blRHsse9fsg2wcAAv+MxzCmCNSn9AIyBrraW9R+h5lEVD irpL4EMeUnfkmye1AK3uHOZTfl7YhuNgWiETRuPepQFwTZauMwS2Os/DW5fqzp2bpH/zIz4meE7 5MKqStYhFt3kkVA19ruyszL2avLUViRGXaZZaXiAMwn5UCwhBPxNV+5faZWjUSb/X4UByHbvU4g Ckc/kuCe1eiikJ6PU7g+j1SneQzoL7EysgcJPBae+UML4mcNbVfzUK3yBkdmgl1tzPO3hPyWNYA e2HgPhFl4vBIDiitvljj1a2Y+AlXHYnwtA4sq9EQCacjGME+PUlsjYaMvXORcrfiqjTARNPU8uS YlNW6wPdg== X-Received: by 2002:a05:600c:5020:b0:483:71f7:2767 with SMTP id 5b1f17b1804b1-483a95fc0a9mr16791075e9.11.1771624022613; Fri, 20 Feb 2026 13:47:02 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 00/12] xen: Misc MISRA fixes for *-allcode targets Date: Fri, 20 Feb 2026 21:46:41 +0000 Message-Id: <20260220214653.3497384-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2340465777 This fixes some low hanging fruit. There's still more work to do in both the x86 and ARM -allcode targets Andrew Cooper (12): arm: Use __func__ in acpi_boot_table_init() xen/treewide: Adjust suffixes on integer literals xen/argo: Fix MISRA violations around function parameters xen/treewide: Adjust parameter names and types x86: Adjust annotations of asm-used identifiers xen: Include suitable headers to make declarations visible xen/vmac: Const the key parameter of vmac_set_key() arm/pci-designware: Fix MISRA violations x86/shadow: Rework write_atomic() call in shadow_write_entries() xen: Adjust break/fallthrough statements xen: Bracket uses of macro parameters xen/vmac: Delete STDINT block in vmac.h xen/arch/arm/acpi/boot.c | 4 ++-- xen/arch/arm/gic-v3-its.c | 2 +- xen/arch/arm/include/asm/pci.h | 2 +- xen/arch/arm/include/asm/tee/optee_msg.h | 16 +++++++-------- xen/arch/arm/include/asm/tee/optee_smc.h | 8 ++++---- xen/arch/arm/pci/pci-access.c | 10 ++++++---- xen/arch/arm/pci/pci-designware.c | 4 +++- xen/arch/arm/pci/pci-designware.h | 5 ++--- xen/arch/arm/tee/optee.c | 7 ++++--- xen/arch/x86/boot/cmdline.c | 3 +-- xen/arch/x86/boot/reloc.c | 3 +-- xen/arch/x86/guest/xen/pvh-boot.c | 2 +- xen/arch/x86/guest/xen/xen.c | 4 ++-- xen/arch/x86/include/asm/bootinfo.h | 2 +- xen/arch/x86/include/asm/compat.h | 2 +- xen/arch/x86/include/asm/config.h | 2 +- xen/arch/x86/include/asm/guest/hyperv.h | 2 +- xen/arch/x86/include/asm/p2m.h | 2 +- xen/arch/x86/include/asm/pv/mm.h | 8 +++++++- xen/arch/x86/include/asm/pv/traps.h | 6 ++---- xen/arch/x86/mm/mem_paging.c | 8 +++++--- xen/arch/x86/mm/shadow/common.c | 2 +- xen/arch/x86/mm/shadow/multi.c | 2 +- xen/arch/x86/mm/shadow/set.c | 4 ++-- xen/arch/x86/pv/emul-gate-op.c | 4 +++- xen/arch/x86/pv/emul-inv-op.c | 1 + xen/arch/x86/pv/emul-priv-op.c | 1 + xen/arch/x86/pv/emulate.c | 1 + xen/arch/x86/pv/grant_table.c | 1 + xen/arch/x86/pv/hypercall.c | 2 +- xen/arch/x86/pv/mm.c | 1 + xen/arch/x86/pv/ro-page-fault.c | 1 + xen/arch/x86/pv/traps.c | 1 + xen/arch/x86/tboot.c | 10 +++++----- xen/arch/x86/traps.c | 3 +-- xen/arch/x86/x86_64/machine_kexec.c | 3 ++- xen/common/argo.c | 12 ++++++------ xen/common/kimage.c | 11 ++++++----- xen/common/livepatch.c | 11 ++++++----- xen/common/stack-protector.c | 1 + xen/crypto/vmac.c | 12 ++++++------ xen/drivers/char/xhci-dbc.c | 14 ++++++------- xen/include/crypto/rijndael.h | 16 +++++++-------- xen/include/crypto/vmac.h | 25 +----------------------- xen/include/xen/acpi.h | 2 +- xen/include/xen/libfdt/libfdt.h | 6 +++--- xen/include/xen/stack-protector.h | 2 ++ 47 files changed, 125 insertions(+), 126 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237609.1539850 (Exim 4.92) (envelope-from ) id 1vtYL5-0008Se-Iy; Fri, 20 Feb 2026 21:47:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237609.1539850; Fri, 20 Feb 2026 21:47:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL5-0008SW-EX; Fri, 20 Feb 2026 21:47:07 +0000 Received: by outflank-mailman (input) for mailman id 1237609; Fri, 20 Feb 2026 21:47:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL4-0008Ew-An for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:06 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b2a20ada-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:05 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so29346975e9.2 for ; Fri, 20 Feb 2026 13:47:05 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:03 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b2a20ada-0ea5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624025; x=1772228825; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jDPL04AxDc8Xafccu1ZVRQiZUTvtnTnKwY+v0GkBCrE=; b=Ji2GEFyPAZ3Ns9pvX2Of+s46mxwkpdcPtoXIxxk0svZSdwXS5RUddD/zEj4LRs7dRd LBhVjCn3P1n0gtbIAeNITqJ5rvs7woU453b/TpRZM+xm/tunb1eNfC2t0NAF1KYvH44w yTMggrHCWWqn3R/fmHJQs8SXG5H04Kwj7r2Tk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624025; x=1772228825; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=jDPL04AxDc8Xafccu1ZVRQiZUTvtnTnKwY+v0GkBCrE=; b=eZRnDdXdqskNblg2lNBZT6HTvrjyqzD+H13RDCtizGou2zwx8ULfEw2OBC9AFdGRP3 M6W9IT3gkPItztdVKlzd18p+X/EywCnSF3p2JgpjMEiy6uIfj6RUdkNiK12hOSfBOvSh +r3FugzF3FzfVz1E0lJ7y6C7ExQhCw6rjLV+kGInB6EivBnvYgzsiY2k6a3ZtZTzvmga w1Efb2lSFj8vs7TGmrXF8mAKetuAxll2cMbzDO78EjJDf7XnHHwNt76wvA8YcUYE5QFF aFJ2lBJMLch88vWWU/pjxsalpNipVNKyFUt/3ALsl52WnBVdFR/bWPBFwCKZTG64yf2c ORzQ== X-Gm-Message-State: AOJu0Yz7Hmi6JQFPVS8EoMT5XlkAEZ71SuRu9DTD0PXlyIWtosB9mo3Q HDG/7dSLZjJcqQrMidD4N9LOPhZiWvCFAwb604Hhf3vZAi8xzo6hpLfhCumSFx2OvFdd7LKvWhs oMEz+Ef/1zQ== X-Gm-Gg: AZuq6aIX95OOjm//yzhFosaDE7YGnn4F1uwh/Q7xbtZyYnulaOIi6ibCSaRo6Aoh8CD kFWTPYs/sENDCzGeCtqWwWvu4MD3NSExDwqatJpJ9qEHBASwjVivuBkikd4FPc6Dzlli8SHjZnJ iSZYpNk8a/EimAy4B2v2rB6H2mzkWFisUcMGmQZJdnYLjzvSXGXRL9DxKU7gTU3/MPBOik+ybtW T+8qGFcuy0t/fR4kBS312ePqx1jOxj5kPTFtZbou2GdMnxbxC57W56xwLQmSLVDa4GiSyQ4UhFY v5FWNEeRhgDWlDee69KjSKp2IBJuEfs7M4k4UGGHCHiZSCHZQbQG1G393ghRLGTz1rA/YWI2jLU xNqpSxgT44YP5UMYEuqdZeu5pix/w3zTwr3MWzPWD9eKMCEgID9Pxlgv5T6jNizGkBVZ4k5+sH2 ka2cH1gMC2KB+/wFwTgO6z7FaehMOGA+abq/zxjUjElaOQe2PEovihXl4iifyx0jUuFwgFD4Q= X-Received: by 2002:a05:600c:6291:b0:477:9814:6882 with SMTP id 5b1f17b1804b1-483a95b5975mr16770775e9.5.1771624024597; Fri, 20 Feb 2026 13:47:04 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 02/12] xen/treewide: Adjust suffixes on integer literals Date: Fri, 20 Feb 2026 21:46:43 +0000 Message-Id: <20260220214653.3497384-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use U where necessary (Misra Rule 7.2) and uppercase L (Misra Rule 7.3). No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/gic-v3-its.c | 2 +- xen/arch/arm/include/asm/tee/optee_msg.h | 16 ++++++++-------- xen/arch/arm/include/asm/tee/optee_smc.h | 8 ++++---- xen/arch/arm/tee/optee.c | 6 +++--- xen/arch/x86/guest/xen/xen.c | 2 +- xen/arch/x86/include/asm/config.h | 2 +- xen/arch/x86/include/asm/guest/hyperv.h | 2 +- xen/arch/x86/pv/emul-gate-op.c | 2 +- xen/arch/x86/tboot.c | 4 ++-- xen/drivers/char/xhci-dbc.c | 14 +++++++------- 10 files changed, 29 insertions(+), 29 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 34833166adcc..9ba068c46fcb 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -76,7 +76,7 @@ static const struct its_quirk its_quirks[] = { { .desc = "R-Car Gen4", .iidr = 0x0201743b, - .mask = 0xffffffff, + .mask = 0xffffffffU, .init = gicv3_its_enable_quirk_gen4, }, { diff --git a/xen/arch/arm/include/asm/tee/optee_msg.h b/xen/arch/arm/include/asm/tee/optee_msg.h index fe743dbde3c8..09820ff8638c 100644 --- a/xen/arch/arm/include/asm/tee/optee_msg.h +++ b/xen/arch/arm/include/asm/tee/optee_msg.h @@ -222,10 +222,10 @@ struct optee_msg_arg { * Represented in 4 32-bit words in OPTEE_MSG_UID_0, OPTEE_MSG_UID_1, * OPTEE_MSG_UID_2, OPTEE_MSG_UID_3. */ -#define OPTEE_MSG_UID_0 0x384fb3e0 -#define OPTEE_MSG_UID_1 0xe7f811e3 -#define OPTEE_MSG_UID_2 0xaf630002 -#define OPTEE_MSG_UID_3 0xa5d5c51b +#define OPTEE_MSG_UID_0 0x384fb3e0U +#define OPTEE_MSG_UID_1 0xe7f811e3U +#define OPTEE_MSG_UID_2 0xaf630002U +#define OPTEE_MSG_UID_3 0xa5d5c51bU #define OPTEE_MSG_FUNCID_CALLS_UID 0xFF01 /* @@ -246,10 +246,10 @@ struct optee_msg_arg { * Returns UUID in 4 32-bit words in the same way as * OPTEE_MSG_FUNCID_CALLS_UID described above. */ -#define OPTEE_MSG_OS_OPTEE_UUID_0 0x486178e0 -#define OPTEE_MSG_OS_OPTEE_UUID_1 0xe7f811e3 -#define OPTEE_MSG_OS_OPTEE_UUID_2 0xbc5e0002 -#define OPTEE_MSG_OS_OPTEE_UUID_3 0xa5d5c51b +#define OPTEE_MSG_OS_OPTEE_UUID_0 0x486178e0U +#define OPTEE_MSG_OS_OPTEE_UUID_1 0xe7f811e3U +#define OPTEE_MSG_OS_OPTEE_UUID_2 0xbc5e0002U +#define OPTEE_MSG_OS_OPTEE_UUID_3 0xa5d5c51bU #define OPTEE_MSG_FUNCID_GET_OS_UUID 0x0000 /* diff --git a/xen/arch/arm/include/asm/tee/optee_smc.h b/xen/arch/arm/include/asm/tee/optee_smc.h index 2f5c702326f7..39c04eb5ad1b 100644 --- a/xen/arch/arm/include/asm/tee/optee_smc.h +++ b/xen/arch/arm/include/asm/tee/optee_smc.h @@ -443,9 +443,9 @@ #define OPTEE_SMC_CALL_RETURN_FROM_RPC \ OPTEE_SMC_STD_CALL_VAL(OPTEE_SMC_FUNCID_RETURN_FROM_RPC) -#define OPTEE_SMC_RETURN_RPC_PREFIX_MASK 0xFFFF0000 -#define OPTEE_SMC_RETURN_RPC_PREFIX 0xFFFF0000 -#define OPTEE_SMC_RETURN_RPC_FUNC_MASK 0x0000FFFF +#define OPTEE_SMC_RETURN_RPC_PREFIX_MASK 0xFFFF0000U +#define OPTEE_SMC_RETURN_RPC_PREFIX 0xFFFF0000U +#define OPTEE_SMC_RETURN_RPC_FUNC_MASK 0x0000FFFFU #define OPTEE_SMC_RETURN_GET_RPC_FUNC(ret) \ ((ret) & OPTEE_SMC_RETURN_RPC_FUNC_MASK) @@ -548,7 +548,7 @@ OPTEE_SMC_RPC_VAL(OPTEE_SMC_RPC_FUNC_CMD) /* Returned in a0 */ -#define OPTEE_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFF +#define OPTEE_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFFU /* Returned in a0 only from Trusted OS functions */ #define OPTEE_SMC_RETURN_OK 0x0 diff --git a/xen/arch/arm/tee/optee.c b/xen/arch/arm/tee/optee.c index 5151bd90ed02..699e8d536862 100644 --- a/xen/arch/arm/tee/optee.c +++ b/xen/arch/arm/tee/optee.c @@ -49,16 +49,16 @@ #define TEEC_ORIGIN_COMMS 0x00000002 /* "Non-specific cause" as in GP TEE Client API Specification */ -#define TEEC_ERROR_GENERIC 0xFFFF0000 +#define TEEC_ERROR_GENERIC 0xFFFF0000U /* * "Input parameters were invalid" as described * in GP TEE Client API Specification. */ -#define TEEC_ERROR_BAD_PARAMETERS 0xFFFF0006 +#define TEEC_ERROR_BAD_PARAMETERS 0xFFFF0006U /* "System ran out of resources" as in GP TEE Client API Specification */ -#define TEEC_ERROR_OUT_OF_MEMORY 0xFFFF000C +#define TEEC_ERROR_OUT_OF_MEMORY 0xFFFF000CU /* Client ID 0 is reserved for the hypervisor itself */ #define OPTEE_CLIENT_ID(domain) ((domain)->domain_id + 1) diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index 77a3a8742a3e..315e5ded05ab 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -120,7 +120,7 @@ static void map_shared_info(void) /* Mask all upcalls */ for ( i = 0; i < ARRAY_SIZE(XEN_shared_info->evtchn_mask); i++ ) - write_atomic(&XEN_shared_info->evtchn_mask[i], ~0ul); + write_atomic(&XEN_shared_info->evtchn_mask[i], ~0UL); } static int map_vcpuinfo(void) diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h index cc80f2c62310..1b28349a427b 100644 --- a/xen/arch/x86/include/asm/config.h +++ b/xen/arch/x86/include/asm/config.h @@ -200,7 +200,7 @@ #ifdef CONFIG_PV32 /* This is not a fixed value, just a lower limit. */ -#define __HYPERVISOR_COMPAT_VIRT_START 0xF5800000 +#define __HYPERVISOR_COMPAT_VIRT_START 0xF5800000U #define HYPERVISOR_COMPAT_VIRT_START(d) ((d)->arch.pv.hv_compat_vstart) #else /* !CONFIG_PV32 */ diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h index c05efdce71a4..dabc62727b44 100644 --- a/xen/arch/x86/include/asm/guest/hyperv.h +++ b/xen/arch/x86/include/asm/guest/hyperv.h @@ -11,7 +11,7 @@ #include /* Use top-most MFN for hypercall page */ -#define HV_HCALL_MFN (((1ull << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT) +#define HV_HCALL_MFN (((1ULL << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT) /* * The specification says: "The partition reference time is computed diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c index dcac0a04015b..1faf13b962b1 100644 --- a/xen/arch/x86/pv/emul-gate-op.c +++ b/xen/arch/x86/pv/emul-gate-op.c @@ -32,7 +32,7 @@ static int read_gate_descriptor(unsigned int gate_sel, return 0; *sel = (desc.a >> 16) & 0x0000fffc; - *off = (desc.a & 0x0000ffff) | (desc.b & 0xffff0000); + *off = (desc.a & 0x0000ffff) | (desc.b & 0xffff0000U); *ar = desc.b & 0x0000ffff; /* diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c index 9d9bb6e7cf6d..0b3d596690cc 100644 --- a/xen/arch/x86/tboot.c +++ b/xen/arch/x86/tboot.c @@ -41,8 +41,8 @@ static bool __ro_after_init is_vtd; * TXT configuration registers (offsets from TXT_{PUB, PRIV}_CONFIG_REGS_BASE) */ -#define TXT_PUB_CONFIG_REGS_BASE 0xfed30000 -#define TXT_PRIV_CONFIG_REGS_BASE 0xfed20000 +#define TXT_PUB_CONFIG_REGS_BASE 0xfed30000U +#define TXT_PRIV_CONFIG_REGS_BASE 0xfed20000U /* # pages for each config regs space - used by fixmap */ #define NR_TXT_CONFIG_PAGES ((TXT_PUB_CONFIG_REGS_BASE - \ diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c index 1f7d4395dc9d..c1ff528de62f 100644 --- a/xen/drivers/char/xhci-dbc.c +++ b/xen/drivers/char/xhci-dbc.c @@ -353,8 +353,8 @@ static bool __init dbc_init_xhc(struct dbc *dbc) cmd = pci_conf_read16(dbc->sbdf, PCI_COMMAND); pci_conf_write16(dbc->sbdf, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMORY); - pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_0, 0xFFFFFFFF); - pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_1, 0xFFFFFFFF); + pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_0, 0xFFFFFFFFU); + pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_1, 0xFFFFFFFFU); bar_size = pci_conf_read32(dbc->sbdf, PCI_BASE_ADDRESS_0); bar_size |= (uint64_t)pci_conf_read32(dbc->sbdf, PCI_BASE_ADDRESS_1) << 32; xhc_mmio_size = ~(bar_size & PCI_BASE_ADDRESS_MEM_MASK) + 1; @@ -398,7 +398,7 @@ static struct dbc_reg __iomem *xhci_find_dbc(struct dbc *dbc) * This is initially an offset to the first capability. All the offsets * (both in HCCP1 and then next capability pointer) are dword-based. */ - next = (readl(hccp1) & 0xFFFF0000) >> 16; + next = readl(hccp1) >> 16; while ( id != DBC_ID && next && ttl-- ) { @@ -735,7 +735,7 @@ static void dbc_init_ep(uint32_t *ep, uint64_t mbs, uint32_t type, memset(ep, 0, DBC_CTX_BYTES); ep[1] = (1024 << 16) | ((uint32_t)mbs << 8) | (type << 3); - ep[2] = (ring_dma & 0xFFFFFFFF) | 1; + ep[2] = (uint32_t)ring_dma | 1; ep[3] = ring_dma >> 32; ep[4] = 3 * 1024; } @@ -816,7 +816,7 @@ static void dbc_reset_debug_port(struct dbc *dbc) * This is initially an offset to the first capability. All the offsets * (both in HCCP1 and then next capability pointer are dword-based. */ - next = (readl(hccp1) & 0xFFFF0000) >> 16; + next = readl(hccp1) >> 16; /* * Look for "supported protocol" capability, major revision 3. @@ -1094,7 +1094,7 @@ static void dbc_enqueue_in(struct dbc *dbc, struct xhci_trb_ring *trb, struct dbc_work_ring *wrk) { struct dbc_reg *reg = dbc->dbc_reg; - uint32_t db = (readl(®->db) & 0xFFFF00FF) | (trb->db << 8); + uint32_t db = (readl(®->db) & 0xFFFF00FFU) | (trb->db << 8); /* Check if there is already queued TRB */ if ( xhci_trb_ring_size(trb) >= 1 ) @@ -1289,7 +1289,7 @@ static void cf_check dbc_uart_resume(struct serial_port *port) struct dbc_uart *uart = port->uart; struct dbc *dbc = &uart->dbc; - pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_0, dbc->bar_val & 0xFFFFFFFF); + pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_0, dbc->bar_val); pci_conf_write32(dbc->sbdf, PCI_BASE_ADDRESS_1, dbc->bar_val >> 32); pci_conf_write16(dbc->sbdf, PCI_COMMAND, dbc->pci_cr); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237612.1539878 (Exim 4.92) (envelope-from ) id 1vtYL8-0000hw-BE; Fri, 20 Feb 2026 21:47:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237612.1539878; Fri, 20 Feb 2026 21:47:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL8-0000hl-7B; Fri, 20 Feb 2026 21:47:10 +0000 Received: by outflank-mailman (input) for mailman id 1237612; Fri, 20 Feb 2026 21:47:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL6-0008Ew-MR for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:08 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b3e4ef94-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:07 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-481188b7760so21122925e9.0 for ; Fri, 20 Feb 2026 13:47:07 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b3e4ef94-0ea5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624027; x=1772228827; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=++I7y0Fz5SNLOYdyOKbflTxyKYPA97MXE/g2maqbcaQ=; b=vk25ojic1m2Jr1Uc8xYH10oJ60/hXch9uMSBQg3XYs+ArESqN1Jobwlh+i9WbcMkJC 1BWuzTsCn8SRnZw8+lv+KGFpLgQLIeEFB7BDhk1xZ47Q5EY2VneDqLVS/OwGlT5EBg0/ H+i7AaNAvsUpWWDD3kZYsFpz7bDG8v1eBNCv4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624027; x=1772228827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=++I7y0Fz5SNLOYdyOKbflTxyKYPA97MXE/g2maqbcaQ=; b=r5LEQHMP2sG3j3KAtIno4R85Q1vmMaqLlA2AnpWHljv8HBmS2ZAtx/AkYAO1cetK/g 7ushFvrZli0yccEd1HbezUJ78Di/OiBHxhoKhyaI/RN3FceIGYOyU1bDo9kmqf6IwgMJ NBE9k4Ib70wcQB6ylSAXTDpiRCaJdZ9lS4bGJJyLONv70yWaAQW2EJRZ5nPnBqiLAQxu 3GlQacUVoPCdm+RPNbMl+j23PzDzl4NhPIXnTgRohyH/TvzFi4DaHA0mHXaZmJ2S9kGd 89L8bDMSHcr/OLrIzUh1tf4I2zjyShaApaPnE3MRqpXMIPT6NF0GzX1h5jLSST+HVML+ 0bQQ== X-Gm-Message-State: AOJu0Yw9S7Auah2bvufiBVkJaPFLm8wu02NbU92xM8pmerphK7V8gCR/ WaDdKRvLwfByp4rpSHxV5RNPLP8Tb8zmfCsF5Sh+2tjht1FK/9jqrFyOIgBMwva/watqost0r26 FiZix2KTO4w== X-Gm-Gg: AZuq6aJK9wGs05svOVMGYz15WGlSaU84M3aHLBhSr3Ju5/iFFpAIUo7Dt5iApcXEi1b NjNWhsd0L+yQAA8OoiKx1HY4iWlvUDyFAPhJiDHs7h1o1/p1xnR1mma32TFJrtjchluoORIEgDc JRbicZ8tPdQUqIhVKtLrrJAebGNyzPVnDc8Yqob3tDJSgZFVSkxVVn+Jqgur8HVzU09ygrcgtDv 85tL56JNb5PlAUz665KSPY6iVzgT3ZysfQ7hHOhfs3aARnnYDrcTXOmySkkdEvWqNbaaPMAVM9U BjEnjAcojRxgfDIXBlKZYfeRuH8PqEZwPJSwND5c0JDjyq6TaCP+xS9+U/6GBR9l/6hlrjQ/dbX M0h9jgKu/g0/N3GbdHtSnjIv7U2l5gtVOzw09T4lrnnFYXi6D23dvYuwLpaU463rXx5qAD9aECM Ihx8FDVZ4/CHKwUKkJTsh0//ZixZBbyFl3a4avMkeAkYxZ96QCgxKz/nWisqFDHPAhZjsI5aw= X-Received: by 2002:a05:600c:8b2c:b0:480:1b1a:5526 with SMTP id 5b1f17b1804b1-483a95e24ebmr19094485e9.16.1771624026566; Fri, 20 Feb 2026 13:47:06 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 05/12] x86: Adjust annotations of asm-used identifiers Date: Fri, 20 Feb 2026 21:46:46 +0000 Message-Id: <20260220214653.3497384-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit do_entry_int82() is only called by assembly so gains asmlinkage. pvh_start_info_pa and early_hypercall_insn are data used by assembly, and need a SAF-1 annotation. For the remaining SAF-1 anntations on functions, convert them to asmlinkage for consistency. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/x86/boot/cmdline.c | 3 +-- xen/arch/x86/boot/reloc.c | 3 +-- xen/arch/x86/guest/xen/pvh-boot.c | 2 +- xen/arch/x86/guest/xen/xen.c | 2 +- xen/arch/x86/pv/hypercall.c | 2 +- xen/arch/x86/traps.c | 3 +-- 6 files changed, 6 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/boot/cmdline.c b/xen/arch/x86/boot/cmdline.c index 196c580e9151..5db5c7b20bf6 100644 --- a/xen/arch/x86/boot/cmdline.c +++ b/xen/arch/x86/boot/cmdline.c @@ -334,8 +334,7 @@ static void vga_parse(const char *cmdline, early_boot_opts_t *ebo) } #endif -/* SAF-1-safe */ -void cmdline_parse_early(const char *cmdline, early_boot_opts_t *ebo) +void asmlinkage cmdline_parse_early(const char *cmdline, early_boot_opts_t *ebo) { if ( !cmdline ) return; diff --git a/xen/arch/x86/boot/reloc.c b/xen/arch/x86/boot/reloc.c index 7a375ad41c1c..82c2d237aab6 100644 --- a/xen/arch/x86/boot/reloc.c +++ b/xen/arch/x86/boot/reloc.c @@ -346,8 +346,7 @@ static multiboot_info_t *mbi2_reloc(uint32_t mbi_in, memctx *ctx) return mbi_out; } -/* SAF-1-safe */ -void *reloc(uint32_t magic, uint32_t in) +void *asmlinkage reloc(uint32_t magic, uint32_t in) { memctx ctx = { trampoline_phys + TRAMPOLINE_HEAP_END }; diff --git a/xen/arch/x86/guest/xen/pvh-boot.c b/xen/arch/x86/guest/xen/pvh-boot.c index e14d7e20e942..8d8f4a34e445 100644 --- a/xen/arch/x86/guest/xen/pvh-boot.c +++ b/xen/arch/x86/guest/xen/pvh-boot.c @@ -22,7 +22,7 @@ /* Initialised in head.S, before .bss is zeroed. */ bool __initdata pvh_boot; -uint32_t __initdata pvh_start_info_pa; +uint32_t __initdata pvh_start_info_pa; /* SAF-1-safe */ static multiboot_info_t __initdata pvh_mbi; static module_t __initdata pvh_mbi_mods[8]; diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index 315e5ded05ab..8e13c2fbf307 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -40,7 +40,7 @@ DEFINE_PER_CPU(struct vcpu_info *, vcpu_info); * 0 vmcall * > 0 vmmcall */ -int8_t __initdata early_hypercall_insn = -1; +int8_t __initdata early_hypercall_insn = -1; /* SAF-1-safe */ /* * Called once during the first hypercall to figure out which instruction to diff --git a/xen/arch/x86/pv/hypercall.c b/xen/arch/x86/pv/hypercall.c index 17581d232e19..b3b9a3255531 100644 --- a/xen/arch/x86/pv/hypercall.c +++ b/xen/arch/x86/pv/hypercall.c @@ -180,7 +180,7 @@ void pv_ring1_init_hypercall_page(void *p) } } -void do_entry_int82(struct cpu_user_regs *regs) +void asmlinkage do_entry_int82(struct cpu_user_regs *regs) { if ( unlikely(untrusted_msi) ) check_for_unexpected_msi((uint8_t)regs->entry_vector); diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 3c01c5eb53b5..29ea6054abab 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1336,8 +1336,7 @@ void asmlinkage do_int3(struct cpu_user_regs *regs) pv_inject_hw_exception(X86_EXC_BP, X86_EVENT_NO_EC); } -/* SAF-1-safe */ -void do_general_protection(struct cpu_user_regs *regs) +void asmlinkage do_general_protection(struct cpu_user_regs *regs) { #ifdef CONFIG_PV struct vcpu *v = current; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237613.1539883 (Exim 4.92) (envelope-from ) id 1vtYL8-0000lh-TN; Fri, 20 Feb 2026 21:47:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237613.1539883; Fri, 20 Feb 2026 21:47:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL8-0000kN-JK; Fri, 20 Feb 2026 21:47:10 +0000 Received: by outflank-mailman (input) for mailman id 1237613; Fri, 20 Feb 2026 21:47:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL7-0008IG-8g for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:09 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b3d11e93-0ea5-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 22:47:07 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-482f454be5bso33419175e9.0 for ; Fri, 20 Feb 2026 13:47:07 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:05 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b3d11e93-0ea5-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624027; x=1772228827; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=beuTbfe9kV1Ouyfxy/gjE8egNOMK+gVzuCqzx8daylA=; b=BMiR/T+WEvvW5iGsKAdgfi+cPActfn8vFvDu97HWE0xiqgu3PSNY7LK2RjwCHIGzDl mmO5MGekILMGQOVadEMiwyzuSymZgpES00rTNtDjcGOvq+sP9S4JrVgxkoR8tjIuFFg6 y2ygy7gCQ/aQb9W0TAqByris1EsG8MDxDK4GE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624027; x=1772228827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=beuTbfe9kV1Ouyfxy/gjE8egNOMK+gVzuCqzx8daylA=; b=ef7zwv9kOpaDwizhAtPxmwwQIbkuW8TJR4LaD2yGYkhNU5HmQonLPJLKlnoffICbE3 WPXUYygXOjMcKiMyrRO+OPISyzgIC9Uv992lnsXyUlZmdY8UB1UcxoCQMTK5hO5I6xr2 DJO5K8asFrk1npquct2kyCNA4pAOSIDzhfgDVvQKE1bVPeEB531XuWRkOWgRwKdo80VG UVh77IfE/BCvelJgDa34p41RWpdxCxMvmtvcw2qhR0oeOSUiy1A9YHB88ePs2gLegU2P wII8af5oVmnCoaX3zNDFoYg0T9njVfXxol1pvNwfVW6E7xc2f/jpEdjIFxyscglpnSHv IDxA== X-Gm-Message-State: AOJu0Yx+ph2GtDPum6vR6IYgN/LhR9+DCXS1fzWFgoT4BoQkK1Bh1R7M BClaXq/nqbPU66r28q36nCPP1ItN0x8Qs/4VTbbawG5TDSQkNi7zIrJGbhpE7ckvp3ChMqkIMoG FWcug X-Gm-Gg: AZuq6aJ4get2Cv4QPIfRMmil837pY/iZiHLZsERPVCmMPIlMCSkOmOpOHLnPvTXidLz gKFst0iC8osqgJqOdRZrneymSHG5uL0dQBgPrRUeSzrFpWI4LCkly2HAem50ohcbam8En6lRTBW RaZI2a86HR2EICn/1SaKEKfz9r8sL8rYRI2Ybnkp/xOsaeAx5sUU11VL28QsiaLHZbofH7KHzSR JE6oRTNDFNql54fy1qrm/J/Q8UyJgX8bD/oHGerFtg86sbRJjmRGDGS0cFcxWpVdlJY4q14gs6e V4GJo0s6AmbRgRT1D9zTxdrxts/R87oreLgtcaJGJYx4Vnou1FA2rFZsfrsSlo0Fc5qCXC3WPtb SvyamgZ6PjQTJNQ+/zl3Zw5EDBIaLDmTuhCDfQtQjnf+hNLtoFhvTyoy05U7iGxqcp4kxFQ8Joc TIKLa+iZxryOjg/12dvP3LKFZGD4SQ153TCuD52K6jYhVk+5vxFZfox9JK20Z3aPP5ILjHH3w= X-Received: by 2002:a05:600c:1c29:b0:483:6d9e:e4f5 with SMTP id 5b1f17b1804b1-483a949e5edmr17807355e9.5.1771624025939; Fri, 20 Feb 2026 13:47:05 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 04/12] xen/treewide: Adjust parameter names and types Date: Fri, 20 Feb 2026 21:46:45 +0000 Message-Id: <20260220214653.3497384-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit MISRA Rule 8.2 says that parameters must all have names. Rule 8.3 says that the names and types must match between declaration and definition. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/include/asm/pci.h | 2 +- xen/arch/arm/pci/pci-access.c | 4 ++-- xen/arch/x86/include/asm/compat.h | 2 +- xen/arch/x86/include/asm/p2m.h | 2 +- xen/arch/x86/mm/mem_paging.c | 2 +- xen/crypto/vmac.c | 2 +- xen/include/crypto/rijndael.h | 16 ++++++++-------- xen/include/xen/acpi.h | 2 +- 8 files changed, 16 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h index 08ffcd443862..73c3be74aef1 100644 --- a/xen/arch/arm/include/asm/pci.h +++ b/xen/arch/arm/include/asm/pci.h @@ -98,7 +98,7 @@ struct pci_ecam_ops { unsigned int bus_shift; struct pci_ops pci_ops; int (*cfg_reg_index)(struct dt_device_node *dev); - int (*init)(struct pci_config_window *); + int (*init)(struct pci_config_window *cfg); }; /* Default ECAM ops */ diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c index 4a9486750199..c0533c00c9a5 100644 --- a/xen/arch/arm/pci/pci-access.c +++ b/xen/arch/arm/pci/pci-access.c @@ -135,9 +135,9 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned int reg, #define PCI_OP_WRITE(size, type) \ void pci_conf_write##size(pci_sbdf_t sbdf, \ - unsigned int reg, type val) \ + unsigned int reg, type data) \ { \ - pci_config_write(sbdf, reg, size / 8, val); \ + pci_config_write(sbdf, reg, size / 8, data); \ } #define PCI_OP_READ(size, type) \ diff --git a/xen/arch/x86/include/asm/compat.h b/xen/arch/x86/include/asm/compat.h index 30ed8f2fd0dc..f12f4f24d802 100644 --- a/xen/arch/x86/include/asm/compat.h +++ b/xen/arch/x86/include/asm/compat.h @@ -16,7 +16,7 @@ typedef unsigned long full_ptr_t; struct domain; #ifdef CONFIG_PV32 -int switch_compat(struct domain *); +int switch_compat(struct domain *d); #else #include static inline int switch_compat(struct domain *d) { return -EOPNOTSUPP; } diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index ef6b02ff0bb6..92be64e134e8 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -773,7 +773,7 @@ static inline int relinquish_p2m_mapping(struct domain *d) */ /* Modify p2m table for shared gfn */ -int set_shared_p2m_entry(struct domain *d, unsigned long gfn, mfn_t mfn); +int set_shared_p2m_entry(struct domain *d, unsigned long gfn_l, mfn_t mfn); /* Tell xenpaging to drop a paged out frame */ void p2m_mem_paging_drop_page(struct domain *d, gfn_t gfn, p2m_type_t p2mt); diff --git a/xen/arch/x86/mm/mem_paging.c b/xen/arch/x86/mm/mem_paging.c index ac8d34ffa074..d4b3cb990c54 100644 --- a/xen/arch/x86/mm/mem_paging.c +++ b/xen/arch/x86/mm/mem_paging.c @@ -156,7 +156,7 @@ void p2m_mem_paging_populate(struct domain *d, gfn_t gfn) * * If the gfn was dropped the vcpu needs to be unpaused. */ -void p2m_mem_paging_resume(struct domain *d, vm_event_response_t *rsp) +void p2m_mem_paging_resume(struct domain *d, struct vm_event_st *rsp) { struct p2m_domain *p2m = p2m_get_hostp2m(d); p2m_type_t p2mt; diff --git a/xen/crypto/vmac.c b/xen/crypto/vmac.c index acb4e015f511..f1f6d75f8eeb 100644 --- a/xen/crypto/vmac.c +++ b/xen/crypto/vmac.c @@ -702,7 +702,7 @@ static uint64_t l3hash(uint64_t p1, uint64_t p2, /* ----------------------------------------------------------------------- */ -void vhash_update(unsigned char *m, +void vhash_update(unsigned char m[], unsigned int mbytes, /* Pos multiple of VMAC_NHBYTES */ vmac_ctx_t *ctx) { diff --git a/xen/include/crypto/rijndael.h b/xen/include/crypto/rijndael.h index 4386be587851..80c612749f9e 100644 --- a/xen/include/crypto/rijndael.h +++ b/xen/include/crypto/rijndael.h @@ -45,14 +45,14 @@ typedef struct { u32 dk[4*(AES_MAXROUNDS + 1)]; /* decrypt key schedule */ } rijndael_ctx; -int rijndael_set_key(rijndael_ctx *, const unsigned char *, int); -int rijndael_set_key_enc_only(rijndael_ctx *, const unsigned char *, int); -void rijndael_decrypt(rijndael_ctx *, const unsigned char *, unsigned char *); -void rijndael_encrypt(rijndael_ctx *, const unsigned char *, unsigned char *); +int rijndael_set_key(rijndael_ctx *ctx, const unsigned char *key, int bits); +int rijndael_set_key_enc_only(rijndael_ctx *ctx, const unsigned char *key, int bits); +void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); +void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); -int rijndaelKeySetupEnc(unsigned int [], const unsigned char [], int); -int rijndaelKeySetupDec(unsigned int [], const unsigned char [], int); -void rijndaelEncrypt(const unsigned int [], int, const unsigned char [16], - unsigned char [16]); +int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char cipherKey[], int keyBits); +int rijndaelKeySetupDec(unsigned int rk[], const unsigned char cipkerKey[], int keyBits); +void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned char pt[16], + unsigned char ct[16]); #endif /* __RIJNDAEL_H */ diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 90635ba0f322..ca87cd15a824 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -75,7 +75,7 @@ typedef int (*acpi_table_handler) (struct acpi_table_header *table); typedef int (*acpi_table_entry_handler) (struct acpi_subtable_header *header, const unsigned long end); unsigned int acpi_get_processor_id (unsigned int cpu); -char * __acpi_map_table (paddr_t phys_addr, unsigned long size); +char * __acpi_map_table (paddr_t phys, unsigned long size); bool __acpi_unmap_table(const void *ptr, unsigned long size); int acpi_boot_init (void); int acpi_boot_table_init (void); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237614.1539889 (Exim 4.92) (envelope-from ) id 1vtYL9-0000nM-Ac; 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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b433f758-0ea5-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624027; x=1772228827; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=38Q6mGCwbKjhhK8kwdPI5HfU9QB1AsZ0yVRPxRPU2XA=; b=I5uwAh+6sicY4jOD/nMZRlwFvDLFYB3wwyJodfcP4iGUWiFCQODI1Z/6jNVjS7Cp6a TfoSIIcNQgn8tVWRU4b2Ov+UaiulA2J5DLjiZbE6u2cs0IBkgG/2q9L+u97FZ9BVXgjR +GtSz+hLhE6DbJqIyqcmYp8TtG02CsJmrp93M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624027; x=1772228827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=38Q6mGCwbKjhhK8kwdPI5HfU9QB1AsZ0yVRPxRPU2XA=; b=Oh8QheO174nVZ3g+Z54X0Pw+SMbejOe6xQTSkr7jgHFlE3IpDul+ifZH3LPHUlrDMY i3judnK3yepxQEe1AFpRFchgpNOKMGY59DLjR/y5mxyQ7OBt/1MlP3iSpI3NQJ1G0vbb QfixbGP/CnQUF8cZiyEcrFvFbMd288IS7IzNl2ptW581OTT0sGYOLa0yhpVSID9Djl9F Tv1KKqG7lYu1R9wNYABZMYMQm3aQQL2m8n65jOiphlaYJM0FaEAFVeGGWhiLMgnx6tsg qbUoCucersE+3cTjM0ziEhQefO5GrCZjgt4AIAj1Luq7zh8QkVrLCuP3YIydlZxtl833 KMbw== X-Gm-Message-State: AOJu0YzEn8xWv7hH0yytfIEtLOEub0id7PQgkQ5MFuNDhjqVwyxDDj0h un9O2XWlQVpNbgLxSNMcpgJAdtUX3uBThOv0iXCsFYBBLprpu2jX4h1JAk/e5e24PfZac2QSU62 O9d7gQNI3hA== X-Gm-Gg: AZuq6aK/PcnT4dHqJKcMop8WMVR9YekwNIpMYuu7wrFtuv6LD9/IeIWQnJD7U94z2+G hfHZbeCWMKQqdtCoIDjMgnBU+XMC+I0i6GmpP+lW2vfBSMDTPSZ29GFRewtapEQchCxBqiNUKRa 9rqNRStA4rBmafCOdloFpOXVjaoY9H4caWr4Ft3Rek/VR+/cJznSOPNSIBi/mcB2RXydfk0rsFo SqCb7ynYCkGHNqs9Lk4s7aivVEu0FAXO1OQqTqcSwGIhO6rnbpZtxmnGiyGTT8XuZ4AJcDyS25z DDewoHqFW86qGua9sEzzyyRSHqy0m1zNA3tMIWViX2xIhzBBUWKTOxyQr/ZJz1Ey9iwzzzzMRut 02j/KGriRB7A4dzXKcS6nEDQoZL3Mq2QDV5k+84GhhO9ynz/LEZUVRjAKD5nakkHUhKB8A3mnWB 8WcYJf93C9PYtx+h0+Pmj4ngso+FnHJFjED4vdSdtRxj+qxA75wT+IQzVibW+TaOCzkLAhbBc= X-Received: by 2002:a05:600c:1989:b0:479:1348:c63e with SMTP id 5b1f17b1804b1-483a94c99admr21112605e9.9.1771624027207; Fri, 20 Feb 2026 13:47:07 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 06/12] xen: Include suitable headers to make declarations visible Date: Fri, 20 Feb 2026 21:46:47 +0000 Message-Id: <20260220214653.3497384-7-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A range of functions can't see their declarations, requiring the inclusion of appropriate headers. For pv/mm.h and pv/traps.h, this requires adjustements to become standalone. In pv/mm.h, swap xen/lib.h for xen/bug.h now that ASSERT_UNREACHABLE() has moved. For pv/traps.h, pv_trap_callback_registered() needs to see a complete struct vcpu, and xen/sched.h is not something appropriate to pull in conditionally. stack-protector.c can't see the declaration of __stack_chk_guard, and fixing that reveals that stack-protector.h needs get_cycles() too. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/x86/include/asm/pv/mm.h | 8 +++++++- xen/arch/x86/include/asm/pv/traps.h | 6 ++---- xen/arch/x86/mm/mem_paging.c | 6 ++++-- xen/arch/x86/pv/emul-gate-op.c | 2 ++ xen/arch/x86/pv/emul-inv-op.c | 1 + xen/arch/x86/pv/emul-priv-op.c | 1 + xen/arch/x86/pv/emulate.c | 1 + xen/arch/x86/pv/grant_table.c | 1 + xen/arch/x86/pv/mm.c | 1 + xen/arch/x86/pv/ro-page-fault.c | 1 + xen/arch/x86/pv/traps.c | 1 + xen/arch/x86/x86_64/machine_kexec.c | 3 ++- xen/common/stack-protector.c | 1 + xen/include/xen/stack-protector.h | 2 ++ 14 files changed, 27 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/include/asm/pv/mm.h b/xen/arch/x86/include/asm/pv/mm.h index a5745908206a..11a43f15e222 100644 --- a/xen/arch/x86/include/asm/pv/mm.h +++ b/xen/arch/x86/include/asm/pv/mm.h @@ -10,6 +10,12 @@ #ifndef __X86_PV_MM_H__ #define __X86_PV_MM_H__ +#include + +struct cpu_user_regs; +struct page_info; +struct vcpu; + #ifdef CONFIG_PV int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs); @@ -26,7 +32,7 @@ int validate_segdesc_page(struct page_info *page); #else #include -#include +#include static inline int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) diff --git a/xen/arch/x86/include/asm/pv/traps.h b/xen/arch/x86/include/asm/pv/traps.h index 8c31d5a793c5..8c201190923d 100644 --- a/xen/arch/x86/include/asm/pv/traps.h +++ b/xen/arch/x86/include/asm/pv/traps.h @@ -10,9 +10,9 @@ #ifndef __X86_PV_TRAPS_H__ #define __X86_PV_TRAPS_H__ -#ifdef CONFIG_PV +#include -#include +#ifdef CONFIG_PV int pv_raise_nmi(struct vcpu *v); @@ -28,8 +28,6 @@ static inline bool pv_trap_callback_registered(const struct vcpu *v, #else /* !CONFIG_PV */ -#include - static inline int pv_raise_nmi(struct vcpu *v) { return -EOPNOTSUPP; } static inline int pv_emulate_privileged_op(struct cpu_user_regs *regs) { return 0; } diff --git a/xen/arch/x86/mm/mem_paging.c b/xen/arch/x86/mm/mem_paging.c index d4b3cb990c54..33929b526ab9 100644 --- a/xen/arch/x86/mm/mem_paging.c +++ b/xen/arch/x86/mm/mem_paging.c @@ -7,10 +7,12 @@ * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) */ - -#include #include #include + +#include +#include + #include #include "mm-locks.h" diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c index 1faf13b962b1..c2c699fbff40 100644 --- a/xen/arch/x86/pv/emul-gate-op.c +++ b/xen/arch/x86/pv/emul-gate-op.c @@ -9,6 +9,8 @@ #include +#include + #include "emulate.h" static int read_gate_descriptor(unsigned int gate_sel, diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c index 346ac1124d7b..23d2928b00cd 100644 --- a/xen/arch/x86/pv/emul-inv-op.c +++ b/xen/arch/x86/pv/emul-inv-op.c @@ -8,6 +8,7 @@ */ #include +#include #include "emulate.h" diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 1d9e57ad2763..a3c1fd12621d 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 0022e0f55e30..a00d1c6c82eb 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -10,6 +10,7 @@ #include #include +#include #include "emulate.h" diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c index 247436a0156a..1df68440a24a 100644 --- a/xen/arch/x86/pv/grant_table.c +++ b/xen/arch/x86/pv/grant_table.c @@ -12,6 +12,7 @@ #include #include +#include #include #include "mm.h" diff --git a/xen/arch/x86/pv/mm.c b/xen/arch/x86/pv/mm.c index 187f5f6a3e8c..3f2e9dedcde3 100644 --- a/xen/arch/x86/pv/mm.c +++ b/xen/arch/x86/pv/mm.c @@ -12,6 +12,7 @@ #include #include +#include #include "mm.h" diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 9c6f66884675..d89306d34fc6 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -8,6 +8,7 @@ * Copyright (c) 2004 Christian Limpach */ +#include #include #include diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index 26a468108a77..b0395b99145a 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include diff --git a/xen/arch/x86/x86_64/machine_kexec.c b/xen/arch/x86/x86_64/machine_kexec.c index f4a005cd0c2f..f9e54d86fb53 100644 --- a/xen/arch/x86/x86_64/machine_kexec.c +++ b/xen/arch/x86/x86_64/machine_kexec.c @@ -6,8 +6,9 @@ * - Magnus Damm */ -#include #include +#include + #include #include diff --git a/xen/common/stack-protector.c b/xen/common/stack-protector.c index 2115912c3bd0..05e57d4509e2 100644 --- a/xen/common/stack-protector.c +++ b/xen/common/stack-protector.c @@ -2,6 +2,7 @@ #include #include #include +#include #include /* diff --git a/xen/include/xen/stack-protector.h b/xen/include/xen/stack-protector.h index 931affd919be..65488bdabced 100644 --- a/xen/include/xen/stack-protector.h +++ b/xen/include/xen/stack-protector.h @@ -1,6 +1,8 @@ #ifndef __XEN_STACK_PROTECTOR_H__ #define __XEN_STACK_PROTECTOR_H__ +#include + extern unsigned long __stack_chk_guard; /* -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237615.1539908 (Exim 4.92) (envelope-from ) id 1vtYLA-0001Mg-Sl; Fri, 20 Feb 2026 21:47:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237615.1539908; Fri, 20 Feb 2026 21:47:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLA-0001Kr-L7; Fri, 20 Feb 2026 21:47:12 +0000 Received: by outflank-mailman (input) for mailman id 1237615; Fri, 20 Feb 2026 21:47:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL8-0008Ew-Ad for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:10 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b51fcf85-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:09 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-43621bf67ceso1666755f8f.2 for ; Fri, 20 Feb 2026 13:47:09 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:08 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b51fcf85-0ea5-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624029; x=1772228829; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0Xl/PbKeU3vXsi8lYY06npq9oqfFySBcdivOG4iOWhA=; b=ERg4En1oCz/WkmNntbMDWY53yX/uv0MGVYNMAerFvSS+8BcWmHARyQUhbltvyzqwFS GKOz8YVL0WVmrS0mZ0ur5q1w0v0sr2GTsnzGGahDi2RSMxrsEOMOesiMrY6RCmdYdQ9M jlIjcB6htKAkBARDKeyNtfLOzwmIrpaWKdHEY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624029; x=1772228829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0Xl/PbKeU3vXsi8lYY06npq9oqfFySBcdivOG4iOWhA=; b=WSBRjF52E3JNx/6uSn41adDMopE7d0i6Jr37g0NS9dc9DNFXKo8Fb56mrYTWh7g3Ke pzuIP9hvtRZdy57crogE6dvflkS3SmC32twFULVHnuyVhlLkocFgcEEla/VizUQ+qZ2s D4q3slif2lFyHzdwQ/kR4msxtH7h1WqLTfzeYLMkc6sHAK8X19TKH+Or84R0G9leZVDB +fdLuxBS4GzjwSs0A3HdARP4yqia3fAu+t7UbgYbeHj9uLE2ZQG/NZctQl8nwsMdLQmp WbQSCdAnhaDZowTIiq7OF5xHb02bfn0Z9SBAaziEugofBA+L7MCAhwFLIzKxGo+3liR2 PkHQ== X-Gm-Message-State: AOJu0YwO6u1UYVBJiemEIWI1K5kpZ8LBr5hUKJDanPRWeRhNlWN+seI6 viI1cl+pNa/gWTkoHyWmp8ogxSKTSgAvKTTOT2aSIjPYWAT3+jzZaDaSShF7+8VgmqfmQkUr+Pn 9v14Q X-Gm-Gg: AZuq6aJ2tdCVyO5Krq1cPDgNooaBrvJh4O4aIcEKyUGmv8chcRpvLD3KBpahXHckWdW yqhJN3aY6yLN17uPVtPFW5VVOIgrMprp//xLF8IcdYTrhYd1dKDWFdJbw1+rrpw5rhiRYVwxTPM cb7boab4+irKj2ppl6VT3Z6N2PGMjcjBESFvxQonRX66uiRpsJ8DoYcbsvZozqwCt4Z3emQ3apU Sby8P00/7fztZB9hHnwraX0M8Rs2YKiNZzS/nK0kjMgKOXoxDc1e4WkMMTr7jHQ022IC6iqOB8Y swU/JOULuXTBzejQyhjflI35WA8VxmlLlBUdSAGBuwILVhY4DrtQaZcfY3WQ9bKnbswpl8z+BJn l4lV0wfXZa9HFirfoGB+Ekl9MD4eMND5Y0b4emXefkfFu1NCYYZ+McLaoIjvKmraaDEMt8vGSQT S1LdAmN+wXXS/aQHqjidv+7QixNlfrAdoH+7twSyebk4Az9L9npaCJheYIVT9U4a1bpe283G8= X-Received: by 2002:a05:600c:4e4a:b0:483:129e:b573 with SMTP id 5b1f17b1804b1-483a962d1d1mr17672845e9.18.1771624028447; Fri, 20 Feb 2026 13:47:08 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 08/12] arm/pci-designware: Fix MISRA violations Date: Fri, 20 Feb 2026 21:46:49 +0000 Message-Id: <20260220214653.3497384-9-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Move includes inside the header guards (D4.10) * Use NULL in preference to 0 (R11.9) No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/pci/pci-designware.c | 2 +- xen/arch/arm/pci/pci-designware.h | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-designware.c index 0bd67524ac8b..6b85213f637b 100644 --- a/xen/arch/arm/pci/pci-designware.c +++ b/xen/arch/arm/pci/pci-designware.c @@ -285,7 +285,7 @@ void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge, bridge->child_cfg->phys_addr, busdev, bridge->child_cfg->size); if ( ret ) - return 0; + return NULL; return bridge->child_cfg->win + where; } diff --git a/xen/arch/arm/pci/pci-designware.h b/xen/arch/arm/pci/pci-designware.h index b9deb3b138ae..bd93dab6f2f1 100644 --- a/xen/arch/arm/pci/pci-designware.h +++ b/xen/arch/arm/pci/pci-designware.h @@ -6,12 +6,11 @@ * Based on xen/arch/arm/pci/pci-host-generic.c */ -#include -#include - #ifndef __PCI_DESIGNWARE_H__ #define __PCI_DESIGNWARE_H__ +#include +#include #define PCIE_ATU_VIEWPORT 0x900 #define PCIE_ATU_REGION_OUTBOUND 0 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237616.1539913 (Exim 4.92) (envelope-from ) id 1vtYLB-0001RV-Ax; Fri, 20 Feb 2026 21:47:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237616.1539913; Fri, 20 Feb 2026 21:47:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLB-0001QX-1C; Fri, 20 Feb 2026 21:47:13 +0000 Received: by outflank-mailman (input) for mailman id 1237616; Fri, 20 Feb 2026 21:47:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL8-0008Ew-J7 for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:10 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b54e7943-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:10 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4837f27cf2dso21378625e9.2 for ; Fri, 20 Feb 2026 13:47:10 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/x86/mm/shadow/set.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/mm/shadow/set.c b/xen/arch/x86/mm/shadow/set.c index 8b670b6bb555..96ba2811077e 100644 --- a/xen/arch/x86/mm/shadow/set.c +++ b/xen/arch/x86/mm/shadow/set.c @@ -62,8 +62,8 @@ shadow_write_entries(void *d, const void *s, unsigned int entries, mfn_t mfn) ASSERT(IS_ALIGNED((unsigned long)dst, sizeof(*dst))); - for ( ; i < entries; i++ ) - write_atomic(&dst++->l1, src++->l1); + for ( ; i < entries; i++, dst++, src++ ) + write_atomic(&dst->l1, src->l1); unmap_domain_page(map); } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237617.1539919 (Exim 4.92) (envelope-from ) id 1vtYLB-0001Yv-Rt; Fri, 20 Feb 2026 21:47:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237617.1539919; Fri, 20 Feb 2026 21:47:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLB-0001W8-F3; Fri, 20 Feb 2026 21:47:13 +0000 Received: by outflank-mailman (input) for mailman id 1237617; Fri, 20 Feb 2026 21:47:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYL9-0008IG-15 for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:11 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b4f27749-0ea5-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 22:47:09 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso18920445e9.1 for ; Fri, 20 Feb 2026 13:47:09 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a8df83bcsm28940205e9.13.2026.02.20.13.47.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 13:47:07 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b4f27749-0ea5-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771624029; x=1772228829; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XZOtH6QKJjtO5cu9aMfNJQCmxs/qiZNDuJ7ZYGgpThE=; b=FFmhL3IY2RNqLuaArvzpOVYyM94aSfmt7tTF+3HtrUkfRX8TxaBD0Q4NYkqgLfIUGb A2ujHHiktbOiffpXlqMmbUS9ZeOfWN8qdhUVucpZaHo1p/JJQOPbRv/nLCqfKV0XWGbr jLAtpjJBTk8fZIvdIhsBBlBOOkl3Ww8uGDMYY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771624029; x=1772228829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XZOtH6QKJjtO5cu9aMfNJQCmxs/qiZNDuJ7ZYGgpThE=; b=gbBUN78nq3rxf8SzyMjhqa2nHwfhqwyW7Fj2w+aOw/Vm82WSsOSUy+6VP/1LFYQoVT U5EPjsqMSIICdn/QJET5XS+m9h9A89YtT9MQREWGSZSGLnPOV3Fq6KxQSe0e0hyDwkWu 6jBHz4u722NQ2TZ/Z6omEHJoUUaNgFJbG3gn+MS9rCsTx6/XCLtbE1fTNoBB3v42SM1u Kwgs71XM+F6qJjQlcYABUNxSogMc605J+YonrDOZmJvGVBMT88f5APCQEZ7epcQWTAtO 6OSZ8oNT6nsR9k8+aU5ECYEdIYt1cI8s8HvxjsTawRkjdpuC8nQtAu4kBS+UMEz69a16 w5wQ== X-Gm-Message-State: AOJu0YzRINYD++V159sEYQMRwiSCfoXnmOTx3QOL1D/hViG1uEyzYI7y Dupd0gT9ADkwomDac/dV6sRX2TZzfLSl6KSYioXSYS3bGIWXovDy0vhFYOMMHmpE5f7nGSzFbPV I3siI X-Gm-Gg: AZuq6aJOVCtaXM3gEEH2TZ35noajENnfyLW7ddKnByOy6L0jKIDvWD6/vDQMy787zJ8 JI6hXGn9cEtlwpdOLklDNKCFqYLZg1lNV/1j3DM5pd2Q/aLb9Ycwl1eQ9Is0WtH1AUpu9tQpjoU c586RZUwaQPc1YR4IhzB3yVwfPV18E9UywzImHeF7rENlc7YceFUuauiw86684eVXn41azMK0TM dlY6TOWIXbiKC8ZrTAcrBodnAI5ph8QoKB2izMjc/x5p+f5OgfdJ/eYbM/Ea2uDEm1sYpPhng8z kq7POWK3gZJZHkiapAPT35V6JVkehdRgSaNWMD3RCq5aW7dq4Ijc7mgT3DEbfXdHCMovTSUp9Re Su5cBo8pJCneL7ckui2KBtryDv92C/t2Fmp64Bg7d1P1q+H3q4+CYVt+WwXrWllyhw8Ax5TroOF THY8jllhXVBRK//gzZO7ByZOQnyv3IqCJXUaUZubkII6WfqSTFLflUxqlSRKzXweG1qalldIo= X-Received: by 2002:a05:600c:8b71:b0:483:7980:4687 with SMTP id 5b1f17b1804b1-483a95dd932mr16357815e9.17.1771624027841; Fri, 20 Feb 2026 13:47:07 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini Subject: [PATCH 07/12] xen/vmac: Const the key parameter of vmac_set_key() Date: Fri, 20 Feb 2026 21:46:48 +0000 Message-Id: <20260220214653.3497384-8-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260220214653.3497384-1-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Eclair complains that tboot_gen_domain_integrity() is casting away constness (Rule 11.8 violation). vmac_set_key() doesn't modify the user_key parameter, so it can become const, removing the need to cast. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/x86/tboot.c | 6 +++--- xen/crypto/vmac.c | 2 +- xen/include/crypto/vmac.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c index 0b3d596690cc..5ae27f481f94 100644 --- a/xen/arch/x86/tboot.c +++ b/xen/arch/x86/tboot.c @@ -202,7 +202,7 @@ static void tboot_gen_domain_integrity(const uint8_t key[TB_KEY_SIZE], uint8_t nonce[16] = {}; vmac_ctx_t ctx; - vmac_set_key((uint8_t *)key, &ctx); + vmac_set_key(key, &ctx); for_each_domain( d ) { if ( !(d->options & XEN_DOMCTL_CDF_s3_integrity) ) @@ -241,7 +241,7 @@ static void tboot_gen_xenheap_integrity(const uint8_t key[TB_KEY_SIZE], uint8_t nonce[16] = {}; vmac_ctx_t ctx; - vmac_set_key((uint8_t *)key, &ctx); + vmac_set_key(key, &ctx); for ( mfn = 0; mfn < max_page; mfn++ ) { struct page_info *page = mfn_to_page(_mfn(mfn)); @@ -272,7 +272,7 @@ static void tboot_gen_frametable_integrity(const uint8_t key[TB_KEY_SIZE], uint8_t nonce[16] = {}; vmac_ctx_t ctx; - vmac_set_key((uint8_t *)key, &ctx); + vmac_set_key(key, &ctx); for ( sidx = 0; ; sidx = nidx ) { eidx = find_next_zero_bit(pdx_group_valid, max_idx, sidx); diff --git a/xen/crypto/vmac.c b/xen/crypto/vmac.c index f1f6d75f8eeb..c9914d2c7c1d 100644 --- a/xen/crypto/vmac.c +++ b/xen/crypto/vmac.c @@ -924,7 +924,7 @@ uint64_t vmac(unsigned char m[], /* ----------------------------------------------------------------------- */ -void vmac_set_key(unsigned char user_key[], vmac_ctx_t *ctx) +void vmac_set_key(const unsigned char user_key[], vmac_ctx_t *ctx) { uint64_t in[2] = {0}, out[2]; unsigned i; diff --git a/xen/include/crypto/vmac.h b/xen/include/crypto/vmac.h index 457f3f5dd6da..7574c4a3f328 100644 --- a/xen/include/crypto/vmac.h +++ b/xen/include/crypto/vmac.h @@ -161,7 +161,7 @@ uint64_t vhash(unsigned char m[], * When passed a VMAC_KEY_LEN bit user_key, this function initialazies ctx. * ----------------------------------------------------------------------- */ -void vmac_set_key(unsigned char user_key[], vmac_ctx_t *ctx); +void vmac_set_key(const unsigned char user_key[], vmac_ctx_t *ctx); /* --------------------------------------------------------------------- */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237618.1539927 (Exim 4.92) (envelope-from ) id 1vtYLC-0001mn-Ii; Fri, 20 Feb 2026 21:47:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237618.1539927; Fri, 20 Feb 2026 21:47:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLC-0001jf-BQ; Fri, 20 Feb 2026 21:47:14 +0000 Received: by outflank-mailman (input) for mailman id 1237618; Fri, 20 Feb 2026 21:47:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLA-0008IG-If for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:12 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b5bfbbb9-0ea5-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 22:47:10 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-480706554beso28511075e9.1 for ; Fri, 20 Feb 2026 13:47:10 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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Convert it to a real fallthrough (psedo)keyword. Elsewhere, insert breaks at the end of the default statements. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/pci/pci-access.c | 2 ++ xen/arch/arm/pci/pci-designware.c | 2 ++ xen/arch/arm/tee/optee.c | 1 + xen/arch/x86/mm/shadow/common.c | 2 +- 4 files changed, 6 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c index c0533c00c9a5..2b23d552bbfb 100644 --- a/xen/arch/arm/pci/pci-access.c +++ b/xen/arch/arm/pci/pci-access.c @@ -63,6 +63,7 @@ int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf, break; default: ASSERT_UNREACHABLE(); + break; } return 0; @@ -89,6 +90,7 @@ int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf, break; default: ASSERT_UNREACHABLE(); + break; } return 0; diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-designware.c index 6b85213f637b..902da19e8c98 100644 --- a/xen/arch/arm/pci/pci-designware.c +++ b/xen/arch/arm/pci/pci-designware.c @@ -48,6 +48,7 @@ static int dw_pcie_read(void __iomem *addr, unsigned int len, uint32_t *val) break; default: ASSERT_UNREACHABLE(); + break; } return 0; @@ -71,6 +72,7 @@ static int dw_pcie_write(void __iomem *addr, unsigned int len, uint32_t val) break; default: ASSERT_UNREACHABLE(); + break; } return 0; diff --git a/xen/arch/arm/tee/optee.c b/xen/arch/arm/tee/optee.c index 699e8d536862..f719d9d767ab 100644 --- a/xen/arch/arm/tee/optee.c +++ b/xen/arch/arm/tee/optee.c @@ -1206,6 +1206,7 @@ static void do_call_with_arg(struct optee_domain *ctx, default: /* Free any temporary shared buffers */ free_shm_buffers(ctx, call->xen_arg); + break; } put_std_call(ctx, call); diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 96986ee2553d..5834c265f76d 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1213,7 +1213,7 @@ void sh_destroy_shadow(struct domain *d, mfn_t smfn) #ifdef CONFIG_PV32 case SH_type_l2h_64_shadow: ASSERT(is_pv_32bit_domain(d)); - /* Fall through... */ + fallthrough; #endif case SH_type_l2_64_shadow: SHADOW_INTERNAL_NAME(sh_destroy_l2_shadow, 4)(d, smfn); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237620.1539944 (Exim 4.92) (envelope-from ) id 1vtYLE-0002Fi-80; Fri, 20 Feb 2026 21:47:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237620.1539944; Fri, 20 Feb 2026 21:47:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLD-0002DJ-ST; Fri, 20 Feb 2026 21:47:15 +0000 Received: by outflank-mailman (input) for mailman id 1237620; Fri, 20 Feb 2026 21:47:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLB-0008IG-LP for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:13 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b6834de7-0ea5-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 22:47:12 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-482f454be5bso33419825e9.0 for ; Fri, 20 Feb 2026 13:47:12 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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This could be fixed by inserting an "&& defined(_MSC_VER)" clause, but the whole block is entirely useless (it comments out the include of stdint) and the top of vmac.c pulls in xen/types.h specifically. Simply delete the block. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/include/crypto/vmac.h | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/xen/include/crypto/vmac.h b/xen/include/crypto/vmac.h index 7574c4a3f328..43fd288ae3bd 100644 --- a/xen/include/crypto/vmac.h +++ b/xen/include/crypto/vmac.h @@ -35,29 +35,6 @@ #define hz (400e6) mips */ -/* -------------------------------------------------------------------------- - * This implementation uses uint32_t and uint64_t as names for unsigned 32- - * and 64-bit integer types. These are defined in C99 stdint.h. The - * following may need adaptation if you are not running a C99 or - * Microsoft C environment. - * ----------------------------------------------------------------------- */ -#define VMAC_USE_STDINT 1 /* Set to zero if system has no stdint.h */ - -#if VMAC_USE_STDINT && !_MSC_VER /* Try stdint.h if non-Microsoft */ -#ifdef __cplusplus -#define __STDC_CONSTANT_MACROS -#endif -//#include -#elif (_MSC_VER) /* Microsoft C does not have stdint.h */ -typedef unsigned __int32 uint32_t; -typedef unsigned __int64 uint64_t; -#define UINT64_C(v) v ## UI64 -#else /* Guess sensibly - may need adaptation */ -typedef unsigned int uint32_t; -typedef unsigned long long uint64_t; -#define UINT64_C(v) v ## ULL -#endif - /* -------------------------------------------------------------------------- * This implementation supports two free AES implementations: OpenSSL's and * Paulo Barreto's. To use OpenSSL's, you will need to include the OpenSSL -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 21:47:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 21:47:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237619.1539950 (Exim 4.92) (envelope-from ) id 1vtYLE-0002NW-R4; Fri, 20 Feb 2026 21:47:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237619.1539950; Fri, 20 Feb 2026 21:47:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLE-0002KG-Cf; Fri, 20 Feb 2026 21:47:16 +0000 Received: by outflank-mailman (input) for mailman id 1237619; Fri, 20 Feb 2026 21:47:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYLB-0008Ew-Cs for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 21:47:13 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b61d39a9-0ea5-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 22:47:11 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-436356740e6so2654077f8f.2 for ; Fri, 20 Feb 2026 13:47:11 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: consulting@bugseng.com CC: Nicola Vetrini --- xen/arch/arm/pci/pci-access.c | 6 +++--- xen/arch/x86/include/asm/bootinfo.h | 2 +- xen/arch/x86/mm/shadow/multi.c | 2 +- xen/common/kimage.c | 11 ++++++----- xen/common/livepatch.c | 11 ++++++----- xen/crypto/vmac.c | 8 ++++---- xen/include/xen/libfdt/libfdt.h | 6 +++--- 7 files changed, 24 insertions(+), 22 deletions(-) diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c index 2b23d552bbfb..7bd6877596d4 100644 --- a/xen/arch/arm/pci/pci-access.c +++ b/xen/arch/arm/pci/pci-access.c @@ -16,7 +16,7 @@ #include #define INVALID_VALUE (~0U) -#define PCI_ERR_VALUE(len) GENMASK(0, len * 8) +#define PCI_ERR_VALUE(len) GENMASK(0, (len) * 8) static const struct pci_ops *get_ops(struct pci_host_bridge *bridge, pci_sbdf_t sbdf) @@ -139,14 +139,14 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned int reg, void pci_conf_write##size(pci_sbdf_t sbdf, \ unsigned int reg, type data) \ { \ - pci_config_write(sbdf, reg, size / 8, data); \ + pci_config_write(sbdf, reg, (size) / 8, data); \ } #define PCI_OP_READ(size, type) \ type pci_conf_read##size(pci_sbdf_t sbdf, \ unsigned int reg) \ { \ - return pci_config_read(sbdf, reg, size / 8); \ + return pci_config_read(sbdf, reg, (size) / 8); \ } PCI_OP_READ(8, uint8_t) diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h index 4f2cc5906e59..b3a6b2acf3ac 100644 --- a/xen/arch/x86/include/asm/bootinfo.h +++ b/xen/arch/x86/include/asm/bootinfo.h @@ -75,7 +75,7 @@ static inline unsigned int __init next_boot_module_index( #define for_each_boot_module_by_type(i, b, t) \ for ( (i) = first_boot_module_index(b, t); \ (i) <= (b)->nr_modules; \ - (i) = next_boot_module_index(b, t, i + 1) ) + (i) = next_boot_module_index(b, t, (i) + 1) ) #endif /* X86_BOOTINFO_H */ diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index 3bbaceec1287..9de60720db20 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -793,7 +793,7 @@ do { \ do { \ int __done = 0; \ _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, \ - ({ (__done = _done); }), _code); \ + ({ (__done = (_done)); }), _code); \ _sl1mfn = sh_next_page(_sl1mfn); \ if ( !__done ) \ _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code); \ diff --git a/xen/common/kimage.c b/xen/common/kimage.c index e1aec5a18a54..972301368443 100644 --- a/xen/common/kimage.c +++ b/xen/common/kimage.c @@ -491,11 +491,12 @@ static void kimage_terminate(struct kexec_image *image) * Call unmap_domain_page(ptr) after the loop exits. */ #define for_each_kimage_entry(image, ptr, entry) \ - for ( ptr = map_domain_page(_mfn(paddr_to_pfn(image->head))); \ - (entry = *ptr) && !(entry & IND_DONE); \ - ptr = (entry & IND_INDIRECTION) ? \ - (unmap_domain_page(ptr), map_domain_page(_mfn(paddr_to_pfn(entry)))) \ - : ptr + 1 ) + for ( (ptr) = map_domain_page(_mfn(paddr_to_pfn((image)->head))); \ + ((entry) = *(ptr)) && !((entry) & IND_DONE); \ + (ptr) = (((entry) & IND_INDIRECTION) \ + ? (unmap_domain_page(ptr), \ + map_domain_page(_mfn(paddr_to_pfn(entry)))) \ + : (ptr) + 1) ) static void kimage_free_entry(kimage_entry_t entry) { diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index 7446533c8cfb..63473925cafb 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -664,9 +664,10 @@ static inline int livepatch_check_expectations(const struct payload *payload) const struct livepatch_elf_sec *__sec = livepatch_elf_sec_by_name(elf, section_name); \ if ( !__sec ) \ break; \ - if ( !section_ok(elf, __sec, sizeof(*hook)) || __sec->sec->sh_size != sizeof(*hook) ) \ + if ( !section_ok(elf, __sec, sizeof(*(hook))) || \ + __sec->sec->sh_size != sizeof(*(hook)) ) \ return -EINVAL; \ - hook = __sec->addr; \ + (hook) = __sec->addr; \ } while (0) /* @@ -678,10 +679,10 @@ static inline int livepatch_check_expectations(const struct payload *payload) const struct livepatch_elf_sec *__sec = livepatch_elf_sec_by_name(elf, section_name); \ if ( !__sec ) \ break; \ - if ( !section_ok(elf, __sec, sizeof(*hook)) ) \ + if ( !section_ok(elf, __sec, sizeof(*(hook))) ) \ return -EINVAL; \ - hook = __sec->addr; \ - nhooks = __sec->sec->sh_size / sizeof(*hook); \ + (hook) = __sec->addr; \ + (nhooks) = __sec->sec->sh_size / sizeof(*(hook)); \ } while (0) static int prepare_payload(struct payload *payload, diff --git a/xen/crypto/vmac.c b/xen/crypto/vmac.c index c9914d2c7c1d..c7aa1e9be3b9 100644 --- a/xen/crypto/vmac.c +++ b/xen/crypto/vmac.c @@ -203,7 +203,7 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ #define nh_16(mp, kp, nw, rh, rl) \ { int i; uint64_t th, tl; \ rh = rl = 0; \ - for (i = 0; i < nw; i+= 2) { \ + for (i = 0; i < (nw); i+= 2) { \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i ],get64PE((mp)+i+1)+(kp)[i+1]);\ ADD128(rh,rl,th,tl); \ } \ @@ -211,7 +211,7 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ #define nh_16_2(mp, kp, nw, rh, rl, rh1, rl1) \ { int i; uint64_t th, tl; \ rh1 = rl1 = rh = rl = 0; \ - for (i = 0; i < nw; i+= 2) { \ + for (i = 0; i < (nw); i+= 2) { \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i ],get64PE((mp)+i+1)+(kp)[i+1]);\ ADD128(rh,rl,th,tl); \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i+2],get64PE((mp)+i+1)+(kp)[i+3]);\ @@ -223,7 +223,7 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ #define nh_vmac_nhbytes(mp, kp, nw, rh, rl) \ { int i; uint64_t th, tl; \ rh = rl = 0; \ - for (i = 0; i < nw; i+= 8) { \ + for (i = 0; i < (nw); i+= 8) { \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i ],get64PE((mp)+i+1)+(kp)[i+1]);\ ADD128(rh,rl,th,tl); \ MUL64(th,tl,get64PE((mp)+i+2)+(kp)[i+2],get64PE((mp)+i+3)+(kp)[i+3]);\ @@ -237,7 +237,7 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ #define nh_vmac_nhbytes_2(mp, kp, nw, rh, rl, rh1, rl1) \ { int i; uint64_t th, tl; \ rh1 = rl1 = rh = rl = 0; \ - for (i = 0; i < nw; i+= 8) { \ + for (i = 0; i < (nw); i+= 8) { \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i ],get64PE((mp)+i+1)+(kp)[i+1]);\ ADD128(rh,rl,th,tl); \ MUL64(th,tl,get64PE((mp)+i )+(kp)[i+2],get64PE((mp)+i+1)+(kp)[i+3]);\ diff --git a/xen/include/xen/libfdt/libfdt.h b/xen/include/xen/libfdt/libfdt.h index fabddbee8cec..1b09bba28eea 100644 --- a/xen/include/xen/libfdt/libfdt.h +++ b/xen/include/xen/libfdt/libfdt.h @@ -230,9 +230,9 @@ int fdt_next_subnode(const void *fdt, int offset); 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-20 22:46, Andrew Cooper wrote: > Elcair rejects __FUNCTION__ as nonstandard syntax and a R1.1 violation. > s/Elcair/ECLAIR/ > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- Reviewed-by: Nicola Vetrini > xen/arch/arm/acpi/boot.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/acpi/boot.c b/xen/arch/arm/acpi/boot.c > index db5085e15d84..4ac0fd8f51e8 100644 > --- a/xen/arch/arm/acpi/boot.c > +++ b/xen/arch/arm/acpi/boot.c > @@ -264,14 +264,14 @@ int __init acpi_boot_table_init(void) > if ( error ) > { > printk("%s: Unable to initialize table parser (%d)\n", > - __FUNCTION__, error); > + __func__, error); > goto disable; > } > > error = acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); > if ( error ) > { > - printk("%s: FADT not found (%d)\n", __FUNCTION__, error); > + printk("%s: FADT not found (%d)\n", __func__, error); > goto disable; > } -- Nicola Vetrini, B.Sc. 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-20 22:46, Andrew Cooper wrote: > * Move includes inside the header guards (D4.10) > * Use NULL in preference to 0 (R11.9) > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- > xen/arch/arm/pci/pci-designware.c | 2 +- > xen/arch/arm/pci/pci-designware.h | 5 ++--- > 2 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/pci/pci-designware.c > b/xen/arch/arm/pci/pci-designware.c > index 0bd67524ac8b..6b85213f637b 100644 > --- a/xen/arch/arm/pci/pci-designware.c > +++ b/xen/arch/arm/pci/pci-designware.c > @@ -285,7 +285,7 @@ void __iomem *dw_pcie_child_map_bus(struct > pci_host_bridge *bridge, > bridge->child_cfg->phys_addr, > busdev, > bridge->child_cfg->size); > if ( ret ) > - return 0; > + return NULL; > > return bridge->child_cfg->win + where; > } > diff --git a/xen/arch/arm/pci/pci-designware.h > b/xen/arch/arm/pci/pci-designware.h > index b9deb3b138ae..bd93dab6f2f1 100644 > --- a/xen/arch/arm/pci/pci-designware.h > +++ b/xen/arch/arm/pci/pci-designware.h > @@ -6,12 +6,11 @@ > * Based on xen/arch/arm/pci/pci-host-generic.c > */ > > -#include > -#include > - > #ifndef __PCI_DESIGNWARE_H__ > #define __PCI_DESIGNWARE_H__ > > +#include > +#include > > #define PCIE_ATU_VIEWPORT 0x900 > #define PCIE_ATU_REGION_OUTBOUND 0 -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Fri Feb 20 22:28:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 20 Feb 2026 22:28:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237741.1539988 (Exim 4.92) (envelope-from ) id 1vtYz3-0004rx-Pb; Fri, 20 Feb 2026 22:28:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237741.1539988; Fri, 20 Feb 2026 22:28:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYz3-0004rq-Ml; Fri, 20 Feb 2026 22:28:25 +0000 Received: by outflank-mailman (input) for mailman id 1237741; Fri, 20 Feb 2026 22:28:24 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtYz2-0004rk-Qc for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 22:28:24 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 775d93db-0eab-11f1-b164-2bf370ae4941; Fri, 20 Feb 2026 23:28:23 +0100 (CET) Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 0624C4EE7806; Fri, 20 Feb 2026 23:28:22 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 775d93db-0eab-11f1-b164-2bf370ae4941 Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1771626502; b=k2drEl+33ibwTdFLxCHf8ZfXf5FLxkevHpKPReJQAyfxttFSx11n4iRZTMzqirYwfHb0 wMo0Mv7iPG1Nd09Cryag94v1JyOztQ+By61oH5GW/68A/u3Zrm8jPefPUDw2d1NZCBEax a/z1Dpo5K4xT3gYoqbXt/XamkaS3i389QIBIRcmEOeAx0KxYGfNwAVdRSwD0CST1oz21V 7An2S5HZJL5sFiuhoLR/lZ/rrlCptklDtgVwfEK6o5tJCraBct1qwLNYHRWBPS4rl5qMz 7J66Rr4vbebANbchqz+aiObp3Hie1mLlG7rCuJbXaXDhjiBqO1fUXX5CesJYWxINVLjxY JLr8nNpWHEgR3RVaHu6qygzi/fja2g1gDKMpD2rD3GZdeVm1Q58+VO6rV4rrtgTPRH0Ck 5oRXiJ7KJqMHJ10afbYEQt71tKN+EY40jgrrV/e3+0ONHRoiYQN0Xstybz6OZcFFKbXgb IQX6196lOXi8sh9c/NNw1cIZEAF2tVuoikFjaIQs2Gx1K0CKaLL72cTYEuFORFekX/cLt wJCYMWL0YEzB/Dt5hPKUyktOKdRToWT+DKt3rFprbfPdcZON62AysLi84DFUdMA2BJTCJ j5YqqtkCI6z6+K1ZFKSw0r5JX4/LY0Y4V4OEK1Qb8aY4jN3E4gtG2KxuFftDc9o= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1771626502; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=zZn5QYlNeJIrV89Vh+0VBlA03d/Zh8ZaSlffBESY800=; b=LSsOboDPP69AEAsZ39HPOcBKbR+qfhFELXJlf+coHChJR2OJYj14ERDXfHFqh9f8BB5k TllRMJrLRUvoj3jxpFA0M9/EtlkPsD5xtuZwOKcNWVahRrsqKRqYoPsR8ZurC5+Xlvji3 KovcsF1fxi0302erofuskgIWiSq3gjb8H3F4tWIT1y14JSlg7wfaCt/SiatLMLf9gUy0G 9adrJdg9HmeokrLrns/YjO1QTBfX5vbOz30tIsj/rlnkWcA1KmchsoLoqT1Lv9OwSqZsm LWZTBC1Z8Kamy0mjVJNpefBAm+bNqaLHFfH/DazRvIlunqHQ2uL3jvUXgrloen9C6rTzD N3rokAZ9t3X9rMfbhdRY96q1jgYkM3iLrNM/Iq2+D7czOT1sFS0kDhXAFOMVDXtGmLwO9 ODzIxbHFC1jw4UPVQ/lzAxDZTeZK/1oF/adqZahyMNk+kFkEn9cPQu8szHlsD+TZkDqtB xwjP/nWjgr1GTQXQoPi8Iv2DwZWuQ/IRxperV6opyGOg9D6wE9cR/B1KnVNnlqT5o8/Gg Kpyr5gj2lqvJzAdZm1pfvxPrHHpO7nnqVME1Jq/zidZsMiQUISkww0N0rYpTz5ojoyNTz iK6Rd5n11XWoigWRMOlz3yaIjbBHOiRlNcxPZbTEfPPmy2bgokY+c1xPwbPOy90= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Fri, 20 Feb 2026 23:28:22 +0100 From: Nicola Vetrini To: Andrew Cooper Cc: Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" Subject: Re: [PATCH 09/12] x86/shadow: Rework write_atomic() call in shadow_write_entries() In-Reply-To: <20260220214653.3497384-10-andrew.cooper3@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-10-andrew.cooper3@citrix.com> Message-ID: X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-20 22:46, Andrew Cooper wrote: > Eclair complains of a side effect in a sizeof() expression (R13.6). > > write_atomic() only evaluates each parameter once, but rewrite the > expression > to less resemble entries in an obfuscation contest. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- > xen/arch/x86/mm/shadow/set.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/mm/shadow/set.c > b/xen/arch/x86/mm/shadow/set.c > index 8b670b6bb555..96ba2811077e 100644 > --- a/xen/arch/x86/mm/shadow/set.c > +++ b/xen/arch/x86/mm/shadow/set.c > @@ -62,8 +62,8 @@ shadow_write_entries(void *d, const void *s, unsigned > int entries, mfn_t mfn) > > ASSERT(IS_ALIGNED((unsigned long)dst, sizeof(*dst))); > > - for ( ; i < entries; i++ ) > - write_atomic(&dst++->l1, src++->l1); > + for ( ; i < entries; i++, dst++, src++ ) > + write_atomic(&dst->l1, src->l1); > > unmap_domain_page(map); > } -- Nicola Vetrini, B.Sc. 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-20 22:46, Andrew Cooper wrote: > sh_destroy_shadow() has a spelling of fallthrough which doesn't match > the > permitted pattern. Convert it to a real fallthrough (psedo)keyword. > > Elsewhere, insert breaks at the end of the default statements. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- > xen/arch/arm/pci/pci-access.c | 2 ++ > xen/arch/arm/pci/pci-designware.c | 2 ++ > xen/arch/arm/tee/optee.c | 1 + > xen/arch/x86/mm/shadow/common.c | 2 +- > 4 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/pci/pci-access.c > b/xen/arch/arm/pci/pci-access.c > index c0533c00c9a5..2b23d552bbfb 100644 > --- a/xen/arch/arm/pci/pci-access.c > +++ b/xen/arch/arm/pci/pci-access.c > @@ -63,6 +63,7 @@ int pci_generic_config_read(struct pci_host_bridge > *bridge, pci_sbdf_t sbdf, > break; > default: > ASSERT_UNREACHABLE(); > + break; > } > > return 0; > @@ -89,6 +90,7 @@ int pci_generic_config_write(struct pci_host_bridge > *bridge, pci_sbdf_t sbdf, > break; > default: > ASSERT_UNREACHABLE(); > + break; > } > > return 0; > diff --git a/xen/arch/arm/pci/pci-designware.c > b/xen/arch/arm/pci/pci-designware.c > index 6b85213f637b..902da19e8c98 100644 > --- a/xen/arch/arm/pci/pci-designware.c > +++ b/xen/arch/arm/pci/pci-designware.c > @@ -48,6 +48,7 @@ static int dw_pcie_read(void __iomem *addr, unsigned > int len, uint32_t *val) > break; > default: > ASSERT_UNREACHABLE(); > + break; > } > > return 0; > @@ -71,6 +72,7 @@ static int dw_pcie_write(void __iomem *addr, unsigned > int len, uint32_t val) > break; > default: > ASSERT_UNREACHABLE(); > + break; > } > > return 0; > diff --git a/xen/arch/arm/tee/optee.c b/xen/arch/arm/tee/optee.c > index 699e8d536862..f719d9d767ab 100644 > --- a/xen/arch/arm/tee/optee.c > +++ b/xen/arch/arm/tee/optee.c > @@ -1206,6 +1206,7 @@ static void do_call_with_arg(struct optee_domain > *ctx, > default: > /* Free any temporary shared buffers */ > free_shm_buffers(ctx, call->xen_arg); > + break; > } > > put_std_call(ctx, call); > diff --git a/xen/arch/x86/mm/shadow/common.c > b/xen/arch/x86/mm/shadow/common.c > index 96986ee2553d..5834c265f76d 100644 > --- a/xen/arch/x86/mm/shadow/common.c > +++ b/xen/arch/x86/mm/shadow/common.c > @@ -1213,7 +1213,7 @@ void sh_destroy_shadow(struct domain *d, mfn_t > smfn) > #ifdef CONFIG_PV32 > case SH_type_l2h_64_shadow: > ASSERT(is_pv_32bit_domain(d)); > - /* Fall through... */ > + fallthrough; > #endif > case SH_type_l2_64_shadow: > SHADOW_INTERNAL_NAME(sh_destroy_l2_shadow, 4)(d, smfn); -- Nicola Vetrini, B.Sc. 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-20 22:46, Andrew Cooper wrote: > Fixing Rule 20.7 violations. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Two minor nits below > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- > xen/arch/arm/pci/pci-access.c | 6 +++--- > xen/arch/x86/include/asm/bootinfo.h | 2 +- > xen/arch/x86/mm/shadow/multi.c | 2 +- > xen/common/kimage.c | 11 ++++++----- > xen/common/livepatch.c | 11 ++++++----- > xen/crypto/vmac.c | 8 ++++---- > xen/include/xen/libfdt/libfdt.h | 6 +++--- > 7 files changed, 24 insertions(+), 22 deletions(-) > > diff --git a/xen/arch/arm/pci/pci-access.c > b/xen/arch/arm/pci/pci-access.c > index 2b23d552bbfb..7bd6877596d4 100644 > --- a/xen/arch/arm/pci/pci-access.c > +++ b/xen/arch/arm/pci/pci-access.c > @@ -16,7 +16,7 @@ > #include > > #define INVALID_VALUE (~0U) > -#define PCI_ERR_VALUE(len) GENMASK(0, len * 8) > +#define PCI_ERR_VALUE(len) GENMASK(0, (len) * 8) > > static const struct pci_ops *get_ops(struct pci_host_bridge *bridge, > pci_sbdf_t sbdf) > @@ -139,14 +139,14 @@ static void pci_config_write(pci_sbdf_t sbdf, > unsigned int reg, > void pci_conf_write##size(pci_sbdf_t sbdf, \ > unsigned int reg, type data) \ > { \ > - pci_config_write(sbdf, reg, size / 8, data); \ > + pci_config_write(sbdf, reg, (size) / 8, data); \ > } > > #define PCI_OP_READ(size, type) \ > type pci_conf_read##size(pci_sbdf_t sbdf, \ > unsigned int reg) \ > { \ > - return pci_config_read(sbdf, reg, size / 8); \ > + return pci_config_read(sbdf, reg, (size) / 8); \ > } > > PCI_OP_READ(8, uint8_t) > diff --git a/xen/arch/x86/include/asm/bootinfo.h > b/xen/arch/x86/include/asm/bootinfo.h > index 4f2cc5906e59..b3a6b2acf3ac 100644 > --- a/xen/arch/x86/include/asm/bootinfo.h > +++ b/xen/arch/x86/include/asm/bootinfo.h > @@ -75,7 +75,7 @@ static inline unsigned int __init > next_boot_module_index( > #define for_each_boot_module_by_type(i, b, t) \ > for ( (i) = first_boot_module_index(b, t); \ > (i) <= (b)->nr_modules; \ > - (i) = next_boot_module_index(b, t, i + 1) ) > + (i) = next_boot_module_index(b, t, (i) + 1) ) > > #endif /* X86_BOOTINFO_H */ > > diff --git a/xen/arch/x86/mm/shadow/multi.c > b/xen/arch/x86/mm/shadow/multi.c > index 3bbaceec1287..9de60720db20 100644 > --- a/xen/arch/x86/mm/shadow/multi.c > +++ b/xen/arch/x86/mm/shadow/multi.c > @@ -793,7 +793,7 @@ do { > \ > do { > \ > int __done = 0; > \ > _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, > \ > - ({ (__done = _done); }), _code); > \ > + ({ (__done = (_done)); }), _code); > \ > _sl1mfn = sh_next_page(_sl1mfn); > \ > if ( !__done ) > \ > _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code); > \ > diff --git a/xen/common/kimage.c b/xen/common/kimage.c > index e1aec5a18a54..972301368443 100644 > --- a/xen/common/kimage.c > +++ b/xen/common/kimage.c > @@ -491,11 +491,12 @@ static void kimage_terminate(struct kexec_image > *image) > * Call unmap_domain_page(ptr) after the loop exits. > */ > #define for_each_kimage_entry(image, ptr, entry) > \ > - for ( ptr = map_domain_page(_mfn(paddr_to_pfn(image->head))); > \ > - (entry = *ptr) && !(entry & IND_DONE); > \ > - ptr = (entry & IND_INDIRECTION) ? > \ > - (unmap_domain_page(ptr), > map_domain_page(_mfn(paddr_to_pfn(entry)))) \ > - : ptr + 1 ) > + for ( (ptr) = map_domain_page(_mfn(paddr_to_pfn((image)->head))); > \ > + ((entry) = *(ptr)) && !((entry) & IND_DONE); > \ > + (ptr) = (((entry) & IND_INDIRECTION) > \ > + ? (unmap_domain_page(ptr), > \ > + map_domain_page(_mfn(paddr_to_pfn(entry)))) > \ > + : (ptr) + 1) ) > > static void kimage_free_entry(kimage_entry_t entry) > { > diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c > index 7446533c8cfb..63473925cafb 100644 > --- a/xen/common/livepatch.c > +++ b/xen/common/livepatch.c > @@ -664,9 +664,10 @@ static inline int > livepatch_check_expectations(const struct payload *payload) > const struct livepatch_elf_sec *__sec = > livepatch_elf_sec_by_name(elf, section_name); \ > if ( !__sec ) > \ > break; > \ > - if ( !section_ok(elf, __sec, sizeof(*hook)) || __sec->sec->sh_size > != sizeof(*hook) ) \ > + if ( !section_ok(elf, __sec, sizeof(*(hook))) || > \ > + __sec->sec->sh_size != sizeof(*(hook)) ) > \ > return -EINVAL; > \ > - hook = __sec->addr; > \ > + (hook) = __sec->addr; > \ This is not strictly needed, if not for consistency > } while (0) > > /* > @@ -678,10 +679,10 @@ static inline int > livepatch_check_expectations(const struct payload *payload) > const struct livepatch_elf_sec *__sec = > livepatch_elf_sec_by_name(elf, section_name); \ > if ( !__sec ) > \ > break; > \ > - if ( !section_ok(elf, __sec, sizeof(*hook)) ) > \ > + if ( !section_ok(elf, __sec, sizeof(*(hook))) ) > \ > return -EINVAL; > \ > - hook = __sec->addr; > \ > - nhooks = __sec->sec->sh_size / sizeof(*hook); > \ > + (hook) = __sec->addr; > \ > + (nhooks) = __sec->sec->sh_size / sizeof(*(hook)); > \ same as above > } while (0) > > static int prepare_payload(struct payload *payload, > diff --git a/xen/crypto/vmac.c b/xen/crypto/vmac.c > index c9914d2c7c1d..c7aa1e9be3b9 100644 > --- a/xen/crypto/vmac.c > +++ b/xen/crypto/vmac.c > @@ -203,7 +203,7 @@ const uint64_t mpoly = > UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ > #define nh_16(mp, kp, nw, rh, rl) > \ > { int i; uint64_t th, tl; > \ > rh = rl = 0; > \ > - for (i = 0; i < nw; i+= 2) { > \ > + for (i = 0; i < (nw); i+= 2) { > \ > MUL64(th,tl,get64PE((mp)+i )+(kp)[i > ],get64PE((mp)+i+1)+(kp)[i+1]);\ > ADD128(rh,rl,th,tl); > \ > } > \ > @@ -211,7 +211,7 @@ const uint64_t mpoly = > UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ > #define nh_16_2(mp, kp, nw, rh, rl, rh1, rl1) > \ > { int i; uint64_t th, tl; > \ > rh1 = rl1 = rh = rl = 0; > \ > - for (i = 0; i < nw; i+= 2) { > \ > + for (i = 0; i < (nw); i+= 2) { > \ > MUL64(th,tl,get64PE((mp)+i )+(kp)[i > ],get64PE((mp)+i+1)+(kp)[i+1]);\ > ADD128(rh,rl,th,tl); > \ > MUL64(th,tl,get64PE((mp)+i > )+(kp)[i+2],get64PE((mp)+i+1)+(kp)[i+3]);\ > @@ -223,7 +223,7 @@ const uint64_t mpoly = > UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ > #define nh_vmac_nhbytes(mp, kp, nw, rh, rl) > \ > { int i; uint64_t th, tl; > \ > rh = rl = 0; > \ > - for (i = 0; i < nw; i+= 8) { > \ > + for (i = 0; i < (nw); i+= 8) { > \ > MUL64(th,tl,get64PE((mp)+i )+(kp)[i > ],get64PE((mp)+i+1)+(kp)[i+1]);\ > ADD128(rh,rl,th,tl); > \ > > MUL64(th,tl,get64PE((mp)+i+2)+(kp)[i+2],get64PE((mp)+i+3)+(kp)[i+3]);\ > @@ -237,7 +237,7 @@ const uint64_t mpoly = > UINT64_C(0x1fffffff1fffffff); /* Poly key mask */ > #define nh_vmac_nhbytes_2(mp, kp, nw, rh, rl, rh1, rl1) > \ > { int i; uint64_t th, tl; > \ > rh1 = rl1 = rh = rl = 0; > \ > - for (i = 0; i < nw; i+= 8) { > \ > + for (i = 0; i < (nw); i+= 8) { > \ > MUL64(th,tl,get64PE((mp)+i )+(kp)[i > ],get64PE((mp)+i+1)+(kp)[i+1]);\ > ADD128(rh,rl,th,tl); > \ > MUL64(th,tl,get64PE((mp)+i > )+(kp)[i+2],get64PE((mp)+i+1)+(kp)[i+3]);\ > diff --git a/xen/include/xen/libfdt/libfdt.h > b/xen/include/xen/libfdt/libfdt.h > index fabddbee8cec..1b09bba28eea 100644 > --- a/xen/include/xen/libfdt/libfdt.h > +++ b/xen/include/xen/libfdt/libfdt.h > @@ -230,9 +230,9 @@ int fdt_next_subnode(const void *fdt, int offset); > * literal. > */ > #define fdt_for_each_subnode(node, fdt, parent) \ > - for (node = fdt_first_subnode(fdt, parent); \ > - node >= 0; \ > - node = fdt_next_subnode(fdt, node)) > + for ((node) = fdt_first_subnode(fdt, parent); \ > + (node) >= 0; \ > + (node) = fdt_next_subnode(fdt, node)) > > > /**********************************************************************/ > /* General functions > */ -- Nicola Vetrini, B.Sc. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PpCVcIp7D+mGl/T9fsvF3Qn0JK1LK02JSrC+RyzhZ2RG+82Jqq7FDE37riW5t1hko3VAsbXqHGjTqXU1AnZsesZqDJdkPq50pYu7K3E6zQGABA8F782i7Ds/bYm8wYzJOvAa+U1ZdlSrOWpcNqneOVU0MSmeaikFaxk+p1K2UUHw5MRnix+uLMR6wRK0Ms6O/pUVCH7esKFaUScmvsd+VhBbGZsfLrQEy9oeSXzdc7uemCi4pgvaCG3VwhXFFmyCvvj6bRXtZDconf1ZmLOUm3ycslemhTM6Nge8hdyXKuZTm4vBsVNBfN2KzKXbEira/hmEXXvsAZkGrWoDiwAg1W8PE+xp/YoGzmSKUgcKkEq+++M5D6FgRuiyGeENXAvQozDB19cMiKfaQVMVpeqXc9C1vMh0f069j+x5Ptlt7iB7xVjRU/I/bl2LOdnEEObe X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Feb 2026 02:06:32.0970 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bea8cbcb-3bda-4499-2d29-08de70edd553 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6308 On 2026-02-16 06:56, Jan Beulich wrote: > The records reported used to contain Linux enumerators. We first broke > that connection when purging unused ones, and then again when switching to > the bit mask forms. > > Fixes: 408413051144 ("x86/cpu: Drop unused X86_VENDOR_* values") > Fixes: 0cd074144cbb ("x86/cpu: Renumber X86_VENDOR_* to form a bitmap") > Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk From xen-devel-bounces@lists.xenproject.org Sat Feb 21 11:26:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 21 Feb 2026 11:26:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237900.1540028 (Exim 4.92) (envelope-from ) id 1vtl88-0001td-J0; Sat, 21 Feb 2026 11:26:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237900.1540028; Sat, 21 Feb 2026 11:26:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtl88-0001tW-Fd; Sat, 21 Feb 2026 11:26:36 +0000 Received: by outflank-mailman (input) for mailman id 1237900; Sat, 21 Feb 2026 11:26:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtl87-0001tQ-12 for xen-devel@lists.xenproject.org; Sat, 21 Feb 2026 11:26:35 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vtl7z-002iys-2J; Sat, 21 Feb 2026 11:26:27 +0000 Received: from [2a02:8012:3a1:0:31fa:1b47:3c78:2265] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vtl7z-00HZkC-1B; Sat, 21 Feb 2026 11:26:27 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=Ie+2jC+rcU0p3EKMOSfhN+nSJwx8/0eWPZeDhh1gTO0=; b=QJTAA4iFp/lXJGfm4nzb5j4xN+ mjryiKDlV6dqzGOAigvHkMZxLryq0Tz3sSNLuwPngvRhpouZjqEXRP7pPhlU5ByO6BXIElMC7dIo/ csp+TXAH6zyM3eG9206IUI5OYAIlayYsTit/dR+wZgvlCxFTqIiFQvcD3gZU2Yp0Dpd0=; Message-ID: <8e5e351d-47fe-4a68-a611-df72e3c5f246@xen.org> Date: Sat, 21 Feb 2026 11:26:24 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: tighten translate_get_page() Content-Language: en-GB To: "Orzel, Michal" , Jan Beulich Cc: Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Oleksii Kurochko , "xen-devel@lists.xenproject.org" References: <1d898900-1072-4ea6-ac4c-1262905cab29@suse.com> <9163d0b9-f77e-4c13-b986-2d890bdf8ccd@suse.com> <526d338e-8648-4f90-8006-35c639bfa6bd@amd.com> From: Julien Grall In-Reply-To: <526d338e-8648-4f90-8006-35c639bfa6bd@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Michal, On 18/02/2026 08:36, Orzel, Michal wrote: >> But that's not correct for cases where share_xen_page_with_privileged_guest() >> is passed SHARE_ro. XENMAPSPACE_gmfn_foreign requests have to result in r/o >> mappings in that case. > Yes. Therefore, on Arm: > - p2m_ram_ro is never stored in P2M tables for normal domains p2m_set_permission() is able to deal with p2m_ram_ro. So this could in theory happen. > - it's only used by get_page_from_gfn() for DOMID_XEN pages > - it's used as a signal to install p2m_map_foreign_ro mappings > > The code should stay as is then and we could modify the comment to say: > /* Read-only RAM; only used for DOMID_XEN */ With what I wrote above, I don't think we should add such comment. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sat Feb 21 11:57:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 21 Feb 2026 11:57:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1237912.1540039 (Exim 4.92) (envelope-from ) id 1vtlc8-0005qC-SI; Sat, 21 Feb 2026 11:57:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1237912.1540039; Sat, 21 Feb 2026 11:57:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtlc8-0005q4-P8; Sat, 21 Feb 2026 11:57:36 +0000 Received: by outflank-mailman (input) for mailman id 1237912; Sat, 21 Feb 2026 11:57:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtlc7-0005py-JH for xen-devel@lists.xenproject.org; Sat, 21 Feb 2026 11:57:35 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vtlc7-002jX2-0G; Sat, 21 Feb 2026 11:57:35 +0000 Received: from [2a02:8012:3a1:0:31fa:1b47:3c78:2265] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vtlc6-0000YC-2k; Sat, 21 Feb 2026 11:57:34 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=ilZyp0t5vDwXdJuMj+0RKEbkM9xQjkzffh24FsW21yY=; b=yzE5DvSkCR1YppZGIjvU/A2b+d 0avi4mEO8hMeBEg0YH+xEv+WpStdGpL9skNUA43GBaiCkh37/X8OyNwPI32W799O/u3BwMd/T/L15 RD9ujKij2CzYG0Bg2BbSDZNvucaWC7CBdfCH97ClY5G3z1Eh9a1OEbthcYa3omW6+KVs=; Message-ID: Date: Sat, 21 Feb 2026 11:57:32 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Fix memory leak in xenmem_add_to_physmap_one Content-Language: en-GB To: Michal Orzel , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk , Xenia Ragiadakou References: <20260205125820.116555-1-michal.orzel@amd.com> From: Julien Grall In-Reply-To: <20260205125820.116555-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Michal, For the subject title and part of the code, "memory leak" tends to imply the memory is lost forever and therefore can never be recovered. AFAIU, in your case, the memory will be freed when the domain is destroyed. I would suggest to clarify it so it doesn't sound like a security issue. What about: "xen/arm: mm: Release the old page reference in xenmem_add_to_physmap_one()" On 05/02/2026 12:58, Michal Orzel wrote: > When a guest maps pages via XENMEM_add_to_physmap to a GFN that already > has an existing mapping, the old page at that GFN was not being removed, > causing a memory leak. This affects all mapping spaces including > XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and > XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain > destruction. > > Add logic to remove the previously mapped page before creating the new > mapping, matching the x86 implementation approach. > > Additionally, skip removal if the same MFN is being remapped. Can you explain why we skip the removal but not the insertion in this case? > > Signed-off-by: Michal Orzel > --- > I'm not sure where to point the Fixes tag to. > --- > xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- > 1 file changed, 29 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index 6df8b616e464..b9f1a493dcd7 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( > unsigned long idx, > gfn_t gfn) > { > - mfn_t mfn = INVALID_MFN; > + mfn_t mfn = INVALID_MFN, mfn_old; > int rc; > p2m_type_t t; > struct page_info *page = NULL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > > switch ( space ) > { > @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( > return -ENOSYS; > } > > + /* > + * Remove previously mapped page if it was present, to avoid leaking > + * memory. > + */ > + mfn_old = gfn_to_mfn(d, gfn); I saw Jan mentionned the fact that we have two section with the P2M lock taken. But isn't it in fact 3 sections as gfn_to_mfn(d, gfn) also take a lock? I am not against the idea of not solving the locking right now. But I think it would at least be good to document it so this doesn't come as a surprise. > + > + if ( mfn_valid(mfn_old) ) > + { > + if ( is_special_page(mfn_to_page(mfn_old)) ) > + { > + /* Just unmap, don't free */ > + p2m_write_lock(p2m); > + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, > + p2m_invalid, p2m->default_access); > + p2m_write_unlock(p2m); > + if ( rc ) > + return rc; For here and the second "return" statement below. Above callers may have taken a reference on the new page. So shouldn't we drop it like this is done at the end of the function? > + } > + else if ( !mfn_eq(mfn, mfn_old) ) > + { > + /* Normal domain memory is freed, to avoid leaking memory */ Based on the thread with Jan, is this statement actually correct? Could we reach this call with an MMIO (or event foreign mapping). In which case, I am guessing we could fail? If so, is this the intended behavior change? Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Mon Feb 23 07:26:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 07:26:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238445.1540052 (Exim 4.92) (envelope-from ) id 1vuQKj-0003s9-Lc; Mon, 23 Feb 2026 07:26:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238445.1540052; Mon, 23 Feb 2026 07:26:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuQKj-0003s2-J0; Mon, 23 Feb 2026 07:26:21 +0000 Received: by outflank-mailman (input) for mailman id 1238445; Mon, 23 Feb 2026 07:26:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuQKi-0003ru-RL for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 07:26:20 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ebf18e95-1088-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 08:26:08 +0100 (CET) Received: from [192.168.1.170] (net-2-38-49-5.cust.vodafonedsl.it [2.38.49.5]) (Authenticated sender: roberto) by support.bugseng.com (Postfix) with ESMTPSA id A33434EE77F9; Mon, 23 Feb 2026 08:26:06 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ebf18e95-1088-11f1-9ccf-f158ae23cfc8 Authentication-Results: bugseng.com; arc=none smtp.remote-ip=2.38.49.5 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1771831567; b=TZNyPqrNVKcx7wLIz4awO+SMrLrBvy3a6WkyVgYYSVvz8Pc7YqLJPzDNML2cmCBZj9Qf EKP1o2JqLO18F/bJatqXvJpO0T0kI4GCoVP6B9VxTDxxbSKSIFm709xxSpya4kiG4dHZO 21ArhJriWvoXkX8Z3dDsqS7K7SKLLV0Q0j/ON4H0Aqu06W287cw2BVROwCfIjTq4uHlIh XGN5fiAEW5sNEGwPk0DRyw12GVoowoXJwpE+BWFs5xn4ywmv6GpIn47Zv+8AGagBaGojQ VdTIlqJsNnrmkv3en89J8P0q8xejjVEn0TWUSjSs3kcVlVia05wBbAukpvoxk7uTAfZlX cyKTvQ6vPy3CuraSFUbkJnIQzlsepL72wsNVBbUrttj+NmKYjmbTSCIEC2t5QKnyO5Dye v0JTwwQVwPzUqih2c1TOp5piF1mO3BLDIrZtSu22ufc/tEWdp3ifEopwUUcfurBrcaL9R +T0wOgd7RSnwVZM01UGW8Unn8P53CI5yLVNnIaXWblsPNr87ZS661+YQg/0dJR6a+I4Ku e8mXAgv9Bnc4ROne6/K6MY1jK4LQfpZVDADulxgIAsK4tq1TXmaLBim+KkG3GBYkGRFWN E67Q/sbtsy51yLBV4CYSLF9WBQx15JaD4kFznRqnNEr7JWKC8ifYnmSueX/KnH0= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1771831567; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:Cc:References: Content-Language:From:In-Reply-To:Content-Type: Content-Transfer-Encoding; bh=DwE/1ASKJC5tWZ7jTRV4LXXRfDVeXh2O3vipPCqXy38=; b=EXeCL+Z9oKZUs0oewbvReI7K6Kc5pVxXeJ79u8/F874RhnDgNfQWULT16SNvXbaX8wP0 thNSxpnGpGO/ILIFHQiv7H204P7Dt6/SbJ4ev/jpqTN72Q1rw566h4Y9MLfU3Qfcgs1Xy hsBtFcRVQdiVZX86N8BaD4wlGUTQ3EPJu+4v0JbHFIUHBXkO+3HRKMBAi6bqNczycBtfN lDQl6oDHTZd6dmO7rMDxg/iabFvFycztM/6r9Gmrdc1xzQCGFPNNB8Ur4vXDgl4CkUlTV 1xQw/kryspVCPvgmANrDt3gLn98I1aGM2LcYE6nH+HKWpxr4lNmq83m0EDdCJjkyjEQ2C /BCPMVE8W/iiM2Eo8wRwc+9NPnHbyys02RX0ILuYIESvLfjVS+b5AXuH9fBbUI1wLSP52 rdwdR2kiqXQ/uDJ/8EivZsgunfSQrCVrK6qi7V653DS2pn0bGeBkF6Z7zN15rCuwHSIgv dJALSaf3D93MOpJrqF7wNVayAUh26oaZj1KxOTXNlX6YmeU9b3wfSYb1dV+DL5UUNb8vl QokHbjmpqLQAEzCYMMWbpwmhxjYdiFdoiO2tmf0+N/4gOj7em2JGSKP4Uy7Pyw/H65EIj 6ZzikIGAZ0dCDKJw3fiWEJ1MOq/2PihkTW+jAhDdlnn7X1/gf1sWmccMEc+SYpc= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=2.38.49.5 Message-ID: <0148ea9f-6486-44a1-b4dd-47af7c978351@bugseng.com> Date: Mon, 23 Feb 2026 08:26:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/12] x86/shadow: Rework write_atomic() call in shadow_write_entries() To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-10-andrew.cooper3@citrix.com> Content-Language: en-US From: Roberto Bagnara In-Reply-To: <20260220214653.3497384-10-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 20/02/26 22:46, Andrew Cooper wrote: > Eclair complains of a side effect in a sizeof() expression (R13.6). I disagree with comments of the form "Eclair complains" used whereas the right thing to say is, e.g.: sizeof() expressions with "potential side effects" violate MISRA C:2012 + AMD2 Rule 13.6, for which each function call is a potential side effect or Take out potential side effects from sizeof() as mandated by MISRA C:2012 + AMD2 Rule 13.6. Note that in recent versions of MISRA C that rule is no longer mandatory. More generally, note also that, IMHO, switching to a more modern version of MISRA C would simplify compliance. BTW: the correct spelling is "ECLAIR", all capitals. > write_atomic() only evaluates each parameter once, but rewrite the expression > to less resemble entries in an obfuscation contest. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini > --- > xen/arch/x86/mm/shadow/set.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/mm/shadow/set.c b/xen/arch/x86/mm/shadow/set.c > index 8b670b6bb555..96ba2811077e 100644 > --- a/xen/arch/x86/mm/shadow/set.c > +++ b/xen/arch/x86/mm/shadow/set.c > @@ -62,8 +62,8 @@ shadow_write_entries(void *d, const void *s, unsigned int entries, mfn_t mfn) > > ASSERT(IS_ALIGNED((unsigned long)dst, sizeof(*dst))); > > - for ( ; i < entries; i++ ) > - write_atomic(&dst++->l1, src++->l1); > + for ( ; i < entries; i++, dst++, src++ ) > + write_atomic(&dst->l1, src->l1); > > unmap_domain_page(map); > } From xen-devel-bounces@lists.xenproject.org Mon Feb 23 08:05:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 08:05:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238462.1540063 (Exim 4.92) (envelope-from ) id 1vuQwT-0000uU-L5; Mon, 23 Feb 2026 08:05:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238462.1540063; Mon, 23 Feb 2026 08:05:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuQwT-0000uN-I1; Mon, 23 Feb 2026 08:05:21 +0000 Received: by outflank-mailman (input) for mailman id 1238462; Mon, 23 Feb 2026 08:05:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuQwS-0000uH-8M for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 08:05:20 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 620c3d5f-108e-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 09:05:14 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-48375f10628so24590355e9.1 for ; Mon, 23 Feb 2026 00:05:14 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 00:05:13 -0800 (PST) Message-ID: <340104fc-7c31-42e6-aec3-4fda0f527aa6@suse.com> Date: Mon, 23 Feb 2026 09:05:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/shadow: don't use #if in macro invocations To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <23951625-939c-4658-8146-84c1f12381d0@suse.com> <24e8dd35-114d-4ba8-aa92-dad7cbcbd37b@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <24e8dd35-114d-4ba8-aa92-dad7cbcbd37b@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 16:29, Andrew Cooper wrote: > On 18/02/2026 9:03 am, Jan Beulich wrote: >> As per the standard this is UB, i.e. we're building on a defacto extension >> in the compilers we use. Misra C:2012 rule 20.6 disallows this altogether, >> though. Use helper always-inline functions instead. >> >> In sh_audit_l1_table(), along with reducing the scope of "gfn", which now >> isn't used anymore by the if() side of the conditional, also reduce the >> scope of two other adjacent variables. >> >> For audit_magic() note that both which parameters are needed and what >> their types are is attributed to AUDIT_FAIL() accessing variables which >> aren't passed as arguments to it. >> >> No functional change intended. Of course codegen does change with this, >> first and foremost in register allocation. >> >> Reported-by: Andrew Cooper >> Signed-off-by: Jan Beulich > > I included this patch on an interim branch of other MISRA fixes of mine > to get a run. > > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/13198988953 > > There's one more violation still to fix: > >     if ( unlikely((level == 1) >                   && sh_mfn_is_a_page_table(target_mfn) > #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC ) >                   /* Unless the page is out of sync and the guest is >                      writing to it. */ >                   && !(mfn_oos_may_write(target_mfn) >                        && (ft == ft_demand_write)) > #endif /* OOS */ >                   ) ) >         sflags &= ~_PAGE_RW; > > > > I also looked at this one previously.  Making mfn_oos_may_write() > visible outside of SHOPT_OUT_OF_SYNC is quite invasive. We could simply add a stub returning constant true for the !OOS case. > Here, I suggest dropping the unlikely() as the easiest fix.  It's almost > certainly useless anyway. Especially when used around an && expression. I may want to go a little further there, if already we need to touch this, combining the two adjacent "level == 1" checks: if ( level == 1 ) { /* Protect guest page tables. */ if ( unlikely(sh_mfn_is_a_page_table(target_mfn)) #if SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC /* * Unless the page is out of sync and the guest is writing to it. */ && (ft != ft_demand_write || !mfn_oos_may_write(target_mfn)) #endif /* OOS */ ) sflags &= ~_PAGE_RW; /* * paging_mode_log_dirty support * * Only allow the guest write access to a page a) on a demand fault, * or b) if the page is already marked as dirty. * * (We handle log-dirty entirely inside the shadow code, without using * the p2m_ram_logdirty p2m type: only HAP uses that.) */ if ( unlikely(paging_mode_log_dirty(d)) && !mmio_mfn ) { if ( ft & FETCH_TYPE_WRITE ) paging_mark_dirty(d, target_mfn); else if ( (sflags & _PAGE_RW) && !paging_mfn_is_dirty(d, target_mfn) ) sflags &= ~_PAGE_RW; } } Thoughts? The two different ways of checking for "guest is writing" also look somewhat unhelpful. But there's yet another "ft & FETCH_TYPE_WRITE" elsewhere, so it may want to be a separate patch to switch to uniformly comparing against ft_demand_write. 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Mon, 23 Feb 2026 00:11:02 -0800 (PST) Message-ID: <101686ff-36d6-4a96-803b-57a6ddd03559@suse.com> Date: Mon, 23 Feb 2026 09:11:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 06/12] x86/shadow: restrict OOS allocation to when it's really needed To: Andrew Cooper Cc: Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , "xen-devel@lists.xenproject.org" References: <184df995-e668-1cea-6f9f-8e79a1ffcbbd@suse.com> <3c05fb6c-f71e-1b86-6146-96f2b3f3c9ae@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 16:06, Andrew Cooper wrote: > On 16/05/2023 8:40 am, Jan Beulich wrote: >> PV domains won't use it, and even HVM ones won't when OOS is turned off >> for them. There's therefore no point in putting extra pressure on the >> (limited) pool of memory. >> >> While there also zap the sh_type_to_size[] entry when OOS is disabled >> altogether. >> >> Signed-off-by: Jan Beulich >> --- >> v3: New. >> >> --- a/xen/arch/x86/mm/shadow/common.c >> +++ b/xen/arch/x86/mm/shadow/common.c >> @@ -61,7 +61,9 @@ const uint8_t sh_type_to_size[] = { >> [SH_type_l4_64_shadow] = 1, >> [SH_type_p2m_table] = 1, >> [SH_type_monitor_table] = 1, >> +#if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) >> [SH_type_oos_snapshot] = 1, >> +#endif >> }; >> #endif /* CONFIG_HVM */ >> >> @@ -1771,7 +1773,8 @@ static void sh_update_paging_modes(struc >> #endif /* (SHADOW_OPTIMIZATIONS & SHOPT_VIRTUAL_TLB) */ >> >> #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) >> - if ( mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) >> + if ( !(d->options & XEN_DOMCTL_CDF_oos_off) && >> + mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) >> { >> int i; > > I've never seen XEN_DOMCTL_CDF_oos_off used.  Xapi has no plumbing for > this, and xl only inherited it from xend. > > At this point, OOS is the tested path and OOS_OFF is the untested path.  > I think we should remove the flag and let OOS be unconditional like all > the other shadow optimisations. It being a guest config setting, I'm hesitant. Maybe we should actually make sure it's tested, so that in the case it's needed it could be named as a mitigation for an XSA? Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 08:16:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 08:16:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238480.1540083 (Exim 4.92) (envelope-from ) id 1vuR7O-00031I-Rh; Mon, 23 Feb 2026 08:16:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238480.1540083; Mon, 23 Feb 2026 08:16:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuR7O-00031B-Nn; Mon, 23 Feb 2026 08:16:38 +0000 Received: by outflank-mailman (input) for mailman id 1238480; Mon, 23 Feb 2026 08:16:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuR7N-000315-9A for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 08:16:37 +0000 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [2a00:1450:4864:20::42a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f81972e9-108f-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 09:16:35 +0100 (CET) Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-4359a302794so2953819f8f.1 for ; Mon, 23 Feb 2026 00:16:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 00:16:35 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 09:16:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 06/12] x86/shadow: restrict OOS allocation to when it's really needed From: Jan Beulich To: Andrew Cooper Cc: Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , "xen-devel@lists.xenproject.org" References: <184df995-e668-1cea-6f9f-8e79a1ffcbbd@suse.com> <3c05fb6c-f71e-1b86-6146-96f2b3f3c9ae@suse.com> <101686ff-36d6-4a96-803b-57a6ddd03559@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <101686ff-36d6-4a96-803b-57a6ddd03559@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 09:11, Jan Beulich wrote: > On 20.02.2026 16:06, Andrew Cooper wrote: >> On 16/05/2023 8:40 am, Jan Beulich wrote: >>> --- a/xen/arch/x86/mm/shadow/common.c >>> +++ b/xen/arch/x86/mm/shadow/common.c >>> @@ -61,7 +61,9 @@ const uint8_t sh_type_to_size[] = { >>> [SH_type_l4_64_shadow] = 1, >>> [SH_type_p2m_table] = 1, >>> [SH_type_monitor_table] = 1, >>> +#if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) >>> [SH_type_oos_snapshot] = 1, >>> +#endif >>> }; >>> #endif /* CONFIG_HVM */ >>> >>> @@ -1771,7 +1773,8 @@ static void sh_update_paging_modes(struc >>> #endif /* (SHADOW_OPTIMIZATIONS & SHOPT_VIRTUAL_TLB) */ >>> >>> #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) >>> - if ( mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) >>> + if ( !(d->options & XEN_DOMCTL_CDF_oos_off) && >>> + mfn_eq(v->arch.paging.shadow.oos_snapshot[0], INVALID_MFN) ) >>> { >>> int i; >> >> I've never seen XEN_DOMCTL_CDF_oos_off used.  Xapi has no plumbing for >> this, and xl only inherited it from xend. >> >> At this point, OOS is the tested path and OOS_OFF is the untested path.  >> I think we should remove the flag and let OOS be unconditional like all >> the other shadow optimisations. > > It being a guest config setting, I'm hesitant. Maybe we should actually make > sure it's tested, so that in the case it's needed it could be named as a > mitigation for an XSA? Also, ftaod, this change had gone in already long ago, with Roger's ack. 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Mon, 23 Feb 2026 00:18:48 -0800 (PST) Message-ID: <24f8bf44-0c86-42a1-8bb0-61ddbe430cf8@suse.com> Date: Mon, 23 Feb 2026 09:18:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 09/12] x86/shadow: drop is_hvm_...() where easily possible To: Andrew Cooper Cc: Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , "xen-devel@lists.xenproject.org" References: <184df995-e668-1cea-6f9f-8e79a1ffcbbd@suse.com> <82877022-7d25-431c-838a-2ff5b2c0a008@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <82877022-7d25-431c-838a-2ff5b2c0a008@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 16:14, Andrew Cooper wrote: > On 16/05/2023 8:41 am, Jan Beulich wrote: >> Emulation related functions are involved in HVM handling only > > I think this wants clarifying a little.  *These* emulation functions are > only used by HVM. > > pv/ro-page-fault.c does have emulation for PV guests, but uses > paging_{write,cmpxchg}_guest_entry() to enter into the shadow code. I don't mind; I would have thought that x86/shadow: already narrows scope enough. >> , and in >> some cases they even invoke such checks after having already done things >> which are valid for HVM domains only. OOS active also implies HVM. In >> sh_remove_all_mappings() one of the two checks is redundant with an >> earlier paging_mode_external() one (the other, however, needs to stay). >> >> Signed-off-by: Jan Beulich > > Preferably with the commit message tweaked, Acked-by: Andrew Cooper > Thanks. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 08:47:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 08:47:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238500.1540102 (Exim 4.92) (envelope-from ) id 1vuRal-0007ht-8Z; Mon, 23 Feb 2026 08:46:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238500.1540102; Mon, 23 Feb 2026 08:46:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRal-0007hm-5b; Mon, 23 Feb 2026 08:46:59 +0000 Received: by outflank-mailman (input) for mailman id 1238500; Mon, 23 Feb 2026 08:46:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRak-0007hg-LP for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 08:46:58 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3390fb43-1094-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 09:46:54 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fKDx837Whz5QkLkP for ; Mon, 23 Feb 2026 08:46:52 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 2a80976ec7284bf6a2d23b2dd9e674c9; Mon, 23 Feb 2026 08:46:52 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3390fb43-1094-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771836412; x=1772106412; bh=EJD6QbzyMQoKS/TAMjzp3T691/sn1/DgXlhfelEi5UU=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=hbKYIktKbUlWHPZCqWULQ23xxCKi/hiX+YuqB2VIdQR5fhBbEKyiF6vNiOZa1M+uL I3JjrC58pphImmOIc4V8k6AFNu7Hs3Uqm/EGkr2Qwhu2XWdWBJo73qBIfymhTQrWxZ caK3JJ7N9aOh3655/8hv2aRaju1dYfINcFfsx8mTFk/Xr5IbR893ZYSHfraOHeMQbI HZ2ljcWI2KC8FJy4TfToMEAW60HAWdiyGtpnb6kOuBZOlf+UkKVwTK9KDyTkTf85Nb jHnBz120U2kNfgXo9xv/8WJa4LdseR3gp/FNduqHat52AjsjUGiyyTxkyw9hn7G5Ot zj42rNDj+Q8wg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771836412; x=1772096912; i=julian.vetter@vates.tech; bh=EJD6QbzyMQoKS/TAMjzp3T691/sn1/DgXlhfelEi5UU=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=nGMzNU8ttHvDoHRJ5R5ysSKlhdmgxx8Vu7UvJp0L+FqikYb8LqkWGk+kUwNKHC88e pi/HdcNjjmE8sXvHlqKB2PhcUvQrLzZG+TEF12qvvpECiFM9fLZ+gfU72ZzR8b9LYP KoCD78DbfC0xyg6mRM1/BgBohfiaj9HqJtP8oF7dSghjHuOkH2iREe5MoK8fuwCrox rbuRdGVyB749kGjx/RDd4HZGceT00TV4Ed8/RSa1zP0D+h5ZpD+e7s4waz6/cXysFt AacKyk/vOXvzlAuTniEUa6GCqWzlO6CJxtIRo1B43GpW2c/sMrFdQDFFZXy8oGz8sp BOeo06cFjV85w== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH=20v2]=20x86/hvm:=20Advertise=20and=20support=20extended=20destination=20IDs=20for=20MSI/IO-APIC?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771836411572 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Julian Vetter" Message-Id: <20260223084644.471531-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.2a80976ec7284bf6a2d23b2dd9e674c9?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260223:md Date: Mon, 23 Feb 2026 08:46:52 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI addresses and IO-APIC RTEs only provide an 8-bit destination field. Without extended destination ID support, Linux limits the maximum usable APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, signalling that guests may use MSI address bits 11:5 and IO-APIC RTE bits 55:49 as additional high destination ID bits. This expands the destination ID from 8 to 15 bits. Signed-off-by: Julian Vetter --- Changes in v2: - Replaced macro by bit field entries for vioapic - Added migration check function to vioapic state - Check if XEN_HVM_CPUID_EXT_DEST_ID is announced by destination XEN, if any RTE has ext_dest_id bits set - Replaced bit-mask + shift value by MASK_EXTR() - Rephrased comments based on reviewer suggestions --- xen/arch/x86/cpuid.c | 9 +++++ xen/arch/x86/hvm/irq.c | 11 +++++- xen/arch/x86/hvm/vioapic.c | 50 ++++++++++++++++++++++++-- xen/arch/x86/hvm/vmsi.c | 8 +++-- xen/arch/x86/include/asm/hvm/hvm.h | 4 +-- xen/arch/x86/include/asm/msi.h | 2 ++ xen/drivers/passthrough/x86/hvm.c | 8 ++--- xen/include/public/arch-x86/hvm/save.h | 4 ++- xen/include/public/domctl.h | 16 +++++---- 9 files changed, 92 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index d85be20d86..fb17c71d74 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -148,6 +148,15 @@ static void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, res->a |= XEN_HVM_CPUID_DOMID_PRESENT; res->c = d->domain_id; + /* + * Advertise extended destination ID support. This allows guests to use + * bits 11:5 of the MSI address and bits 55:49 of the IO-APIC RTE for + * additional destination ID bits, expanding the addressable APIC ID + * range from 8 to 15 bits. This is required for x2APIC guests with + * APIC IDs > 255. + */ + res->a |= XEN_HVM_CPUID_EXT_DEST_ID; + /* * Per-vCPU event channel upcalls are implemented and work * correctly with PIRQs routed over event channels. diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 5f64361113..b036be2d01 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -374,7 +374,16 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) { uint32_t tmp = (uint32_t) addr; - uint8_t dest = (tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; + /* + * Standard MSI destination address bits 19:12 (8 bits). + * Extended MSI destination address bits 11:5 (7 more bits). + * + * As XEN_HVM_CPUID_EXT_DEST_ID is advertised, the guest may use bits 11:5 + * for high destination ID bits, expanding to 15 bits total. Guests unaware + * of this feature set these bits to 0, so this is backwards-compatible. + */ + uint32_t dest = (MASK_EXTR(tmp, MSI_ADDR_EXT_DEST_ID_MASK) << 8) | + MASK_EXTR(tmp, MSI_ADDR_DEST_ID_MASK); uint8_t dest_mode = !!(tmp & MSI_ADDR_DESTMODE_MASK); uint8_t delivery_mode = (data & MSI_DATA_DELIVERY_MODE_MASK) >> MSI_DATA_DELIVERY_MODE_SHIFT; diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 7c725f9e47..249291a25d 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -31,7 +31,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -411,7 +413,8 @@ static void ioapic_inj_irq( static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) { - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; + uint32_t dest = ((uint32_t)vioapic->redirtbl[pin].fields.ext_dest_id << 8) | + vioapic->redirtbl[pin].fields.dest_id; uint8_t dest_mode = vioapic->redirtbl[pin].fields.dest_mode; uint8_t delivery_mode = vioapic->redirtbl[pin].fields.delivery_mode; uint8_t vector = vioapic->redirtbl[pin].fields.vector; @@ -594,6 +597,49 @@ int vioapic_get_trigger_mode(const struct domain *d, unsigned int gsi) return vioapic->redirtbl[pin].fields.trig_mode; } +static int cf_check ioapic_check(const struct domain *d, hvm_domain_context_t *h) +{ + const HVM_SAVE_TYPE(IOAPIC) *s = hvm_get_entry(IOAPIC, h); + unsigned int i; + + if ( !s ) + return -ENODATA; + + for ( i = 0; i < ARRAY_SIZE(s->redirtbl); i++ ) + { + struct cpuid_leaf res; + + /* ext_dest_id bits not set in RTE so continue */ + if ( !s->redirtbl[i].fields.ext_dest_id ) + continue; + + /* + * An RTE in the saved state has ext_dest_id bits set, verify the + * destination XEN advertises XEN_HVM_CPUID_EXT_DEST_ID to the guest. + * If not interrupt routing to APIC IDs > 255 would be broken after + * restore -> -EINVAL! + */ + guest_cpuid(d->vcpu[0], 0x40000004, 0, &res); + if ( !(res.a & XEN_HVM_CPUID_EXT_DEST_ID) ) + { + printk(XENLOG_G_ERR "HVM restore: dom%d IO-APIC RTE %u has " + "extended destination ID bits set but " + "XEN_HVM_CPUID_EXT_DEST_ID is not advertised\n", + d->domain_id, i); + return -EINVAL; + } + + /* + * Found an RTE with ext_dest bits set, but the destination XEN also + * correctly announces XEN_HVM_CPUID_EXT_DEST_ID + * -> All good, no need to check remaining RTEs. + */ + break; + } + + return 0; +} + static int cf_check ioapic_save(struct vcpu *v, hvm_domain_context_t *h) { const struct domain *d = v->domain; @@ -630,7 +676,7 @@ static int cf_check ioapic_load(struct domain *d, hvm_domain_context_t *h) return 0; } -HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, NULL, ioapic_load, 1, +HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_check, ioapic_load, 1, HVMSR_PER_DOM); void vioapic_reset(struct domain *d) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 27b1f089e2..36ea898ac7 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -66,7 +66,7 @@ static void vmsi_inj_irq( int vmsi_deliver( struct domain *d, int vector, - uint8_t dest, uint8_t dest_mode, + uint32_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t trig_mode) { struct vlapic *target; @@ -109,7 +109,7 @@ void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci) { uint32_t flags = pirq_dpci->gmsi.gflags; int vector = pirq_dpci->gmsi.gvec; - uint8_t dest = (uint8_t)flags; + uint32_t dest = XEN_DOMCTL_VMSI_X86_FULL_DEST(flags); bool dest_mode = flags & XEN_DOMCTL_VMSI_X86_DM_MASK; uint8_t delivery_mode = MASK_EXTR(flags, XEN_DOMCTL_VMSI_X86_DELIV_MASK); bool trig_mode = flags & XEN_DOMCTL_VMSI_X86_TRIG_MASK; @@ -125,7 +125,7 @@ void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci) } /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id */ -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest_mode) +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t dest_mode) { int dest_vcpu_id = -1, w = 0; struct vcpu *v; @@ -802,6 +802,8 @@ static unsigned int msi_gflags(uint16_t data, uint64_t addr, bool masked) */ return MASK_INSR(MASK_EXTR(addr, MSI_ADDR_DEST_ID_MASK), XEN_DOMCTL_VMSI_X86_DEST_ID_MASK) | + MASK_INSR(MASK_EXTR(addr, MSI_ADDR_EXT_DEST_ID_MASK), + XEN_DOMCTL_VMSI_X86_EXT_DEST_ID_MASK) | MASK_INSR(MASK_EXTR(addr, MSI_ADDR_REDIRECTION_MASK), XEN_DOMCTL_VMSI_X86_RH_MASK) | MASK_INSR(MASK_EXTR(addr, MSI_ADDR_DESTMODE_MASK), diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 7d9774df59..11256d5e67 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -295,11 +295,11 @@ uint64_t hvm_get_guest_time_fixed(const struct vcpu *v, uint64_t at_tsc); int vmsi_deliver( struct domain *d, int vector, - uint8_t dest, uint8_t dest_mode, + uint32_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t trig_mode); struct hvm_pirq_dpci; void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci); -int hvm_girq_dest_2_vcpu_id(struct domain *d, uint8_t dest, uint8_t dest_mode); +int hvm_girq_dest_2_vcpu_id(struct domain *d, uint32_t dest, uint8_t dest_mode); enum hvm_intblk hvm_interrupt_blocked(struct vcpu *v, struct hvm_intack intack); diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h index 00059d4a3a..711b026616 100644 --- a/xen/arch/x86/include/asm/msi.h +++ b/xen/arch/x86/include/asm/msi.h @@ -54,6 +54,8 @@ #define MSI_ADDR_DEST_ID_MASK 0x00ff000 #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) +#define MSI_ADDR_EXT_DEST_ID_MASK 0x0000fe0 + /* MAX fixed pages reserved for mapping MSIX tables. */ #define FIX_MSIX_MAX_PAGES 512 diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c index b73bb55055..9c3c8d28d6 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -281,7 +281,7 @@ int pt_irq_create_bind( { case PT_IRQ_TYPE_MSI: { - uint8_t dest, delivery_mode; + uint32_t dest, delivery_mode; bool dest_mode; int dest_vcpu_id; const struct vcpu *vcpu; @@ -357,8 +357,7 @@ int pt_irq_create_bind( } } /* Calculate dest_vcpu_id for MSI-type pirq migration. */ - dest = MASK_EXTR(pirq_dpci->gmsi.gflags, - XEN_DOMCTL_VMSI_X86_DEST_ID_MASK); + dest = XEN_DOMCTL_VMSI_X86_FULL_DEST(pirq_dpci->gmsi.gflags); dest_mode = pirq_dpci->gmsi.gflags & XEN_DOMCTL_VMSI_X86_DM_MASK; delivery_mode = MASK_EXTR(pirq_dpci->gmsi.gflags, XEN_DOMCTL_VMSI_X86_DELIV_MASK); @@ -807,8 +806,7 @@ static int cf_check _hvm_dpci_msi_eoi( if ( (pirq_dpci->flags & HVM_IRQ_DPCI_MACH_MSI) && (pirq_dpci->gmsi.gvec == vector) ) { - unsigned int dest = MASK_EXTR(pirq_dpci->gmsi.gflags, - XEN_DOMCTL_VMSI_X86_DEST_ID_MASK); + unsigned int dest = XEN_DOMCTL_VMSI_X86_FULL_DEST(pirq_dpci->gmsi.gflags); bool dest_mode = pirq_dpci->gmsi.gflags & XEN_DOMCTL_VMSI_X86_DM_MASK; if ( vlapic_match_dest(vcpu_vlapic(current), NULL, 0, dest, diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index 9c4bfc7ebd..d903ee53da 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -359,7 +359,9 @@ union vioapic_redir_entry uint8_t trig_mode:1; uint8_t mask:1; uint8_t reserve:7; - uint8_t reserved[4]; + uint8_t reserved[3]; + uint8_t ext_dest_rsvd:1; + uint8_t ext_dest_id:7; uint8_t dest_id; } fields; }; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7..007bcf0f09 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -615,12 +615,13 @@ struct xen_domctl_bind_pt_irq { struct { uint8_t gvec; uint32_t gflags; -#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff -#define XEN_DOMCTL_VMSI_X86_RH_MASK 0x000100 -#define XEN_DOMCTL_VMSI_X86_DM_MASK 0x000200 -#define XEN_DOMCTL_VMSI_X86_DELIV_MASK 0x007000 -#define XEN_DOMCTL_VMSI_X86_TRIG_MASK 0x008000 -#define XEN_DOMCTL_VMSI_X86_UNMASKED 0x010000 +#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff +#define XEN_DOMCTL_VMSI_X86_RH_MASK 0x000100 +#define XEN_DOMCTL_VMSI_X86_DM_MASK 0x000200 +#define XEN_DOMCTL_VMSI_X86_DELIV_MASK 0x007000 +#define XEN_DOMCTL_VMSI_X86_TRIG_MASK 0x008000 +#define XEN_DOMCTL_VMSI_X86_UNMASKED 0x010000 +#define XEN_DOMCTL_VMSI_X86_EXT_DEST_ID_MASK 0xfe0000 uint64_aligned_t gtable; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: u4yW92uGRxGfXggWZGdgTh+idM4A/9VFcJbUiDW87dLwazsDaDO5s+Hpg51f0YURQYu+ifPX9XsGN9QOkQX87dliAECXJi9PP7guI/292V3tqnFf4sU/ip80Yj1aJPKFcYhUiknnlvV+Li4MN2D1DgTD/5SDQ7coAKY3sToryLIgr/D39jce2/ivXK/GDDZK5qu5a6lwwNC647+EHdzszOsUZH05pKGmy+Hpmt3/b3P6AAFuTgGG4g229WY72KxBuNTup1oRkF7zFEzIiIKZJ5ytsqcm9MrSORAVjM5ulkj6ZoPnkG+tlCgPTb13D1zCFcH0aZPN6brDSUhwTNQtC+ioLjeG7jxdEZRPEYUWfOi8p7sWePaS59KJzUHELLAeEWlyBsGZ/BLt/fGTigVoRW9R9+iFCHs9KtzNVMsjSOUB3U/DxZan0BrRDFDYiRg2 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 08:53:19.3232 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d6eb8702-f4b3-4868-3051-08de72b8fdfa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8479 Hi Julien, On 21/02/2026 12:26, Julien Grall wrote: > Hi Michal, > > On 18/02/2026 08:36, Orzel, Michal wrote: >>> But that's not correct for cases where share_xen_page_with_privileged_guest() >>> is passed SHARE_ro. XENMAPSPACE_gmfn_foreign requests have to result in r/o >>> mappings in that case. >> Yes. Therefore, on Arm: >> - p2m_ram_ro is never stored in P2M tables for normal domains > > p2m_set_permission() is able to deal with p2m_ram_ro. So this could in > theory happen. Only in theory. As of today, this is the unreachable code. In fact I checked our coverage reports for safety and indeed it shows up as an unreachable code. There is no path in Xen that can lead to that point. > >> - it's only used by get_page_from_gfn() for DOMID_XEN pages >> - it's used as a signal to install p2m_map_foreign_ro mappings >> >> The code should stay as is then and we could modify the comment to say: > > /* Read-only RAM; only used for DOMID_XEN */ > > With what I wrote above, I don't think we should add such comment. I think the goal here is to make the comment reflect the current situation (and as of now it's only used for DOMID_XEN). Taking what I wrote above, do you still think we should not update it? Once we have a use for RO for normal domains, we could then update the comment to reflect a new reality. ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 08:55:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 08:55:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238518.1540123 (Exim 4.92) (envelope-from ) id 1vuRiX-0001Ux-C2; Mon, 23 Feb 2026 08:55:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238518.1540123; Mon, 23 Feb 2026 08:55:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRiX-0001Uq-8F; Mon, 23 Feb 2026 08:55:01 +0000 Received: by outflank-mailman (input) for mailman id 1238518; Mon, 23 Feb 2026 08:55:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRiV-0001Ui-VY for xen-devel@lists.xenproject.org; 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bh=t/8C0ujbKN5s4EGu8j0zpuA6fUlJMTVb3Y6+8pPnCiU=; b=HqB/9EtBaR9qN9O2KQPlC4Wdw+qizGluvqlAyy57H8C1zPZaKSiaxVamfG/l4GdfMrG+EjyArhLhYkG9goH85va2YettmFmfqhwmUDOATKU2dJT+hQ+o9l7GeOXd6dpY4k+ahuDq/lc8G/gG5Nlm9p5DDqV/0ZGULSBbaJX0LUM= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Mon, 23 Feb 2026 09:54:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/12] arm: Use __func__ in acpi_boot_table_init() To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-2-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-2-andrew.cooper3@citrix.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: AoUjZEPuaeQOvB5uijPidAnaf7fLxXc+qpJv/hpm3MeR2Tm4ASuqyH/+DGx1+En6zkmriPYVUo/HBcIBOPJl/G2x++rdMRsyi6YQYzyNBNOOSPnKarYJRPAtTJqIPWz0LOzRyuZrJ13ri/AlufkuVBh7LB1tRusdbnPRylOZfS7qP8+VwIULZ5IS4C/6i0pRyvwt7zuEOlgG2kOSp4gXJk6OPJSVWqnqQbelm3NylfT4dRi/Ij58L7dVOeOgiR67pWZ/yiDt19uNboCNoDaBLSneLyZ3nNyoS0CH0qmnUC8hX7dhUCohAgsrJPJQJ0lYkbLClPTClaQR5+8pi+r1f2ewaFd6mLnyyreTQRwAeafgIt+sBbbDK5YPUIkSXlLX4ug+3bDOGKz3KKl3kBYgrjlrFS3d+bCFv2f7/Jif0g90GMNW2c5pN3gcYdJz2FUa X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 08:54:51.8018 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b6a2726-8b29-4e7a-c2bf-08de72b93517 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF8AECCE022 On 20/02/2026 22:46, Andrew Cooper wrote: > Elcair rejects __FUNCTION__ as nonstandard syntax and a R1.1 violation. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 08:57:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 08:57:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238527.1540132 (Exim 4.92) (envelope-from ) id 1vuRlJ-0002Eo-NJ; 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pr=C Message-ID: <652e3747-76bd-41aa-9d2d-ecb57d206a31@amd.com> Date: Mon, 23 Feb 2026 09:57:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/12] xen/treewide: Adjust suffixes on integer literals To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-3-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-3-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FC:EE_|PH8PR12MB7208:EE_ X-MS-Office365-Filtering-Correlation-Id: 5127120c-4f68-41d5-4c24-08de72b98ac0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024|7053199007; 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pr=C Message-ID: Date: Mon, 23 Feb 2026 09:58:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/12] xen/treewide: Adjust parameter names and types To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-5-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-5-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE18:EE_|IA4PR12MB9811:EE_ X-MS-Office365-Filtering-Correlation-Id: 0576eee1-f511-4347-4fa4-08de72b9ae6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026|7416014|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DPshjIhtw3sk5ptOjUYXbDdNSQy6V6lvql8ZJFxnebmFd0jWlUyc+JbofzV/fkiBsBDqIEEdQoMk9XzAAYKKSli63SErVyrMc10DHDd/0URZEyO6SgfO704jzV4L53WT8oTKynWD95haW444lZrm3KSX3ibrSEfmvJIV3x/xtE8qAz5cwyO8axen0GeH1OMSOjzegjD3E8qJxHrXCbN29IQqxyEX3uYgKLaNsxXVQsnDy/fH/b7XkqNDincX/W1wH4OLuB/Jub2hMPKMHEzGlYKs1hbWSgVVKhn9RxEjGgkaAsOJ4UfZvdq41DC3w8raqhKXxq2ncnRmiP3NHrqP9gbte2lY6+PvOLXIJfiyoev4Z17otFtcFNkdXr6+MThM7SBt4WJ1ksDeQhjv8IvVWi42f1YomiAHCQsrta+U60H3j/YRYjayb1a59J7lPGo4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 08:58:15.3471 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0576eee1-f511-4347-4fa4-08de72b9ae6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE18.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA4PR12MB9811 On 20/02/2026 22:46, Andrew Cooper wrote: > MISRA Rule 8.2 says that parameters must all have names. Rule 8.3 says that > the names and types must match between declaration and definition. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 09:00:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 09:00:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238545.1540153 (Exim 4.92) (envelope-from ) id 1vuRo9-0004KU-F7; Mon, 23 Feb 2026 09:00:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238545.1540153; Mon, 23 Feb 2026 09:00:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRo9-0004KN-Be; Mon, 23 Feb 2026 09:00:49 +0000 Received: by outflank-mailman (input) for mailman id 1238545; Mon, 23 Feb 2026 09:00:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRo8-0004KH-Kp for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 23 Feb 2026 10:00:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/12] arm/pci-designware: Fix MISRA violations To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Julien Grall" , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-9-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-9-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE18:EE_|DS0PR12MB6632:EE_ X-MS-Office365-Filtering-Correlation-Id: 46450b04-7cdc-4d41-a1f0-08de72ba05c5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024|7053199007; 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pr=C Message-ID: <32994472-5892-4eca-ae72-a7d1432d4f2b@amd.com> Date: Mon, 23 Feb 2026 10:02:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/12] xen: Adjust break/fallthrough statements To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-11-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-11-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|BL1PR12MB5801:EE_ X-MS-Office365-Filtering-Correlation-Id: 1d5ae539-04f7-4bc8-ccd8-08de72ba5875 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aPjBlkl9a/Tr0hUI2rl519vAnYG3jlE7iUvECXcz8bs1yE2FFeGy7+GJFXM9P+wmkBEPGdiqiJ0eBySechtzAUmbnn94a05uQsMjYutEXGo+Vp25TiFeKmB7+kg4xXBrioREzb7DR7x3qaEEfiNBZC8jXFeV8Oj7q7c5yXub3eE7xe1Jqma5OgNPvoal/KfgDZt+mSzeTOMXpYTCyfiyYtNCPufQqrrbh8XVCFjDW9Skq9fZiTVXK3C3QFK5VTjdcCrFepO/fvm9htCIl58iJT0PSNoqvffH+A608bfr5EeJ5wV7FjiwCHAsVlrcXoBDIH4S3ETdDGy7BD9Gbnu6FaK2xLe5rw9RkSOoUkvejn48UBZZhL5vSyvs6Ma/ivqqivpw08ZvyDAFHNfW3h7sqUgZdrKbcNyQ2MW86iBUf7uuoL5/eRn9Fx2QrjdR8vyS X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 09:03:00.6425 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1d5ae539-04f7-4bc8-ccd8-08de72ba5875 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5801 On 20/02/2026 22:46, Andrew Cooper wrote: > sh_destroy_shadow() has a spelling of fallthrough which doesn't match the > permitted pattern. Convert it to a real fallthrough (psedo)keyword. > > Elsewhere, insert breaks at the end of the default statements. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 09:04:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 09:04:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238563.1540173 (Exim 4.92) (envelope-from ) id 1vuRrw-0005N6-3t; Mon, 23 Feb 2026 09:04:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238563.1540173; Mon, 23 Feb 2026 09:04:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRrw-0005Mz-0s; Mon, 23 Feb 2026 09:04:44 +0000 Received: by outflank-mailman (input) for mailman id 1238563; Mon, 23 Feb 2026 09:04:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuRru-0005Mr-MI for xen-devel@lists.xenproject.org; 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bh=/WslnBlJVT/iOwR3QlwkjRiZxNKUPxhK5H+scCwM+gE=; b=nqgssUDljo9bcdchIq0Ul/0bh6hvPOtvJPHh+9PBforBBLXKPJmBD33b9gxqlUsB3P+hMVbFMVnZc8Bscke454q1/b3sIB5xBPDgNr1t4lN4wLcqvBR/+dxJlvFUEXehNBYoXkq/Oqh6CyTk9DzW6wh1FpEtQa/Xla2+FFBeU38= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 23 Feb 2026 10:04:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/12] xen: Bracket uses of macro parameters To: Andrew Cooper , Xen-devel CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , "consulting @ bugseng . com" , Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-12-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260220214653.3497384-12-andrew.cooper3@citrix.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /Pv2BIzERN9cL4txojgaq8Ogo0ayes0FuierRiDOBlzD866WlGCYUZB2YG2Q0+yjxudvRl9O+X76cxxc/m0eGvl6GDgMY4S3jlrs6wPddjic821jXCuoANM5q+wVbl8hx77ud4QGjVlv87uaLd6xqvRKgO8zUL7cgDdw6bTNahL3TEtnuX7wlJ6QmmD/eI2z6BPZKaH9ecoHJd12SjbxryGErkhBg60Ln7TuJh4USAhfbnoY4Jx8GopAqgoJgJpec1kCnqgm4Pf/dSbagHdLdxPYkmwoee0c8lkIxheBMC/jOFONs2FW7IncHQCUkBE6C31PybMkARrQ7unVLzIwJtOqokFT0pxTDvn3HqV5MBDrtCMu7YKM2twrnpu5falguivKEVW7IFv7xC5n/lUIIH/lwvWf9dZ7fPZhorXplyk97OdGA3HgNPiLUdszD84v X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 09:04:34.3911 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 213bdec1-4a34-4c06-c22e-08de72ba9057 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECDB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7680 On 20/02/2026 22:46, Andrew Cooper wrote: > Fixing Rule 20.7 violations. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 09:16:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 09:16:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238575.1540182 (Exim 4.92) (envelope-from ) id 1vuS2p-0007OQ-4H; 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Smith" References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-4-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-4-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 22:46, Andrew Cooper wrote: > For the ARM build only, Eclair reports a R8.4 violation because do_argo_op() > cannot see its declaration. This means that x86 is picking hypercall-defs.h > up transitively while ARM is not. Include xen/hypercall.h explicitly. > > Eclair also reports a R8.3 violation because of arg3 and arg4 differing in > name with a raw_ prefix. Because hypercall-defs.h generates both do_argo_op() > and compat_argo_op() from a single description, it's not possible to simply > rename to raw_ in the declaration, as that would force doing the same rename > in compat_argo_op(). > > In do_argo_op(), drop the split parameter handling, and perform the 32bit > range check via an explicit cast. While adjusting the surrounding logic, drop > unnecessary casts to void * for already pointer arguments in argo_printk(). > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: consulting@bugseng.com > CC: Nicola Vetrini Further Cc-ing Argo maintainer / reviewer. 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Mon, 23 Feb 2026 01:21:16 -0800 (PST) Message-ID: <80743dab-4c71-40e2-bf09-789cc7ebbb28@suse.com> Date: Mon, 23 Feb 2026 10:21:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/12] x86: Adjust annotations of asm-used identifiers To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini , Xen-devel References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-6-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-6-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 22:46, Andrew Cooper wrote: > do_entry_int82() is only called by assembly so gains asmlinkage. > > pvh_start_info_pa and early_hypercall_insn are data used by assembly, and need > a SAF-1 annotation. Why not use asmlinkage there as well? The deviation covering it as much as SAF-1-safe say "only" (which doesn't fully apply here), so if in doubt is should be asmlinkage? Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 09:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 09:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238594.1540208 (Exim 4.92) (envelope-from ) id 1vuSOp-0002yM-9A; Mon, 23 Feb 2026 09:38:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238594.1540208; Mon, 23 Feb 2026 09:38:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSOp-0002xa-3Y; Mon, 23 Feb 2026 09:38:43 +0000 Received: by outflank-mailman (input) for mailman id 1238594; Mon, 23 Feb 2026 09:38:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSOo-0002vD-ET for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 09:38:42 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6eabb233-109b-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 10:38:39 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fKG4t1KWrz5QkLdk for ; Mon, 23 Feb 2026 09:38:38 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id dde5a2ce1b074551b450dbac9523d23a; Mon, 23 Feb 2026 09:38:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6eabb233-109b-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771839518; x=1772109518; bh=/R/ehowVjGJDfMqCUH806hPdMzW6V7gcOMrwhVu20g4=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=KjOBA5yuKAoNMsc/O8Vl9X09BOAi4SaBU6RNOuTj3qFJWqmimKYLE1paJYMcakRXc Vk/zk7XOb8mHKXtHC3F6uq+iK69u1UXmOHdd9rYHgGXpRLe51eXoDzS+s0+Fw5hYTp 6y3TNtajuL1lUY8FSXNA5pZkxs8BFazvI7ZgaGRphIULSwlmmFEnegRkYoJTSXMzxQ LnOeeQLp01b9CMJphLPicu+ZDQetnUFpUdboBCUKZywngUnlTQh4k8jporTFHJ4sO4 ZXHLenWLrPNFMbegXMY1PMv0tVpobNbDyu0BIPueEu+7Pxa9C6pcpuA26bBWVw/DJC 2c0v4f3sshL+Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771839518; x=1772100018; i=julian.vetter@vates.tech; bh=/R/ehowVjGJDfMqCUH806hPdMzW6V7gcOMrwhVu20g4=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=Bmi0xsuNZA4+bQieNBuOtsXUcGFD4GMo3PE3pNFLSuSxeuKyRPmlgBmbxf7SkaGaw ljbgYxlqnKVmOvKzVFjatj3p4/Py4Q0We8CVgwplBvISqblzkSW7Arb8+qMM6ijeEi bSWKU1H6y6tVOBq592d9R/YcvFV86R2X0MwtIoQrv79BMydFEssLFNosN4240/7gl6 7H8CKatikf8SFj5V0o+9OHK53xmAkzbjmkZzfXiAB69caL0gpWFPmUSbLf+BsHPVDY GDN33bivMl9wac8pf1par2Zgch0AQsAWd5uzkjDZc7DULrbacSzTOqP3EKX1HomiF+ SEBAXfsOPFa8A== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH=20v3=201/2]=20x86/ioreq:=20Prepare=20spacing=20for=20upcoming=20patch?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771839516797 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Julian Vetter" Message-Id: <20260223093831.475769-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.dde5a2ce1b074551b450dbac9523d23a?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260223:md Date: Mon, 23 Feb 2026 09:38:38 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit This patch just changes indentation, to make the next patch easier to review. Signed-off-by: Julian Vetter --- Changes in v3: - No changes to this patch - Dropped patch "1/3 x86/ioreq: Add missing put_page_alloc_ref(page)" --- xen/arch/x86/hvm/ioreq.c | 86 ++++++++++++++++++++++------------------ 1 file changed, 47 insertions(+), 39 deletions(-) diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index a5fa97e149..5ebc48dbd4 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -125,14 +125,16 @@ static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) { struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return; - destroy_ring_for_helper(&iorp->va, iorp->page); - iorp->page = NULL; + destroy_ring_for_helper(&iorp->va, iorp->page); + iorp->page = NULL; - hvm_free_ioreq_gfn(s, iorp->gfn); - iorp->gfn = INVALID_GFN; + hvm_free_ioreq_gfn(s, iorp->gfn); + iorp->gfn = INVALID_GFN; + } } static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -141,34 +143,36 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; int rc; - if ( iorp->page ) { - /* - * If a page has already been allocated (which will happen on - * demand if ioreq_server_get_frame() is called), then - * mapping a guest frame is not permitted. - */ - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return -EPERM; - - return 0; - } + if ( iorp->page ) + { + /* + * If a page has already been allocated (which will happen on + * demand if ioreq_server_get_frame() is called), then + * mapping a guest frame is not permitted. + */ + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return -EPERM; + + return 0; + } - if ( d->is_dying ) - return -EINVAL; + if ( d->is_dying ) + return -EINVAL; - iorp->gfn = hvm_alloc_ioreq_gfn(s); + iorp->gfn = hvm_alloc_ioreq_gfn(s); - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return -ENOMEM; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return -ENOMEM; - rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, - &iorp->va); + rc = prepare_ring_for_helper(d, gfn_x(iorp->gfn), &iorp->page, + &iorp->va); - if ( rc ) - hvm_unmap_ioreq_gfn(s, buf); + if ( rc ) + hvm_unmap_ioreq_gfn(s, buf); - return rc; + return rc; + } } static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -176,12 +180,14 @@ static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) struct domain *d = s->target; struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return; - if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) - domain_crash(d); - clear_page(iorp->va); + if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) + domain_crash(d); + clear_page(iorp->va); + } } static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) @@ -190,16 +196,18 @@ static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; int rc; - if ( gfn_eq(iorp->gfn, INVALID_GFN) ) - return 0; + { + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) + return 0; - clear_page(iorp->va); + clear_page(iorp->va); - rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); - if ( rc == 0 ) - paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); + rc = p2m_add_page(d, iorp->gfn, page_to_mfn(iorp->page), 0, p2m_ram_rw); + if ( rc == 0 ) + paging_mark_pfn_dirty(d, _pfn(gfn_x(iorp->gfn))); - return rc; + return rc; + } } int arch_ioreq_server_map_pages(struct ioreq_server *s) -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 23 09:38:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 09:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238593.1540203 (Exim 4.92) (envelope-from ) id 1vuSOp-0002vQ-0G; Mon, 23 Feb 2026 09:38:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238593.1540203; Mon, 23 Feb 2026 09:38:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSOo-0002vJ-TO; Mon, 23 Feb 2026 09:38:42 +0000 Received: by outflank-mailman (input) for mailman id 1238593; Mon, 23 Feb 2026 09:38:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSOn-0002v7-J8 for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 09:38:41 +0000 Received: from mail186-12.suw21.mandrillapp.com (mail186-12.suw21.mandrillapp.com [198.2.186.12]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6ecedb2c-109b-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 10:38:39 +0100 (CET) Received: from pmta10.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail186-12.suw21.mandrillapp.com (Mailchimp) with ESMTP id 4fKG4t369Wz705b1G for ; Mon, 23 Feb 2026 09:38:38 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 103dbd66c198486fa7c8d91351ced15a; Mon, 23 Feb 2026 09:38:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6ecedb2c-109b-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771839518; x=1772109518; bh=M3N/w8dgY0K6W/T6qtHBo2kxcGtEBlKcTIwufvqXy/k=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=jBxVgrJLgfRUuTDhPqPhXH0SGqHO63xegArSj108W0jZO8dA3Wz5v/3R2jhLq91Q+ sgkQgy3CuvnR79r6hKpKVzQpoNFqOgUI2Rjpasp9OyTRfdQPd4ofK+x8uv1hYD5wwO KsdDxgBoCtR5TyfVL+cRLK1zW8OTMYVtd110DLodHPWYwlkYWoNTPBcHtceTWvR5dm VyWnz2G0skBq8ewsJsCg7xCP5NEeDM3lobB3JSDb5lh8W2Vt7A7ZTD4Qbkzi97zdfD aXXZ6Zh05HFdz2fBi3zdTrQvoGn1i5/BkAFf537zAO2mkKSWc1nRWuNiunuj1Kogus TshklKBcxmLZA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771839518; x=1772100018; i=julian.vetter@vates.tech; bh=M3N/w8dgY0K6W/T6qtHBo2kxcGtEBlKcTIwufvqXy/k=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=13FToqzOG04yIxmYoD/0kBw83382TZJKvTI811h2Rn9CDdU1q8zc6TJvgdY4vJl+M uw1e8BC4/Ei4AEm1A/RgrDzq7cTha/FKPRuzu0+BBpq4OTXqK6iWvm8lT9BpZkcJPu xDw9a98QaiydL6PFaryCzH45UCII2U+fmuIy5SuXMbz0QWSFtVNtjieY1Vcnf2QaBt jhODg5LtbnAnqalSEmjuJS9y9kn4ZL9P1GCdxYpQHkc+wOxXTIwUXjUq6PJyfqqmHf 1XkCNVtdBBhT/HzEvdRtTosmM4UhhqWt1Rd6bZrgp8fQ/kzQObO6wJA0lGsF7Ydfei ge0LDehmvRrnw== From: "Julian Vetter" Subject: =?utf-8?Q?[PATCH=20v3=202/2]=20x86/ioreq:=20Extend=20ioreq=20server=20to=20support=20multiple=20ioreq=20pages?= X-Mailer: git-send-email 2.51.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771839517165 To: xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Julian Vetter" Message-Id: <20260223093831.475769-2-julian.vetter@vates.tech> In-Reply-To: <20260223093831.475769-1-julian.vetter@vates.tech> References: <20260223093831.475769-1-julian.vetter@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.103dbd66c198486fa7c8d91351ced15a?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260223:md Date: Mon, 23 Feb 2026 09:38:38 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit A single shared ioreq page provides PAGE_SIZE/sizeof(ioreq_t) = 128 slots, limiting HVM guests to 128 vCPUs. To support more vCPUs, extend the ioreq server to use xvzalloc_array() for allocating a contiguous virtual array of ioreq_t slots sized to d->max_vcpus, backed by potentially non-contiguous physical pages. For the GFN-mapped path (x86), page and writable type references are obtained directly via check_get_page_from_gfn() and get_page_type() for each GFN. The pages are then combined into a single contiguous VA using vmap(). The number of ioreq pages is computed at runtime via nr_ioreq_pages(d) = DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE), so small VMs only allocate one page. All existing single-page paths (bufioreq, legacy clients) remain unchanged. Mark the now-unused shared_iopage_t in the public header as deprecated. Signed-off-by: Julian Vetter --- Changes in v3: - Replaced prepare_ring_for_helper + unmap_domain_page_global by check_get_page_from_gfn + get_page_type --- xen/arch/x86/hvm/ioreq.c | 208 ++++++++++++++++++++++++++++++++- xen/common/ioreq.c | 95 +++++++++++---- xen/include/public/hvm/ioreq.h | 5 + xen/include/xen/ioreq.h | 13 ++- 4 files changed, 295 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index 5ebc48dbd4..a042866967 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -11,10 +11,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -89,6 +91,39 @@ static gfn_t hvm_alloc_ioreq_gfn(struct ioreq_server *s) return hvm_alloc_legacy_ioreq_gfn(s); } +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, + unsigned int nr_pages) +{ + struct domain *d = s->target; + unsigned long mask; + unsigned int i, run; + + if ( nr_pages == 1 ) + return hvm_alloc_ioreq_gfn(s); + + /* Find nr_pages consecutive set bits */ + mask = d->arch.hvm.ioreq_gfn.mask; + + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) + { + if ( !test_bit(i, &mask) ) + run = 0; + else if ( ++run == nr_pages ) + { + /* Found a run - clear all bits and return base GFN */ + unsigned int start = i - nr_pages + 1; + unsigned int j; + + for ( j = start; j <= i; j++ ) + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); + + return _gfn(d->arch.hvm.ioreq_gfn.base + start); + } + } + + return INVALID_GFN; +} + static bool hvm_free_legacy_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) { @@ -121,11 +156,23 @@ static void hvm_free_ioreq_gfn(struct ioreq_server *s, gfn_t gfn) } } +static void hvm_free_ioreq_gfns(struct ioreq_server *s, gfn_t gfn, + unsigned int nr_pages) +{ + unsigned int i; + + for ( i = 0; i < nr_pages; i++ ) + hvm_free_ioreq_gfn(s, gfn_add(gfn, i)); +} + static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return; @@ -134,16 +181,41 @@ static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) hvm_free_ioreq_gfn(s, iorp->gfn); iorp->gfn = INVALID_GFN; + return; } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return; + + nr_pages = nr_ioreq_pages(s->target); + + for ( i = 0; i < nr_pages; i++ ) + { + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + put_page_and_type(pg); + put_page(pg); + } + vunmap(s->ioreq); + s->ioreq = NULL; + + hvm_free_ioreq_gfns(s, s->ioreq_gfn, nr_pages); + s->ioreq_gfn = INVALID_GFN; } static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + gfn_t base_gfn; + mfn_t *mfns; int rc; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( iorp->page ) { /* @@ -173,30 +245,132 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) return rc; } + + /* ioreq: multi-page with contiguous VA */ + if ( s->ioreq ) + { + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return -EPERM; + return 0; + } + + if ( d->is_dying ) + return -EINVAL; + + nr_pages = nr_ioreq_pages(d); + base_gfn = hvm_alloc_ioreq_gfns(s, nr_pages); + + if ( gfn_eq(base_gfn, INVALID_GFN) ) + return -ENOMEM; + + mfns = xmalloc_array(mfn_t, nr_pages); + if ( !mfns ) + { + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); + return -ENOMEM; + } + + /* + * Obtain a page reference and writable type reference for each GFN. + * No per-page VA is needed; all pages are mapped as a single contiguous + * VA via vmap() below. + */ + for ( i = 0; i < nr_pages; i++ ) + { + struct page_info *pg; + p2m_type_t p2mt; + + rc = check_get_page_from_gfn(d, _gfn(gfn_x(base_gfn) + i), + false, &p2mt, &pg); + if ( rc ) + { + if ( rc == -EAGAIN ) + rc = -ENOENT; + goto fail; + } + + if ( !get_page_type(pg, PGT_writable_page) ) + { + put_page(pg); + rc = -EINVAL; + goto fail; + } + + mfns[i] = page_to_mfn(pg); + } + + /* Map all mfns as single contiguous VA */ + s->ioreq = vmap(mfns, nr_pages); + if ( !s->ioreq ) + { + rc = -ENOMEM; + goto fail; + } + + s->ioreq_gfn = base_gfn; + xfree(mfns); + + return 0; + + fail: + while ( i-- > 0 ) + { + struct page_info *pg = mfn_to_page(mfns[i]); + + put_page_and_type(pg); + put_page(pg); + } + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); + xfree(mfns); + + return rc; } static void hvm_remove_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return; if ( p2m_remove_page(d, iorp->gfn, page_to_mfn(iorp->page), 0) ) domain_crash(d); clear_page(iorp->va); + return; + } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return; + + nr_pages = nr_ioreq_pages(d); + + for ( i = 0; i < nr_pages; i++ ) + { + gfn_t gfn = gfn_add(s->ioreq_gfn, i); + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + if ( p2m_remove_page(d, gfn, page_to_mfn(pg), 0) ) + domain_crash(d); } + memset(s->ioreq, 0, nr_pages * PAGE_SIZE); } static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) { struct domain *d = s->target; - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + unsigned int i, nr_pages; int rc; + if ( buf ) { + struct ioreq_page *iorp = &s->bufioreq; + if ( gfn_eq(iorp->gfn, INVALID_GFN) ) return 0; @@ -208,6 +382,32 @@ static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) return rc; } + + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return 0; + + nr_pages = nr_ioreq_pages(d); + memset(s->ioreq, 0, nr_pages * PAGE_SIZE); + + for ( i = 0; i < nr_pages; i++ ) + { + gfn_t gfn = gfn_add(s->ioreq_gfn, i); + struct page_info *pg = vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE); + + rc = p2m_add_page(d, gfn, page_to_mfn(pg), 0, p2m_ram_rw); + if ( rc ) + /* + * No rollback of previously added pages: The caller + * (arch_ioreq_server_disable) has no error handling path, + * and partial failure here will be cleaned up when the + * ioreq server is eventually destroyed. + */ + return rc; + + paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn))); + } + return 0; } int arch_ioreq_server_map_pages(struct ioreq_server *s) diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c index f5fd30ce12..3800c8c62a 100644 --- a/xen/common/ioreq.c +++ b/xen/common/ioreq.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -95,12 +96,10 @@ static struct ioreq_server *get_ioreq_server(const struct domain *d, static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v) { - shared_iopage_t *p = s->ioreq.va; - ASSERT((v == current) || !vcpu_runnable(v)); - ASSERT(p != NULL); + ASSERT(s->ioreq != NULL); - return &p->vcpu_ioreq[v->vcpu_id]; + return &s->ioreq[v->vcpu_id]; } /* @@ -260,9 +259,32 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; + struct ioreq_page *iorp; struct page_info *page; + if ( !buf ) + { + if ( s->ioreq ) + { + /* + * If a guest frame has already been mapped (which may happen + * on demand if ioreq_server_get_info() is called), then + * allocating a page is not permitted. + */ + if ( !gfn_eq(s->ioreq_gfn, INVALID_GFN) ) + return -EPERM; + + return 0; + } + + s->ioreq = xvzalloc_array(ioreq_t, s->target->max_vcpus); + + return s->ioreq ? 0 : -ENOMEM; + } + + /* bufioreq: single page allocation */ + iorp = &s->bufioreq; + if ( iorp->page ) { /* @@ -308,8 +330,17 @@ static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) static void ioreq_server_free_mfn(struct ioreq_server *s, bool buf) { - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; - struct page_info *page = iorp->page; + struct ioreq_page *iorp; + struct page_info *page; + + if ( !buf ) + { + XVFREE(s->ioreq); + return; + } + + iorp = &s->bufioreq; + page = iorp->page; if ( !page ) return; @@ -333,11 +364,29 @@ bool is_ioreq_server_page(struct domain *d, const struct page_info *page) FOR_EACH_IOREQ_SERVER(d, id, s) { - if ( (s->ioreq.page == page) || (s->bufioreq.page == page) ) + if ( s->bufioreq.page == page ) { found = true; break; } + + if ( s->ioreq ) + { + unsigned int i; + + for ( i = 0; i < nr_ioreq_pages(d); i++ ) + { + if ( vmap_to_page((char *)s->ioreq + + i * PAGE_SIZE) == page ) + { + found = true; + break; + } + } + + if ( found ) + break; + } } rspin_unlock(&d->ioreq_server.lock); @@ -350,7 +399,7 @@ static void ioreq_server_update_evtchn(struct ioreq_server *s, { ASSERT(spin_is_locked(&s->lock)); - if ( s->ioreq.va != NULL ) + if ( s->ioreq != NULL ) { ioreq_t *p = get_ioreq(s, sv->vcpu); @@ -590,7 +639,7 @@ static int ioreq_server_init(struct ioreq_server *s, INIT_LIST_HEAD(&s->ioreq_vcpu_list); spin_lock_init(&s->bufioreq_lock); - s->ioreq.gfn = INVALID_GFN; + s->ioreq_gfn = INVALID_GFN; s->bufioreq.gfn = INVALID_GFN; rc = ioreq_server_alloc_rangesets(s, id); @@ -769,7 +818,7 @@ static int ioreq_server_get_info(struct domain *d, ioservid_t id, } if ( ioreq_gfn ) - *ioreq_gfn = gfn_x(s->ioreq.gfn); + *ioreq_gfn = gfn_x(s->ioreq_gfn); if ( HANDLE_BUFIOREQ(s) ) { @@ -812,26 +861,30 @@ int ioreq_server_get_frame(struct domain *d, ioservid_t id, if ( rc ) goto out; - switch ( idx ) + if ( idx == XENMEM_resource_ioreq_server_frame_bufioreq) { - case XENMEM_resource_ioreq_server_frame_bufioreq: rc = -ENOENT; if ( !HANDLE_BUFIOREQ(s) ) goto out; *mfn = page_to_mfn(s->bufioreq.page); rc = 0; - break; - - case XENMEM_resource_ioreq_server_frame_ioreq(0): - *mfn = page_to_mfn(s->ioreq.page); - rc = 0; - break; + } + else if (( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) ) && + ( idx < XENMEM_resource_ioreq_server_frame_ioreq(nr_ioreq_pages(d)) )) + { + unsigned int page_idx = idx - XENMEM_resource_ioreq_server_frame_ioreq(0); - default: rc = -EINVAL; - break; + if ( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) && + page_idx < nr_ioreq_pages(d) && s->ioreq ) + { + *mfn = vmap_to_mfn((char *)s->ioreq + page_idx * PAGE_SIZE); + rc = 0; + } } + else + rc = -EINVAL; out: rspin_unlock(&d->ioreq_server.lock); diff --git a/xen/include/public/hvm/ioreq.h b/xen/include/public/hvm/ioreq.h index 7a6bc760d0..1c1a9e61ae 100644 --- a/xen/include/public/hvm/ioreq.h +++ b/xen/include/public/hvm/ioreq.h @@ -49,6 +49,11 @@ struct ioreq { }; typedef struct ioreq ioreq_t; +/* + * Deprecated: shared_iopage is no longer used by Xen internally. + * The ioreq server now uses a dynamically sized ioreq_t array + * to support more than 128 vCPUs. + */ struct shared_iopage { struct ioreq vcpu_ioreq[1]; }; diff --git a/xen/include/xen/ioreq.h b/xen/include/xen/ioreq.h index e86f0869fa..a4c7621f3f 100644 --- a/xen/include/xen/ioreq.h +++ b/xen/include/xen/ioreq.h @@ -19,9 +19,19 @@ #ifndef __XEN_IOREQ_H__ #define __XEN_IOREQ_H__ +#include #include #include +#include + +/* 4096 / 32 = 128 ioreq slots per page */ +#define IOREQS_PER_PAGE (PAGE_SIZE / sizeof(ioreq_t)) + +static inline unsigned int nr_ioreq_pages(const struct domain *d) +{ + return DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE); +} struct ioreq_page { gfn_t gfn; @@ -45,7 +55,8 @@ struct ioreq_server { /* Lock to serialize toolstack modifications */ spinlock_t lock; - struct ioreq_page ioreq; + ioreq_t *ioreq; + gfn_t ioreq_gfn; struct list_head ioreq_vcpu_list; struct ioreq_page bufioreq; -- 2.51.0 -- Julian Vetter | Vates Hypervisor & Kernel Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:05:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:05:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238614.1540223 (Exim 4.92) (envelope-from ) id 1vuSoN-0007Xv-8q; Mon, 23 Feb 2026 10:05:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238614.1540223; Mon, 23 Feb 2026 10:05:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoN-0007Xo-5b; Mon, 23 Feb 2026 10:05:07 +0000 Received: by outflank-mailman (input) for mailman id 1238614; Mon, 23 Feb 2026 10:05:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoL-0007XS-Dm for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:05:05 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1f3959e5-109f-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:05:04 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id AC20141202E0; Mon, 23 Feb 2026 05:04:44 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1f3959e5-109f-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH 1/4] tools/tests/x86_emulator: fix 'shifting a negative signed value is undefined' Date: Mon, 23 Feb 2026 10:04:52 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang-21 refuses to compile this: ``` test_x86_emulator.c:1164:24: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] 1164 | regs.r8 = (-1L << 40) + 1; | ~~~ ^ 1 error generated. ``` The shift could also exceed the width of the type on some systems. I confirmed that both the old and the new code would produce the same value with GCC on x86-64: `0xffffff0000000001`. Signed-off-by: Edwin Török --- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 39e8056d77..a25eca1634 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -1161,7 +1161,7 @@ int main(int argc, char **argv) instr[0] = 0x4d; instr[1] = 0x0f; instr[2] = 0xbb; instr[3] = 0x03; regs.eflags = EFLAGS_ALWAYS_SET; regs.rip = (unsigned long)&instr[0]; - regs.r8 = (-1L << 40) + 1; + regs.r8 = (~0ULL << 40) + 1; regs.r11 = (unsigned long)(res + (1L << 35)); rc = x86_emulate(&ctxt, &emulops); if ( (rc != X86EMUL_OKAY) || -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:05:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:05:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238616.1540244 (Exim 4.92) (envelope-from ) id 1vuSoO-0007yH-Nw; Mon, 23 Feb 2026 10:05:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238616.1540244; Mon, 23 Feb 2026 10:05:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoO-0007yA-Hl; Mon, 23 Feb 2026 10:05:08 +0000 Received: by outflank-mailman (input) for mailman id 1238616; Mon, 23 Feb 2026 10:05:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoM-0007Xe-Li for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:05:06 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1ed4dfb6-109f-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:05:03 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id E3F9241202D4; Mon, 23 Feb 2026 05:04:43 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1ed4dfb6-109f-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH 0/4] Fix building tools/tests/x86_emulator with clang-21 Date: Mon, 23 Feb 2026 10:04:51 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While working on another patch series I noticed that `clang-21` cannot build `tools/tests/x86_emulator`. Once I fixed that `xmm0` related tests failed, because `clang` doesn't support `-ffixed-xmm0`. This series fixes building and running the test with `clang`. There might still be some latent bugs in the tests though, i.e. `xmm0` may not be the only reason it fails on clang: the `fxsave` tests have 2 overlapping areas of memory at `res + 0x80`, and `res + 0x100` of length `0x200`. Instead the 2nd area should start at `0x280`, and the memset should clear an area of `0x480`. I didn't attempt to fix all those, because attempting to do so caused the tests to start failing on GCC. For convenience this patch series is also available at: https://gitlab.com/xen-project/people/edwintorok/xen/-/compare/staging...private%2Fedvint%2Femulator?from_project_id=2336572 https://gitlab.com/xen-project/people/edwintorok/xen/-/pipelines/2343355874 Edwin Török (4): tools/tests/x86_emulator: fix 'shifting a negative signed value is undefined' tools/tests/x86_emulator: avoid duplicating loop body tools/tests/x86_emulator: fix build on clang-21 tools/tests/x86_emulator: disable xmm* tests on clang tools/tests/x86_emulator/Makefile | 1 + tools/tests/x86_emulator/test_x86_emulator.c | 48 +++++++++++++++++++- 2 files changed, 47 insertions(+), 2 deletions(-) -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:05:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:05:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238615.1540227 (Exim 4.92) (envelope-from ) id 1vuSoN-0007aD-EU; Mon, 23 Feb 2026 10:05:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238615.1540227; Mon, 23 Feb 2026 10:05:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoN-0007ZU-B9; Mon, 23 Feb 2026 10:05:07 +0000 Received: by outflank-mailman (input) for mailman id 1238615; Mon, 23 Feb 2026 10:05:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoM-0007XS-2V for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:05:06 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1fb2aa93-109f-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:05:05 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 7270741202FF; Mon, 23 Feb 2026 05:04:45 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1fb2aa93-109f-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH 2/4] tools/tests/x86_emulator: avoid duplicating loop body Date: Mon, 23 Feb 2026 10:04:53 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang would duplicate the loop body and end up with a double definition of the symbol: ``` /tmp/test_x86_emulator-0f3576.s:27823: Error: symbol `vmovsh_to_mem' is already defined /tmp/test_x86_emulator-0f3576.s:27825: Error: symbol `.Lvmovsh_to_mem_end' is already defined ``` This is a valid transformation, that even GCC might do, see https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Volatile-1 which says that `%=` should be used instead. However the C code here also needs to know the name of the label, so I don't immediately see how to solve that. For now mark the loop variable `volatile` to prevent the optimization as a workaround. (another way to fix this could be to move the loop body into a function, but a compiler might inline it, or specialize it, leading to the same problem) Signed-off-by: Edwin Török --- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index a25eca1634..cf4e5cc593 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -5248,7 +5248,7 @@ int main(int argc, char **argv) memset(res + 3, ~0, 8); regs.eax = (unsigned long)res; regs.ecx = ~0; - for ( i = 0; i < 2; ++i ) + for (volatile int i = 0; i < 2; ++i ) { decl_insn(vmovsh_to_mem); -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:05:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:05:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238617.1540248 (Exim 4.92) (envelope-from ) id 1vuSoO-00081h-Vy; Mon, 23 Feb 2026 10:05:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238617.1540248; Mon, 23 Feb 2026 10:05:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoO-000819-Qy; Mon, 23 Feb 2026 10:05:08 +0000 Received: by outflank-mailman (input) for mailman id 1238617; Mon, 23 Feb 2026 10:05:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoN-0007XS-2q for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:05:07 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2024b709-109f-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:05:05 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 39EB74120406; Mon, 23 Feb 2026 05:04:46 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2024b709-109f-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH 3/4] tools/tests/x86_emulator: fix build on clang-21 Date: Mon, 23 Feb 2026 10:04:54 +0000 Message-ID: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang-21's built-in assembler is enabled by default, but it doesn't support some mnemonics: ``` test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' 2636 | "fidivs %1\n\t" test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); | ^ test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' 4251 | put_insn(vpcmpestri, | ^ ``` Use the external assembler with Clang for consistency with GCC. Signed-off-by: Edwin Török --- tools/tests/x86_emulator/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 376cfe244d..2d8874a1d1 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -297,6 +297,7 @@ x86_emulate: HOSTCFLAGS-x86_64 := -fno-PIE $(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-pie) +$(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-integrated-as) HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:05:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:05:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238618.1540253 (Exim 4.92) (envelope-from ) id 1vuSoP-00086L-8h; Mon, 23 Feb 2026 10:05:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238618.1540253; Mon, 23 Feb 2026 10:05:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoP-00083d-2T; Mon, 23 Feb 2026 10:05:09 +0000 Received: by outflank-mailman (input) for mailman id 1238618; Mon, 23 Feb 2026 10:05:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSoO-0007Xe-Eg for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:05:08 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 20a8c1e0-109f-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:05:06 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 0066C41202E0; Mon, 23 Feb 2026 05:04:46 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 20a8c1e0-109f-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH 4/4] tools/tests/x86_emulator: disable xmm* tests on clang Date: Mon, 23 Feb 2026 10:04:55 +0000 Message-ID: <9e380de50b64e45e9044a2f4bcf1a5bdb7e74a29.1771840208.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang-21 doesn't support `-ffixed-xmm0`, so `%xmm0` won't have the expected value. Disable these tests on clang. Signed-off-by: Edwin Török --- tools/tests/x86_emulator/test_x86_emulator.c | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index cf4e5cc593..3d0ad07c6b 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -2683,6 +2683,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing fxsave 4(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_fxsr ) { const uint16_t nine = 9; @@ -2712,6 +2713,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing fxrstor -4(%ecx)..."); @@ -2748,6 +2750,7 @@ int main(int argc, char **argv) #ifdef __x86_64__ printf("%-40s", "Testing fxsaveq 8(%edx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_fxsr ) { memset(res + 0x80, 0xcc, 0x400); @@ -2765,6 +2768,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); #endif @@ -2816,6 +2820,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing movq %xmm0,32(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movq_to_mem2); @@ -2837,9 +2842,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movq 32(%ecx),%xmm1..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movq_from_mem2); @@ -2860,9 +2867,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovq %xmm1,32(%edx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovq_to_mem); @@ -2884,9 +2893,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovq 32(%edx),%xmm0..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovq_from_mem); @@ -2907,9 +2918,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing {evex} vmovq %xmm1,32(%edx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx512f ) { decl_insn(evex_vmovq_to_mem); @@ -2931,9 +2944,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing {evex} vmovq 32(%edx),%xmm0..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx512f ) { decl_insn(evex_vmovq_from_mem); @@ -2954,9 +2969,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movdqu %xmm2,(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movdqu_to_mem); @@ -2976,9 +2993,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movdqu (%edx),%xmm4..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movdqu_from_mem); @@ -3001,6 +3020,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovdqu %ymm2,(%ecx)..."); @@ -3386,6 +3406,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing movd %xmm2,32(%edx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movd_to_mem2); @@ -3407,9 +3428,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movd 32(%edx),%xmm3..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movd_from_mem2); @@ -3435,9 +3458,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovd %xmm1,32(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovd_to_mem); @@ -3459,9 +3484,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovd 32(%ecx),%xmm2..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovd_from_mem); @@ -3487,6 +3514,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing {evex} vmovd %xmm3,32(%ecx)..."); @@ -3597,6 +3625,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing movd %xmm2,%ebx..."); +#ifndef __clang__ if ( stack_exec && cpu_has_sse2 ) { decl_insn(movd_to_reg2); @@ -3619,6 +3648,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movd %ebx,%xmm3..."); @@ -3651,6 +3681,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing vmovd %xmm1,%ebx..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovd_to_reg); @@ -3673,6 +3704,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovd %ebx,%xmm2..."); @@ -3705,6 +3737,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing {evex} vmovd %xmm2,%ebx..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx512f ) { decl_insn(evex_vmovd_to_reg); @@ -3728,6 +3761,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing {evex} vmovd %ebx,%xmm1..."); @@ -3781,6 +3815,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing movq %xmm2,32(%edx)..."); +#ifndef __clang__ if ( stack_exec ) { decl_insn(movq_to_mem4); @@ -3802,9 +3837,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovq %xmm1,32(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovq_to_mem2); @@ -3830,9 +3867,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing {evex} vmovq %xmm11,32(%ecx)..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx512f ) { decl_insn(evex_vmovq_to_mem2); @@ -3860,6 +3899,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing movq %mm3,%rbx..."); @@ -3883,6 +3923,7 @@ int main(int argc, char **argv) printf("skipped\n"); printf("%-40s", "Testing movq %xmm2,%rbx..."); +#ifndef __clang__ if ( stack_exec ) { decl_insn(movq_to_reg2); @@ -3900,9 +3941,11 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovq %xmm1,%rbx..."); +#ifndef __clang__ if ( stack_exec && cpu_has_avx ) { decl_insn(vmovq_to_reg); @@ -3920,6 +3963,7 @@ int main(int argc, char **argv) printf("okay\n"); } else +#endif printf("skipped\n"); printf("%-40s", "Testing vmovq %xmm22,%rbx..."); -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238757.1540305 (Exim 4.92) (envelope-from ) id 1vuSxL-0003Xe-6y; Mon, 23 Feb 2026 10:14:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238757.1540305; Mon, 23 Feb 2026 10:14:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxK-0003V4-Vn; Mon, 23 Feb 2026 10:14:22 +0000 Received: by outflank-mailman (input) for mailman id 1238757; Mon, 23 Feb 2026 10:14:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxJ-0002wR-Ps for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:21 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6a1d5841-10a0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:14:19 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id A3B9C4122490; Mon, 23 Feb 2026 05:13:59 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6a1d5841-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand Subject: [PATCH 3/7] tools/tests/*/Makefile: factor out build rules Date: Mon, 23 Feb 2026 10:14:07 +0000 Message-ID: <57d93b2a6e9f3cdc70e4446c469226dc015a1944.1771840831.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also makes CFLAGS consistent across all tests, e.g. test_vpci would now fail to build with an unused variable error if it hadn't been fixed in a previous commit. Introduce a symlink test_vpci.c -> main.c, since this is the only test using a different .c file name from the main executable (could also rename the file instead). Signed-off-by: Edwin Török --- tools/tests/Rules.mk | 9 +++++++++ tools/tests/cpu-policy/Makefile | 15 ++++----------- tools/tests/domid/Makefile | 11 +++-------- tools/tests/mem-claim/Makefile | 8 -------- tools/tests/paging-mempool/Makefile | 8 -------- tools/tests/pdx/Makefile | 4 ---- tools/tests/rangeset/Makefile | 9 +-------- tools/tests/resource/Makefile | 8 -------- tools/tests/tsx/Makefile | 8 -------- tools/tests/vpci/.gitignore | 1 + tools/tests/vpci/Makefile | 10 +++++++--- tools/tests/xenstore/Makefile | 8 +------- 12 files changed, 26 insertions(+), 73 deletions(-) create mode 100644 tools/tests/vpci/.gitignore diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk index f7ef76bf4f..2de9e94546 100644 --- a/tools/tests/Rules.mk +++ b/tools/tests/Rules.mk @@ -45,4 +45,13 @@ install: all uninstall: $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGETS)) +CFLAGS += -D__XEN_TOOLS__ +CFLAGS += $(CFLAGS_xeninclude) + +%.o: Makefile + +$(TARGET): $(TARGET).o + $(CC) $^ -o $@ $(LDFLAGS) $(APPEND_LDFLAGS) + -include $(DEPS_INCLUDE) + diff --git a/tools/tests/cpu-policy/Makefile b/tools/tests/cpu-policy/Makefile index 700e325215..4ab3baf1fb 100644 --- a/tools/tests/cpu-policy/Makefile +++ b/tools/tests/cpu-policy/Makefile @@ -3,26 +3,19 @@ include $(XEN_ROOT)/tools/Rules.mk TARGETS := +TARGET := test-cpu-policy + # For brevity, these tests make extensive use of designated initialisers in # anonymous unions, but GCCs older than 4.6 can't cope. Ignore the test in # this case. ifneq ($(gcc)$(call cc-ver,$(CC),lt,0x040600),yy) -TARGETS += test-cpu-policy +TARGETS += $(TARGET) else $(warning Test harness not built, use newer compiler than "$(CC)" (version $(shell $(CC) -dumpversion))) endif -CFLAGS += -D__XEN_TOOLS__ -CFLAGS += $(CFLAGS_xeninclude) -CFLAGS += $(APPEND_CFLAGS) - -LDFLAGS += $(APPEND_LDFLAGS) - vpath %.c ../../../xen/lib/x86 -%.o: Makefile - -test-cpu-policy: test-cpu-policy.o msr.o cpuid.o policy.o - $(CC) $^ -o $@ $(LDFLAGS) +$(TARGET): msr.o cpuid.o policy.o include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/domid/Makefile b/tools/tests/domid/Makefile index 92f11777f2..89e4333bfb 100644 --- a/tools/tests/domid/Makefile +++ b/tools/tests/domid/Makefile @@ -7,7 +7,8 @@ XEN_ROOT=$(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk -TARGETS += test-domid +TARGET := test-domid +TARGETS += $(TARGET) define list-c-headers $(shell sed -n \ @@ -39,7 +40,6 @@ endef clean:: $(RM) -r generated -CFLAGS += -D__XEN_TOOLS__ # find-next-bit.c CFLAGS += '-DEXPORT_SYMBOL(x)=' \ -Dfind_first_bit \ @@ -47,12 +47,8 @@ CFLAGS += '-DEXPORT_SYMBOL(x)=' \ -Dfind_next_bit \ -Dfind_next_bit_le \ -Dfind_next_zero_bit_le -CFLAGS += $(APPEND_CFLAGS) -CFLAGS += $(CFLAGS_xeninclude) CFLAGS += -I./generated/ -LDFLAGS += $(APPEND_LDFLAGS) - vpath find-next-bit.c $(XEN_ROOT)/xen/lib/ # Point to the hypervisor code and generate test harness dependencies @@ -60,7 +56,6 @@ vpath find-next-bit.c $(XEN_ROOT)/xen/lib/ # within a mocked environment. $(eval $(call vpath-with-harness-deps,domid.c,$(XEN_ROOT)/xen/common/)) -test-domid: domid.o find-next-bit.o test-domid.o - $(CC) $^ -o $@ $(LDFLAGS) +$(TARGET): domid.o find-next-bit.o include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile index 6790e48417..eeae1eb5d2 100644 --- a/tools/tests/mem-claim/Makefile +++ b/tools/tests/mem-claim/Makefile @@ -4,16 +4,8 @@ include $(XEN_ROOT)/tools/Rules.mk TARGET := test-mem-claim TARGETS := $(TARGET) -CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) -CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) -LDFLAGS += $(APPEND_LDFLAGS) - -%.o: Makefile - -$(TARGET): test-mem-claim.o - $(CC) -o $@ $< $(LDFLAGS) include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/paging-mempool/Makefile b/tools/tests/paging-mempool/Makefile index 9ebeb24ab6..ad4b7fc65f 100644 --- a/tools/tests/paging-mempool/Makefile +++ b/tools/tests/paging-mempool/Makefile @@ -4,16 +4,8 @@ include $(XEN_ROOT)/tools/Rules.mk TARGET := test-paging-mempool TARGETS := $(TARGET) -CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) -CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) -LDFLAGS += $(APPEND_LDFLAGS) - -%.o: Makefile - -$(TARGET): test-paging-mempool.o - $(CC) -o $@ $< $(LDFLAGS) include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/pdx/Makefile b/tools/tests/pdx/Makefile index a5129a8282..bc19a217a5 100644 --- a/tools/tests/pdx/Makefile +++ b/tools/tests/pdx/Makefile @@ -8,10 +8,6 @@ DEPS_RM += pdx.h pdx.h: $(XEN_ROOT)/xen/include/xen/pdx.h sed -e '/^#[[:space:]]*include/d' <$< >$@ -CFLAGS += -D__XEN_TOOLS__ -CFLAGS += $(APPEND_CFLAGS) -CFLAGS += $(CFLAGS_xeninclude) - test-pdx-mask: CFLAGS += -DCONFIG_PDX_MASK_COMPRESSION test-pdx-offset: CFLAGS += -DCONFIG_PDX_OFFSET_COMPRESSION diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile index c76746ce7a..843b2129a9 100644 --- a/tools/tests/rangeset/Makefile +++ b/tools/tests/rangeset/Makefile @@ -15,15 +15,8 @@ rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c # Remove includes and add the test harness header sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@ -CFLAGS += -D__XEN_TOOLS__ -CFLAGS += $(APPEND_CFLAGS) -CFLAGS += $(CFLAGS_xeninclude) - -LDFLAGS += $(APPEND_LDFLAGS) - test-rangeset.o rangeset.o: list.h rangeset.h -test-rangeset: rangeset.o test-rangeset.o - $(CC) $^ -o $@ $(LDFLAGS) +$(TARGET): rangeset.o include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/resource/Makefile b/tools/tests/resource/Makefile index 764e34f3fa..11ce782b29 100644 --- a/tools/tests/resource/Makefile +++ b/tools/tests/resource/Makefile @@ -4,20 +4,12 @@ include $(XEN_ROOT)/tools/Rules.mk TARGET := test-resource TARGETS := $(TARGET) -CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) CFLAGS += $(CFLAGS_libxenforeginmemory) CFLAGS += $(CFLAGS_libxengnttab) -CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) LDFLAGS += $(LDLIBS_libxenforeignmemory) LDFLAGS += $(LDLIBS_libxengnttab) -LDFLAGS += $(APPEND_LDFLAGS) - -%.o: Makefile - -$(TARGET): test-resource.o - $(CC) -o $@ $< $(LDFLAGS) include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/tsx/Makefile b/tools/tests/tsx/Makefile index 817a63b085..54852b0327 100644 --- a/tools/tests/tsx/Makefile +++ b/tools/tests/tsx/Makefile @@ -5,18 +5,10 @@ TARGET := test-tsx TARGETS := $(TARGET) CFLAGS += -I$(XEN_ROOT)/tools/libs/ctrl -I$(XEN_ROOT)/tools/libs/guest -CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) CFLAGS += $(CFLAGS_libxenguest) -CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) LDFLAGS += $(LDLIBS_libxenguest) -LDFLAGS += $(APPEND_LDFLAGS) - -%.o: Makefile - -$(TARGET): test-tsx.o - $(CC) -o $@ $< $(LDFLAGS) include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/vpci/.gitignore b/tools/tests/vpci/.gitignore new file mode 100644 index 0000000000..8be877b29a --- /dev/null +++ b/tools/tests/vpci/.gitignore @@ -0,0 +1 @@ +test_vpci.c diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile index 597303e31d..41ff867cdd 100644 --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -4,10 +4,14 @@ include $(XEN_ROOT)/tools/Rules.mk TARGET := test_vpci TARGETS := $(TARGET) -$(TARGET): vpci.c vpci.h list.h main.c emul.h - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c +$(TARGET).c: main.c + ln -sf $< $@ -DEPS_RM += vpci.h vpci.c list.h +vpci.o: vpci.h +$(TARGET).o: vpci.h emul.h list.h +$(TARGET): vpci.o + +DEPS_RM += vpci.h vpci.c list.h $(TARGET).c vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c # Remove includes and add the test harness header diff --git a/tools/tests/xenstore/Makefile b/tools/tests/xenstore/Makefile index 56cfe07f25..e1a0c086a9 100644 --- a/tools/tests/xenstore/Makefile +++ b/tools/tests/xenstore/Makefile @@ -5,17 +5,11 @@ TARGET := test-xenstore TARGETS := $(TARGET) CFLAGS += $(CFLAGS_libxenstore) -CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenstore) -LDFLAGS += $(APPEND_LDFLAGS) + ifeq ($(CONFIG_Linux),y) LDFLAGS += -Wl,--as-needed -lc -lrt endif -%.o: Makefile - -test-xenstore: test-xenstore.o - $(CC) -o $@ $< $(LDFLAGS) - include $(XEN_ROOT)/tools/tests/Rules.mk -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238756.1540299 (Exim 4.92) (envelope-from ) id 1vuSxK-0003S3-Rq; Mon, 23 Feb 2026 10:14:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238756.1540299; Mon, 23 Feb 2026 10:14:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxK-0003Rm-O5; Mon, 23 Feb 2026 10:14:22 +0000 Received: by outflank-mailman (input) for mailman id 1238756; Mon, 23 Feb 2026 10:14:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxJ-0003AC-JP for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:21 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6a958069-10a0-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:14:20 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 7ECE04122496; Mon, 23 Feb 2026 05:14:00 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6a958069-10a0-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand Subject: [PATCH 4/7] tools/tests: factor out common helpers Date: Mon, 23 Feb 2026 10:14:08 +0000 Message-ID: <1fc62b8c258f9113c8bfd6401b71c411707fc3f7.1771840831.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Share fail/verify macros, and the handling or nr_failures. The tests will no longer have a `main` function, but instead have a `test_main`. This ensures that `nr_failures` is handled consistently. This'll make it easier to write new tests that are consistent with the existing ones, without having to copy/paste. Signed-off-by: Edwin Török --- tools/tests/Rules.mk | 3 +++ tools/tests/common/tests.c | 15 +++++++++++++++ tools/tests/common/tests.h | 18 ++++++++++++++++++ tools/tests/cpu-policy/test-cpu-policy.c | 7 +------ tools/tests/domid/test-domid.c | 11 ++--------- tools/tests/mem-claim/test-mem-claim.c | 9 ++------- .../tests/paging-mempool/test-paging-mempool.c | 9 ++------- tools/tests/pdx/test-pdx.c | 3 ++- tools/tests/rangeset/test-rangeset.c | 3 ++- tools/tests/resource/test-resource.c | 9 ++------- tools/tests/tsx/test-tsx.c | 10 ++-------- tools/tests/vpci/main.c | 4 ++-- tools/tests/xenstore/test-xenstore.c | 4 +++- 13 files changed, 56 insertions(+), 49 deletions(-) create mode 100644 tools/tests/common/tests.c create mode 100644 tools/tests/common/tests.h diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk index 2de9e94546..9e03e1e0b8 100644 --- a/tools/tests/Rules.mk +++ b/tools/tests/Rules.mk @@ -47,11 +47,14 @@ uninstall: CFLAGS += -D__XEN_TOOLS__ CFLAGS += $(CFLAGS_xeninclude) +CFLAGS += -I../common/ %.o: Makefile $(TARGET): $(TARGET).o $(CC) $^ -o $@ $(LDFLAGS) $(APPEND_LDFLAGS) +$(TARGETS): $(XEN_ROOT)/tools/tests/common/tests.o + -include $(DEPS_INCLUDE) diff --git a/tools/tests/common/tests.c b/tools/tests/common/tests.c new file mode 100644 index 0000000000..43d9ea5442 --- /dev/null +++ b/tools/tests/common/tests.c @@ -0,0 +1,15 @@ +#include "tests.h" + +unsigned int nr_failures; + +int main(int argc, char *argv[argc+1]) +{ + int rc = test_main(argc, argv); + + if ( nr_failures ) + printf("Done: %u failures\n", nr_failures); + else + printf("Done: all ok\n"); + + return rc ? rc : !!nr_failures; +} diff --git a/tools/tests/common/tests.h b/tools/tests/common/tests.h new file mode 100644 index 0000000000..f0df616e3e --- /dev/null +++ b/tools/tests/common/tests.h @@ -0,0 +1,18 @@ +#include +#include + +extern unsigned int nr_failures; + +#define fail(fmt, ...) \ +({ \ + nr_failures++; \ + (void)printf(fmt, ##__VA_ARGS__); \ +}) + +#define verify(exp, fmt, args...) \ +while (!(exp)) { \ + printf(fmt, ## args); \ + exit(EX_SOFTWARE); \ +} + +extern int test_main(int argc, char *argv[argc+1]); diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 301df2c002..67a36c80d5 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -650,7 +650,7 @@ static void test_is_compatible_failure(void) } } -int main(int argc, char **argv) +int test_main(int argc, char **argv) { printf("CPU Policy unit tests\n"); @@ -667,10 +667,5 @@ int main(int argc, char **argv) test_is_compatible_success(); test_is_compatible_failure(); - if ( nr_failures ) - printf("Done: %u failures\n", nr_failures); - else - printf("Done: all ok\n"); - return !!nr_failures; } diff --git a/tools/tests/domid/test-domid.c b/tools/tests/domid/test-domid.c index 5915c4699a..de39bae8b0 100644 --- a/tools/tests/domid/test-domid.c +++ b/tools/tests/domid/test-domid.c @@ -5,20 +5,13 @@ * Copyright 2025 Ford Motor Company */ -#include - +#include "tests.h" #include "harness.h" -#define verify(exp, fmt, args...) \ -while (!(exp)) { \ - printf(fmt, ## args); \ - exit(EX_SOFTWARE); \ -} - /* * Fail on the first error, since tests are dependent on each other. */ -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { domid_t expected, allocated; diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c index ad038e45d1..1f3c70aace 100644 --- a/tools/tests/mem-claim/test-mem-claim.c +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -11,12 +11,7 @@ #include #include -static unsigned int nr_failures; -#define fail(fmt, ...) \ -({ \ - nr_failures++; \ - (void)printf(fmt, ##__VA_ARGS__); \ -}) +#include "tests.h" #define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) @@ -158,7 +153,7 @@ static void run_tests(void) physinfo.outstanding_pages); } -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { int rc; diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 1ebc13455a..27fd109031 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -10,12 +10,7 @@ #include #include -static unsigned int nr_failures; -#define fail(fmt, ...) \ -({ \ - nr_failures++; \ - (void)printf(fmt, ##__VA_ARGS__); \ -}) +#include "tests.h" static xc_interface *xch; static uint32_t domid; @@ -136,7 +131,7 @@ static void run_tests(void) 64 << 20, size_bytes); } -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { int rc; diff --git a/tools/tests/pdx/test-pdx.c b/tools/tests/pdx/test-pdx.c index eefd54c768..d2d143ec76 100644 --- a/tools/tests/pdx/test-pdx.c +++ b/tools/tests/pdx/test-pdx.c @@ -5,6 +5,7 @@ * Copyright (C) 2025 Cloud Software Group */ +#include "tests.h" #include "harness.h" #include "../../xen/common/pdx.c" @@ -29,7 +30,7 @@ static void print_ranges(const struct range *r) } } -int main(int argc, char **argv) +int main(int argc, char *argv[argc+1]) { static const struct { struct range ranges[MAX_RANGES]; diff --git a/tools/tests/rangeset/test-rangeset.c b/tools/tests/rangeset/test-rangeset.c index c14a908b4f..3f8ac95097 100644 --- a/tools/tests/rangeset/test-rangeset.c +++ b/tools/tests/rangeset/test-rangeset.c @@ -5,6 +5,7 @@ * Copyright (C) 2025 Cloud Software Group */ +#include "tests.h" #include "harness.h" struct range { @@ -140,7 +141,7 @@ static void print_both(struct rangeset *r, const struct range *expected, printf("[%ld, %ld]\n", expected[i].start, expected[i].end); } -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { struct rangeset *r = rangeset_new(NULL, NULL, 0); unsigned int i; diff --git a/tools/tests/resource/test-resource.c b/tools/tests/resource/test-resource.c index a7f2d04643..4155b62507 100644 --- a/tools/tests/resource/test-resource.c +++ b/tools/tests/resource/test-resource.c @@ -9,12 +9,7 @@ #include #include -static unsigned int nr_failures; -#define fail(fmt, ...) \ -({ \ - nr_failures++; \ - (void)printf(fmt, ##__VA_ARGS__); \ -}) +#include "tests.h" static xc_interface *xch; static xenforeignmemory_handle *fh; @@ -255,7 +250,7 @@ static void test_domain_configurations(void) } } -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { int rc; diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index 5af04953f3..ab099e9038 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -30,6 +30,7 @@ #include #include +#include "tests.h" #include "xg_private.h" enum { @@ -44,13 +45,6 @@ enum { #define MSR_TSX_CTRL 0x00000122 #define MSR_MCU_OPT_CTRL 0x00000123 -static unsigned int nr_failures; -#define fail(fmt, ...) \ -({ \ - nr_failures++; \ - (void)printf(fmt, ##__VA_ARGS__); \ -}) - static xc_interface *xch; /* @@ -540,7 +534,7 @@ static void test_tsx(void) test_guests(); } -int main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { printf("TSX tests\n"); diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c index 3753417e86..0e4f24aace 100644 --- a/tools/tests/vpci/main.c +++ b/tools/tests/vpci/main.c @@ -16,6 +16,7 @@ * License along with this program; If not, see . */ +#include "tests.h" #include "emul.h" /* Single vcpu (current), and single domain with a single PCI device. */ @@ -175,8 +176,7 @@ void multiwrite4_check(unsigned int reg) multiread4_check(reg, val); } -int -main(int argc, char **argv) +int test_main(int argc, char *argv[argc+1]) { /* Index storage by offset. */ uint32_t r0 = 0xdeadbeef; diff --git a/tools/tests/xenstore/test-xenstore.c b/tools/tests/xenstore/test-xenstore.c index 7a9bd9afb3..470cbeed30 100644 --- a/tools/tests/xenstore/test-xenstore.c +++ b/tools/tests/xenstore/test-xenstore.c @@ -33,6 +33,8 @@ #include +#include "tests.h" + #define TEST_PATH "xenstore-test" #define WRITE_BUFFERS_N 10 #define WRITE_BUFFERS_SIZE 4000 @@ -445,7 +447,7 @@ static void cleanup(void) } } -int main(int argc, char *argv[]) +int test_main(int argc, char *argv[argc+1]) { int opt, t, iters = 1, ret = 0, randtime = 0; char *test = NULL; -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238755.1540293 (Exim 4.92) (envelope-from ) id 1vuSxK-0003OY-HU; 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Mon, 23 Feb 2026 05:13:58 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 699db93f-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand , Anthony PERARD Subject: [PATCH 2/7] tools/tests/vpci/main.c: drop unused variables Date: Mon, 23 Feb 2026 10:14:06 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit They may become build failures. Signed-off-by: Edwin Török --- tools/tests/vpci/main.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c index 2ef8d4e03f..3753417e86 100644 --- a/tools/tests/vpci/main.c +++ b/tools/tests/vpci/main.c @@ -189,8 +189,6 @@ main(int argc, char **argv) uint32_t r24 = 0; uint8_t r28, r30; struct mask_data r32; - unsigned int i; - int rc; INIT_LIST_HEAD(&vpci.handlers); spin_lock_init(&vpci.lock); -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238753.1540272 (Exim 4.92) (envelope-from ) id 1vuSxI-0002wg-4T; Mon, 23 Feb 2026 10:14:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238753.1540272; Mon, 23 Feb 2026 10:14:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxI-0002wX-1V; Mon, 23 Feb 2026 10:14:20 +0000 Received: by outflank-mailman (input) for mailman id 1238753; Mon, 23 Feb 2026 10:14:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxH-0002wR-5s for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:19 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68a48beb-10a0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:14:16 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id D543941202E0; Mon, 23 Feb 2026 05:13:56 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68a48beb-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand Subject: [PATCH 0/7] Factor out common build rules and helpers in tools/tests Date: Mon, 23 Feb 2026 10:14:04 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are a lot of duplicate rules and code in tools/tests. To simplify writing new tests move common build rules into a `tools/tests/Rules.mk`, and helper macros/functions into `common/{tests,guests}.{c,h}`. This also ensures that CFLAGS are applied consistently across all tests (e.g. one test failed to build now due to an unused variable error). Guest creation also needs to test for the presence of PV, HVM HAP or HVM shadow support in Xen and create a guest accordingly. This can be shared. After these changes the per-test Makefile only contains entries specific to the test (its name, dependencies, etc.) and avoids having to copy&paste boilerplate code. `tools/tests/x86_emulator` remains unchanged, because the Makefile contains a lot of conditional build logic specific to that test. An upcoming patch series will introduce new tests using the simplified Makefile and shared helpers. For convenience this is also available at: https://gitlab.com/xen-project/people/edwintorok/xen/-/compare/staging...private%2Fedvint%2Fmigration-tests2?from_project_id=2336572 https://gitlab.com/xen-project/people/edwintorok/xen/-/pipelines/2342318716 Edwin Török (7): tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk tools/tests/vpci/main.c: drop unused variables tools/tests/*/Makefile: factor out build rules tools/tests: factor out common helpers tools/tests/common: ensure error messages have a newline tools/tests/tsx: move guest creation to common area tools/tests: print more debug info tools/tests/Rules.mk | 60 +++++++++++++ tools/tests/common/guests.c | 89 +++++++++++++++++++ tools/tests/common/guests.h | 11 +++ tools/tests/common/tests.c | 15 ++++ tools/tests/common/tests.h | 18 ++++ tools/tests/cpu-policy/Makefile | 41 ++------- tools/tests/cpu-policy/test-cpu-policy.c | 7 +- tools/tests/domid/Makefile | 37 ++------ tools/tests/domid/test-domid.c | 11 +-- tools/tests/mem-claim/Makefile | 31 +------ tools/tests/mem-claim/test-mem-claim.c | 9 +- tools/tests/paging-mempool/Makefile | 31 +------ .../paging-mempool/test-paging-mempool.c | 9 +- tools/tests/pdx/Makefile | 37 +------- tools/tests/pdx/test-pdx.c | 3 +- tools/tests/rangeset/Makefile | 36 +------- tools/tests/rangeset/test-rangeset.c | 3 +- tools/tests/resource/Makefile | 35 +------- tools/tests/resource/test-resource.c | 9 +- tools/tests/tsx/Makefile | 35 +------- tools/tests/tsx/test-tsx.c | 88 +++--------------- tools/tests/vpci/.gitignore | 1 + tools/tests/vpci/Makefile | 36 ++------ tools/tests/vpci/main.c | 6 +- tools/tests/xenstore/Makefile | 37 +------- tools/tests/xenstore/test-xenstore.c | 4 +- 26 files changed, 261 insertions(+), 438 deletions(-) create mode 100644 tools/tests/Rules.mk create mode 100644 tools/tests/common/guests.c create mode 100644 tools/tests/common/guests.h create mode 100644 tools/tests/common/tests.c create mode 100644 tools/tests/common/tests.h create mode 100644 tools/tests/vpci/.gitignore -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238754.1540283 (Exim 4.92) (envelope-from ) id 1vuSxJ-0003AJ-Bm; Mon, 23 Feb 2026 10:14:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238754.1540283; Mon, 23 Feb 2026 10:14:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxJ-0003AB-85; Mon, 23 Feb 2026 10:14:21 +0000 Received: by outflank-mailman (input) for mailman id 1238754; Mon, 23 Feb 2026 10:14:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxH-0002wR-UG for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:20 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 692e4533-10a0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:14:17 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 01342412248C; Mon, 23 Feb 2026 05:13:57 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 692e4533-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand Subject: [PATCH 1/7] tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk Date: Mon, 23 Feb 2026 10:14:05 +0000 Message-ID: <6fa0d95dad3d223cf8aaa923ae59fd0b3a97d4a0.1771840831.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce a new tools/tests/Rules.mk that must be included *last* in a Makefile, after TARGETS is defined. This reduces the boilerplate that must be copy pasted when new tests are written. Renamed TESTS to TARGETS in tools/tests/domid/Makefile Extend DEPS_RM, so that most tests don't need custom clean rules, except in tools/tests/domid which needs to remove a directory too. Make the run rules consistent: do not attempt to run the tests if HOSTCC != CC. The common rules use the rule forms which allow multiple TARGETS. tools/tests/x86_emulator/Makefile is unchanged, since this has a lot of conditional rules that are very different from the other tests. Signed-off-by: Edwin Török --- tools/tests/Rules.mk | 48 +++++++++++++++++++++++++++++ tools/tests/cpu-policy/Makefile | 26 +--------------- tools/tests/domid/Makefile | 28 ++--------------- tools/tests/mem-claim/Makefile | 23 ++------------ tools/tests/paging-mempool/Makefile | 23 ++------------ tools/tests/pdx/Makefile | 33 ++------------------ tools/tests/rangeset/Makefile | 27 ++-------------- tools/tests/resource/Makefile | 27 ++-------------- tools/tests/tsx/Makefile | 26 ++-------------- tools/tests/vpci/Makefile | 30 +++--------------- tools/tests/xenstore/Makefile | 29 ++--------------- 11 files changed, 72 insertions(+), 248 deletions(-) create mode 100644 tools/tests/Rules.mk diff --git a/tools/tests/Rules.mk b/tools/tests/Rules.mk new file mode 100644 index 0000000000..f7ef76bf4f --- /dev/null +++ b/tools/tests/Rules.mk @@ -0,0 +1,48 @@ +# Usage: include this last in your Makefile. +# +# For example: +# +# XEN_ROOT = $(CURDIR)/../../.. +# include $(XEN_ROOT)/tools/Rules.mk +# +# TARGETS := ... +# ... +# include $(XEN_ROOT)/tools/tests/Rules.mk + +ifndef XEN_ROOT +$(error XEN_ROOT is not defined) +endif + +.PHONY: all +all: $(TARGETS) +.DEFAULT_GOAL: all + +.PHONY: run +run: $(TARGETS) +ifeq ($(CC),$(HOSTCC)) + set -e; \ + for test in $? ; do \ + ./$$test ; \ + done +else + $(warning HOSTCC != CC, will not run test) +endif + +.PHONY: clean +clean:: + $(RM) -- *.o $(TARGETS) $(DEPS_RM) + +.PHONY: distclean +distclean: clean + $(RM) -- *~ + +.PHONY: install +install: all + $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests + $(if $(TARGETS),$(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests) + +.PHONY: uninstall +uninstall: + $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGETS)) + +-include $(DEPS_INCLUDE) diff --git a/tools/tests/cpu-policy/Makefile b/tools/tests/cpu-policy/Makefile index 24f87e2eca..700e325215 100644 --- a/tools/tests/cpu-policy/Makefile +++ b/tools/tests/cpu-policy/Makefile @@ -12,30 +12,6 @@ else $(warning Test harness not built, use newer compiler than "$(CC)" (version $(shell $(CC) -dumpversion))) endif -.PHONY: all -all: $(TARGETS) - -.PHONY: run -run: $(TARGETS) - ./$< - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGETS) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(if $(TARGETS),$(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests) - -.PHONY: uninstall -uninstall: - $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGETS)) - CFLAGS += -D__XEN_TOOLS__ CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(APPEND_CFLAGS) @@ -49,4 +25,4 @@ vpath %.c ../../../xen/lib/x86 test-cpu-policy: test-cpu-policy.o msr.o cpuid.o policy.o $(CC) $^ -o $@ $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/domid/Makefile b/tools/tests/domid/Makefile index 753129029e..92f11777f2 100644 --- a/tools/tests/domid/Makefile +++ b/tools/tests/domid/Makefile @@ -7,7 +7,7 @@ XEN_ROOT=$(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk -TESTS := test-domid +TARGETS += test-domid define list-c-headers $(shell sed -n \ @@ -36,30 +36,8 @@ vpath $(1) $(2) $(call emit-harness-deps,$(1),$(call list-c-headers,$(2)$(1))) endef -.PHONY: all -all: $(TESTS) - -.PHONY: run -run: $(TESTS) - set -e; $(foreach t,$(TESTS),./$(t);) - -.PHONY: clean -clean: +clean:: $(RM) -r generated - $(RM) -- *.o $(TESTS) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) test-domid $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/test-domid CFLAGS += -D__XEN_TOOLS__ # find-next-bit.c @@ -85,4 +63,4 @@ $(eval $(call vpath-with-harness-deps,domid.c,$(XEN_ROOT)/xen/common/)) test-domid: domid.o find-next-bit.o test-domid.o $(CC) $^ -o $@ $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile index 76ba3e3c8b..6790e48417 100644 --- a/tools/tests/mem-claim/Makefile +++ b/tools/tests/mem-claim/Makefile @@ -2,26 +2,7 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test-mem-claim - -.PHONY: all -all: $(TARGET) - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) +TARGETS := $(TARGET) CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) @@ -35,4 +16,4 @@ LDFLAGS += $(APPEND_LDFLAGS) $(TARGET): test-mem-claim.o $(CC) -o $@ $< $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/paging-mempool/Makefile b/tools/tests/paging-mempool/Makefile index a1e12584ce..9ebeb24ab6 100644 --- a/tools/tests/paging-mempool/Makefile +++ b/tools/tests/paging-mempool/Makefile @@ -2,26 +2,7 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test-paging-mempool - -.PHONY: all -all: $(TARGET) - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) +TARGETS := $(TARGET) CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) @@ -35,4 +16,4 @@ LDFLAGS += $(APPEND_LDFLAGS) $(TARGET): test-paging-mempool.o $(CC) -o $@ $< $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/pdx/Makefile b/tools/tests/pdx/Makefile index 3c431d7c78..a5129a8282 100644 --- a/tools/tests/pdx/Makefile +++ b/tools/tests/pdx/Makefile @@ -3,36 +3,7 @@ include $(XEN_ROOT)/tools/Rules.mk TARGETS := test-pdx-mask test-pdx-offset -.PHONY: all -all: $(TARGETS) - -.PHONY: run -run: $(TARGETS) -ifeq ($(CC),$(HOSTCC)) - set -e; \ - for test in $? ; do \ - ./$$test ; \ - done -else - $(warning HOSTCC != CC, will not run test) -endif - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGETS) $(DEPS_RM) pdx.h - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(patsubst %,$(DESTDIR)$(LIBEXEC)/tests/%,$(TARGETS)) +DEPS_RM += pdx.h pdx.h: $(XEN_ROOT)/xen/include/xen/pdx.h sed -e '/^#[[:space:]]*include/d' <$< >$@ @@ -47,4 +18,4 @@ test-pdx-offset: CFLAGS += -DCONFIG_PDX_OFFSET_COMPRESSION test-pdx-%: test-pdx.c pdx.h $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) -o $@ $< $(APPEND_CFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile index e3bfce471c..c76746ce7a 100644 --- a/tools/tests/rangeset/Makefile +++ b/tools/tests/rangeset/Makefile @@ -2,30 +2,9 @@ XEN_ROOT=$(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test-rangeset +TARGETS := $(TARGET) -.PHONY: all -all: $(TARGET) - -.PHONY: run -run: $(TARGET) - ./$< - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) list.h rangeset.h rangeset.c - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGET)) +DEPS_RM += list.h rangeset.h rangeset.c list.h: $(XEN_ROOT)/xen/include/xen/list.h rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h @@ -47,4 +26,4 @@ test-rangeset.o rangeset.o: list.h rangeset.h test-rangeset: rangeset.o test-rangeset.o $(CC) $^ -o $@ $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/resource/Makefile b/tools/tests/resource/Makefile index 09d678fffe..764e34f3fa 100644 --- a/tools/tests/resource/Makefile +++ b/tools/tests/resource/Makefile @@ -2,30 +2,7 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test-resource - -.PHONY: all -all: $(TARGET) - -.PHONY: run -run: $(TARGET) - ./$(TARGET) - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) +TARGETS := $(TARGET) CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) @@ -43,4 +20,4 @@ LDFLAGS += $(APPEND_LDFLAGS) $(TARGET): test-resource.o $(CC) -o $@ $< $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/tsx/Makefile b/tools/tests/tsx/Makefile index 0bb7e70103..817a63b085 100644 --- a/tools/tests/tsx/Makefile +++ b/tools/tests/tsx/Makefile @@ -2,29 +2,7 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test-tsx - -.PHONY: all -all: $(TARGET) - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) - -.PHONY: uninstall -uninstall: +TARGETS := $(TARGET) CFLAGS += -I$(XEN_ROOT)/tools/libs/ctrl -I$(XEN_ROOT)/tools/libs/guest CFLAGS += $(CFLAGS_xeninclude) @@ -41,4 +19,4 @@ LDFLAGS += $(APPEND_LDFLAGS) $(TARGET): test-tsx.o $(CC) -o $@ $< $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile index 97359ff67f..597303e31d 100644 --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -2,36 +2,12 @@ XEN_ROOT=$(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk TARGET := test_vpci - -.PHONY: all -all: $(TARGET) - -.PHONY: run -run: $(TARGET) -ifeq ($(CC),$(HOSTCC)) - ./$(TARGET) -else - $(warning HOSTCC != CC, will not run test) -endif +TARGETS := $(TARGET) $(TARGET): vpci.c vpci.h list.h main.c emul.h $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c -.PHONY: clean -clean: - rm -rf $(TARGET) *.o *~ vpci.h vpci.c list.h - -.PHONY: distclean -distclean: clean - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests - -.PHONY: uninstall -uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) +DEPS_RM += vpci.h vpci.c list.h vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c # Remove includes and add the test harness header @@ -41,3 +17,5 @@ list.h: $(XEN_ROOT)/xen/include/xen/list.h vpci.h: $(XEN_ROOT)/xen/include/xen/vpci.h list.h vpci.h: sed -e '/#include/d' <$< >$@ + +include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/xenstore/Makefile b/tools/tests/xenstore/Makefile index 2ee4a1327e..56cfe07f25 100644 --- a/tools/tests/xenstore/Makefile +++ b/tools/tests/xenstore/Makefile @@ -1,31 +1,8 @@ XEN_ROOT=$(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk -TARGETS-y := test-xenstore -TARGETS := $(TARGETS-y) - -.PHONY: all -all: build - -.PHONY: build -build: $(TARGETS) - -.PHONY: clean -clean: - $(RM) -- *.o $(TARGETS) $(DEPS_RM) - -.PHONY: distclean -distclean: clean - $(RM) -- *~ - -.PHONY: install -install: all - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(if $(TARGETS),$(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests) - -.PHONY: uninstall -uninstall: - $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGETS)) +TARGET := test-xenstore +TARGETS := $(TARGET) CFLAGS += $(CFLAGS_libxenstore) CFLAGS += $(APPEND_CFLAGS) @@ -41,4 +18,4 @@ endif test-xenstore: test-xenstore.o $(CC) -o $@ $< $(LDFLAGS) --include $(DEPS_INCLUDE) +include $(XEN_ROOT)/tools/tests/Rules.mk -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238759.1540310 (Exim 4.92) (envelope-from ) id 1vuSxL-0003bP-Hf; Mon, 23 Feb 2026 10:14:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238759.1540310; Mon, 23 Feb 2026 10:14:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxL-0003Zt-8O; Mon, 23 Feb 2026 10:14:23 +0000 Received: by outflank-mailman (input) for mailman id 1238759; Mon, 23 Feb 2026 10:14:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxK-0003AC-7W for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:22 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6ae8d720-10a0-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:14:20 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 5945441202E0; Mon, 23 Feb 2026 05:14:01 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6ae8d720-10a0-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD Subject: [PATCH 5/7] tools/tests/common: ensure error messages have a newline Date: Mon, 23 Feb 2026 10:14:09 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Otherwise messages from the next test will end up on the same line as an error message from a previous test. (calling `fail` is not fatal). Signed-off-by: Edwin Török --- tools/tests/common/tests.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/tests/common/tests.h b/tools/tests/common/tests.h index f0df616e3e..add847a46a 100644 --- a/tools/tests/common/tests.h +++ b/tools/tests/common/tests.h @@ -6,12 +6,12 @@ extern unsigned int nr_failures; #define fail(fmt, ...) \ ({ \ nr_failures++; \ - (void)printf(fmt, ##__VA_ARGS__); \ + (void)printf(fmt"\n", ##__VA_ARGS__); \ }) #define verify(exp, fmt, args...) \ while (!(exp)) { \ - printf(fmt, ## args); \ + printf(fmt"\n", ## args); \ exit(EX_SOFTWARE); \ } -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238760.1540329 (Exim 4.92) (envelope-from ) id 1vuSxM-00048j-W5; Mon, 23 Feb 2026 10:14:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238760.1540329; Mon, 23 Feb 2026 10:14:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxM-00047H-R9; Mon, 23 Feb 2026 10:14:24 +0000 Received: by outflank-mailman (input) for mailman id 1238760; Mon, 23 Feb 2026 10:14:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxL-0002wR-4C for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:23 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6b43dba8-10a0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:14:21 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id DD394412248C; Mon, 23 Feb 2026 05:14:01 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6b43dba8-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD Subject: [PATCH 6/7] tools/tests/tsx: move guest creation to common area Date: Mon, 23 Feb 2026 10:14:10 +0000 Message-ID: <78e4cef251a188713e4b2e13fd6185cc2f1d856b.1771840831.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit So that other tests can reuse the creation of HVM/PV tests. Signed-off-by: Edwin Török --- tools/tests/common/guests.c | 87 +++++++++++++++++++++++++++++++++++++ tools/tests/common/guests.h | 11 +++++ tools/tests/tsx/Makefile | 2 + tools/tests/tsx/test-tsx.c | 78 ++++----------------------------- 4 files changed, 108 insertions(+), 70 deletions(-) create mode 100644 tools/tests/common/guests.c create mode 100644 tools/tests/common/guests.h diff --git a/tools/tests/common/guests.c b/tools/tests/common/guests.c new file mode 100644 index 0000000000..bb33bfd8c0 --- /dev/null +++ b/tools/tests/common/guests.c @@ -0,0 +1,87 @@ +#define _GNU_SOURCE +#include "guests.h" +#include "tests.h" + +#include +#include +#include + +xc_interface *xch; +xc_physinfo_t physinfo; +bool xen_has_pv = true, xen_has_hvm = true; + +void test_guest_init(void) +{ + int rc; + xch = xc_interface_open(NULL, NULL, 0); + + if ( !xch ) + err(1, "xc_interface_open"); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + err(1, "Failed to obtain physinfo"); + + xen_has_hvm = physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hvm; + xen_has_pv = physinfo.capabilities & XEN_SYSCTL_PHYSCAP_pv; +} + +void test_guest(struct xen_domctl_createdomain *c) +{ + uint32_t domid = 0; + int rc; + + if (!xch) + return fail("test_guest_init() not called"); + + rc = xc_domain_create(xch, &domid, c); + if ( rc ) + return fail(" Domain create failure: %d - %s\n", + errno, strerror(errno)); + + printf(" Created d%u\n", domid); + + test_guest_domid(domid); + + rc = xc_domain_destroy(xch, domid); + if ( rc ) + fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); +} + +void test_guests(void) +{ + if ( xen_has_pv ) + { + struct xen_domctl_createdomain c = { + .max_vcpus = 1, + .max_grant_frames = 1, + .grant_opts = XEN_DOMCTL_GRANT_version(1), + }; + + printf("Testing PV guest\n"); + test_guest(&c); + } + + if ( xen_has_hvm ) + { + struct xen_domctl_createdomain c = { + .flags = XEN_DOMCTL_CDF_hvm, + .max_vcpus = 1, + .max_grant_frames = 1, + .grant_opts = XEN_DOMCTL_GRANT_version(1), + .arch = { + .emulation_flags = XEN_X86_EMU_LAPIC, + }, + }; + + if ( physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hap ) + c.flags |= XEN_DOMCTL_CDF_hap; + else if ( !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_shadow) ) + return fail(" HVM available, but neither HAP nor Shadow\n"); + + printf("Testing HVM guest\n"); + test_guest(&c); + } +} + diff --git a/tools/tests/common/guests.h b/tools/tests/common/guests.h new file mode 100644 index 0000000000..8cd6fc1b68 --- /dev/null +++ b/tools/tests/common/guests.h @@ -0,0 +1,11 @@ +#include +#include + +extern void test_guest_domid(domid_t domid); +extern xc_interface *xch; +extern xc_physinfo_t physinfo; +extern bool xen_has_pv, xen_has_hvm; + +void test_guest_init(void); +void test_guest(struct xen_domctl_createdomain *c); +void test_guests(void); diff --git a/tools/tests/tsx/Makefile b/tools/tests/tsx/Makefile index 54852b0327..3ccb6dcb9f 100644 --- a/tools/tests/tsx/Makefile +++ b/tools/tests/tsx/Makefile @@ -11,4 +11,6 @@ CFLAGS += $(CFLAGS_libxenguest) LDFLAGS += $(LDLIBS_libxenctrl) LDFLAGS += $(LDLIBS_libxenguest) +$(TARGET): ../common/guests.o + include $(XEN_ROOT)/tools/tests/Rules.mk diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index ab099e9038..b80a812a74 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -31,6 +31,7 @@ #include #include "tests.h" +#include "guests.h" #include "xg_private.h" enum { @@ -45,7 +46,6 @@ enum { #define MSR_TSX_CTRL 0x00000122 #define MSR_MCU_OPT_CTRL 0x00000123 -static xc_interface *xch; /* * Policies, arranged as an array for easy collection of all of them. We @@ -60,10 +60,6 @@ static struct xc_cpu_policy policies[6]; #define pv_default policies[XEN_SYSCTL_cpu_policy_pv_default] #define hvm_default policies[XEN_SYSCTL_cpu_policy_hvm_default] -static bool xen_has_pv = true, xen_has_hvm = true; - -static xc_physinfo_t physinfo; - static enum rtm_behaviour { RTM_UD, RTM_OK, @@ -354,24 +350,16 @@ static void test_def_max_policies(void) } } -static void test_guest(struct xen_domctl_createdomain *c) +void test_guest_domid(domid_t domid) { - uint32_t domid = 0; int rc; - rc = xc_domain_create(xch, &domid, c); - if ( rc ) - return fail(" Domain create failure: %d - %s\n", - errno, strerror(errno)); - - printf(" Created d%u\n", domid); - rc = xc_cpu_policy_get_domain(xch, domid, &guest_policy); if ( rc ) { fail(" Failed to obtain domain policy: %d - %s\n", errno, strerror(errno)); - goto out; + return; } dump_tsx_details(&guest_policy.policy, "Cur:"); @@ -408,7 +396,7 @@ static void test_guest(struct xen_domctl_createdomain *c) { fail(" Failed to set domain policy: %d - %s\n", errno, strerror(errno)); - goto out; + return; } /* Re-get the new policy. */ @@ -417,7 +405,7 @@ static void test_guest(struct xen_domctl_createdomain *c) { fail(" Failed to obtain domain policy: %d - %s\n", errno, strerror(errno)); - goto out; + return; } dump_tsx_details(&guest_policy.policy, "Cur:"); @@ -426,58 +414,17 @@ static void test_guest(struct xen_domctl_createdomain *c) { fail(" Expected CPUID.7[0].b 0x%08x differs from actual 0x%08x\n", _7b0, guest_policy.policy.feat.raw[0].b); - goto out; + return; } if ( guest_policy.policy.feat.raw[0].d != _7d0 ) { fail(" Expected CPUID.7[0].d 0x%08x differs from actual 0x%08x\n", _7d0, guest_policy.policy.feat.raw[0].d); - goto out; + return; } } - out: - rc = xc_domain_destroy(xch, domid); - if ( rc ) - fail(" Failed to destroy domain: %d - %s\n", - errno, strerror(errno)); -} - -static void test_guests(void) -{ - if ( xen_has_pv ) - { - struct xen_domctl_createdomain c = { - .max_vcpus = 1, - .max_grant_frames = 1, - .grant_opts = XEN_DOMCTL_GRANT_version(1), - }; - - printf("Testing PV guest\n"); - test_guest(&c); - } - - if ( xen_has_hvm ) - { - struct xen_domctl_createdomain c = { - .flags = XEN_DOMCTL_CDF_hvm, - .max_vcpus = 1, - .max_grant_frames = 1, - .grant_opts = XEN_DOMCTL_GRANT_version(1), - .arch = { - .emulation_flags = XEN_X86_EMU_LAPIC, - }, - }; - - if ( physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hap ) - c.flags |= XEN_DOMCTL_CDF_hap; - else if ( !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_shadow) ) - return fail(" HVM available, but neither HAP nor Shadow\n"); - - printf("Testing HVM guest\n"); - test_guest(&c); - } } /* Obtain some general data, then run the tests. */ @@ -521,11 +468,6 @@ static void test_tsx(void) dump_tsx_details(&host.policy, "Host:"); - rc = xc_physinfo(xch, &physinfo); - if ( rc ) - return fail("Failed to obtain physinfo: %d - %s\n", - errno, strerror(errno)); - printf(" Got %u CPUs\n", physinfo.max_cpu_id + 1); test_tsx_msrs(); @@ -538,11 +480,7 @@ int test_main(int argc, char *argv[argc+1]) { printf("TSX tests\n"); - xch = xc_interface_open(NULL, NULL, 0); - - if ( !xch ) - err(1, "xc_interface_open"); - + test_guest_init(); test_tsx(); return !!nr_failures; -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:14:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:14:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238761.1540336 (Exim 4.92) (envelope-from ) id 1vuSxN-0004Fl-Ii; Mon, 23 Feb 2026 10:14:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238761.1540336; Mon, 23 Feb 2026 10:14:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxN-0004Du-6a; Mon, 23 Feb 2026 10:14:25 +0000 Received: by outflank-mailman (input) for mailman id 1238761; Mon, 23 Feb 2026 10:14:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuSxL-0002wR-QC for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:14:23 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6b97a997-10a0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:14:21 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTPS id 6CF15412248F; Mon, 23 Feb 2026 05:14:02 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6b97a997-10a0-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Anthony PERARD Subject: [PATCH 7/7] tools/tests: print more debug info Date: Mon, 23 Feb 2026 10:14:11 +0000 Message-ID: <927bbe915b3e5af56e5fafeede47c090eb55236f.1771840831.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable xentoollog at XTL_DEBUG level. Signed-off-by: Edwin Török --- tools/tests/common/guests.c | 4 +++- tools/tests/tsx/Makefile | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/tools/tests/common/guests.c b/tools/tests/common/guests.c index bb33bfd8c0..a46ff2f68d 100644 --- a/tools/tests/common/guests.c +++ b/tools/tests/common/guests.c @@ -9,11 +9,13 @@ xc_interface *xch; xc_physinfo_t physinfo; bool xen_has_pv = true, xen_has_hvm = true; +xentoollog_logger *logger; void test_guest_init(void) { int rc; - xch = xc_interface_open(NULL, NULL, 0); + logger = (xentoollog_logger*)xtl_createlogger_stdiostream(stderr, XTL_DEBUG, 0); + xch = xc_interface_open(logger, NULL, 0); if ( !xch ) err(1, "xc_interface_open"); diff --git a/tools/tests/tsx/Makefile b/tools/tests/tsx/Makefile index 3ccb6dcb9f..cbcae6d090 100644 --- a/tools/tests/tsx/Makefile +++ b/tools/tests/tsx/Makefile @@ -10,6 +10,7 @@ CFLAGS += $(CFLAGS_libxenguest) LDFLAGS += $(LDLIBS_libxenctrl) LDFLAGS += $(LDLIBS_libxenguest) +LDFLAGS += $(LDLIBS_libxentoollog) $(TARGET): ../common/guests.o -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:42:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:42:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238971.1540352 (Exim 4.92) (envelope-from ) id 1vuTOi-0002DY-M6; Mon, 23 Feb 2026 10:42:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238971.1540352; Mon, 23 Feb 2026 10:42:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTOi-0002DR-JT; Mon, 23 Feb 2026 10:42:40 +0000 Received: by outflank-mailman (input) for mailman id 1238971; Mon, 23 Feb 2026 10:42:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTOg-0002DJ-Qy for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:42:38 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5e7fcc92-10a4-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:42:37 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4836d4c26d3so36766695e9.2 for ; Mon, 23 Feb 2026 02:42:37 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 02:42:36 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 11:42:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/7] Factor out common build rules and helpers in tools/tests To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , xen-devel@lists.xenproject.org, Denis Mukhin References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > There are a lot of duplicate rules and code in tools/tests. > To simplify writing new tests move common build rules into a > `tools/tests/Rules.mk`, and helper macros/functions into `common/{tests,guests}.{c,h}`. > > This also ensures that CFLAGS are applied consistently across all tests (e.g. one test failed > to build now due to an unused variable error). > > Guest creation also needs to test for the presence of PV, HVM HAP or HVM shadow support > in Xen and create a guest accordingly. This can be shared. > > After these changes the per-test Makefile only contains entries specific > to the test (its name, dependencies, etc.) and avoids having to > copy&paste boilerplate code. > > `tools/tests/x86_emulator` remains unchanged, because the Makefile > contains a lot of conditional build logic specific to that test. > > An upcoming patch series will introduce new tests using the simplified > Makefile and shared helpers. > > For convenience this is also available at: > https://gitlab.com/xen-project/people/edwintorok/xen/-/compare/staging...private%2Fedvint%2Fmigration-tests2?from_project_id=2336572 > https://gitlab.com/xen-project/people/edwintorok/xen/-/pipelines/2342318716 > > Edwin Török (7): > tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk > tools/tests/vpci/main.c: drop unused variables > tools/tests/*/Makefile: factor out build rules > tools/tests: factor out common helpers > tools/tests/common: ensure error messages have a newline > tools/tests/tsx: move guest creation to common area > tools/tests: print more debug info Just fyi that there is also https://lists.xen.org/archives/html/xen-devel/2026-02/msg00751.html. Can the two of you maybe work together to have a single resulting approach? Jan > tools/tests/Rules.mk | 60 +++++++++++++ > tools/tests/common/guests.c | 89 +++++++++++++++++++ > tools/tests/common/guests.h | 11 +++ > tools/tests/common/tests.c | 15 ++++ > tools/tests/common/tests.h | 18 ++++ > tools/tests/cpu-policy/Makefile | 41 ++------- > tools/tests/cpu-policy/test-cpu-policy.c | 7 +- > tools/tests/domid/Makefile | 37 ++------ > tools/tests/domid/test-domid.c | 11 +-- > tools/tests/mem-claim/Makefile | 31 +------ > tools/tests/mem-claim/test-mem-claim.c | 9 +- > tools/tests/paging-mempool/Makefile | 31 +------ > .../paging-mempool/test-paging-mempool.c | 9 +- > tools/tests/pdx/Makefile | 37 +------- > tools/tests/pdx/test-pdx.c | 3 +- > tools/tests/rangeset/Makefile | 36 +------- > tools/tests/rangeset/test-rangeset.c | 3 +- > tools/tests/resource/Makefile | 35 +------- > tools/tests/resource/test-resource.c | 9 +- > tools/tests/tsx/Makefile | 35 +------- > tools/tests/tsx/test-tsx.c | 88 +++--------------- > tools/tests/vpci/.gitignore | 1 + > tools/tests/vpci/Makefile | 36 ++------ > tools/tests/vpci/main.c | 6 +- > tools/tests/xenstore/Makefile | 37 +------- > tools/tests/xenstore/test-xenstore.c | 4 +- > 26 files changed, 261 insertions(+), 438 deletions(-) > create mode 100644 tools/tests/Rules.mk > create mode 100644 tools/tests/common/guests.c > create mode 100644 tools/tests/common/guests.h > create mode 100644 tools/tests/common/tests.c > create mode 100644 tools/tests/common/tests.h > create mode 100644 tools/tests/vpci/.gitignore > From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:44:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:44:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238980.1540362 (Exim 4.92) (envelope-from ) id 1vuTQp-0002oE-6r; Mon, 23 Feb 2026 10:44:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238980.1540362; Mon, 23 Feb 2026 10:44:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTQp-0002o7-49; Mon, 23 Feb 2026 10:44:51 +0000 Received: by outflank-mailman (input) for mailman id 1238980; Mon, 23 Feb 2026 10:44:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTQo-0002o1-Ku for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:44:50 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ac281a9d-10a4-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 11:44:47 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-43770c94dfaso4164466f8f.2 for ; Mon, 23 Feb 2026 02:44:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 02:44:47 -0800 (PST) Message-ID: <828c24ce-fb40-4469-80cc-0c8d8f40159a@suse.com> Date: Mon, 23 Feb 2026 11:44:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 06/12] xen: Include suitable headers to make declarations visible To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini , Xen-devel References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-7-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-7-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 22:46, Andrew Cooper wrote: > A range of functions can't see their declarations, requiring the inclusion of > appropriate headers. > > For pv/mm.h and pv/traps.h, this requires adjustements to become standalone. > > In pv/mm.h, swap xen/lib.h for xen/bug.h now that ASSERT_UNREACHABLE() has > moved. For pv/traps.h, pv_trap_callback_registered() needs to see a complete > struct vcpu, and xen/sched.h is not something appropriate to pull in > conditionally. > > stack-protector.c can't see the declaration of __stack_chk_guard, and fixing > that reveals that stack-protector.h needs get_cycles() too. > > No functional change. > > Signed-off-by: Andrew Cooper Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:45:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:45:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238989.1540374 (Exim 4.92) (envelope-from ) id 1vuTRb-0003IW-GX; Mon, 23 Feb 2026 10:45:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238989.1540374; Mon, 23 Feb 2026 10:45:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTRb-0003IO-Ci; Mon, 23 Feb 2026 10:45:39 +0000 Received: by outflank-mailman (input) for mailman id 1238989; Mon, 23 Feb 2026 10:45:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTRa-0003IE-UG for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:45:38 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c8c3ada7-10a4-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:45:35 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-4836e3288cdso27694995e9.0 for ; Mon, 23 Feb 2026 02:45:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 02:45:35 -0800 (PST) Message-ID: <5c4c76f5-508c-4917-8fa5-9e3e2ab41926@suse.com> Date: Mon, 23 Feb 2026 11:45:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/12] xen/vmac: Const the key parameter of vmac_set_key() To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini , Xen-devel References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-8-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-8-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 22:46, Andrew Cooper wrote: > Eclair complains that tboot_gen_domain_integrity() is casting away > constness (Rule 11.8 violation). > > vmac_set_key() doesn't modify the user_key parameter, so it can become const, > removing the need to cast. > > No functional change. > > Signed-off-by: Andrew Cooper Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:50:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:50:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1238997.1540383 (Exim 4.92) (envelope-from ) id 1vuTWK-0004qS-VU; Mon, 23 Feb 2026 10:50:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1238997.1540383; Mon, 23 Feb 2026 10:50:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTWK-0004qL-Ss; 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Mon, 23 Feb 2026 02:50:29 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 11:50:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/12] xen: Bracket uses of macro parameters To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini , Xen-devel References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-12-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-12-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 22:46, Andrew Cooper wrote: > --- a/xen/arch/x86/mm/shadow/multi.c > +++ b/xen/arch/x86/mm/shadow/multi.c > @@ -793,7 +793,7 @@ do { \ > do { \ > int __done = 0; \ > _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, \ > - ({ (__done = _done); }), _code); \ > + ({ (__done = (_done)); }), _code); \ Could I talk you into dropping the unnecessary pair of parentheses (around the assignment) in exchange? Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 10:54:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 10:54:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239005.1540392 (Exim 4.92) (envelope-from ) id 1vuTaV-0005Xq-FB; Mon, 23 Feb 2026 10:54:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239005.1540392; Mon, 23 Feb 2026 10:54:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTaV-0005Xj-Cd; Mon, 23 Feb 2026 10:54:51 +0000 Received: by outflank-mailman (input) for mailman id 1239005; Mon, 23 Feb 2026 10:54:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuTaT-0005Xd-TU for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 10:54:49 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 12671ceb-10a6-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 11:54:48 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-43638a33157so3901332f8f.1 for ; Mon, 23 Feb 2026 02:54:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 02:54:48 -0800 (PST) Message-ID: <2ed69a62-81b5-4f2b-9c35-905530bfd097@suse.com> Date: Mon, 23 Feb 2026 11:54:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 12/12] xen/vmac: Delete STDINT block in vmac.h To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" , Nicola Vetrini , Xen-devel References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-13-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260220214653.3497384-13-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 22:46, Andrew Cooper wrote: > Eclair complains that _MSC_VER is undefined (a Rule 20.9 violation). > > This could be fixed by inserting an "&& defined(_MSC_VER)" clause, but the > whole block is entirely useless (it comments out the include of stdint) and > the top of vmac.c pulls in xen/types.h specifically. And any other user of the header (tboot.c currently). Wouldn't we be better off having vmac.h include xen/types.h instead of that useless block? > Simply delete the block. > > No functional change. > > Signed-off-by: Andrew Cooper Either way: Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 12:37:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 12:37:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239038.1540443 (Exim 4.92) (envelope-from ) id 1vuVBH-0001F6-1F; Mon, 23 Feb 2026 12:36:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239038.1540443; Mon, 23 Feb 2026 12:36:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuVBG-0001Ez-Ue; Mon, 23 Feb 2026 12:36:54 +0000 Received: by outflank-mailman (input) for mailman id 1239038; Mon, 23 Feb 2026 12:36:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuVBG-0001Et-0x for xen-devel@lists.xenproject.org; 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We first broke > that connection when purging unused ones, and then again when switching to > the bit mask forms. > > Fixes: 408413051144 ("x86/cpu: Drop unused X86_VENDOR_* values") > Fixes: 0cd074144cbb ("x86/cpu: Renumber X86_VENDOR_* to form a bitmap") > Signed-off-by: Jan Beulich I see you've committed this, but it's not a viable approach. > --- a/xen/arch/x86/cpu/mcheck/mce.c > +++ b/xen/arch/x86/cpu/mcheck/mce.c > @@ -858,6 +858,22 @@ void *x86_mcinfo_reserve(struct mc_info > return mic_index; > } > > +/* Linux values need using when reporting CPU vendors to the outside. */ > +static unsigned int xen2linux_vendor(unsigned int vendor) > +{ > + switch ( vendor ) > + { > + case X86_VENDOR_INTEL: return 0; > + case X86_VENDOR_AMD: return 2; > + case X86_VENDOR_CENTAUR: return 5; > + case X86_VENDOR_HYGON: return 9; > + case X86_VENDOR_SHANGHAI: return 10; /* X86_VENDOR_ZHAOXIN */ > + default: break; > + } > + > + return 0xff; /* X86_VENDOR_UNKNOWN */ > +} The Linux x86 maintainers say that the numbers are internal and not an ABI, even they haven't changed since 2008. > + > static void x86_mcinfo_apei_save( > struct mcinfo_global *mc_global, struct mcinfo_bank *mc_bank) > { > @@ -866,7 +882,7 @@ static void x86_mcinfo_apei_save( > memset(&m, 0, sizeof(struct mce)); > > m.cpu = mc_global->mc_coreid; > - m.cpuvendor = boot_cpu_data.x86_vendor; > + m.cpuvendor = xen2linux_vendor(boot_cpu_data.x86_vendor); This is an internal Xen structure.  This hunk needs reverting. > m.cpuid = cpuid_eax(1); > m.socketid = mc_global->mc_socketid; > m.apicid = mc_global->mc_apicid; > @@ -968,7 +984,7 @@ static void cf_check __maybe_unused do_m > &xcp->mc_ncores_active, &xcp->mc_nthreads); > xcp->mc_cpuid_level = c->cpuid_level; > xcp->mc_family = c->x86; > - xcp->mc_vendor = c->x86_vendor; > + xcp->mc_vendor = xen2linux_vendor(c->x86_vendor); > xcp->mc_model = c->x86_model; > xcp->mc_step = c->x86_mask; > xcp->mc_cache_size = c->x86_cache_size; This is an external structure, but a crap one at that. It's full of wrong information, including mc_cpu_caps[] which has been wrong forever (Xen never had the Linux internal leaf as Linux had it, and the standard leaves haven't had that order since Xen 4.6 or so), and mc_cpunr which is Xen's idea of the CPU number, not Linuxes. It seems to be copy&paste of an internal Linux structure, but given as a Xen-wide interface. I find it hard to believe that this is even usable, which begs the question is it even used? Deleting xen-mca.h is probably the only reasonable approach I can see here.  It should have been hard-nacked at the point of being proposed, and never gotten into Xen... ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 23 12:59:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 12:59:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239046.1540453 (Exim 4.92) (envelope-from ) id 1vuVX4-00048k-Mi; Mon, 23 Feb 2026 12:59:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239046.1540453; Mon, 23 Feb 2026 12:59:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuVX4-00048d-JU; Mon, 23 Feb 2026 12:59:26 +0000 Received: by outflank-mailman (input) for mailman id 1239046; Mon, 23 Feb 2026 12:59:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuVX3-00048X-08 for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 12:59:25 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 78d3395c-10b7-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 13:59:22 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-48375f10628so27120765e9.1 for ; Mon, 23 Feb 2026 04:59:21 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 04:59:21 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 13:59:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/MCE: restore CPU vendor reporting to the outside world To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <561865f9-cd0f-40c9-86b8-98a3ac070b65@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 13:36, Andrew Cooper wrote: > On 16/02/2026 11:56 am, Jan Beulich wrote: >> The records reported used to contain Linux enumerators. We first broke >> that connection when purging unused ones, and then again when switching to >> the bit mask forms. >> >> Fixes: 408413051144 ("x86/cpu: Drop unused X86_VENDOR_* values") >> Fixes: 0cd074144cbb ("x86/cpu: Renumber X86_VENDOR_* to form a bitmap") >> Signed-off-by: Jan Beulich > > I see you've committed this, but it's not a viable approach. Well, depends on what the goal is, I suppose: It's viable to restore previously regressed behavior. We have been in agreement, I think, that vMCE itself is doomed. >> --- a/xen/arch/x86/cpu/mcheck/mce.c >> +++ b/xen/arch/x86/cpu/mcheck/mce.c >> @@ -858,6 +858,22 @@ void *x86_mcinfo_reserve(struct mc_info >> return mic_index; >> } >> >> +/* Linux values need using when reporting CPU vendors to the outside. */ >> +static unsigned int xen2linux_vendor(unsigned int vendor) >> +{ >> + switch ( vendor ) >> + { >> + case X86_VENDOR_INTEL: return 0; >> + case X86_VENDOR_AMD: return 2; >> + case X86_VENDOR_CENTAUR: return 5; >> + case X86_VENDOR_HYGON: return 9; >> + case X86_VENDOR_SHANGHAI: return 10; /* X86_VENDOR_ZHAOXIN */ >> + default: break; >> + } >> + >> + return 0xff; /* X86_VENDOR_UNKNOWN */ >> +} > > The Linux x86 maintainers say that the numbers are internal and not an > ABI, even they haven't changed since 2008. Yet the numbers are propagated to the outside world there as well, aiui. >> @@ -866,7 +882,7 @@ static void x86_mcinfo_apei_save( >> memset(&m, 0, sizeof(struct mce)); >> >> m.cpu = mc_global->mc_coreid; >> - m.cpuvendor = boot_cpu_data.x86_vendor; >> + m.cpuvendor = xen2linux_vendor(boot_cpu_data.x86_vendor); > > This is an internal Xen structure.  This hunk needs reverting. It's not, unless I'm missing something. The struct is passed to apei_write_mce(), to then be passed to erst_write(). ERST isn't Xen- internal anymore, is it? Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 13:42:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 13:42:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239066.1540504 (Exim 4.92) (envelope-from ) id 1vuWCz-0002Jn-5T; Mon, 23 Feb 2026 13:42:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239066.1540504; Mon, 23 Feb 2026 13:42:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuWCz-0002Jg-1C; Mon, 23 Feb 2026 13:42:45 +0000 Received: by outflank-mailman (input) for mailman id 1239066; Mon, 23 Feb 2026 13:42:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuWCx-0002JZ-KY for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 13:42:43 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 85a26b48-10bd-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 14:42:41 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fKMVR3h03z5QkLlr for ; Mon, 23 Feb 2026 13:42:39 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 304f47f826664a42b3732f93e853208b; Mon, 23 Feb 2026 13:42:39 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 85a26b48-10bd-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771854159; x=1772124159; bh=9NPyoFT7Wcr8FHjElqDeozSpjecFI7orW1Ki2H5HOU0=; h=From:Subject:Message-Id:To:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=sOIrXCUZ4XNuD3fk6g5i3HpnFvWSq40wEnGdyK3pVf8yfxvUPkG8Gtj5qeC5eHeaU shDrZj2923sefcxbTxLay36UYmLTtNNhndLBYoDSHE/CZ2baUDzM/YYbzngaLPIpsk bbxosjUhSk472qGhAsZDONFGLewozJRzb7Mbqp8SSmhHredTYjG8GtHf0D3EPLaW5m wg7PJaZzqkvyxAFM5y/JJdrKiRPBlUDipVeMbLtchXzcU7xWxxSY1EwaK0uQazbXvE nGHgDUr3HLRlTQFLX3pEiDeKJU9hdyUN/OoJtvVd7wMHk49LQ3GiE/69jINnAnGNoe EOxVIUh6HApDw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771854159; x=1772114659; i=teddy.astie@vates.tech; bh=9NPyoFT7Wcr8FHjElqDeozSpjecFI7orW1Ki2H5HOU0=; h=From:Subject:Message-Id:To:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=nU/d08zIjCTwkA7dY2npQcs9R9ApA1hIo5i0CTyEVHCb/gxyy2roJYmEyR0TZPDpu OZ1BhGwlJeBYkfJcSzaHkWQt+kK2JYvuoXFHfiKP6CDpDif8nH3EAz15L0nes8b2Eb WOLGaH9PHQEl9ixvHAMuU1VEXdH1XwU9PD/dlDDcUtdYI+F5JkdpVeI4bB810uwwt+ t62dysSjpTXKGNABpHsWrYn0e9zU3C2gOlhsQ5y2HOt0crIDKripw72Y73IvdlKrW3 y+mI9WiwjyL1+OQFyRx4mp5dATzwySYKr0l6dwceCTtM9eo6VB1aNAUQBSh5dlsuiF 99meBFTPAgSbQ== From: "Teddy Astie" Subject: =?utf-8?Q?SecureBoot=20requirements=20regarding=20Dom0?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771854158677 Message-Id: <99bb08a4-0872-46e4-b945-3687ca3ebc27@vates.tech> To: Xen-devel X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.304f47f826664a42b3732f93e853208b?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260223:md Date: Mon, 23 Feb 2026 13:42:39 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit I have some questions regarding SecureBoot and Xen. The only document that appears to define some sort of policy between Xen and SecureBoot is this one https://andrewcoop-xen.readthedocs.io/en/docs-secureboot/admin-guide/uefi-secure-boot.html. That is also similar to discussions made in SecureBoot-related talks. > Within the Xen architecture, Xen, the control domain and hardware domain share responsibility for running and administering the platform. This makes their kernels privileged as far as Secure Boot is concerned. Why does SecureBoot needs to expand to Dom0 kernel ? If you e.g restrict DMA through IOMMU and restrict some key hypercalls like kexec (among some others), Dom0 shouldn't be able to compromise Xen (in principle); hence can't escape SecureBoot boundaries. SecureBoot doesn't appears to require preventing device access from "unprivileged code" otherwise VFIO wouldn't be allowed under SecureBoot. But such device access still needs to be contained (e.g through IOMMU enforcement), that's something Xen already supports (e.g dom0-iommu=strict / PVH Dom0). In that case, devices are only allowed to access Dom0, but can't access outside of it. From a technical standpoint, PVH Dom0 setups (and also PV Dom0 depending on configuration) acts very similarly to a SecureBoot-able Linux kernel which runs a KVM virtual machine with all host devices passed-through it (using vfio-pci). In that case, such VM doesn't need to be SecureBoot compliant, but it cannot be leveraged to escape SecureBoot. Am I missing any specific detail which could explain the need for SecureBoot in Dom0 kernel ? Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 23 14:11:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 14:11:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239076.1540514 (Exim 4.92) (envelope-from ) id 1vuWeS-0006KY-6p; Mon, 23 Feb 2026 14:11:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239076.1540514; Mon, 23 Feb 2026 14:11:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuWeS-0006KR-2k; Mon, 23 Feb 2026 14:11:08 +0000 Received: by outflank-mailman (input) for mailman id 1239076; Mon, 23 Feb 2026 14:11:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuWeR-0006KL-0r for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: EGPMJTGQX7ommCRhbeCN27/xYgiw/vRxCoK+Daekii5UCh9L2ik+olEOXokaxIVVbUz44fE1D6snGC3dFtUSnbKnGwv/sa4PABLdl5yOeKq1UQHMxztuT5d9d9/79JTkJejKB0/cyJrlyyOsi3rhtg/bXJlrhAdmtiA7BFE8qD4ftYW/SlUcG2/exOXKCcFwtEOa/R5MzrYnVcPaL9iR5yfOSfg5+lPX7JRb5EsiO5/Rb02zwYI2+HHMS2GB0Qx5iY1q43z+wobeaxcipDUI3QUq8oAcCoUuAdbtiJTZlvbEQd6cdb0smehK2rxPVMqkZ0G9deecNS/Chc9Q11pZshfHwNTH7EK7/0xu7ordxaPnjHCNS0QWDZJrgHmO2CmcmxIoa3QMU1GsDmW6mKkYtttecxHn37IqR0Yy1RI3AS8TlESYPP8nfBW9/l5rexff X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 14:10:54.1469 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fe5784b1-b3e4-4f8c-ce25-08de72e55b87 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00006002.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6488 On 21/02/2026 12:57, Julien Grall wrote: > Hi Michal, > > For the subject title and part of the code, "memory leak" tends to imply > the memory is lost forever and therefore can never be recovered. AFAIU, > in your case, the memory will be freed when the domain is destroyed. I > would suggest to clarify it so it doesn't sound like a security issue. > > What about: > > "xen/arm: mm: Release the old page reference in xenmem_add_to_physmap_one()" Reads ok. > > On 05/02/2026 12:58, Michal Orzel wrote: >> When a guest maps pages via XENMEM_add_to_physmap to a GFN that already >> has an existing mapping, the old page at that GFN was not being removed, >> causing a memory leak. This affects all mapping spaces including >> XENMAPSPACE_shared_info, XENMAPSPACE_grant_table, and >> XENMAPSPACE_gmfn_foreign. The memory would be reclaimed on domain >> destruction. >> >> Add logic to remove the previously mapped page before creating the new >> mapping, matching the x86 implementation approach. >> >> Additionally, skip removal if the same MFN is being remapped. > > Can you explain why we skip the removal but not the insertion in this case? Hmm, I must have missed that the type is always fixed. In that case, we can skip the insertion/removal. > >> >> Signed-off-by: Michal Orzel >> --- >> I'm not sure where to point the Fixes tag to. >> --- >> xen/arch/arm/mm.c | 32 +++++++++++++++++++++++++++++--- >> 1 file changed, 29 insertions(+), 3 deletions(-) >> >> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >> index 6df8b616e464..b9f1a493dcd7 100644 >> --- a/xen/arch/arm/mm.c >> +++ b/xen/arch/arm/mm.c >> @@ -166,10 +166,11 @@ int xenmem_add_to_physmap_one( >> unsigned long idx, >> gfn_t gfn) >> { >> - mfn_t mfn = INVALID_MFN; >> + mfn_t mfn = INVALID_MFN, mfn_old; >> int rc; >> p2m_type_t t; >> struct page_info *page = NULL; >> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >> >> switch ( space ) >> { >> @@ -244,6 +245,33 @@ int xenmem_add_to_physmap_one( >> return -ENOSYS; >> } >> >> + /* >> + * Remove previously mapped page if it was present, to avoid leaking >> + * memory. >> + */ >> + mfn_old = gfn_to_mfn(d, gfn); > > I saw Jan mentionned the fact that we have two section with the P2M lock > taken. But isn't it in fact 3 sections as gfn_to_mfn(d, gfn) also take a > lock? > > I am not against the idea of not solving the locking right now. But I > think it would at least be good to document it so this doesn't come as a > surprise. I'll prepare a v2 with a comment and better explanation. > >> + >> + if ( mfn_valid(mfn_old) ) >> + { >> + if ( is_special_page(mfn_to_page(mfn_old)) ) >> + { >> + /* Just unmap, don't free */ >> + p2m_write_lock(p2m); >> + rc = p2m_set_entry(p2m, gfn, 1, INVALID_MFN, >> + p2m_invalid, p2m->default_access); >> + p2m_write_unlock(p2m); >> + if ( rc ) >> + return rc; > > For here and the second "return" statement below. Above callers may have > taken a reference on the new page. So shouldn't we drop it like this is > done at the end of the function? Yes, we should. > >> + } >> + else if ( !mfn_eq(mfn, mfn_old) ) >> + { >> + /* Normal domain memory is freed, to avoid leaking memory */ > > Based on the thread with Jan, is this statement actually correct? Could > we reach this call with an MMIO (or event foreign mapping). In which > case, I am guessing we could fail? If so, is this the intended behavior > change? I wanted to leave MMIO case for a separate change but I can try to fit it all together. Let's discuss on v2. I'll try to prepare it taking all the remarks into account. ~Michal From xen-devel-bounces@lists.xenproject.org Mon Feb 23 14:54:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 14:54:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239094.1540522 (Exim 4.92) (envelope-from ) id 1vuXKP-0003Ko-E3; Mon, 23 Feb 2026 14:54:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239094.1540522; Mon, 23 Feb 2026 14:54:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXKP-0003Kh-Ay; Mon, 23 Feb 2026 14:54:29 +0000 Received: by outflank-mailman (input) for mailman id 1239094; Mon, 23 Feb 2026 14:54:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXKN-0003KZ-P7 for xen-devel@lists.xenproject.org; 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This work is part of making Xen safe for Intel family 18/19. Signed-off-by: Kevin Lampis --- xen/arch/x86/cpu/common.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index ebe2baf8b9..bfa63fcfb7 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -327,8 +327,8 @@ void __init early_cpu_init(bool verbose) *(u32 *)&c->x86_vendor_id[8] = ecx; *(u32 *)&c->x86_vendor_id[4] = edx; - c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); - switch (c->x86_vendor) { + c->vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); + switch (c->vendor) { case X86_VENDOR_INTEL: intel_unlock_cpuid_leaves(c); actual_cpu = intel_cpu_dev; break; case X86_VENDOR_AMD: actual_cpu = amd_cpu_dev; break; @@ -345,7 +345,7 @@ void __init early_cpu_init(bool verbose) } cpuid(0x00000001, &eax, &ebx, &ecx, &edx); - c->x86 = get_cpu_family(eax, &c->x86_model, &c->x86_mask); + c->family = get_cpu_family(eax, &c->model, &c->stepping); edx &= ~cleared_caps[FEATURESET_1d]; ecx &= ~cleared_caps[FEATURESET_1c]; @@ -389,8 +389,8 @@ void __init early_cpu_init(bool verbose) printk(XENLOG_INFO "CPU Vendor: %s, Family %u (%#x), " "Model %u (%#x), Stepping %u (raw %08x)\n", - x86_cpuid_vendor_to_str(c->x86_vendor), c->x86, - c->x86, c->x86_model, c->x86_model, c->x86_mask, + x86_cpuid_vendor_to_str(c->vendor), c->family, + c->family, c->model, c->model, c->stepping, eax); if (c->cpuid_level >= 7) { @@ -432,7 +432,7 @@ void __init early_cpu_init(bool verbose) paddr_bits -= (ebx >> 6) & 0x3f; } - if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) + if (!(c->vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))) park_offline_cpus = opt_mce; initialize_cpu_data(0); @@ -442,10 +442,10 @@ void reset_cpuinfo(struct cpuinfo_x86 *c, bool keep_basic) { if ( !keep_basic ) { - c->x86_vendor = 0; - c->x86 = 0; - c->x86_model = 0; - c->x86_mask = 0; + c->vendor = 0; + c->family = 0; + c->model = 0; + c->stepping = 0; memset(&c->x86_capability, 0, sizeof(c->x86_capability)); memset(&c->x86_vendor_id, 0, sizeof(c->x86_vendor_id)); memset(&c->x86_model_id, 0, sizeof(c->x86_model_id)); @@ -465,18 +465,18 @@ static void generic_identify(struct cpuinfo_x86 *c) *(u32 *)&c->x86_vendor_id[8] = ecx; *(u32 *)&c->x86_vendor_id[4] = edx; - c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); - if (boot_cpu_data.x86_vendor != c->x86_vendor) + c->vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx); + if (boot_cpu_data.vendor != c->vendor) printk(XENLOG_ERR "CPU%u vendor %u mismatch against BSP %u\n", - smp_processor_id(), c->x86_vendor, - boot_cpu_data.x86_vendor); + smp_processor_id(), c->vendor, + boot_cpu_data.vendor); /* Initialize the standard set of capabilities */ /* Note that the vendor-specific code below might override */ /* Model and family information. */ cpuid(1, &eax, &ebx, &ecx, &edx); - c->x86 = get_cpu_family(eax, &c->x86_model, &c->x86_mask); + c->family = get_cpu_family(eax, &c->model, &c->stepping); c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); c->phys_proc_id = c->apicid; @@ -605,7 +605,7 @@ void identify_cpu(struct cpuinfo_x86 *c) if ( !c->x86_model_id[0] ) { /* Last resort... */ snprintf(c->x86_model_id, sizeof(c->x86_model_id), - "%02x/%02x", c->x86_vendor, c->x86_model); + "%02x/%02x", c->vendor, c->model); } /* Now the feature flags better reflect actual CPU features! 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Signed-off-by: Jan Beulich --- v2: Keep destroy_waitqueue_head() at its old position. --- a/xen/common/wait.c +++ b/xen/common/wait.c @@ -87,7 +87,7 @@ void init_waitqueue_head(struct waitqueu void destroy_waitqueue_head(struct waitqueue_head *wq) { - wake_up_all(wq); + wake_up_nr(wq, UINT_MAX); } void wake_up_nr(struct waitqueue_head *wq, unsigned int nr) @@ -107,16 +107,6 @@ void wake_up_nr(struct waitqueue_head *w spin_unlock(&wq->lock); } -void wake_up_one(struct waitqueue_head *wq) -{ - wake_up_nr(wq, 1); -} - -void wake_up_all(struct waitqueue_head *wq) -{ - wake_up_nr(wq, UINT_MAX); -} - #ifdef CONFIG_X86 static void __prepare_to_wait(struct waitqueue_vcpu *wqv) --- a/xen/include/xen/wait.h +++ b/xen/include/xen/wait.h @@ -31,8 +31,6 @@ void destroy_waitqueue_head(struct waitq /* Wake VCPU(s) waiting on specified waitqueue. */ void wake_up_nr(struct waitqueue_head *wq, unsigned int nr); -void wake_up_one(struct waitqueue_head *wq); -void wake_up_all(struct waitqueue_head *wq); /* Wait on specified waitqueue until @condition is true. */ #define wait_event(wq, condition) \ From xen-devel-bounces@lists.xenproject.org Mon Feb 23 15:14:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 15:14:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239111.1540542 (Exim 4.92) (envelope-from ) id 1vuXdJ-0006rR-4x; Mon, 23 Feb 2026 15:14:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239111.1540542; Mon, 23 Feb 2026 15:14:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXdJ-0006rK-27; Mon, 23 Feb 2026 15:14:01 +0000 Received: by outflank-mailman (input) for mailman id 1239111; Mon, 23 Feb 2026 15:14:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXdI-0006r8-4S for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 15:14:00 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 45d4217a-10ca-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 16:13:56 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4807068eacbso35312545e9.2 for ; Mon, 23 Feb 2026 07:13:56 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 07:13:56 -0800 (PST) Message-ID: <4d0d2163-367a-4d6c-bf46-9f58292e1baf@suse.com> Date: Mon, 23 Feb 2026 16:13:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen/riscv: add p2m context switch handling for VSATP and HGATP To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <5756356294dc066d835269334d0f3347fe24cec4.1771504676.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5756356294dc066d835269334d0f3347fe24cec4.1771504676.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 13:40, Oleksii Kurochko wrote: > Introduce helpers to manage VS-stage and G-stage translation state during > vCPU context switches. > > As VSATP and HGATP cannot be updated atomically, clear VSATP on context > switch-out to prevent speculative VS-stage translations from being associated > with an incorrect VMID. On context switch-in, restore HGATP and VSATP in the > required order. > > Add p2m_handle_vmenter() to perform VMID management and issue TLB flushes > only when required (e.g. on VMID reuse or generation change). > > This provides the necessary infrastructure for correct p2m context switching > on RISC-V. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon Feb 23 15:22:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 15:22:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239119.1540554 (Exim 4.92) (envelope-from ) id 1vuXlH-00006I-Uo; Mon, 23 Feb 2026 15:22:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239119.1540554; Mon, 23 Feb 2026 15:22:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXlH-00006A-Qa; Mon, 23 Feb 2026 15:22:15 +0000 Received: by outflank-mailman (input) for mailman id 1239119; Mon, 23 Feb 2026 15:22:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuXlG-000064-So for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 15:22:14 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6d1f038b-10cb-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 16:22:12 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-4359249bbacso3284111f8f.0 for ; Mon, 23 Feb 2026 07:22:12 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260219184503.21918-1-dpsmith@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260219184503.21918-1-dpsmith@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 19.02.2026 19:45, Daniel P. Smith wrote: > --- a/xen/drivers/char/console.c > +++ b/xen/drivers/char/console.c > @@ -554,7 +554,7 @@ struct domain *console_get_domain(void) > if ( !d ) > return NULL; > > - if ( d->console->input_allowed ) > + if ( !xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) > return d; > > rcu_unlock_domain(d); > @@ -595,7 +595,7 @@ static void console_switch_input(void) > d = rcu_lock_domain_by_id(domid); > if ( d ) > { > - if ( !d->console->input_allowed ) > + if ( xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) > { > rcu_unlock_domain(d); > continue; At least the latter of these two can be called from an IRQ handler, and can be called with IRQs off. Flask's avc_audit() looks to be using a spinlock, which isn't IRQ-safe. (There may be other lock involved; I merely went as far as I needed to to find the first one.) IOW I fear you can't call xsm_console_io() from here. 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Mon, 23 Feb 2026 07:29:10 -0800 (PST) Message-ID: <75f05c4d-5c1d-4fc2-953f-2beb11467116@suse.com> Date: Mon, 23 Feb 2026 16:29:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/platform: Adjust temperature sensors MSRs To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tu Dinh , xen-devel@lists.xenproject.org References: <08370f3b8b224493b8e66e8503a2fe0d07b73c33.1771600155.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <08370f3b8b224493b8e66e8503a2fe0d07b73c33.1771600155.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 16:53, Teddy Astie wrote: > Temperature sensors MSR were previously assumed to be available when "DTS" > CPUID bit is set. This is not really the case : > * MSR_IA32_THERM_STATUS is gated behind ACPI CPUID bit, only DTS-related bits > of this MSR are gated behind the DTS CPUID > * MSR_PACKAGE_THERM_STATUS is gated behind "PTM" CPUID > > Also adjust the MSR_TEMPERATURE_TARGET which is not architectural, but stable > in practice, and required to be exposed for reliably querying CPU temperature. > > Fixes: 615c9f3f820 ("x86/platform: Expose DTS sensors MSR") > Reported-by: Tu Dinh > Signed-off-by: Teddy Astie Reviewed-by: Jan Beulich > --- a/xen/arch/x86/platform_hypercall.c > +++ b/xen/arch/x86/platform_hypercall.c > @@ -89,9 +89,26 @@ static bool msr_read_allowed(unsigned int msr) > return cpu_has_srbds_ctrl; > > case MSR_IA32_THERM_STATUS: > + return host_cpu_policy.basic.acpi; > + > + /* > + * This MSR is present on most Intel Core-family CPUs since Nehalem but is not an > + * architectural MSR. No CPUID bit enumerates this MSR. > + * > + * This MSR exposes "temperature target" that is needed to compute the CPU > + * temperature. The "temperature target" is a model specific value, and this MSR is > + * the only known method of getting the one used for the CPU. On some CPU models with > + * Intel SST-PP, the "temperature target" can vary over time. > + * > + * We assume all Intel CPUs with DTS may support this MSR; but reads can fail in case > + * the platform doesn't actually support this MSR. > + */ > case MSR_TEMPERATURE_TARGET: > + return boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && > + host_cpu_policy.basic.digital_temp_sensor; Personally I think indentation wants to be three deeper here, but this is one of the grey areas of our style. I may take the liberty to adjust it while committing. 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Mon, 23 Feb 2026 07:42:23 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 16:42:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] tools/tests/x86_emulator: fix 'shifting a negative signed value is undefined' To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:04, Edwin Török wrote: > --- a/tools/tests/x86_emulator/test_x86_emulator.c > +++ b/tools/tests/x86_emulator/test_x86_emulator.c > @@ -1161,7 +1161,7 @@ int main(int argc, char **argv) > instr[0] = 0x4d; instr[1] = 0x0f; instr[2] = 0xbb; instr[3] = 0x03; > regs.eflags = EFLAGS_ALWAYS_SET; > regs.rip = (unsigned long)&instr[0]; > - regs.r8 = (-1L << 40) + 1; > + regs.r8 = (~0ULL << 40) + 1; While -1 vs ~0 doesn't make a big difference, I think we want to stick to "register size" here, and hence have only UL as the suffix. Then (happy to adjust while committing): Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 15:57:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 15:57:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239157.1540594 (Exim 4.92) (envelope-from ) id 1vuYJg-0006CS-Cc; Mon, 23 Feb 2026 15:57:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239157.1540594; Mon, 23 Feb 2026 15:57:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYJg-0006CL-8A; Mon, 23 Feb 2026 15:57:48 +0000 Received: by outflank-mailman (input) for mailman id 1239157; Mon, 23 Feb 2026 15:57:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYJf-0006CF-4f for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 15:57:47 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 64152514-10d0-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 16:57:44 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso33230925e9.1 for ; Mon, 23 Feb 2026 07:57:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 07:57:43 -0800 (PST) Message-ID: <4711b676-82f8-48ec-a7dd-5c33bc7cd967@suse.com> Date: Mon, 23 Feb 2026 16:57:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] tools/tests/x86_emulator: avoid duplicating loop body To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:04, Edwin Török wrote: > clang would duplicate the loop body and end up with a double definition > of the symbol: > ``` > /tmp/test_x86_emulator-0f3576.s:27823: Error: symbol `vmovsh_to_mem' is already defined > /tmp/test_x86_emulator-0f3576.s:27825: Error: symbol `.Lvmovsh_to_mem_end' is already defined > ``` > > This is a valid transformation, that even GCC might do, see > https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Volatile-1 which > says that `%=` should be used instead. However the C code here also > needs to know the name of the label, so I don't immediately see how to > solve that. > > For now mark the loop variable `volatile` to prevent the optimization as a > workaround. > (another way to fix this could be to move the loop body into a function, > but a compiler might inline it, or specialize it, leading to the same problem) Hmm, moving decl and asm() out of the loop wouldn't really work. One option would be to extend the long-pending [1] to also cover test_x86_emulator.c. Another might be to make the upper loop bound not a literal 2, but one loaded from memory, suitably arranged for the compiler to not be able to const-propagate the value. But I wonder how many other transformations the compiler could do, causing the same issue elsewhere. Maybe we need to overhaul how this instruction instantiation works. (I further wonder how many such issues are lurking in the many patches I have out for review, plus the yet further ones I didn't post yet to not pointlessly increase the pile.) > --- a/tools/tests/x86_emulator/test_x86_emulator.c > +++ b/tools/tests/x86_emulator/test_x86_emulator.c > @@ -5248,7 +5248,7 @@ int main(int argc, char **argv) > memset(res + 3, ~0, 8); > regs.eax = (unsigned long)res; > regs.ecx = ~0; > - for ( i = 0; i < 2; ++i ) > + for (volatile int i = 0; i < 2; ++i ) Even if we went with this as a workaround, style should please not be screwed up. Also, whichever the workaround, I think a comment wants leaving. And then I don't think it is a good idea to introduce a shadowing induction variable. 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Mon, 23 Feb 2026 08:02:15 -0800 (PST) Message-ID: <6d564a09-b1bb-414f-ba8a-61bf9d9c7e5e@suse.com> Date: Mon, 23 Feb 2026 17:02:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] tools/tests/x86_emulator: fix build on clang-21 To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org References: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:04, Edwin Török wrote: > clang-21's built-in assembler is enabled by default, but it doesn't > support some mnemonics: > ``` > test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' > 2636 | "fidivs %1\n\t" > test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' > 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); > | ^ > test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' > 4251 | put_insn(vpcmpestri, > | ^ > ``` Was this reported to them as a bug (or perhaps even two)? That would be nice to add ... > --- a/tools/tests/x86_emulator/Makefile > +++ b/tools/tests/x86_emulator/Makefile > @@ -297,6 +297,7 @@ x86_emulate: > > HOSTCFLAGS-x86_64 := -fno-PIE > $(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-pie) > +$(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-integrated-as) ... as reference in a comment here. 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>> | ^ >> test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' >> 4251 | put_insn(vpcmpestri, >> | ^ >> ``` > Was this reported to them as a bug (or perhaps even two)? Looking at just one of these, the mnemonic is FRSTOR without an S, and Clang 21 is happy with that. What is the trailing S supposed to signify to GAS? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:06:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:06:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239175.1540622 (Exim 4.92) (envelope-from ) id 1vuYRu-0000eY-HP; Mon, 23 Feb 2026 16:06:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239175.1540622; Mon, 23 Feb 2026 16:06:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYRu-0000eP-En; Mon, 23 Feb 2026 16:06:18 +0000 Received: by outflank-mailman (input) for mailman id 1239175; Mon, 23 Feb 2026 16:06:17 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYRt-0000R0-EZ for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 16:06:17 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9450481f-10d1-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 17:06:15 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fKQh63rRxz5QlJcf for ; Mon, 23 Feb 2026 16:06:14 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 51334c08eff94bfd826fadb2c624080e; Mon, 23 Feb 2026 16:06:14 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9450481f-10d1-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771862774; x=1772132774; bh=TCyeWMlB5aOnhu7d3tSZ47H5jstmdjLYiH5F1k4yF34=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=iCasQhTotsjzSsisxHcCyl7uhGnjgILkLVNadxZqfzmUctEn5ekgOo0nBvf2+4eVg EZMuVzSpstvyPOiwrSpbt1p8I4D45fIrzqETsuC/X/GIsbilKFCjE2RnHRY41Hngih bl8/cJgyRpKEstN1G8fOVGZhneZxpxiXNXc288/HCe5reL+ry+EynpHiQLhbbwYaYR kjXkNi7410kTtdCXAeX04ufnR8vJ30uWDeVc27QpnG9DdDvfG8KTtllENUGYFW8zIo kMFO9ab7xqygb1rTPPJiRmm0dE9+w0ETA9MO0wS5IWeNAbPgNC0NzHdl3JGh+Rg0W8 sTZ1Q6skx7CNw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771862774; x=1772123274; i=teddy.astie@vates.tech; bh=TCyeWMlB5aOnhu7d3tSZ47H5jstmdjLYiH5F1k4yF34=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=03hh5NrXYrZM9Gzpas711j33x4Ia+m0lzLV0WinodJj41yKIpUIavzx3MsUM+yTWf cqH8bB09PEHok3yDeQoJ2miLeUN0wSlwIgusFlNIx11MCXBCo5bBH26MYDKzTb5aoK apTCZKJ8biXKJ2w/i3UiPTstb8oee6zKi7H6RNYFUG4JMev3UJdzbBiMmlacRRD9gT QjQQ9POBl6FfJOrZX9uRpml1dU/pLssNr5nrIgIYlZyxKJxC+xq7W8YodSXu+7PRaD l/aUTe5j/kh433HtlcCM7pl0uEMk0yxv7j3UDRnCOjOmi7dk0ZqdNCH7QUqqGBS7B5 +01KIIqeMveeA== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=20v7=202/2]=20xenpm:=20Add=20get-dts-temp=20subcommand?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771862773674 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Oleksii Kurochko" , "Community Manager" , "Anthony PERARD" , "Jan Beulich" Message-Id: In-Reply-To: References: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.51334c08eff94bfd826fadb2c624080e?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260223:md Date: Mon, 23 Feb 2026 16:06:14 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable get-dts-temp allows querying the per-core CPU temperature and per-package one on processors that supports Digital Temperature Sensors (most Intel processors; as usual Dom0 drivers cannot work due to misalignment between Dom0 vCPU and pCPUs). Signed-off-by: Teddy Astie --- CC: Jan Beulich v4: https://lore.kernel.org/xen-devel/cover.1766158766.git.teddy.astie@vate= s.tech/ v5: Removed trailing whitespace. v6: Report errors through errno and use strerror() to display them v7: - Rename get-intel-temp with get-dts-temp - handle properly errno - make process return a error code if no data CHANGELOG.md | 2 + tools/misc/xenpm.c | 130 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 131 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20..d7fac4a8d0 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,8 @@ The format is based on [Keep a Changelog](https://keepach= angelog.com/en/1.0.0/) - Support for Bus Lock Threshold on AMD Zen5 and later CPUs, used by Xe= n to mitigate (by rate-limiting) the system wide impact of an HVM guest misusing atomic instructions. + - Introduce get-intel-temp to xenpm to query CPU temperatures on Intel + platforms. ### Removed - On x86: diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index 682d092479..8d6a91d680 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -32,11 +32,14 @@ #include +#include + #define MAX_PKG_RESIDENCIES 12 #define MAX_CORE_RESIDENCIES 8 static xc_interface *xc_handle; static unsigned int max_cpu_nr; +static xc_physinfo_t physinfo; /* help message */ void show_help(void) @@ -93,6 +96,7 @@ void show_help(void) " units default to \= "us\" if unspecified.\n" " truncates un-repre= sentable values.\n" " 0 lets the hardwar= e decide.\n" + " get-dts-temp [cpuid] get CPU temperature thro= ugh DTS for or all\n" " start [seconds] start collect Cx/Px stat= istics,\n" " output after CTRL-C or S= IGINT or several seconds.\n" " enable-turbo-mode [cpuid] enable Turbo Mode for pr= ocessors that support it.\n" @@ -1354,6 +1358,130 @@ void enable_turbo_mode(int argc, char *argv[]) errno, strerror(errno)); } +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, i= nt *temp) +{ + xc_resource_entry_t entries[] =3D { + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STA= TUS }, + { .idx =3D MSR_TEMPERATURE_TARGET }, + }; + struct xc_resource_op ops =3D { + .cpu =3D cpu, + .entries =3D entries, + .nr_entries =3D ARRAY_SIZE(entries), + }; + int tjmax; + + int ret =3D xc_resource_op(xch, 1, &ops); + + switch ( ret ) + { + case 0: + /* This CPU isn't online or can't query this MSR */ + errno =3D ENODATA; + return -errno; + + case 1: + { + /* + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's = 100 + * which is correct aside a few selected Atom CPUs. Check Linux + * kernel's coretemp.c for more information. + */ + static bool has_reported_once =3D false; + + if ( !has_reported_once ) + { + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assu= me " + "tjmax =3D 100, readings may be incorrect.\n")= ; + has_reported_once =3D true; + } + + tjmax =3D 100; + break; + } + + case 2: + tjmax =3D (entries[1].val >> 16) & 0xff; + break; + + default: + if ( ret > 0 ) + { + fprintf(stderr, "Got unexpected xc_resource_op return value: %= d", ret); + errno =3D EINVAL; + } + else + errno =3D -ret; + return -errno; + } + + *temp =3D tjmax - ((entries[0].val >> 16) & 0xff); + return 0; +} + +static void get_dts_temp(int argc, char *argv[]) +{ + int temp =3D -1, cpu =3D -1; + unsigned int socket; + bool has_data =3D false; + + if ( argc > 0 ) + parse_cpuid(argv[0], &cpu); + + if ( cpu !=3D -1 ) + { + if ( !fetch_dts_temp(xc_handle, cpu, false, &temp) ) + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + else + { + fprintf(stderr, "Unable to fetch temperature (%d - %s)\n", + errno, strerror(errno)); + printf("No data\n"); + exit(ENODATA); + } + return; + } + + /* Per socket measurement */ + for ( socket =3D 0, cpu =3D 0; cpu < max_cpu_nr; + socket++, cpu +=3D physinfo.cores_per_socket * physinfo.threads_= per_core ) + { + if ( fetch_dts_temp(xc_handle, cpu, true, &temp) ) + { + fprintf(stderr, + "[Package%u] Unable to fetch temperature (%d - %s)\n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("Package%u: %d=C2=B0C\n", socket, temp); + } + + if ( has_data ) + /* Avoid inserting a trailing line if we have nothing */ + printf("\n"); + + for ( cpu =3D 0; cpu < max_cpu_nr; cpu +=3D physinfo.threads_per_core = ) + { + if ( fetch_dts_temp(xc_handle, cpu, false, &temp) ) + { + fprintf(stderr, "[CPU%d] Unable to fetch temperature (%d - %s)= \n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + } + + if ( !has_data ) + { + printf("No data\n"); + exit(ENODATA); + } +} + void disable_turbo_mode(int argc, char *argv[]) { int cpuid =3D -1; @@ -1618,12 +1746,12 @@ struct { { "set-max-cstate", set_max_cstate_func}, { "enable-turbo-mode", enable_turbo_mode }, { "disable-turbo-mode", disable_turbo_mode }, + { "get-dts-temp", get_dts_temp }, }; int main(int argc, char *argv[]) { int i, ret =3D 0; - xc_physinfo_t physinfo; int nr_matches =3D 0; int matches_main_options[ARRAY_SIZE(main_options)]; -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:06:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:06:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239174.1540612 (Exim 4.92) (envelope-from ) id 1vuYRt-0000RD-BX; Mon, 23 Feb 2026 16:06:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239174.1540612; Mon, 23 Feb 2026 16:06:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYRt-0000R6-8x; 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charset=utf-8 Content-Transfer-Encoding: 7bit xc_report_op returns -1 in some error conditions. Make sure it returns -ENOMEM in out of memory errors and -EINVAL in invalid usages errors. Signed-off-by: Teddy Astie --- v7: Introduced tools/libs/ctrl/xc_resource.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tools/libs/ctrl/xc_resource.c b/tools/libs/ctrl/xc_resource.c index cb6a97202b..1ca71ee048 100644 --- a/tools/libs/ctrl/xc_resource.c +++ b/tools/libs/ctrl/xc_resource.c @@ -28,7 +28,7 @@ static int xc_resource_op_one(xc_interface *xch, xc_resource_op_t *op) XC_HYPERCALL_BUFFER_BOUNCE_BOTH); if ( xc_hypercall_bounce_pre(xch, entries) ) - return -1; + return -ENOMEM; platform_op.cmd = XENPF_resource_op; platform_op.u.resource_op.nr_entries = op->nr_entries; @@ -54,19 +54,19 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ call_list = xc_hypercall_buffer_alloc(xch, call_list, sizeof(*call_list) * nr_ops); if ( !call_list ) - return -1; + return -ENOMEM; platform_ops = xc_hypercall_buffer_array_create(xch, nr_ops); if ( !platform_ops ) { - rc = -1; + rc = -ENOMEM; goto out; } entries_list = xc_hypercall_buffer_array_create(xch, nr_ops); if ( !entries_list ) { - rc = -1; + rc = -ENOMEM; goto out; } @@ -81,7 +81,7 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ platform_op, sizeof(xen_platform_op_t)); if ( !platform_op ) { - rc = -1; + rc = -ENOMEM; goto out; } @@ -90,7 +90,7 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ entries, entries_size); if ( !entries) { - rc = -1; + rc = -ENOMEM; goto out; } memcpy(entries, op->entries, entries_size); @@ -137,7 +137,7 @@ int xc_resource_op(xc_interface *xch, uint32_t nr_ops, xc_resource_op_t *ops) if ( nr_ops > 1 ) return xc_resource_op_multi(xch, nr_ops, ops); - return -1; + return -EINVAL; } /* -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:11:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:11:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239202.1540642 (Exim 4.92) (envelope-from ) id 1vuYWW-0003I2-DF; Mon, 23 Feb 2026 16:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239202.1540642; Mon, 23 Feb 2026 16:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYWW-0003Hv-Am; Mon, 23 Feb 2026 16:11:04 +0000 Received: by outflank-mailman (input) for mailman id 1239202; Mon, 23 Feb 2026 16:11:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYWU-0003Hp-Rk for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 16:11:03 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3d46425b-10d2-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 17:10:58 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-483a2338616so28526975e9.0 for ; Mon, 23 Feb 2026 08:10:58 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 08:10:57 -0800 (PST) Message-ID: <7f6cca68-f681-41ce-8d2c-2f4854510759@suse.com> Date: Mon, 23 Feb 2026 17:10:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] tools/tests/x86_emulator: disable xmm* tests on clang To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org References: <9e380de50b64e45e9044a2f4bcf1a5bdb7e74a29.1771840208.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <9e380de50b64e45e9044a2f4bcf1a5bdb7e74a29.1771840208.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:04, Edwin Török wrote: > clang-21 doesn't support `-ffixed-xmm0`, so `%xmm0` won't have the > expected value. > Disable these tests on clang. I don't think that's what we want, and not only because of the clutter the various #ifdef cause. We want to be able to run as many of the tests as possible, so the first goal should be to find some alternative mechanism to achieve the same effect. A global register variable comes to mind as a possible option. Further, how did you arrive at which tests need suppressing? I don't think we rely on an "expected value" anywhere. I don't even recall us passing -ffixed-xmm0 when compiling test_x86_emulate.c. We use that option when building various of the test blobs, iirc. And the comment ahead of the first use explains why we use the option there. (Later we also use -ffixed-ymm and -ffixed-zmm, btw.) Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:14:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:14:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239210.1540653 (Exim 4.92) (envelope-from ) id 1vuYZK-0003nr-Rc; Mon, 23 Feb 2026 16:13:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239210.1540653; Mon, 23 Feb 2026 16:13:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYZK-0003nk-NE; Mon, 23 Feb 2026 16:13:58 +0000 Received: by outflank-mailman (input) for mailman id 1239210; Mon, 23 Feb 2026 16:13:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYZJ-0003ne-Rl for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 16:13:57 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a6dd3f2a-10d2-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 17:13:55 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4833115090dso43261745e9.3 for ; Mon, 23 Feb 2026 08:13:55 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 08:13:54 -0800 (PST) Message-ID: <0d7afac2-d358-4b0e-b828-31ebba6357d2@suse.com> Date: Mon, 23 Feb 2026 17:13:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 1/2] libxc: Report consistent errors in xc_resource_op To: Teddy Astie Cc: Anthony PERARD , Juergen Gross , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 17:06, Teddy Astie wrote: > xc_report_op returns -1 in some error conditions. > Make sure it returns -ENOMEM in out of memory errors and -EINVAL > in invalid usages errors. Isn't this a move in the wrong direction? -1 as a return value is quite okay. errno wants setting to indicate the cause of the error (if called functions don't already set it properly). Also nit: s/xc_report_op/xc_resource_op/ . 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Mon, 23 Feb 2026 08:21:06 -0800 (PST) Message-ID: <76041b1f-aeb5-4d9e-af6a-a2616763e5c3@suse.com> Date: Mon, 23 Feb 2026 17:21:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] tools/tests/x86_emulator: fix build on clang-21 To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org, =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= References: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> <6d564a09-b1bb-414f-ba8a-61bf9d9c7e5e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 17:06, Andrew Cooper wrote: > On 23/02/2026 4:02 pm, Jan Beulich wrote: >> On 23.02.2026 11:04, Edwin Török wrote: >>> clang-21's built-in assembler is enabled by default, but it doesn't >>> support some mnemonics: >>> ``` >>> test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' >>> 2636 | "fidivs %1\n\t" >>> test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' >>> 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); >>> | ^ >>> test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' >>> 4251 | put_insn(vpcmpestri, >>> | ^ >>> ``` >> Was this reported to them as a bug (or perhaps even two)? > > Looking at just one of these, the mnemonic is FRSTOR without an S, and > Clang 21 is happy with that. > > What is the trailing S supposed to signify to GAS? "short", i.e. the want for a 16-bit operand size prefix. Just like in vpcmpestriq the request is for a REX64 prefix. Suffixes are the way to go in AT&T syntax when operands alone can't disambiguate operand size. The less nice alternative are data16 prefixes; not sure if Clang would support those. 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Mon, 23 Feb 2026 08:28:48 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 17:28:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/2] xenpm: Add get-dts-temp subcommand To: Teddy Astie Cc: Oleksii Kurochko , Community Manager , Anthony PERARD , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 17:06, Teddy Astie wrote: > get-dts-temp allows querying the per-core CPU temperature and > per-package one on processors that supports Digital Temperature Sensors > (most Intel processors; as usual Dom0 drivers cannot work due to > misalignment between Dom0 vCPU and pCPUs). > > Signed-off-by: Teddy Astie > --- > CC: Jan Beulich > > v4: https://lore.kernel.org/xen-devel/cover.1766158766.git.teddy.astie@vates.tech/ > v5: Removed trailing whitespace. > v6: Report errors through errno and use strerror() to display them > v7: > - Rename get-intel-temp with get-dts-temp I'm sorry, but would you clarify in how far "DTS" is less Intel-ish than "Intel"? Something generic, re-usable (for other vendors) may be "core". > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -13,6 +13,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > - Support for Bus Lock Threshold on AMD Zen5 and later CPUs, used by Xen to > mitigate (by rate-limiting) the system wide impact of an HVM guest > misusing atomic instructions. > + - Introduce get-intel-temp to xenpm to query CPU temperatures on Intel > + platforms. Nit: This still says "intel". Also the sentence looks incomplete; perhaps missing something like "command line option" or "sub-command". > @@ -1354,6 +1358,130 @@ void enable_turbo_mode(int argc, char *argv[]) > errno, strerror(errno)); > } > > +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, int *temp) > +{ > + xc_resource_entry_t entries[] = { > + { .idx = package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS }, > + { .idx = MSR_TEMPERATURE_TARGET }, > + }; > + struct xc_resource_op ops = { > + .cpu = cpu, > + .entries = entries, > + .nr_entries = ARRAY_SIZE(entries), > + }; > + int tjmax; > + > + int ret = xc_resource_op(xch, 1, &ops); > + > + switch ( ret ) > + { > + case 0: > + /* This CPU isn't online or can't query this MSR */ > + errno = ENODATA; > + return -errno; I fear I still don't follow any of this errno handling. Why would a function return -errno after setting it? Yet, here you want to "synthesize" an error, but that wants doing to match library functions' behavior. Jan From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:36:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:36:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239249.1540687 (Exim 4.92) (envelope-from ) id 1vuYvL-0008Et-2D; Mon, 23 Feb 2026 16:36:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239249.1540687; Mon, 23 Feb 2026 16:36:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYvK-0008Em-TF; Mon, 23 Feb 2026 16:36:42 +0000 Received: by outflank-mailman (input) for mailman id 1239249; Mon, 23 Feb 2026 16:36:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYvJ-0008Ef-F6 for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 16:36:41 +0000 Received: from smtp-2.srv.uis.cam.ac.uk (smtp-2.srv.uis.cam.ac.uk [128.232.132.148]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d2ec09f6-10d5-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 17:36:38 +0100 (CET) Received: from hades.srcf.societies.cam.ac.uk ([131.111.179.67]:10335) by smtp-2.srv.uis.cam.ac.uk with esmtps (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1vuYvF-00000005JUz-5EWC; Mon, 23 Feb 2026 16:36:37 +0000 Received: from [192.168.1.37] (host-92-22-18-152.as13285.net [92.22.18.152]) (Authenticated sender: amc96) by hades.srcf.societies.cam.ac.uk (Postfix) with ESMTPSA id 42A541FB18; Mon, 23 Feb 2026 16:36:37 +0000 (GMT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d2ec09f6-10d5-11f1-9ccf-f158ae23cfc8 X-Cam-AntiVirus: no malware found X-Cam-ScannerInfo: https://help.uis.cam.ac.uk/email-scanner-virus Message-ID: <7cf0df43-6271-49f3-8bc1-ceb54f4b8463@srcf.net> Date: Mon, 23 Feb 2026 16:36:37 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] tools/tests/x86_emulator: fix build on clang-21 To: Jan Beulich , Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org, =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= References: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> <6d564a09-b1bb-414f-ba8a-61bf9d9c7e5e@suse.com> <76041b1f-aeb5-4d9e-af6a-a2616763e5c3@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=amc96@srcf.net; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 23/02/2026 4:21 pm, Jan Beulich wrote: > On 23.02.2026 17:06, Andrew Cooper wrote: >> On 23/02/2026 4:02 pm, Jan Beulich wrote: >>> On 23.02.2026 11:04, Edwin Török wrote: >>>> clang-21's built-in assembler is enabled by default, but it doesn't >>>> support some mnemonics: >>>> ``` >>>> test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' >>>> 2636 | "fidivs %1\n\t" >>>> test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' >>>> 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); >>>> | ^ >>>> test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' >>>> 4251 | put_insn(vpcmpestri, >>>> | ^ >>>> ``` >>> Was this reported to them as a bug (or perhaps even two)? >> Looking at just one of these, the mnemonic is FRSTOR without an S, and >> Clang 21 is happy with that. >> >> What is the trailing S supposed to signify to GAS? > "short", i.e. the want for a 16-bit operand size prefix. But that is normally spelled 'w', not 's' in AT&T syntax. Not that it matters; Clang doesn't like 'w' either. > Just like in > vpcmpestriq the request is for a REX64 prefix. Suffixes are the way to > go in AT&T syntax when operands alone can't disambiguate operand size. > The less nice alternative are data16 prefixes; not sure if Clang would > support those. data16 seems to be tolerated. https://godbolt.org/z/MWGjnfWs7 Interestingly Clang automatically inserts a WAIT, although that's a side effect of the FSAVE it turns into FNSAVE.   Compiling to a full binary removes the WAIT and reinstates FSAVE, which I suspect means it's switching back to no-IAS/binutils behind the scenes. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 23 16:37:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 16:37:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239254.1540695 (Exim 4.92) (envelope-from ) id 1vuYvj-0000C9-7u; Mon, 23 Feb 2026 16:37:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239254.1540695; Mon, 23 Feb 2026 16:37:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYvj-0000C2-5B; Mon, 23 Feb 2026 16:37:07 +0000 Received: by outflank-mailman (input) for mailman id 1239254; Mon, 23 Feb 2026 16:37:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuYvi-0000Bs-GH for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 16:37:06 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e3242b20-10d5-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 17:37:05 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-48372efa020so36131435e9.2 for ; Mon, 23 Feb 2026 08:37:05 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 08:37:04 -0800 (PST) Message-ID: <20e3edf8-9aba-40e9-af57-e5eddf001a7b@suse.com> Date: Mon, 23 Feb 2026 17:37:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , xen-devel@lists.xenproject.org References: <6fa0d95dad3d223cf8aaa923ae59fd0b3a97d4a0.1771840831.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6fa0d95dad3d223cf8aaa923ae59fd0b3a97d4a0.1771840831.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > Introduce a new tools/tests/Rules.mk that must be included *last* in a > Makefile, after TARGETS is defined. Requiring inclusion after TARGETS is defined is certainly okay. Requiring it to be included absolutely last is imo going too far. There surely are going to be cases where something wants overriding or adding to. > --- /dev/null > +++ b/tools/tests/Rules.mk > @@ -0,0 +1,48 @@ > +# Usage: include this last in your Makefile. > +# > +# For example: > +# > +# XEN_ROOT = $(CURDIR)/../../.. > +# include $(XEN_ROOT)/tools/Rules.mk > +# > +# TARGETS := ... > +# ... > +# include $(XEN_ROOT)/tools/tests/Rules.mk > + > +ifndef XEN_ROOT > +$(error XEN_ROOT is not defined) > +endif > + > +.PHONY: all > +all: $(TARGETS) > +.DEFAULT_GOAL: all Make 3.80, which ./README still says we support, doesn't look to know this. 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Mon, 23 Feb 2026 08:40:37 -0800 (PST) Message-ID: Date: Mon, 23 Feb 2026 17:40:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] tools/tests/x86_emulator: fix build on clang-21 To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , xen-devel@lists.xenproject.org, =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= , Andrew Cooper References: <7147fc3ef5d5bdf5a811e896925d9aa641ed0753.1771840208.git.edwin.torok@citrix.com> <6d564a09-b1bb-414f-ba8a-61bf9d9c7e5e@suse.com> <76041b1f-aeb5-4d9e-af6a-a2616763e5c3@suse.com> <7cf0df43-6271-49f3-8bc1-ceb54f4b8463@srcf.net> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7cf0df43-6271-49f3-8bc1-ceb54f4b8463@srcf.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 17:36, Andrew Cooper wrote: > On 23/02/2026 4:21 pm, Jan Beulich wrote: >> On 23.02.2026 17:06, Andrew Cooper wrote: >>> On 23/02/2026 4:02 pm, Jan Beulich wrote: >>>> On 23.02.2026 11:04, Edwin Török wrote: >>>>> clang-21's built-in assembler is enabled by default, but it doesn't >>>>> support some mnemonics: >>>>> ``` >>>>> test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' >>>>> 2636 | "fidivs %1\n\t" >>>>> test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' >>>>> 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); >>>>> | ^ >>>>> test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' >>>>> 4251 | put_insn(vpcmpestri, >>>>> | ^ >>>>> ``` >>>> Was this reported to them as a bug (or perhaps even two)? >>> Looking at just one of these, the mnemonic is FRSTOR without an S, and >>> Clang 21 is happy with that. >>> >>> What is the trailing S supposed to signify to GAS? >> "short", i.e. the want for a 16-bit operand size prefix. > > But that is normally spelled 'w', not 's' in AT&T syntax. Floating point mnemonics look to be special (and AT&T syntax is absurd in some situations anyway). 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The error paths are just an artefact of the hook functions needing to return something. The best effort unwind is also something that doesn't exist in real hardware, and complicates following the logic. Instead, use an ASSERT_UNREACHABLE() with a fallback of injecting #DF. Hitting this path is an error in Xen. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné Tested using LKGS's extention of the test emulator for SWAPGS. --- xen/arch/x86/x86_emulate/0f01.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f01.c index 6c10979dd650..760f5f865913 100644 --- a/xen/arch/x86/x86_emulate/0f01.c +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -192,18 +192,21 @@ int x86emul_0f01(struct x86_emulate_state *s, if ( (rc = ops->read_segment(x86_seg_gs, &sreg, ctxt)) != X86EMUL_OKAY || (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, - ctxt)) != X86EMUL_OKAY || - (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, - ctxt, false)) != X86EMUL_OKAY ) + ctxt)) != X86EMUL_OKAY ) goto done; - sreg.base = msr_val; - if ( (rc = ops->write_segment(x86_seg_gs, &sreg, - ctxt)) != X86EMUL_OKAY ) + if ( (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, + ctxt, false)) != X86EMUL_OKAY || + (sreg.base = msr_val, + (rc = ops->write_segment(x86_seg_gs, &sreg, + ctxt)) != X86EMUL_OKAY) ) { - /* Best effort unwind (i.e. no real error checking). */ - if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, - ctxt, false) == X86EMUL_EXCEPTION ) - x86_emul_reset_event(ctxt); + /* + * In real hardware, access to the registers cannot fail. It is + * an error in Xen if the writes fail given that both MSRs have + * equivalent checks. + */ + ASSERT_UNREACHABLE(); + generate_exception(X86_EXC_DF); goto done; } break; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 18:02:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 18:02:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239292.1540726 (Exim 4.92) (envelope-from ) id 1vuaFv-0004LR-FH; Mon, 23 Feb 2026 18:02:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239292.1540726; Mon, 23 Feb 2026 18:02:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuaFv-0004LK-BL; Mon, 23 Feb 2026 18:02:03 +0000 Received: by outflank-mailman (input) for mailman id 1239292; Mon, 23 Feb 2026 18:02:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuaFu-0004LE-5b for xen-devel@lists.xenproject.org; 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Smith" , CC: Chris Rogers , Dmytro Firsov , Andrew Cooper , "Anthony PERARD" , Michal Orzel , "Jan Beulich" , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E63:EE_|IA0PR12MB8747:EE_ X-MS-Office365-Filtering-Correlation-Id: c2852001-5f59-458a-c740-08de73059f69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|7416014|376014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?RVhHQkYyblZCVmFYT2xHSkpRR1VHdkhNb0g4ZURFdk9qVjlYUFRzWTgrSlNJ?= =?utf-8?B?YVRER1FmTEVhUGVFM1JNcEMxczQweW1pT1VkSEJyUGZrQy82L0VnM0Q1Q0Va?= =?utf-8?B?R01IampDbkpvdjVmWVJaODBjczQzeklmeUgvOVZoV2J1aUh0QWNxSjVTcytW?= =?utf-8?B?K0dWc3VZeGVENG5OUmdRclNSWVR2dmtUbzlKWXRJUHpBUnFGM1I4WFVzelov?= =?utf-8?B?SWVscFFJS3R1bzBFaUpJSlgxVnJqdC92MXJ0dWlGNDNDTERDQUJkQzdBMVly?= =?utf-8?B?UVdUcllqUmtCRG9CTmNwT2R4cSttM210Z3VxMmJKbzJzUURXMGRTMnF1TEFv?= =?utf-8?B?N2FNaEpaOVNnbFdGSmVPZCt5RFdhSE1kcE1xcTlhUkxMNUpxMkVYSm5ZMlN1?= =?utf-8?B?OEZ5MXdablJTaithbUw4UlRSdXJCRzgvOFJNR1lnN3FCTUtVajFNN1Y2RUty?= =?utf-8?B?cWp1RDVrVWMzZ2hSV0dnTGU5eWpoamlXeWhKM1owaDl3clhPQ2ZxRGxtQ25V?= =?utf-8?B?Zll4dlphRDJXWHhmQkE5ZDhhOHMrMjVTTkMyLzF5WXVhVVM1aDkzK2RoQ2E3?= =?utf-8?B?SFV5QVhyZ0FYbXVMMkJpdGlpdmgwckV0NTFYdmZTQ01QVHpFUlRkZU1xSmM3?= =?utf-8?B?NitMN05sSy8xUWFKRnkxcjM5THpBaEp2N2VLY2RYdXFWVy9OdjZOZTQyeWxx?= =?utf-8?B?VWF0QWdsamtiMVZyVWdqTkZtVzFkbjNJcWJqYlVUTGlmTm9ObGpaNGdMK3Rh?= =?utf-8?B?WlE4YUxoN1UycXUvaWRSSWFuT1ZQNVJwSTJwWEVGOXlXcktVSGp5TlFnamk2?= =?utf-8?B?T3dkN09KVGF2am5JdkRzMFNlbnBqTmRONzlTcmhtSTR3OFFCYmUzSGFVQ3l2?= =?utf-8?B?UzA1SmhLYVlyU1ZSaStrd2lyYkZFTDA0Z05kRHFKYytZQ3JzV3lwS3F5Qlpr?= =?utf-8?B?NUVIdExBMXJjdlMxczdZRGF4cldTRitmYWdJc01udEh5ejhrTzZST1BvT1Q2?= =?utf-8?B?M1dZMlFpVHZwaHEwUi9iUVl0ZFlBYlRjNnowdWhQeHJHc1pSTGNqL3hmMU8x?= =?utf-8?B?b1pVdER6VWs5UGUyWmppaThnT0diUG9iM1JaelVZVVhVK2o1NFZCUmJpdElR?= =?utf-8?B?M3BHMzh4cklvVS9meHo0b2E2M2x0eXA3S1JlbUwzU1RMTEVncWc5Z3Z5VE1O?= =?utf-8?B?eCtUMnVXNnVHWnFTVWpwTmNINlBjMmE2WXJTd2VibGJZT3p0UmhYVGVrY2VM?= =?utf-8?B?bUx4M292elhHNm45WDhCMXc1dnBWWURGRE5RNFJVVEMvNFZSNll4K0xoQ1Ix?= =?utf-8?B?cUNSNndsSWU1UUhuTnN6aEZSTnlYMlRvSmhtenUrUWg0UjRYYkx1dW9FZTdp?= =?utf-8?B?M0lUbW01Q2RTdWtSdFY5NENNRVRqeUNKMGJpd2pnMWpraEFlQWxYQnJqQXJj?= =?utf-8?B?M0pPV1NNSDV6UDBGVzVFWEVNdWtJcFMrRUlOTXNwbWpuN3UzMHZET1dWK25V?= =?utf-8?B?emsxcGJPcHF0TXFsZFlveVlvUXIzcW9TS2o3N1hpSVR5YmoxY2tMeHk5U3RE?= =?utf-8?B?TkgyQWVmQ1VCd3QrL2NTTlhGYXpJRzMraVN5aTRXU04yZzZrK2ExYlhPVG9P?= =?utf-8?B?elFUdWdKMHJyK0RMMDErWkRLR0oyM08xMnlTazVBZ082SWRiL0sxNjIva0U3?= =?utf-8?B?ZUZScTJWRVpUZWRWYmlvQkNPK0tIVk1iTTFsSGU4RDlacHRBN3MzaUZsTHBu?= =?utf-8?B?bHpVNnBzZkxHUSt6Ry9Ib01BNGJNZVVXNmhqd0pVVWlZVlZFamVxckUrS0lS?= =?utf-8?B?NnZmdDNSZ01LWVZkWDA0SlNGSWRQVEZqQkM1ajV6eHNzNFVTMkFIMHIxUFFL?= =?utf-8?B?U1VWOTFWa2tUZXVOSUFSckRHZ0lzTzFCYUtMUml1WVM5V2g2czBpY1puM2V3?= =?utf-8?B?MWdQS3hKSlcrRlp1NGlZSks0YlRoYjI1bHB5NXdYKzNOdmhRRzdWMlgzTVVN?= =?utf-8?B?KzVZM2ZhUHdob1pzbDNRaFJFN1AvUnlNc0w3TUVrWjFsUHU3N1pWbEllU25l?= =?utf-8?B?QWJGUGpGRm80TUx1VHo1Rks2UncyS3VESnJwQU53ZkNVbm5OcHNnNXc1N2dC?= =?utf-8?B?MWFBdzQwYUZHRHdMUWR2TWMwUDBJZVJpaDJ6dkdLeFRCZ09XaEVmY3pJUHll?= =?utf-8?B?NWZCUjlha3YxNkN2UytDb2FsRWZabGNGQlRxWExXVGVSVERVVE5mazZLd2lj?= =?utf-8?B?V2tqVHY1Kzkvb21SL3FDb0w4SXJnPT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(7416014)(376014);DIR:OUT;SFP:1101; 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Smith wrote: > On 2/18/26 18:04, Jason Andryuk wrote: >>> diff --git a/xen/common/domctl.c b/xen/common/domctl.c >>> index 29a7726d32d0..2eedc639c72a 100644 >>> --- a/xen/common/domctl.c >>> +++ b/xen/common/domctl.c >>> @@ -860,12 +860,9 @@ long >>> do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >>>           break; >>>       case XEN_DOMCTL_get_domain_state: >>> -        ret = xsm_get_domain_state(XSM_XS_PRIV, d); >> >> With the initial NULL deref issue, I wondered if this wouldn't be >> better off modified to drop the d param - >> xsm_get_domain_state(XSM_XS_PRIV) - and changing flask permissions like: >> allow dom0_t xen_t:xen get_domain_state; >> >> That would gate the external call, and individual domain permissions >> could be checked with xsm_getdomaininfo(), or a new hook if you don't >> want to re-use. >> >> But as your approach avoids passing NULL, it seems okay to me.  It >> also doesn't change the flask policy, which is nice. > > That's a plain nack from me. Whether it is viewed as a pipe dream or > not, my goal continues to be to work towards enabling the ability to > have a truly disaggregated platform. In the original architecture, it > was envisioned to have multiple toolstack domains, each responsible for > a distinct set of domains. In terms of implementation, that would mean > multiple xenstored instances, each with a purview over a subset of domains. I don't think what I wrote is at odds with your pipe dream. My main concern is passing NULL as a domain. I think that is wrong, beyond the fault seen on ARM. In domain_target_sid(), I think the NULL dst was mistakenly matched to dom0's NULL src->target. src->target_sid is 0 from zalloc, which is not otherwise initialized and invalid. That is returned. Later when sidtab_search() can't find it, it is remapped to SECINITSID_UNLABELED and returned. That silent remapping is dubious, and it points toward unlabled_t should never be allowed in any rule. Maybe it should remap unknown sids to a dedicated invalid_t, but maybe invalid_t is already supposed to be that? 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mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771872574; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=idDbvGL5FN9xAkszqvnLClJIzLN4MMf1X3ERjjPnEBg=; b=ZH+dnhAgIYMNK7ouBHwezb64q4FAm/hqSQm6zHl508sHx6wovoAC/BvP9dhvpMSr lqhe/GvBiYn0euU5MKc8pPz5ks1UMT/xoOKJssBGrXfzoGE0e5dBH2xwu05wbOgoXcU 3A6q0PK0uJfmpeLX/UWf+rxL6Mm2gIZkPvFNwyHc= Message-ID: <6ec4a310-884e-4004-b56f-1810f028e355@apertussolutions.com> Date: Mon, 23 Feb 2026 13:49:30 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xsm: move the console read properly under xsm Content-Language: en-US To: Jan Beulich Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260219184503.21918-1-dpsmith@apertussolutions.com> <43a90b6f-683d-48e3-b7cc-4b8c6dae087c@suse.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <43a90b6f-683d-48e3-b7cc-4b8c6dae087c@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/23/26 10:22, Jan Beulich wrote: > On 19.02.2026 19:45, Daniel P. Smith wrote: >> --- a/xen/drivers/char/console.c >> +++ b/xen/drivers/char/console.c >> @@ -554,7 +554,7 @@ struct domain *console_get_domain(void) >> if ( !d ) >> return NULL; >> >> - if ( d->console->input_allowed ) >> + if ( !xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >> return d; >> >> rcu_unlock_domain(d); >> @@ -595,7 +595,7 @@ static void console_switch_input(void) >> d = rcu_lock_domain_by_id(domid); >> if ( d ) >> { >> - if ( !d->console->input_allowed ) >> + if ( xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >> { >> rcu_unlock_domain(d); >> continue; > > At least the latter of these two can be called from an IRQ handler, and can > be called with IRQs off. Flask's avc_audit() looks to be using a spinlock, > which isn't IRQ-safe. (There may be other lock involved; I merely went as far > as I needed to to find the first one.) IOW I fear you can't call > xsm_console_io() from here. Apologies that I didn't consider the IRQ context. With that said, we can't be wiring non-XSM access control paths that circumvent FLASK's ability to control domain access to a resource. v/r, dps From xen-devel-bounces@lists.xenproject.org Mon Feb 23 18:51:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 18:51:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239324.1540757 (Exim 4.92) (envelope-from ) id 1vub1I-0003Ax-Ht; Mon, 23 Feb 2026 18:51:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239324.1540757; Mon, 23 Feb 2026 18:51:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vub1I-0003Aq-Ds; Mon, 23 Feb 2026 18:51:00 +0000 Received: by outflank-mailman (input) for mailman id 1239324; Mon, 23 Feb 2026 18:50:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vub1H-0003Ah-6x for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 18:50:59 +0000 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [2a00:1450:4864:20::342]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 96603993-10e8-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 19:50:56 +0100 (CET) Received: by mail-wm1-x342.google.com with SMTP id 5b1f17b1804b1-483abed83b6so14918335e9.0 for ; Mon, 23 Feb 2026 10:50:56 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a31b3e0dsm437506635e9.1.2026.02.23.10.50.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Feb 2026 10:50:55 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 96603993-10e8-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771872656; x=1772477456; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=HBMCNSa4a+AReIUFX7/nPT/pd9bL8KLMQ3ahjP9iaXY=; b=ZSWr8bf3ri5vbzrfni0Vx4QZ2OJYFW6coBdf8TTM4mgK6robonPpcrLQ01njC9F5bO 2IhI2DAGxsCvauFPgqAKoKvsNR6x8Ht1XD9D1EwKokAC+2I31Gx92SsuV/+wmm66PA49 4hxE4/XziekCeK0WKxfYhHIbnDkzk+01NJX3A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771872656; x=1772477456; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=HBMCNSa4a+AReIUFX7/nPT/pd9bL8KLMQ3ahjP9iaXY=; b=foEL9fatO8ldDQjEVKoFFc7wOCzqMhiumpYXJtymUZ5BUp/k4vXMAngLWmKhQgV7TF prfkLwbGL9rERnjNl3Ij2AW5XBhkU2oLY83EVnpF3p80+k3CJZ6qKU7LlQJmdTBm5M8+ xbY6HxZGnFFLl8jzcwFpAQDjYDPR987/lZShaVPse9FhboaHJQs8gfWjyR6Zyc3LVgg3 pTj2yrc4h4FxbFnusEYlcTRR68tfzIHZDj9Ua2r2vyyyAGoaFHDoVPtBZIPBNQutJATa JZOjJk6bL0KkO0RkI8vfk5Mu2a4lULQKIfizO+r+YxOMbmDAyhJbrEByOGV/17Vtc9zi Igpw== X-Gm-Message-State: AOJu0YzQMldfm0dCwLmn2YrdPFbzrRYAYtzrNJGTlQBQa/7MnJKH6fxL ix/rwtfZU9PfgKXuzYJngYQFUQwc7a2A2TTVcDPLOK0eAeLXj7lg6dWahaN9/49rCD+sgVGg99p nUL0q7rzg443x X-Gm-Gg: AZuq6aLyZ/ZtbuJiGBRrwyMQM33aStc8cxGsjGj0dzMeu7xDzsnsM6KdRZXChUXu/Uv jlUZ9yBff1WjTeQB4TjQb6njiqYJp66hxZRTilTobiznVrnkfwupqEU7THN3sX8FyTC56OWZyVZ VcLQ0A+sZHn2nNr8beZ8WR/hpCHrsC5u6TGOvcBDhb09bYdBfEl2OnUmqEyxisIflceuMgasl65 ZSvwzlKaq1xKViK/1P+aqAVb+yCNGMJrUewWSEOSXC5OlySAfWjqA4WxAK4cl8nrQ9PCO7y7jnu IMrMYBxapvRTECsuQK1njXixuX0P2gErTztyMKyRfKA+jcLHZssLBR6wn8WJmczUe0DKwmbSVm/ 4tDrLf2CKAjOpv8YrcmmNC5/RBILbYjQnyj36AqjbsWKRP8NmDcobDO/f88U+F05DsMRlPXXmCV iSPGQTi7+9S1SwPXCWQD3kSesqv81oRieSPfDLgffL9/HCdRWtsFy0IBPHcU9sjYngXhBZgk0= X-Received: by 2002:a05:600c:46c9:b0:483:a21:774c with SMTP id 5b1f17b1804b1-483a95eab7cmr164231635e9.25.1771872655776; Mon, 23 Feb 2026 10:50:55 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH] x86/ucode: Support discrete modules being CPIO archives Date: Mon, 23 Feb 2026 18:50:54 +0000 Message-Id: <20260223185054.3598305-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Multiple downstream distros have tried passing discrete CPIO archives and tripped over this not working. It turns out to be easy to support, so do so. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie v2: * Docs update too. * Set opt_scan in early_microcode_load() so microcode_init_cache() operates properly --- CHANGELOG.md | 1 + docs/misc/xen-command-line.pandoc | 19 ++++++++----------- xen/arch/x86/cpu/microcode/core.c | 20 +++++++++++++++++++- 3 files changed, 28 insertions(+), 12 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20d2..c191e504aba9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - Support for Bus Lock Threshold on AMD Zen5 and later CPUs, used by Xen to mitigate (by rate-limiting) the system wide impact of an HVM guest misusing atomic instructions. + - Support for CPIO microcode in discrete multiboot modules. ### Removed - On x86: diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index c1f2def9f99c..ebdca007d26b 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2764,23 +2764,20 @@ Controls for CPU microcode loading, available when `CONFIG_MICROCODE_LOADING` is enabled. In order to load microcode at boot, Xen needs to find a suitable update -amongst the modules provided by the bootloader. Two kinds of microcode update -are supported: +amongst the modules provided by the bootloader. Two formats are supported: 1. Raw microcode containers. The format of the container is CPU vendor specific. - 2. CPIO archive. This is Linux's preferred mechanism, and involves having - the raw containers expressed as files + 2. CPIO archive, which involves having the raw containers expressed as files (e.g. `kernel/x86/microcode/{GenuineIntel,AuthenticAMD}.bin`) in a CPIO - archive, typically prepended to the initrd. + archive. Linux commonly prepends this to the initrd. -The `` and `scan=` options are mutually exclusive and select -between these two options. Further restrictions exist for booting xen.efi -(see below). +The `` and `scan=` options are mutually exclusive and work as +follows. Further restrictions exist for booting xen.efi (see below). - * The `` option nominates a specific multiboot module as a raw - container (option 1 above). Valid options start from 1 (module 0 is + * The `` option nominates a specific multiboot module as containing + microcode in either format. Valid options start from 1 (module 0 is always the dom0 kernel). A negative number may be used, and will back-reference from the end of the module list. i.e. `ucode=-1` will nominate the final multiboot module. @@ -2794,7 +2791,7 @@ When booting xen.efi natively, the concept of multiboot modules doesn't exist. Instead: * In the [EFI configuration file](efi.html), `ucode=` can be used - to identify a file as a raw container (option 1 above). Use of this + to identify a file as containing microcode in either format. Use of this mechanism will disable both `` and `scan=`. * If `ucode=` in the EFI configuration file is not used, it is diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index ea0b35c4991d..9b8d1e09cb98 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -767,6 +767,7 @@ static int __init early_microcode_load(struct boot_info *bi) void *data = NULL; size_t size; const struct microcode_patch *patch; + struct cpio_data cd; int idx = opt_mod_idx; int rc; @@ -783,7 +784,6 @@ static int __init early_microcode_load(struct boot_info *bi) for ( idx = 0; idx < bi->nr_modules; ++idx ) { const struct boot_module *bm = &bi->mods[idx]; - struct cpio_data cd; /* Search anything unclaimed or likely to be a CPIO archive. */ if ( bm->kind != BOOTMOD_UNKNOWN && bm->kind != BOOTMOD_RAMDISK ) @@ -851,6 +851,24 @@ static int __init early_microcode_load(struct boot_info *bi) idx, size); return -ENODEV; } + + /* + * If this blob appears to be a CPIO archive, try interpreting it as + * one. Otherwise treat it as a raw vendor blob. + */ + cd = find_cpio_data(ucode_ops.cpio_path, data, size); + if ( cd.data ) + { + data = cd.data; + size = cd.size; + + /* + * (Ab)use opt_scan to inform microcode_init_cache() that + * early_mod_idx refers to a CPIO archive. + */ + opt_scan = true; + } + goto found; } base-commit: 5eb84d6c992cf4e81936872c441b649057947442 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 19:00:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 19:00:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239334.1540766 (Exim 4.92) (envelope-from ) id 1vubAY-0004uy-D9; Mon, 23 Feb 2026 19:00:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239334.1540766; Mon, 23 Feb 2026 19:00:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vubAY-0004ur-9t; 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Message-ID: <1d85f83d-45c9-444e-8db4-3e0962aad0a6@citrix.com> Date: Mon, 23 Feb 2026 19:00:22 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH v2 1/2] x86/cpu-policy: move CPU policy library code To: Jan Beulich References: <4bd68e41-e665-4992-9d3c-0086bb5195ef@suse.com> <7c06bd5e-fad2-42cb-947f-6749f647b068@suse.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO2P265CA0264.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:8a::36) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|IA1PR03MB8263:EE_ X-MS-Office365-Filtering-Correlation-Id: a41dfe2a-98eb-4d2b-6d07-08de730dce03 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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The functions here are different from those in > arch/x86/lib/lib.a. We don't need to fear collision with "common code" > ones. Hence I preferred to use the more "normal" placement into what's > passed to the linker. I agree that we don't have the explicit ordering requirement that we have with arch/x86/lib/lib.a. But, it still reads as bogus to be putting arch/x86/lib/cpu-policy/lib.a in the non-ARCH list. What difference is there having this a little earlier in the linker arguments?  Nothing AFAICT. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Feb 23 19:06:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 19:06:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239348.1540775 (Exim 4.92) (envelope-from ) id 1vubGD-0005Xu-33; Mon, 23 Feb 2026 19:06:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239348.1540775; Mon, 23 Feb 2026 19:06:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vubGD-0005Xn-0J; Mon, 23 Feb 2026 19:06:25 +0000 Received: by outflank-mailman (input) for mailman id 1239348; Mon, 23 Feb 2026 19:06:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vubGB-0005Xh-9w for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 19:06:23 +0000 Received: from sender4-of-o51.zoho.com (sender4-of-o51.zoho.com [136.143.188.51]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bc18753b-10ea-11f1-9ccf-f158ae23cfc8; Mon, 23 Feb 2026 20:06:20 +0100 (CET) Received: by mx.zohomail.com with SMTPS id 1771873570518818.0693383257893; Mon, 23 Feb 2026 11:06:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bc18753b-10ea-11f1-9ccf-f158ae23cfc8 ARC-Seal: i=1; a=rsa-sha256; t=1771873572; cv=none; d=zohomail.com; s=zohoarc; b=E2rqNKuo9tSP8cf2aF7BPj2m7f4i+KdP+rTrc+mWxAO/PD1hKDOB1tLbS4EUjK7CTBqApIrMS8f4MVmsg/Kh9Q+RW8AKDuUIZ9zvwM1tDAQmnnZQrEX+xHHSizR0+QnGnal8n7LWAqhMxX5KZUjL6ouPh2w+LNTp+lzJQ697G4o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771873572; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=k8MYDNYCfZAeLkeED8Y20w4FpWY+mPctCe9JrfHHJ+g=; b=crb2tdft9QOUaiqmcvjePInv2Am7h+MGaFWCF9qvP17puWEFkmq1VITLBtGEv8BQnmgGBEHJc/fwIQfbApwzWeYv0iPDI3tCJaRx3kug/o4hK/doHdJ2mnO2M0PuN8JQdtRjBI4G0CTRftOyCMCDckojygGgs1ejCbDYogL5KVY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771873572; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=k8MYDNYCfZAeLkeED8Y20w4FpWY+mPctCe9JrfHHJ+g=; b=Au61OqPphyVLUF7NrdwYvRKtQL8c+G6GfnxUUOrGZeGiuuOg6TBpfMBsgiak7oMw JBrbhjtOwJ6rmgnX85br3DYNSUBMzhrpyB68lwC3igkXOANYTRVRP97dMjwbwsL1aWY lVF6VlLp0DA+Ud9hT05EWJcal1D0QcPil2lDWbi8= Message-ID: <4dfa33e9-e80b-4660-b5ae-bcb11517d506@apertussolutions.com> Date: Mon, 23 Feb 2026 14:06:08 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG v2] common/domctl: xsm update for get_domain_state access Content-Language: en-US To: Jason Andryuk , xen-devel@lists.xenproject.org Cc: Chris Rogers , Dmytro Firsov , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20260218190855.7272-1-dpsmith@apertussolutions.com> <1b0a2f66-e03d-4428-a9c0-f26f84e7f348@amd.com> <082425f5-2d05-4db5-b2a5-d8a621302f9b@amd.com> From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <082425f5-2d05-4db5-b2a5-d8a621302f9b@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ZohoMailClient: External On 2/23/26 13:01, Jason Andryuk wrote: > On 2026-02-19 07:15, Daniel P. Smith wrote: >> On 2/18/26 18:04, Jason Andryuk wrote: > >>>> diff --git a/xen/common/domctl.c b/xen/common/domctl.c >>>> index 29a7726d32d0..2eedc639c72a 100644 >>>> --- a/xen/common/domctl.c >>>> +++ b/xen/common/domctl.c >>>> @@ -860,12 +860,9 @@ long >>>> do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) >>>>           break; >>>>       case XEN_DOMCTL_get_domain_state: >>>> -        ret = xsm_get_domain_state(XSM_XS_PRIV, d); >>> >>> With the initial NULL deref issue, I wondered if this wouldn't be >>> better off modified to drop the d param - >>> xsm_get_domain_state(XSM_XS_PRIV) - and changing flask permissions like: >>> allow dom0_t xen_t:xen get_domain_state; >>> >>> That would gate the external call, and individual domain permissions >>> could be checked with xsm_getdomaininfo(), or a new hook if you don't >>> want to re-use. >>> >>> But as your approach avoids passing NULL, it seems okay to me.  It >>> also doesn't change the flask policy, which is nice. >> >> That's a plain nack from me. Whether it is viewed as a pipe dream or >> not, my goal continues to be to work towards enabling the ability to >> have a truly disaggregated platform. In the original architecture, it >> was envisioned to have multiple toolstack domains, each responsible >> for a distinct set of domains. In terms of implementation, that would >> mean multiple xenstored instances, each with a purview over a subset >> of domains. > > I don't think what I wrote is at odds with your pipe dream. > > My main concern is passing NULL as a domain.  I think that is wrong, > beyond the fault seen on ARM.  In domain_target_sid(), I think the NULL > dst was mistakenly matched to dom0's NULL src->target.  src->target_sid > is 0 from zalloc, which is not otherwise initialized and invalid.  That > is returned.  Later when sidtab_search() can't find it, it is remapped > to SECINITSID_UNLABELED and returned.  That silent remapping is dubious, > and it points toward unlabled_t should never be allowed in any rule. > Maybe it should remap unknown sids to a dedicated invalid_t, but maybe > invalid_t is already supposed to be that? Understand, which in my initial approach I considered instead of setting the d to NULL for DOMID_INVALID, I was considered changing it to dom_xen. This effectively says you must have permission to wildcard query xen for domain states. I opted not to include it as I was able to rework it so that NULL was never used for xsm_get_domain_state(). Your last statement is correct, unlabeled_t literally means it is an unknown object. Therefore, writing any rules for unlabeled_t is dubious at a minimum, but more likely an invalid security statements. The suggestion to write the rule was not meant to be the solution, it was just a means to help allow people to boot their systems for the time being. v/r, dps From xen-devel-bounces@lists.xenproject.org Mon Feb 23 20:41:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 20:41:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239364.1540785 (Exim 4.92) (envelope-from ) id 1vucjh-0000nw-Dx; Mon, 23 Feb 2026 20:40:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239364.1540785; Mon, 23 Feb 2026 20:40:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vucjh-0000np-BQ; Mon, 23 Feb 2026 20:40:57 +0000 Received: by outflank-mailman (input) for mailman id 1239364; Mon, 23 Feb 2026 19:56:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuc2T-0003eB-Il for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 19:56:18 +0000 Received: from mail-4323.protonmail.ch (mail-4323.protonmail.ch [185.70.43.23]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b4b2b1e3-10f1-11f1-b164-2bf370ae4941; Mon, 23 Feb 2026 20:56:13 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b4b2b1e3-10f1-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux-mail.net; s=protonmail; t=1771876572; x=1772135772; bh=FC1oBOhuZpUKRYw5lx0dBf68onwW79KH3ApPc2koKCI=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=Zyyw9Kg5CFJ0af86va6+BcEVFZSXG6UvzTTKPOrW8JOIog+azGfiCBkl6IHQLApgg mi/WqF78jhHDOCYy9xd6Yz4m5+kK9RA3L70bu0hMfeb72i2S7XjnB7adJ3jV8pF141 6wT3iQ0aG6EZiesL6nx0iWTfQeP3seFpptnSJBO2Vk7fjwO0Rd7jB4RJVQxJsscZ5C gknfH26jLVXSB1ZlkZd+VfzLWSuCJ+pHdORd33hhw+p3nwwwomrLqqIEQAJvCxU83q KPniOChXjpfJhE7iz53s/icndqW90Ubc0o6c3qvD65x/3t2WhxsE4Az3g/JXVZMS8q X17DiYxypc/tA== Date: Mon, 23 Feb 2026 19:56:07 +0000 To: jgross@suse.com From: David Thomson Cc: boris.ostrovsky@oracle.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, David Thomson Subject: [PATCH] xen/acpi-processor: fix _CST detection using undersized evaluation buffer Message-ID: <20260223195602.17122-1-dt@linux-mail.net> Feedback-ID: 176297775:user:proton X-Pm-Message-ID: daf5c815bc2d790a7f192f23fabc62b9ff00444f MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable read_acpi_id() attempts to evaluate _CST using a stack buffer of sizeof(union acpi_object) (48 bytes), but _CST returns a nested Package of sub-Packages (one per C-state, each containing a register descriptor, type, latency, and power) requiring hundreds of bytes. The evaluation always fails with AE_BUFFER_OVERFLOW. On modern systems using FFH/MWAIT entry (where pblk is zero), this causes the function to return before setting the acpi_id_cst_present bit. In check_acpi_ids(), flags.power is then zero for all Phase 2 CPUs (physical CPUs beyond dom0's vCPU count), so push_cxx_to_hypervisor() is never called for them. On a system with dom0_max_vcpus=3D2 and 8 physical CPUs, only PCPUs 0-1 receive C-state data. PCPUs 2-7 are stuck in C0/C1 idle, unable to enter C2/C3. This costs measurable wall power (4W observed on an Intel Core Ultra 7 265K with Xen 4.20). The function never uses the _CST return value -- it only needs to know whether _CST exists. Replace the broken acpi_evaluate_object() call with acpi_has_method(), which correctly detects _CST presence using acpi_get_handle() without any buffer allocation. This brings C-state detection to parity with the P-state path, which already works correctly for Phase 2 CPUs. Fixes: 59a568029181 ("xen/acpi-processor: C and P-state driver that uploads= said data to hypervisor.") Signed-off-by: David Thomson --- drivers/xen/xen-acpi-processor.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-proces= sor.c index 2967039..67a4afc 100644 --- a/drivers/xen/xen-acpi-processor.c +++ b/drivers/xen/xen-acpi-processor.c @@ -379,11 +379,8 @@ read_acpi_id(acpi_handle handle, u32 lvl, void *contex= t, void **rv) =09=09=09 acpi_psd[acpi_id].domain); =09} =20 -=09status =3D acpi_evaluate_object(handle, "_CST", NULL, &buffer); -=09if (ACPI_FAILURE(status)) { -=09=09if (!pblk) -=09=09=09return AE_OK; -=09} +=09if (!acpi_has_method(handle, "_CST") && !pblk) +=09=09return AE_OK; =09/* .. and it has a C-state */ =09__set_bit(acpi_id, acpi_id_cst_present); =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Mon Feb 23 23:21:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 23 Feb 2026 23:21:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239385.1540796 (Exim 4.92) (envelope-from ) id 1vufEd-0002Uf-W4; Mon, 23 Feb 2026 23:21:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239385.1540796; Mon, 23 Feb 2026 23:21:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vufEd-0002UY-T2; Mon, 23 Feb 2026 23:21:03 +0000 Received: by outflank-mailman (input) for mailman id 1239385; Mon, 23 Feb 2026 23:21:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vufEc-0002US-0C for xen-devel@lists.xenproject.org; Mon, 23 Feb 2026 23:21:02 +0000 Received: from mail-106116.protonmail.ch (mail-106116.protonmail.ch [79.135.106.116]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4e7663a1-110e-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 00:20:57 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e7663a1-110e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux-mail.net; s=protonmail; t=1771888855; x=1772148055; bh=zZ6o690imIyQK5YKLNY2mgRufwrVGddSMQy0XRCV9pE=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=IbFxcHeFf++gjrGsoyN/jsH0tyk5Q5uJZ8fDuAHYLGTvfxX/cqaQBimWeYBmAS3ff h1Y2YMZ/4SoKCYvqhkDfWZVUzExLrCvvbZskUhIdRPj11qSu8Uj9L5lVcb7nOBp051 x5SIaKY/7aRAQxZaGbImG4j4XA9fGUEstmNpmYCG0y8LAFelBswvGUt62H2taKumV+ aQ1jVOtZmGdYSpLxqeGwoxYK1Y9QVPzm/YfuG8cqZ4q7/qL73q1/Tg3EJK8qW9bnLz iVfOknEXXm3geJt5kETdimcG80lbVA5QYghtDl9nwat4HY0cTp5YJJ9TVQ34ueBpLO d6W1tQI+ABl8Q== Date: Mon, 23 Feb 2026 23:20:49 +0000 To: Elliott Mitchell From: "David Thomson (dt@linux.com)" Cc: "jgross@suse.com" , "boris.ostrovsky@oracle.com" , "sstabellini@kernel.org" , "xen-devel@lists.xenproject.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] xen/acpi-processor: fix _CST detection using undersized evaluation buffer Message-ID: In-Reply-To: References: <20260223195602.17122-1-dt@linux-mail.net> Feedback-ID: 176297775:user:proton X-Pm-Message-ID: 5e1005990ce03e26f257d4135ee4089fd8b48255 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable > I had reported this a while ago. My workaround had been to allow > domain 0 to have maximum vCPUs, then offline most of them. Very > suboptimal, but did drop power use/heat generation. >=20 > My next testing opportunity is likely to be in anywhere from 1 week to > 2 months. I'll be testing then, though the patch may already have gotten > in. Thanks for confirming. Your max-vCPUs workaround makes sense and forces Pha= se 1 to cover all PCPUs. Let me know how testing goes. DT From xen-devel-bounces@lists.xenproject.org Tue Feb 24 02:56:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 02:56:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239398.1540806 (Exim 4.92) (envelope-from ) id 1vuibL-0001gR-9i; Tue, 24 Feb 2026 02:56:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239398.1540806; Tue, 24 Feb 2026 02:56:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuibL-0001gJ-4b; Tue, 24 Feb 2026 02:56:43 +0000 Received: by outflank-mailman (input) for mailman id 1239398; Tue, 24 Feb 2026 02:56:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuibI-0001gD-Ow for xen-devel@lists.xenproject.org; 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In particular, memory decoding might be disabled and the BARs might be zeroed. In this case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() unconditionally attempts to punch holes in p2m, leading to init_msix() failing: (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it vpci_make_msix_hole() should only attempt to punch holes if the BARs containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper for checking if a BAR is enabled, and add a check for the situation inside vpci_make_msix_hole(). Move the vpci_make_msix_hole() call within modify_decoding() to after setting ->enabled. Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") Signed-off-by: Stewart Hildebrand --- Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2344925375 v1->v2: * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") * move BAR enabled check to inside vpci_make_msix_hole() * introduce vmsix_table_bar_valid() helper * move vpci_make_msix_hole() call within modify_decoding() to after setting ->enabled * split typo fixup to separate patch v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t --- xen/drivers/vpci/header.c | 26 +++++++++++++------------- xen/drivers/vpci/msix.c | 4 ++++ xen/include/xen/vpci.h | 6 ++++++ 3 files changed, 23 insertions(+), 13 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 739a5f610e91..6a28e07a625b 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, bool map = cmd & PCI_COMMAND_MEMORY; unsigned int i; - /* - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses - * can be trapped (and emulated) by Xen when the memory decoding bit is - * enabled. - * - * FIXME: punching holes after the p2m has been set up might be racy for - * DomU usage, needs to be revisited. - */ -#ifdef CONFIG_HAS_PCI_MSI - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) - return; -#endif - for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) { struct vpci_bar *bar = &header->bars[i]; @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, bar->enabled = map; } + /* + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses + * can be trapped (and emulated) by Xen when the memory decoding bit is + * enabled. + * + * FIXME: punching holes after the p2m has been set up might be racy for + * DomU usage, needs to be revisited. + */ +#ifdef CONFIG_HAS_PCI_MSI + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) + return; +#endif + if ( !rom_only ) { pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 516282205a53..142cfbae59d5 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -598,6 +598,10 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) if ( !pdev->vpci->msix ) return 0; + if ( !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_TABLE) && + !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_PBA) ) + return 0; + /* Make sure there's a hole for the MSIX table/PBA in the p2m. */ for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ ) { diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index d6310104ea17..8ce730791080 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -267,6 +267,12 @@ static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); } +static inline bool vmsix_table_bar_valid(const struct vpci *vpci, + unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].enabled; +} + /* * Note regarding the size calculation of the PBA: the spec mentions "The last * QWORD will not necessarily be fully populated", so it implies that the PBA base-commit: 5eb84d6c992cf4e81936872c441b649057947442 -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 03:05:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 03:05:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239410.1540816 (Exim 4.92) (envelope-from ) id 1vuijp-0003Q9-5n; Tue, 24 Feb 2026 03:05:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239410.1540816; Tue, 24 Feb 2026 03:05:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuijp-0003Q2-1e; Tue, 24 Feb 2026 03:05:29 +0000 Received: by outflank-mailman (input) for mailman id 1239410; Tue, 24 Feb 2026 03:05:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuijo-0003Pw-DR for xen-devel@lists.xenproject.org; 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Crave a hole for + * p2m, as MSI-X capability was not yet initialized. Carve a hole for * the MSI-X table here, so that Xen can trap accesses. */ return vpci_make_msix_hole(pdev); base-commit: 5eb84d6c992cf4e81936872c441b649057947442 -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 06:25:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 06:25:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239396.1540826 (Exim 4.92) (envelope-from ) id 1vulqp-00024O-Jb; Tue, 24 Feb 2026 06:24:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239396.1540826; Tue, 24 Feb 2026 06:24:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vulqp-00024H-GQ; Tue, 24 Feb 2026 06:24:55 +0000 Received: by outflank-mailman (input) for mailman id 1239396; Tue, 24 Feb 2026 02:25:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vui7M-0006iV-8m for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 02:25:46 +0000 Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 141169ef-1128-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 03:25:28 +0100 (CET) Received: from localhost.localdomain ( [116.172.93.199]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 24 Feb 2026 10:24:26 +0800 (CST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 141169ef-1128-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=smail.nju.edu.cn; s=iohv2404; t=1771899877; bh=Z3Aj/5gqJxLV2xf46st4IBcHNWPExSd6g2RATw3la0o=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=RgBTbs9BpmSAGN8TybkiyoGDfzh3Q8tELoowkRyGcvcYcWIrzH6ycxQnE9vD/s0M7 vay3q+HcqllDlUV9+PzCA3LjMwwp9vPsi7C2xWtURadrkWY5rKG4Q6M7b34/QAJWwy X5BiDgc1bNWegk7oJKedWNSiaMrU3fbaUrGvY2hY= X-QQ-mid: esmtpgz11t1771899869tfe798ebb X-QQ-Originating-IP: FIapmEkRFnkqJa29yYNc8kyNQ9O0np8tOiJdKBZzaXM= X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 9509144588414941481 EX-QQ-RecipientCnt: 15 From: kexinsun To: jgross@suse.com Cc: boris.ostrovsky@oracle.com, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, julia.lawall@inria.fr, xutong.ma@inria.fr, yunbolyu@smu.edu.sg, ratnadiraw@smu.edu.sg, kexinsun@smail.nju.edu.cn Subject: [PATCH] x86/xen: update outdated comment Date: Tue, 24 Feb 2026 10:24:24 +0800 Message-Id: <20260224022424.1718-1-kexinsun@smail.nju.edu.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: esmtpgz:smail.nju.edu.cn:qybglogicsvrgz:qybglogicsvrgz5b-0 X-QQ-XMAILINFO: MQYXLRAkMyaewPsgnE4c4ZNd2McHPQcyK+76J1vlzjHT6FuGa/DmEy/H 2RQ0bQm/nF9UpvWi5xKSijJ2Em/sfEBLtQ8DaNQi14DnU7oQuLcoMuC79A5/LeeQdNOkVzl c4gwKSkWW5iXArv3JoMK1iZr2B+8LZDy+iAykyDrDq5g3HMGRlwdBqdP8jts4Fr5yen2q/u 83fo5c2igw3XTKes4ba/a4ILje1hCh98Fj9JH/VdjOInsS0t3Hp5pliXB/0Vhx6R/YYGh7X 41UttrcbzeQ8WuAZQgWVJk3QFVV9gnnYqcqsOdfxRgnrZxUGgEIRym0xlxF5Zy47ixVbOEO NFsP7EAuYextENmkxzszM6wA8FQSG3Tcn4fCpXyVA8dVvCa8I2G4dQEGU/0qnA0GQykARzk 5SYctJUWPLaY/jZb3hINK/TPjfLiywzgoOUp0sbX/M0INuRwzhrapbadjsL+Hf95FkOBCnM VtDe5TBLhzFKir2BKz+05SPqzX4IFXBM5RIsfp/9OvKT7qri9i5vk8l0Z2b6O/v4gxPTqdj FjNOYcQtSZTk60fxOm3kp2Z2+SImHReaEExvWPkkXz/m0NCVJMAYrdXVoKC1bl1qLxgv9oA hCsPccIpa8TVqBUZFyKnPWUO8vuEYvkh/X80V8PEClwBd7RluIjXx5Qwf0w2+zkrYjQbLll j6ZGGWctz7SOrKd0tGvdq5r2RfADNBAT5qFJlxAskAzD0YW4Azm2TTZC0/pfK3za4lOzaLv mE2InteGWmLsmtqSvogoc1Y0ur1ZrzuT4BW6tkW2uBN93DEjVg04Q55sqMPyPNKwoQzFwYz 6yZZaQgPsB0tqx4s3C1llWvos6TIqnUAs47kYaVvB3WQFQAtbVM341YJs9FYIcNoYiDTGmO BBar0sgIESkZqMdW9nnO+v6dkLkQPqkMEuqVglI27X88pKBUrO3W9VkkTzoPjpWTCbOwtmt RcDeTTTibgHL6ZpyBMpzVxsoHI4Irj38jkRQgC59qV7BZAcOx1G6ZpQtQPPRgGrLOjC2k0r NKt+8RLfTjfmKIqQugeqnA/bwGcP6TJQG/YvFidMhvNnnfyr28/3ZVHT6E8Iv6cY/9NayU2 S9uD5ltWsQxgPokGwZMMuLgbII1nfHBxm0S/xpNG8jAqX1Qn0XktEQs74sNxmD371J+PCN8 CSap X-QQ-XMRINFO: Mp0Kj//9VHAxzExpfF+O8yhSrljjwrznVg== X-QQ-RECHKSPAM: 0 The function xen_flush_tlb_others() was renamed xen_flush_tlb_multi() by commit 4ce94eabac16 ("x86/mm/tlb: Flush remote and local TLBs concurrently"). Update the comment accordingly. Signed-off-by: kexinsun --- arch/x86/xen/enlighten_pv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 6e459e47cafd..eaad22b47206 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -392,7 +392,7 @@ static void __init xen_init_capabilities(void) /* * Xen PV would need some work to support PCID: CR3 handling as well - * as xen_flush_tlb_others() would need updating. + * as xen_flush_tlb_multi() would need updating. */ setup_clear_cpu_cap(X86_FEATURE_PCID); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 06:54:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 06:54:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239432.1540836 (Exim 4.92) (envelope-from ) id 1vumJX-00060Z-Py; Tue, 24 Feb 2026 06:54:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239432.1540836; Tue, 24 Feb 2026 06:54:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vumJX-00060S-Mm; Tue, 24 Feb 2026 06:54:35 +0000 Received: by outflank-mailman (input) for mailman id 1239432; Tue, 24 Feb 2026 06:54:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vumJW-000606-7n for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 06:54:34 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id abfb35b7-114d-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 07:54:32 +0100 (CET) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-43767807cf3so3830482f8f.1 for ; Mon, 23 Feb 2026 22:54:32 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 23 Feb 2026 22:54:31 -0800 (PST) Message-ID: <11c2f97e-efa8-46ea-8605-4ce6cffb9683@suse.com> Date: Tue, 24 Feb 2026 07:54:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] x86/cpu-policy: move CPU policy library code To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <4bd68e41-e665-4992-9d3c-0086bb5195ef@suse.com> <7c06bd5e-fad2-42cb-947f-6749f647b068@suse.com> <1d85f83d-45c9-444e-8db4-3e0962aad0a6@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1d85f83d-45c9-444e-8db4-3e0962aad0a6@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 20:00, Andrew Cooper wrote: > On 02/02/2026 4:26 pm, Jan Beulich wrote: >> On 02.02.2026 16:47, Andrew Cooper wrote: >>> On 07/01/2026 2:17 pm, Jan Beulich wrote: >>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk >>>> index 0203138a819a..be6c76d2934b 100644 >>>> --- a/xen/arch/x86/arch.mk >>>> +++ b/xen/arch/x86/arch.mk >>>> @@ -4,6 +4,7 @@ >>>> export XEN_IMG_OFFSET := 0x200000 >>>> >>>> ARCH_LIBS-y += arch/x86/lib/lib.a >>>> +ALL_LIBS-y += arch/x86/lib/cpu-policy/lib.a >>> This wants to extend ARCH_LIBS-y surely?  Is this a rebasing oversight? >> No, this was deliberate. The functions here are different from those in >> arch/x86/lib/lib.a. We don't need to fear collision with "common code" >> ones. Hence I preferred to use the more "normal" placement into what's >> passed to the linker. > > I agree that we don't have the explicit ordering requirement that we > have with arch/x86/lib/lib.a. > > But, it still reads as bogus to be putting arch/x86/lib/cpu-policy/lib.a > in the non-ARCH list. > > What difference is there having this a little earlier in the linker > arguments?  Nothing AFAICT. Indeed. The sole reason why I'd prefer things as presented is that putting stuff in ARCH_LIBS should imo be the special case (i.e. requiring a special reason), while putting things in ALL_LIBS should be the default. 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Smith" Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260219184503.21918-1-dpsmith@apertussolutions.com> <43a90b6f-683d-48e3-b7cc-4b8c6dae087c@suse.com> <6ec4a310-884e-4004-b56f-1810f028e355@apertussolutions.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6ec4a310-884e-4004-b56f-1810f028e355@apertussolutions.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 19:49, Daniel P. Smith wrote: > On 2/23/26 10:22, Jan Beulich wrote: >> On 19.02.2026 19:45, Daniel P. Smith wrote: >>> --- a/xen/drivers/char/console.c >>> +++ b/xen/drivers/char/console.c >>> @@ -554,7 +554,7 @@ struct domain *console_get_domain(void) >>> if ( !d ) >>> return NULL; >>> >>> - if ( d->console->input_allowed ) >>> + if ( !xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >>> return d; >>> >>> rcu_unlock_domain(d); >>> @@ -595,7 +595,7 @@ static void console_switch_input(void) >>> d = rcu_lock_domain_by_id(domid); >>> if ( d ) >>> { >>> - if ( !d->console->input_allowed ) >>> + if ( xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >>> { >>> rcu_unlock_domain(d); >>> continue; >> >> At least the latter of these two can be called from an IRQ handler, and can >> be called with IRQs off. Flask's avc_audit() looks to be using a spinlock, >> which isn't IRQ-safe. (There may be other lock involved; I merely went as far >> as I needed to to find the first one.) IOW I fear you can't call >> xsm_console_io() from here. > > Apologies that I didn't consider the IRQ context. With that said, we > can't be wiring non-XSM access control paths that circumvent FLASK's > ability to control domain access to a resource. I feel like I can interpret this last sentence in different ways. Are you suggesting that this effort needs to be dropped, and the situation needs leaving as is? If so, aren't there options to move at least a little closer to what is wanted? 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Mon, 23 Feb 2026 23:28:08 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 08:28:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/acpi-processor: fix _CST detection using undersized evaluation buffer To: David Thomson Cc: boris.ostrovsky@oracle.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, jgross@suse.com References: <20260223195602.17122-1-dt@linux-mail.net> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260223195602.17122-1-dt@linux-mail.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 20:56, David Thomson wrote: > read_acpi_id() attempts to evaluate _CST using a stack buffer of > sizeof(union acpi_object) (48 bytes), but _CST returns a nested Package > of sub-Packages (one per C-state, each containing a register descriptor, > type, latency, and power) requiring hundreds of bytes. The evaluation > always fails with AE_BUFFER_OVERFLOW. > > On modern systems using FFH/MWAIT entry (where pblk is zero), this > causes the function to return before setting the acpi_id_cst_present > bit. In check_acpi_ids(), flags.power is then zero for all Phase 2 CPUs > (physical CPUs beyond dom0's vCPU count), so push_cxx_to_hypervisor() is > never called for them. > > On a system with dom0_max_vcpus=2 and 8 physical CPUs, only PCPUs 0-1 > receive C-state data. PCPUs 2-7 are stuck in C0/C1 idle, unable to > enter C2/C3. This costs measurable wall power (4W observed on an Intel > Core Ultra 7 265K with Xen 4.20). > > The function never uses the _CST return value -- it only needs to know > whether _CST exists. Replace the broken acpi_evaluate_object() call with > acpi_has_method(), which correctly detects _CST presence using > acpi_get_handle() without any buffer allocation. This brings C-state > detection to parity with the P-state path, which already works correctly > for Phase 2 CPUs. > > Fixes: 59a568029181 ("xen/acpi-processor: C and P-state driver that uploads said data to hypervisor.") > Signed-off-by: David Thomson > --- > drivers/xen/xen-acpi-processor.c | 7 ++----- > 1 file changed, 2 insertions(+), 5 deletions(-) > > diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c > index 2967039..67a4afc 100644 > --- a/drivers/xen/xen-acpi-processor.c > +++ b/drivers/xen/xen-acpi-processor.c > @@ -379,11 +379,8 @@ read_acpi_id(acpi_handle handle, u32 lvl, void *context, void **rv) > acpi_psd[acpi_id].domain); > } > > - status = acpi_evaluate_object(handle, "_CST", NULL, &buffer); > - if (ACPI_FAILURE(status)) { > - if (!pblk) > - return AE_OK; > - } > + if (!acpi_has_method(handle, "_CST") && !pblk) > + return AE_OK; I understand you reflect original behavior in this regard, but why involve any ACPI function here at all when pblk is non-zero? I.e. why not swap the operands of && ? Object evaluation could have wanted side effects (in which case, however, some different change would be needed here), but checking for method presence surely hasn't. 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Mon, 23 Feb 2026 23:34:13 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 08:34:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] vpci/msix: check for BARs enabled in vpci_make_msix_hole To: Stewart Hildebrand Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260224025626.26909-1-stewart.hildebrand@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260224025626.26909-1-stewart.hildebrand@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 03:56, Stewart Hildebrand wrote: > A hotplugged PCI device may be added uninitialized. In particular, > memory decoding might be disabled and the BARs might be zeroed. In this > case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() > unconditionally attempts to punch holes in p2m, leading to init_msix() > failing: > > (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area > (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it > > vpci_make_msix_hole() should only attempt to punch holes if the BARs > containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper > for checking if a BAR is enabled, and add a check for the situation > inside vpci_make_msix_hole(). > > Move the vpci_make_msix_hole() call within modify_decoding() to after > setting ->enabled. > > Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") > Signed-off-by: Stewart Hildebrand > --- > Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2344925375 > > v1->v2: > * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") > * move BAR enabled check to inside vpci_make_msix_hole() > * introduce vmsix_table_bar_valid() helper > * move vpci_make_msix_hole() call within modify_decoding() to after > setting ->enabled > * split typo fixup to separate patch > > v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t > --- > xen/drivers/vpci/header.c | 26 +++++++++++++------------- > xen/drivers/vpci/msix.c | 4 ++++ > xen/include/xen/vpci.h | 6 ++++++ > 3 files changed, 23 insertions(+), 13 deletions(-) > > diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c > index 739a5f610e91..6a28e07a625b 100644 > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, > bool map = cmd & PCI_COMMAND_MEMORY; > unsigned int i; > > - /* > - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses > - * can be trapped (and emulated) by Xen when the memory decoding bit is > - * enabled. > - * > - * FIXME: punching holes after the p2m has been set up might be racy for > - * DomU usage, needs to be revisited. > - */ > -#ifdef CONFIG_HAS_PCI_MSI > - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) > - return; > -#endif > - > for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) > { > struct vpci_bar *bar = &header->bars[i]; > @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, > bar->enabled = map; > } > > + /* > + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses > + * can be trapped (and emulated) by Xen when the memory decoding bit is > + * enabled. > + * > + * FIXME: punching holes after the p2m has been set up might be racy for > + * DomU usage, needs to be revisited. > + */ > +#ifdef CONFIG_HAS_PCI_MSI > + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) > + return; > +#endif > + > if ( !rom_only ) > { > pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); > diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c > index 516282205a53..142cfbae59d5 100644 > --- a/xen/drivers/vpci/msix.c > +++ b/xen/drivers/vpci/msix.c > @@ -598,6 +598,10 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) > if ( !pdev->vpci->msix ) > return 0; > > + if ( !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_TABLE) && > + !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_PBA) ) > + return 0; What if one is enabled and the other isn't? Doesn't the check need to move ... > /* Make sure there's a hole for the MSIX table/PBA in the p2m. */ > for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ ) > { ... into the loop, and then apparently also need mirroring in the hwdom-only loop further down? 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Mon, 23 Feb 2026 23:38:21 -0800 (PST) Message-ID: <01807a5b-089b-4c79-a38a-529b7707587b@suse.com> Date: Tue, 24 Feb 2026 08:38:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/ucode: Support discrete modules being CPIO archives To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Xen-devel References: <20260223185054.3598305-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260223185054.3598305-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 19:50, Andrew Cooper wrote: > Multiple downstream distros have tried passing discrete CPIO archives and > tripped over this not working. It turns out to be easy to support, so do so. > > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue Feb 24 08:01:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 08:01:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239488.1540886 (Exim 4.92) (envelope-from ) id 1vunLm-0001AI-Du; Tue, 24 Feb 2026 08:00:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239488.1540886; Tue, 24 Feb 2026 08:00:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vunLm-0001AB-AD; Tue, 24 Feb 2026 08:00:58 +0000 Received: by outflank-mailman (input) for mailman id 1239488; Tue, 24 Feb 2026 08:00:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vunLk-0001A5-Ra for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 08:00:56 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f1f2d133-1156-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 09:00:55 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4836f4cbe0bso38910095e9.3 for ; Tue, 24 Feb 2026 00:00:55 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 18:08, Andrew Cooper wrote: > --- a/xen/arch/x86/x86_emulate/0f01.c > +++ b/xen/arch/x86/x86_emulate/0f01.c > @@ -192,18 +192,21 @@ int x86emul_0f01(struct x86_emulate_state *s, > if ( (rc = ops->read_segment(x86_seg_gs, &sreg, > ctxt)) != X86EMUL_OKAY || > (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, > - ctxt)) != X86EMUL_OKAY || > - (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, > - ctxt, false)) != X86EMUL_OKAY ) > + ctxt)) != X86EMUL_OKAY ) > goto done; > - sreg.base = msr_val; > - if ( (rc = ops->write_segment(x86_seg_gs, &sreg, > - ctxt)) != X86EMUL_OKAY ) > + if ( (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, > + ctxt, false)) != X86EMUL_OKAY || > + (sreg.base = msr_val, > + (rc = ops->write_segment(x86_seg_gs, &sreg, > + ctxt)) != X86EMUL_OKAY) ) > { > - /* Best effort unwind (i.e. no real error checking). */ > - if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, > - ctxt, false) == X86EMUL_EXCEPTION ) > - x86_emul_reset_event(ctxt); I don't think this can be dropped. If (for whatever reason) ->write_msr() failed with X86EMUL_EXCEPTION, it would have recorded an exception. x86_emul_hw_exception() unconditionally checks there's none. Of course ... > + /* > + * In real hardware, access to the registers cannot fail. It is > + * an error in Xen if the writes fail given that both MSRs have > + * equivalent checks. > + */ > + ASSERT_UNREACHABLE(); ... this and the ASSERT() there will both be present / absent at the same time, so in both release and debug builds the wanted effect is achieved, yet I think we'd set a bad precedent if we didn't x86_emul_reset_event() here first. (Also, technically it ought to be legitimate to convert any individual assertion to BUG_ON(), without strong need to look at any other assertions.) Alternatively ... > + generate_exception(X86_EXC_DF); ... we may want to consider to relax the ASSERT() there, e.g. to always permit #DF to override what's already there (if not already #DF). I also think we'd better explicitly specify an error code (of 0) here. mkec() copes with the form above, yes, but afaics we never actually leverage this actively. Iirc it was merely meant to act as a safety net. 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Tue, 24 Feb 2026 00:07:47 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 09:07:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 17:18, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -2,9 +2,39 @@ > > #include > #include > +#include > #include > #include > > +#include > +#include > + > +struct csr_masks { > + register_t hedeleg; > + register_t henvcfg; > + register_t hideleg; > + register_t hstateen0; > +}; > + > +static struct csr_masks __ro_after_init csr_masks; > + > +void __init init_csr_masks(void) > +{ > +#define INIT_CSR_MASK(csr, field) do { \ > + register_t old; \ > + old = csr_read(CSR_##csr); \ Can't this be the initializer of the variable? Can't ... > + csr_set(CSR_##csr, ULONG_MAX); \ ... csr_swap() be used here, too? > + csr_masks.field = csr_swap(CSR_##csr, old); \ > +} while (0) This whole macro body would also better be indented by one level, to not leave in particular this closing brace as a misleading one. Happy to make adjustments while committing, provided you agree. With the adjustments (or clarification why any of them shouldn't be done): Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 08:09:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 08:09:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239508.1540906 (Exim 4.92) (envelope-from ) id 1vunTZ-0002Uy-F9; Tue, 24 Feb 2026 08:09:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239508.1540906; Tue, 24 Feb 2026 08:09:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vunTZ-0002Ur-Bo; Tue, 24 Feb 2026 08:09:01 +0000 Received: by outflank-mailman (input) for mailman id 1239508; Tue, 24 Feb 2026 08:09:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vunTY-0002Ud-8f for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 08:09:00 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 126b9394-1158-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 09:08:59 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-483a2338616so33099645e9.0 for ; Tue, 24 Feb 2026 00:08:59 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 00:08:58 -0800 (PST) Message-ID: <153082ae-4bf6-441b-8222-09aee302db87@suse.com> Date: Tue, 24 Feb 2026 09:08:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 02/14] xen/riscv: implement vcpu_csr_init() To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3d301ac4ca901f0aa471d6c4234301a0199fe5f7.1771590794.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3d301ac4ca901f0aa471d6c4234301a0199fe5f7.1771590794.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.02.2026 17:18, Oleksii Kurochko wrote: > Introduce vcpu_csr_init() to initialise hypervisor CSRs that control > vCPU execution and virtualization behaviour before the vCPU is first > scheduled. > The function configures trap and interrupt delegation to VS-mode by > setting the appropriate bits in the hedeleg and hideleg registers, > initializes hstatus so that execution enters VS-mode when control is > passed to the guest, and restricts guest access to hardware performance > counters by initializing hcounteren, as unrestricted access would > require additional handling in Xen. > When the Smstateen and SSAIA extensions are available, access to AIA > CSRs and IMSIC guest interrupt files is enabled by setting the > corresponding bits in hstateen0, avoiding unnecessary traps into Xen > (note that SVSLCT(Supervisor Virtual Select) name is used intead of > CSRIND as OpenSBI uses such name and riscv_encoding.h is mostly based > on it). > If the Svpbmt extension is supported, the PBMTE bit is set in > henvcfg to allow its use for VS-stage address translation. Guest > access to the ENVCFG CSR is also enabled by setting ENVCFG bit in > hstateen0, as a guest may need to control certain characteristics of > the U-mode (VU-mode when V=1) execution environment. > > For CSRs that may contain read-only bits (e.g. hedeleg, hideleg, > hstateen0), to the written value a correspondent mask is applied to > avoid divergence between the software state and the actual CSR > contents. > > As hstatus is not part of struct arch_vcpu (it already resides in > struct cpu_user_regs), introduce vcpu_guest_cpu_user_regs() to provide > a uniform way to access hstatus and other guest CPU user registers. > > This establishes a consistent and well-defined initial CSR state for > vCPUs prior to their first context switch. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue Feb 24 08:27:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 08:27:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239519.1540915 (Exim 4.92) (envelope-from ) id 1vunlQ-0005Pr-Q0; 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Thanks, Roger. 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The functions here are different from those in > >> arch/x86/lib/lib.a. We don't need to fear collision with "common code" > >> ones. Hence I preferred to use the more "normal" placement into what's > >> passed to the linker. > > > > I agree that we don't have the explicit ordering requirement that we > > have with arch/x86/lib/lib.a. > > > > But, it still reads as bogus to be putting arch/x86/lib/cpu-policy/lib.a > > in the non-ARCH list. > > > > What difference is there having this a little earlier in the linker > > arguments?  Nothing AFAICT. > > Indeed. The sole reason why I'd prefer things as presented is that putting > stuff in ARCH_LIBS should imo be the special case (i.e. requiring a special > reason), while putting things in ALL_LIBS should be the default. I agree with Andrew that it feels weird that arch/x86/lib/lib.a is placed in ARCH_LIBS-y and arch/x86/lib/cpu-policy/lib.a is placed in ALL_LIBS-y. If we want to do it that way it needs a comment explaining why they are placed in different list, otherwise it seems like a typo on first sight, and it's likely to confuse people in the future. Thanks, Roger. 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Tue, 24 Feb 2026 00:55:32 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 09:55:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/emul: Remove fallback path from SWAPGS To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20260223170856.3594016-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260223170856.3594016-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 18:08, Andrew Cooper wrote: > In real hardware, accesses to the registers cannot fail. The error paths are > just an artefact of the hook functions needing to return something. > > The best effort unwind is also something that doesn't exist in real hardware, > and complicates following the logic. > > Instead, use an ASSERT_UNREACHABLE() with a fallback of injecting #DF. > Hitting this path is an error in Xen. > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > > Tested using LKGS's extention of the test emulator for SWAPGS. > --- > xen/arch/x86/x86_emulate/0f01.c | 23 +++++++++++++---------- > 1 file changed, 13 insertions(+), 10 deletions(-) > > diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f01.c > index 6c10979dd650..760f5f865913 100644 > --- a/xen/arch/x86/x86_emulate/0f01.c > +++ b/xen/arch/x86/x86_emulate/0f01.c > @@ -192,18 +192,21 @@ int x86emul_0f01(struct x86_emulate_state *s, > if ( (rc = ops->read_segment(x86_seg_gs, &sreg, > ctxt)) != X86EMUL_OKAY || > (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, > - ctxt)) != X86EMUL_OKAY || > - (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, > - ctxt, false)) != X86EMUL_OKAY ) > + ctxt)) != X86EMUL_OKAY ) > goto done; > - sreg.base = msr_val; > - if ( (rc = ops->write_segment(x86_seg_gs, &sreg, > - ctxt)) != X86EMUL_OKAY ) > + if ( (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, > + ctxt, false)) != X86EMUL_OKAY || > + (sreg.base = msr_val, > + (rc = ops->write_segment(x86_seg_gs, &sreg, > + ctxt)) != X86EMUL_OKAY) ) > { > - /* Best effort unwind (i.e. no real error checking). */ > - if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, > - ctxt, false) == X86EMUL_EXCEPTION ) > - x86_emul_reset_event(ctxt); > + /* > + * In real hardware, access to the registers cannot fail. It is > + * an error in Xen if the writes fail given that both MSRs have > + * equivalent checks. > + */ While copying the comment to the LKGS patch, I wondered: What "both MSRs" is this talking about? Both here and for LKGS it's ->write_msr() followed by ->write_segment(). This hence might be alluding to your further plan to avoid ->write_segment() on these paths? Further, both having equivalent checks is either only a justification for the latter not failing, or only for the former not failing because it writes a value read from the other MSR. It's not quite clear to me though how to best re-word things. > + ASSERT_UNREACHABLE(); > + generate_exception(X86_EXC_DF); > goto done; While mirroring the change, it also occurred to me that this goto can be dropped, for being unreachable after generate_exception(). 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Tue, 24 Feb 2026 00:58:38 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 09:58:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] x86/cpu-policy: move CPU policy library code To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: Andrew Cooper , "xen-devel@lists.xenproject.org" References: <4bd68e41-e665-4992-9d3c-0086bb5195ef@suse.com> <7c06bd5e-fad2-42cb-947f-6749f647b068@suse.com> <1d85f83d-45c9-444e-8db4-3e0962aad0a6@citrix.com> <11c2f97e-efa8-46ea-8605-4ce6cffb9683@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 24.02.2026 09:53, Roger Pau Monné wrote: > On Tue, Feb 24, 2026 at 07:54:29AM +0100, Jan Beulich wrote: >> On 23.02.2026 20:00, Andrew Cooper wrote: >>> On 02/02/2026 4:26 pm, Jan Beulich wrote: >>>> On 02.02.2026 16:47, Andrew Cooper wrote: >>>>> On 07/01/2026 2:17 pm, Jan Beulich wrote: >>>>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk >>>>>> index 0203138a819a..be6c76d2934b 100644 >>>>>> --- a/xen/arch/x86/arch.mk >>>>>> +++ b/xen/arch/x86/arch.mk >>>>>> @@ -4,6 +4,7 @@ >>>>>> export XEN_IMG_OFFSET := 0x200000 >>>>>> >>>>>> ARCH_LIBS-y += arch/x86/lib/lib.a >>>>>> +ALL_LIBS-y += arch/x86/lib/cpu-policy/lib.a >>>>> This wants to extend ARCH_LIBS-y surely?  Is this a rebasing oversight? >>>> No, this was deliberate. The functions here are different from those in >>>> arch/x86/lib/lib.a. We don't need to fear collision with "common code" >>>> ones. Hence I preferred to use the more "normal" placement into what's >>>> passed to the linker. >>> >>> I agree that we don't have the explicit ordering requirement that we >>> have with arch/x86/lib/lib.a. >>> >>> But, it still reads as bogus to be putting arch/x86/lib/cpu-policy/lib.a >>> in the non-ARCH list. >>> >>> What difference is there having this a little earlier in the linker >>> arguments?  Nothing AFAICT. >> >> Indeed. The sole reason why I'd prefer things as presented is that putting >> stuff in ARCH_LIBS should imo be the special case (i.e. requiring a special >> reason), while putting things in ALL_LIBS should be the default. > > I agree with Andrew that it feels weird that arch/x86/lib/lib.a is > placed in ARCH_LIBS-y and arch/x86/lib/cpu-policy/lib.a is placed in > ALL_LIBS-y. If we want to do it that way it needs a comment > explaining why they are placed in different list, otherwise it seems > like a typo on first sight, and it's likely to confuse people in the > future. Well, I'll (reluctantly) change then. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:10:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:10:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239566.1540963 (Exim 4.92) (envelope-from ) id 1vuoR3-0005Ky-Nq; Tue, 24 Feb 2026 09:10:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239566.1540963; Tue, 24 Feb 2026 09:10:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoR3-0005Kr-Km; Tue, 24 Feb 2026 09:10:29 +0000 Received: by outflank-mailman (input) for mailman id 1239566; Tue, 24 Feb 2026 09:10:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoR1-0005Kh-OF for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 09:10:28 +0000 Received: from mail-10627.protonmail.ch (mail-10627.protonmail.ch [79.135.106.27]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a7c1dbb0-1160-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 10:10:25 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a7c1dbb0-1160-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux-mail.net; s=protonmail; t=1771924224; x=1772183424; bh=hmCCodP6ILfYzHeYMGfQMZKpk8QNNXkJ2el02ynxmoM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=AJpR02z1d2PZ4TCePIIGRi2UT49zeAl64Y2dAKhdPdj8pSy0gJY/TT1JJ6f2257w8 0/D2A/DrT3VC3FRG1KGIvckWP3766Ar92vEzfNJVhDx47itBAvkxqQEf7JQ8sYwP6N 2H8BbxR9cSHPkxE2bEE4uEGswusGJwsDUK0wCiWbs4cMaPxMJZFHCRKEvyMPm4UCGs EDjA5VNj/wQXyxCvt+YiazdjUZ/22a/4nQ7XdPnzt+LXaBWMArajIa/FFVGqaHo+LR mSxtgvbtsO9FPcBg3VqVlRwllfMI97Uoapo7Vygdg71zWDyx11zmwwFhoe3TpMAzvb BUHP72VsVrd/w== Date: Tue, 24 Feb 2026 09:10:19 +0000 To: Jan Beulich From: "David Thomson (dt@linux.com)" Cc: boris.ostrovsky@oracle.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, jgross@suse.com Subject: Re: [PATCH] xen/acpi-processor: fix _CST detection using undersized evaluation buffer Message-ID: In-Reply-To: References: <20260223195602.17122-1-dt@linux-mail.net> Feedback-ID: 176297775:user:proton X-Pm-Message-ID: 87b72af72c34525a5deec4dee2366d398fa1be24 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable > I understand you reflect original behavior in this regard, but why involv= e any > ACPI function here at all when pblk is non-zero? I.e. why not swap the op= erands > of && ? Object evaluation could have wanted side effects (in which case, > however, some different change would be needed here), but checking for me= thod > presence surely hasn't. >=20 > Jan >=20 You're right on both counts. The original evaluate_object() call at least h= ad the appearance of wanting the result (even though buf was undersized and= the result was never used). A pure presence check has no such pretense. Sw= apping the operands is the obvious improvement. I think dropping the _CST c= heck entirely is also defensible since C-state support is confirmed when pb= lk is set. But I'm not certain there's no edge case where pblk is non-zero = and _CST is also not present, so I'd defer to your judgement. Would you prefer: a) if (pblk && acpi_has_method(handle, "_CST")) b) just if (pblk) Happy to send a v2 either way. DT From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:10:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:10:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239569.1540974 (Exim 4.92) (envelope-from ) id 1vuoRP-0005fB-UW; Tue, 24 Feb 2026 09:10:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239569.1540974; Tue, 24 Feb 2026 09:10:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoRP-0005f3-Rp; Tue, 24 Feb 2026 09:10:51 +0000 Received: by outflank-mailman (input) for mailman id 1239569; Tue, 24 Feb 2026 09:10:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoRO-0005eQ-6l for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /gUDc1YFqOzT6KVlCORA8pHgC7AyMPAIgQreet8oCl/oNWfEsPAFHBWJHt13sa5zHe/UNk4vkgub877GgKamrcVcaKUvSCS9nDMkkRICJ9JkN7ZNHyB0gypy16cnfgq/ReRgBbqtfw20COUSgsLVYk++FYW5oZMDVeoKcg3odbJvazWpZGzJAi7cgUntdsc6LfvgEn9xSb8WnV+Y7RKVAh7SMNPS7SRczhBH9gTcUuRbgZK1bhMXowxRbCZDoxXA/3BrDMZr3UU4K3gBkoNVTjvYq1ZQM0FGZsKZC/REOee89hPyOabZc4ZoAK+P7opw+PNpKHd2jyxauRGPcpk69ZeFFvu2wE2GjupW1tm42GMmn4TuieEIeXxfULdMW6LQWsc2IS1FemaqLB1QKW6ZHxG90Qlv1NIbMth+OZzl29kekpSGPkLgrHG84prQG8PI X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2026 09:10:39.0825 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 681e894c-7b58-4d20-3714-08de73849427 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MW1PEPF0001615B.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7171 On 16/02/2026 08:47, Bertrand Marquis wrote: > The SMCCC v1.1 inline helper currently forces a1-a4 into > unsigned long and uses in/out constraints for r0-r3. In > contrast, a5-a7 are passed with their original types via > read-only constraints. On arm64 this means a 32-bit signed > value in a1-a4 is converted to a 64-bit unsigned value, while > the same value in a5-a7 keeps its signed 32-bit form. For > example, a negative int in a2 is widened to unsigned long, but > a negative int in a5 is passed as a 32-bit signed value, so the > SMC sees different encodings depending on argument position. > > Switch the helper to use typed input registers arg0-arg7 > derived from the call arguments (keeping a0 cast to u32) and > separate output registers r0-r3. This preserves argument types > consistently across all positions. Argument evaluation order > is unchanged, so we do not reintroduce the issue fixed in > "e00dc325bd9e" ("xen/arm: smccc-1.1: Handle function result as > parameters"). > > This also aligns Xen's SMCCC parameter handling with Linux's type- > preserving behavior (same externally visible argument handling, > independent implementation) to avoid surprising differences > between a1-a4 and a5-a7. > > Current callers (PSCI, SCMI, platform SMC pass-through, OP-TEE, > and exynos5) pass unsigned values; exynos5 passes an int CPU id > which should always be > 0. > > Signed-off-by: Bertrand Marquis Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:21:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:21:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239587.1540983 (Exim 4.92) (envelope-from ) id 1vuobS-0007gz-VE; Tue, 24 Feb 2026 09:21:14 +0000 X-Outflank-Mailman: Message body and most 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, "xen-devel@lists.xenproject.org" Subject: Re: [PATCH 2/4] tools/tests/x86_emulator: avoid duplicating loop body Thread-Topic: [PATCH 2/4] tools/tests/x86_emulator: avoid duplicating loop body Thread-Index: AQHcpKvjKmbm1EGnl0GnG6Hw+gjp+rWQcPMAgAEjcwA= Date: Tue, 24 Feb 2026 09:21:01 +0000 Message-ID: <5CB47929-A0BE-454F-B00F-68ACA06A3DA8@citrix.com> References: <4711b676-82f8-48ec-a7dd-5c33bc7cd967@suse.com> In-Reply-To: <4711b676-82f8-48ec-a7dd-5c33bc7cd967@suse.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3864.400.21) authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SA3PR03MB7419:EE_|CO1PR03MB5713:EE_ x-ms-office365-filtering-correlation-id: e2a8ae64-9280-4162-18d8-08de73860746 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: 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Tue, 24 Feb 2026 01:21:25 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 10:21:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/acpi-processor: fix _CST detection using undersized evaluation buffer To: "David Thomson (dt@linux.com)" Cc: boris.ostrovsky@oracle.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, jgross@suse.com References: <20260223195602.17122-1-dt@linux-mail.net> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 10:10, David Thomson (dt@linux.com) wrote: >> I understand you reflect original behavior in this regard, but why involve any >> ACPI function here at all when pblk is non-zero? I.e. why not swap the operands >> of && ? Object evaluation could have wanted side effects (in which case, >> however, some different change would be needed here), but checking for method >> presence surely hasn't. >> > You're right on both counts. The original evaluate_object() call at least had the appearance of wanting the result (even though buf was undersized and the result was never used). A pure presence check has no such pretense. Swapping the operands is the obvious improvement. I think dropping the _CST check entirely is also defensible since C-state support is confirmed when pblk is set. But I'm not certain there's no edge case where pblk is non-zero and _CST is also not present, so I'd defer to your judgement. > > Would you prefer: > a) if (pblk && acpi_has_method(handle, "_CST")) > b) just if (pblk) I don't think b) is correct, so a) please (albeit suitably adjusted to really only flip the operands from what your original patch had). Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:29:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:29:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239611.1541005 (Exim 4.92) (envelope-from ) id 1vuoj2-0000e8-Vh; Tue, 24 Feb 2026 09:29:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239611.1541005; Tue, 24 Feb 2026 09:29:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoj2-0000e1-Rq; Tue, 24 Feb 2026 09:29:04 +0000 Received: by outflank-mailman (input) for mailman id 1239611; Tue, 24 Feb 2026 09:29:04 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoj2-0000dv-Ef for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 09:29:04 +0000 Received: from mail186-12.suw21.mandrillapp.com (mail186-12.suw21.mandrillapp.com [198.2.186.12]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3ec6e299-1163-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 10:28:58 +0100 (CET) Received: from pmta10.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail186-12.suw21.mandrillapp.com (Mailchimp) with ESMTP id 4fKsqF2SBJz705l40 for ; Tue, 24 Feb 2026 09:28:57 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 46a639a02fe14996b3b88983f3acca86; Tue, 24 Feb 2026 09:28:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3ec6e299-1163-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771925337; x=1772195337; bh=04YoqKiKHQcMfVq+TVh0j4NzIw104UMWK3IitvuKzl0=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Km0ZJD/k5KL9QuwPaBmPq9fPlf2SRzANMSCzzC9qqcJ69VJzQYHNkRTfAyDeYu/WW VELcgZCC60bY9zhRBbTrskuUSkY+GrHXoaugKZKyfG+hpeG+txUgbrZ5W5VDFrt01b NREHEOZ9MOSDP7NZg9/Yq69F6YQxDFyIPKjpcg6p4GXx9RsnFnQrFQRHXT8fQKRCdH kPn0+kF4n//wpQDDOShb9ADvmSDrKAIHQpPmNBwwnDibMcCsxhvvTCg1J42mgwcF0E J+X+NNX2zvnAdDfM/bzo/nH6ulrESeqJpd78bUGS4fzX9iA6vFu6AkZvGHp23m+g59 zd9y/H3HCDkIA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771925337; x=1772185837; i=teddy.astie@vates.tech; bh=04YoqKiKHQcMfVq+TVh0j4NzIw104UMWK3IitvuKzl0=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=htVWx7MJs0biJMP8naC0CA04G2xmh6zGj/xIMoDn3acbgwhAGy5F9SAf/b0VrfB+n e8F5ZhXRBc/fTj7+o8HzNv4jnbptXLQU1w/mcktpLGfluIFM+xf8tQN4ow4HNqmpUv KwlU5dbqQ8Ub8duW5Iz70Ln3XC2yKRnPWRf7zRQooZe+Jd+CCb4Mkn5Q5vw70sRFs8 UtsBprPK9uvuOdKMPyEEfh3yv/9ts/IHPVGa7NoJd/P0dpKtahRMViX0R0V2u0kUOy w2mQgbZZCu0YerGmeZwkrKDioRTJGfTftmNS4SyT8Jz2NIzCNGbyeZOuMOkLLB1hh5 dUy6u6IJ74vpw== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v7=201/2]=20libxc:=20Report=20consistent=20errors=20in=20xc=5Fresource=5Fop?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771925336678 Message-Id: To: "Jan Beulich" Cc: "Anthony PERARD" , "Juergen Gross" , xen-devel@lists.xenproject.org References: <0d7afac2-d358-4b0e-b828-31ebba6357d2@suse.com> In-Reply-To: <0d7afac2-d358-4b0e-b828-31ebba6357d2@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.46a639a02fe14996b3b88983f3acca86?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260224:md Date: Tue, 24 Feb 2026 09:28:57 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 23/02/2026 =C3=A0 17:15, Jan Beulich a =C3=A9crit=C2=A0: > On 23.02.2026 17:06, Teddy Astie wrote: >> xc_report_op returns -1 in some error conditions. >> Make sure it returns -ENOMEM in out of memory errors and -EINVAL >> in invalid usages errors. > > Isn't this a move in the wrong direction? -1 as a return value is quite o= kay. > errno wants setting to indicate the cause of the error (if called functio= ns > don't already set it properly). > To me, passing error through errno here feels more like a workaround rather than a proper error handling. It doesn't feel consistent in libxc overall (some functions returns a negative value corresponding to a error number while some others -1; in some cases we update errno). What are the error handling rules for xenctrl ? > Also nit: s/xc_report_op/xc_resource_op/ . > ack > Jan > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:35:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:35:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239620.1541013 (Exim 4.92) (envelope-from ) id 1vuoom-0002C1-HJ; Tue, 24 Feb 2026 09:35:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239620.1541013; Tue, 24 Feb 2026 09:35:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuoom-0002Bu-Eg; Tue, 24 Feb 2026 09:35:00 +0000 Received: by outflank-mailman (input) for mailman id 1239620; Tue, 24 Feb 2026 09:34:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuool-0002Bn-IG for xen-devel@lists.xenproject.org; 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Tue, 24 Feb 2026 01:36:26 -0800 (PST) Message-ID: <3aa8280b-8168-4e27-973f-f55dd7a11dd9@suse.com> Date: Tue, 24 Feb 2026 10:36:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 1/2] libxc: Report consistent errors in xc_resource_op To: Teddy Astie Cc: Anthony PERARD , Juergen Gross , xen-devel@lists.xenproject.org References: <0d7afac2-d358-4b0e-b828-31ebba6357d2@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 24.02.2026 10:28, Teddy Astie wrote: > Le 23/02/2026 à 17:15, Jan Beulich a écrit : >> On 23.02.2026 17:06, Teddy Astie wrote: >>> xc_report_op returns -1 in some error conditions. >>> Make sure it returns -ENOMEM in out of memory errors and -EINVAL >>> in invalid usages errors. >> >> Isn't this a move in the wrong direction? -1 as a return value is quite okay. >> errno wants setting to indicate the cause of the error (if called functions >> don't already set it properly). > > To me, passing error through errno here feels more like a workaround > rather than a proper error handling. It doesn't feel consistent in libxc > overall (some functions returns a negative value corresponding to a > error number while some others -1; in some cases we update errno). > > What are the error handling rules for xenctrl ? Question goes mainly to Anthony. My take is that library functions should behave properly, and where that isn't the case it wants adjusting. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:37:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:37:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239639.1541034 (Exim 4.92) (envelope-from ) id 1vuor6-0003GZ-6w; Tue, 24 Feb 2026 09:37:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239639.1541034; Tue, 24 Feb 2026 09:37:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuor6-0003GS-3E; Tue, 24 Feb 2026 09:37:24 +0000 Received: by outflank-mailman (input) for mailman id 1239639; Tue, 24 Feb 2026 09:37:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuor4-00032q-1l for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 09:37:22 +0000 Received: from mail-4398.protonmail.ch (mail-4398.protonmail.ch [185.70.43.98]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68488617-1164-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 10:37:17 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68488617-1164-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux-mail.net; s=protonmail; t=1771925836; x=1772185036; bh=r2rda/g/vi5GF2WIAeDs3b+9hmolyVwJOyarSdmFE8g=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=PdbCfxjgi4SN+YiE7S7My63gVIe+v7WfKxKYiVcHAJn1xeEhgc51bgJw5IKRv+Bw1 lDQbJDgT0bVu/pleb1j+Shb53j22elBWGu31j2wz5WZL530qDOHK+RQp6BMB1i8K4C YbRoMzpzRiTMPGu2DFXOLccv0Nld/ILIuVIBJ7pNlzzQKfR1rMjuAng5wAlofSTUP8 3TljrwVbQa0vurfh2Kkrg/9d9RzTb1t9EfhEUSWSEYFTV7pqdOS/IJiMt9Dywu8MFm IJF52z60NgxooMKNSUoQaY0VUWOt7/EAfJsrxrFQGy6R0KB79/JqCs3z+r+IaVK1xE XAHCtI8O4pv4g== Date: Tue, 24 Feb 2026 09:37:11 +0000 To: jgross@suse.com From: David Thomson Cc: boris.ostrovsky@oracle.com, olekstysh@gmail.com, tglx@linutronix.de, jbeulich@suse.com, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, David Thomson Subject: [PATCH v2] xen/acpi-processor: fix _CST detection using undersized evaluation buffer Message-ID: <20260224093707.19679-1-dt@linux-mail.net> Feedback-ID: 176297775:user:proton X-Pm-Message-ID: 6d863196dc75b80c244bf456ca669156f4bdc168 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable read_acpi_id() attempts to evaluate _CST using a stack buffer of sizeof(union acpi_object) (48 bytes), but _CST returns a nested Package of sub-Packages (one per C-state, each containing a register descriptor, type, latency, and power) requiring hundreds of bytes. The evaluation always fails with AE_BUFFER_OVERFLOW. On modern systems using FFH/MWAIT entry (where pblk is zero), this causes the function to return before setting the acpi_id_cst_present bit. In check_acpi_ids(), flags.power is then zero for all Phase 2 CPUs (physical CPUs beyond dom0's vCPU count), so push_cxx_to_hypervisor() is never called for them. On a system with dom0_max_vcpus=3D2 and 8 physical CPUs, only PCPUs 0-1 receive C-state data. PCPUs 2-7 are stuck in C0/C1 idle, unable to enter C2/C3. This costs measurable wall power (4W observed on an Intel Core Ultra 7 265K with Xen 4.20). The function never uses the _CST return value -- it only needs to know whether _CST exists. Replace the broken acpi_evaluate_object() call with acpi_has_method(), which correctly detects _CST presence using acpi_get_handle() without any buffer allocation. This brings C-state detection to parity with the P-state path, which already works correctly for Phase 2 CPUs. Fixes: 59a568029181 ("xen/acpi-processor: C and P-state driver that uploads= said data to hypervisor.") Signed-off-by: David Thomson --- Changes in v2: - Check pblk first to avoid unnecessary acpi_has_method() call when pblk is zero (Jan Beulich) drivers/xen/xen-acpi-processor.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-proces= sor.c index 2967039..67a4afc 100644 --- a/drivers/xen/xen-acpi-processor.c +++ b/drivers/xen/xen-acpi-processor.c @@ -379,11 +379,8 @@ read_acpi_id(acpi_handle handle, u32 lvl, void *contex= t, void **rv) =09=09=09 acpi_psd[acpi_id].domain); =09} -=09status =3D acpi_evaluate_object(handle, "_CST", NULL, &buffer); -=09if (ACPI_FAILURE(status)) { -=09=09if (!pblk) -=09=09=09return AE_OK; -=09} +=09if (!pblk && !acpi_has_method(handle, "_CST")) +=09=09return AE_OK; =09/* .. and it has a C-state */ =09__set_bit(acpi_id, acpi_id_cst_present); -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:38:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:38:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239649.1541044 (Exim 4.92) (envelope-from ) id 1vuosM-00044F-GI; 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Tue, 24 Feb 2026 01:39:04 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 10:39:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/acpi-processor: fix _CST detection using undersized evaluation buffer To: David Thomson , jgross@suse.com Cc: boris.ostrovsky@oracle.com, olekstysh@gmail.com, tglx@linutronix.de, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20260224093707.19679-1-dt@linux-mail.net> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260224093707.19679-1-dt@linux-mail.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 10:37, David Thomson wrote: > read_acpi_id() attempts to evaluate _CST using a stack buffer of > sizeof(union acpi_object) (48 bytes), but _CST returns a nested Package > of sub-Packages (one per C-state, each containing a register descriptor, > type, latency, and power) requiring hundreds of bytes. The evaluation > always fails with AE_BUFFER_OVERFLOW. > > On modern systems using FFH/MWAIT entry (where pblk is zero), this > causes the function to return before setting the acpi_id_cst_present > bit. In check_acpi_ids(), flags.power is then zero for all Phase 2 CPUs > (physical CPUs beyond dom0's vCPU count), so push_cxx_to_hypervisor() is > never called for them. > > On a system with dom0_max_vcpus=2 and 8 physical CPUs, only PCPUs 0-1 > receive C-state data. PCPUs 2-7 are stuck in C0/C1 idle, unable to > enter C2/C3. This costs measurable wall power (4W observed on an Intel > Core Ultra 7 265K with Xen 4.20). > > The function never uses the _CST return value -- it only needs to know > whether _CST exists. Replace the broken acpi_evaluate_object() call with > acpi_has_method(), which correctly detects _CST presence using > acpi_get_handle() without any buffer allocation. This brings C-state > detection to parity with the P-state path, which already works correctly > for Phase 2 CPUs. > > Fixes: 59a568029181 ("xen/acpi-processor: C and P-state driver that uploads said data to hypervisor.") > Signed-off-by: David Thomson Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:42:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:42:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239670.1541063 (Exim 4.92) (envelope-from ) id 1vuovd-00065f-4Z; Tue, 24 Feb 2026 09:42:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239670.1541063; Tue, 24 Feb 2026 09:42:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuovd-00065Y-1d; Tue, 24 Feb 2026 09:42:05 +0000 Received: by outflank-mailman (input) for mailman id 1239670; Tue, 24 Feb 2026 09:42:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuovb-00065S-Qj for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 09:42:03 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1251a5e0-1165-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 10:42:02 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4833115090dso50787215e9.3 for ; Tue, 24 Feb 2026 01:42:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 01:42:01 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 10:42:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk To: Edwin Torok Cc: Anthony PERARD , Andrew Cooper , Roger Pau Monne , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: <6fa0d95dad3d223cf8aaa923ae59fd0b3a97d4a0.1771840831.git.edwin.torok@citrix.com> <20e3edf8-9aba-40e9-af57-e5eddf001a7b@suse.com> <6616BFC6-2ABC-4DEF-A799-BC660BBE31BC@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6616BFC6-2ABC-4DEF-A799-BC660BBE31BC@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit First, since this looks to be recurring: Please don't send HTML mails. On 24.02.2026 10:38, Edwin Torok wrote: > On 23 Feb 2026, at 16:37, Jan Beulich wrote: > On 23.02.2026 11:14, Edwin Török wrote: > Introduce a new tools/tests/Rules.mk that must be included *last* in a > Makefile, after TARGETS is defined. > > Requiring inclusion after TARGETS is defined is certainly okay. Requiring it to > be included absolutely last is imo going too far. There surely are going to be > cases where something wants overriding or adding to. > > > I’ll change this so that the Makefile defines XEN_ROOT, CFLAGS, LDFLAGS, TARGETS, and then includes the file. > > > --- /dev/null > +++ b/tools/tests/Rules.mk > @@ -0,0 +1,48 @@ > +# Usage: include this last in your Makefile. > +# > +# For example: > +# > +# XEN_ROOT = $(CURDIR)/../../.. > +# include $(XEN_ROOT)/tools/Rules.mk > +# > +# TARGETS := ... > +# ... > +# include $(XEN_ROOT)/tools/tests/Rules.mk > + > +ifndef XEN_ROOT > +$(error XEN_ROOT is not defined) > +endif > + > +.PHONY: all > +all: $(TARGETS) > +.DEFAULT_GOAL: all > > Make 3.80, which ./README still says we support, doesn't look to know this. > > Do you know which (Linux) distribution and version would have Make 3.80 so I can test my changes there? Not without a lot of digging. Perhaps we simply want to bump the minimum version, to "sync up" with what we did for binutils, gcc, and clang? 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Can't ... I agree that this is change is okay to be done but I am not sure about ... > >> + csr_set(CSR_##csr, ULONG_MAX); \ > ... csr_swap() be used here, too? ... as after re-reading spec again I am not sure that we can do in this way at all. Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to take into account a writability of the bit, so it won't touch a bit if it is r/o. But it seems like this approach won't work with**WLRL or WPRI fields as these fields aren't r/o, but they only support specific value and for example: - Implementations are permitted but not required to raise an illegal-instruction exception if an instruction attempts to write a non-supported value to a WLRL field. - For these reserved fields, software is required to preserve the existing values when writing to other fields in the same register. Overwriting them with 1s could be considered non-compliant behavior. So it seems like we can't just do csr_swap() with all 1s and it is needed to pass a mask to INIT_CSR_MASK() which will tell which bits should be ignored and don't touched. For example, HENVCFG and HSTATEEN0 has WPRI fields. reserved_bits_mask = 0x1FFFFFFCFFFFFF00; tmp = csr_read(HENVCFG); tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); >> + csr_masks.field = csr_swap(CSR_##csr, old); \ >> +} while (0) > This whole macro body would also better be indented by one level, to not leave > in particular this closing brace as a misleading one. Do you mean that it should be: +void __init init_csr_masks(void) +{ +#define INIT_CSR_MASK(csr, field) \ do { .... } while (0) #endif I will update it. > > Happy to make adjustments while committing, provided you agree. With the > adjustments (or clarification why any of them shouldn't be done): > Reviewed-by: Jan Beulich If what I wrote above make sense then it seems that I have to send a new version of this patch. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 24 09:48:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 09:48:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239691.1541083 (Exim 4.92) (envelope-from ) id 1vup1y-0007eM-3A; Tue, 24 Feb 2026 09:48:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239691.1541083; Tue, 24 Feb 2026 09:48:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vup1x-0007eF-Vz; Tue, 24 Feb 2026 09:48:37 +0000 Received: by outflank-mailman (input) for mailman id 1239691; Tue, 24 Feb 2026 09:48:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vup1x-0007e9-2f for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 09:48:37 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id fcb3dd70-1165-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 10:48:35 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4834826e555so50822615e9.2 for ; Tue, 24 Feb 2026 01:48:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 01:48:35 -0800 (PST) Message-ID: <72f6e508-c75a-4aaa-a727-8cfeaa204d8e@suse.com> Date: Tue, 24 Feb 2026 10:48:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] tools/tests/x86_emulator: disable xmm* tests on clang To: Edwin Torok Cc: Andrew Cooper , Roger Pau Monne , Anthony PERARD , "xen-devel@lists.xenproject.org" References: <9e380de50b64e45e9044a2f4bcf1a5bdb7e74a29.1771840208.git.edwin.torok@citrix.com> <7f6cca68-f681-41ce-8d2c-2f4854510759@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 24.02.2026 10:34, Edwin Torok wrote: >> On 23 Feb 2026, at 16:10, Jan Beulich wrote: >> On 23.02.2026 11:04, Edwin Török wrote: >>> clang-21 doesn't support `-ffixed-xmm0`, so `%xmm0` won't have the >>> expected value. >>> Disable these tests on clang. >> >> I don't think that's what we want, and not only because of the clutter the >> various #ifdef cause. We want to be able to run as many of the tests as >> possible, so the first goal should be to find some alternative mechanism to >> achieve the same effect. A global register variable comes to mind as a >> possible option. >> >> Further, how did you arrive at which tests need suppressing? > > I used gdb to look at the 2 memory areas, and noticed that the XMM region was different between emulated and actual when built with clang. > Then I noticed the build failures due to the lack of fixed-xmm0. > Then I added the ifdefs one by one as I ran the test until the whole test program passed without failure. > I tried adding some ‘pxor xmm0, xmm0’ into the cpu_has_sse2 sections, but that didn’t really work either. > > Although I may have been misled by the overlapping region, see below. > >> I don't think >> we rely on an "expected value" anywhere. I don't even recall us passing >> -ffixed-xmm0 when compiling test_x86_emulate.c. > > Yes, I’m surprised it works with GCC. But maybe only because the emulator overwrites the actual FXSAVE area corresponding to XMM. > XMM0 begins at offset 160, and 0x100 - 0x80 = 128. > AFAICT the actual execution stores its result at [0x80, 0x80+0x200), and the emulator stores its result into [0x100, 0x100+0x200). > So the emulator will overwrite some of the values from the actual run. > > This only works if the end of the FXSAVE area looks like its beginning (i.e. if FCW/FSW/etc. happens to match MM6/etc.) Are you possibly overlooking the fact that res[] is an array of unsigned int elements, i.e. the offsets used in source code all need to be multiplied by 4 to give offsets in memory? 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Tue, 24 Feb 2026 02:16:16 -0800 (PST) Message-ID: <541a6c57-406c-49e5-8b8b-019e30bf0d89@suse.com> Date: Tue, 24 Feb 2026 11:16:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 10:44, Oleksii Kurochko wrote: > > On 2/24/26 9:07 AM, Jan Beulich wrote: >> On 20.02.2026 17:18, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/domain.c >>> +++ b/xen/arch/riscv/domain.c >>> @@ -2,9 +2,39 @@ >>> >>> #include >>> #include >>> +#include >>> #include >>> #include >>> >>> +#include >>> +#include >>> + >>> +struct csr_masks { >>> + register_t hedeleg; >>> + register_t henvcfg; >>> + register_t hideleg; >>> + register_t hstateen0; >>> +}; >>> + >>> +static struct csr_masks __ro_after_init csr_masks; >>> + >>> +void __init init_csr_masks(void) >>> +{ >>> +#define INIT_CSR_MASK(csr, field) do { \ >>> + register_t old; \ >>> + old = csr_read(CSR_##csr); \ >> Can't this be the initializer of the variable? Can't ... > > I agree that this is change is okay to be done but I am not sure about ... > >> >>> + csr_set(CSR_##csr, ULONG_MAX); \ >> ... csr_swap() be used here, too? > > ... as after re-reading spec again I am not sure that we can do in this way > at all. > > Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to > take into account a writability of the bit, so it won't touch a bit if it > is r/o. To me the spec isn't quite clear enough in this regard. > But it seems like this approach won't work with**WLRL or WPRI fields as these > fields aren't r/o, In the CSRs presently dealt with, are there any WLRL fields at all? (I don't think WPRI fields represent much of an issue for the purpose here.) > but they only support specific value and for example: > > - Implementations are permitted but not required to raise an > illegal-instruction exception if an instruction attempts to write a > non-supported value to a WLRL field. > - For these reserved fields, software is required to preserve the existing > values when writing to other fields in the same register. Overwriting them > with 1s could be considered non-compliant behavior. > > So it seems like we can't just do csr_swap() with all 1s and it is needed > to pass a mask to INIT_CSR_MASK() which will tell which bits should be > ignored and don't touched. > For example, HENVCFG and HSTATEEN0 has WPRI fields. > > reserved_bits_mask = 0x1FFFFFFCFFFFFF00; > tmp = csr_read(HENVCFG); > tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); What I find further concerning is that HSTATEEN0 also may have read-only-1 fields. You don't currently cope with that, I think. >>> + csr_masks.field = csr_swap(CSR_##csr, old); \ >>> +} while (0) >> This whole macro body would also better be indented by one level, to not leave >> in particular this closing brace as a misleading one. > > Do you mean that it should be: > > +void __init init_csr_masks(void) > +{ > +#define INIT_CSR_MASK(csr, field) \ > do { > .... > } while (0) > #endif > > I will update it. Yes, with no #endif of course. The "do {" could also stay where you had it. >> Happy to make adjustments while committing, provided you agree. With the >> adjustments (or clarification why any of them shouldn't be done): >> Reviewed-by: Jan Beulich > > If what I wrote above make sense then it seems that I have to send a new > version of this patch. Not sure there, but the hstateen0 aspect needs dealing with, I think. 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Tue, 24 Feb 2026 02:25:57 -0800 (PST) Message-ID: <8e8904c5-18aa-40a7-9878-56df56760145@suse.com> Date: Tue, 24 Feb 2026 11:25:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] tools/tests/x86_emulator: fix 'shifting a negative signed value is undefined' To: Edwin Torok Cc: Andrew Cooper , Roger Pau Monne , Anthony PERARD , "xen-devel@lists.xenproject.org" References: <6BE49BEE-F813-4586-9F51-3D39106E85CD@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6BE49BEE-F813-4586-9F51-3D39106E85CD@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 24.02.2026 11:12, Edwin Torok wrote: >> On 23 Feb 2026, at 15:42, Jan Beulich wrote: >> On 23.02.2026 11:04, Edwin Török wrote: >>> --- a/tools/tests/x86_emulator/test_x86_emulator.c >>> +++ b/tools/tests/x86_emulator/test_x86_emulator.c >>> @@ -1161,7 +1161,7 @@ int main(int argc, char **argv) >>> instr[0] = 0x4d; instr[1] = 0x0f; instr[2] = 0xbb; instr[3] = 0x03; >>> regs.eflags = EFLAGS_ALWAYS_SET; >>> regs.rip = (unsigned long)&instr[0]; >>> - regs.r8 = (-1L << 40) + 1; >>> + regs.r8 = (~0ULL << 40) + 1; >> >> While -1 vs ~0 doesn't make a big difference, I think we want to stick to >> "register size" here, and hence have only UL as the suffix. Then (happy to >> adjust while committing): >> Acked-by: Jan Beulich > > That is what I tried initially, but I got an error that the shift exceeds the width of the type in (0UL << 40). > (I think the failure was with -m32 in the CI, but can’t find it now) But this code has "#ifdef __x86_64__" around it. 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Tue, 24 Feb 2026 02:30:15 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 11:30:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] tools/tests/*/Makefile: factor out common PHONY rules into Rules.mk To: Edwin Torok Cc: Anthony PERARD , Andrew Cooper , Roger Pau Monne , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: <6fa0d95dad3d223cf8aaa923ae59fd0b3a97d4a0.1771840831.git.edwin.torok@citrix.com> <20e3edf8-9aba-40e9-af57-e5eddf001a7b@suse.com> <6616BFC6-2ABC-4DEF-A799-BC660BBE31BC@citrix.com> <7B23282E-4CA9-4B8D-A521-C8483F7E2541@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7B23282E-4CA9-4B8D-A521-C8483F7E2541@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 24.02.2026 11:01, Edwin Torok wrote: > > >> On 24 Feb 2026, at 09:42, Jan Beulich wrote: >> >> First, since this looks to be recurring: Please don't send HTML mails. > > Thanks, didn’t notice my mail client was doing that, changed the settings now. > >> >> On 24.02.2026 10:38, Edwin Torok wrote: >>> On 23 Feb 2026, at 16:37, Jan Beulich wrote: >>> On 23.02.2026 11:14, Edwin Török wrote: >>> Introduce a new tools/tests/Rules.mk that must be included *last* in a >>> Makefile, after TARGETS is defined. >>> >>> Requiring inclusion after TARGETS is defined is certainly okay. Requiring it to >>> be included absolutely last is imo going too far. There surely are going to be >>> cases where something wants overriding or adding to. >>> >>> >>> I’ll change this so that the Makefile defines XEN_ROOT, CFLAGS, LDFLAGS, TARGETS, and then includes the file. >>> >>> >>> --- /dev/null >>> +++ b/tools/tests/Rules.mk >>> @@ -0,0 +1,48 @@ >>> +# Usage: include this last in your Makefile. >>> +# >>> +# For example: >>> +# >>> +# XEN_ROOT = $(CURDIR)/../../.. >>> +# include $(XEN_ROOT)/tools/Rules.mk >>> +# >>> +# TARGETS := ... >>> +# ... >>> +# include $(XEN_ROOT)/tools/tests/Rules.mk >>> + >>> +ifndef XEN_ROOT >>> +$(error XEN_ROOT is not defined) >>> +endif >>> + >>> +.PHONY: all >>> +all: $(TARGETS) >>> +.DEFAULT_GOAL: all >>> >>> Make 3.80, which ./README still says we support, doesn't look to know this. >>> >>> Do you know which (Linux) distribution and version would have Make 3.80 so I can test my changes there? >> >> Not without a lot of digging. Perhaps we simply want to bump the minimum version, >> to "sync up" with what we did for binutils, gcc, and clang? > > Minimum binutils is 2.25, which excludes CentOS6. CentOS7 has 2.27 and make 3.82. > The only other OS that I see that’d have make 3.81 and binutils >= 2.25 would be Ubuntu 14.04, which is EoL. > > So we could update to Make 3.82? > > If we exclude CentOS7 (which is EoL), then the next minimum make that I see would be 4.2.1. Would that be too big of a jump? I would take gcc and binutils (both dating back to 2015) as reference, which would make it either 4.0 or 4.1 which we may want to pick. (Which doesn't exclude 3.82 as an option, of course.) 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Can't ... >> I agree that this is change is okay to be done but I am not sure about ... >> >>>> + csr_set(CSR_##csr, ULONG_MAX); \ >>> ... csr_swap() be used here, too? >> ... as after re-reading spec again I am not sure that we can do in this way >> at all. >> >> Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to >> take into account a writability of the bit, so it won't touch a bit if it >> is r/o. > To me the spec isn't quite clear enough in this regard. > >> But it seems like this approach won't work with**WLRL or WPRI fields as these >> fields aren't r/o, > In the CSRs presently dealt with, are there any WLRL fields at all? (I don't > think WPRI fields represent much of an issue for the purpose here.) Agree, currently used CSRs in this function don't have WLRL feilds, but I suppose we want to have the similar treatment (read WLRL fields and reuse what was read) for WLRL fields as these fields expect only valid value and so all 1s for this fields can be wrong to use. > >> but they only support specific value and for example: >> >> - Implementations are permitted but not required to raise an >> illegal-instruction exception if an instruction attempts to write a >> non-supported value to a WLRL field. >> - For these reserved fields, software is required to preserve the existing >> values when writing to other fields in the same register. Overwriting them >> with 1s could be considered non-compliant behavior. >> >> So it seems like we can't just do csr_swap() with all 1s and it is needed >> to pass a mask to INIT_CSR_MASK() which will tell which bits should be >> ignored and don't touched. >> For example, HENVCFG and HSTATEEN0 has WPRI fields. >> >> reserved_bits_mask = 0x1FFFFFFCFFFFFF00; >> tmp = csr_read(HENVCFG); >> tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); > What I find further concerning is that HSTATEEN0 also may have read-only-1 > fields. You don't currently cope with that, I think. Because of this: A bit in an hstateen CSR cannot be read-only one unless the same bit is read-only one in the matching mstateen CSR. ? I expect that it will be covered by csr_set() which will touch only writable bits and ignore read-only. So doesn't matter if a bit is read only 1 or 0 it still shouldn't be in the final mask. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 24 10:47:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 10:47:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239787.1541194 (Exim 4.92) (envelope-from ) id 1vupx5-000364-1j; Tue, 24 Feb 2026 10:47:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239787.1541194; Tue, 24 Feb 2026 10:47:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vupx4-00035x-U3; Tue, 24 Feb 2026 10:47:38 +0000 Received: by outflank-mailman (input) for mailman id 1239787; Tue, 24 Feb 2026 10:47:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vupx4-00035o-2e for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 10:47:38 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3b467e01-116e-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 11:47:36 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-436356740e6so5600868f8f.2 for ; Tue, 24 Feb 2026 02:47:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 02:47:36 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 11:47:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> <541a6c57-406c-49e5-8b8b-019e30bf0d89@suse.com> <5e4362ed-c310-442b-a742-ca7c3d1c47dc@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5e4362ed-c310-442b-a742-ca7c3d1c47dc@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 11:42, Oleksii Kurochko wrote: > > On 2/24/26 11:16 AM, Jan Beulich wrote: >> On 24.02.2026 10:44, Oleksii Kurochko wrote: >>> On 2/24/26 9:07 AM, Jan Beulich wrote: >>>> On 20.02.2026 17:18, Oleksii Kurochko wrote: >>>>> --- a/xen/arch/riscv/domain.c >>>>> +++ b/xen/arch/riscv/domain.c >>>>> @@ -2,9 +2,39 @@ >>>>> >>>>> #include >>>>> #include >>>>> +#include >>>>> #include >>>>> #include >>>>> >>>>> +#include >>>>> +#include >>>>> + >>>>> +struct csr_masks { >>>>> + register_t hedeleg; >>>>> + register_t henvcfg; >>>>> + register_t hideleg; >>>>> + register_t hstateen0; >>>>> +}; >>>>> + >>>>> +static struct csr_masks __ro_after_init csr_masks; >>>>> + >>>>> +void __init init_csr_masks(void) >>>>> +{ >>>>> +#define INIT_CSR_MASK(csr, field) do { \ >>>>> + register_t old; \ >>>>> + old = csr_read(CSR_##csr); \ >>>> Can't this be the initializer of the variable? Can't ... >>> I agree that this is change is okay to be done but I am not sure about ... >>> >>>>> + csr_set(CSR_##csr, ULONG_MAX); \ >>>> ... csr_swap() be used here, too? >>> ... as after re-reading spec again I am not sure that we can do in this way >>> at all. >>> >>> Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to >>> take into account a writability of the bit, so it won't touch a bit if it >>> is r/o. >> To me the spec isn't quite clear enough in this regard. >> >>> But it seems like this approach won't work with**WLRL or WPRI fields as these >>> fields aren't r/o, >> In the CSRs presently dealt with, are there any WLRL fields at all? (I don't >> think WPRI fields represent much of an issue for the purpose here.) > > Agree, currently used CSRs in this function don't have WLRL feilds, but I suppose > we want to have the similar treatment (read WLRL fields and reuse what was read) > for WLRL fields as these fields expect only valid value and so all 1s for this > fields can be wrong to use. > >> >>> but they only support specific value and for example: >>> >>> - Implementations are permitted but not required to raise an >>> illegal-instruction exception if an instruction attempts to write a >>> non-supported value to a WLRL field. >>> - For these reserved fields, software is required to preserve the existing >>> values when writing to other fields in the same register. Overwriting them >>> with 1s could be considered non-compliant behavior. >>> >>> So it seems like we can't just do csr_swap() with all 1s and it is needed >>> to pass a mask to INIT_CSR_MASK() which will tell which bits should be >>> ignored and don't touched. >>> For example, HENVCFG and HSTATEEN0 has WPRI fields. >>> >>> reserved_bits_mask = 0x1FFFFFFCFFFFFF00; >>> tmp = csr_read(HENVCFG); >>> tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); >> What I find further concerning is that HSTATEEN0 also may have read-only-1 >> fields. You don't currently cope with that, I think. > > Because of this: > A bit in an hstateen CSR cannot be read-only one unless the same bit is > read-only one in the matching mstateen CSR. > ? > > I expect that it will be covered by csr_set() which will touch only writable > bits and ignore read-only. So doesn't matter if a bit is read only 1 or 0 > it still shouldn't be in the final mask. But the hypervisor view of the register value seen by guests won't be correct. Recall that you moved to probing to make sure that the cached values we have in the hypervisor properly match the values seen by the guest? Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 10:51:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 10:51:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239796.1541204 (Exim 4.92) (envelope-from ) id 1vuq12-0004ec-Gv; Tue, 24 Feb 2026 10:51:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239796.1541204; Tue, 24 Feb 2026 10:51:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuq12-0004eV-Dw; Tue, 24 Feb 2026 10:51:44 +0000 Received: by outflank-mailman (input) for mailman id 1239796; Tue, 24 Feb 2026 10:51:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuq10-0004eP-NL for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 10:51:42 +0000 Received: from mail186-12.suw21.mandrillapp.com (mail186-12.suw21.mandrillapp.com [198.2.186.12]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ca2a8756-116e-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 11:51:36 +0100 (CET) Received: from pmta10.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail186-12.suw21.mandrillapp.com (Mailchimp) with ESMTP id 4fKvfb3Cf0z705l4D for ; Tue, 24 Feb 2026 10:51:35 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id b23a52783cba4c85add3ee778284c931; Tue, 24 Feb 2026 10:51:35 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ca2a8756-116e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771930295; x=1772200295; bh=/TXyyKPvyNOfr9WgduPAeT4QAKdPcNDxmEaL9+XY6V4=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=hEGWuuJx06mnWuGy9jyOHEK4isposbcmixKNuQcw+IqljV8Qlq7z5tV0exdnEobli h/y3xvcjrJ5wJXPWLa+H5MN4SvoSwsyhUmR1Mh+UEp/HBLcHS+oh/kBbwunZPl4IHh jisEVSvVF5Rw13H6hMKTAdzNS9bbwWksyEGZZIyRQptOFwd+uSEt6uRYOt2ABkxEx6 zp/oNTd8m+RFTaW22Bu9sE1aUjWmyo3suFZOgWRV2zgcO7iF4IFzEqWbVwP1eFAR3O oKuWlWBY2YbmGsSpfywuZjZCGI6sJVGduUv3xTSe5ixGu3cn3GCxeFGJrNlK6uZAiV j6jx3Nr3y7D6w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771930295; x=1772190795; i=teddy.astie@vates.tech; bh=/TXyyKPvyNOfr9WgduPAeT4QAKdPcNDxmEaL9+XY6V4=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=JdpH1BRdBB8Gb5jl5Lc22VcPvXAZIv5g0yXZCQ4ChEngdYBaE33vLyV0/+yBxJLSp DgXRCUUISFaTg7pS6OUHIHlzqXUV+UWk2ysd5sfe+5xs75nSAaFpbokg/RUsqOIUPK ANryeeHnTEj5WvAgFLm1uXqBfmkJImguXsfYqz+98ngKIwcVu/Iy14JsSHVRTVOEbq LP/EccPVCK/QWGe78GY8ylqiYfG4BdmIudNE07Lknz1WaQCAmERP1FBjVoLfCwp5Sm r7oQUtHuGLCbnEH7DYiJmtfzInr80WtEmvZJRBC5EJQnPGWy9ft/+ViFKyj/nL18y/ S8bsnLYY8ZoFA== From: "Teddy Astie" Subject: =?utf-8?Q?[RFC=20PATCH]=20x86/xen:=20Consider=20Xen=20PVH=20support=20in=20CONFIG=5FXEN=5FPVHVM?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771930294336 To: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Cc: "Teddy Astie" , "Juergen Gross" , "Boris Ostrovsky" , "Oleksandr Tyshchenko" Message-Id: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.b23a52783cba4c85add3ee778284c931?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260224:md Date: Tue, 24 Feb 2026 10:51:35 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit It's currently possible to build Linux with CONFIG_PVH|CONFIG_XEN_PVHVM and no CONFIG_XEN_PVH. That leads to inconsistent kernels that fails with "Missing xen PVH initialization" when booting using PVH boot method or display various errors and fail to initialize Xen PV drivers when booting with PVH-GRUB. platform_pci_unplug: Xen Platform PCI: unrecognised magic value ... # modprobe xen-blkfront modprobe: ERROR: could not insert 'xen_blkfront': No such device # modprobe xen-netfront modprobe: ERROR: could not insert 'xen_netfront': No such device When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, hence when booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even when we aren't actually one (in the "with HVM emulated devices" sense). As it is actually possible to boot Xen PVH without CONFIG_PVH; and that most Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests support within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. Keep CONFIG_XEN_PVH as a shortcut to enable PVH boot, ACPI support and PVHVM. Signed-off-by: Teddy Astie --- Cc: Juergen Gross Cc: Boris Ostrovsky Cc: Oleksandr Tyshchenko A tentative patch, I'm not sure of the way of dealing with the KConfig part, keeping CONFIG_XEN_PVH as a shortcut is interesting, but there may be other options. There are widespreadly used Linux distributions that have a similar configuration to this one, thus exhibit this issue i.e fail to boot. I'm not sure which commit to target for a Fixes: note. arch/x86/xen/Makefile | 2 +- arch/x86/xen/enlighten_hvm.c | 2 -- arch/x86/xen/grant-table.c | 2 +- arch/x86/xen/xen-head.S | 8 ++++---- include/xen/xen.h | 2 +- 5 files changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile index a9ec8c9f5c5d..7fbe17c8ba89 100644 --- a/arch/x86/xen/Makefile +++ b/arch/x86/xen/Makefile @@ -33,7 +33,7 @@ obj-$(CONFIG_XEN_PV) += irq.o obj-$(CONFIG_XEN_PV) += multicalls.o obj-$(CONFIG_XEN_PV) += xen-asm.o -obj-$(CONFIG_XEN_PVH) += enlighten_pvh.o +obj-$(CONFIG_XEN_PVHVM) += enlighten_pvh.o obj-$(CONFIG_EVENT_TRACING) += trace.o diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c index fe57ff85d004..38c2cdfdcc44 100644 --- a/arch/x86/xen/enlighten_hvm.c +++ b/arch/x86/xen/enlighten_hvm.c @@ -264,7 +264,6 @@ static bool __init msi_ext_dest_id(void) static __init void xen_hvm_guest_late_init(void) { -#ifdef CONFIG_XEN_PVH /* Test for PVH domain (PVH boot path taken overrides ACPI flags). */ if (!xen_pvh && (x86_platform.legacy.rtc || !x86_platform.legacy.no_vga)) @@ -282,7 +281,6 @@ static __init void xen_hvm_guest_late_init(void) machine_ops.emergency_restart = xen_emergency_restart; pv_info.name = "Xen PVH"; -#endif } static uint32_t __init xen_platform_hvm(void) diff --git a/arch/x86/xen/grant-table.c b/arch/x86/xen/grant-table.c index 5f4060b5a40d..4d717c92b624 100644 --- a/arch/x86/xen/grant-table.c +++ b/arch/x86/xen/grant-table.c @@ -149,7 +149,7 @@ int arch_gnttab_init(unsigned long nr_shared, unsigned long nr_status) return -ENOMEM; } -#ifdef CONFIG_XEN_PVH +#ifdef CONFIG_XEN_PVHVM #include #include static int __init xen_pvh_gnttab_setup(void) diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S index 5dad6c51cdc3..e262caac3ca9 100644 --- a/arch/x86/xen/xen-head.S +++ b/arch/x86/xen/xen-head.S @@ -162,10 +162,10 @@ SYM_FUNC_END(xen_hypercall_intel) #else # define FEATURES_PV 0 #endif -#ifdef CONFIG_XEN_PVH -# define FEATURES_PVH (1 << XENFEAT_linux_rsdp_unrestricted) +#ifdef CONFIG_XEN_PVHVM +# define FEATURES_PVHVM (1 << XENFEAT_linux_rsdp_unrestricted) #else -# define FEATURES_PVH 0 +# define FEATURES_PVHVM 0 #endif #ifdef CONFIG_XEN_DOM0 # define FEATURES_DOM0 (1 << XENFEAT_dom0) @@ -173,7 +173,7 @@ SYM_FUNC_END(xen_hypercall_intel) # define FEATURES_DOM0 0 #endif ELFNOTE(Xen, XEN_ELFNOTE_SUPPORTED_FEATURES, - .long FEATURES_PV | FEATURES_PVH | FEATURES_DOM0) + .long FEATURES_PV | FEATURES_PVHVM | FEATURES_DOM0) ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz "generic") ELFNOTE(Xen, XEN_ELFNOTE_SUSPEND_CANCEL, .long 1) diff --git a/include/xen/xen.h b/include/xen/xen.h index f280c5dcf923..4d066fbf9714 100644 --- a/include/xen/xen.h +++ b/include/xen/xen.h @@ -16,7 +16,7 @@ extern enum xen_domain_type xen_domain_type; #define xen_domain_type XEN_NATIVE #endif -#ifdef CONFIG_XEN_PVH +#ifdef CONFIG_XEN_PVHVM extern bool xen_pvh; #else #define xen_pvh 0 -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue Feb 24 10:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 10:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239808.1541214 (Exim 4.92) (envelope-from ) id 1vuq49-0005Fy-1j; Tue, 24 Feb 2026 10:54:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239808.1541214; Tue, 24 Feb 2026 10:54:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuq48-0005Fr-V1; Tue, 24 Feb 2026 10:54:56 +0000 Received: by outflank-mailman (input) for mailman id 1239808; Tue, 24 Feb 2026 10:54:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuq46-0005Fl-Rz for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 10:54:54 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3fa699f9-116f-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 11:54:53 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-4359a302794so4000265f8f.1 for ; Tue, 24 Feb 2026 02:54:53 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 02:54:52 -0800 (PST) Message-ID: <17c88ded-48cd-4642-91a4-03fc4575a7ea@suse.com> Date: Tue, 24 Feb 2026 11:54:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 03/14] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <8c2259991754f219ba030606f39d629eb365b01c.1771590794.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8c2259991754f219ba030606f39d629eb365b01c.1771590794.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.02.2026 17:18, Oleksii Kurochko wrote: > Based on Linux kernel v6.16.0. > Note that smp_wmb() is used instead of smp_mb__before_atomic() as what > we want to guarantee that if a bit in irqs_pending_mask is obversable > that the correspondent bit in irqs_pending is observable too. > > Add lockless tracking of pending vCPU interrupts using atomic bitops. > Two bitmaps are introduced: > - irqs_pending — interrupts currently pending for the vCPU > - irqs_pending_mask — bits that have changed in irqs_pending > > The design follows a multi-producer, single-consumer model, where the > consumer is the vCPU itself. Producers may set bits in > irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is > performed only by the consumer via xchg(). The consumer must not write > to irqs_pending and must not act on bits that are not set in the mask. > Otherwise, extra synchronization should be provided. > > On RISC-V interrupts are not injected via guest registers, so pending > interrupts must be recorded in irqs_pending (using the new > vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating > HVIP before returning control to the guest. The consumer side is > implemented in a follow-up patch. > > A barrier between updating irqs_pending and setting the corresponding > mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees > that if the consumer observes a mask bit set, the corresponding pending > bit is also visible. This prevents missed interrupts during the flush. > > It is possible that a guest could have pending bit in the hardware > register without being marked pending in irq_pending bitmap as: > According to the RISC-V ISA specification: > Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and > interrupt-enable bits for VS-level software interrupts. VSSIP in hip > is an alias (writable) of the same bit in hvip. > Additionally: > When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only > zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and > hie.VSSIE. > This means the guest may modify vsip.SSIP, which implicitly updates > hip.VSSIP and the bit being written with 1 would also trigger an interrupt > as according to the RISC-V spec: > These conditions for an interrupt trap to occur must be evaluated in a > bounded amount of time from when an interrupt becomes, or ceases to be, > pending in sip, and must also be evaluated immediately following the > execution of an SRET instruction or an explicit write to a CSR on which > these interrupt trap conditions expressly depend (including sip, sie and > sstatus). > What means that IRQ_VS_SOFT must be synchronized separately, what is done > in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be > synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as > PMU isn't supported now. > > For the remaining VS-level interrupt types (IRQ_VS_TIMER and > IRQ_VS_EXT), the specification states they cannot be modified by the guest > and are read-only because of: > Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable > bits for VS-level external interrupts. VSEIP is read-only in hip, and is > the logical-OR of these interrupt sources: > • bit VSEIP of hvip; > • the bit of hgeip selected by hstatus.VGEIN; and > • any other platform-specific external interrupt signal directed to > VS-level. > Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable > bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the > logical-OR of hvip.VSTIP and any other platform-specific timer interrupt > signal directed to VS-level. > and > When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. > Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. > > When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. > Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. > and also, > Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable > bits for supervisor-level external interrupts. If implemented, SEIP is > read-only in sip, and is set and cleared by the execution environment, > typically through a platform-specific interrupt controller. > > Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable > bits for supervisor-level timer interrupts. If implemented, STIP is > read-only in sip, and is set and cleared by the execution environment > Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() > and vcpu_unset_interrupt(), and flush them during the call of > vcpu_flush_interrupts() (which is introduced in follow up patch). > > vcpu_sync_interrupts(), which is called just before entering the VM, > slightly bends the rule that the irqs_pending bit must be written > first, followed by updating the corresponding bit in irqs_pending_mask. > However, it still respects the core guarantee that the producer never > clears the mask and only writes to irqs_pending if it is the one that > flipped the corresponding mask bit from 0 to 1. > Moreover, since the consumer won't run concurrently because > vcpu_sync_interrupts() and the consumer path are going to be invoked > sequentially immediately before VM entry, it is safe to slightly relax > this ordering rule in vcpu_sync_interrupts(). > > Signed-off-by: Oleksii Kurochko > --- > Changes in v5: > - Update the commit message(). > - Rename c to curr. > - Update vcpu_set_interrupt() to use test_and_set_bit() for irqs_pending > bitmask too. > - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_sync_interrupts(). > --- > Changes in v4: > - Update the commit message. > - Update the comments in vcpu_(un)set_interrupt() and add the the comment > above smp_wmb() barrier. > - call vcpu_kick() only if the pending_mask bit going from 0 to 1. > - Code style fixes. > - Update defintion of RISCV_VCPU_NR_IRQS to cover potential RV128 case and > the case if AIA isn't used. > - latch current into a local variable in check_for_pcpu_work(). > --- > Changes in v3: > - Use smp_wb() instead of smp_mb__before_atomic(). > - Add explanation of the change above in the commit message. > - Move vcpu_sync_interrupts() here to producers side. > - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() > is called. > --- > Changes in V2: > - Move the patch before an introduction of vtimer. > - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as > vcpu structure starts out all zeros. > - Drop const for irq argument of vcpu_{un}set_interrupt(). > - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it > could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. > - Drop IRQ_LOCAL_MAX as there is no usage for it now. > --- > xen/arch/riscv/domain.c | 75 +++++++++++++++++++++++++++++ > xen/arch/riscv/include/asm/domain.h | 23 +++++++++ > xen/arch/riscv/traps.c | 4 ++ > 3 files changed, 102 insertions(+) > > diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c > index c9494db0fbe7..335c41f3e5a1 100644 > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -6,6 +6,7 @@ > #include > #include > > +#include > #include > #include > #include > @@ -140,6 +141,80 @@ void arch_vcpu_destroy(struct vcpu *v) > vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); > } > > +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) > +{ > + bool kick_vcpu; > + > + /* We only allow VS-mode software, timer, and external interrupts */ > + if ( irq != IRQ_VS_SOFT && > + irq != IRQ_VS_TIMER && > + irq != IRQ_VS_EXT ) > + return -EINVAL; > + > + kick_vcpu = !test_and_set_bit(irq, v->arch.irqs_pending); > + > + /* > + * The counterpart of this barrier is the one encoded implicitly in xchg() > + * which is used in consumer part (vcpu_flush_interrupts()). > + */ > + smp_wmb(); > + > + kick_vcpu |= !test_and_set_bit(irq, v->arch.irqs_pending_mask); > + > + if ( kick_vcpu ) > + vcpu_kick(v); > + > + return 0; > +} > + > +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) > +{ > + /* We only allow VS-mode software, timer, external interrupts */ > + if ( irq != IRQ_VS_SOFT && > + irq != IRQ_VS_TIMER && > + irq != IRQ_VS_EXT ) > + return -EINVAL; > + > + clear_bit(irq, v->arch.irqs_pending); > + /* > + * The counterpart of this barrier is the one encoded implicitly in xchg() > + * which is used in consumer part (vcpu_flush_interrupts()). > + */ > + smp_wmb(); > + set_bit(irq, v->arch.irqs_pending_mask); > + > + return 0; > +} > + > +void vcpu_sync_interrupts(struct vcpu *v) > +{ > + unsigned long hvip; > + > + /* Read current HVIP and VSIE CSRs */ > + v->arch.vsie = csr_read(CSR_VSIE); What is this needed for, btw? There's no consumer of the field, and the register can change right after re-entering the guest. > --- a/xen/arch/riscv/include/asm/domain.h > +++ b/xen/arch/riscv/include/asm/domain.h > @@ -54,8 +54,26 @@ struct arch_vcpu { > register_t hideleg; > register_t henvcfg; > register_t hstateen0; > + register_t hvip; > > register_t vsatp; > + register_t vsie; Somewhat dependent upon the question above, might hvip and vsie also better sit close together? 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In particular, > memory decoding might be disabled and the BARs might be zeroed. In this > case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() > unconditionally attempts to punch holes in p2m, leading to init_msix() > failing: > > (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area > (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it > > vpci_make_msix_hole() should only attempt to punch holes if the BARs > containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper > for checking if a BAR is enabled, and add a check for the situation > inside vpci_make_msix_hole(). > > Move the vpci_make_msix_hole() call within modify_decoding() to after > setting ->enabled. I would maybe make it clear that the movement of the vpci_make_msix_hole() call in modify_decoding() is due to the extra requirement added in this patch that ->enabled must be set before calling the function. "As a result of the newly introduced checks in vpci_make_msix_hole(), move the ..." Or something along the lines. > > Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") > Signed-off-by: Stewart Hildebrand > --- > Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2344925375 > > v1->v2: > * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") > * move BAR enabled check to inside vpci_make_msix_hole() > * introduce vmsix_table_bar_valid() helper > * move vpci_make_msix_hole() call within modify_decoding() to after > setting ->enabled > * split typo fixup to separate patch > > v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t > --- > xen/drivers/vpci/header.c | 26 +++++++++++++------------- > xen/drivers/vpci/msix.c | 4 ++++ > xen/include/xen/vpci.h | 6 ++++++ > 3 files changed, 23 insertions(+), 13 deletions(-) > > diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c > index 739a5f610e91..6a28e07a625b 100644 > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, > bool map = cmd & PCI_COMMAND_MEMORY; > unsigned int i; > > - /* > - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses > - * can be trapped (and emulated) by Xen when the memory decoding bit is > - * enabled. > - * > - * FIXME: punching holes after the p2m has been set up might be racy for > - * DomU usage, needs to be revisited. > - */ > -#ifdef CONFIG_HAS_PCI_MSI > - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) > - return; > -#endif > - > for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) > { > struct vpci_bar *bar = &header->bars[i]; > @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, > bar->enabled = map; > } > > + /* > + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses > + * can be trapped (and emulated) by Xen when the memory decoding bit is > + * enabled. > + * > + * FIXME: punching holes after the p2m has been set up might be racy for > + * DomU usage, needs to be revisited. > + */ > +#ifdef CONFIG_HAS_PCI_MSI > + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) > + return; > +#endif > + > if ( !rom_only ) > { > pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); > diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c > index 516282205a53..142cfbae59d5 100644 > --- a/xen/drivers/vpci/msix.c > +++ b/xen/drivers/vpci/msix.c > @@ -598,6 +598,10 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) > if ( !pdev->vpci->msix ) > return 0; > > + if ( !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_TABLE) && > + !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_PBA) ) > + return 0; As Jan pointed out, this needs to be moved inside the loop. Thanks, Roger. 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Tue, 24 Feb 2026 03:01:31 -0800 (PST) Message-ID: <3a08a2d0-a18f-40e1-b9bf-9b71e0c797c0@suse.com> Date: Tue, 24 Feb 2026 12:01:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] x86/xen: Consider Xen PVH support in CONFIG_XEN_PVHVM To: Teddy Astie Cc: Juergen Gross , Boris Ostrovsky , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 11:51, Teddy Astie wrote: > It's currently possible to build Linux with CONFIG_PVH|CONFIG_XEN_PVHVM > and no CONFIG_XEN_PVH. In which case, how can you expect Xen PVH to work? > That leads to inconsistent kernels that fails with > "Missing xen PVH initialization" when booting using PVH boot method or > display various errors and fail to initialize Xen PV drivers when booting > with PVH-GRUB. > > platform_pci_unplug: Xen Platform PCI: unrecognised magic value > ... > # modprobe xen-blkfront > modprobe: ERROR: could not insert 'xen_blkfront': No such device > # modprobe xen-netfront > modprobe: ERROR: could not insert 'xen_netfront': No such device > > When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, hence when > booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even when we aren't > actually one (in the "with HVM emulated devices" sense). > > As it is actually possible to boot Xen PVH without CONFIG_PVH; and that most > Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests support > within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. XEN_PVHVM serves a different purpose though, iirc. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------Kf11xA0ozTVq0sXtf8haZz0V" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------Kf11xA0ozTVq0sXtf8haZz0V Content-Type: multipart/mixed; boundary="------------qfa6m4ZlcNkoswR7Fwstf6OK"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich , Teddy Astie Cc: Boris Ostrovsky , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Message-ID: <1395c35e-0e2a-4eeb-addf-66f262ba0d91@suse.com> Subject: Re: [RFC PATCH] x86/xen: Consider Xen PVH support in CONFIG_XEN_PVHVM References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> <3a08a2d0-a18f-40e1-b9bf-9b71e0c797c0@suse.com> In-Reply-To: <3a08a2d0-a18f-40e1-b9bf-9b71e0c797c0@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------qfa6m4ZlcNkoswR7Fwstf6OK Content-Type: multipart/mixed; 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b=KCPtQE+GaZ8ESaDso+PsLU6OAO2HeWUiLrHgqYMCwVG2qc6mBwBRcIztB64c/uouCqXFUgbuYumySYwcwZXZFuVmqXxek1+FXaKRKOsjQtRXHR3cg3jMyZb+eHK5h6zxXXdhmlTyEN2ciAKQT4nrnkYhwlnB+VRJg5K9pq+v4lg= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Tue, 24 Feb 2026 12:14:15 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Teddy Astie Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Juergen Gross , Boris Ostrovsky , Oleksandr Tyshchenko Subject: Re: [RFC PATCH] x86/xen: Consider Xen PVH support in CONFIG_XEN_PVHVM Message-ID: References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> X-ClientProxiedBy: MR1P264CA0004.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:2e::9) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|CH7PR03MB7954:EE_ X-MS-Office365-Filtering-Correlation-Id: 4d3a66e8-4566-47eb-6dd5-08de7395dadb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7053199007; 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That leads to inconsistent kernels that fails with > "Missing xen PVH initialization" when booting using PVH boot method or > display various errors and fail to initialize Xen PV drivers when booting > with PVH-GRUB. > > platform_pci_unplug: Xen Platform PCI: unrecognised magic value > ... > # modprobe xen-blkfront > modprobe: ERROR: could not insert 'xen_blkfront': No such device > # modprobe xen-netfront > modprobe: ERROR: could not insert 'xen_netfront': No such device > > When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, hence when > booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even when we aren't > actually one (in the "with HVM emulated devices" sense). > > As it is actually possible to boot Xen PVH without CONFIG_PVH; and that most > Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests support > within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. So the current CONFIG_PVH selection done by CONFIG_XEN_PVH is moot? > Keep CONFIG_XEN_PVH as a shortcut to enable PVH boot, ACPI support and PVHVM. > > Signed-off-by: Teddy Astie > --- > Cc: Juergen Gross > Cc: Boris Ostrovsky > Cc: Oleksandr Tyshchenko > > A tentative patch, I'm not sure of the way of dealing with the KConfig part, > keeping CONFIG_XEN_PVH as a shortcut is interesting, but there may be other > options. > > There are widespreadly used Linux distributions that have a similar configuration > to this one, thus exhibit this issue i.e fail to boot. Do you know the underlying cause of not enabling CONFIG_XEN_PVH? Is the default set to n on the defconfig? Or are distros specifically disabling this option on purpose? It seems like a step backwards to merge this into some bigger generic option, we always try to fine-grain as much as possible. Maybe you could introduce XEN_HVM meta option, that selects both PVHVM and PVH? Thanks, Roger. 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Tue, 24 Feb 2026 03:15:49 -0800 (PST) Message-ID: <1420bb66-0188-4836-819a-c04f3e98cb2b@suse.com> Date: Tue, 24 Feb 2026 12:15:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/7] tools/tests/*/Makefile: factor out build rules To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , xen-devel@lists.xenproject.org References: <57d93b2a6e9f3cdc70e4446c469226dc015a1944.1771840831.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <57d93b2a6e9f3cdc70e4446c469226dc015a1944.1771840831.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > Also makes CFLAGS consistent across all tests, e.g. test_vpci would now > fail to build with an unused variable error if it hadn't been fixed in a > previous commit. I can't quite derive why that would happen. > --- a/tools/tests/Rules.mk > +++ b/tools/tests/Rules.mk > @@ -45,4 +45,13 @@ install: all > uninstall: > $(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC)/tests/,$(TARGETS)) > > +CFLAGS += -D__XEN_TOOLS__ > +CFLAGS += $(CFLAGS_xeninclude) > + > +%.o: Makefile > + > +$(TARGET): $(TARGET).o > + $(CC) $^ -o $@ $(LDFLAGS) $(APPEND_LDFLAGS) In the earlier patch you require TARGETS to be surfaced. Why would we limit things to a single target here then? Imo we want to settle on every subdir having a single target, or the abstraction allowing for multiple. > -include $(DEPS_INCLUDE) > + Nit: Stray change? > --- a/tools/tests/cpu-policy/Makefile > +++ b/tools/tests/cpu-policy/Makefile > @@ -3,26 +3,19 @@ include $(XEN_ROOT)/tools/Rules.mk > > TARGETS := > > +TARGET := test-cpu-policy > + > # For brevity, these tests make extensive use of designated initialisers in > # anonymous unions, but GCCs older than 4.6 can't cope. Ignore the test in > # this case. > ifneq ($(gcc)$(call cc-ver,$(CC),lt,0x040600),yy) > -TARGETS += test-cpu-policy > +TARGETS += $(TARGET) > else > $(warning Test harness not built, use newer compiler than "$(CC)" (version $(shell $(CC) -dumpversion))) > endif > > -CFLAGS += -D__XEN_TOOLS__ > -CFLAGS += $(CFLAGS_xeninclude) > -CFLAGS += $(APPEND_CFLAGS) > - > -LDFLAGS += $(APPEND_LDFLAGS) You use $(APPEND_LDFLAGS) in the new rule (without adding to LDFLAGS), but where did $(APPEND_CFLAGS) go? > --- /dev/null > +++ b/tools/tests/vpci/.gitignore > @@ -0,0 +1 @@ > +test_vpci.c > diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile > index 597303e31d..41ff867cdd 100644 > --- a/tools/tests/vpci/Makefile > +++ b/tools/tests/vpci/Makefile > @@ -4,10 +4,14 @@ include $(XEN_ROOT)/tools/Rules.mk > TARGET := test_vpci > TARGETS := $(TARGET) > > -$(TARGET): vpci.c vpci.h list.h main.c emul.h > - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c > +$(TARGET).c: main.c > + ln -sf $< $@ Can we perhaps try to avoid further symlinking, unless absolutely necessary? Here it looks to be easy to rename main.c into test_vpci.c (yet better would be test-vcpi.c). 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Tue, 24 Feb 2026 03:23:19 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 12:23:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] x86/xen: Consider Xen PVH support in CONFIG_XEN_PVHVM To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Boris Ostrovsky , Oleksandr Tyshchenko References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; 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Can't ... >>>> I agree that this is change is okay to be done but I am not sure about ... >>>> >>>>>> + csr_set(CSR_##csr, ULONG_MAX); \ >>>>> ... csr_swap() be used here, too? >>>> ... as after re-reading spec again I am not sure that we can do in this way >>>> at all. >>>> >>>> Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to >>>> take into account a writability of the bit, so it won't touch a bit if it >>>> is r/o. >>> To me the spec isn't quite clear enough in this regard. >>> >>>> But it seems like this approach won't work with**WLRL or WPRI fields as these >>>> fields aren't r/o, >>> In the CSRs presently dealt with, are there any WLRL fields at all? (I don't >>> think WPRI fields represent much of an issue for the purpose here.) >> Agree, currently used CSRs in this function don't have WLRL feilds, but I suppose >> we want to have the similar treatment (read WLRL fields and reuse what was read) >> for WLRL fields as these fields expect only valid value and so all 1s for this >> fields can be wrong to use. >> >>>> but they only support specific value and for example: >>>> >>>> - Implementations are permitted but not required to raise an >>>> illegal-instruction exception if an instruction attempts to write a >>>> non-supported value to a WLRL field. >>>> - For these reserved fields, software is required to preserve the existing >>>> values when writing to other fields in the same register. Overwriting them >>>> with 1s could be considered non-compliant behavior. >>>> >>>> So it seems like we can't just do csr_swap() with all 1s and it is needed >>>> to pass a mask to INIT_CSR_MASK() which will tell which bits should be >>>> ignored and don't touched. >>>> For example, HENVCFG and HSTATEEN0 has WPRI fields. >>>> >>>> reserved_bits_mask = 0x1FFFFFFCFFFFFF00; >>>> tmp = csr_read(HENVCFG); >>>> tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); >>> What I find further concerning is that HSTATEEN0 also may have read-only-1 >>> fields. You don't currently cope with that, I think. >> Because of this: >> A bit in an hstateen CSR cannot be read-only one unless the same bit is >> read-only one in the matching mstateen CSR. >> ? >> >> I expect that it will be covered by csr_set() which will touch only writable >> bits and ignore read-only. So doesn't matter if a bit is read only 1 or 0 >> it still shouldn't be in the final mask. > But the hypervisor view of the register value seen by guests won't be correct. > Recall that you moved to probing to make sure that the cached values we have > in the hypervisor properly match the values seen by the guest? Then we have to store what csr_read(hstateen0) returns in struct csr_masks in new field hstateen0_ro_ones. And then in the next patch apply that new field in vcpu_csr_init(): v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0 | csr_masks.hstateen0_ro_ones; Are you okay with such changes? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 24 11:27:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 11:27:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239897.1541301 (Exim 4.92) (envelope-from ) id 1vuqZT-0005Nj-8N; Tue, 24 Feb 2026 11:27:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239897.1541301; Tue, 24 Feb 2026 11:27:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuqZT-0005Nc-5V; Tue, 24 Feb 2026 11:27:19 +0000 Received: by outflank-mailman (input) for mailman id 1239897; Tue, 24 Feb 2026 11:27:17 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vuqZR-0005NU-Dz for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 11:27:17 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c4dd8af7-1173-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 12:27:14 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so67076545e9.2 for ; Tue, 24 Feb 2026 03:27:15 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 03:27:14 -0800 (PST) Message-ID: <791af615-c49d-45a8-825e-3ac3a1d31118@suse.com> Date: Tue, 24 Feb 2026 12:27:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/7] tools/tests: factor out common helpers To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , xen-devel@lists.xenproject.org References: <1fc62b8c258f9113c8bfd6401b71c411707fc3f7.1771840831.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1fc62b8c258f9113c8bfd6401b71c411707fc3f7.1771840831.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > --- a/tools/tests/Rules.mk > +++ b/tools/tests/Rules.mk > @@ -47,11 +47,14 @@ uninstall: > > CFLAGS += -D__XEN_TOOLS__ > CFLAGS += $(CFLAGS_xeninclude) > +CFLAGS += -I../common/ > > %.o: Makefile > > $(TARGET): $(TARGET).o > $(CC) $^ -o $@ $(LDFLAGS) $(APPEND_LDFLAGS) > > +$(TARGETS): $(XEN_ROOT)/tools/tests/common/tests.o > + > -include $(DEPS_INCLUDE) > > diff --git a/tools/tests/common/tests.c b/tools/tests/common/tests.c > new file mode 100644 > index 0000000000..43d9ea5442 > --- /dev/null > +++ b/tools/tests/common/tests.c > @@ -0,0 +1,15 @@ > +#include "tests.h" > + > +unsigned int nr_failures; > + > +int main(int argc, char *argv[argc+1]) Nit (style): Blanks around + please. > +{ > + int rc = test_main(argc, argv); > + > + if ( nr_failures ) > + printf("Done: %u failures\n", nr_failures); > + else > + printf("Done: all ok\n"); > + > + return rc ? rc : !!nr_failures; Nit: No need for the middle operand; we use that extension extensively. > --- /dev/null > +++ b/tools/tests/common/tests.h > @@ -0,0 +1,18 @@ > +#include > +#include > + > +extern unsigned int nr_failures; > + > +#define fail(fmt, ...) \ > +({ \ > + nr_failures++; \ > + (void)printf(fmt, ##__VA_ARGS__); \ > +}) > + > +#define verify(exp, fmt, args...) \ > +while (!(exp)) { \ > + printf(fmt, ## args); \ > + exit(EX_SOFTWARE); \ > +} For both macros, please be consistent in how you want to deal with the variable number of arguments. For the latter macro, like the former it wants to be coded such that a semicolon and the use site is necessary (and doesn't end up as a stray one). > --- a/tools/tests/cpu-policy/test-cpu-policy.c > +++ b/tools/tests/cpu-policy/test-cpu-policy.c > @@ -650,7 +650,7 @@ static void test_is_compatible_failure(void) > } > } > > -int main(int argc, char **argv) > +int test_main(int argc, char **argv) Elsewhere you switch to argv[argc + 1] - why not here? > --- a/tools/tests/pdx/test-pdx.c > +++ b/tools/tests/pdx/test-pdx.c > @@ -5,6 +5,7 @@ > * Copyright (C) 2025 Cloud Software Group > */ > > +#include "tests.h" > #include "harness.h" > > #include "../../xen/common/pdx.c" > @@ -29,7 +30,7 @@ static void print_ranges(const struct range *r) > } > } > > -int main(int argc, char **argv) > +int main(int argc, char *argv[argc+1]) > { > static const struct { > struct range ranges[MAX_RANGES]; No renaming to test_main() here? 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Tue, 24 Feb 2026 03:32:24 -0800 (PST) Message-ID: <1f2f7f37-0a2b-407f-918a-ac35cbbd5cd4@suse.com> Date: Tue, 24 Feb 2026 12:32:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> <541a6c57-406c-49e5-8b8b-019e30bf0d89@suse.com> <5e4362ed-c310-442b-a742-ca7c3d1c47dc@gmail.com> <42847a9e-71e1-47a0-b4fb-7d8c91370bf4@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <42847a9e-71e1-47a0-b4fb-7d8c91370bf4@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 12:25, Oleksii Kurochko wrote: > > On 2/24/26 11:47 AM, Jan Beulich wrote: >> On 24.02.2026 11:42, Oleksii Kurochko wrote: >>> On 2/24/26 11:16 AM, Jan Beulich wrote: >>>> On 24.02.2026 10:44, Oleksii Kurochko wrote: >>>>> On 2/24/26 9:07 AM, Jan Beulich wrote: >>>>>> On 20.02.2026 17:18, Oleksii Kurochko wrote: >>>>>>> --- a/xen/arch/riscv/domain.c >>>>>>> +++ b/xen/arch/riscv/domain.c >>>>>>> @@ -2,9 +2,39 @@ >>>>>>> >>>>>>> #include >>>>>>> #include >>>>>>> +#include >>>>>>> #include >>>>>>> #include >>>>>>> >>>>>>> +#include >>>>>>> +#include >>>>>>> + >>>>>>> +struct csr_masks { >>>>>>> + register_t hedeleg; >>>>>>> + register_t henvcfg; >>>>>>> + register_t hideleg; >>>>>>> + register_t hstateen0; >>>>>>> +}; >>>>>>> + >>>>>>> +static struct csr_masks __ro_after_init csr_masks; >>>>>>> + >>>>>>> +void __init init_csr_masks(void) >>>>>>> +{ >>>>>>> +#define INIT_CSR_MASK(csr, field) do { \ >>>>>>> + register_t old; \ >>>>>>> + old = csr_read(CSR_##csr); \ >>>>>> Can't this be the initializer of the variable? Can't ... >>>>> I agree that this is change is okay to be done but I am not sure about ... >>>>> >>>>>>> + csr_set(CSR_##csr, ULONG_MAX); \ >>>>>> ... csr_swap() be used here, too? >>>>> ... as after re-reading spec again I am not sure that we can do in this way >>>>> at all. >>>>> >>>>> Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to >>>>> take into account a writability of the bit, so it won't touch a bit if it >>>>> is r/o. >>>> To me the spec isn't quite clear enough in this regard. >>>> >>>>> But it seems like this approach won't work with**WLRL or WPRI fields as these >>>>> fields aren't r/o, >>>> In the CSRs presently dealt with, are there any WLRL fields at all? (I don't >>>> think WPRI fields represent much of an issue for the purpose here.) >>> Agree, currently used CSRs in this function don't have WLRL feilds, but I suppose >>> we want to have the similar treatment (read WLRL fields and reuse what was read) >>> for WLRL fields as these fields expect only valid value and so all 1s for this >>> fields can be wrong to use. >>> >>>>> but they only support specific value and for example: >>>>> >>>>> - Implementations are permitted but not required to raise an >>>>> illegal-instruction exception if an instruction attempts to write a >>>>> non-supported value to a WLRL field. >>>>> - For these reserved fields, software is required to preserve the existing >>>>> values when writing to other fields in the same register. Overwriting them >>>>> with 1s could be considered non-compliant behavior. >>>>> >>>>> So it seems like we can't just do csr_swap() with all 1s and it is needed >>>>> to pass a mask to INIT_CSR_MASK() which will tell which bits should be >>>>> ignored and don't touched. >>>>> For example, HENVCFG and HSTATEEN0 has WPRI fields. >>>>> >>>>> reserved_bits_mask = 0x1FFFFFFCFFFFFF00; >>>>> tmp = csr_read(HENVCFG); >>>>> tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); >>>> What I find further concerning is that HSTATEEN0 also may have read-only-1 >>>> fields. You don't currently cope with that, I think. >>> Because of this: >>> A bit in an hstateen CSR cannot be read-only one unless the same bit is >>> read-only one in the matching mstateen CSR. >>> ? >>> >>> I expect that it will be covered by csr_set() which will touch only writable >>> bits and ignore read-only. So doesn't matter if a bit is read only 1 or 0 >>> it still shouldn't be in the final mask. >> But the hypervisor view of the register value seen by guests won't be correct. >> Recall that you moved to probing to make sure that the cached values we have >> in the hypervisor properly match the values seen by the guest? > > Then we have to store what csr_read(hstateen0) returns in struct csr_masks in > new field hstateen0_ro_ones. And then in the next patch apply that new field > in vcpu_csr_init(): > v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0 | > csr_masks.hstateen0_ro_ones; > > Are you okay with such changes? Properly structured, sure. That's pretty much unavoidable, isn't it? As to "structured", for example I wonder whether hstateen0_ro_ones isn't going to lead to redundancies once further registers appear which may have r/o-1 fields. Maybe there should be "ro_one" sub-struct right away? And of course "structured" also touches on proper parenthesization of the statement above. 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Tue, 24 Feb 2026 03:36:45 -0800 (PST) Message-ID: <92a9c5a3-1084-4efd-97c2-350a41167038@suse.com> Date: Tue, 24 Feb 2026 12:36:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/7] tools/tests/common: ensure error messages have a newline To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > Otherwise messages from the next test will end up on the same line as an > error message from a previous test. > (calling `fail` is not fatal). Will they? Glancing quickly over the uses of fail(), I see most if not all of them using a newline. Same for verify(). Imo either all use sites have newlines, or all use sites lose them in favor of adding them centrally ... > --- a/tools/tests/common/tests.h > +++ b/tools/tests/common/tests.h > @@ -6,12 +6,12 @@ extern unsigned int nr_failures; > #define fail(fmt, ...) \ > ({ \ > nr_failures++; \ > - (void)printf(fmt, ##__VA_ARGS__); \ > + (void)printf(fmt"\n", ##__VA_ARGS__); \ > }) > > #define verify(exp, fmt, args...) \ > while (!(exp)) { \ > - printf(fmt, ## args); \ > + printf(fmt"\n", ## args); \ > exit(EX_SOFTWARE); \ > } ... here. As a style nit - please have a blank between fmt and the string literal. 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Producers may set bits in >> irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is >> performed only by the consumer via xchg(). The consumer must not write >> to irqs_pending and must not act on bits that are not set in the mask. >> Otherwise, extra synchronization should be provided. >> >> On RISC-V interrupts are not injected via guest registers, so pending >> interrupts must be recorded in irqs_pending (using the new >> vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating >> HVIP before returning control to the guest. The consumer side is >> implemented in a follow-up patch. >> >> A barrier between updating irqs_pending and setting the corresponding >> mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees >> that if the consumer observes a mask bit set, the corresponding pending >> bit is also visible. This prevents missed interrupts during the flush. >> >> It is possible that a guest could have pending bit in the hardware >> register without being marked pending in irq_pending bitmap as: >> According to the RISC-V ISA specification: >> Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and >> interrupt-enable bits for VS-level software interrupts. VSSIP in hip >> is an alias (writable) of the same bit in hvip. >> Additionally: >> When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only >> zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and >> hie.VSSIE. >> This means the guest may modify vsip.SSIP, which implicitly updates >> hip.VSSIP and the bit being written with 1 would also trigger an interrupt >> as according to the RISC-V spec: >> These conditions for an interrupt trap to occur must be evaluated in a >> bounded amount of time from when an interrupt becomes, or ceases to be, >> pending in sip, and must also be evaluated immediately following the >> execution of an SRET instruction or an explicit write to a CSR on which >> these interrupt trap conditions expressly depend (including sip, sie and >> sstatus). >> What means that IRQ_VS_SOFT must be synchronized separately, what is done >> in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be >> synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as >> PMU isn't supported now. >> >> For the remaining VS-level interrupt types (IRQ_VS_TIMER and >> IRQ_VS_EXT), the specification states they cannot be modified by the guest >> and are read-only because of: >> Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable >> bits for VS-level external interrupts. VSEIP is read-only in hip, and is >> the logical-OR of these interrupt sources: >> • bit VSEIP of hvip; >> • the bit of hgeip selected by hstatus.VGEIN; and >> • any other platform-specific external interrupt signal directed to >> VS-level. >> Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable >> bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the >> logical-OR of hvip.VSTIP and any other platform-specific timer interrupt >> signal directed to VS-level. >> and >> When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. >> Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. >> >> When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. >> Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. >> and also, >> Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable >> bits for supervisor-level external interrupts. If implemented, SEIP is >> read-only in sip, and is set and cleared by the execution environment, >> typically through a platform-specific interrupt controller. >> >> Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable >> bits for supervisor-level timer interrupts. If implemented, STIP is >> read-only in sip, and is set and cleared by the execution environment >> Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() >> and vcpu_unset_interrupt(), and flush them during the call of >> vcpu_flush_interrupts() (which is introduced in follow up patch). >> >> vcpu_sync_interrupts(), which is called just before entering the VM, >> slightly bends the rule that the irqs_pending bit must be written >> first, followed by updating the corresponding bit in irqs_pending_mask. >> However, it still respects the core guarantee that the producer never >> clears the mask and only writes to irqs_pending if it is the one that >> flipped the corresponding mask bit from 0 to 1. >> Moreover, since the consumer won't run concurrently because >> vcpu_sync_interrupts() and the consumer path are going to be invoked >> sequentially immediately before VM entry, it is safe to slightly relax >> this ordering rule in vcpu_sync_interrupts(). >> >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v5: >> - Update the commit message(). >> - Rename c to curr. >> - Update vcpu_set_interrupt() to use test_and_set_bit() for irqs_pending >> bitmask too. >> - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_sync_interrupts(). >> --- >> Changes in v4: >> - Update the commit message. >> - Update the comments in vcpu_(un)set_interrupt() and add the the comment >> above smp_wmb() barrier. >> - call vcpu_kick() only if the pending_mask bit going from 0 to 1. >> - Code style fixes. >> - Update defintion of RISCV_VCPU_NR_IRQS to cover potential RV128 case and >> the case if AIA isn't used. >> - latch current into a local variable in check_for_pcpu_work(). >> --- >> Changes in v3: >> - Use smp_wb() instead of smp_mb__before_atomic(). >> - Add explanation of the change above in the commit message. >> - Move vcpu_sync_interrupts() here to producers side. >> - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() >> is called. >> --- >> Changes in V2: >> - Move the patch before an introduction of vtimer. >> - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as >> vcpu structure starts out all zeros. >> - Drop const for irq argument of vcpu_{un}set_interrupt(). >> - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it >> could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. >> - Drop IRQ_LOCAL_MAX as there is no usage for it now. >> --- >> xen/arch/riscv/domain.c | 75 +++++++++++++++++++++++++++++ >> xen/arch/riscv/include/asm/domain.h | 23 +++++++++ >> xen/arch/riscv/traps.c | 4 ++ >> 3 files changed, 102 insertions(+) >> >> diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c >> index c9494db0fbe7..335c41f3e5a1 100644 >> --- a/xen/arch/riscv/domain.c >> +++ b/xen/arch/riscv/domain.c >> @@ -6,6 +6,7 @@ >> #include >> #include >> >> +#include >> #include >> #include >> #include >> @@ -140,6 +141,80 @@ void arch_vcpu_destroy(struct vcpu *v) >> vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); >> } >> >> +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + bool kick_vcpu; >> + >> + /* We only allow VS-mode software, timer, and external interrupts */ >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; >> + >> + kick_vcpu = !test_and_set_bit(irq, v->arch.irqs_pending); >> + >> + /* >> + * The counterpart of this barrier is the one encoded implicitly in xchg() >> + * which is used in consumer part (vcpu_flush_interrupts()). >> + */ >> + smp_wmb(); >> + >> + kick_vcpu |= !test_and_set_bit(irq, v->arch.irqs_pending_mask); >> + >> + if ( kick_vcpu ) >> + vcpu_kick(v); >> + >> + return 0; >> +} >> + >> +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) >> +{ >> + /* We only allow VS-mode software, timer, external interrupts */ >> + if ( irq != IRQ_VS_SOFT && >> + irq != IRQ_VS_TIMER && >> + irq != IRQ_VS_EXT ) >> + return -EINVAL; >> + >> + clear_bit(irq, v->arch.irqs_pending); >> + /* >> + * The counterpart of this barrier is the one encoded implicitly in xchg() >> + * which is used in consumer part (vcpu_flush_interrupts()). >> + */ >> + smp_wmb(); >> + set_bit(irq, v->arch.irqs_pending_mask); >> + >> + return 0; >> +} >> + >> +void vcpu_sync_interrupts(struct vcpu *v) >> +{ >> + unsigned long hvip; >> + >> + /* Read current HVIP and VSIE CSRs */ >> + v->arch.vsie = csr_read(CSR_VSIE); > What is this needed for, btw? There's no consumer of the field, and the register > can change right after re-entering the guest. I missed to clean up that and introduce later. I am going to use it in the function which will verify if vCPU has interrupts and so it would be nice to update v->arch.vsie each time (and not only when context switch is happening) we are in hypervisor to avoid csr_read(CSR_VSIE) each time and have up to date value. For now it could be dropped. > >> --- a/xen/arch/riscv/include/asm/domain.h >> +++ b/xen/arch/riscv/include/asm/domain.h >> @@ -54,8 +54,26 @@ struct arch_vcpu { >> register_t hideleg; >> register_t henvcfg; >> register_t hstateen0; >> + register_t hvip; >> >> register_t vsatp; >> + register_t vsie; > Somewhat dependent upon the question above, might hvip and vsie also better > sit close together? I will take that into account when vsie will be re-introduced. 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Tue, 24 Feb 2026 03:49:40 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 12:49:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/7] tools/tests/tsx: move guest creation to common area To: =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= Cc: Anthony PERARD , xen-devel@lists.xenproject.org References: <78e4cef251a188713e4b2e13fd6185cc2f1d856b.1771840831.git.edwin.torok@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <78e4cef251a188713e4b2e13fd6185cc2f1d856b.1771840831.git.edwin.torok@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.02.2026 11:14, Edwin Török wrote: > --- /dev/null > +++ b/tools/tests/common/guests.c Everything in the file uses singular, si I'd suggest to use singular also for the file name. > @@ -0,0 +1,87 @@ > +#define _GNU_SOURCE > +#include "guests.h" > +#include "tests.h" > + > +#include > +#include > +#include > + > +xc_interface *xch; > +xc_physinfo_t physinfo; > +bool xen_has_pv = true, xen_has_hvm = true; static for at least some of these? > +void test_guest_init(void) > +{ > + int rc; > + xch = xc_interface_open(NULL, NULL, 0); > + > + if ( !xch ) > + err(1, "xc_interface_open"); > + > + rc = xc_physinfo(xch, &physinfo); > + if ( rc ) > + err(1, "Failed to obtain physinfo"); > + > + xen_has_hvm = physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hvm; > + xen_has_pv = physinfo.capabilities & XEN_SYSCTL_PHYSCAP_pv; > +} > + > +void test_guest(struct xen_domctl_createdomain *c) static? > +{ > + uint32_t domid = 0; > + int rc; > + > + if (!xch) Everything else uses Xen style, so this wants to, too. > + return fail("test_guest_init() not called"); > + > + rc = xc_domain_create(xch, &domid, c); > + if ( rc ) > + return fail(" Domain create failure: %d - %s\n", > + errno, strerror(errno)); > + > + printf(" Created d%u\n", domid); > + > + test_guest_domid(domid); This might better be passed as a function pointer, so harnesses can have multiple functions dealing with different aspects of the testing. > + rc = xc_domain_destroy(xch, domid); > + if ( rc ) > + fail(" Failed to destroy domain: %d - %s\n", > + errno, strerror(errno)); > +} > + > +void test_guests(void) > +{ > + if ( xen_has_pv ) > + { > + struct xen_domctl_createdomain c = { > + .max_vcpus = 1, > + .max_grant_frames = 1, > + .grant_opts = XEN_DOMCTL_GRANT_version(1), > + }; > + > + printf("Testing PV guest\n"); To easily distinguish things in the output of a harness creating multiple guests, some disambuating string may want passing in. > + test_guest(&c); > + } > + > + if ( xen_has_hvm ) > + { > + struct xen_domctl_createdomain c = { > + .flags = XEN_DOMCTL_CDF_hvm, > + .max_vcpus = 1, > + .max_grant_frames = 1, > + .grant_opts = XEN_DOMCTL_GRANT_version(1), > + .arch = { > + .emulation_flags = XEN_X86_EMU_LAPIC, > + }, > + }; For starters this may work, but longer term we may need ways to specify certain propertied of the to be created guest(s). > --- /dev/null > +++ b/tools/tests/common/guests.h > @@ -0,0 +1,11 @@ > +#include > +#include > + > +extern void test_guest_domid(domid_t domid); Nit: If this was to stay, no need for "extern", just like ... > +extern xc_interface *xch; > +extern xc_physinfo_t physinfo; > +extern bool xen_has_pv, xen_has_hvm; > + > +void test_guest_init(void); > +void test_guest(struct xen_domctl_createdomain *c); > +void test_guests(void); ... you have none here. > --- a/tools/tests/tsx/Makefile > +++ b/tools/tests/tsx/Makefile > @@ -11,4 +11,6 @@ CFLAGS += $(CFLAGS_libxenguest) > LDFLAGS += $(LDLIBS_libxenctrl) > LDFLAGS += $(LDLIBS_libxenguest) > > +$(TARGET): ../common/guests.o Does this work properly with parallel builds, once more than one test would use it? > --- a/tools/tests/tsx/test-tsx.c > +++ b/tools/tests/tsx/test-tsx.c > @@ -31,6 +31,7 @@ > #include > > #include "tests.h" > +#include "guests.h" Isn't this ../common/guests.h ? Plus perhaps common stuff could go straight in the parent directory anyway? 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Can't ... >>>>>> I agree that this is change is okay to be done but I am not sure about ... >>>>>> >>>>>>>> + csr_set(CSR_##csr, ULONG_MAX); \ >>>>>>> ... csr_swap() be used here, too? >>>>>> ... as after re-reading spec again I am not sure that we can do in this way >>>>>> at all. >>>>>> >>>>>> Initially I used csr_set() instead of csr_swap() or csr_write() as csr_set() to >>>>>> take into account a writability of the bit, so it won't touch a bit if it >>>>>> is r/o. >>>>> To me the spec isn't quite clear enough in this regard. >>>>> >>>>>> But it seems like this approach won't work with**WLRL or WPRI fields as these >>>>>> fields aren't r/o, >>>>> In the CSRs presently dealt with, are there any WLRL fields at all? (I don't >>>>> think WPRI fields represent much of an issue for the purpose here.) >>>> Agree, currently used CSRs in this function don't have WLRL feilds, but I suppose >>>> we want to have the similar treatment (read WLRL fields and reuse what was read) >>>> for WLRL fields as these fields expect only valid value and so all 1s for this >>>> fields can be wrong to use. >>>> >>>>>> but they only support specific value and for example: >>>>>> >>>>>> - Implementations are permitted but not required to raise an >>>>>> illegal-instruction exception if an instruction attempts to write a >>>>>> non-supported value to a WLRL field. >>>>>> - For these reserved fields, software is required to preserve the existing >>>>>> values when writing to other fields in the same register. Overwriting them >>>>>> with 1s could be considered non-compliant behavior. >>>>>> >>>>>> So it seems like we can't just do csr_swap() with all 1s and it is needed >>>>>> to pass a mask to INIT_CSR_MASK() which will tell which bits should be >>>>>> ignored and don't touched. >>>>>> For example, HENVCFG and HSTATEEN0 has WPRI fields. >>>>>> >>>>>> reserved_bits_mask = 0x1FFFFFFCFFFFFF00; >>>>>> tmp = csr_read(HENVCFG); >>>>>> tmp=(~reserved_bits_mask) |(tmp&reserved_bits_mask); csr_set(HENVCFG, tmp); >>>>> What I find further concerning is that HSTATEEN0 also may have read-only-1 >>>>> fields. You don't currently cope with that, I think. >>>> Because of this: >>>> A bit in an hstateen CSR cannot be read-only one unless the same bit is >>>> read-only one in the matching mstateen CSR. >>>> ? >>>> >>>> I expect that it will be covered by csr_set() which will touch only writable >>>> bits and ignore read-only. So doesn't matter if a bit is read only 1 or 0 >>>> it still shouldn't be in the final mask. >>> But the hypervisor view of the register value seen by guests won't be correct. >>> Recall that you moved to probing to make sure that the cached values we have >>> in the hypervisor properly match the values seen by the guest? >> Then we have to store what csr_read(hstateen0) returns in struct csr_masks in >> new field hstateen0_ro_ones. And then in the next patch apply that new field >> in vcpu_csr_init(): >> v->arch.hstateen0 = hstateen0 & csr_masks.hstateen0 | >> csr_masks.hstateen0_ro_ones; >> >> Are you okay with such changes? > Properly structured, sure. That's pretty much unavoidable, isn't it? > > As to "structured", for example I wonder whether hstateen0_ro_ones isn't > going to lead to redundancies once further registers appear which may have > r/o-1 fields. Maybe there should be "ro_one" sub-struct right away? Maybe, it makes sense. I will then update the csr_masks structure in the following way: struct csr_masks { register_t hedeleg; register_t henvcfg; register_t hideleg; register_t hstateen0; struct { hstateen0; } ro_one; }; > > And of course "structured" also touches on proper parenthesization of the > statement above. According to https://en.cppreference.com/w/c/language/operator_precedence.html & has bigger priority, so I haven't put parenthesizes. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue Feb 24 12:34:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 12:34:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1239992.1541454 (Exim 4.92) (envelope-from ) id 1vurcf-0001wb-6U; Tue, 24 Feb 2026 12:34:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1239992.1541454; Tue, 24 Feb 2026 12:34:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurcf-0001wU-2r; Tue, 24 Feb 2026 12:34:41 +0000 Received: by outflank-mailman (input) for mailman id 1239992; Tue, 24 Feb 2026 12:34:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurcd-0001wO-VS for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 12:34:40 +0000 Received: from mail187-10.suw11.mandrillapp.com (mail187-10.suw11.mandrillapp.com [198.2.187.10]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2bbf4dc6-117d-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 13:34:33 +0100 (CET) Received: from pmta09.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail187-10.suw11.mandrillapp.com (Mailchimp) with ESMTP id 4fKxxN0Vjyz5QkLd6 for ; Tue, 24 Feb 2026 12:34:32 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 441dd13042b043e084cde212e7ffca24; Tue, 24 Feb 2026 12:34:32 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2bbf4dc6-117d-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1771936472; x=1772206472; bh=s5qi7uPRrfCegLpwk9h+nXdmi/P0H3e2sU4RGf+LcMQ=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=R68FeCrFEEAxatJkaRUPSfZFmOV1nONhHD4OgqtyMmUJnqyCZp3WfV/h0UxquqgqT Mqt4BNTnVin3aypZ5W4ZrRxptE6vW8hXQ+HMsXV+c6tDThbyg5c1DdII8ymhaujJGp oD3hwUEGkek/EzWtDYYWGLuOR6CkbYXZXjJJvRtkhdYQBd8mJLKWDkev5drRYSU+1x rXQGimU8Z2x52NQwOHNul2ivGzHzxObl2MO6Xz8YliBv6Ic0+jVqYO4PgEq6GZ1mDB V6UGzX07ESrpAMFJNYTq+VNKJ/TNgEDf4gnOx4hf5dFd8HczTYP/n4Pqk9OEKrtJtp 5iiBKY9vGga4w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771936472; x=1772196972; i=teddy.astie@vates.tech; bh=s5qi7uPRrfCegLpwk9h+nXdmi/P0H3e2sU4RGf+LcMQ=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=D5kKCx28xONPo3r2NpigrMCZc+BdJ7Yz2IVWAdOJ/CYkY8DhvOheqwdp/mAzInjy9 90skkDF/+yy1bicT2ZiatWF9DCP8hbyeX+mtH2OI+MLJoH+kv4KI1okU6fBIjNbP8q IjmpRq/EJhOi7A7NiPg9VymG4qn0ifYbRyhvGhueRHCANqx2kEEBaJED3bhyxoBhLW 9yConlS7JAGVr4itTlllYaAHHe/Oz7VnesM8AIf0aAFXmd26almwxbVSKdMsraf+Av mj5cnZKezsjrPUvgISnB7ici9GolrgOvRL1++uCXajqsW1jCoQWRN8s3LLJZyPo3Cv whRXmk+t0ctQA== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH]=20x86/xen:=20Consider=20Xen=20PVH=20support=20in=20CONFIG=5FXEN=5FPVHVM?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771936470614 Message-Id: <962fa327-2e9f-41e5-8382-71ace6fb0a10@vates.tech> To: "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, "Juergen Gross" , "Boris Ostrovsky" , "Oleksandr Tyshchenko" References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.441dd13042b043e084cde212e7ffca24?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260224:md Date: Tue, 24 Feb 2026 12:34:32 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 24/02/2026 =C3=A0 12:16, Roger Pau Monn=C3=A9 a =C3=A9crit=C2=A0: > On Tue, Feb 24, 2026 at 10:51:35AM +0000, Teddy Astie wrote: >> It's currently possible to build Linux with CONFIG_PVH|CONFIG_XEN_PVHVM >> and no CONFIG_XEN_PVH. That leads to inconsistent kernels that fails wit= h >> "Missing xen PVH initialization" when booting using PVH boot method or >> display various errors and fail to initialize Xen PV drivers when bootin= g >> with PVH-GRUB. >> >> platform_pci_unplug: Xen Platform PCI: unrecognised magic value >> ... >> # modprobe xen-blkfront >> modprobe: ERROR: could not insert 'xen_blkfront': No such device >> # modprobe xen-netfront >> modprobe: ERROR: could not insert 'xen_netfront': No such device >> >> When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, hence= when >> booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even when w= e aren't >> actually one (in the "with HVM emulated devices" sense). >> >> As it is actually possible to boot Xen PVH without CONFIG_PVH; and that = most >> Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests sup= port >> within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. > > So the current CONFIG_PVH selection done by CONFIG_XEN_PVH is moot? > >> Keep CONFIG_XEN_PVH as a shortcut to enable PVH boot, ACPI support and P= VHVM. >> >> Signed-off-by: Teddy Astie >> --- >> Cc: Juergen Gross >> Cc: Boris Ostrovsky >> Cc: Oleksandr Tyshchenko >> >> A tentative patch, I'm not sure of the way of dealing with the KConfig p= art, >> keeping CONFIG_XEN_PVH as a shortcut is interesting, but there may be ot= her >> options. >> >> There are widespreadly used Linux distributions that have a similar conf= iguration >> to this one, thus exhibit this issue i.e fail to boot. > > Do you know the underlying cause of not enabling CONFIG_XEN_PVH? Is > the default set to n on the defconfig? Or are distros specifically > disabling this option on purpose? > I'm observing in these distros that > # CONFIG_XEN_PVH is not set > CONFIG_XEN_PVHVM_GUEST=3Dy > CONFIG_XEN_PVHVM=3Dy Which makes CONFIG_XEN_PVH defaults to n. > It seems like a step backwards to merge this into some bigger generic > option, we always try to fine-grain as much as possible. > > Maybe you could introduce XEN_HVM meta option, that selects both PVHVM > and PVH? > > Thanks, Roger. > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue Feb 24 12:46:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 12:46:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240003.1541475 (Exim 4.92) (envelope-from ) id 1vurnn-0003uN-Cr; Tue, 24 Feb 2026 12:46:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240003.1541475; Tue, 24 Feb 2026 12:46:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurnn-0003uG-8n; Tue, 24 Feb 2026 12:46:11 +0000 Received: by outflank-mailman (input) for mailman id 1240003; Tue, 24 Feb 2026 12:46:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurnm-0003tj-3g for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 12:46:10 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c7f41cd5-117e-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 13:46:04 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-436309f1ad7so4199164f8f.3 for ; Tue, 24 Feb 2026 04:46:04 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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No functional change. Signed-off-by: Andrew Cooper --- CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel --- xen/arch/arm/include/asm/smccc.h | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h index 5b30dd57b69d..347c4526d12a 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -114,26 +114,17 @@ struct arm_smccc_res { #define __declare_arg_1(a0, a1, res) \ typeof(a1) __a1 = (a1); \ - struct arm_smccc_res *___res = (res); \ - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ + __declare_arg_0(a0, res); \ register typeof(a1) arg1 ASM_REG(1) = __a1 #define __declare_arg_2(a0, a1, a2, res) \ typeof(a1) __a1 = (a1); \ - typeof(a2) __a2 = (a2); \ - struct arm_smccc_res *___res = (res); \ - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ - register typeof(a1) arg1 ASM_REG(1) = __a1; \ + __declare_arg_1(a0, a1, res); \ register typeof(a2) arg2 ASM_REG(2) = __a2 #define __declare_arg_3(a0, a1, a2, a3, res) \ typeof(a1) __a1 = (a1); \ - typeof(a2) __a2 = (a2); \ - typeof(a3) __a3 = (a3); \ - struct arm_smccc_res *___res = (res); \ - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ - register typeof(a1) arg1 ASM_REG(1) = __a1; \ - register typeof(a2) arg2 ASM_REG(2) = __a2; \ + __declare_arg_2(a0, a1, a2, res); \ register typeof(a3) arg3 ASM_REG(3) = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 12:46:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 12:46:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240002.1541465 (Exim 4.92) (envelope-from ) id 1vurni-0003g7-6R; Tue, 24 Feb 2026 12:46:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240002.1541465; Tue, 24 Feb 2026 12:46:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurni-0003g0-2H; Tue, 24 Feb 2026 12:46:06 +0000 Received: by outflank-mailman (input) for mailman id 1240002; Tue, 24 Feb 2026 12:46:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurng-0003fu-6N for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 12:46:04 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c71f52c4-117e-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 13:46:03 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4359108fd24so3409206f8f.2 for ; Tue, 24 Feb 2026 04:46:03 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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Andrew Cooper (2): xen/arm: Simplify SMCCC handling by reusing __declare_arg_$() xen/arm: Simplify type handling for SMCCC declarations xen/arch/arm/include/asm/smccc.h | 36 +++++++++----------------------- 1 file changed, 10 insertions(+), 26 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 12:46:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 12:46:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240004.1541484 (Exim 4.92) (envelope-from ) id 1vurns-0004BE-J3; Tue, 24 Feb 2026 12:46:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240004.1541484; Tue, 24 Feb 2026 12:46:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurns-0004B7-FJ; Tue, 24 Feb 2026 12:46:16 +0000 Received: by outflank-mailman (input) for mailman id 1240004; Tue, 24 Feb 2026 12:46:15 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vurnr-0003tj-Cy for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 12:46:15 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c8a8cdd5-117e-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 13:46:05 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-436e8758b91so3770570f8f.0 for ; Tue, 24 Feb 2026 04:46:05 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43987f3ed03sm4803236f8f.16.2026.02.24.04.46.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Feb 2026 04:46:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c8a8cdd5-117e-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771937165; x=1772541965; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g4sp/g7nefG7eULFXp8l8pUWsqFfRFPg4pIwmWThBj4=; b=NI1vGpZtD3OUSSmvgxKX5PC/NZKOvoWRA0R3mwY+2t7xDqCAUgZ64IYncg6LKRTG5+ KgtgyGXrB/KWRAWFW5ZFxB1qP4MY3CyzDSYHx56LbfhJleAsPOqnP5Kbc1zf8OSQ69iD vKBWbP2lPxuqeUMSquAxkgsyPg7vwlQSOOw4w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771937165; x=1772541965; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=g4sp/g7nefG7eULFXp8l8pUWsqFfRFPg4pIwmWThBj4=; b=Gu2wzLDq2yGUQJILzXZj7Mqn+IoHbEd2gOUaaxTY9ZqBgla2dvXvmwNKkgqCAXz55+ INsjAZACmRX8OiZAhQ5Rz+bWjWuBViaDUD4KwD1l0VIHQ+M8lWTYsdX3utx3uopg8N9s p3nIQmiQL/lJBV5EqawMcCtJFMSJ1zd9hW1dx+zwBdMWqi7IfjAXQJaBOQFM1U6xntsR SqcFxnHhznXN7CkLrqBbelRIZIHFpWlipEXt6cOtb1AiNR9hjFRTAdO6ZaHVNPOO0hVT Ks1vwgEye3296SRNxqriaWbBl7ph3+ruJnWBthndgoomMKjNm4M1rkBz9b7H1jlKsg5+ prfA== X-Gm-Message-State: AOJu0YzhIvfAiPLRwvGiAIJkDJe3WeGn1t2CqpIDEy58wX2XeK5hVHEa ul5JNcwmAJSZGUBBIaT+h8ivsg1O/8OJgeJM9BRk4/naQVFEEhSkLT0lk28JalYlBvsy2QX0P/O SItW6Pd2vVw== X-Gm-Gg: ATEYQzy+dJgrKBxueC4qoENCUR8d62uVptYpAQb40aFjPO5QR7M3mwlQfC7vONKbl1Y LGTGLT3Yqp1NB5GAErMPOpZnhV55PXlrhw7oc0SW2kJ+hxspgT77VJiFJtoMY2nq0FrOcVGrgS1 BgTyE89FSM/hQQYYFnyDbPFf0aygHn2+aK52C57oG049tIrPeZPg0fBphnDZvHZCUGL0rdYb19e oNJChMH6MG/wT3sbamHS0T5oYOgWHuDz51o5YTeWcgbMHievX2DXWxA+xlk8cuChbi45MTQNQt9 vrDOzdSKfgAjAYhpn1sfGYloIcC7+27UEVEt6YdGEuKYxEAPFrT8UuCsOmpUmRW1j+GKnCnSQLg eu9ILEyPJDvwuIb/yziTa9qUQDy/c0hCvB5DwThhWpkuUIc0XlguBKvDSo+Y9/F7Yq9pUQ+WKos 5uwEgzgaSS65ErgQ1UsahcQuf4kjLfw4Sai697P6hUp/A9QJu/q4iNJ2Hz5vM/9iYoIEh6m7s= X-Received: by 2002:a05:6000:2281:b0:436:19f6:31b0 with SMTP id ffacd0b85a97d-4396f153c41mr23095241f8f.4.1771937164753; Tue, 24 Feb 2026 04:46:04 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel Subject: [PATCH 2/2] xen/arm: Simplify type handling for SMCCC declarations Date: Tue, 24 Feb 2026 12:45:58 +0000 Message-Id: <20260224124558.3675278-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260224124558.3675278-1-andrew.cooper3@citrix.com> References: <20260224124558.3675278-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit There's no use creating a typed copy of a macro argument, simply to use it to create a second typed copy. Remove the indirection, halving the number of local variables created in scope. No functional change. Signed-off-by: Andrew Cooper --- CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel This also makes them clearly elliglbe for converstion to auto, where they weren't before (typeof expression not being that of the RHS). --- xen/arch/arm/include/asm/smccc.h | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h index 347c4526d12a..7e90b0b56550 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -113,39 +113,32 @@ struct arm_smccc_res { register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) #define __declare_arg_1(a0, a1, res) \ - typeof(a1) __a1 = (a1); \ __declare_arg_0(a0, res); \ - register typeof(a1) arg1 ASM_REG(1) = __a1 + register typeof(a1) arg1 ASM_REG(1) = a1 #define __declare_arg_2(a0, a1, a2, res) \ - typeof(a1) __a1 = (a1); \ __declare_arg_1(a0, a1, res); \ - register typeof(a2) arg2 ASM_REG(2) = __a2 + register typeof(a2) arg2 ASM_REG(2) = a2 #define __declare_arg_3(a0, a1, a2, a3, res) \ - typeof(a1) __a1 = (a1); \ __declare_arg_2(a0, a1, a2, res); \ - register typeof(a3) arg3 ASM_REG(3) = __a3 + register typeof(a3) arg3 ASM_REG(3) = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ - typeof(a4) __a4 = (a4); \ __declare_arg_3(a0, a1, a2, a3, res); \ - register typeof(a4) arg4 ASM_REG(4) = __a4 + register typeof(a4) arg4 ASM_REG(4) = a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ - typeof(a5) __a5 = (a5); \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ - register typeof(a5) arg5 ASM_REG(5) = __a5 + register typeof(a5) arg5 ASM_REG(5) = a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ - typeof(a6) __a6 = (a6); \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ - register typeof(a6) arg6 ASM_REG(6) = __a6 + register typeof(a6) arg6 ASM_REG(6) = a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ - typeof(a7) __a7 = (a7); \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ - register typeof(a7) arg7 ASM_REG(7) = __a7 + register typeof(a7) arg7 ASM_REG(7) = a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 12:46:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 12:46:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240007.1541495 (Exim 4.92) (envelope-from ) id 1vuro0-0004Zi-1t; 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a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1771937176; x=1772197676; i=teddy.astie@vates.tech; bh=lXd6UpYAp3t3un2N6Ph54v7LZ+JVCHmjwbvsN8beoWo=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=CA8NzxnEwPLoZxAWhvZqsWJqfHwnYOQKWu1YpH1aWIuS1t979fnql7gqokbSp8dfs b0A0tuAhj58feKMljgf78oKRsrxgVOAGWJZXRyQNeYA4hVUxUkr0IyQm1g/NtdP8NF N6MuvpixrHvP9RJPtTr3IaR2cQtARi/C53IY28xfQ2xE7KImAMNRyu0MFFxUk8crTX maOlTope0DaonbYVJ6n/cjGVjhHPZJGX8CLcFs3VABd/zDRxSE507rujPyTQlQV+ry Gq8RqzeiIIOzhbEcG+NCXzD2O+It0Jy8BignXAkYi5myV2NZayA5PVNcnY1BWRQLmE 5nmREwLH4SzJg== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH]=20x86/xen:=20Consider=20Xen=20PVH=20support=20in=20CONFIG=5FXEN=5FPVHVM?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1771937175070 Message-Id: To: "=?utf-8?Q?J=C3=BCrgen=20Gro=C3=9F?=" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, "Boris Ostrovsky" , "Oleksandr Tyshchenko" References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.d608bee5e0b64c53ae0669005322fb7a?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260224:md Date: Tue, 24 Feb 2026 12:46:15 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 24/02/2026 =C3=A0 12:25, J=C3=BCrgen Gro=C3=9F a =C3=A9crit=C2=A0: > On 24.02.26 12:14, Roger Pau Monn=C3=A9 wrote: >> On Tue, Feb 24, 2026 at 10:51:35AM +0000, Teddy Astie wrote: >>> It's currently possible to build Linux with CONFIG_PVH|CONFIG_XEN_PVHVM >>> and no CONFIG_XEN_PVH. That leads to inconsistent kernels that fails >>> with >>> "Missing xen PVH initialization" when booting using PVH boot method or >>> display various errors and fail to initialize Xen PV drivers when >>> booting >>> with PVH-GRUB. >>> >>> =C2=A0=C2=A0=C2=A0=C2=A0 platform_pci_unplug: Xen Platform PCI: unrecog= nised magic value >>> =C2=A0=C2=A0=C2=A0=C2=A0 ... >>> =C2=A0=C2=A0=C2=A0=C2=A0 # modprobe xen-blkfront >>> =C2=A0=C2=A0=C2=A0=C2=A0 modprobe: ERROR: could not insert 'xen_blkfron= t': No such device >>> =C2=A0=C2=A0=C2=A0=C2=A0 # modprobe xen-netfront >>> =C2=A0=C2=A0=C2=A0=C2=A0 modprobe: ERROR: could not insert 'xen_netfron= t': No such device >>> >>> When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, >>> hence when >>> booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even >>> when we aren't >>> actually one (in the "with HVM emulated devices" sense). >>> >>> As it is actually possible to boot Xen PVH without CONFIG_PVH; and >>> that most >>> Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests >>> support >>> within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. >> >> So the current CONFIG_PVH selection done by CONFIG_XEN_PVH is moot? > > No, it isn't. > > CONFIG_PVH is the common base needed for Xen and KVM guests to be able to > run in PVH mode. > To me, CONFIG_PVH is more about being able to boot using PVH Direct Boot than something else. >> >>> Keep CONFIG_XEN_PVH as a shortcut to enable PVH boot, ACPI support >>> and PVHVM. >>> >>> Signed-off-by: Teddy Astie >>> --- >>> Cc: Juergen Gross >>> Cc: Boris Ostrovsky >>> Cc: Oleksandr Tyshchenko >>> >>> A tentative patch, I'm not sure of the way of dealing with the >>> KConfig part, >>> keeping CONFIG_XEN_PVH as a shortcut is interesting, but there may be >>> other >>> options. >>> >>> There are widespreadly used Linux distributions that have a similar >>> configuration >>> to this one, thus exhibit this issue i.e fail to boot. >> >> Do you know the underlying cause of not enabling CONFIG_XEN_PVH?=C2=A0 I= s >> the default set to n on the defconfig?=C2=A0 Or are distros specifically >> disabling this option on purpose? >> >> It seems like a step backwards to merge this into some bigger generic >> option, we always try to fine-grain as much as possible. >> >> Maybe you could introduce XEN_HVM meta option, that selects both PVHVM >> and PVH? > No, please don't use "HVM" for that purpose. > > If anything I'd set the CONFIG_XEN_PVH default to that of CONFIG_XEN_PVHV= M. > That could work, but that would transitively imply that CONFIG_XEN needs CONFIG_PVH, which I guess we probably want to avoid. As I said, it's not required to boot with "PVH direct boot" for a "PVH guest personality" to work in Linux since [1]. We can eventually consider decoupling CONFIG_XEN_PVH and CONFIG_PVH, but that would break setup that expects that CONFIG_XEN_PVH implies CONFIG_PVH (arch/x86/configs/xen.config in particular). [1] 418492ba "x86/virt/xen: Use guest_late_init to detect Xen PVH guest" > > Juergen Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue Feb 24 13:01:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 13:01:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240044.1541504 (Exim 4.92) (envelope-from ) id 1vus2B-0008Q3-7b; Tue, 24 Feb 2026 13:01:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240044.1541504; Tue, 24 Feb 2026 13:01:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vus2B-0008Pw-4F; Tue, 24 Feb 2026 13:01:03 +0000 Received: by outflank-mailman (input) for mailman id 1240044; Tue, 24 Feb 2026 13:01:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vus29-0008Pq-A6 for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 13:01:01 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id dc42c39a-1180-11f1-9ccf-f158ae23cfc8; Tue, 24 Feb 2026 14:00:57 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so60164435e9.1 for ; Tue, 24 Feb 2026 05:00:57 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 24 Feb 2026 05:00:56 -0800 (PST) Message-ID: Date: Tue, 24 Feb 2026 14:00:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot To: Oleksii Kurochko Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> <541a6c57-406c-49e5-8b8b-019e30bf0d89@suse.com> <5e4362ed-c310-442b-a742-ca7c3d1c47dc@gmail.com> <42847a9e-71e1-47a0-b4fb-7d8c91370bf4@gmail.com> <1f2f7f37-0a2b-407f-918a-ac35cbbd5cd4@suse.com> <42da5eb2-06fb-49aa-8383-cb31f83c3933@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <42da5eb2-06fb-49aa-8383-cb31f83c3933@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.02.2026 13:02, Oleksii Kurochko wrote: > On 2/24/26 12:32 PM, Jan Beulich wrote: >> And of course "structured" also touches on proper parenthesization of the >> statement above. > > According to https://en.cppreference.com/w/c/language/operator_precedence.html > & has bigger priority, so I haven't put parenthesizes. We tend to put them everywhere where rules from school maths don't apply. Jan From xen-devel-bounces@lists.xenproject.org Tue Feb 24 13:53:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 13:53:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240070.1541565 (Exim 4.92) (envelope-from ) id 1vusqv-0007F6-96; Tue, 24 Feb 2026 13:53:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240070.1541565; Tue, 24 Feb 2026 13:53:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vusqv-0007Ew-6M; Tue, 24 Feb 2026 13:53:29 +0000 Received: by outflank-mailman (input) for mailman id 1240070; Tue, 24 Feb 2026 13:53:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vusqt-0007Eq-M1 for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 13:53:27 +0000 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [2a00:1450:4864:20::52c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 30814049-1188-11f1-b164-2bf370ae4941; Tue, 24 Feb 2026 14:53:25 +0100 (CET) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-65f5bd5c8e3so1118914a12.1 for ; Tue, 24 Feb 2026 05:53:25 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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CONFIG_XEN_PVHVM To: Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Boris Ostrovsky , Oleksandr Tyshchenko References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 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ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------QPptFcXq6v9lbURaP95pBHbq" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------QPptFcXq6v9lbURaP95pBHbq Content-Type: multipart/mixed; boundary="------------hoFB35ELV9PuN50zNpHBJNHt"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Boris Ostrovsky , Oleksandr Tyshchenko Message-ID: Subject: Re: [RFC PATCH] x86/xen: Consider Xen PVH support in CONFIG_XEN_PVHVM References: <7b17bfbb4b25a59514707f91546ce8c3a24369e0.1771929804.git.teddy.astie@vates.tech> In-Reply-To: --------------hoFB35ELV9PuN50zNpHBJNHt Content-Type: multipart/mixed; boundary="------------jZClsr1CzM0Z048GPlPJhl0W" --------------jZClsr1CzM0Z048GPlPJhl0W Content-Type: text/plain; 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4210 On 24/02/2026 13:45, Andrew Cooper wrote: > Now that the type handling is entirely uniform, it's easier to see that > __declare_arg_3() can use __declare_arg_2() and so on, just like the larger > __declare_arg_$()'s already do. > > No functional change. This patch won't build. > > Signed-off-by: Andrew Cooper > --- > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > --- > xen/arch/arm/include/asm/smccc.h | 15 +++------------ > 1 file changed, 3 insertions(+), 12 deletions(-) > > diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h > index 5b30dd57b69d..347c4526d12a 100644 > --- a/xen/arch/arm/include/asm/smccc.h > +++ b/xen/arch/arm/include/asm/smccc.h > @@ -114,26 +114,17 @@ struct arm_smccc_res { > > #define __declare_arg_1(a0, a1, res) \ > typeof(a1) __a1 = (a1); \ > - struct arm_smccc_res *___res = (res); \ > - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ > + __declare_arg_0(a0, res); \ > register typeof(a1) arg1 ASM_REG(1) = __a1 > > #define __declare_arg_2(a0, a1, a2, res) \ > typeof(a1) __a1 = (a1); \ You should remove this line and ... > - typeof(a2) __a2 = (a2); \ keep this line. > - struct arm_smccc_res *___res = (res); \ > - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ > - register typeof(a1) arg1 ASM_REG(1) = __a1; \ > + __declare_arg_1(a0, a1, res); \ > register typeof(a2) arg2 ASM_REG(2) = __a2 > > #define __declare_arg_3(a0, a1, a2, a3, res) \ > typeof(a1) __a1 = (a1); \ > - typeof(a2) __a2 = (a2); \ Same here. > - typeof(a3) __a3 = (a3); \ > - struct arm_smccc_res *___res = (res); \ > - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ > - register typeof(a1) arg1 ASM_REG(1) = __a1; \ > - register typeof(a2) arg2 ASM_REG(2) = __a2; \ > + __declare_arg_2(a0, a1, a2, res); \ > register typeof(a3) arg3 ASM_REG(3) = __a3 > > #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ In principal, with the remarks addressed: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue Feb 24 14:18:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 14:18:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240095.1541586 (Exim 4.92) (envelope-from ) id 1vutEw-0002dw-Eo; Tue, 24 Feb 2026 14:18:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240095.1541586; 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\ >> - struct arm_smccc_res *___res = (res); \ >> - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >> + __declare_arg_0(a0, res); \ >> register typeof(a1) arg1 ASM_REG(1) = __a1 >> >> #define __declare_arg_2(a0, a1, a2, res) \ >> typeof(a1) __a1 = (a1); \ > You should remove this line and ... > >> - typeof(a2) __a2 = (a2); \ > keep this line. > >> - struct arm_smccc_res *___res = (res); \ >> - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >> - register typeof(a1) arg1 ASM_REG(1) = __a1; \ >> + __declare_arg_1(a0, a1, res); \ >> register typeof(a2) arg2 ASM_REG(2) = __a2 >> >> #define __declare_arg_3(a0, a1, a2, a3, res) \ >> typeof(a1) __a1 = (a1); \ >> - typeof(a2) __a2 = (a2); \ > Same here. Hmm - it built for me.  I'd better figure out why I missed it first. With the second patch, these disappear, which is why _that_ builds. > >> - typeof(a3) __a3 = (a3); \ >> - struct arm_smccc_res *___res = (res); \ >> - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >> - register typeof(a1) arg1 ASM_REG(1) = __a1; \ >> - register typeof(a2) arg2 ASM_REG(2) = __a2; \ >> + __declare_arg_2(a0, a1, a2, res); \ >> register typeof(a3) arg3 ASM_REG(3) = __a3 >> >> #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ > In principal, with the remarks addressed: > Reviewed-by: Michal Orzel Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 24 14:18:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 14:18:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240096.1541596 (Exim 4.92) (envelope-from ) id 1vutEz-0002sH-Ml; Tue, 24 Feb 2026 14:18:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240096.1541596; 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pr=C Message-ID: <261af40e-db79-477a-b67d-1af7428782d4@amd.com> Date: Tue, 24 Feb 2026 15:18:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] xen/arm: Simplify type handling for SMCCC declarations To: Andrew Cooper , Xen-devel CC: Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis References: <20260224124558.3675278-1-andrew.cooper3@citrix.com> <20260224124558.3675278-3-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260224124558.3675278-3-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C618F:EE_|CH1PPFDA34A4201:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d5279c4-972c-430e-d202-08de73af89a2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|7053199007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1wyV7ymCilWxx12eDDLDZfA8Sh1PLqvKKH3SNUoBbi2KjHGHvF9x5g6S4o30ZT3BWDGOlPUyeI/eMM4vaGKs8LJMJlUuE7wt3kRNWstEPVrcxE0rWaenTdvm8y8F1YjpuqlkiEcXkQJqWcKQLRVSsL19I+JExHc/WdthR9HkhnKcMTvZqByBNCVv1Hei3+hgqenMWvu1w0ZcEmpUHl7fkRS7YqZGOssqIyPScaDrfNEaYbB6gwJr+LfdG/1YCi/hWBVRnuO1Y8ixCPXq6ExsKx6CAUF5fjDe5U5eGVFdTvnbvIg0WLvlMZjdBsXluZF4ZZo1g9F1SAOwHQC1kRqgGOJ2vFhVvhJXUW0dDFFFTt3U59YjR+nYqN5HXrYd5s6R6bIaZwtY6a2rtFvB2yZQTpfl3orUUIvMTet5/NFvG68sArIUqoU3/ngYuTGN2WqQ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2026 14:18:09.7990 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d5279c4-972c-430e-d202-08de73af89a2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C618F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPFDA34A4201 On 24/02/2026 13:45, Andrew Cooper wrote: > There's no use creating a typed copy of a macro argument, simply to use it to > create a second typed copy. Remove the indirection, halving the number of > local variables created in scope. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > > This also makes them clearly elliglbe for converstion to auto, where they > weren't before (typeof expression not being that of the RHS). > --- > xen/arch/arm/include/asm/smccc.h | 21 +++++++-------------- > 1 file changed, 7 insertions(+), 14 deletions(-) > > diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h > index 347c4526d12a..7e90b0b56550 100644 > --- a/xen/arch/arm/include/asm/smccc.h > +++ b/xen/arch/arm/include/asm/smccc.h > @@ -113,39 +113,32 @@ struct arm_smccc_res { > register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) > > #define __declare_arg_1(a0, a1, res) \ > - typeof(a1) __a1 = (a1); \ > __declare_arg_0(a0, res); \ > - register typeof(a1) arg1 ASM_REG(1) = __a1 > + register typeof(a1) arg1 ASM_REG(1) = a1 > > #define __declare_arg_2(a0, a1, a2, res) \ > - typeof(a1) __a1 = (a1); \ > __declare_arg_1(a0, a1, res); \ > - register typeof(a2) arg2 ASM_REG(2) = __a2 > + register typeof(a2) arg2 ASM_REG(2) = a2 Here you fix the issue introduced in patch 1/2 :) You drop typeof(a1) and replace it with correct typeof(a2). Provided this patch is rebased on fixed 1/2: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue Feb 24 14:23:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 14:23:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240114.1541605 (Exim 4.92) (envelope-from ) id 1vutJj-0004hj-9k; Tue, 24 Feb 2026 14:23:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240114.1541605; Tue, 24 Feb 2026 14:23:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vutJj-0004hc-6l; Tue, 24 Feb 2026 14:23:15 +0000 Received: by outflank-mailman (input) for mailman id 1240114; Tue, 24 Feb 2026 14:23:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vutJi-0004hW-Aq for xen-devel@lists.xenproject.org; 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\ >>> - struct arm_smccc_res *___res = (res); \ >>> - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >>> + __declare_arg_0(a0, res); \ >>> register typeof(a1) arg1 ASM_REG(1) = __a1 >>> >>> #define __declare_arg_2(a0, a1, a2, res) \ >>> typeof(a1) __a1 = (a1); \ >> You should remove this line and ... >> >>> - typeof(a2) __a2 = (a2); \ >> keep this line. >> >>> - struct arm_smccc_res *___res = (res); \ >>> - register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0);\ >>> - register typeof(a1) arg1 ASM_REG(1) = __a1; \ >>> + __declare_arg_1(a0, a1, res); \ >>> register typeof(a2) arg2 ASM_REG(2) = __a2 >>> >>> #define __declare_arg_3(a0, a1, a2, a3, res) \ >>> typeof(a1) __a1 = (a1); \ >>> - typeof(a2) __a2 = (a2); \ >> Same here. > Hmm - it built for me.  I'd better figure out why I missed it first. Ah - a last minute refactor, and I didn't build test on this commit boundary. Fixed.  Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 24 14:26:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 14:26:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240126.1541615 (Exim 4.92) (envelope-from ) id 1vutMt-0005Fu-MZ; Tue, 24 Feb 2026 14:26:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240126.1541615; Tue, 24 Feb 2026 14:26:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vutMt-0005Fn-Jx; Tue, 24 Feb 2026 14:26:31 +0000 Received: by outflank-mailman (input) for mailman id 1240126; Tue, 24 Feb 2026 14:26:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vutMs-0005Fg-72 for xen-devel@lists.xenproject.org; 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That leads to inconsistent kernels that fails with > >> "Missing xen PVH initialization" when booting using PVH boot method or > >> display various errors and fail to initialize Xen PV drivers when booting > >> with PVH-GRUB. > >> > >> platform_pci_unplug: Xen Platform PCI: unrecognised magic value > >> ... > >> # modprobe xen-blkfront > >> modprobe: ERROR: could not insert 'xen_blkfront': No such device > >> # modprobe xen-netfront > >> modprobe: ERROR: could not insert 'xen_netfront': No such device > >> > >> When built without CONFIG_XEN_PVH, PVH-specific logic is disabled, hence when > >> booting with e.g PVH-OVMF, Linux assumes we are a HVM guest, even when we aren't > >> actually one (in the "with HVM emulated devices" sense). > >> > >> As it is actually possible to boot Xen PVH without CONFIG_PVH; and that most > >> Xen-related logic exist within CONFIG_XEN_PVHVM; consider PVH guests support > >> within CONFIG_XEN_PVHVM instead of CONFIG_XEN_PVH. > > > > So the current CONFIG_PVH selection done by CONFIG_XEN_PVH is moot? > > > >> Keep CONFIG_XEN_PVH as a shortcut to enable PVH boot, ACPI support and PVHVM. > >> > >> Signed-off-by: Teddy Astie > >> --- > >> Cc: Juergen Gross > >> Cc: Boris Ostrovsky > >> Cc: Oleksandr Tyshchenko > >> > >> A tentative patch, I'm not sure of the way of dealing with the KConfig part, > >> keeping CONFIG_XEN_PVH as a shortcut is interesting, but there may be other > >> options. > >> > >> There are widespreadly used Linux distributions that have a similar configuration > >> to this one, thus exhibit this issue i.e fail to boot. > > > > Do you know the underlying cause of not enabling CONFIG_XEN_PVH? Is > > the default set to n on the defconfig? Or are distros specifically > > disabling this option on purpose? > > > > I'm observing in these distros that > > > # CONFIG_XEN_PVH is not set > > CONFIG_XEN_PVHVM_GUEST=y > > CONFIG_XEN_PVHVM=y > > Which makes CONFIG_XEN_PVH defaults to n. We should possibly send a patch to those distros Kconfig to enable CONFIG_XEN_PVH? I think it's a bug on their side that Xen PVH is not enabled. Us trying to workaround this in our Linux Kconfig options seem wrong. Thanks, Roger. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Hjkw3E9BoIh06IIo" Content-Disposition: inline In-Reply-To: --Hjkw3E9BoIh06IIo Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 24 Feb 2026 16:31:10 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Demi Marie Obenour Cc: Roger Pau =?utf-8?B?TW9ubsOp?= , xen-devel , intel-xe@lists.freedesktop.org Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 On Fri, Feb 13, 2026 at 12:31:47AM -0500, Demi Marie Obenour wrote: > On 2/12/26 20:23, Marek Marczykowski-G=C3=B3recki wrote: > > On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: > >> On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3re= cki wrote: > >>> Hi, > >>> > >>> Recently I started testing compatibility with Intel Lunar Lake. This = is > >>> the first one that uses "xe" instead of "i915" Linux driver for iGPU. > >>> I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > >>> Linux 6.17.9 in this test. > >> > >> Not sure it's going to help a lot, but does using a PVH dom0 make any > >> difference? > >=20 > > Ok, now with the correct Xen version, it's better with PVH dom0. At > > least on the login screen and few applications (from both dom0 and domU) > > I don't see the glitches anymore. I can't do a full test, because PCI > > passthrough doesn't seem to work with PVH dom0 on Xen 4.19 - and I need > > it to start most VMs. > >=20 > > So, if the above test is representative, it's only about PV dom0. >=20 > This reminds me of a problem that I helped debug a while back, > and which also affected Qubes OS. That one was due to some part > of Linux core MM clobbering the high bit of the PAT part of PTEs. > As a result, a PTE that should have referenced entry X in the PAT > wound up referencing entry (X & 3). >=20 > On native Linux, the bug was mostly harmless, which is why nobody > found it earlier. However, on Xen PV, the different PAT caused memory > to be cached that should not be. The resulting symptoms were very > similar to what Marek described, though a bit less dramatic. >=20 > Can you try removing the Qubes downstream patch that changes the PAT? I'd assume removing such patch would make things only worse (it either shouldn't matter, or if the driver assumes Linux version, changing it would actually break stuff). Anyway, removing the patch didn't change anything. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Hjkw3E9BoIh06IIo Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmdxD4ACgkQ24/THMrX 1yzNKwf8D5XRQrqlh3kLHY4RnTkKDpzpidlSTt0P3ifmwdqFCR42vBkbdX7qE1+5 l0f6EjapaDSAj/Yx3+4yUztyiXLW+zsu6ashquVN6CzTJU9Q0mrRKqC229TYgi6k SGyy0glmFlOfBYLklhF51jFO2r1NKp9ok736zecSYjg1KdwNHgpQgITnEEQxhCcw /b4ajkkKZ6of0ulhxoEIHA5P7m/kg7I63jQapborsL0PHwdzEgTLqjpwBV0CqZ+W 9uZgRdUVfU0urRblL6/tFKj8/seQTBSiYoUT6bP0u3cIeIfF5r9bYaWC2xOFPfBh sFX4fVag7XkIoeAwH/szlikJ4qdI8w== =4qyA -----END PGP SIGNATURE----- --Hjkw3E9BoIh06IIo-- From xen-devel-bounces@lists.xenproject.org Tue Feb 24 15:58:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 15:58:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240164.1541650 (Exim 4.92) (envelope-from ) id 1vuunx-0001bQ-HK; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="z+Qs3uEx07rIKHpf" Content-Disposition: inline In-Reply-To: --z+Qs3uEx07rIKHpf Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 24 Feb 2026 16:58:25 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: xen-devel , intel-xe@lists.freedesktop.org Subject: Re: Graphical glitches (not refreshing?) with Linux's xe driver + Xen 4.19 On Fri, Feb 13, 2026 at 02:23:06AM +0100, Marek Marczykowski-G=C3=B3recki w= rote: > On Thu, Feb 12, 2026 at 04:11:50PM +0100, Roger Pau Monn=C3=A9 wrote: > > On Tue, Feb 10, 2026 at 07:06:20PM +0100, Marek Marczykowski-G=C3=B3rec= ki wrote: > > > Hi, > > >=20 > > > Recently I started testing compatibility with Intel Lunar Lake. This = is > > > the first one that uses "xe" instead of "i915" Linux driver for iGPU. > > > I test it with Qubes OS 4.3, which uses Xen 4.19.4 and PV dom0 running > > > Linux 6.17.9 in this test. > >=20 > > Not sure it's going to help a lot, but does using a PVH dom0 make any > > difference? >=20 > Ok, now with the correct Xen version, it's better with PVH dom0. At > least on the login screen and few applications (from both dom0 and domU) > I don't see the glitches anymore. I can't do a full test, because PCI > passthrough doesn't seem to work with PVH dom0 on Xen 4.19 - and I need > it to start most VMs. >=20 > So, if the above test is representative, it's only about PV dom0. Some further observations: 1. My initial impression that Xen 4.17.6 is not affected is false. Apparently I got lucky and didn't waited long enough for glitches to appear. Unfortunately this means I have no way to bisect this... 1a. Updated test procedure - either: - start Qubes OS in full (including default system domUs) and try to open an app in one of them (for example file manager or pdf viewer) - start Linux up to lightdm login page, log in, log out, click on a few lightdm menus (session type selector, poewroff menu etc) The second version works even if toolstack version in dom0 doesn't match Xen version. If no glitches are observed after doing either of those procedures, assume it's good. 2. Xen staging is affected too. As well as Xen staging-4.19 without any qubes patches. 3. After enabling CONFIG_DEBUG in Xen, the xe.ko fails to load firmware: xe 0000:00:02.0: [drm] Tile0: GT0: Using GuC firmware from xe/lnl_guc_7= 0.bin version 70.53.0 xe 0000:00:02.0: [drm] *ERROR* Tile0: GT0: load failed: status =3D 0x40= 000056, time =3D 0ms, freq =3D 1850MHz (req 1850MHz), done =3D -1 xe 0000:00:02.0: [drm] *ERROR* Tile0: GT0: load failed: status: Reset = =3D 0, BootROM =3D 0x2B, UKernel =3D 0x00, MIA =3D 0x00, Auth =3D 0x01 xe 0000:00:02.0: [drm] *ERROR* Tile0: GT0: firmware production part che= ck failure xe 0000:00:02.0: [drm] *ERROR* Tile0: GT0: Failed to initialize uC (-EP= ROTO) xe 0000:00:02.0: probe with driver xe failed with error -71 CONFIG_DEBUG is the only change between "xe.ko loads fine but there are glitches later on" and "xe.ko fails to load at all". Full console logs: https://gist.github.com/marmarek/47b5e62a2cdbae6678c2aecc5283cd3f, there are 3 files: - CONFIG_DEBUG=3Dn - CONFIG_DEBUG=3Dy - CONFIG_DEBUG=3Dy + iommu=3Ddebug 4. Updating to Linux 7.0-rc1 doesn't help, for example: https://openqa.qubes-os.org/tests/168119#step/desktop_linux_manager_create_= qube/11 Generally, it does feel like a bug in xe.ko, but I can't exclude some issue on Xen side too (especially given point 3 above). --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --z+Qs3uEx07rIKHpf Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmdyqEACgkQ24/THMrX 1yz3NAf/Ss4zXqST+hrVe6//Y8nAtTjAfSKUnpUzjknj9A02rhVJMq7H4VTiQV91 ZM2lHu3JR+ye6J51t+fBtc27eJ1kBWWkPguco5pEaLm3UzlIAzDDTBntLg2M3qTe XSLl2lc3L9cYmXpS2It1jTj+QnoATccFG1Y90SiypjL/yZQwL8lRFZVgdmHHbN9k +Ts7gnNfSLXV22Wj/HKJPpn9v+rZLPFoXYT2ECMoOU4L8GcihAQ07kfyG9Zk0scE Fay2icmTVi3NjBlYSn/UZvfIKDXTT/KuRuL43TVuqKA7OuVoAM+WVWxhf7FfZMf+ fOIDtJsnT+0Q2tPqAbT8100EC1ndGg== =gWO7 -----END PGP SIGNATURE----- --z+Qs3uEx07rIKHpf-- From xen-devel-bounces@lists.xenproject.org Tue Feb 24 16:02:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 16:02:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240175.1541660 (Exim 4.92) (envelope-from ) id 1vuuru-0003gm-1A; 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Remove the indirection, halving the number of >> local variables created in scope. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Stefano Stabellini >> CC: Julien Grall >> CC: Volodymyr Babchuk >> CC: Bertrand Marquis >> CC: Michal Orzel >> >> This also makes them clearly elliglbe for converstion to auto, where they >> weren't before (typeof expression not being that of the RHS). >> --- >> xen/arch/arm/include/asm/smccc.h | 21 +++++++-------------- >> 1 file changed, 7 insertions(+), 14 deletions(-) >> >> diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h >> index 347c4526d12a..7e90b0b56550 100644 >> --- a/xen/arch/arm/include/asm/smccc.h >> +++ b/xen/arch/arm/include/asm/smccc.h >> @@ -113,39 +113,32 @@ struct arm_smccc_res { >> register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) >> >> #define __declare_arg_1(a0, a1, res) \ >> - typeof(a1) __a1 = (a1); \ >> __declare_arg_0(a0, res); \ >> - register typeof(a1) arg1 ASM_REG(1) = __a1 >> + register typeof(a1) arg1 ASM_REG(1) = a1 >> >> #define __declare_arg_2(a0, a1, a2, res) \ >> - typeof(a1) __a1 = (a1); \ >> __declare_arg_1(a0, a1, res); \ >> - register typeof(a2) arg2 ASM_REG(2) = __a2 >> + register typeof(a2) arg2 ASM_REG(2) = a2 > Here you fix the issue introduced in patch 1/2 :) You drop typeof(a1) and > replace it with correct typeof(a2). > > Provided this patch is rebased on fixed 1/2: > Reviewed-by: Michal Orzel Thanks.  Sadly, ECLAIR rejects this change.  I need to retain the brackets around the macro parameter after move, so this kind of incremental diff: > @@ -114,7 +114,7 @@ struct arm_smccc_res { >   >  #define __declare_arg_1(a0, a1, res)                        \ >      __declare_arg_0(a0, res);                               \ > -    register typeof(a1)     arg1 ASM_REG(1) = a1 > +    register typeof(a1)     arg1 ASM_REG(1) = (a1) >   >  #define __declare_arg_2(a0, a1, a2, res)                    \ >      __declare_arg_1(a0, a1, res);                           \ ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 24 16:50:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 16:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240200.1541669 (Exim 4.92) (envelope-from ) id 1vuvcF-00025E-Fm; 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If you e.g restrict > DMA through IOMMU and restrict some key hypercalls like kexec (among > some others), Dom0 shouldn't be able to compromise Xen (in principle); > hence can't escape SecureBoot boundaries. > > SecureBoot doesn't appears to require preventing device access from > "unprivileged code" otherwise VFIO wouldn't be allowed under SecureBoot. > But such device access still needs to be contained (e.g through IOMMU > enforcement), that's something Xen already supports (e.g > dom0-iommu=strict / PVH Dom0). What about the platform operations that deal with runtime services? Those could mess up with the firmware, and are available to dom0. Not allowing dom0 to use those might result in a crippled dom0, for example not being able to change the boot entries. dom0 also gets access to (almost) all the IO ports and IO mem space, plus also unmediated access to almost all the PCI config space, which includes access to the root complex registers. Or another example, the low 1M is accessible by a PV dom0 as IO memory IIRC. That's also where Xen places the AP startup trampoline. Dom0 could modify that region and thus inject malicious code directly into the AP startup path. Then doing CPU unplug and hotplug would execute that injected code. We should probably adjust that in dom0_setup_permissions() so dom0 cannot map the trampilone page, but this is just an example of possibly many places dom0 has traditionally been considered trusted, and that would likely be against a sane Secure Boot policy. > In that case, devices are only allowed to access Dom0, but can't access > outside of it. > > From a technical standpoint, PVH Dom0 setups (and also PV Dom0 > depending on configuration) acts very similarly to a SecureBoot-able > Linux kernel which runs a KVM virtual machine with all host devices > passed-through it (using vfio-pci). As said above - there's a bit more to it. I'm not saying it can be done, but we are certainly not there yet. And we don't even know exactly what would need limiting, due to the assumption always been made about dom0 being trusted. Regards, Roger. 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Remove the indirection, halving the number of >>> local variables created in scope. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >>> --- >>> CC: Stefano Stabellini >>> CC: Julien Grall >>> CC: Volodymyr Babchuk >>> CC: Bertrand Marquis >>> CC: Michal Orzel >>> >>> This also makes them clearly elliglbe for converstion to auto, where they >>> weren't before (typeof expression not being that of the RHS). >>> --- >>> xen/arch/arm/include/asm/smccc.h | 21 +++++++-------------- >>> 1 file changed, 7 insertions(+), 14 deletions(-) >>> >>> diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h >>> index 347c4526d12a..7e90b0b56550 100644 >>> --- a/xen/arch/arm/include/asm/smccc.h >>> +++ b/xen/arch/arm/include/asm/smccc.h >>> @@ -113,39 +113,32 @@ struct arm_smccc_res { >>> register unsigned long arg0 ASM_REG(0) = (uint32_t)(a0) >>> >>> #define __declare_arg_1(a0, a1, res) \ >>> - typeof(a1) __a1 = (a1); \ >>> __declare_arg_0(a0, res); \ >>> - register typeof(a1) arg1 ASM_REG(1) = __a1 >>> + register typeof(a1) arg1 ASM_REG(1) = a1 >>> >>> #define __declare_arg_2(a0, a1, a2, res) \ >>> - typeof(a1) __a1 = (a1); \ >>> __declare_arg_1(a0, a1, res); \ >>> - register typeof(a2) arg2 ASM_REG(2) = __a2 >>> + register typeof(a2) arg2 ASM_REG(2) = a2 >> Here you fix the issue introduced in patch 1/2 :) You drop typeof(a1) and >> replace it with correct typeof(a2). >> >> Provided this patch is rebased on fixed 1/2: >> Reviewed-by: Michal Orzel > Thanks.  Sadly, ECLAIR rejects this change.  I need to retain the > brackets around the macro parameter after move, so this kind of > incremental diff: > >> @@ -114,7 +114,7 @@ struct arm_smccc_res { >>   >>  #define __declare_arg_1(a0, a1, res)                        \ >>      __declare_arg_0(a0, res);                               \ >> -    register typeof(a1)     arg1 ASM_REG(1) = a1 >> +    register typeof(a1)     arg1 ASM_REG(1) = (a1) >>   >>  #define __declare_arg_2(a0, a1, a2, res)                    \ >>      __declare_arg_1(a0, a1, res);                           \ Passing pipeline: https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/13244194836 ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Feb 24 19:21:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 19:21:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240245.1541694 (Exim 4.92) (envelope-from ) id 1vuxyB-0004hE-Og; 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device status in > xenbus_read_driver_state(), add the pointer to struct xenbus_device > as a parameter. Acked-by: Martin K. Petersen # SCSI -- Martin K. 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: [PATCH] x86/efi: remove unreachable efi_halt_system() function Date: Tue, 24 Feb 2026 21:07:08 +0100 Message-ID: <20260224200708.51120-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.51.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MA3P292CA0001.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:2c::7) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|DM4PR03MB7016:EE_ X-MS-Office365-Filtering-Correlation-Id: 74663bf2-e839-49b7-bd46-08de73e09967 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ZEpDVEVNdUE3WXhtWExrN2ovQk1YM2Z2eXdIY0xLbE5MZUxKSTlxUCt6RjE2?= =?utf-8?B?eUN2eFJLazI1bmhyZjkwTVovZ2Nxci9VTEQ1TUd5UlcwME1GNlZXbEYzdUZ1?= =?utf-8?B?aUtyTms3ajFQckRXMTE2anZud2YyTlExVXBSK2gyejZ6R2ZDTk5Wam5Rbkpy?= =?utf-8?B?Zkl6TjNZV0dwYS8wQjlLWnovVUtWSnRuVVRrK0toVUhVRVJacVQyTjhzRzBD?= =?utf-8?B?b1R6VlBtbTlTdjJGVjBLeEJ1dDVxVUQ2QUY2Yjc0SVlBc1p5V2JUQkdUMElT?= =?utf-8?B?U0lCc3BQRVd1MW02dks1UzF6ZFB6S2F6YWJkZ1FSczhOTmErRHh6bis4eVpT?= =?utf-8?B?dFUvSTJTU0J3YXJhUjdYeWJRU1IvV0lLTTNCVkg1dndlMVFUV2VRenBMZ0F4?= =?utf-8?B?aFpKb1ArSmgrK2VYS3lwWGRuNWtPQUxVMFN1YXVpYjBrakxmSEY1d1FydG9F?= =?utf-8?B?R1lHVUV3M1d5eE5TOFcrLy9SL2JBdnF2NkZQWWxXUEF5UVVxTjk5Z0lGanU0?= =?utf-8?B?eS9oNFkrWXJldC9BeWdpM0FkdC9ic3NpV0gxMWg3QnFhMEdmSXdKRlRlOVhH?= =?utf-8?B?am52T0QxVUF5cllRRHl6Zit0MGNjVFF0WUltcTlsUkw4d3M2QVhlcXR5VlZY?= =?utf-8?B?MkUyL3F5M1R6d1ZQZ3ppeXJOdktBOUpJQ3hOb2JhM3lPMExSbWRxUERzbjNW?= =?utf-8?B?OFd3Yys1UEk3UThmWDY2R1VDMWw2V1VoVk9MaHU5WnJIVitkeXpGdUUrUVNj?= =?utf-8?B?NkxWajd4Mzh5ZmRvSXgvV25TL0RZaEQvcEFjU0lHQUI3eloySUE0QllPVXFT?= =?utf-8?B?Q2dvUjhKTzQ4M2h0ZFN4OGdiVE4zWnBXVi85NWhWN3JHekZsN3M5U2RKbzJW?= =?utf-8?B?N2Qvam85VjhiZmlLSUlQUGpCVU96Si8zY3gvcDNJczlBWE16NjNBelFHRFY4?= =?utf-8?B?UVVZRVNJTVN1ekZzRUtRaG5aQllLVmFWRmJDVldmalNpMDhTdkh4QXpVZUxu?= =?utf-8?B?dXhBdGJOcURZVTBuYW1xdTNWVFNBNlJBVEtJTnhFbEpSd1E4VFp3Z2M3RUR0?= =?utf-8?B?bUZCRXQ0eHJQbWFEajlKTStNZWJMVWQ2Y3JDMDRXbzEyNGFrWlRJSTFtS0hL?= =?utf-8?B?ZkFiRUxHdlYxQVBRbTNSREprSDlPNzIxbHM2OXlqLzhtQ1htZndDQ2x1ZEhw?= =?utf-8?B?by9qWnYzclpBcEgvb3RIVlZ4Qkp2K1ZuMzF0UC9aeS9YcytjWUdlejRhSi9z?= =?utf-8?B?dWxxU2lOZDhVK2ZnQUlnWmJtYTIxcFRPR3JMVCt0bThqbWhLV01QRzZVeVg3?= =?utf-8?B?aWVQTHMvS2dmcFpqdlZMc2pLZnQrSkJvSHhVVTdEWkhxdDZZdnltT0FGSmoz?= =?utf-8?B?eHI2b09UZlo2L0JZVTJuaE9iRjdaTUIyT015TlpqamZFWWlVbm5TVW5Ebjlz?= =?utf-8?B?OFRtS1BzTSszamkvOUI4d3R3a2dNb1VEaURZNXFqSE5sNldoaVN0c050dXdx?= =?utf-8?B?OUlLWmF2WWpxZUk3YmtoQ2FLdnNzSXM4WHU3bzV0a2RxbzdxcXdQZ2dlWndn?= =?utf-8?B?TXBrTm9TMmk5Y01BZ2JxZzdxaUYrZFYydEdxQ3JOTHJSNE45dEFnNGJjVkg2?= =?utf-8?B?UUY1eGh5aW5WcGxWcnNSc04rVmFSNjQ2TGdKRXVLbS9SZXBYeVNWeGNPbXZ0?= =?utf-8?B?NlhiZnUvY3pFTEx3S1VRNis1VStUS3BOeTZ0RElhWTZNZEdrbVZhWFJtSVJB?= =?utf-8?B?Ymh3S1VpbHNPSzFJUS9QOGlGQUJsOTM4UG5uL0E0QktHVE5zY1BYM3VMdXpW?= =?utf-8?B?QmFkZEtibE9LUlhvNHptQVk4dXo2Nm05Nm1nRytjV0FhdjZXVGhBRTJNcDAz?= =?utf-8?B?Z0E2amxxbk5hTy9zSXExNCthcXFrNTh5QitKeDdTUk5RdkJ2c2tXVnpwUlFM?= =?utf-8?B?MW5yaGRhVXQ2czRPLzJKa2lZaWp2RE5hRVQzYW4vZForeEc1NjJTU0kvQVRD?= =?utf-8?B?c3dHczJxT0FyQTNsa3paNHdqYm5rV0JhSzZaNmJYUDh6QnRWUVlEY1B4bjZ1?= =?utf-8?B?RTdlOGRvUGZLcG5DNitjRld0dktHbC9RTFFMMUNXQnNVYy8vRE9IR3pWTUtl?= =?utf-8?Q?JXY4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(376014)(366016);DIR:OUT;SFP:1101; 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No functional change expected, as the function is not called. Fixes: e4c3755d4dd7 ("x86-64/EFI: don't call EfiResetSystem() from machine_halt()") Signed-off-by: Roger Pau Monné --- xen/common/efi/common-stub.c | 1 - xen/common/efi/runtime.c | 13 ------------- xen/include/xen/efi.h | 1 - 3 files changed, 15 deletions(-) diff --git a/xen/common/efi/common-stub.c b/xen/common/efi/common-stub.c index 77f138a6c574..9dc8aa538cc1 100644 --- a/xen/common/efi/common-stub.c +++ b/xen/common/efi/common-stub.c @@ -18,7 +18,6 @@ unsigned long efi_get_time(void) return 0; } -void efi_halt_system(void) { } void efi_reset_system(bool warm) { } int efi_get_info(uint32_t idx, union xenpf_efi_info *info) diff --git a/xen/common/efi/runtime.c b/xen/common/efi/runtime.c index f786ceb00763..ba27c62132d2 100644 --- a/xen/common/efi/runtime.c +++ b/xen/common/efi/runtime.c @@ -188,19 +188,6 @@ unsigned long efi_get_time(void) time.Hour, time.Minute, time.Second); } -void efi_halt_system(void) -{ - EFI_STATUS status; - struct efi_rs_state state = efi_rs_enter(); - - if ( !state.cr3 ) - return; - status = efi_rs->ResetSystem(EfiResetShutdown, EFI_SUCCESS, 0, NULL); - efi_rs_leave(&state); - - printk(XENLOG_WARNING "EFI: could not halt system (%#lx)\n", status); -} - void efi_reset_system(bool warm) { EFI_STATUS status; diff --git a/xen/include/xen/efi.h b/xen/include/xen/efi.h index 723cb8085270..2e36b01e205b 100644 --- a/xen/include/xen/efi.h +++ b/xen/include/xen/efi.h @@ -42,7 +42,6 @@ void efi_init_memory(void); bool efi_boot_mem_unused(unsigned long *start, unsigned long *end); bool efi_rs_using_pgtables(void); unsigned long efi_get_time(void); -void efi_halt_system(void); void efi_reset_system(bool warm); #ifndef COMPAT int efi_get_info(uint32_t idx, union xenpf_efi_info *info); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 20:52:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 20:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240278.1541714 (Exim 4.92) (envelope-from ) id 1vuzOU-0008Ad-Bf; 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Jan Beulich , "Andrew Cooper" , Anthony PERARD , Michal Orzel , "Julien Grall" , Stefano Stabellini References: <20260224200708.51120-1-roger.pau@citrix.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <20260224200708.51120-1-roger.pau@citrix.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004682:EE_|MW3PR12MB4444:EE_ X-MS-Office365-Filtering-Correlation-Id: f3f12ab1-9b39-4ede-f553-08de73e69829 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aHYvUTBsM0g5MFgxNDVRTkZtS3F4emljWVk1bFBJazhsQkZaZ0hXQk51djhq?= =?utf-8?B?cjBOVXRQREZNRDVhcVFNVG1KMDBoWFl4OHQ4Q2tTVTQvRkFGVHRDaHh3N2pJ?= =?utf-8?B?RVlaVE1aU2RaTWNhM3dsd2c2S1VpS1FxM2diT0c4cE5sMXRPQ3FxbFpReVhx?= =?utf-8?B?bExVTWFHZEFpTThKRTVtcTc1V05zVVBwbEtLQm80Q3ZvblpubmM2TXdGS2Iy?= =?utf-8?B?S1Q4QWxnbDV2eGJ5TFdsdDNVRmo1elFuRGMzcWdSSmhHbjBnRjhPME5IcWJ3?= =?utf-8?B?am9yZURtNTQ5THZTM1loa0tiNjQwZlFLY3RKNko2N2c1dkNzZ2gwZGsrdjJJ?= =?utf-8?B?K1pOSVVhVG5ialgyMkRnbW9ud2lvaVg3dEVIcjRFdi81Tnp1N3FyQVErcmRi?= =?utf-8?B?VklLSW13QnRMUHlMMXZGYXNDenRQN2ZJRElPVkkyQmVtQWZoelJIdzdzR0RM?= =?utf-8?B?TU1veDkvSnJJR1Z5TEtEeW5tamUyaEtWNTl2d1I1VUpDWnR6UDVlbktQQjNp?= =?utf-8?B?MHBwSUVxRTN3Ykw5TTY4aGVwWFc5dU9Tb1RpaHhmZDcvSkdDNm1qRC81Y1RQ?= =?utf-8?B?RGNUZWl0SDNjSDVqeVVBc1pXaFZrQ0ZNTlpXck41azRtLzl0VDd0MnIvN29i?= =?utf-8?B?RUhuU1RFOFNWUFEvWW9pK3I3Umsrbzc2RkRjaGdSUnV5aWxyK0VaT0VyYTlq?= =?utf-8?B?eVVmUk92MU02MVBCajlLUy9hUXRLNWVudzZFZzg3Qlo2amx3SDF4SzJKTUk0?= =?utf-8?B?MkpsRWpoRnNrRUREVzBBZnZvVDZ3RHh3MHJMZGZMaCtZcWNKT1RzTGJDR09G?= =?utf-8?B?ZlhrcDJLQWdiWVNWNjdCWlErVVp0L2xDWFd1RWZPNjZmQkthNmdDVzFhT0gy?= =?utf-8?B?SElIMFJISzVLZXEreXF1a0oxejJadGlPdU9VSUVobWtLQkJBOTEyWHg3QzU0?= =?utf-8?B?Nk91WXd5ZllBUFhNd3ZqV0V0RzJEOVRuTjFJbVFBZU5tSWxLNWQwSXhobGc5?= =?utf-8?B?VTEyR1A5ckJUVkZER1BCQVd2cVJ1ai9IVjBjN0RlM3kxRlpWWGlFTGx3MXda?= =?utf-8?B?ZG0xVFhEQ0JzQk5ybGM1UGJ0U3JCZWhCZmFJQzNWVjN4eHd0TWVaM243aUlP?= =?utf-8?B?dWJ6cE5rQmlueDErT3NteUFISStIZ3hGZHRsNml5RWhmYVo1cjZmVUhVb1NZ?= =?utf-8?B?M1ZjcEJBYmdCeDV6NllyVTFEUFdSSmVabFY3UW1SRWNONmFZN1p5MHNCK2JS?= =?utf-8?B?KzIzcGNudUY0L2RQS0tWYnc5UUxDZG4wVU9wdk9qT3EvVnFuKzJ2bW1SZnVS?= =?utf-8?B?QWlXSlg4V1dWcXhRN3o4VlZuMitvcUJaZWpoS2M4YjNDd1lLMytxd1hPbmVC?= =?utf-8?B?RC83aVA4cFd0S0p2NFp6YTg2V3lRS0dYUHRNTkNvVDYrclhua2RHMTV5Qjhn?= =?utf-8?B?MWpQYktVWUFmVXdpQlJuTGZ2MG9pLzVKOUhNNG92Wmo4OUFyYVVTeGlQQU9a?= =?utf-8?B?YmxsQkk1VTV0azlpNXRqSkJwczBScGNZME1UNGJlTVdUR0kyM2drMUoxVnE0?= =?utf-8?B?bllkdyt1eE8ycWMzc0tuaVE5OHFkWkw0T1JyczZ6TERLZDlTWlFycU1DbnY2?= =?utf-8?B?c0VpaDVEYysyamdTb2d6R0VzYnUzVjBtVTVQMEJtTDY4N1ZVYWhPTGh2SVNz?= =?utf-8?B?YlRuamhLVHJMWW9kMmZwc1lkREFlN0w0b2dqU3k0Q1N3M0ZTMXh1WnJ0UTJD?= =?utf-8?B?MFdpNnYzRTcrRDBML2QzYmN2UmNVNEdQOEtxaHd1VzBQbG9QMENoakJLcm5W?= =?utf-8?B?TDB2WkdNbUZIQXEzWGNkdFAxRzRQTkNEcVk4SGZKbmJyZXZWRXgwYjd1VW91?= =?utf-8?B?TW5tVkJSZWtxdGhEQndDKzBZbU1vMXVmbklNTTk5ZEpkUUNoakdSY25VRzAv?= =?utf-8?B?c05RZGxNL09YL2tlaWFQdXA2SDJwVzlITnJ2cWlLa0VLSkNWYmlXbGlrNjl2?= =?utf-8?B?aFkrb1VHVGtBbit4b21rYWNjUHVQT2VSRVo0aVNtMWNiRS9mVE5YMFUzbDR1?= =?utf-8?B?a3BmYUlKTWZnUVVWREh1Q1E4Sjh1UWtZbGY0WDRXL2hzeVZ4TmlRVUFVYVpD?= =?utf-8?B?ckRiMS9ydXc1YVRUaTZmakU4RjVldE5kWlYrYzJwclNTTHBTa2NaUUl3a3Fz?= =?utf-8?B?NUNaUFJ4dXBJSk9rN2M4bVZEK2hDNzcwNnpWWWpvVExIcXRPQ2FDZEV2VW8y?= =?utf-8?B?d2x1aE1DM2ZYcHZkWDZaeURXVjZnPT0=?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013)(7053199007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0udXo4zjYsILG562rGI+KTBfk3s1q7pHrmOV05f9nMpRkmZiEauxp5SSTFtjrv0OY+IT5MXq8lPuUEJJZ+1T2oEsXMAtgIjDNZ16hqXHVMw3bI1VcSkflOBoAh22hAIRh/e7j08U8C51W5fSAvee/MMLgtF0TzbvVPdPvOqxTXt2t2kcdpyw8irWe8DcD0TVC1PR+4WMddhzpvLYOcVPSgvKD1W9d+ESJtyT+Y+vBLo+/6ZjDBtuHs164YHhvQoJGkveELtC+nGa3ZKcPIcKDzc2n8gg1fQUlCgZvjh2JBOj74O58qRYj8WfudN2nOi8ST8t7hBrNv/sdNzKHibj7SpY5Ws6/NDxzb9YWEBVq0ENgpjZe3wpCTqiK2NpGR+XThH+29mzrvEDRCMve6g+MabJeOwF3XQSEHrdjCvY3GYbktd5QNZ0s5CW552qz9h9 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2026 20:52:16.5312 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3f12ab1-9b39-4ede-f553-08de73e69829 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004682.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4444 On 2026-02-24 15:07, Roger Pau Monne wrote: > After e4c3755d4dd7 the function efi_halt_system() is unreachable, remove it > from the file. > > No functional change expected, as the function is not called. > > Fixes: e4c3755d4dd7 ("x86-64/EFI: don't call EfiResetSystem() from machine_halt()") > Signed-off-by: Roger Pau Monné Reviewed-by: Jason Andryuk I see this dropped with --gc-sections, FWIW. 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pr=C Message-ID: <3484f37d-b85f-47d9-8038-e65846a82647@amd.com> Date: Tue, 24 Feb 2026 16:56:00 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] vpci/msix: check for BARs enabled in vpci_make_msix_hole To: Jan Beulich CC: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , References: <20260224025626.26909-1-stewart.hildebrand@amd.com> Content-Language: en-US From: Stewart Hildebrand In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000026C3:EE_|PH7PR12MB5784:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c3036eb-6eb3-4d0f-891e-08de73ef7f4d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013|13003099007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YzlvLzN0ZnRKUVV2d25UeS9SZFpWNUNocTBUc1dWUFBURkRmQ1ZNc21QVFdF?= =?utf-8?B?cWdXSUZwUWJlS2l6TE1zTUhUdkh1dzdmYUx1SElleCt2aVUyWE5OcS90U2lu?= =?utf-8?B?M0tTM3hHenc1WHRKa1Q0VU5UOFd6bG55UytTamswSkhlOEE0dnVlZjZ0YURE?= =?utf-8?B?M0Fkd3NFbXV3MzZYYTdYVzFQOFhPSWxwS3EzN1BFZlR1ZFpPbzZBZW14ZEpB?= =?utf-8?B?S3lWMm5VblE3STNubnhna3V3VnhuR2tWUmg1ZGlUWTFOVGp2dDBKb0lxYVRm?= =?utf-8?B?WVA4QzZlUU1hTVJWRmI4bGx3ZmorNmJLRWp5QTRoN2VtY2s3VnhYSHFIbndv?= =?utf-8?B?VlBjbXpsVzYvdGZHa3c3VzRsVzBMWHlsdzBERVB3czBkMFdDOHZFYmZyVzhH?= =?utf-8?B?QXF3ZkN2SHRKVHdTSm00d0NVYlNRVkJ2MlROMTdDSG5VUXNiTkNqSERQSjk5?= =?utf-8?B?S01MSUIvMEx4SHdNaGVUdDNwMWVmeFo2QThuVmR6bm1BaENJNU91Sm1lclhW?= =?utf-8?B?azViZHhJZzFMRVNHNHVQcERRY2tYd2UrdFM3WkJ6aFp6N0xRSHNkRWNLdTcw?= =?utf-8?B?REU4dlFESGdEZXI1M2V6NUt4TTdURVZMNHU4RFlsY3JaSVZhKzZuVjdSQlh2?= =?utf-8?B?czFxNmFnVytVQVppUi8xYVE2MTVscTlsTklPS0t5cXJRQzQzcVF0ZC8yT2l4?= =?utf-8?B?TzNHYk9seGxqYkc3MlN4dHY0czQ4Sll5UDQyUTBnNXZQVkN1dUoxY1lyVTRV?= =?utf-8?B?WnQ2S1dhZzVGY1hMNjZRdUZJZTYzbW9KM0FGdGRQeWdMOGs3bmdMN1djdWZi?= =?utf-8?B?a3Y0WStiTk9KUEE1SmNDc25CUytoV1pJZDRzQ3M0eG5wczZBejQ4bGFrQ1VZ?= =?utf-8?B?YXVIQ2dWVGM5K1huNTZRa09QTFpEY2x4SHF3SDJKN0QvVDNuU1cyKzluM2dw?= =?utf-8?B?UnBLVDk0d25vT1IvOW51QnV1VTI1MTk5eWFxTUpKc3JCZWxZTTN3QU1QRUsz?= =?utf-8?B?Zzk1VFZ5ZitNZGZjQlhaRThLclFDNFFCY1lCVHI1RGdxczM3bzN0QzBRSjZs?= =?utf-8?B?UmViWEs1Mm5uSFNCRlVibE53b3p2bzlhTVBKNWV4bVlyWXNyZmRXV2xrRkJW?= =?utf-8?B?TUdwWTEzOEpCakJ0V3dQaUR5c0Eybkl3emt4UmpYZFVtWUFxcjlxMHJTcUYr?= =?utf-8?B?ZS9ITDEyaTZYK1FSTWk3cHQ3R1g1UjVOc2l6bVg4bDQyZ0hzc0xaV3RyZFpC?= =?utf-8?B?bi9HbWlWR0RBM2ErWHRNLzgzai9jalo4YkNmYUhnc0RWZW1saXlIbWxZbXJF?= =?utf-8?B?YnZ6WkVselordXJlUkl6R2k4THlzQjg0eDhSN1pvL1dlaXBYWUtZcGZoZVpO?= =?utf-8?B?d3l3SGhab2s1NTB0S2V0eEdFWWh0T3VvTXJNbXFYbmJKcVVSL05Td1MvcEZj?= =?utf-8?B?RmlrVGN1WG0waTNIRlZFbktieWFtT3JNTEsvU1FkUEwyclcrUGRQOTBIMDhU?= =?utf-8?B?WnZZMUdqbmM2UWdNOFM5RHBRVEUxWkJENS9FdjMydUltVklSUWM2K0MzZ3d6?= =?utf-8?B?OFZheTJ6d1VQckdOaWcwM0VwTVpIY1E3ck01S0JwRExlb2w3ejdzdWJRQ2or?= =?utf-8?B?UEdzM3ZYTjNNeFJpcm1MWFFxL3JuOEh3UTlLYVFrZ3pQc2JTaE8wc2MzVmFu?= =?utf-8?B?Z0hEdVg1c0dhb2thQy9GU0hhZWMycUl3WXEyWjZWTzJPVjZrOXgvRDc3Nk1s?= =?utf-8?B?SmFDY1FyK0FlSFZKSDRQUVRkOEVjWTYvQkdjNVJiUkNVMVJLc3drVTkrY1NL?= =?utf-8?B?RnlkZnRobnFzM1V5MmJyQllmZDY0dnBnR05TNUtKT0QydXo0YkFGdWVoVzJV?= =?utf-8?B?MHcyc01GUjZxRDdPVlhldE02cnZ6aDBBMmJHY09aQ0lhR2x3WkZHc2t2U0M1?= =?utf-8?B?cmxvRG0yVlE2alRsSjRrbUtadzByeHRwVmpSYThZV0tyeHdsTytyZHN0Q2xz?= =?utf-8?B?ZnErK25EVUV5Rjc3ZnpvMTArV1ZSWEVnSEZWRmkxOGk5NksvMlNMZWpBd0o3?= =?utf-8?B?NjhWM25NQzFtNkJZb3dOcXZPSS9NVGIyaG1iaXlHL0gwekEvNFQ2SGxzUHJj?= =?utf-8?B?bjl5ckt1b1UxeWxHZEg2bUh4cUsyYUgwUzJRRURMYjhQZnluZEdwSkFPOWd2?= =?utf-8?B?U1g4TExrcXEzWGxtR0NuRUpOVmhqalZZN3pZU3NKbzA5dlpsZUJIakc2TVhw?= =?utf-8?Q?9QbBO8XAyR/YzRGzi8uDOHZtmotxMcjkMkoYf3TmEI=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xE80uQCYwxSnQ4WO2AzA/SnHqy0Oc9UKZj3DK4ChkMArnkpnw2eESgqQNN5RN3H4F75VeuOgCqfdybfO7tGmADs5N1KFXeSHU0/vDBltT77cG3tApNHb88kzezx8YqTWwamOwmxy5A5K6P5qFeLvTv2PwIlH6RUTKRDXTG1oq3ghTnSLrU+HRaB0Q6iRa9svRrz5Uon8HmYegkcV5RDCLAjgRa8Kf5Tsbdkw0Jw7iFFCDWzU816gWYG2VBcuo+VYRGYbmnxR8of0bUUM5BklViBuJl5hkbyvJTfLgimPuvPZrBBKEIPXW6Eyk/wyCVxgB4C1rPi42jaM9RuTbRJUoYqu/zf/SuZBvxw17QaOlezKOQuyZLuveSlxjqUtgP+8lfpOczFepYwlrkhEX2qjG7kLV/DgEoQbUQknCpT5njRF+mrWB6debVxQfItyybWh X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2026 21:56:00.2265 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c3036eb-6eb3-4d0f-891e-08de73ef7f4d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5784 On 2/24/26 02:34, Jan Beulich wrote: > On 24.02.2026 03:56, Stewart Hildebrand wrote: >> A hotplugged PCI device may be added uninitialized. In particular, >> memory decoding might be disabled and the BARs might be zeroed. In this >> case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() >> unconditionally attempts to punch holes in p2m, leading to init_msix() >> failing: >> >> (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area >> (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it >> >> vpci_make_msix_hole() should only attempt to punch holes if the BARs >> containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper >> for checking if a BAR is enabled, and add a check for the situation >> inside vpci_make_msix_hole(). >> >> Move the vpci_make_msix_hole() call within modify_decoding() to after >> setting ->enabled. >> >> Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") >> Signed-off-by: Stewart Hildebrand >> --- >> Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2344925375 >> >> v1->v2: >> * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") >> * move BAR enabled check to inside vpci_make_msix_hole() >> * introduce vmsix_table_bar_valid() helper >> * move vpci_make_msix_hole() call within modify_decoding() to after >> setting ->enabled >> * split typo fixup to separate patch >> >> v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t >> --- >> xen/drivers/vpci/header.c | 26 +++++++++++++------------- >> xen/drivers/vpci/msix.c | 4 ++++ >> xen/include/xen/vpci.h | 6 ++++++ >> 3 files changed, 23 insertions(+), 13 deletions(-) >> >> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c >> index 739a5f610e91..6a28e07a625b 100644 >> --- a/xen/drivers/vpci/header.c >> +++ b/xen/drivers/vpci/header.c >> @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, >> bool map = cmd & PCI_COMMAND_MEMORY; >> unsigned int i; >> >> - /* >> - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses >> - * can be trapped (and emulated) by Xen when the memory decoding bit is >> - * enabled. >> - * >> - * FIXME: punching holes after the p2m has been set up might be racy for >> - * DomU usage, needs to be revisited. >> - */ >> -#ifdef CONFIG_HAS_PCI_MSI >> - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) >> - return; >> -#endif >> - >> for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) >> { >> struct vpci_bar *bar = &header->bars[i]; >> @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, >> bar->enabled = map; >> } >> >> + /* >> + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses >> + * can be trapped (and emulated) by Xen when the memory decoding bit is >> + * enabled. >> + * >> + * FIXME: punching holes after the p2m has been set up might be racy for >> + * DomU usage, needs to be revisited. >> + */ >> +#ifdef CONFIG_HAS_PCI_MSI >> + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) >> + return; >> +#endif >> + >> if ( !rom_only ) >> { >> pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); >> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c >> index 516282205a53..142cfbae59d5 100644 >> --- a/xen/drivers/vpci/msix.c >> +++ b/xen/drivers/vpci/msix.c >> @@ -598,6 +598,10 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) >> if ( !pdev->vpci->msix ) >> return 0; >> >> + if ( !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_TABLE) && >> + !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_PBA) ) >> + return 0; > > What if one is enabled and the other isn't? Doesn't the check need to move ... > >> /* Make sure there's a hole for the MSIX table/PBA in the p2m. */ >> for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ ) >> { > > ... into the loop, Yes, will do. > and then apparently also need mirroring in the hwdom-only > loop further down? I don't think that's necessary, the logic there is idempotent, and it's not dealing with p2m. Thanks for taking a look. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Wzf03sVXyvb2zQzvFYhcAjsyFNkG8bj0xn/WoYnA0iuEks+Kop7KpBL8lOfykFWTgJrcxLQ430hPQgp867ZTTb7zNolBUsKWOZPwURkvksV7TeIHP7kHPQGOMMcn8LxbIO55ladn+Jz24LmTFgmlkQubZty4AuAGPnUEj38Z2soGOkCn9Ij1qHZoR0KBEragelmggtgdSX0o5c5BJdUd53KKzuaD5FG6udnlM5Lq95YUXrXR1s5Bpedch9ASlzYH1Gqfv7z79MNuv7kRaNQNSS3ujJarAygG4IJQ71F1rkyusAha/9ZbLurL9DCwXBEza9F6xFpIAT0YSWTrR013EO4G3GeEw0GE8mzb9LF2wO6CbH4ipXZkD2ZBgbtTL3okWBdiNZSgQWt7OkAVLPVmjBiiZ6Aeb2SEuZhGsPthbT45PQ9IhJzsAfFoIh3xoze+ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2026 22:04:45.2079 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1fa1d240-f373-4778-e43b-08de73f0b830 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8709 On 2/24/26 05:57, Roger Pau Monné wrote: > On Mon, Feb 23, 2026 at 09:56:24PM -0500, Stewart Hildebrand wrote: >> A hotplugged PCI device may be added uninitialized. In particular, >> memory decoding might be disabled and the BARs might be zeroed. In this >> case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() >> unconditionally attempts to punch holes in p2m, leading to init_msix() >> failing: >> >> (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area >> (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it >> >> vpci_make_msix_hole() should only attempt to punch holes if the BARs >> containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper >> for checking if a BAR is enabled, and add a check for the situation >> inside vpci_make_msix_hole(). >> >> Move the vpci_make_msix_hole() call within modify_decoding() to after >> setting ->enabled. > > I would maybe make it clear that the movement of the > vpci_make_msix_hole() call in modify_decoding() is due to the extra > requirement added in this patch that ->enabled must be set before > calling the function. > > "As a result of the newly introduced checks in vpci_make_msix_hole(), > move the ..." > > Or something along the lines. Will do >> >> Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") >> Signed-off-by: Stewart Hildebrand >> --- >> Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2344925375 >> >> v1->v2: >> * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") >> * move BAR enabled check to inside vpci_make_msix_hole() >> * introduce vmsix_table_bar_valid() helper >> * move vpci_make_msix_hole() call within modify_decoding() to after >> setting ->enabled >> * split typo fixup to separate patch >> >> v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t >> --- >> xen/drivers/vpci/header.c | 26 +++++++++++++------------- >> xen/drivers/vpci/msix.c | 4 ++++ >> xen/include/xen/vpci.h | 6 ++++++ >> 3 files changed, 23 insertions(+), 13 deletions(-) >> >> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c >> index 739a5f610e91..6a28e07a625b 100644 >> --- a/xen/drivers/vpci/header.c >> +++ b/xen/drivers/vpci/header.c >> @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, >> bool map = cmd & PCI_COMMAND_MEMORY; >> unsigned int i; >> >> - /* >> - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses >> - * can be trapped (and emulated) by Xen when the memory decoding bit is >> - * enabled. >> - * >> - * FIXME: punching holes after the p2m has been set up might be racy for >> - * DomU usage, needs to be revisited. >> - */ >> -#ifdef CONFIG_HAS_PCI_MSI >> - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) >> - return; >> -#endif >> - >> for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) >> { >> struct vpci_bar *bar = &header->bars[i]; >> @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, >> bar->enabled = map; >> } >> >> + /* >> + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses >> + * can be trapped (and emulated) by Xen when the memory decoding bit is >> + * enabled. >> + * >> + * FIXME: punching holes after the p2m has been set up might be racy for >> + * DomU usage, needs to be revisited. >> + */ >> +#ifdef CONFIG_HAS_PCI_MSI >> + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) >> + return; >> +#endif >> + >> if ( !rom_only ) >> { >> pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); >> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c >> index 516282205a53..142cfbae59d5 100644 >> --- a/xen/drivers/vpci/msix.c >> +++ b/xen/drivers/vpci/msix.c >> @@ -598,6 +598,10 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) >> if ( !pdev->vpci->msix ) >> return 0; >> >> + if ( !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_TABLE) && >> + !vmsix_table_bar_valid(pdev->vpci, VPCI_MSIX_PBA) ) >> + return 0; > > As Jan pointed out, this needs to be moved inside the loop. Will do. Thanks! From xen-devel-bounces@lists.xenproject.org Tue Feb 24 23:12:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 23:12:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240317.1541744 (Exim 4.92) (envelope-from ) id 1vv1Zs-0000yd-4p; Tue, 24 Feb 2026 23:12:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240317.1541744; Tue, 24 Feb 2026 23:12:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1Zs-0000yW-0x; Tue, 24 Feb 2026 23:12:28 +0000 Received: by outflank-mailman (input) for mailman id 1240317; Tue, 24 Feb 2026 23:12:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1Zq-0000yQ-PJ for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 23:12:26 +0000 Received: from hermes.ariadne.space (hermes.ariadne.space [149.248.47.155]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 46bbf3be-11d6-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 00:12:24 +0100 (CET) Received: from helios (unknown [100.74.42.12]) by hermes.ariadne.space (Postfix) with ESMTP id 5A65D2685AB; Tue, 24 Feb 2026 23:12:22 +0000 (UTC) Received: from phoebe.taild41b8.ts.net (unknown [172.19.0.1]) by helios (Postfix) with ESMTPSA id 4D34216000D707; Tue, 24 Feb 2026 23:12:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 46bbf3be-11d6-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ariadne.space; s=dkim; t=1771974742; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=8V2La6Men6eXkqMSn0jYq+fe6TyrquuJznUHMk/qitc=; b=OGd4h3N5k3l0eL03XMTn4dBdfGmspN1HdTecg12lzbQzS0dXnb0K8Gb7t8dctm7sisbS8r CQ68faHuJqzY3NOTTfagaY7PQOA/97D3PX7lnpD+0ZdRYKv1CSzG9RpQAGMG/DW1R5jEGh e7r9RjItngnsYPbh13v2nw91L+yWfTI= From: Ariadne Conill To: xen-devel@lists.xenproject.org Cc: Ariadne Conill , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan Subject: [PATCH] xen/vpci: zero guest-visible BAR addresses to ensure domU asssigns its own Date: Tue, 24 Feb 2026 15:12:15 -0800 Message-ID: <20260224231216.6203-1-ariadne@ariadne.space> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Steven Noonan If we just use the host's BAR addresses, the domU might not attempt to reconfigure the BAR ranges and may never try to map them with the IOMMU. Zeroing them ensures the guest kernel knows the BARs are not configured and needs to make its own choices about where to map the BARs. Signed-off-by: Steven Noonan Signed-off-by: Ariadne Conill --- xen/drivers/vpci/header.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 739a5f610e..852dfd8ae3 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -1011,7 +1011,7 @@ int vpci_init_header(struct pci_dev *pdev) } bars[i].addr = addr; - bars[i].guest_addr = addr; + bars[i].guest_addr = is_hwdom ? addr : 0; bars[i].size = size; bars[i].prefetchable = val & PCI_BASE_ADDRESS_MEM_PREFETCH; @@ -1034,7 +1034,7 @@ int vpci_init_header(struct pci_dev *pdev) rom->type = VPCI_BAR_ROM; rom->size = size; rom->addr = addr; - rom->guest_addr = addr; + rom->guest_addr = is_hwdom ? addr : 0; header->rom_enabled = pci_conf_read32(pdev->sbdf, rom_reg) & PCI_ROM_ADDRESS_ENABLE; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 23:12:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 23:12:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240322.1541754 (Exim 4.92) (envelope-from ) id 1vv1aF-0001Jr-B5; Tue, 24 Feb 2026 23:12:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240322.1541754; Tue, 24 Feb 2026 23:12:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1aF-0001Jk-85; Tue, 24 Feb 2026 23:12:51 +0000 Received: by outflank-mailman (input) for mailman id 1240322; Tue, 24 Feb 2026 23:12:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1aE-0001JI-3m for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 23:12:50 +0000 Received: from hermes.ariadne.space (hermes.ariadne.space [2001:19f0:8001:704:5400:5ff:fe8c:fac5]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 51f353ab-11d6-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 00:12:44 +0100 (CET) Received: from helios (unknown [100.74.42.12]) by hermes.ariadne.space (Postfix) with ESMTP id 41A442685B4; Tue, 24 Feb 2026 23:12:41 +0000 (UTC) Received: from phoebe.taild41b8.ts.net (unknown [172.19.0.1]) by helios (Postfix) with ESMTPSA id 3D4F116000D707; Tue, 24 Feb 2026 23:12:41 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 51f353ab-11d6-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ariadne.space; s=dkim; t=1771974761; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=skLgyrDg/ANIiJAiIyTNJyl/Z6YLJFfAYHOFK7Inel8=; b=rLGo077WQtI4v1gc+7PK0iUE0xR4SoMmr59njr6IUbZK5srVtJAdGgB6qsY8DnJOUV9UBk uxvNuf1KUEoeF3wVWfOtYKxX/FVQwHJ059vHUA5ufQvCIwD30EC3+Wju9SJIaJhy8pRs1E LNna8VSvPp/WS0XaeRBhzswhNuNTNSQ= From: Ariadne Conill To: xen-devel@lists.xenproject.org Cc: Ariadne Conill , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan Subject: [PATCH] xen/vpci: do not use pci_sanitize_bar_memory for domU Date: Tue, 24 Feb 2026 15:12:33 -0800 Message-ID: <20260224231235.6277-1-ariadne@ariadne.space> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Steven Noonan This function should only be used for the hardware domain, because it compares addresses against the host e820 map. Signed-off-by: Steven Noonan Signed-off-by: Ariadne Conill --- xen/drivers/vpci/header.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 852dfd8ae3..1f930b2a1f 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -394,13 +394,15 @@ static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, bool rom_only) } } - rc = pci_sanitize_bar_memory(bar->mem); - if ( rc ) - { - gprintk(XENLOG_WARNING, - "%pp: failed to sanitize BAR#%u memory: %d\n", - &pdev->sbdf, i, rc); - return rc; + if (is_hardware_domain(pdev->domain)) { + rc = pci_sanitize_bar_memory(mem); + if ( rc ) + { + gprintk(XENLOG_WARNING, + "%pp: failed to sanitize BAR#%u memory: %d\n", + &pdev->sbdf, i, rc); + return rc; + } } } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue Feb 24 23:13:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 24 Feb 2026 23:13:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240326.1541764 (Exim 4.92) (envelope-from ) id 1vv1aO-0001fw-Iy; Tue, 24 Feb 2026 23:13:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240326.1541764; Tue, 24 Feb 2026 23:13:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1aO-0001fo-FS; Tue, 24 Feb 2026 23:13:00 +0000 Received: by outflank-mailman (input) for mailman id 1240326; Tue, 24 Feb 2026 23:12:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv1aN-0000yQ-Dw for xen-devel@lists.xenproject.org; Tue, 24 Feb 2026 23:12:59 +0000 Received: from hermes.ariadne.space (hermes.ariadne.space [2001:19f0:8001:704:5400:5ff:fe8c:fac5]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5a80c110-11d6-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 00:12:58 +0100 (CET) Received: from helios (unknown [100.74.42.12]) by hermes.ariadne.space (Postfix) with ESMTP id 6D17A2685B4; Tue, 24 Feb 2026 23:12:55 +0000 (UTC) Received: from phoebe.taild41b8.ts.net (unknown [172.19.0.1]) by helios (Postfix) with ESMTPSA id 66F4216000D707; Tue, 24 Feb 2026 23:12:55 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5a80c110-11d6-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ariadne.space; s=dkim; t=1771974775; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=SFbO8S6kahHkVMcy8JXpfMeiRBJODD3mjCpF+ZaBOXY=; b=a5j6prDMV454T99JO2AWQz9UNosw+0WnO5ptwI7XWfoAJWWeiy5xT6YBz6yah7TeG7KNrh crSk3OrWTxXYyDqpH9/0crRGlR7fUG4CZVHAFX+fLY7cAEgP2wW6rX9JVFotwhL+LSk8dC Gh69Ep//h9amRY9/tEjLGQCaZs0ks0w= From: Ariadne Conill To: xen-devel@lists.xenproject.org Cc: Ariadne Conill , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan Subject: [PATCH] xen/vpci: automatically use iomem_permit_access for PCI device BARs Date: Tue, 24 Feb 2026 15:12:48 -0800 Message-ID: <20260224231249.6327-1-ariadne@ariadne.space> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Steven Noonan With vPCI, you shouldn't need to use xen-pciback for the device, so the memory access permissions need to be defined somewhere. This allows vPCI to automatically define the access permissions so that the domU can map the BARs via IOMMU. Signed-off-by: Steven Noonan Signed-off-by: Ariadne Conill --- xen/drivers/vpci/header.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 1f930b2a1f..ad3c09667f 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -1017,6 +1017,18 @@ int vpci_init_header(struct pci_dev *pdev) bars[i].size = size; bars[i].prefetchable = val & PCI_BASE_ADDRESS_MEM_PREFETCH; + if ( !is_hwdom ) + { + int rc = iomem_permit_access(pdev->domain, + PFN_DOWN(addr), + PFN_DOWN(addr + size - 1)); + if ( rc ) + { + printk(XENLOG_WARNING "Failed to grant MMIO access for BAR%d: %d\n", i, rc); + goto fail; + } + } + rc = vpci_add_register(pdev->vpci, is_hwdom ? vpci_hw_read32 : guest_mem_bar_read, is_hwdom ? bar_write : guest_mem_bar_write, @@ -1040,6 +1052,18 @@ int vpci_init_header(struct pci_dev *pdev) header->rom_enabled = pci_conf_read32(pdev->sbdf, rom_reg) & PCI_ROM_ADDRESS_ENABLE; + if ( !is_hwdom ) + { + int rc = iomem_permit_access(pdev->domain, + PFN_DOWN(addr), + PFN_DOWN(addr + size - 1)); + if ( rc ) + { + printk(XENLOG_WARNING "Failed to grant MMIO access for ROM BAR: %d\n", rc); + goto fail; + } + } + rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rom_write, rom_reg, 4, rom); if ( rc ) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240362.1541774 (Exim 4.92) (envelope-from ) id 1vv7Cx-0000it-6U; Wed, 25 Feb 2026 05:13:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240362.1541774; Wed, 25 Feb 2026 05:13:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7Cx-0000il-2Q; Wed, 25 Feb 2026 05:13:11 +0000 Received: by outflank-mailman (input) for mailman id 1240362; Wed, 25 Feb 2026 05:13:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7Cu-0000if-T7 for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:08 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ab1c2cbe-1208-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 06:13:06 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-483770e0b25so55721565e9.0 for ; Tue, 24 Feb 2026 21:13:06 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Not all accelerators are ready for that, but start by enforcing a few easy ones. Philippe Mathieu-Daudé (5): accel/kvm: Include missing 'exec/cpu-common.h' header accel/mshv: Forward-declare mshv_root_hvcall structure accel/mshv: Build without target-specific knowledge accel/hvf: Build without target-specific knowledge accel/xen: Build without target-specific knowledge include/system/mshv_int.h | 5 ++--- accel/kvm/kvm-accel-ops.c | 1 + accel/mshv/mshv-all.c | 2 +- accel/hvf/meson.build | 5 +---- accel/mshv/meson.build | 5 +---- accel/xen/meson.build | 2 +- 6 files changed, 7 insertions(+), 13 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240363.1541785 (Exim 4.92) (envelope-from ) id 1vv7D1-0000we-Gh; Wed, 25 Feb 2026 05:13:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240363.1541785; Wed, 25 Feb 2026 05:13:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7D1-0000wX-CL; Wed, 25 Feb 2026 05:13:15 +0000 Received: by outflank-mailman (input) for mailman id 1240363; Wed, 25 Feb 2026 05:13:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7D0-0000if-Ak for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:14 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id af52f14b-1208-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 06:13:13 +0100 (CET) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso69995835e9.0 for ; Tue, 24 Feb 2026 21:13:13 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Include it explicitly, otherwise we get when modifying unrelated headers: ../accel/kvm/kvm-accel-ops.c: In function ‘kvm_vcpu_thread_fn’: ../accel/kvm/kvm-accel-ops.c:54:22: error: ‘EXCP_DEBUG’ undeclared (first use in this function) 54 | if (r == EXCP_DEBUG) { | ^~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-accel-ops.c | 1 + 1 file changed, 1 insertion(+) diff --git a/accel/kvm/kvm-accel-ops.c b/accel/kvm/kvm-accel-ops.c index 8ed6945c2f7..6d9140e549f 100644 --- a/accel/kvm/kvm-accel-ops.c +++ b/accel/kvm/kvm-accel-ops.c @@ -16,6 +16,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" +#include "exec/cpu-common.h" #include "accel/accel-cpu-ops.h" #include "system/kvm.h" #include "system/kvm_int.h" -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240365.1541793 (Exim 4.92) (envelope-from ) id 1vv7DD-0001G6-MW; Wed, 25 Feb 2026 05:13:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240365.1541793; Wed, 25 Feb 2026 05:13:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DD-0001Fz-JT; Wed, 25 Feb 2026 05:13:27 +0000 Received: by outflank-mailman (input) for mailman id 1240365; Wed, 25 Feb 2026 05:13:26 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DC-0001DH-8h for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:26 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b3e7bb0c-1208-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 06:13:21 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-43767807da6so4566549f8f.2 for ; Tue, 24 Feb 2026 21:13:21 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daudé --- include/system/mshv_int.h | 5 ++--- accel/mshv/mshv-all.c | 2 +- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h index ad4d001c3cd..35386c422fa 100644 --- a/include/system/mshv_int.h +++ b/include/system/mshv_int.h @@ -96,9 +96,8 @@ void mshv_arch_amend_proc_features( union hv_partition_synthetic_processor_features *features); int mshv_arch_post_init_vm(int vm_fd); -#if defined COMPILING_PER_TARGET && defined CONFIG_MSHV_IS_POSSIBLE -int mshv_hvcall(int fd, const struct mshv_root_hvcall *args); -#endif +typedef struct mshv_root_hvcall mshv_root_hvcall; +int mshv_hvcall(int fd, const mshv_root_hvcall *args); /* memory */ typedef struct MshvMemoryRegion { diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c index ddc4c18cba4..d4cc7f53715 100644 --- a/accel/mshv/mshv-all.c +++ b/accel/mshv/mshv-all.c @@ -381,7 +381,7 @@ static void register_mshv_memory_listener(MshvState *s, MshvMemoryListener *mml, } } -int mshv_hvcall(int fd, const struct mshv_root_hvcall *args) +int mshv_hvcall(int fd, const mshv_root_hvcall *args) { int ret = 0; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240367.1541804 (Exim 4.92) (envelope-from ) id 1vv7DF-0001VT-VS; Wed, 25 Feb 2026 05:13:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240367.1541804; Wed, 25 Feb 2026 05:13:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DF-0001VK-RZ; Wed, 25 Feb 2026 05:13:29 +0000 Received: by outflank-mailman (input) for mailman id 1240367; Wed, 25 Feb 2026 05:13:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DE-0000if-Lr for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:28 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b7e6b066-1208-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 06:13:28 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4806f3fc50bso69997215e9.0 for ; Tue, 24 Feb 2026 21:13:28 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Enforce that by moving the MSHV file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé --- accel/mshv/meson.build | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/accel/mshv/meson.build b/accel/mshv/meson.build index d3a2b325811..c1b1787c5e6 100644 --- a/accel/mshv/meson.build +++ b/accel/mshv/meson.build @@ -1,9 +1,6 @@ -mshv_ss = ss.source_set() -mshv_ss.add(if_true: files( +system_ss.add(when: 'CONFIG_MSHV', if_true: files( 'irq.c', 'mem.c', 'msr.c', 'mshv-all.c' )) - -specific_ss.add_all(when: 'CONFIG_MSHV', if_true: mshv_ss) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240371.1541814 (Exim 4.92) (envelope-from ) id 1vv7DO-000217-5w; Wed, 25 Feb 2026 05:13:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240371.1541814; Wed, 25 Feb 2026 05:13:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DO-000210-39; Wed, 25 Feb 2026 05:13:38 +0000 Received: by outflank-mailman (input) for mailman id 1240371; Wed, 25 Feb 2026 05:13:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DM-0000if-If for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:36 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bc6f029f-1208-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 06:13:35 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-4398d9a12c6so474412f8f.2 for ; Tue, 24 Feb 2026 21:13:35 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Enforce that by moving the MSHV file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé --- accel/hvf/meson.build | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/accel/hvf/meson.build b/accel/hvf/meson.build index fc52cb78433..6e2dcc4a5f0 100644 --- a/accel/hvf/meson.build +++ b/accel/hvf/meson.build @@ -1,7 +1,4 @@ -hvf_ss = ss.source_set() -hvf_ss.add(files( +system_ss.add(when: 'CONFIG_HVF', if_true: files( 'hvf-all.c', 'hvf-accel-ops.c', )) - -specific_ss.add_all(when: 'CONFIG_HVF', if_true: hvf_ss) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 05:13:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 05:13:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240377.1541824 (Exim 4.92) (envelope-from ) id 1vv7DV-0002Tb-CZ; Wed, 25 Feb 2026 05:13:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240377.1541824; Wed, 25 Feb 2026 05:13:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DV-0002So-9K; Wed, 25 Feb 2026 05:13:45 +0000 Received: by outflank-mailman (input) for mailman id 1240377; Wed, 25 Feb 2026 05:13:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vv7DT-0000if-EG for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 05:13:43 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c098c1bc-1208-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 06:13:42 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-43990aa7dbaso99944f8f.1 for ; Tue, 24 Feb 2026 21:13:42 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Iglesias" Subject: [PATCH 5/5] accel/xen: Build without target-specific knowledge Date: Wed, 25 Feb 2026 06:13:03 +0100 Message-ID: <20260225051303.91614-6-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260225051303.91614-1-philmd@linaro.org> References: <20260225051303.91614-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Code in accel/ aims to be target-agnostic. Enforce that by moving the MSHV file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé --- accel/xen/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/xen/meson.build b/accel/xen/meson.build index 002bdb03c62..455ad5d6be4 100644 --- a/accel/xen/meson.build +++ b/accel/xen/meson.build @@ -1 +1 @@ -specific_ss.add(when: 'CONFIG_XEN', if_true: files('xen-all.c')) +system_ss.add(when: 'CONFIG_XEN', if_true: files('xen-all.c')) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 09:47:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 09:47:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240463.1541833 (Exim 4.92) (envelope-from ) id 1vvBUa-00017h-6Z; Wed, 25 Feb 2026 09:47:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240463.1541833; Wed, 25 Feb 2026 09:47:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBUa-00017a-3p; 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From: Kevin Lampis To: xen-devel@lists.xenproject.org Cc: jbeulich@suse.com, andrew.cooper3@citrix.com, roger.pau@citrix.com, Kevin Lampis Subject: [PATCH] x86: Remove x86 prefixed names from cpuinfo for amd.c Date: Wed, 25 Feb 2026 09:47:59 +0000 Message-ID: <20260225094759.623258-1-kevin.lampis@citrix.com> X-Mailer: git-send-email 2.51.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: LO4P265CA0086.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:2bd::19) To BY1PR03MB7996.namprd03.prod.outlook.com (2603:10b6:a03:5b2::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PR03MB7996:EE_|PH8PR03MB7272:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a03607f-6909-480f-738c-08de7452e389 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; X-Microsoft-Antispam-Message-Info: Cwu0B2yRtaDS5ocEj9GrdRH1df+fyex/UflZKbOtHJF44bKuPbvVRyG6jkTMH/c30auebNeeHy6SRgvOIqMhbwGPVE9XMYFntClpSjIyA6FRpc7DhocXMXCpSOwtTwDmh0cf03lOxu3LibLWBQZDA3B3rx7MQlZ2/RH3hSUBcRT2U12xSKI5vmpZlPoWw0dud1+tZ59mSHZTzdwZnDUjFThkBuVJbof2wsViNXARvU/kedeGWjU0hCNwCZVpIOs0NijC+k83aHYIokbxgEnwHP6CCQe4NL5Gp9zDBlq3SDN6M+OKuyPbwTzt5dSdmu7NEJhCIRlk4AReKq+sc4wIvVNZQLEO1sekRFMgQkuTBY54BNBN5+qgPIFbDcDu6kLowy7AprraGq47G5zpLZTV2excipuGG01YAeAyewPUIqCaY2W+DqTFZ+ZRuVSN3tUD+W/3ooEvSWgyXv6KKJJHnlYpUOpCk7fHtX+AOJ/KhhZWQGxePQZuLKkJefOpBsXC5XSIqwXJ/Q2BZ946WeMmB9cXzwToq4I8/L9JS/ZAXKXqhUc4FlaqX9Fh8mEeVdGJkBine7IRDrbd5eAbBbFGNmZS4H7Pv9ARdv+IHbYvFaVZmrE6bACjwfTDjTGsFWNlnvMnG+FBWB9sZi2rtTaWxEhF+ny1O/jQxnIAXYcCnB+dxibVA9ydJymEk721TOXKvchQ53BjYQiEtc//stMojChSRoxb/iz++/p4dEPKRfc= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BY1PR03MB7996.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024);DIR:OUT;SFP:1101; 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This work is part of making Xen safe for Intel family 18/19. Signed-off-by: Kevin Lampis --- xen/arch/x86/cpu/amd.c | 74 +++++++++++++++++----------------- xen/arch/x86/pv/emul-priv-op.c | 30 +++++++------- 2 files changed, 52 insertions(+), 52 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index fc496dc43e..2b7f60aa30 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -134,7 +134,7 @@ static void __init noinline probe_masking_msrs(void) cpuidmask_defaults._7ab0 = _probe_mask_msr(MSR_AMD_L7S0_FEATURE_MASK, LCAP_7ab0); - if (c->x86 == 0x15 && c->cpuid_level >= 6 && cpuid_ecx(6)) + if (c->family == 0x15 && c->cpuid_level >= 6 && cpuid_ecx(6)) cpuidmask_defaults._6c = _probe_mask_msr(MSR_AMD_THRM_FEATURE_MASK, LCAP_6c); @@ -151,7 +151,7 @@ static void __init noinline probe_masking_msrs(void) expected_levelling_cap, levelling_caps, (expected_levelling_cap ^ levelling_caps) & levelling_caps); printk(XENLOG_WARNING "Fam %#x, model %#x level %#x\n", - c->x86, c->x86_model, c->cpuid_level); + c->family, c->model, c->cpuid_level); printk(XENLOG_WARNING "If not running virtualised, please report a bug\n"); } @@ -327,7 +327,7 @@ int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, ...) u32 range; u32 ms; - if (cpu->x86_vendor != X86_VENDOR_AMD) + if (cpu->vendor != X86_VENDOR_AMD) return 0; if (osvw_id >= 0 && cpu_has(cpu, X86_FEATURE_OSVW)) { @@ -348,9 +348,9 @@ int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, ...) /* OSVW unavailable or ID unknown, match family-model-stepping range */ va_start(ap, osvw_id); - ms = (cpu->x86_model << 4) | cpu->x86_mask; + ms = (cpu->model << 4) | cpu->stepping; while ((range = va_arg(ap, int))) { - if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && + if ((cpu->family == AMD_MODEL_RANGE_FAMILY(range)) && (ms >= AMD_MODEL_RANGE_START(range)) && (ms <= AMD_MODEL_RANGE_END(range))) { va_end(ap); @@ -418,8 +418,8 @@ static void check_syscfg_dram_mod_en(void) { uint64_t syscfg; - if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && - (boot_cpu_data.x86 >= 0x0f))) + if (!((boot_cpu_data.vendor == X86_VENDOR_AMD) && + (boot_cpu_data.family >= 0x0f))) return; rdmsrl(MSR_K8_SYSCFG, syscfg); @@ -462,7 +462,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) cpuid(0x8000001e, &eax, &ebx, &ecx, &edx); c->x86_num_siblings = ((ebx >> 8) & 0xff) + 1; - if (c->x86 < 0x17) + if (c->family < 0x17) c->compute_unit_id = ebx & 0xFF; else { c->cpu_core_id = ebx & 0xFF; @@ -520,10 +520,10 @@ void amd_process_freq(const struct cpuinfo_x86 *c, unsigned int idx = 0, h; uint64_t hi, lo, val; - if (c->x86 < 0x10 || c->x86 > 0x1A) + if (c->family < 0x10 || c->family > 0x1A) return; - if (c->x86 < 0x17) { + if (c->family < 0x17) { unsigned int node = 0; uint64_t nbcfg; @@ -573,7 +573,7 @@ void amd_process_freq(const struct cpuinfo_x86 *c, * accounted for in order to correctly fetch the * nominal frequency of the processor. */ - switch (c->x86) { + switch (c->family) { case 0x10: idx = 1; break; case 0x12: idx = 7; break; case 0x14: idx = 7; break; @@ -593,7 +593,7 @@ void amd_process_freq(const struct cpuinfo_x86 *c, } lo = 0; /* gcc may not recognize the loop having at least 5 iterations */ - for (h = c->x86 == 0x10 ? 5 : 8; h--; ) + for (h = c->family == 0x10 ? 5 : 8; h--; ) if (!rdmsr_safe(0xC0010064 + h, &lo) && (lo >> 63)) break; if (!(lo >> 63)) @@ -603,18 +603,18 @@ void amd_process_freq(const struct cpuinfo_x86 *c, !rdmsr_safe(0xC0010064 + idx, &val) && (val >> 63) && !rdmsr_safe(0xC0010064, &hi) && (hi >> 63)) { if (nom_mhz) - *nom_mhz = amd_parse_freq(c->x86, val); + *nom_mhz = amd_parse_freq(c->family, val); if (low_mhz) - *low_mhz = amd_parse_freq(c->x86, lo); + *low_mhz = amd_parse_freq(c->family, lo); if (hi_mhz) - *hi_mhz = amd_parse_freq(c->x86, hi); + *hi_mhz = amd_parse_freq(c->family, hi); } else if (h && !rdmsr_safe(0xC0010064, &hi) && (hi >> 63)) { if (low_mhz) - *low_mhz = amd_parse_freq(c->x86, lo); + *low_mhz = amd_parse_freq(c->family, lo); if (hi_mhz) - *hi_mhz = amd_parse_freq(c->x86, hi); + *hi_mhz = amd_parse_freq(c->family, hi); } else if (low_mhz) - *low_mhz = amd_parse_freq(c->x86, lo); + *low_mhz = amd_parse_freq(c->family, lo); } void cf_check early_init_amd(struct cpuinfo_x86 *c) @@ -654,7 +654,7 @@ static bool set_legacy_ssbd(const struct cpuinfo_x86 *c, bool enable) { int bit = -1; - switch (c->x86) { + switch (c->family) { case 0x15: bit = 54; break; case 0x16: bit = 33; break; case 0x17: @@ -716,7 +716,7 @@ bool __init amd_setup_legacy_ssbd(void) { unsigned int i; - if ((boot_cpu_data.x86 != 0x17 && boot_cpu_data.x86 != 0x18) || + if ((boot_cpu_data.family != 0x17 && boot_cpu_data.family != 0x18) || boot_cpu_data.x86_num_siblings <= 1 || opt_ssbd) return true; @@ -763,7 +763,7 @@ static void core_set_legacy_ssbd(bool enable) BUG_ON(this_cpu(legacy_ssbd) == enable); - if ((c->x86 != 0x17 && c->x86 != 0x18) || c->x86_num_siblings <= 1) { + if ((c->family != 0x17 && c->family != 0x18) || c->x86_num_siblings <= 1) { BUG_ON(!set_legacy_ssbd(c, enable)); return; } @@ -982,7 +982,7 @@ static void amd_check_bp_cfg(void) /* * AMD Erratum #1485. Set bit 5, as instructed. */ - if (!cpu_has_hypervisor && boot_cpu_data.x86 == 0x19 && is_zen4_uarch()) + if (!cpu_has_hypervisor && boot_cpu_data.family == 0x19 && is_zen4_uarch()) new |= (1 << 5); /* @@ -1029,13 +1029,13 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) * Errata 63 for SH-B3 steppings * Errata 122 for all steppings (F+ have it disabled by default) */ - if (c->x86 == 15) { + if (c->family == 15) { rdmsrl(MSR_K8_HWCR, value); value |= 1 << 6; wrmsrl(MSR_K8_HWCR, value); } - if (c->x86 == 0xf && c->x86_model < 0x14 + if (c->family == 0xf && c->model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) { /* * Some BIOSes incorrectly force this feature, but only K8 @@ -1056,12 +1056,12 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) amd_init_ssbd(c); - if (c->x86 == 0x17) + if (c->family == 0x17) amd_init_spectral_chicken(); /* Probe for NSCB on Zen2 CPUs when not virtualised */ if (!cpu_has_hypervisor && !cpu_has_nscb && c == &boot_cpu_data && - c->x86 == 0x17) + c->family == 0x17) detect_zen2_null_seg_behaviour(); /* @@ -1083,7 +1083,7 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has_clflushopt) setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE); - switch(c->x86) + switch(c->family) { case 0xf ... 0x11: disable_c1e(NULL); @@ -1133,15 +1133,15 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (cpu_has(c, X86_FEATURE_ITSC)) { __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability); - if (c->x86 != 0x11) + if (c->family != 0x11) __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability); } } /* re-enable TopologyExtensions if switched off by BIOS */ - if ((c->x86 == 0x15) && - (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) && + if ((c->family == 0x15) && + (c->model >= 0x10) && (c->model <= 0x1f) && !cpu_has(c, X86_FEATURE_TOPOEXT) && !rdmsr_safe(MSR_K8_EXT_FEATURE_MASK, &value)) { value |= 1ULL << 54; @@ -1158,14 +1158,14 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) * The way access filter has a performance penalty on some workloads. * Disable it on the affected CPUs. */ - if (c->x86 == 0x15 && c->x86_model >= 0x02 && c->x86_model < 0x20 && + if (c->family == 0x15 && c->model >= 0x02 && c->model < 0x20 && !rdmsr_safe(MSR_AMD64_IC_CFG, &value) && (value & 0x1e) != 0x1e) wrmsr_safe(MSR_AMD64_IC_CFG, value | 0x1e); amd_get_topology(c); /* Pointless to use MWAIT on Family10 as it does not deep sleep. */ - if (c->x86 == 0x10) + if (c->family == 0x10) __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) @@ -1182,7 +1182,7 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) "*** Pass \"allow_unsafe\" if you're trusting" " all your (PV) guest kernels. ***\n"); - if (c->x86 == 0x16 && c->x86_model <= 0xf) { + if (c->family == 0x16 && c->model <= 0xf) { if (c == &boot_cpu_data) { l = pci_conf_read32(PCI_SBDF(0, 0, 0x18, 3), 0x58); h = pci_conf_read32(PCI_SBDF(0, 0, 0x18, 3), 0x5c); @@ -1215,7 +1215,7 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) /* AMD CPUs do not support SYSENTER outside of legacy mode. */ __clear_bit(X86_FEATURE_SEP, c->x86_capability); - if (c->x86 == 0x10) { + if (c->family == 0x10) { /* do this for boot cpu */ if (c == &boot_cpu_data) check_enable_amd_mmconf_dmi(); @@ -1238,14 +1238,14 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) * Family 0x12 and above processors have APIC timer * running in deep C states. */ - if ( opt_arat && c->x86 > 0x11 ) + if ( opt_arat && c->family > 0x11 ) __set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability); /* * Prior to Family 0x14, perf counters are not reset during warm reboot. * We have to reset them manually. */ - if (nmi_watchdog != NMI_LOCAL_APIC && c->x86 < 0x14) { + if (nmi_watchdog != NMI_LOCAL_APIC && c->family < 0x14) { wrmsrl(MSR_K7_PERFCTR0, 0); wrmsrl(MSR_K7_PERFCTR1, 0); wrmsrl(MSR_K7_PERFCTR2, 0); @@ -1290,7 +1290,7 @@ static int __init cf_check amd_check_erratum_1474(void) s_time_t delta; if (cpu_has_hypervisor || - (boot_cpu_data.x86 != 0x17 && boot_cpu_data.x86 != 0x18)) + (boot_cpu_data.family != 0x17 && boot_cpu_data.family != 0x18)) return 0; /* diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 1d9e57ad27..959962638c 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -244,8 +244,8 @@ static bool pci_cfg_ok(struct domain *currd, unsigned int start, start |= CF8_ADDR_LO(currd->arch.pci_cf8); /* AMD extended configuration space access? */ if ( CF8_ADDR_HI(currd->arch.pci_cf8) && - boot_cpu_data.x86_vendor == X86_VENDOR_AMD && - boot_cpu_data.x86 >= 0x10 && boot_cpu_data.x86 < 0x17 ) + boot_cpu_data.vendor == X86_VENDOR_AMD && + boot_cpu_data.family >= 0x10 && boot_cpu_data.family < 0x17 ) { uint64_t msr_val; @@ -869,7 +869,7 @@ static uint64_t guest_efer(const struct domain *d) */ if ( is_pv_32bit_domain(d) ) val &= ~(EFER_LME | EFER_LMA | - (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL + (boot_cpu_data.vendor == X86_VENDOR_INTEL ? EFER_SCE : 0)); return val; } @@ -958,7 +958,7 @@ static int cf_check read_msr( case MSR_K8_PSTATE5: case MSR_K8_PSTATE6: case MSR_K8_PSTATE7: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) + if ( boot_cpu_data.vendor != X86_VENDOR_AMD ) break; if ( unlikely(is_cpufreq_controller(currd)) ) goto normal; @@ -966,8 +966,8 @@ static int cf_check read_msr( return X86EMUL_OKAY; case MSR_FAM10H_MMIO_CONF_BASE: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || - boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 ) + if ( boot_cpu_data.vendor != X86_VENDOR_AMD || + boot_cpu_data.family < 0x10 || boot_cpu_data.family >= 0x17 ) break; /* fall through */ case MSR_AMD64_NB_CFG: @@ -991,13 +991,13 @@ static int cf_check read_msr( case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3): case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) { vpmu_msr = true; /* fall through */ case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.x86_vendor & + if ( vpmu_msr || (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) { if ( vpmu_do_rdmsr(reg, val) ) @@ -1100,7 +1100,7 @@ static int cf_check write_msr( case MSR_K8_PSTATE6: case MSR_K8_PSTATE7: case MSR_K8_HWCR: - if ( !(boot_cpu_data.x86_vendor & + if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) break; if ( likely(!is_cpufreq_controller(currd)) || @@ -1119,8 +1119,8 @@ static int cf_check write_msr( break; case MSR_FAM10H_MMIO_CONF_BASE: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || - boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 ) + if ( boot_cpu_data.vendor != X86_VENDOR_AMD || + boot_cpu_data.family < 0x10 || boot_cpu_data.family >= 0x17 ) break; if ( !is_hwdom_pinned_vcpu(curr) ) return X86EMUL_OKAY; @@ -1148,7 +1148,7 @@ static int cf_check write_msr( case MSR_IA32_MPERF: case MSR_IA32_APERF: - if ( !(boot_cpu_data.x86_vendor & + if ( !(boot_cpu_data.vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) break; if ( likely(!is_cpufreq_controller(currd)) || @@ -1158,7 +1158,7 @@ static int cf_check write_msr( case MSR_IA32_THERM_CONTROL: case MSR_IA32_ENERGY_PERF_BIAS: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) + if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ) break; if ( !is_hwdom_pinned_vcpu(curr) || wrmsr_safe(reg, val) == 0 ) return X86EMUL_OKAY; @@ -1168,12 +1168,12 @@ static int cf_check write_msr( case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3): case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) { vpmu_msr = true; case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.x86_vendor & + if ( vpmu_msr || (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) { if ( (vpmu_mode & XENPMU_MODE_ALL) && -- 2.51.1 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 09:58:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 09:58:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240477.1541844 (Exim 4.92) (envelope-from ) id 1vvBee-0002la-6X; Wed, 25 Feb 2026 09:58:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240477.1541844; Wed, 25 Feb 2026 09:58:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBee-0002lT-3o; Wed, 25 Feb 2026 09:58:04 +0000 Received: by outflank-mailman (input) for mailman id 1240477; Wed, 25 Feb 2026 09:58:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBec-0002lN-G5 for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 09:58:02 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 76f17b1f-1230-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 10:57:59 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6907165C; Wed, 25 Feb 2026 01:57:51 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.86]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E13E33F62B; Wed, 25 Feb 2026 01:57:56 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 76f17b1f-1230-11f1-b164-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 0/4] xen/arm: ffa: Add PARTITION_INFO_GET_REGS support Date: Wed, 25 Feb 2026 10:57:42 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series implements FF-A 1.2 PARTITION_INFO_GET_REGS support, providing register-based partition info retrieval as an efficient alternative to the RX buffer-based PARTITION_INFO_GET. The serie is also introducing a caching system for the list of secure partitions to prevent retrieving it on each VM call as we expect it to be static and not changing over time. The patches are organized as follows: - patch 1 is modifying existing code to prepare for GET_REGS support by adding a start_index in the existing internal function - patch 2 is introducing the secure partition list caching - patch 3 is removing the existing suscribers list to directly use the cached secure partition list - patch 4 is adding GET_REGS support Bertrand Marquis (4): xen/arm: ffa: Add start_index to VM partinfo helper xen/arm: ffa: Cache SP partition info at init xen/arm: ffa: Drop SP subscriber lists xen/arm: ffa: Add cached GET_REGS support xen/arch/arm/tee/ffa.c | 16 + xen/arch/arm/tee/ffa_partinfo.c | 558 ++++++++++++++++++++++---------- xen/arch/arm/tee/ffa_private.h | 4 +- 3 files changed, 402 insertions(+), 176 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 10:02:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 10:02:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240486.1541854 (Exim 4.92) (envelope-from ) id 1vvBit-0004M1-Lx; Wed, 25 Feb 2026 10:02:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240486.1541854; Wed, 25 Feb 2026 10:02:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBit-0004Lu-IQ; Wed, 25 Feb 2026 10:02:27 +0000 Received: by outflank-mailman (input) for mailman id 1240486; Wed, 25 Feb 2026 10:02:26 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBis-0004Lo-I7 for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 10:02:26 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 14c26905-1231-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 11:02:23 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA74D1691; Wed, 25 Feb 2026 02:02:16 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.86]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BCE703F62B; Wed, 25 Feb 2026 02:02:21 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 14c26905-1231-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 2/4] xen/arm: ffa: Cache SP partition info at init Date: Wed, 25 Feb 2026 10:57:44 +0100 Message-ID: <0a5f66eaa16f262d4ffad6a8ec4b1b02461f96c1.1772013062.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FFA_PARTITION_INFO_GET currently queries the SPMC on each call and walks the RX buffer every time. The SP list is expected to be static, so repeated firmware calls and validation are unnecessary. Cache the SPMC partition-info list at init time, keeping only secure endpoints, and reuse the cached entries for SP count and partition-info responses. Initialize the VM create/destroy subscriber lists from the cached list and free the cache on init failure. SP partition info now reflects the init-time snapshot and will not change. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_partinfo.c | 205 +++++++++++++++++++++----------- 1 file changed, 138 insertions(+), 67 deletions(-) diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index 6a6f3ffb822e..8a3eac25f99f 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -33,6 +34,10 @@ static uint16_t subscr_vm_created_count __read_mostly; static uint16_t *subscr_vm_destroyed __read_mostly; static uint16_t subscr_vm_destroyed_count __read_mostly; +/* SP list cache (secure endpoints only); populated at init. */ +static void *sp_list __read_mostly; +static uint32_t sp_list_count __read_mostly; +static uint32_t sp_list_entry_size __read_mostly; static int32_t ffa_partition_info_get(struct ffa_uuid uuid, uint32_t flags, uint32_t *count, uint32_t *fpi_size) { @@ -79,92 +84,78 @@ static int32_t ffa_copy_info(void **dst, void *dst_end, const void *src, return FFA_RET_OK; } -static int32_t ffa_get_sp_count(struct ffa_uuid uuid, uint32_t *sp_count) +static bool ffa_sp_entry_matches_uuid(const void *entry, struct ffa_uuid uuid) { - uint32_t src_size; + const struct ffa_partition_info_1_1 *fpi = entry; + struct ffa_uuid sp_uuid; + + if ( ffa_uuid_is_nil(uuid) ) + return true; - return ffa_partition_info_get(uuid, FFA_PARTITION_INFO_GET_COUNT_FLAG, - sp_count, &src_size); + if ( sp_list_entry_size < sizeof(*fpi) ) + return false; + + memcpy(&sp_uuid, fpi->uuid, sizeof(sp_uuid)); + return ffa_uuid_equal(uuid, sp_uuid); } -static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, - void **dst_buf, void *end_buf, - uint32_t dst_size) +static int32_t ffa_get_sp_count(struct ffa_uuid uuid, uint32_t *sp_count) { - int32_t ret; - int32_t release_ret; - uint32_t src_size, real_sp_count; - void *src_buf; uint32_t count = 0; - bool notify_fw = false; - - /* We need to use the RX buffer to receive the list */ - src_buf = ffa_rxtx_spmc_rx_acquire(); - if ( !src_buf ) - return FFA_RET_DENIED; - - ret = ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size); - if ( ret ) - goto out; - notify_fw = true; + uint32_t n; - /* Validate the src_size we got */ - if ( src_size < sizeof(struct ffa_partition_info_1_0) || - src_size >= FFA_PAGE_SIZE ) + for ( n = 0; n < sp_list_count; n++ ) { - ret = FFA_RET_NOT_SUPPORTED; - goto out; + void *entry = sp_list + n * sp_list_entry_size; + + if ( ffa_sp_entry_matches_uuid(entry, uuid) ) + count++; } - /* - * Limit the maximum time we hold the CPU by limiting the number of SPs. - * We just ignore the extra ones as this is tested during init in - * ffa_partinfo_init so the only possible reason is SP have been added - * since boot. - */ - if ( real_sp_count > FFA_MAX_NUM_SP ) - real_sp_count = FFA_MAX_NUM_SP; + *sp_count = count; - /* Make sure the data fits in our buffer */ - if ( real_sp_count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / src_size ) - { - ret = FFA_RET_NOT_SUPPORTED; - goto out; - } + if ( !ffa_uuid_is_nil(uuid) && !count ) + return FFA_RET_INVALID_PARAMETERS; - for ( uint32_t sp_num = 0; sp_num < real_sp_count; sp_num++ ) - { - struct ffa_partition_info_1_1 *fpi = src_buf; + return FFA_RET_OK; +} - /* filter out SP not following bit 15 convention if any */ - if ( FFA_ID_IS_SECURE(fpi->id) ) - { - /* - * If VM is 1.0 but firmware is 1.1 we could have several entries - * with the same ID but different UUIDs. In this case the VM will - * get a list with several time the same ID. - * This is a non-compliance to the specification but 1.0 VMs should - * handle that on their own to simplify Xen implementation. - */ +static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, + void **dst_buf, void *end_buf, + uint32_t dst_size) +{ + int32_t ret; + uint32_t count = 0; + uint32_t n; - ret = ffa_copy_info(dst_buf, end_buf, src_buf, dst_size, src_size); - if ( ret ) - goto out; + for ( n = 0; n < sp_list_count; n++ ) + { + void *entry = sp_list + n * sp_list_entry_size; - count++; - } + if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) + continue; - src_buf += src_size; + /* + * If VM is 1.0 but firmware is 1.1 we could have several entries + * with the same ID but different UUIDs. In this case the VM will + * get a list with several time the same ID. + * This is a non-compliance to the specification but 1.0 VMs should + * handle that on their own to simplify Xen implementation. + */ + ret = ffa_copy_info(dst_buf, end_buf, entry, dst_size, + sp_list_entry_size); + if ( ret ) + return ret; + + count++; } *sp_count = count; -out: - release_ret = ffa_rxtx_spmc_rx_release(notify_fw); - if ( release_ret ) - gprintk(XENLOG_WARNING, - "ffa: Error releasing SPMC RX buffer: %d\n", release_ret); - return ret; + if ( !ffa_uuid_is_nil(uuid) && !count ) + return FFA_RET_INVALID_PARAMETERS; + + return FFA_RET_OK; } static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t start_index, @@ -435,6 +426,14 @@ static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, return res; } +static void ffa_sp_list_cache_free(void) +{ + XFREE(sp_list); + sp_list = NULL; + sp_list_count = 0; + sp_list_entry_size = 0; +} + static void uninit_subscribers(void) { subscr_vm_created_count = 0; @@ -443,6 +442,68 @@ static void uninit_subscribers(void) XFREE(subscr_vm_destroyed); } +static bool ffa_sp_list_cache_init(const void *buf, uint32_t count, + uint32_t fpi_size) +{ + const uint8_t *src = buf; + uint32_t secure_count = 0; + uint32_t n, idx = 0; + bool warned = false; + + if ( fpi_size < sizeof(struct ffa_partition_info_1_0) || + fpi_size >= FFA_PAGE_SIZE ) + return false; + + if ( count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / fpi_size ) + return false; + + for ( n = 0; n < count; n++ ) + { + const struct ffa_partition_info_1_0 *fpi = + (const void *)(src + n * fpi_size); + + if ( !FFA_ID_IS_SECURE(fpi->id) ) + { + if ( !warned ) + { + printk_once(XENLOG_ERR + "ffa: Firmware is not using bit 15 convention for IDs !!\n"); + warned = true; + } + printk(XENLOG_ERR + "ffa: Secure partition with id 0x%04x cannot be used\n", + fpi->id); + continue; + } + + secure_count++; + } + + if ( secure_count ) + { + sp_list = xzalloc_bytes(secure_count * fpi_size); + if ( !sp_list ) + return false; + } + + sp_list_count = secure_count; + sp_list_entry_size = fpi_size; + + for ( n = 0; n < count; n++ ) + { + const struct ffa_partition_info_1_0 *fpi = + (const void *)(src + n * fpi_size); + + if ( !FFA_ID_IS_SECURE(fpi->id) ) + continue; + + memcpy(sp_list + idx * fpi_size, fpi, fpi_size); + idx++; + } + + return true; +} + static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_size) { uint16_t n; @@ -549,12 +610,22 @@ bool ffa_partinfo_init(void) goto out; } - ret = init_subscribers(spmc_rx, count, fpi_size); + if ( !ffa_sp_list_cache_init(spmc_rx, count, fpi_size) ) + { + printk(XENLOG_ERR "ffa: Failed to cache SP list\n"); + goto out; + } + + ret = init_subscribers(sp_list, sp_list_count, sp_list_entry_size); out: e = ffa_rxtx_spmc_rx_release(notify_fw); if ( e ) printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n", e); + if ( !ret ) + uninit_subscribers(); + if ( !ret ) + ffa_sp_list_cache_free(); return ret; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 10:02:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 10:02:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240487.1541864 (Exim 4.92) (envelope-from ) id 1vvBiu-0004Zd-Rq; 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Wed, 25 Feb 2026 02:02:15 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.86]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0C3073F62B; Wed, 25 Feb 2026 02:02:19 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 13b4c061-1231-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 1/4] xen/arm: ffa: Add start_index to VM partinfo helper Date: Wed, 25 Feb 2026 10:57:43 +0100 Message-ID: <826eae4c8346e79a227c8cf418cd5f42ee3420a1.1772013062.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Windowed GET_REGS retrieval needs to emit VM entries starting from an arbitrary index, but ffa_get_vm_partinfo() always starts from index 0. Add a start_index parameter to ffa_get_vm_partinfo() and skip entries until the local index reaches start_index. Update ffa_handle_partition_info_get() to pass start_index=0 to preserve existing behavior. No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_partinfo.c | 61 +++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 26 deletions(-) diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index fdb03dae9a0c..6a6f3ffb822e 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -167,14 +167,15 @@ out: return ret; } -static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t *vm_count, - void **dst_buf, void *end_buf, - uint32_t dst_size) +static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t start_index, + uint32_t *vm_count, void **dst_buf, + void *end_buf, uint32_t dst_size) { struct domain *d = current->domain; struct ffa_ctx *curr_ctx = d->arch.tee; struct ffa_ctx *dest_ctx; uint32_t count = 0; + uint32_t idx = 0; int32_t ret = FFA_RET_OK; /* * We do not have UUID info for VMs so use the 1.0 structure so that we set @@ -202,17 +203,21 @@ static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t *vm_count, if ( ACCESS_ONCE(curr_ctx->guest_vers) >= FFA_VERSION_1_2 ) { /* Add caller VM information */ - info.id = curr_ctx->ffa_id; - info.execution_context = curr_ctx->num_vcpus; - info.partition_properties = FFA_PART_VM_PROP; - if ( is_64bit_domain(d) ) - info.partition_properties |= FFA_PART_PROP_AARCH64_STATE; - - ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size, sizeof(info)); - if ( ret ) - return ret; + if ( start_index == 0) + { + info.id = curr_ctx->ffa_id; + info.execution_context = curr_ctx->num_vcpus; + info.partition_properties = FFA_PART_VM_PROP; + if ( is_64bit_domain(d) ) + info.partition_properties |= FFA_PART_PROP_AARCH64_STATE; - count++; + ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size, + sizeof(info)); + if ( ret ) + return ret; + count++; + } + idx++; } if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) @@ -231,21 +236,25 @@ static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t *vm_count, if ( dest_ctx == curr_ctx ) continue; - info.id = dest_ctx->ffa_id; - info.execution_context = dest_ctx->num_vcpus; - info.partition_properties = FFA_PART_VM_PROP; - if ( dest_ctx->is_64bit ) - info.partition_properties |= FFA_PART_PROP_AARCH64_STATE; - - ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size, - sizeof(info)); - if ( ret ) + if ( idx >= start_index ) { - read_unlock(&ffa_ctx_list_rwlock); - return ret; + info.id = dest_ctx->ffa_id; + info.execution_context = dest_ctx->num_vcpus; + info.partition_properties = FFA_PART_VM_PROP; + if ( dest_ctx->is_64bit ) + info.partition_properties |= FFA_PART_PROP_AARCH64_STATE; + + ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size, + sizeof(info)); + if ( ret ) + { + read_unlock(&ffa_ctx_list_rwlock); + return ret; + } + count++; } - count++; + idx++; } read_unlock(&ffa_ctx_list_rwlock); } @@ -355,7 +364,7 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs) goto out_rx_release; } - ret = ffa_get_vm_partinfo(uuid, &ffa_vm_count, &dst_buf, end_buf, + ret = ffa_get_vm_partinfo(uuid, 0, &ffa_vm_count, &dst_buf, end_buf, dst_size); out_rx_release: -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 10:02:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 10:02:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240488.1541874 (Exim 4.92) (envelope-from ) id 1vvBiw-0004nh-2o; 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Wed, 25 Feb 2026 02:02:18 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.86]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7D3033F62B; Wed, 25 Feb 2026 02:02:23 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 15d48a87-1231-11f1-9ccf-f158ae23cfc8 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 3/4] xen/arm: ffa: Drop SP subscriber lists Date: Wed, 25 Feb 2026 10:57:45 +0100 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The init-time SP cache already contains partition properties, but the code still builds separate subscriber arrays for VM created/destroyed notifications. That duplicates state and allocation. Use the cached SP list directly to: - decide which SPs receive created/destroyed notifications - build the per-domain destroy bitmap - skip destroy notifications for SPs not notified on create No functional changes. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_partinfo.c | 155 ++++++++------------------------ 1 file changed, 36 insertions(+), 119 deletions(-) diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index 8a3eac25f99f..d7f9b9f7153c 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -28,12 +28,6 @@ struct ffa_partition_info_1_1 { uint8_t uuid[16]; }; -/* SPs subscribing to VM_CREATE and VM_DESTROYED events */ -static uint16_t *subscr_vm_created __read_mostly; -static uint16_t subscr_vm_created_count __read_mostly; -static uint16_t *subscr_vm_destroyed __read_mostly; -static uint16_t subscr_vm_destroyed_count __read_mostly; - /* SP list cache (secure endpoints only); populated at init. */ static void *sp_list __read_mostly; static uint32_t sp_list_count __read_mostly; @@ -434,14 +428,6 @@ static void ffa_sp_list_cache_free(void) sp_list_entry_size = 0; } -static void uninit_subscribers(void) -{ - subscr_vm_created_count = 0; - subscr_vm_destroyed_count = 0; - XFREE(subscr_vm_created); - XFREE(subscr_vm_destroyed); -} - static bool ffa_sp_list_cache_init(const void *buf, uint32_t count, uint32_t fpi_size) { @@ -504,79 +490,6 @@ static bool ffa_sp_list_cache_init(const void *buf, uint32_t count, return true; } -static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_size) -{ - uint16_t n; - uint16_t c_pos; - uint16_t d_pos; - struct ffa_partition_info_1_1 *fpi; - - if ( fpi_size < sizeof(struct ffa_partition_info_1_1) ) - { - printk(XENLOG_ERR "ffa: partition info size invalid: %u\n", fpi_size); - return false; - } - - subscr_vm_created_count = 0; - subscr_vm_destroyed_count = 0; - for ( n = 0; n < count; n++ ) - { - fpi = buf + n * fpi_size; - - /* - * We need to have secure partitions using bit 15 set convention for - * secure partition IDs. - * Inform the user with a log and discard giving created or destroy - * event to those IDs. - */ - if ( !FFA_ID_IS_SECURE(fpi->id) ) - { - printk_once(XENLOG_ERR - "ffa: Firmware is not using bit 15 convention for IDs !!\n"); - printk(XENLOG_ERR - "ffa: Secure partition with id 0x%04x cannot be used\n", - fpi->id); - } - else - { - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED ) - subscr_vm_created_count++; - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROYED ) - subscr_vm_destroyed_count++; - } - } - - if ( subscr_vm_created_count ) - subscr_vm_created = xzalloc_array(uint16_t, subscr_vm_created_count); - if ( subscr_vm_destroyed_count ) - subscr_vm_destroyed = xzalloc_array(uint16_t, - subscr_vm_destroyed_count); - if ( (subscr_vm_created_count && !subscr_vm_created) || - (subscr_vm_destroyed_count && !subscr_vm_destroyed) ) - { - printk(XENLOG_ERR "ffa: Failed to allocate subscription lists\n"); - uninit_subscribers(); - return false; - } - - for ( c_pos = 0, d_pos = 0, n = 0; n < count; n++ ) - { - fpi = buf + n * fpi_size; - - if ( FFA_ID_IS_SECURE(fpi->id) ) - { - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED ) - subscr_vm_created[c_pos++] = fpi->id; - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROYED ) - subscr_vm_destroyed[d_pos++] = fpi->id; - } - } - - return true; -} - - - bool ffa_partinfo_init(void) { bool ret = false; @@ -616,48 +529,43 @@ bool ffa_partinfo_init(void) goto out; } - ret = init_subscribers(sp_list, sp_list_count, sp_list_entry_size); + if ( sp_list_entry_size < sizeof(struct ffa_partition_info_1_1) ) + { + printk(XENLOG_ERR "ffa: partition info size invalid: %u\n", + sp_list_entry_size); + goto out; + } + ret = true; out: e = ffa_rxtx_spmc_rx_release(notify_fw); if ( e ) printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n", e); - if ( !ret ) - uninit_subscribers(); if ( !ret ) ffa_sp_list_cache_free(); return ret; } -static bool is_in_subscr_list(const uint16_t *subscr, uint16_t start, - uint16_t end, uint16_t sp_id) +static void vm_destroy_bitmap_init(struct ffa_ctx *ctx, + unsigned int first_unnotified) { unsigned int n; + struct ffa_partition_info_1_1 *fpi; - for ( n = start; n < end; n++ ) + for ( n = 0; n < sp_list_count; n++ ) { - if ( subscr[n] == sp_id ) - return true; - } - - return false; -} + fpi = sp_list + n * sp_list_entry_size; -static void vm_destroy_bitmap_init(struct ffa_ctx *ctx, - unsigned int create_signal_count) -{ - unsigned int n; + if ( !(fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROYED) ) + continue; - for ( n = 0; n < subscr_vm_destroyed_count; n++ ) - { /* * Skip SPs subscribed to the VM created event that never was * notified of the VM creation due to an error during * ffa_domain_init(). */ - if ( is_in_subscr_list(subscr_vm_created, create_signal_count, - subscr_vm_created_count, - subscr_vm_destroyed[n]) ) + if ( (fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED) && + n >= first_unnotified ) continue; set_bit(n, ctx->vm_destroy_bitmap); @@ -666,32 +574,39 @@ static void vm_destroy_bitmap_init(struct ffa_ctx *ctx, int32_t ffa_partinfo_domain_init(struct domain *d) { - unsigned int count = BITS_TO_LONGS(subscr_vm_destroyed_count); + unsigned int count = BITS_TO_LONGS(sp_list_count); struct ffa_ctx *ctx = d->arch.tee; unsigned int n; + unsigned int first_unnotified = sp_list_count; int32_t res; + struct ffa_partition_info_1_1 *fpi; - if ( !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32) ) + if ( !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32) || !sp_list_count ) return 0; ctx->vm_destroy_bitmap = xzalloc_array(unsigned long, count); if ( !ctx->vm_destroy_bitmap ) return -ENOMEM; - for ( n = 0; n < subscr_vm_created_count; n++ ) + for ( n = 0; n < sp_list_count; n++ ) { - res = ffa_direct_req_send_vm(subscr_vm_created[n], ffa_get_vm_id(d), + fpi = sp_list + n * sp_list_entry_size; + if ( !(fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED) ) + continue; + + res = ffa_direct_req_send_vm(fpi->id, ffa_get_vm_id(d), FFA_MSG_SEND_VM_CREATED); if ( res ) { printk(XENLOG_ERR "ffa: Failed to report creation of vm_id %u to %u: res %d\n", - ffa_get_vm_id(d), subscr_vm_created[n], res); + ffa_get_vm_id(d), fpi->id, res); + first_unnotified = n; break; } } - vm_destroy_bitmap_init(ctx, n); + vm_destroy_bitmap_init(ctx, first_unnotified); - if ( n != subscr_vm_created_count ) + if ( first_unnotified != sp_list_count ) return -EIO; return 0; @@ -702,22 +617,24 @@ bool ffa_partinfo_domain_destroy(struct domain *d) struct ffa_ctx *ctx = d->arch.tee; unsigned int n; int32_t res; + struct ffa_partition_info_1_1 *fpi; if ( !ctx->vm_destroy_bitmap ) return true; - for ( n = 0; n < subscr_vm_destroyed_count; n++ ) + for ( n = 0; n < sp_list_count; n++ ) { if ( !test_bit(n, ctx->vm_destroy_bitmap) ) continue; - res = ffa_direct_req_send_vm(subscr_vm_destroyed[n], ffa_get_vm_id(d), + fpi = sp_list + n * sp_list_entry_size; + res = ffa_direct_req_send_vm(fpi->id, ffa_get_vm_id(d), FFA_MSG_SEND_VM_DESTROYED); if ( res && printk_ratelimit() ) printk(XENLOG_WARNING "%pd: ffa: Failed to report destruction of vm_id %u to %u: res %d\n", - d, ffa_get_vm_id(d), subscr_vm_destroyed[n], res); + d, ffa_get_vm_id(d), fpi->id, res); /* * For these two error codes the hypervisor is expected to resend @@ -729,7 +646,7 @@ bool ffa_partinfo_domain_destroy(struct domain *d) clear_bit(n, ctx->vm_destroy_bitmap); } - if ( bitmap_empty(ctx->vm_destroy_bitmap, subscr_vm_destroyed_count) ) + if ( bitmap_empty(ctx->vm_destroy_bitmap, sp_list_count) ) XFREE(ctx->vm_destroy_bitmap); return !ctx->vm_destroy_bitmap; -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 10:02:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 10:02:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240489.1541880 (Exim 4.92) (envelope-from ) id 1vvBiw-0004qq-EA; Wed, 25 Feb 2026 10:02:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240489.1541880; Wed, 25 Feb 2026 10:02:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBiw-0004pZ-5b; Wed, 25 Feb 2026 10:02:30 +0000 Received: by outflank-mailman (input) for mailman id 1240489; Wed, 25 Feb 2026 10:02:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvBiu-0004U5-Dp for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 10:02:28 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 16ea283a-1231-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 11:02:27 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 572B016A3; Wed, 25 Feb 2026 02:02:20 -0800 (PST) Received: from C3HXLD123V.arm.com (unknown [10.57.54.86]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 46CCB3F62B; Wed, 25 Feb 2026 02:02:25 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 16ea283a-1231-11f1-b164-2bf370ae4941 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Subject: [PATCH 4/4] xen/arm: ffa: Add cached GET_REGS support Date: Wed, 25 Feb 2026 10:57:46 +0100 Message-ID: <832ba950a53a7139b51053f6570fd9b26ba42df1.1772013062.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FF-A v1.2 defines PARTITION_INFO_GET_REGS for register-based partition info retrieval, but Xen currently only supports the buffer-based GET path for guests. Implement GET_REGS using the cached SP list and VM entries, including the register window layout and input validation. Track VM list changes via the partinfo tag and use it to validate GET_REGS tag inputs. Ensure that when a non-Nil UUID is specified, the UUID fields in both GET and GET_REGS results are MBZ as required by the specification. PARTITION_INFO_GET_REGS is available to v1.2 guests, returning cached SP entries and VM entries with UUIDs zeroed for non-Nil UUID queries. Signed-off-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 16 +++ xen/arch/arm/tee/ffa_partinfo.c | 211 ++++++++++++++++++++++++++++++++ xen/arch/arm/tee/ffa_private.h | 4 +- 3 files changed, 230 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index aa43ae2595d7..d56eb20c2239 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -44,6 +44,11 @@ * - doesn't support signalling the secondary scheduler of pending * notification for secure partitions * - doesn't support notifications for Xen itself + * o FFA_PARTITION_INFO_GET/GET_REGS: + * - v1.0 guests may see duplicate SP IDs when firmware provides UUIDs + * - SP list is cached at init; SPMC tag changes are not tracked + * between calls + * - SP list is capped at FFA_MAX_NUM_SP entries * * There are some large locked sections with ffa_spmc_tx_lock and * ffa_spmc_rx_lock. Especially the ffa_spmc_tx_lock spinlock used @@ -188,6 +193,7 @@ static bool ffa_negotiate_version(struct cpu_user_regs *regs) write_lock(&ffa_ctx_list_rwlock); list_add_tail(&ctx->ctx_list, &ffa_ctx_head); write_unlock(&ffa_ctx_list_rwlock); + ffa_partinfo_inc_tag(); } goto out_continue; @@ -341,6 +347,12 @@ static void handle_features(struct cpu_user_regs *regs) case FFA_FEATURE_SCHEDULE_RECV_INTR: ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0); break; + case FFA_PARTITION_INFO_GET_REGS: + if ( ACCESS_ONCE(ctx->guest_vers) >= FFA_VERSION_1_2 ) + ffa_set_regs_success(regs, 0, 0); + else + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); + break; case FFA_NOTIFICATION_BIND: case FFA_NOTIFICATION_UNBIND: @@ -402,6 +414,9 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) case FFA_PARTITION_INFO_GET: ffa_handle_partition_info_get(regs); return true; + case FFA_PARTITION_INFO_GET_REGS: + ffa_handle_partition_info_get_regs(regs); + return true; case FFA_RX_RELEASE: e = ffa_rx_release(ctx); break; @@ -629,6 +644,7 @@ static int ffa_domain_teardown(struct domain *d) write_lock(&ffa_ctx_list_rwlock); list_del(&ctx->ctx_list); write_unlock(&ffa_ctx_list_rwlock); + ffa_partinfo_inc_tag(); } ffa_rxtx_domain_destroy(d); diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c index d7f9b9f7153c..1c7b3579f798 100644 --- a/xen/arch/arm/tee/ffa_partinfo.c +++ b/xen/arch/arm/tee/ffa_partinfo.c @@ -28,10 +28,39 @@ struct ffa_partition_info_1_1 { uint8_t uuid[16]; }; +/* Registers a3..a17 (15 regs) carry partition descriptors, 3 regs each. */ +#define FFA_PARTINFO_REG_MAX_ENTRIES \ + ((15 * sizeof(uint64_t)) / sizeof(struct ffa_partition_info_1_1)) + /* SP list cache (secure endpoints only); populated at init. */ static void *sp_list __read_mostly; static uint32_t sp_list_count __read_mostly; static uint32_t sp_list_entry_size __read_mostly; + +/* SP list is static; tag only moves when VMs are added/removed. */ +static atomic_t ffa_partinfo_tag = ATOMIC_INIT(1); + +void ffa_partinfo_inc_tag(void) +{ + atomic_inc(&ffa_partinfo_tag); +} + +static inline uint16_t ffa_partinfo_get_tag(void) +{ + /* + * Tag moves with VM list changes only. + * + * Limitation: we cannot detect an SPMC tag change between calls because we + * do not retain the previous SPMC tag; we only refresh it via the mandatory + * start_index=0 call and assume it stays stable while combined_tag (our + * VM/SP-count tag) is used for guest validation. This means SPMC tag + * changes alone will not trigger RETRY. + */ + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + return atomic_read(&ffa_partinfo_tag) & GENMASK(15, 0); + else + return 1; +} static int32_t ffa_partition_info_get(struct ffa_uuid uuid, uint32_t flags, uint32_t *count, uint32_t *fpi_size) { @@ -125,6 +154,7 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, for ( n = 0; n < sp_list_count; n++ ) { void *entry = sp_list + n * sp_list_entry_size; + void *dst_pos; if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) continue; @@ -136,11 +166,20 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, * This is a non-compliance to the specification but 1.0 VMs should * handle that on their own to simplify Xen implementation. */ + dst_pos = *dst_buf; ret = ffa_copy_info(dst_buf, end_buf, entry, dst_size, sp_list_entry_size); if ( ret ) return ret; + if ( !ffa_uuid_is_nil(uuid) && + dst_size >= sizeof(struct ffa_partition_info_1_1) ) + { + struct ffa_partition_info_1_1 *fpi = dst_pos; + + memset(fpi->uuid, 0, sizeof(fpi->uuid)); + } + count++; } @@ -152,6 +191,38 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count, return FFA_RET_OK; } +static uint16_t ffa_get_sp_partinfo_regs(struct ffa_uuid uuid, + uint16_t start_index, + uint64_t *out_regs, + uint16_t max_entries) +{ + uint32_t idx = 0; + uint16_t filled = 0; + uint32_t n; + + for ( n = 0; n < sp_list_count && filled < max_entries; n++ ) + { + void *entry = sp_list + n * sp_list_entry_size; + + if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) + continue; + + if ( idx++ < start_index ) + continue; + + memcpy(&out_regs[filled * 3], entry, + sizeof(struct ffa_partition_info_1_1)); + if ( !ffa_uuid_is_nil(uuid) ) + { + out_regs[filled * 3 + 1] = 0; + out_regs[filled * 3 + 2] = 0; + } + filled++; + } + + return filled; +} + static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t start_index, uint32_t *vm_count, void **dst_buf, void *end_buf, uint32_t dst_size) @@ -368,6 +439,146 @@ out: } } +void ffa_handle_partition_info_get_regs(struct cpu_user_regs *regs) +{ + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + struct ffa_uuid uuid; + uint32_t sp_count = 0, vm_count = 0, total_count; + uint16_t start_index, tag; + uint16_t num_entries = 0; + uint64_t x3 = get_user_reg(regs, 3); + int32_t ret = FFA_RET_OK; + uint64_t out_regs[18] = { 0 }; + unsigned int n; + uint16_t tag_out; + + if ( ACCESS_ONCE(ctx->guest_vers) < FFA_VERSION_1_2 ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out; + } + + /* + * Registers a3..a17 (15 regs) carry partition descriptors, 3 regs each. + * For FF-A 1.2, that yields a maximum of 5 entries per GET_REGS call. + * Enforce the assumed layout so window sizing stays correct. + */ + BUILD_BUG_ON(FFA_PARTINFO_REG_MAX_ENTRIES != 5); + + for ( n = 4; n <= 17; n++ ) + { + if ( get_user_reg(regs, n) ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + } + + if ( x3 >> 32 ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + start_index = x3 & GENMASK(15, 0); + tag = (x3 >> 16) & GENMASK(15, 0); + + /* Start index must allow room for up to 5 entries without 16-bit overflow. */ + if ( start_index > (GENMASK(15, 0) - (FFA_PARTINFO_REG_MAX_ENTRIES - 1)) ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + uuid.val[0] = get_user_reg(regs, 1); + uuid.val[1] = get_user_reg(regs, 2); + + if ( sp_list_count && + sp_list_entry_size != sizeof(struct ffa_partition_info_1_1) ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out; + } + + tag_out = ffa_partinfo_get_tag(); + + if ( start_index == 0 ) + { + if ( tag ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + } + else if ( tag != tag_out ) + { + ret = FFA_RET_RETRY; + goto out; + } + + if ( ffa_uuid_is_nil(uuid) ) + { + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) + vm_count = get_ffa_vm_count(); + else + vm_count = 1; /* Caller VM only */ + } + + ret = ffa_get_sp_count(uuid, &sp_count); + if ( ret ) + goto out; + + total_count = sp_count + vm_count; + + if ( total_count == 0 || start_index >= total_count ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + if ( start_index < sp_count ) + num_entries = ffa_get_sp_partinfo_regs(uuid, start_index, &out_regs[3], + FFA_PARTINFO_REG_MAX_ENTRIES); + + if ( num_entries < FFA_PARTINFO_REG_MAX_ENTRIES ) + { + uint32_t vm_start = start_index > sp_count ? + start_index - sp_count : 0; + uint32_t filled = 0; + void *vm_dst = &out_regs[3 + num_entries * 3]; + void *vm_end = &out_regs[18]; + + ret = ffa_get_vm_partinfo(uuid, vm_start, &filled, &vm_dst, vm_end, + sizeof(struct ffa_partition_info_1_1)); + if ( ret != FFA_RET_OK && ret != FFA_RET_NO_MEMORY ) + goto out; + + num_entries += filled; + } + + if ( num_entries == 0 ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + out_regs[0] = FFA_SUCCESS_64; + out_regs[2] = ((uint64_t)sizeof(struct ffa_partition_info_1_1) << 48) | + ((uint64_t)tag_out << 32) | + ((uint64_t)(start_index + num_entries - 1) << 16) | + ((uint64_t)(total_count - 1) & GENMASK(15, 0)); + + for ( n = 0; n < ARRAY_SIZE(out_regs); n++ ) + set_user_reg(regs, n, out_regs[n]); + + return; + +out: + if ( ret ) + ffa_set_regs_error(regs, ret); +} + static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, uint8_t msg) { diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h index 1a632983c860..c291f32b56ff 100644 --- a/xen/arch/arm/tee/ffa_private.h +++ b/xen/arch/arm/tee/ffa_private.h @@ -289,7 +289,7 @@ #define FFA_MSG_SEND2 0x84000086U #define FFA_CONSOLE_LOG_32 0x8400008AU #define FFA_CONSOLE_LOG_64 0xC400008AU -#define FFA_PARTITION_INFO_GET_REGS 0x8400008BU +#define FFA_PARTITION_INFO_GET_REGS 0xC400008BU #define FFA_MSG_SEND_DIRECT_REQ2 0xC400008DU #define FFA_MSG_SEND_DIRECT_RESP2 0xC400008EU @@ -452,6 +452,8 @@ bool ffa_partinfo_init(void); int32_t ffa_partinfo_domain_init(struct domain *d); bool ffa_partinfo_domain_destroy(struct domain *d); void ffa_handle_partition_info_get(struct cpu_user_regs *regs); +void ffa_handle_partition_info_get_regs(struct cpu_user_regs *regs); +void ffa_partinfo_inc_tag(void); int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain **d_out, struct ffa_ctx **ctx_out); -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 10:50:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 10:50:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240547.1541895 (Exim 4.92) (envelope-from ) id 1vvCTa-0003PI-RG; Wed, 25 Feb 2026 10:50:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240547.1541895; Wed, 25 Feb 2026 10:50:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvCTa-0003PB-NC; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tue, Feb 24, 2026 at 09:28:57AM +0000, Teddy Astie wrote: > Le 23/02/2026 =C3=A0 17:15, Jan Beulich a =C3=A9crit=C2=A0: > > On 23.02.2026 17:06, Teddy Astie wrote: > >> xc_report_op returns -1 in some error conditions. > >> Make sure it returns -ENOMEM in out of memory errors and -EINVAL > >> in invalid usages errors. > > > > Isn't this a move in the wrong direction? -1 as a return value is quite= okay. > > errno wants setting to indicate the cause of the error (if called funct= ions > > don't already set it properly). > > > > To me, passing error through errno here feels more like a workaround > rather than a proper error handling. It doesn't feel consistent in libxc > overall (some functions returns a negative value corresponding to a > error number while some others -1; in some cases we update errno). > > What are the error handling rules for xenctrl ? They are written down. See https://elixir.bootlin.com/xen/v4.21.0/source/tools/include/xenctrl.h#L= 76 Unless otherwise specified, each function here returns zero or a non-null pointer on success; or in case of failure, sets errno and returns -1 or a null pointer. Unless otherwise specified, errors result in a call to the error handler function, which by default prints a message to the FILE* passed as the caller_data, which by default is stderr. (This is described below as "logging errors".) The error handler can safely trash errno, as libxc saves it across the callback. `errno` isn't a workaround, it is the way many libc functions and other passes generic error code. It may feel awkward, but that C. If some functions don't update `errno`, it might be because the syscall already set `errno` and there's no need to change it. Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:28:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:28:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240573.1541905 (Exim 4.92) (envelope-from ) id 1vvD3p-0007Ih-B9; Wed, 25 Feb 2026 11:28:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240573.1541905; Wed, 25 Feb 2026 11:28:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvD3p-0007IZ-7Y; Wed, 25 Feb 2026 11:28:09 +0000 Received: by outflank-mailman (input) for mailman id 1240573; Wed, 25 Feb 2026 11:28:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvD3n-0007IT-MC for xen-devel@lists.xenproject.org; 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The functions here are different from those in >>>>> arch/x86/lib/lib.a. We don't need to fear collision with "common code" >>>>> ones. Hence I preferred to use the more "normal" placement into what's >>>>> passed to the linker. >>>> I agree that we don't have the explicit ordering requirement that we >>>> have with arch/x86/lib/lib.a. >>>> >>>> But, it still reads as bogus to be putting arch/x86/lib/cpu-policy/lib.a >>>> in the non-ARCH list. >>>> >>>> What difference is there having this a little earlier in the linker >>>> arguments?  Nothing AFAICT. >>> Indeed. The sole reason why I'd prefer things as presented is that putting >>> stuff in ARCH_LIBS should imo be the special case (i.e. requiring a special >>> reason), while putting things in ALL_LIBS should be the default. >> I agree with Andrew that it feels weird that arch/x86/lib/lib.a is >> placed in ARCH_LIBS-y and arch/x86/lib/cpu-policy/lib.a is placed in >> ALL_LIBS-y. If we want to do it that way it needs a comment >> explaining why they are placed in different list, otherwise it seems >> like a typo on first sight, and it's likely to confuse people in the >> future. > Well, I'll (reluctantly) change then. Thanks.  With that done, Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:41:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:41:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240598.1541913 (Exim 4.92) (envelope-from ) id 1vvDGk-0001c7-HB; Wed, 25 Feb 2026 11:41:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240598.1541913; Wed, 25 Feb 2026 11:41:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDGk-0001c0-EM; Wed, 25 Feb 2026 11:41:30 +0000 Received: by outflank-mailman (input) for mailman id 1240598; Wed, 25 Feb 2026 11:41:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDGj-0001bu-Dt for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:41:29 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id eb2d419e-123e-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 12:41:26 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-4833115090dso64171775e9.3 for ; Wed, 25 Feb 2026 03:41:26 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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See individual patches. 1: introduce private header 2: move vpci_init_capabilities() to a separate file 3: move capability-list init 4: ReBAR: improve cleanup 5: re-init extended-capabilities when MMCFG availability changed Jan From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:43:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:43:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240607.1541923 (Exim 4.92) (envelope-from ) id 1vvDIQ-00026u-Rh; Wed, 25 Feb 2026 11:43:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240607.1541923; Wed, 25 Feb 2026 11:43:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDIQ-00026n-P8; Wed, 25 Feb 2026 11:43:14 +0000 Received: by outflank-mailman (input) for mailman id 1240607; Wed, 25 Feb 2026 11:43:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDIO-00026d-JT for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:43:12 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 25231154-123f-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 12:43:04 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4838c15e3cbso57168005e9.3 for ; Wed, 25 Feb 2026 03:43:04 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 03:43:03 -0800 (PST) Message-ID: Date: Wed, 25 Feb 2026 12:43:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 1/5] vPCI: introduce private header From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , Andrew Cooper , Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Anthony PERARD References: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Before adding more private stuff to xen/vpci.h, split it up. In order to be able to include the private header first in a CU, the per-arch struct decls also need to move (to new asm/vpci.h files). While adjusting the test harness'es Makefile, also switch the pre-existing header symlink-ing rule to a pattern one. Apart from in the test harness code, things only move; no functional change intended. Signed-off-by: Jan Beulich --- Subsequently, at least on x86 more stuff may want moving into asm/vpci.h. --- v5: Add new generated header to test harness clean rule and to .gitignore. Also move vpci_init_header(). v4: New. --- a/.gitignore +++ b/.gitignore @@ -154,6 +154,7 @@ tools/tests/x86_emulator/test_x86_emulat tools/tests/x86_emulator/x86_emulate tools/tests/x86_emulator/xop*.[ch] tools/tests/vpci/list.h +tools/tests/vpci/private.h tools/tests/vpci/vpci.[hc] tools/tests/vpci/test_vpci tools/xcutils/lsevtchn --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -14,12 +14,12 @@ else $(warning HOSTCC != CC, will not run test) endif -$(TARGET): vpci.c vpci.h list.h main.c emul.h - $(CC) $(CFLAGS_xeninclude) -g -o $@ vpci.c main.c +$(TARGET): vpci.c vpci.h list.h private.h main.c emul.h + $(CC) $(CFLAGS_xeninclude) -include emul.h -g -o $@ vpci.c main.c .PHONY: clean clean: - rm -rf $(TARGET) *.o *~ vpci.h vpci.c list.h + rm -rf $(TARGET) *.o *~ vpci.h vpci.c list.h private.h .PHONY: distclean distclean: clean @@ -34,10 +34,10 @@ uninstall: $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) vpci.c: $(XEN_ROOT)/xen/drivers/vpci/vpci.c - # Remove includes and add the test harness header - sed -e '/#include/d' -e '1s/^/#include "emul.h"/' <$< >$@ + sed -e '/#include/d' <$< >$@ + +private.h: %.h: $(XEN_ROOT)/xen/drivers/vpci/%.h + sed -e '/#include/d' <$< >$@ -list.h: $(XEN_ROOT)/xen/include/xen/list.h -vpci.h: $(XEN_ROOT)/xen/include/xen/vpci.h -list.h vpci.h: +list.h vpci.h: %.h: $(XEN_ROOT)/xen/include/xen/%.h sed -e '/#include/d' <$< >$@ --- a/tools/tests/vpci/emul.h +++ b/tools/tests/vpci/emul.h @@ -86,6 +86,7 @@ typedef union { #define CONFIG_HAS_VPCI #include "vpci.h" +#include "private.h" #define __hwdom_init --- a/xen/arch/arm/include/asm/pci.h +++ b/xen/arch/arm/include/asm/pci.h @@ -31,14 +31,6 @@ struct arch_pci_dev { struct device dev; }; -/* Arch-specific MSI data for vPCI. */ -struct vpci_arch_msi { -}; - -/* Arch-specific MSI-X entry data for vPCI. */ -struct vpci_arch_msix_entry { -}; - /* * Because of the header cross-dependencies, e.g. we need both * struct pci_dev and struct arch_pci_dev at the same time, this cannot be --- /dev/null +++ b/xen/arch/arm/include/asm/vpci.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ARM_VPCI_H +#define ARM_VPCI_H + +/* Arch-specific MSI data for vPCI. */ +struct vpci_arch_msi { +}; + +/* Arch-specific MSI-X entry data for vPCI. */ +struct vpci_arch_msix_entry { +}; + +#endif /* ARM_VPCI_H */ --- a/xen/arch/x86/include/asm/hvm/io.h +++ b/xen/arch/x86/include/asm/hvm/io.h @@ -97,17 +97,6 @@ void msixtbl_init(struct domain *d); static inline void msixtbl_init(struct domain *d) {} #endif -/* Arch-specific MSI data for vPCI. */ -struct vpci_arch_msi { - int pirq; - bool bound; -}; - -/* Arch-specific MSI-X entry data for vPCI. */ -struct vpci_arch_msix_entry { - int pirq; -}; - void stdvga_init(struct domain *d); extern void hvm_dpci_msi_eoi(struct domain *d, int vector); --- /dev/null +++ b/xen/arch/x86/include/asm/vpci.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef X86_VPCI_H +#define X86_VPCI_H + +#include + +/* Arch-specific MSI data for vPCI. */ +struct vpci_arch_msi { + int pirq; + bool bound; +}; + +/* Arch-specific MSI-X entry data for vPCI. */ +struct vpci_arch_msix_entry { + int pirq; +}; + +#endif /* X86_VPCI_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -17,11 +17,12 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include #include #include -#include #include --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -16,9 +16,10 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include -#include #include --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -17,10 +17,11 @@ * License along with this program; If not, see . */ +#include "private.h" + #include #include #include -#include #include #include --- /dev/null +++ b/xen/drivers/vpci/private.h @@ -0,0 +1,126 @@ +#ifndef VPCI_PRIVATE_H +#define VPCI_PRIVATE_H + +#include + +typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg, + void *data); + +typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, + uint32_t val, void *data); + +typedef struct { + unsigned int id; + bool is_ext; + int (* init)(struct pci_dev *pdev); + int (* cleanup)(const struct pci_dev *pdev, bool hide); +} vpci_capability_t; + +#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ + static const vpci_capability_t name##_entry \ + __used_section(".data.rel.ro.vpci") = { \ + .id = (cap), \ + .init = (finit), \ + .cleanup = (fclean), \ + .is_ext = (ext), \ + } + +#define REGISTER_VPCI_CAP(name, finit, fclean) \ + REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) +#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ + REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) + +int __must_check vpci_init_header(struct pci_dev *pdev); + +/* Add/remove a register handler. */ +int __must_check vpci_add_register_mask(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data, uint32_t ro_mask, + uint32_t rw1c_mask, uint32_t rsvdp_mask, + uint32_t rsvdz_mask); +int __must_check vpci_add_register(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data); + +int vpci_remove_registers(struct vpci *vpci, unsigned int start, + unsigned int size); + +/* Helper to return the value passed in data. */ +uint32_t cf_check vpci_read_val( + const struct pci_dev *pdev, unsigned int reg, void *data); + +/* Passthrough handlers. */ +uint32_t cf_check vpci_hw_read8( + const struct pci_dev *pdev, unsigned int reg, void *data); +uint32_t cf_check vpci_hw_read16( + const struct pci_dev *pdev, unsigned int reg, void *data); +uint32_t cf_check vpci_hw_read32( + const struct pci_dev *pdev, unsigned int reg, void *data); +void cf_check vpci_hw_write8( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); +void cf_check vpci_hw_write16( + const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); + +#ifdef __XEN__ +/* Make sure there's a hole in the p2m for the MSIX mmio areas. */ +int vpci_make_msix_hole(const struct pci_dev *pdev); + +/* + * Helper functions to fetch MSIX related data. They are used by both the + * emulated MSIX code and the BAR handlers. + */ +static inline paddr_t vmsix_table_host_base(const struct vpci *vpci, + unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr; +} + +static inline paddr_t vmsix_table_host_addr(const struct vpci *vpci, + unsigned int nr) +{ + return vmsix_table_host_base(vpci, nr) + + (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); +} + +static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & + PCI_MSIX_BIRMASK].guest_addr; +} + +static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) +{ + return vmsix_table_base(vpci, nr) + + (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); +} + +/* + * Note regarding the size calculation of the PBA: the spec mentions "The last + * QWORD will not necessarily be fully populated", so it implies that the PBA + * size is 64-bit aligned. + */ +static inline size_t vmsix_table_size(const struct vpci *vpci, unsigned int nr) +{ + return + (nr == VPCI_MSIX_TABLE) ? vpci->msix->max_entries * PCI_MSIX_ENTRY_SIZE + : ROUNDUP(DIV_ROUND_UP(vpci->msix->max_entries, + 8), 8); +} + +#endif /* __XEN__ */ + +#endif /* VPCI_PRIVATE_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/rebar.c +++ b/xen/drivers/vpci/rebar.c @@ -5,8 +5,9 @@ * Author: Jiqian Chen */ +#include "private.h" + #include -#include static void cf_check rebar_ctrl_write(const struct pci_dev *pdev, unsigned int reg, --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -17,8 +17,9 @@ * License along with this program; If not, see . */ +#include "private.h" + #include -#include #include /* Internal struct to store the emulated PCI registers. */ --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -7,18 +7,7 @@ #include #include -typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg, - void *data); - -typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, - uint32_t val, void *data); - -typedef struct { - unsigned int id; - bool is_ext; - int (* init)(struct pci_dev *pdev); - int (* cleanup)(const struct pci_dev *pdev, bool hide); -} vpci_capability_t; +#include #define VPCI_ECAM_BDF(addr) (((addr) & 0x0ffff000) >> 12) @@ -30,66 +19,17 @@ typedef struct { */ #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) -#define REGISTER_VPCI_CAPABILITY(cap, name, finit, fclean, ext) \ - static const vpci_capability_t name##_entry \ - __used_section(".data.rel.ro.vpci") = { \ - .id = (cap), \ - .init = (finit), \ - .cleanup = (fclean), \ - .is_ext = (ext), \ - } - -#define REGISTER_VPCI_CAP(name, finit, fclean) \ - REGISTER_VPCI_CAPABILITY(PCI_CAP_ID_##name, name, finit, fclean, false) -#define REGISTER_VPCI_EXTCAP(name, finit, fclean) \ - REGISTER_VPCI_CAPABILITY(PCI_EXT_CAP_ID_##name, name, finit, fclean, true) - -int __must_check vpci_init_header(struct pci_dev *pdev); - /* Assign vPCI to device by adding handlers. */ int __must_check vpci_assign_device(struct pci_dev *pdev); /* Remove all handlers and free vpci related structures. */ void vpci_deassign_device(struct pci_dev *pdev); -/* Add/remove a register handler. */ -int __must_check vpci_add_register_mask(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, unsigned int size, - void *data, uint32_t ro_mask, - uint32_t rw1c_mask, uint32_t rsvdp_mask, - uint32_t rsvdz_mask); -int __must_check vpci_add_register(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, unsigned int size, - void *data); - -int vpci_remove_registers(struct vpci *vpci, unsigned int start, - unsigned int size); - /* Generic read/write handlers for the PCI config space. */ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size); void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, uint32_t data); -/* Helper to return the value passed in data. */ -uint32_t cf_check vpci_read_val( - const struct pci_dev *pdev, unsigned int reg, void *data); - -/* Passthrough handlers. */ -uint32_t cf_check vpci_hw_read8( - const struct pci_dev *pdev, unsigned int reg, void *data); -uint32_t cf_check vpci_hw_read16( - const struct pci_dev *pdev, unsigned int reg, void *data); -uint32_t cf_check vpci_hw_read32( - const struct pci_dev *pdev, unsigned int reg, void *data); -void cf_check vpci_hw_write8( - const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); -void cf_check vpci_hw_write16( - const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); - /* * Check for pending vPCI operations on this vcpu. Returns true if the vcpu * should not run. @@ -213,9 +153,6 @@ struct vpci_vcpu { #ifdef __XEN__ void vpci_dump_msi(void); -/* Make sure there's a hole in the p2m for the MSIX mmio areas. */ -int vpci_make_msix_hole(const struct pci_dev *pdev); - /* Arch-specific vPCI MSI helpers. */ void vpci_msi_arch_mask(struct vpci_msi *msi, const struct pci_dev *pdev, unsigned int entry, bool mask); @@ -238,48 +175,6 @@ int __must_check vpci_msix_arch_disable_ void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry); int vpci_msix_arch_print(const struct vpci_msix *msix); -/* - * Helper functions to fetch MSIX related data. They are used by both the - * emulated MSIX code and the BAR handlers. - */ -static inline paddr_t vmsix_table_host_base(const struct vpci *vpci, - unsigned int nr) -{ - return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr; -} - -static inline paddr_t vmsix_table_host_addr(const struct vpci *vpci, - unsigned int nr) -{ - return vmsix_table_host_base(vpci, nr) + - (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); -} - -static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr) -{ - return vpci->header.bars[vpci->msix->tables[nr] & - PCI_MSIX_BIRMASK].guest_addr; -} - -static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) -{ - return vmsix_table_base(vpci, nr) + - (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); -} - -/* - * Note regarding the size calculation of the PBA: the spec mentions "The last - * QWORD will not necessarily be fully populated", so it implies that the PBA - * size is 64-bit aligned. - */ -static inline size_t vmsix_table_size(const struct vpci *vpci, unsigned int nr) -{ - return - (nr == VPCI_MSIX_TABLE) ? vpci->msix->max_entries * PCI_MSIX_ENTRY_SIZE - : ROUNDUP(DIV_ROUND_UP(vpci->msix->max_entries, - 8), 8); -} - static inline unsigned int vmsix_entry_nr(const struct vpci_msix *msix, const struct vpci_msix_entry *entry) { From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:43:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:43:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240610.1541934 (Exim 4.92) (envelope-from ) id 1vvDIm-0002Tr-3a; Wed, 25 Feb 2026 11:43:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240610.1541934; Wed, 25 Feb 2026 11:43:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDIm-0002Ti-0C; Wed, 25 Feb 2026 11:43:36 +0000 Received: by outflank-mailman (input) for mailman id 1240610; Wed, 25 Feb 2026 11:43:35 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDIl-0002SC-BY for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:43:35 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 36268e7e-123f-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 12:43:32 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-48375f1defeso46010455e9.0 for ; Wed, 25 Feb 2026 03:43:32 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Start with moving vpci_init_capabilities() and its helpers, plus splitting out of its cleanup counterpart. Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand Acked-by: Roger Pau Monné --- vpci_get_register(), while now only used by cap.c, didn't look like it would want moving there. --- v4: New. --- a/xen/drivers/vpci/Makefile +++ b/xen/drivers/vpci/Makefile @@ -1,2 +1,3 @@ +obj-y += cap.o obj-y += vpci.o header.o rebar.o obj-$(CONFIG_HAS_PCI_MSI) += msi.o msix.o --- /dev/null +++ b/xen/drivers/vpci/cap.c @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Capability handling for guest PCI configuration space. + */ + +#include "private.h" + +#include + +extern const vpci_capability_t __start_vpci_array[]; +extern const vpci_capability_t __end_vpci_array[]; +#define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array) + +static struct vpci_register *vpci_get_previous_cap_register( + const struct vpci *vpci, unsigned int offset) +{ + unsigned int next; + struct vpci_register *r; + + if ( offset < 0x40 ) + { + ASSERT_UNREACHABLE(); + return NULL; + } + + for ( r = vpci_get_register(vpci, PCI_CAPABILITY_LIST, 1); r; + r = next >= 0x40 ? vpci_get_register(vpci, + next + PCI_CAP_LIST_NEXT, 1) + : NULL ) + { + next = (unsigned int)(uintptr_t)r->private; + ASSERT(next == (uintptr_t)r->private); + if ( next == offset ) + break; + } + + return r; +} + +static int vpci_capability_hide(const struct pci_dev *pdev, unsigned int cap) +{ + const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap); + struct vpci_register *prev_r, *next_r; + struct vpci *vpci = pdev->vpci; + + if ( !offset ) + { + ASSERT_UNREACHABLE(); + return 0; + } + + spin_lock(&vpci->lock); + prev_r = vpci_get_previous_cap_register(vpci, offset); + next_r = vpci_get_register(vpci, offset + PCI_CAP_LIST_NEXT, 1); + if ( !prev_r || !next_r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + prev_r->private = next_r->private; + /* + * Not calling vpci_remove_registers() here is to avoid redoing + * the register search. + */ + list_del(&next_r->node); + spin_unlock(&vpci->lock); + xfree(next_r); + + if ( !is_hardware_domain(pdev->domain) ) + return vpci_remove_registers(vpci, offset + PCI_CAP_LIST_ID, 1); + + return 0; +} + +static struct vpci_register *vpci_get_previous_ext_cap_register( + const struct vpci *vpci, unsigned int offset) +{ + unsigned int pos = PCI_CFG_SPACE_SIZE; + struct vpci_register *r; + + if ( offset <= PCI_CFG_SPACE_SIZE ) + { + ASSERT_UNREACHABLE(); + return NULL; + } + + for ( r = vpci_get_register(vpci, pos, 4); r; + r = pos > PCI_CFG_SPACE_SIZE ? vpci_get_register(vpci, pos, 4) + : NULL ) + { + uint32_t header = (uint32_t)(uintptr_t)r->private; + + ASSERT(header == (uintptr_t)r->private); + + pos = PCI_EXT_CAP_NEXT(header); + if ( pos == offset ) + break; + } + + return r; +} + +static int vpci_ext_capability_hide( + const struct pci_dev *pdev, unsigned int cap) +{ + const unsigned int offset = pci_find_ext_capability(pdev, cap); + struct vpci_register *r, *prev_r; + struct vpci *vpci = pdev->vpci; + uint32_t header, pre_header; + + if ( offset < PCI_CFG_SPACE_SIZE ) + { + ASSERT_UNREACHABLE(); + return 0; + } + + spin_lock(&vpci->lock); + r = vpci_get_register(vpci, offset, 4); + if ( !r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + header = (uint32_t)(uintptr_t)r->private; + if ( offset == PCI_CFG_SPACE_SIZE ) + { + if ( PCI_EXT_CAP_NEXT(header) <= PCI_CFG_SPACE_SIZE ) + r->private = (void *)0; + else + /* + * The first extended capability (0x100) can not be removed from + * the linked list, so instead mask its capability ID to return 0 + * hopefully forcing OSes to skip it. + */ + r->private = (void *)(uintptr_t)(header & ~PCI_EXT_CAP_ID(header)); + + spin_unlock(&vpci->lock); + return 0; + } + + prev_r = vpci_get_previous_ext_cap_register(vpci, offset); + if ( !prev_r ) + { + spin_unlock(&vpci->lock); + return -ENODEV; + } + + pre_header = (uint32_t)(uintptr_t)prev_r->private; + pre_header &= ~PCI_EXT_CAP_NEXT_MASK; + pre_header |= header & PCI_EXT_CAP_NEXT_MASK; + prev_r->private = (void *)(uintptr_t)pre_header; + + list_del(&r->node); + spin_unlock(&vpci->lock); + xfree(r); + + return 0; +} + +int vpci_init_capabilities(struct pci_dev *pdev) +{ + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) + { + const vpci_capability_t *capability = &__start_vpci_array[i]; + const unsigned int cap = capability->id; + const bool is_ext = capability->is_ext; + unsigned int pos = 0; + int rc; + + if ( !is_ext ) + pos = pci_find_cap_offset(pdev->sbdf, cap); + else if ( is_hardware_domain(pdev->domain) ) + pos = pci_find_ext_capability(pdev, cap); + + if ( !pos ) + continue; + + rc = capability->init(pdev); + if ( rc ) + { + const char *type = is_ext ? "extended" : "legacy"; + + printk(XENLOG_WARNING + "%pd %pp: init %s cap %u fail rc=%d, mask it\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + + if ( capability->cleanup ) + { + rc = capability->cleanup(pdev, true); + if ( rc ) + { + printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + if ( !is_hardware_domain(pdev->domain) ) + return rc; + } + } + + if ( !is_ext ) + rc = vpci_capability_hide(pdev, cap); + else + rc = vpci_ext_capability_hide(pdev, cap); + if ( rc ) + { + printk(XENLOG_ERR "%pd %pp: hide %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, type, cap, rc); + return rc; + } + } + } + + return 0; +} + +void vpci_cleanup_capabilities(struct pci_dev *pdev) +{ + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) + { + const vpci_capability_t *capability = &__start_vpci_array[i]; + const unsigned int cap = capability->id; + unsigned int pos = 0; + + if ( !capability->cleanup ) + continue; + + if ( !capability->is_ext ) + pos = pci_find_cap_offset(pdev->sbdf, cap); + else if ( is_hardware_domain(pdev->domain) ) + pos = pci_find_ext_capability(pdev, cap); + if ( pos ) + { + int rc = capability->cleanup(pdev, false); + + if ( rc ) + printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", + pdev->domain, &pdev->sbdf, + capability->is_ext ? "extended" : "legacy", cap, rc); + } + } +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/drivers/vpci/private.h +++ b/xen/drivers/vpci/private.h @@ -9,6 +9,20 @@ typedef uint32_t vpci_read_t(const struc typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); +/* Internal struct to store the emulated PCI registers. */ +struct vpci_register { + vpci_read_t *read; + vpci_write_t *write; + unsigned int size; + unsigned int offset; + void *private; + struct list_head node; + uint32_t ro_mask; + uint32_t rw1c_mask; + uint32_t rsvdp_mask; + uint32_t rsvdz_mask; +}; + typedef struct { unsigned int id; bool is_ext; @@ -32,6 +46,9 @@ typedef struct { int __must_check vpci_init_header(struct pci_dev *pdev); +int vpci_init_capabilities(struct pci_dev *pdev); +void vpci_cleanup_capabilities(struct pci_dev *pdev); + /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler, @@ -49,6 +66,10 @@ int __must_check vpci_add_register(struc int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size); +struct vpci_register *vpci_get_register(const struct vpci *vpci, + unsigned int offset, + unsigned int size); + /* Helper to return the value passed in data. */ uint32_t cf_check vpci_read_val( const struct pci_dev *pdev, unsigned int reg, void *data); --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -22,24 +22,7 @@ #include #include -/* Internal struct to store the emulated PCI registers. */ -struct vpci_register { - vpci_read_t *read; - vpci_write_t *write; - unsigned int size; - unsigned int offset; - void *private; - struct list_head node; - uint32_t ro_mask; - uint32_t rw1c_mask; - uint32_t rsvdp_mask; - uint32_t rsvdz_mask; -}; - #ifdef __XEN__ -extern const vpci_capability_t __start_vpci_array[]; -extern const vpci_capability_t __end_vpci_array[]; -#define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array) #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT static int assign_virtual_sbdf(struct pci_dev *pdev) @@ -84,9 +67,9 @@ static int assign_virtual_sbdf(struct pc #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */ -static struct vpci_register *vpci_get_register(const struct vpci *vpci, - unsigned int offset, - unsigned int size) +struct vpci_register *vpci_get_register(const struct vpci *vpci, + unsigned int offset, + unsigned int size) { struct vpci_register *r; @@ -104,209 +87,6 @@ static struct vpci_register *vpci_get_re return NULL; } -static struct vpci_register *vpci_get_previous_cap_register( - const struct vpci *vpci, unsigned int offset) -{ - unsigned int next; - struct vpci_register *r; - - if ( offset < 0x40 ) - { - ASSERT_UNREACHABLE(); - return NULL; - } - - for ( r = vpci_get_register(vpci, PCI_CAPABILITY_LIST, 1); r; - r = next >= 0x40 ? vpci_get_register(vpci, - next + PCI_CAP_LIST_NEXT, 1) - : NULL ) - { - next = (unsigned int)(uintptr_t)r->private; - ASSERT(next == (uintptr_t)r->private); - if ( next == offset ) - break; - } - - return r; -} - -static int vpci_capability_hide(const struct pci_dev *pdev, unsigned int cap) -{ - const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap); - struct vpci_register *prev_r, *next_r; - struct vpci *vpci = pdev->vpci; - - if ( !offset ) - { - ASSERT_UNREACHABLE(); - return 0; - } - - spin_lock(&vpci->lock); - prev_r = vpci_get_previous_cap_register(vpci, offset); - next_r = vpci_get_register(vpci, offset + PCI_CAP_LIST_NEXT, 1); - if ( !prev_r || !next_r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - prev_r->private = next_r->private; - /* - * Not calling vpci_remove_registers() here is to avoid redoing - * the register search. - */ - list_del(&next_r->node); - spin_unlock(&vpci->lock); - xfree(next_r); - - if ( !is_hardware_domain(pdev->domain) ) - return vpci_remove_registers(vpci, offset + PCI_CAP_LIST_ID, 1); - - return 0; -} - -static struct vpci_register *vpci_get_previous_ext_cap_register( - const struct vpci *vpci, unsigned int offset) -{ - unsigned int pos = PCI_CFG_SPACE_SIZE; - struct vpci_register *r; - - if ( offset <= PCI_CFG_SPACE_SIZE ) - { - ASSERT_UNREACHABLE(); - return NULL; - } - - for ( r = vpci_get_register(vpci, pos, 4); r; - r = pos > PCI_CFG_SPACE_SIZE ? vpci_get_register(vpci, pos, 4) - : NULL ) - { - uint32_t header = (uint32_t)(uintptr_t)r->private; - - ASSERT(header == (uintptr_t)r->private); - - pos = PCI_EXT_CAP_NEXT(header); - if ( pos == offset ) - break; - } - - return r; -} - -static int vpci_ext_capability_hide( - const struct pci_dev *pdev, unsigned int cap) -{ - const unsigned int offset = pci_find_ext_capability(pdev, cap); - struct vpci_register *r, *prev_r; - struct vpci *vpci = pdev->vpci; - uint32_t header, pre_header; - - if ( offset < PCI_CFG_SPACE_SIZE ) - { - ASSERT_UNREACHABLE(); - return 0; - } - - spin_lock(&vpci->lock); - r = vpci_get_register(vpci, offset, 4); - if ( !r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - header = (uint32_t)(uintptr_t)r->private; - if ( offset == PCI_CFG_SPACE_SIZE ) - { - if ( PCI_EXT_CAP_NEXT(header) <= PCI_CFG_SPACE_SIZE ) - r->private = (void *)0; - else - /* - * The first extended capability (0x100) can not be removed from - * the linked list, so instead mask its capability ID to return 0 - * hopefully forcing OSes to skip it. - */ - r->private = (void *)(uintptr_t)(header & ~PCI_EXT_CAP_ID(header)); - - spin_unlock(&vpci->lock); - return 0; - } - - prev_r = vpci_get_previous_ext_cap_register(vpci, offset); - if ( !prev_r ) - { - spin_unlock(&vpci->lock); - return -ENODEV; - } - - pre_header = (uint32_t)(uintptr_t)prev_r->private; - pre_header &= ~PCI_EXT_CAP_NEXT_MASK; - pre_header |= header & PCI_EXT_CAP_NEXT_MASK; - prev_r->private = (void *)(uintptr_t)pre_header; - - list_del(&r->node); - spin_unlock(&vpci->lock); - xfree(r); - - return 0; -} - -static int vpci_init_capabilities(struct pci_dev *pdev) -{ - for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) - { - const vpci_capability_t *capability = &__start_vpci_array[i]; - const unsigned int cap = capability->id; - const bool is_ext = capability->is_ext; - unsigned int pos = 0; - int rc; - - if ( !is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); - else if ( is_hardware_domain(pdev->domain) ) - pos = pci_find_ext_capability(pdev, cap); - - if ( !pos ) - continue; - - rc = capability->init(pdev); - if ( rc ) - { - const char *type = is_ext ? "extended" : "legacy"; - - printk(XENLOG_WARNING - "%pd %pp: init %s cap %u fail rc=%d, mask it\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - - if ( capability->cleanup ) - { - rc = capability->cleanup(pdev, true); - if ( rc ) - { - printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - if ( !is_hardware_domain(pdev->domain) ) - return rc; - } - } - - if ( !is_ext ) - rc = vpci_capability_hide(pdev, cap); - else - rc = vpci_ext_capability_hide(pdev, cap); - if ( rc ) - { - printk(XENLOG_ERR "%pd %pp: hide %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, type, cap, rc); - return rc; - } - } - } - - return 0; -} - void vpci_deassign_device(struct pci_dev *pdev) { unsigned int i; @@ -322,29 +102,7 @@ void vpci_deassign_device(struct pci_dev &pdev->domain->vpci_dev_assigned_map); #endif - for ( i = 0; i < NUM_VPCI_INIT; i++ ) - { - const vpci_capability_t *capability = &__start_vpci_array[i]; - const unsigned int cap = capability->id; - unsigned int pos = 0; - - if ( !capability->cleanup ) - continue; - - if ( !capability->is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); - else if ( is_hardware_domain(pdev->domain) ) - pos = pci_find_ext_capability(pdev, cap); - if ( pos ) - { - int rc = capability->cleanup(pdev, false); - - if ( rc ) - printk(XENLOG_ERR "%pd %pp: clean %s cap %u fail rc=%d\n", - pdev->domain, &pdev->sbdf, - capability->is_ext ? "extended" : "legacy", cap, rc); - } - } + vpci_cleanup_capabilities(pdev); spin_lock(&pdev->vpci->lock); while ( !list_empty(&pdev->vpci->handlers) ) From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:44:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:44:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240623.1541943 (Exim 4.92) (envelope-from ) id 1vvDJE-00032f-DC; Wed, 25 Feb 2026 11:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240623.1541943; Wed, 25 Feb 2026 11:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJE-00032Y-AW; Wed, 25 Feb 2026 11:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1240623; Wed, 25 Feb 2026 11:44:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJD-0002SC-1Q for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:44:03 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 470d1f37-123f-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 12:44:01 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-483487335c2so58992385e9.2 for ; Wed, 25 Feb 2026 03:44:01 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Don't invoke them directly in vpci_init_header(), but instead first thing in vpci_init_capabilities(). Suggested-by: Roger Pau Monné Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand Acked-by: Roger Pau Monné --- v4: New. --- a/xen/drivers/vpci/cap.c +++ b/xen/drivers/vpci/cap.c @@ -159,15 +159,150 @@ static int vpci_ext_capability_hide( return 0; } +static int vpci_init_capability_list(struct pci_dev *pdev) +{ + int rc; + bool mask_cap_list = false; + bool is_hwdom = is_hardware_domain(pdev->domain); + + if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST ) + { + /* Only expose capabilities to the guest that vPCI can handle. */ + unsigned int next, ttl = 48; + static const unsigned int supported_caps[] = { + PCI_CAP_ID_MSI, + PCI_CAP_ID_MSIX, + }; + /* + * For dom0, we should expose all capabilities instead of a fixed + * capabilities array, so setting n to 0 here is to get the next + * capability position directly in pci_find_next_cap_ttl. + */ + const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps); + + next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST, + supported_caps, n, &ttl); + + rc = vpci_add_register(pdev->vpci, vpci_read_val, + is_hwdom ? vpci_hw_write8 : NULL, + PCI_CAPABILITY_LIST, 1, + (void *)(uintptr_t)next); + if ( rc ) + return rc; + + next &= ~3; + + if ( !next && !is_hwdom ) + /* + * If we don't have any supported capabilities to expose to the + * guest, mask the PCI_STATUS_CAP_LIST bit in the status + * register. + */ + mask_cap_list = true; + + while ( next && ttl ) + { + unsigned int pos = next; + + next = pci_find_next_cap_ttl(pdev->sbdf, + pos + PCI_CAP_LIST_NEXT, + supported_caps, n, &ttl); + + if ( !is_hwdom ) + { + rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL, + pos + PCI_CAP_LIST_ID, 1, NULL); + if ( rc ) + return rc; + } + + rc = vpci_add_register(pdev->vpci, vpci_read_val, + is_hwdom ? vpci_hw_write8 : NULL, + pos + PCI_CAP_LIST_NEXT, 1, + (void *)(uintptr_t)next); + if ( rc ) + return rc; + + next &= ~3; + } + } + + /* Return early for the hw domain, no masking of PCI_STATUS. */ + if ( is_hwdom ) + return 0; + + /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */ + return vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16, + PCI_STATUS, 2, NULL, + PCI_STATUS_RO_MASK & + ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0), + PCI_STATUS_RW1C_MASK, + mask_cap_list ? PCI_STATUS_CAP_LIST : 0, + PCI_STATUS_RSVDZ_MASK); +} + +static int vpci_init_ext_capability_list(const struct pci_dev *pdev) +{ + unsigned int pos = PCI_CFG_SPACE_SIZE; + + if ( !pdev->ext_cfg ) + return 0; + + if ( !is_hardware_domain(pdev->domain) ) + /* Extended capabilities read as zero, write ignore for DomU */ + return vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, 4, (void *)0); + + do + { + uint32_t header = pci_conf_read32(pdev->sbdf, pos); + int rc; + + if ( header == 0xffffffffU ) + { + printk(XENLOG_WARNING + "%pd %pp: broken extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + + rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, 4, (void *)(uintptr_t)header); + if ( rc == -EEXIST ) + { + printk(XENLOG_WARNING + "%pd %pp: overlap in extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + + if ( rc ) + return rc; + + pos = PCI_EXT_CAP_NEXT(header); + } while ( pos >= PCI_CFG_SPACE_SIZE ); + + return 0; +} + int vpci_init_capabilities(struct pci_dev *pdev) { + int rc; + + rc = vpci_init_capability_list(pdev); + if ( rc ) + return rc; + + rc = vpci_init_ext_capability_list(pdev); + if ( rc ) + return rc; + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) { const vpci_capability_t *capability = &__start_vpci_array[i]; const unsigned int cap = capability->id; const bool is_ext = capability->is_ext; unsigned int pos = 0; - int rc; if ( !is_ext ) pos = pci_find_cap_offset(pdev->sbdf, cap); --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -744,132 +744,6 @@ static int bar_add_rangeset(const struct return !bar->mem ? -ENOMEM : 0; } -static int vpci_init_capability_list(struct pci_dev *pdev) -{ - int rc; - bool mask_cap_list = false; - bool is_hwdom = is_hardware_domain(pdev->domain); - - if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST ) - { - /* Only expose capabilities to the guest that vPCI can handle. */ - unsigned int next, ttl = 48; - static const unsigned int supported_caps[] = { - PCI_CAP_ID_MSI, - PCI_CAP_ID_MSIX, - }; - /* - * For dom0, we should expose all capabilities instead of a fixed - * capabilities array, so setting n to 0 here is to get the next - * capability position directly in pci_find_next_cap_ttl. - */ - const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps); - - next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST, - supported_caps, n, &ttl); - - rc = vpci_add_register(pdev->vpci, vpci_read_val, - is_hwdom ? vpci_hw_write8 : NULL, - PCI_CAPABILITY_LIST, 1, - (void *)(uintptr_t)next); - if ( rc ) - return rc; - - next &= ~3; - - if ( !next && !is_hwdom ) - /* - * If we don't have any supported capabilities to expose to the - * guest, mask the PCI_STATUS_CAP_LIST bit in the status - * register. - */ - mask_cap_list = true; - - while ( next && ttl ) - { - unsigned int pos = next; - - next = pci_find_next_cap_ttl(pdev->sbdf, - pos + PCI_CAP_LIST_NEXT, - supported_caps, n, &ttl); - - if ( !is_hwdom ) - { - rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL, - pos + PCI_CAP_LIST_ID, 1, NULL); - if ( rc ) - return rc; - } - - rc = vpci_add_register(pdev->vpci, vpci_read_val, - is_hwdom ? vpci_hw_write8 : NULL, - pos + PCI_CAP_LIST_NEXT, 1, - (void *)(uintptr_t)next); - if ( rc ) - return rc; - - next &= ~3; - } - } - - /* Return early for the hw domain, no masking of PCI_STATUS. */ - if ( is_hwdom ) - return 0; - - /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */ - return vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16, - PCI_STATUS, 2, NULL, - PCI_STATUS_RO_MASK & - ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0), - PCI_STATUS_RW1C_MASK, - mask_cap_list ? PCI_STATUS_CAP_LIST : 0, - PCI_STATUS_RSVDZ_MASK); -} - -static int vpci_init_ext_capability_list(const struct pci_dev *pdev) -{ - unsigned int pos = PCI_CFG_SPACE_SIZE; - - if ( !pdev->ext_cfg ) - return 0; - - if ( !is_hardware_domain(pdev->domain) ) - /* Extended capabilities read as zero, write ignore for DomU */ - return vpci_add_register(pdev->vpci, vpci_read_val, NULL, - pos, 4, (void *)0); - - do - { - uint32_t header = pci_conf_read32(pdev->sbdf, pos); - int rc; - - if ( header == 0xffffffffU ) - { - printk(XENLOG_WARNING - "%pd %pp: broken extended cap list, offset %#x\n", - pdev->domain, &pdev->sbdf, pos); - return 0; - } - - rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, - pos, 4, (void *)(uintptr_t)header); - if ( rc == -EEXIST ) - { - printk(XENLOG_WARNING - "%pd %pp: overlap in extended cap list, offset %#x\n", - pdev->domain, &pdev->sbdf, pos); - return 0; - } - - if ( rc ) - return rc; - - pos = PCI_EXT_CAP_NEXT(header); - } while ( pos >= PCI_CFG_SPACE_SIZE ); - - return 0; -} - int vpci_init_header(struct pci_dev *pdev) { uint16_t cmd; @@ -918,14 +792,6 @@ int vpci_init_header(struct pci_dev *pde if ( rc ) return rc; - rc = vpci_init_capability_list(pdev); - if ( rc ) - return rc; - - rc = vpci_init_ext_capability_list(pdev); - if ( rc ) - return rc; - if ( pdev->ignore_bars ) return 0; From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:44:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:44:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240633.1541954 (Exim 4.92) (envelope-from ) id 1vvDJa-0003ZC-Lf; Wed, 25 Feb 2026 11:44:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240633.1541954; Wed, 25 Feb 2026 11:44:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJa-0003Z5-HS; Wed, 25 Feb 2026 11:44:26 +0000 Received: by outflank-mailman (input) for mailman id 1240633; Wed, 25 Feb 2026 11:44:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJZ-0002tl-Qn for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:44:25 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5537a146-123f-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 12:44:24 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-439857ec679so1690940f8f.2 for ; Wed, 25 Feb 2026 03:44:24 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 03:44:24 -0800 (PST) Message-ID: <252e527e-dcb2-4710-8a43-070c49512e00@suse.com> Date: Wed, 25 Feb 2026 12:44:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 4/5] vPCI/ReBAR: improve cleanup From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit We cannot assume extended config space to (still) be accessible when cleaning up. Necessary value need caching instead. In fact, as the caller also cannot look up extended capabilities, the cleanup function needs to cope with being called when there's no ReBAR capability at all. As kind of a side effect nbars being 0 (which init_rebar() doesn't explicitly reject) no longer results in a bogus call to vpci_remove_registers(). Fixes: ee459aeac096 ("vpci/rebar: Implement cleanup function for Rebar") Signed-off-by: Jan Beulich --- v5: New. --- a/xen/drivers/vpci/rebar.c +++ b/xen/drivers/vpci/rebar.c @@ -53,17 +53,12 @@ static void cf_check rebar_ctrl_write(co static int cf_check cleanup_rebar(const struct pci_dev *pdev, bool hide) { int rc; - uint32_t ctrl; - unsigned int nbars; - unsigned int rebar_offset = pci_find_ext_capability(pdev, - PCI_EXT_CAP_ID_REBAR); + unsigned int nbars = pdev->vpci->rebar.nbars; + unsigned int rebar_offset = pdev->vpci->rebar.offset; - if ( !hide ) + if ( !rebar_offset || !nbars || !hide ) return 0; - ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0)); - nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK); - rc = vpci_remove_registers(pdev->vpci, rebar_offset + PCI_REBAR_CAP(0), PCI_REBAR_CTRL(nbars - 1)); if ( rc ) @@ -121,6 +116,10 @@ static int cf_check init_rebar(struct pc ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0)); nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK); + + pdev->vpci->rebar.offset = rebar_offset; + pdev->vpci->rebar.nbars = nbars; + for ( unsigned int i = 0; i < nbars; i++ ) { int rc; --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -135,6 +135,13 @@ struct vpci { struct vpci_arch_msix_entry arch; } entries[]; } *msix; + + /* Resizable BARs data */ + struct vpci_rebar { + unsigned int offset:12; + unsigned int nbars:3; + } rebar; + #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT /* Guest SBDF of the device. */ #define INVALID_GUEST_SBDF ((pci_sbdf_t){ .sbdf = ~0U }) From xen-devel-bounces@lists.xenproject.org Wed Feb 25 11:44:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 11:44:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240639.1541964 (Exim 4.92) (envelope-from ) id 1vvDJw-00042d-T0; Wed, 25 Feb 2026 11:44:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240639.1541964; Wed, 25 Feb 2026 11:44:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJw-00042W-Oz; Wed, 25 Feb 2026 11:44:48 +0000 Received: by outflank-mailman (input) for mailman id 1240639; Wed, 25 Feb 2026 11:44:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDJv-0002tl-PO for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 11:44:47 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6260a9a1-123f-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 12:44:46 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-4398f8403edso485490f8f.1 for ; Wed, 25 Feb 2026 03:44:46 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 03:44:46 -0800 (PST) Message-ID: <9f1fcbfc-e7b6-4ef3-8f58-c88f9667d606@suse.com> Date: Wed, 25 Feb 2026 12:44:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 5/5] vPCI: re-init extended-capabilities when MMCFG availability changed From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand References: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6202d2d4-ad80-4e37-b1f6-cd9d19add72f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit When Dom0 informs us about MMCFG usability, this may change whether extended capabilities are available (accessible) for devices. Zap what might be on record, and re-initialize things. No synchronization is added for the case where devices may already be in use. That'll need sorting when (a) DomU support was added and (b) DomU-s may run already while Dom0 / hwdom still boots (dom0less, Hyperlaunch). vpci_cleanup_capabilities() also shouldn't have used pci_find_ext_capability(), as already when the function was introduced extended config space may not have been (properly) accessible anymore, no matter whether it was during init. Extended capability cleanup hooks need to cope with being called when the respective capability doesn't exist (and hence the corresponding ->init() hook was never called). Fixes: 70e6dace747e ("vpci: Use cleanup to free capability resource during deassign") Signed-off-by: Jan Beulich --- vpci_reinit_ext_capabilities()'es return value is checked only to log an error; it doesn't feel quite right to fail the hypercall because of this. Roger brought up the idea of de-assigning the device in such a case, but if a driver doesn't use extended capabilities the device would likely continue to work fine, for Dom0 this probably wouldn't be quite right anyway, and it's also unclear whether calling deassign_device() could be done from this context. Something like what pci_check_disable_device() does may be an option, if we really think we need to "break" the device. The use of is_hardware_domain() in vpci_cleanup_capabilities() was uncommented and hence is left so. Shouldn't there be a DomU-related TODO or FIXME? --- v5: Don't use pci_find_ext_capability() in vpci_cleanup_capabilities(). Add assertion in vpci_reinit_ext_capabilities(). v4: Make sure ->cleanup() and ->init() are invoked. v3: New. --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -8,6 +8,8 @@ #include #include #include +#include + #include #include #include @@ -169,8 +171,17 @@ int cf_check physdev_check_pci_extcfg(st ASSERT(pdev->seg == info->segment); if ( pdev->bus >= info->start_bus && pdev->bus <= info->end_bus ) + { + int rc; + pci_check_extcfg(pdev); + rc = vpci_reinit_ext_capabilities(pdev); + if ( rc ) + gprintk(XENLOG_ERR, "%pp(%pd): vPCI extcap reinit failed: %d\n", + &pdev->sbdf, pdev->domain, rc); + } + return 0; } #endif /* COMPAT */ --- a/xen/drivers/vpci/cap.c +++ b/xen/drivers/vpci/cap.c @@ -285,13 +285,16 @@ static int vpci_init_ext_capability_list return 0; } -int vpci_init_capabilities(struct pci_dev *pdev) +int vpci_init_capabilities(struct pci_dev *pdev, bool ext_only) { int rc; - rc = vpci_init_capability_list(pdev); - if ( rc ) - return rc; + if ( !ext_only ) + { + rc = vpci_init_capability_list(pdev); + if ( rc ) + return rc; + } rc = vpci_init_ext_capability_list(pdev); if ( rc ) @@ -305,7 +308,7 @@ int vpci_init_capabilities(struct pci_de unsigned int pos = 0; if ( !is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); + pos = !ext_only ? pci_find_cap_offset(pdev->sbdf, cap) : 0; else if ( is_hardware_domain(pdev->domain) ) pos = pci_find_ext_capability(pdev, cap); @@ -349,22 +352,23 @@ int vpci_init_capabilities(struct pci_de return 0; } -void vpci_cleanup_capabilities(struct pci_dev *pdev) +void vpci_cleanup_capabilities(struct pci_dev *pdev, bool ext_only) { for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) { const vpci_capability_t *capability = &__start_vpci_array[i]; const unsigned int cap = capability->id; - unsigned int pos = 0; if ( !capability->cleanup ) continue; - if ( !capability->is_ext ) - pos = pci_find_cap_offset(pdev->sbdf, cap); - else if ( is_hardware_domain(pdev->domain) ) - pos = pci_find_ext_capability(pdev, cap); - if ( pos ) + /* + * Cannot call pci_find_ext_capability() here, as extended config + * space may (no longer) be accessible. + */ + if ( capability->is_ext + ? is_hardware_domain(pdev->domain) + : !ext_only && pci_find_cap_offset(pdev->sbdf, cap) ) { int rc = capability->cleanup(pdev, false); @@ -376,6 +380,28 @@ void vpci_cleanup_capabilities(struct pc } } +int vpci_reinit_ext_capabilities(struct pci_dev *pdev) +{ + if ( !pdev->vpci ) + return 0; + + /* + * FIXME: DomU support is missing. For already running domains we may + * need to pause them around the entire re-evaluation of extended config + * space accessibility. + */ + if ( pdev->domain ) + ASSERT(pdev->domain == hardware_domain || pdev->domain == dom_io); + + vpci_cleanup_capabilities(pdev, true); + + if ( vpci_remove_registers(pdev->vpci, PCI_CFG_SPACE_SIZE, + PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) ) + ASSERT_UNREACHABLE(); + + return vpci_init_capabilities(pdev, true); +} + /* * Local variables: * mode: C --- a/xen/drivers/vpci/private.h +++ b/xen/drivers/vpci/private.h @@ -46,8 +46,8 @@ typedef struct { int __must_check vpci_init_header(struct pci_dev *pdev); -int vpci_init_capabilities(struct pci_dev *pdev); -void vpci_cleanup_capabilities(struct pci_dev *pdev); +int vpci_init_capabilities(struct pci_dev *pdev, bool ext_only); +void vpci_cleanup_capabilities(struct pci_dev *pdev, bool ext_only); /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -102,7 +102,7 @@ void vpci_deassign_device(struct pci_dev &pdev->domain->vpci_dev_assigned_map); #endif - vpci_cleanup_capabilities(pdev); + vpci_cleanup_capabilities(pdev, false); spin_lock(&pdev->vpci->lock); while ( !list_empty(&pdev->vpci->handlers) ) @@ -159,7 +159,7 @@ int vpci_assign_device(struct pci_dev *p if ( rc ) goto out; - rc = vpci_init_capabilities(pdev); + rc = vpci_init_capabilities(pdev, false); out: if ( rc ) --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -25,6 +25,8 @@ int __must_check vpci_assign_device(stru /* Remove all handlers and free vpci related structures. */ void vpci_deassign_device(struct pci_dev *pdev); +int vpci_reinit_ext_capabilities(struct pci_dev *pdev); + /* Generic read/write handlers for the PCI config space. */ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size); void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, @@ -202,6 +204,11 @@ bool vpci_ecam_read(pci_sbdf_t sbdf, uns #else /* !CONFIG_HAS_VPCI */ struct vpci_vcpu {}; +static inline int vpci_reinit_ext_capabilities(struct pci_dev *pdev) +{ + return 0; +} + static inline int vpci_assign_device(struct pci_dev *pdev) { return 0; From xen-devel-bounces@lists.xenproject.org Wed Feb 25 12:15:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 12:15:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240676.1541975 (Exim 4.92) (envelope-from ) id 1vvDn9-0000C9-AM; Wed, 25 Feb 2026 12:14:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240676.1541975; Wed, 25 Feb 2026 12:14:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDn9-0000C2-6U; Wed, 25 Feb 2026 12:14:59 +0000 Received: by outflank-mailman (input) for mailman id 1240676; Wed, 25 Feb 2026 12:14:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvDn7-0000Bw-UU for xen-devel@lists.xenproject.org; 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Ok.  Making things simpler for compliance sounds like a good thing.  What would this entail? Presumably we've got to adapt to all changes in this newer revision of MISRA C. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 25 12:35:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 12:35:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240702.1541984 (Exim 4.92) (envelope-from ) id 1vvE6p-00038U-SG; Wed, 25 Feb 2026 12:35:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240702.1541984; Wed, 25 Feb 2026 12:35:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvE6p-00038N-Ob; Wed, 25 Feb 2026 12:35:19 +0000 Received: by outflank-mailman (input) for mailman id 1240702; Wed, 25 Feb 2026 12:35:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvE6o-00038H-Sr for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 12:35:18 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 67f385fe-1246-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 13:35:03 +0100 (CET) Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 072494EE781C; Wed, 25 Feb 2026 13:35:02 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 67f385fe-1246-11f1-9ccf-f158ae23cfc8 Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1772022902; b=z78SpsQta1Q96z6M+sWz48bqMi6Zik8KG8fXOUE1uE7L5c0YBlwdlyb+B2epNwPY4EZn R7vak7FVR1YUYo8W/3yloDkR8CZQNWxS0XDgQP2KCjZbui1v7Gbja7nAgUAehsq89S//F 0QiQsjLTRSMEUX+WsH1x3CGRVVs6bFkjFOZbCQSfUh20kGzVTY0mn3jHRCnxJkq30uEXM VO/auXcE4YckwosD22vDRUBuQrqepzwFmWzVoebNytjrDKRJkAklA1Jqxfp34MIQJ+dvw 3/jGRD9BcnqalQ2O2RxyXHnLwXDu4iBw9QQelGNXiHByYr5WU7LSi2h3HK6ylh1ABIjFJ +qWy/aLRJY2B/VNq2Ue9mg6fN6dJo5ax75AZb1niNpPSFzC3P0IFbZJqM/QZavoCxj5cv VWJpBB27WICgXCs5mKkc/wDRZaVC30YaYeCaFPTxBCJvrC+xe0ZrfEnYUINe7KriR+hQa ZiC7CVBOghX3YEbHpWFYxCOAxcxMVV3JOeTWermAWGGHFcZ00UYJeHNwKVESNUu5wy7FI i7AIKhRsFmPTpVqEBG5r4S2dmDnnVYDZ/PBwcocMQEbOJNuhR/sTed9GRRiDy77T7qIBv j24fTY72RBF0bYwZUn9iKB0bNUtdtW+iQYC1hGWp/uinTPQbdDu4FTuJKua7gAM= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1772022902; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=znqnJrtIOyr/QtKkKeAfBwT9ebqzScXUuCOsjJDtjg4=; b=IQJ/B/1KjusLYznG8b8HBfIf38+8fGNX/B7nPL/FSJzcTWKYy7QNuuyh3y93ixzVncz/ E0iDD768t9zFj1Ica4/dFKzmjs1ENh0sIB1w6mRKmcblFfzN3S9MEcgqP8KYVb8Eiq7HE 1UMI/oO6l4+hKQEhhxDhRITuGKPiMmNix3dPR30X6IoMd8QOtsOiWj+QqIxVQO4fPKr/8 I9NK7g0+9indW3ADpVEqsS/FnOmZmHXh7VszrlQRFjk0xLnquVQxui3f4LELI+JjqiGvM Onl/BQpWJr2yQki4txR1CoIFpx8WWnfOO7trfX1+XpK9L8BLyuHtz7ZPboP3YmcQRmWvM Edij146cxiC8KFOyRpiK83WHMcCiVN+b9OeKAt2etEHISdaO1KYNOw9zpBFfsXRocSTO2 /FkpxbcRkJwq/Gb4lBmgcVOhiN7ZtNWRV8jXNvfuvPaQcl8FBEmWcmeJF2aXUJwVlAJiN LM2W9S5aw8Mz5h0QXJYIMVv+grtZgIcaGiVz3Qsx0MUb8eQhl7bpsSp2mJp7eIOcvp1Ow W9Kv2AMOW9XhzuaCK8vqbr2wj2sVkSXsZY8JmNideqFsFv44iYvZP9VC5tmJKIhb2c5TQ OJ7PB6ZAXDBTjPIcN0pvUaSjEcuCBHuQieKrc2ginxBxpLuEDDT4HA9wKzmwvXw= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 25 Feb 2026 13:35:01 +0100 From: Nicola Vetrini To: Andrew Cooper Cc: Roberto Bagnara , Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" Subject: Re: [PATCH 09/12] x86/shadow: Rework write_atomic() call in shadow_write_entries() In-Reply-To: <278f711d-7c61-4a47-868e-ab05b9426e40@citrix.com> References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-10-andrew.cooper3@citrix.com> <0148ea9f-6486-44a1-b4dd-47af7c978351@bugseng.com> <278f711d-7c61-4a47-868e-ab05b9426e40@citrix.com> Message-ID: <678f1a67603d4b37d717dc84565db044@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-25 13:14, Andrew Cooper wrote: > On 23/02/2026 7:26 am, Roberto Bagnara wrote: >> On 20/02/26 22:46, Andrew Cooper wrote: >>> Eclair complains of a side effect in a sizeof() expression (R13.6). >> >> I disagree with comments of the form "Eclair complains" > > We use the same phrasing with other tools too, but I can change it to > "reports" which I suppose is a more neutral term. > >> >> Note that in recent versions of MISRA C that rule is no longer >> mandatory.  More generally, note also that, IMHO, switching to >> a more modern version of MISRA C would simplify compliance. > > Ok.  Making things simpler for compliance sounds like a good thing.  > What would this entail? > > Presumably we've got to adapt to all changes in this newer revision of > MISRA C. > > ~Andrew Most likely new violations on new non-clean guidelines, generally rules for features that were standardized in C11/C18 and were previously widely available extensions (e.g. _Noreturn, _Alignof, threads, ...), alongside some minor changes in existing ones, such as the classification change mentioned by Roberto. The exact impact depends on the target MISRA revision, however. Making an experiment should be only a matter of s/MC3A2/MC4/ (or whichever MISRA revision is chosen: MC4 in ECLAIR refers to the latest published MISRA revision, that is, MISRA C:2025. Perhaps also a few regressions (as in newly introduced violations) on clean ones, but I do not expect the results to be radically different. Side note here: are the efforts to make Xen compile with -stc=c11/gnu11 still ongoing? I say this because any MISRA revision other than the one currently used by Xen by default is based on C11, as it introduces guidelines for C11/C18 features. Not that this would matter a whole lot for Xen, but it is something to consider in the broader picture. -- Nicola Vetrini, B.Sc. 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The exact impact depends > on the target MISRA revision, however. Making an experiment should be > only a matter of s/MC3A2/MC4/ (or whichever MISRA revision is chosen: > MC4 in ECLAIR refers to the latest published MISRA revision, that is, > MISRA C:2025. Perhaps also a few regressions (as in newly introduced > violations) on clean ones, but I do not expect the results to be > radically different. > > Side note here: are the efforts to make Xen compile with > -stc=c11/gnu11 still ongoing? I say this because any MISRA revision > other than the one currently used by Xen by default is based on C11, > as it introduces guidelines for C11/C18 features. Not that this would > matter a whole lot for Xen, but it is something to consider in the > broader picture. > Funny you should ask.  I had a paragraph about it in my reply but dropped it, thinking it was getting off track. https://gitlab.com/xen-project/xen/-/issues/201 I've just updated it to note that we did start using auto, by way of the __auto_type language extension. >From the Xen side, switching to gnu11 is a one-line change.  However "ongoing" is really just me in my copious free time, and I'm not able to do the ECLAIR/MISRA config side of the work. It sounds to me like we want a dedicated work item switch to gnu11 and some newer MISRA revision, but I will have to defer to you on how large a task this is. I suppose we should start with an experiment to see what shows up in the *-amd target builds, and go from there? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 25 12:59:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 12:59:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240732.1542015 (Exim 4.92) (envelope-from ) id 1vvEUa-0006bn-2v; Wed, 25 Feb 2026 12:59:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240732.1542015; Wed, 25 Feb 2026 12:59:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvEUa-0006bg-0O; Wed, 25 Feb 2026 12:59:52 +0000 Received: by outflank-mailman (input) for mailman id 1240732; Wed, 25 Feb 2026 12:59:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvEUY-0006bY-9i for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 12:59:50 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id db087ef3-1249-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 13:59:44 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-482f454be5bso8272965e9.0 for ; Wed, 25 Feb 2026 04:59:44 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd732eb1sm69925795e9.12.2026.02.25.04.59.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Feb 2026 04:59:42 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: db087ef3-1249-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772024383; x=1772629183; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=wILc9CGEf1WIqbCiw3qNVsNe1/HTYv9pl3xfzMp11zI=; b=InEI5je8+7v+78AqYekmmp7ZYvejFrqlqQ0Aai4jVVCpC/vZjhZg7m+msJTCOskJX9 DtwEyJT6fUa63+Eq9Jcb4MS9Ru1YUQR56+bwhyD/kkBDVs0IiYfqpg48s9anzU7ee00G hcgiFIdUUQ79ogh9Tfjag5qlIWtoGZApfTOBk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772024383; x=1772629183; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=wILc9CGEf1WIqbCiw3qNVsNe1/HTYv9pl3xfzMp11zI=; b=EEaf6YHFkPbsW113BydjExD6TDcxCDZTWJ9uNJtVjbm6z0d6QAPizW9Rc7+uIpU3G1 NbzM/tHCapjtOahLLgAF4qingMfn7GK6TD0+BFDXs1mTcO2s5Di9grJb5qSvEzsteloM MaLGFCl6DP4dxUCK6h/QAwTQ9u4Qi74f6jmNcWf/M2qi2bW7EcsyJ26hHeFBRMURqiRi qnaIjq0wcKOLJ1OR+SPvZ46n+zTe6gH7CU90p5toa414Ff662i6JcsDBZ16uiUqy7CCJ M3x4k2AOQwdZY9H1DBo2AeEE+ox98Cn7bpIgK52jLsa6GpuGQyV4ePW4hR3h3/05cP/S zqUw== X-Gm-Message-State: AOJu0Yxf1ap7o0kryIsqEA4gjKaKgBupyfvdoB9pIbdiWIN2FBVZ2y0A xXPMYN4lX3hlqA0l418F+R7YL0eYZVjFm7PwWxpu9aHiWzjg+Pxw1zkleBLibAwLN2/i7iYFIID R9L2s X-Gm-Gg: ATEYQzwL+hz1KiaDfeAK5reuutl1A/99aosr3ktjGYBj88Ldm754/g4PFvivt4mcvV2 v4RzvLgTcZQSHMv/4vTY/AVHSv6nYF9YBpea3DXpvOjgpFGlqGMpG9Kk7Dl3JwnGtNx3CayDwyC n6TqJO8zgmcI3z3Rzsld1vpX7XXs160t0x9YdmFRoOitsvHJv4Rp+S7jOI2BoZkl9TlmXJ4IiWo HKvW+8iVK/79wqEpH1jpMDTnZlJvstRJNDHFcgyz3RzWxAcKltk/dJmFFjE6SoutjsnE8Iw/1yD gDxQlmbsmIzYWLP/HHejb09qlr+2bSeRM3uBUzyGGfhntBVwZGAOJI7KFGc28H0t7XEiF0NjC/i TLudRfhgM/bXfdnOhkigU4lSWnIzxd2AfpyH1AZef3k08llGWD0OHiFXQCoOlXAMieGTg8iMPhu gCgeTZnQeTtZ74tkqnCRIcHV3oJunsdgMyu8jy94CJMJ+YxMTehVnRly8ZOklSRNCa+JHr1pA= X-Received: by 2002:a05:600c:21d4:b0:483:7eeb:4558 with SMTP id 5b1f17b1804b1-483bd713d0bmr45333455e9.2.1772024382569; Wed, 25 Feb 2026 04:59:42 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH] xen/mm: Remove claim that INVALID_{MFN,GFN}_INITIALIZER is for older toolchains Date: Wed, 25 Feb 2026 12:59:40 +0000 Message-Id: <20260225125940.3804137-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This was never because of a bug in GCC. C requires that static objects are initialised with constant expressions; _mfn(), as a static inline, is not and cannot be made to be. Correct the comments. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini Slightly RFC. I left 'global variable' alone in the comment, because C's "object with static storage durations" also isn't ideal; there's one user which is non-static in terms of visibility. I'm open to adjusting if we can figure out some better wording. In C++, we'd just make _mfn() be constexpr. It turns out that C23 added this keyword but restricted it to objects and therefore useless. https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3018.htm literally admits that constexpr on objects exists only to force some diagnostics which were previously optional. --- xen/include/xen/mm-frame.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/xen/include/xen/mm-frame.h b/xen/include/xen/mm-frame.h index d973aec901fa..80885415a78a 100644 --- a/xen/include/xen/mm-frame.h +++ b/xen/include/xen/mm-frame.h @@ -9,8 +9,7 @@ TYPE_SAFE(unsigned long, mfn); #define INVALID_MFN_RAW (~0UL) #define INVALID_MFN _mfn(INVALID_MFN_RAW) /* - * To be used for global variable initialization. This workaround a bug - * in GCC < 5.0. + * To be used for global variable initialization. */ #define INVALID_MFN_INITIALIZER { INVALID_MFN_RAW } @@ -45,8 +44,7 @@ TYPE_SAFE(unsigned long, gfn); #define INVALID_GFN_RAW (~0UL) #define INVALID_GFN _gfn(INVALID_GFN_RAW) /* - * To be used for global variable initialization. This workaround a bug - * in GCC < 5.0 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64856 + * To be used for global variable initialization. */ #define INVALID_GFN_INITIALIZER { INVALID_GFN_RAW } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 13:09:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 13:09:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240745.1542026 (Exim 4.92) (envelope-from ) id 1vvEe7-0008K2-0a; Wed, 25 Feb 2026 13:09:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240745.1542026; Wed, 25 Feb 2026 13:09:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvEe6-0008Jv-UE; Wed, 25 Feb 2026 13:09:42 +0000 Received: by outflank-mailman (input) for mailman id 1240745; Wed, 25 Feb 2026 13:09:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvEe6-0008Jp-Ct for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 13:09:42 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3e2c0186-124b-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 14:09:40 +0100 (CET) Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 475754EE7811; Wed, 25 Feb 2026 14:09:39 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3e2c0186-124b-11f1-9ccf-f158ae23cfc8 Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1772024979; b=toAJGV4kmjabV7WLfmxtdNs9k1d2Lwhmo4tUgvobbMMOZfwtOO5P2UNNaMAfF44/FNct U3/JJgPZC4gMYptoZdK9ZQawNfxG5DPNFCdxTA9Wq7dwyrR19c78QMitPgkI3+IqbHOzG YyMVGkRskik+IBpkSgG3Cd4GzbCRQ+on1mUFbLsQ3S9JOzWErddIBk+8X3Snuc/T6EvT+ rlZEIS8R6W3LhIJk1917svuRvyWoPsNCvFPdjwnFevoHHIeDSIuvpD4adD+qLYjoICXEf NFj3bKL7i/OSoqpCD1rouyPELXbMi6AEYDFp+kJDcd4tibmR4NFhe7wx4ugPiCAHBFAjL z6jeeZp2adfyNc74ahlG6l5sJfc1U/o5pQOP8dhck5GhtiTQquONi0mgZS1naBqs1jtJf 2VQ3zMuWdTcK43ZZRRWUYYX2h1jcI47In3bm5lFlTsHBB42hEBUJcfRdi//Q91fr3x0Ll nqb7wSx2RWyGLk+R3pHQOcdlNl/3uGvKP5ksBAY02qnMjAHMoaS02pUynq/3MFAZsV3kV Fp1kc/mo1s3ivRivVkYo096hZ5CnwzXuF+WM+hN48Q1N07uKtCzKG8X8uPa9N6FONwvzK F2T3qHhxsmNdmQTIlDVirrhy3KXBQGcH4Mjh3r0mpeAadPttkS6fW5g0CO0jWEI= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1772024979; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=Zt7RKiHU+N4gsCRwFu2kQi2hB4godiYmnjsKiBEsFl8=; b=Cw5cySwW/J4cxMbF2ByAiITItHvzIC5x6Fr5tkCSRz2SxieE9B6LmY7qpxtFXXeOtwSz o5OnJ9makcuMI4/GazM/lVG/gCfSfZtj3qGtmysmBSnOfFFtVyLO5ARMSyEDZ9nWH6407 ebG1+WttuMGh5Tm1khDgB5rzK11DZtB+EzkVA90FwOYjfzrt7GFAwcJHQeoY7ZTAoLglk CPxStZozoMkIu1RHoyfpmDn7fatOl/sQBSAcgWwzqEWsWDgTmViABfg1JMsgKBGGqcSLt 6c2zF7+WtkeKLeVHk96LLK8DL6glEAjOGPFxxFiu0REbvl/disiUPzy0EoCoo46OlpOP6 rDsITq3+yQMc44PHGdWFN2nFhbsEm69fBBPgffUYY5IraSh6wfW8Ek07sBrC/1y3VCVPQ 9hrHObiNLonu2LGc8k9RIwzhNXJVo6JZqcKMGjqiqmA+LngeuGz3uH1eXwlhkhX/yqISy Djya90a/4GXAc+/sbLLStKlNwmia7YXS7fd9/Ta4Bp45NIXPeb7gOSd61bsKCRGua4C6c ksQuulqRAMQeos+Sxnd5MQGJakFq2DSbSIpwOubSPqGeT6clHzGTvQ2kca/yzN4XApxWg BtB7zzPMOa3NCSribuHdjrywk66k98LqYkbPGexmeZukoccEVxsp4usFTDUlFpY= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 25 Feb 2026 14:09:39 +0100 From: Nicola Vetrini To: Andrew Cooper Cc: Roberto Bagnara , Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" Subject: Re: [PATCH 09/12] x86/shadow: Rework write_atomic() call in shadow_write_entries() In-Reply-To: References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-10-andrew.cooper3@citrix.com> <0148ea9f-6486-44a1-b4dd-47af7c978351@bugseng.com> <278f711d-7c61-4a47-868e-ab05b9426e40@citrix.com> <678f1a67603d4b37d717dc84565db044@bugseng.com> Message-ID: <225c04a554ededd04fd6edacf34fd2c6@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-25 13:53, Andrew Cooper wrote: > On 25/02/2026 12:35 pm, Nicola Vetrini wrote: >> On 2026-02-25 13:14, Andrew Cooper wrote: >>> On 23/02/2026 7:26 am, Roberto Bagnara wrote:  >>>> >>>> Note that in recent versions of MISRA C that rule is no longer >>>> mandatory.  More generally, note also that, IMHO, switching to >>>> a more modern version of MISRA C would simplify compliance. >>> >>> Ok.  Making things simpler for compliance sounds like a good thing.  >>> What would this entail? >>> >>> Presumably we've got to adapt to all changes in this newer revision >>> of >>> MISRA C. >>> >>> ~Andrew >> >> Most likely new violations on new non-clean guidelines, generally >> rules for features that were standardized in C11/C18 and were >> previously widely available extensions (e.g. _Noreturn, _Alignof, >> threads, ...),  > > We use noreturn a lot, and alignof() a little.  No threading at all > (well - not as C understands it). > >> alongside some minor changes in existing ones, such as the >> classification change mentioned by Roberto. The exact impact depends >> on the target MISRA revision, however. Making an experiment should be >> only a matter of s/MC3A2/MC4/ (or whichever MISRA revision is chosen: >> MC4 in ECLAIR refers to the latest published MISRA revision, that is, >> MISRA C:2025. Perhaps also a few regressions (as in newly introduced >> violations) on clean ones, but I do not expect the results to be >> radically different. >> >> Side note here: are the efforts to make Xen compile with >> -stc=c11/gnu11 still ongoing? I say this because any MISRA revision >> other than the one currently used by Xen by default is based on C11, >> as it introduces guidelines for C11/C18 features. Not that this would >> matter a whole lot for Xen, but it is something to consider in the >> broader picture. >> > > Funny you should ask.  I had a paragraph about it in my reply but > dropped it, thinking it was getting off track. > > https://gitlab.com/xen-project/xen/-/issues/201 > > I've just updated it to note that we did start using auto, by way of > the > __auto_type language extension. > > From the Xen side, switching to gnu11 is a one-line change.  However > "ongoing" is really just me in my copious free time, and I'm not able > to > do the ECLAIR/MISRA config side of the work. > > It sounds to me like we want a dedicated work item switch to gnu11 and > some newer MISRA revision, but I will have to defer to you on how large > a task this is. > > I suppose we should start with an experiment to see what shows up in > the > *-amd target builds, and go from there? > Yes, that's sensible. I just wasn't sure if there were other gotchas in Xen still to be addressed before using gnu11 > ~Andrew -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed Feb 25 14:15:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 14:15:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240787.1542056 (Exim 4.92) (envelope-from ) id 1vvFfd-0008L2-Tf; Wed, 25 Feb 2026 14:15:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240787.1542056; Wed, 25 Feb 2026 14:15:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvFfd-0008Kv-Pz; Wed, 25 Feb 2026 14:15:21 +0000 Received: by outflank-mailman (input) for mailman id 1240787; Wed, 25 Feb 2026 14:15:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvFfc-0008Kp-OQ for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 14:15:20 +0000 Received: from mail186-12.suw21.mandrillapp.com (mail186-12.suw21.mandrillapp.com [198.2.186.12]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 672a1816-1254-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 15:15:15 +0100 (CET) Received: from pmta10.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail186-12.suw21.mandrillapp.com (Mailchimp) with ESMTP id 4fLc754YW4z705b0c for ; Wed, 25 Feb 2026 14:15:13 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id bb8b06444c3d4478bbb10018a210ef0e; Wed, 25 Feb 2026 14:15:13 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 672a1816-1254-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1772028913; x=1772298913; bh=JGWN5jkvYY71URPpUEe8IqNYzfuwlhJJo5SoK8DxtuE=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=mrQYZ+wLz3+s8KQfcz1wlvRqwPY2981AKwC5KfmyCxtxLLBEWuSKhx9f08TbbkDq1 NfCSFzyiuwObIT3eL2UWvi8przDLX3Mx5rWiy8Vm9IvxmVXwW9AXdeQVbITL7HxC3+ y2kFoO7OS9kGPJ0iaTgNigdjwvvMyUOcReCLts+Gkfo1yls+lGxrCDjYlnvL/YUTai QWx1fu5KWOeqW7PueZgH+AYVj4WAQUMhQgH3JO8tI8qYLRtgr+iiLoCcAOxhiiyUSZ cSNF5PZdvcOrDYyKbsS8Em3H3k1bAJrHEDVbT0v5ObehW43sBC2AuSHEAvI2Mv2Bm1 8tJXBz6pyh92g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1772028913; x=1772289413; i=anthony.perard@vates.tech; bh=JGWN5jkvYY71URPpUEe8IqNYzfuwlhJJo5SoK8DxtuE=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=AcQKiMCxQUIAeBH7dfLDpDZq/kNVQUxxH+imVfuCGpYYGYnOA0XEj6Y/0gE8frYsC JraFLRnt5w8o+slNa6aqblHfTyK8m4DQWFTemrAnLSgTPLPojmiw/ZKzgrynbRo2De 5mys8E34LNI8ee3Lrj0FWf0pyfJqKg/DE2j4Df4T96XUmstTOBCGkbdIpCfEb8fjhG Esbnxy0zrFDpZUO7CmLWwdf5xlWKU695JzuDxkwjoKbFBgT6JemD2PsCVhcTZ1N9FK HZerd7EA+dDIetd8cS52ITLEWdbIVF0AJfJnOhkp4sPytYG/oh0AqWmAYJApDUxZH8 whUbyP6XOadAw== From: "Anthony PERARD" Subject: =?utf-8?Q?Re:=20[PATCH=205/5]=20accel/xen:=20Build=20without=20target-specific=20knowledge?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1772028911983 To: "=?utf-8?Q?Philippe=20Mathieu-Daud=C3=A9?=" Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, "Pierrick Bouvier" , "Paolo Bonzini" , xen-devel@lists.xenproject.org, "Stefano Stabellini" , "Anthony PERARD" , "Paul Durrant" , "Edgar E. Iglesias" Message-Id: References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-6-philmd@linaro.org> In-Reply-To: <20260225051303.91614-6-philmd@linaro.org> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.bb8b06444c3d4478bbb10018a210ef0e?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260225:md Date: Wed, 25 Feb 2026 14:15:13 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, Feb 25, 2026 at 06:13:03AM +0100, Philippe Mathieu-Daud=C3=A9 wrote= : > Code in accel/ aims to be target-agnostic. Enforce that > by moving the MSHV file units to system_ss[], which is You mean Xen ^ here ? > target-agnostic. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 In anycase, it seems to works fine for me: Acked-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Feb 25 14:34:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 14:34:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240808.1542066 (Exim 4.92) (envelope-from ) id 1vvFyJ-0002gc-Ck; Wed, 25 Feb 2026 14:34:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240808.1542066; Wed, 25 Feb 2026 14:34:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvFyJ-0002gV-9F; Wed, 25 Feb 2026 14:34:39 +0000 Received: by outflank-mailman (input) for mailman id 1240808; Wed, 25 Feb 2026 14:34:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvFyH-0002gP-TW for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 14:34:37 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1b929ed7-1257-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 15:34:37 +0100 (CET) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4836f4cbe0bso53050775e9.3 for ; Wed, 25 Feb 2026 06:34:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 06:34:35 -0800 (PST) Message-ID: <46a711cb-1853-44f6-a9a5-4d6252a8a995@suse.com> Date: Wed, 25 Feb 2026 15:34:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/mm: Remove claim that INVALID_{MFN,GFN}_INITIALIZER is for older toolchains To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Xen-devel References: <20260225125940.3804137-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260225125940.3804137-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 25.02.2026 13:59, Andrew Cooper wrote: > This was never because of a bug in GCC. > > C requires that static objects are initialised with constant expressions; > _mfn(), as a static inline, is not and cannot be made to be. Of course, and I think the comments were meant differently. What wasn't possible to use (with -std=gnu99) due to the referenced bug is apparently #define INVALID_GFN ((gfn_t){ ~0UL }) Now that gcc5 is our baseline, do we perhaps want to use that and do away with INVALID_GFN_INITIALIZER? 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charset=utf-8 Content-Transfer-Encoding: quoted-printable On Fri, Feb 20, 2026 at 01:12:00PM +0100, Marek Marczykowski-G=C3=B3recki w= rote: > Archlinux just updated glibc to 2.43+r5+g856c426a7534-1 and that > causes libxl build failure: > > libxl_cpuid.c: In function =E2=80=98libxl_cpuid_parse_config_xend=E2= =80=99: > libxl_cpuid.c:447:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 447 | endptr =3D strchr(str, '=3D'); > | ^ > libxl_cpuid.c:452:16: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 452 | endptr =3D strchr(str, ','); > | ^ > libxl_cpuid.c:454:20: error: assignment discards =E2=80=98const=E2=80= =99 qualifier from pointer target type [-Werror=3Ddiscarded-qualifiers] > 454 | endptr =3D strchr(str, 0); > | ^ > cc1: all warnings being treated as errors > > Add missing consts. Note in libxl_cpuid_parse_config_xend() non-const > endptr still is needed, to be compatible with the second argument to > strtoul(). Add second variable for this reason. > > And while at it, move semicolon to its own line > > Signed-off-by: Marek Marczykowski-G=C3=B3recki Acked-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Feb 25 15:27:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 15:27:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240841.1542093 (Exim 4.92) (envelope-from ) id 1vvGnD-00016L-23; Wed, 25 Feb 2026 15:27:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240841.1542093; Wed, 25 Feb 2026 15:27:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvGnC-00016E-VV; Wed, 25 Feb 2026 15:27:14 +0000 Received: by outflank-mailman (input) for mailman id 1240841; Wed, 25 Feb 2026 15:27:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvGnB-000168-81 for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 15:27:13 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7415d1e0-125e-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 16:27:11 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-48378136adcso41116055e9.1 for ; Wed, 25 Feb 2026 07:27:11 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 07:27:10 -0800 (PST) Message-ID: Date: Wed, 25 Feb 2026 16:27:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/hvm: Advertise and support extended destination IDs for MSI/IO-APIC To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20260223084644.471531-1-julian.vetter@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260223084644.471531-1-julian.vetter@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 09:46, Julian Vetter wrote: > x2APIC guests with more than 128 vCPUs have APIC IDs above 255, but MSI > addresses and IO-APIC RTEs only provide an 8-bit destination field. > Without extended destination ID support, Linux limits the maximum usable > APIC ID to 255, refusing to bring up vCPUs beyond that limit. So, > advertise XEN_HVM_CPUID_EXT_DEST_ID in the HVM hypervisor CPUID leaf, > signalling that guests may use MSI address bits 11:5 and IO-APIC RTE > bits 55:49 as additional high destination ID bits. This expands the > destination ID from 8 to 15 bits. Should MSI and IO-APIC really be covered by just a single bit? > --- a/xen/arch/x86/hvm/irq.c > +++ b/xen/arch/x86/hvm/irq.c > @@ -374,7 +374,16 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) > int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) > { > uint32_t tmp = (uint32_t) addr; > - uint8_t dest = (tmp & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; > + /* > + * Standard MSI destination address bits 19:12 (8 bits). > + * Extended MSI destination address bits 11:5 (7 more bits). > + * > + * As XEN_HVM_CPUID_EXT_DEST_ID is advertised, the guest may use bits 11:5 > + * for high destination ID bits, expanding to 15 bits total. Guests unaware > + * of this feature set these bits to 0, so this is backwards-compatible. Is it? Any of the bits being non-zero would presently be ignored, afaics. I think this needs to be two-way negotiation: Xen advertises the capability, and the guest has to actively opt in. (Didn't Roger say something along these lines already?) Also don't you need to restrict use of the wider IDs to vCPU-s actually running in x2APIC mode? (And what is going to happen if a vCPU switches back to legacy mode?) > + */ > + uint32_t dest = (MASK_EXTR(tmp, MSI_ADDR_EXT_DEST_ID_MASK) << 8) | The literal 8 here and again ... > @@ -411,7 +413,8 @@ static void ioapic_inj_irq( > > static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) > { > - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; > + uint32_t dest = ((uint32_t)vioapic->redirtbl[pin].fields.ext_dest_id << 8) | ... here also would want dealing with, I guess. Use of literal numbers really should be an exception. > @@ -594,6 +597,49 @@ int vioapic_get_trigger_mode(const struct domain *d, unsigned int gsi) > return vioapic->redirtbl[pin].fields.trig_mode; > } > > +static int cf_check ioapic_check(const struct domain *d, hvm_domain_context_t *h) > +{ > + const HVM_SAVE_TYPE(IOAPIC) *s = hvm_get_entry(IOAPIC, h); > + unsigned int i; > + > + if ( !s ) > + return -ENODATA; > + > + for ( i = 0; i < ARRAY_SIZE(s->redirtbl); i++ ) > + { > + struct cpuid_leaf res; > + > + /* ext_dest_id bits not set in RTE so continue */ > + if ( !s->redirtbl[i].fields.ext_dest_id ) > + continue; > + > + /* > + * An RTE in the saved state has ext_dest_id bits set, verify the > + * destination XEN advertises XEN_HVM_CPUID_EXT_DEST_ID to the guest. > + * If not interrupt routing to APIC IDs > 255 would be broken after > + * restore -> -EINVAL! > + */ > + guest_cpuid(d->vcpu[0], 0x40000004, 0, &res); > + if ( !(res.a & XEN_HVM_CPUID_EXT_DEST_ID) ) > + { > + printk(XENLOG_G_ERR "HVM restore: dom%d IO-APIC RTE %u has " > + "extended destination ID bits set but " > + "XEN_HVM_CPUID_EXT_DEST_ID is not advertised\n", > + d->domain_id, i); > + return -EINVAL; > + } > + > + /* > + * Found an RTE with ext_dest bits set, but the destination XEN also > + * correctly announces XEN_HVM_CPUID_EXT_DEST_ID > + * -> All good, no need to check remaining RTEs. > + */ > + break; > + } > + > + return 0; > +} As indicated before, I think there wants to be a prereq patch introducing ioapic_check() (preferably covering whatever other bits as well), with the patch here then merely making adjustments to the function. I also don't think you want to call guest_cpuid() here. You set the bit unconditionally there, so no need to check here. (If it was conditionally set there, the same condition would want using here. I think you will be able to find examples of this for some of the other bits.) Also in new code please no dom%d anymore. We have had %pd for quite some time. > --- a/xen/arch/x86/include/asm/msi.h > +++ b/xen/arch/x86/include/asm/msi.h > @@ -54,6 +54,8 @@ > #define MSI_ADDR_DEST_ID_MASK 0x00ff000 > #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) > > +#define MSI_ADDR_EXT_DEST_ID_MASK 0x0000fe0 As this isn't part of any architectural spec, it wants a comment as to its origin. > --- a/xen/include/public/arch-x86/hvm/save.h > +++ b/xen/include/public/arch-x86/hvm/save.h > @@ -359,7 +359,9 @@ union vioapic_redir_entry > uint8_t trig_mode:1; > uint8_t mask:1; > uint8_t reserve:7; > - uint8_t reserved[4]; > + uint8_t reserved[3]; > + uint8_t ext_dest_rsvd:1; Why ext_dest_ as a prefix? Does this field need naming at all? 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Wed, 25 Feb 2026 07:32:54 -0800 (PST) Message-ID: <8a015ce9-1d06-441a-8269-c5a81549ac3b@suse.com> Date: Wed, 25 Feb 2026 16:32:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/vpci: automatically use iomem_permit_access for PCI device BARs To: Ariadne Conill Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan , xen-devel@lists.xenproject.org, Daniel Smith References: <20260224231249.6327-1-ariadne@ariadne.space> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260224231249.6327-1-ariadne@ariadne.space> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 25.02.2026 00:12, Ariadne Conill wrote: > From: Steven Noonan > > With vPCI, you shouldn't need to use xen-pciback for the device, so the > memory access permissions need to be defined somewhere. This allows vPCI > to automatically define the access permissions so that the domU can map > the BARs via IOMMU. What if XSM had something to say about this? IOW no, I don't think this is permissible. xen-pciback needed or not, that's not where permissions are granted. It's still the toolstack which needs to do that. Also you're never undoing the granting of the extra permissions. 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Wed, 25 Feb 2026 07:37:13 -0800 (PST) Message-ID: <2aef1aab-f1f4-4063-8c61-d26ae335d06f@suse.com> Date: Wed, 25 Feb 2026 16:37:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/vpci: zero guest-visible BAR addresses to ensure domU asssigns its own To: Ariadne Conill Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan , xen-devel@lists.xenproject.org References: <20260224231216.6203-1-ariadne@ariadne.space> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260224231216.6203-1-ariadne@ariadne.space> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 25.02.2026 00:12, Ariadne Conill wrote: > From: Steven Noonan > > If we just use the host's BAR addresses, the domU might not attempt to > reconfigure the BAR ranges and may never try to map them with the IOMMU. > Zeroing them ensures the guest kernel knows the BARs are not configured > and needs to make its own choices about where to map the BARs. Yet for this, don't we first need to expose a full topology to the guest, i.e. at least a host bridge, and maybe further bridges? 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Wed, 25 Feb 2026 07:44:10 -0800 (PST) Message-ID: <1d832f36-d22e-42c6-996c-d09c06376b8b@suse.com> Date: Wed, 25 Feb 2026 16:44:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/vpci: do not use pci_sanitize_bar_memory for domU To: Ariadne Conill Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , Steven Noonan , xen-devel@lists.xenproject.org References: <20260224231235.6277-1-ariadne@ariadne.space> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260224231235.6277-1-ariadne@ariadne.space> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 25.02.2026 00:12, Ariadne Conill wrote: > From: Steven Noonan > > This function should only be used for the hardware domain, because it > compares addresses against the host e820 map. The same is true for its sibling function, pci_check_bar(). For both the question is whether skipping is the right thing, or whether for DomU-s checking against their memory map is what is needed instead. > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -394,13 +394,15 @@ static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, bool rom_only) > } > } > > - rc = pci_sanitize_bar_memory(bar->mem); > - if ( rc ) > - { > - gprintk(XENLOG_WARNING, > - "%pp: failed to sanitize BAR#%u memory: %d\n", > - &pdev->sbdf, i, rc); > - return rc; > + if (is_hardware_domain(pdev->domain)) { Nit: Style (see surrounding code you alter). > + rc = pci_sanitize_bar_memory(mem); > + if ( rc ) > + { > + gprintk(XENLOG_WARNING, > + "%pp: failed to sanitize BAR#%u memory: %d\n", > + &pdev->sbdf, i, rc); > + return rc; > + } To avoid the need for re-indentation here (reducing churn) you may want to leverage that rc is 0 ahead of the call to pci_sanitize_bar_memory(). I.e. you could make just the call conditional, without touching anything else. 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charset=utf-8 Content-Transfer-Encoding: 7bit On Fri, Feb 13, 2026 at 11:37:05AM +0000, Oleksii Moisieiev wrote: > Plumb the SCMI SMC multi-agent type through the toolstack: > > - Extend libxl_arm_sci_type enumeration with scmi_smc_multiagent (value 2) > - Add agent_id field to libxl_arm_sci structure for per-domain agent assignment > - Update libxl_arm.c to translate libxl config to XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA > and pass agent_id to the hypervisor via xen_domctl_createdomain > - Add xl.cfg parsing for arm_sci="type=scmi_smc_multiagent,agent_id=N" > - Document the new xl.cfg options in xl.cfg.5.pod.in > > This completes the userspace side of multi-agent SCMI, allowing xl create > and dom0less configurations to assign unique agent_id values to domains. > > Signed-off-by: Grygorii Strashko > Signed-off-by: Oleksii Moisieiev > --- > > Changes in v10: > - Split hypervisor and toolstack changes into separate commits Thanks. That's easier to review. > docs/man/xl.cfg.5.pod.in | 14 ++++++++++++++ > tools/libs/light/libxl_arm.c | 4 ++++ > tools/libs/light/libxl_types.idl | 4 +++- > tools/xl/xl_parse.c | 12 ++++++++++++ > 4 files changed, 33 insertions(+), 1 deletion(-) > > diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in > index 27c455210b..e7f8af6156 100644 > --- a/docs/man/xl.cfg.5.pod.in > +++ b/docs/man/xl.cfg.5.pod.in > @@ -3156,8 +3156,22 @@ single SCMI OSPM agent support. > Should be used together with B Xen command line > option. > > +=item B > + > +Enables ARM SCMI SMC multi-agent support for the guest by enabling SCMI over > +SMC calls forwarding from domain to the EL3 firmware (like Trusted Firmware-A) > +with a multi SCMI OSPM agent support. The SCMI B should be > +specified for the guest. > + > =back > > +=item B > + > +Specifies a non-zero ARM SCI agent id for the guest. This option is mandatory > +if the SCMI SMC support is enabled for the guest. The agent ids of domains Those is need to say "SCMI SMC multi-agent support for the guest" ? `agent_id` doesn't seems to be used if we only select "type=scmi_smc" > +existing on a single host must be unique and in the range [0..254]. UINT8_MAX > +(255) is treated as invalid. What does "UINT8_MAX is treated as invalid" mean? Why is it mention? How is it different that the number 3615? My guess is that we don't care in this user documentation. All we need to say is that the value needs to be between 0 and 254 included, which is already stated. Also, it's written "non-zero agent id", but zero is in range of accepted values ([0-254]). So is agent_id=0 a valid config, or not? Also, if this config option isn't specified, we have a default to the value 0, is that ok? (libxl doesn't check if `agent_id` is a valid value, only `xl` doesn't that in this patch) BTW, you could check that agent_id is valid value in "libxl__arch_domain_build_info_setdefault()" > + > =back > > =back > diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c > index e4407d6e3f..be0e6263ae 100644 > --- a/tools/libs/light/libxl_arm.c > +++ b/tools/libs/light/libxl_arm.c > @@ -240,6 +240,10 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, > case LIBXL_ARM_SCI_TYPE_SCMI_SMC: > config->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; > break; > + case LIBXL_ARM_SCI_TYPE_SCMI_SMC_MULTIAGENT: > + config->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA; > + config->arch.arm_sci_agent_id = d_config->b_info.arch_arm.arm_sci.agent_id; > + break; > default: > LOG(ERROR, "Unknown ARM_SCI type %d", > d_config->b_info.arch_arm.arm_sci.type); > diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl > index 4a958f69f4..9bfbf09145 100644 > --- a/tools/libs/light/libxl_types.idl > +++ b/tools/libs/light/libxl_types.idl > @@ -554,11 +554,13 @@ libxl_sve_type = Enumeration("sve_type", [ > > libxl_arm_sci_type = Enumeration("arm_sci_type", [ > (0, "none"), > - (1, "scmi_smc") > + (1, "scmi_smc"), > + (2, "scmi_smc_multiagent") > ], init_val = "LIBXL_ARM_SCI_TYPE_NONE") > > libxl_arm_sci = Struct("arm_sci", [ > ("type", libxl_arm_sci_type), > + ("agent_id", uint8) Could you add a "#define LIBXL_HAVE_SCMI_SMC_MULTIAGENT" in "tools/include/libxl.h"? With a quick description about the new type, and new field. The are plenty of "LIBXL_HAVE_*" macro example in the header. > ]) > > libxl_rdm_reserve = Struct("rdm_reserve", [ > diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c > index 1cc41f1bff..2f1b475022 100644 > --- a/tools/xl/xl_parse.c > +++ b/tools/xl/xl_parse.c > @@ -1306,6 +1306,18 @@ static int parse_arm_sci_config(XLU_Config *cfg, libxl_arm_sci *arm_sci, > } > } > > + if (MATCH_OPTION("agent_id", ptr, oparg)) { > + unsigned long val = parse_ulong(oparg); > + > + if ( val >= UINT8_MAX ) { > + fprintf(stderr, "An invalid ARM_SCI agent_id specified (%lu). Valid range [0..254]\n", > + val); > + ret = ERROR_INVAL; > + goto out; > + } > + arm_sci->agent_id = val; > + } > + > ptr = strtok(NULL, ","); > } Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Feb 25 16:05:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 16:05:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240902.1542143 (Exim 4.92) (envelope-from ) id 1vvHO7-0000Yx-Rj; Wed, 25 Feb 2026 16:05:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240902.1542143; Wed, 25 Feb 2026 16:05:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvHO7-0000Yq-P5; Wed, 25 Feb 2026 16:05:23 +0000 Received: by outflank-mailman (input) for mailman id 1240902; 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Message-ID: <82bbccff-fca6-4256-b228-88fc326cf5d6@citrix.com> Date: Wed, 25 Feb 2026 16:05:12 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "consulting @ bugseng . com" Subject: Re: [PATCH 11/12] xen: Bracket uses of macro parameters To: Nicola Vetrini References: <20260220214653.3497384-1-andrew.cooper3@citrix.com> <20260220214653.3497384-12-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO4P302CA0037.GBRP302.PROD.OUTLOOK.COM (2603:10a6:600:317::9) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|DS4PR03MB8153:EE_ X-MS-Office365-Filtering-Correlation-Id: bbd5a270-94d4-4bdb-e7c4-08de7487aa9f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|7053199007; 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\ >>      if ( !__sec >> )                                                      >>                    \ >>          >> break;                                                         >>                    \ >> -    if ( !section_ok(elf, __sec, sizeof(*hook)) || >> __sec->sec->sh_size != sizeof(*hook) ) \ >> +    if ( !section_ok(elf, __sec, sizeof(*(hook))) >> ||                                      \ >> +         __sec->sec->sh_size != sizeof(*(hook)) >> )                                         \ >>          return >> -EINVAL;                                                >>                    \ >> -    hook = >> __sec->addr;                                                >>                    \ >> +    (hook) = >> __sec->addr;                                              >>                    \ > > This is not strictly needed, if not for consistency. That explains why my first try didn't succeed.  But, why is it that only MISRA only cares about bracketing for rvalues, not lvalues ? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 25 16:34:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 16:34:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240917.1542155 (Exim 4.92) (envelope-from ) id 1vvHq9-0004wO-WF; Wed, 25 Feb 2026 16:34:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240917.1542155; Wed, 25 Feb 2026 16:34:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvHq9-0004wH-SU; Wed, 25 Feb 2026 16:34:21 +0000 Received: by outflank-mailman (input) for mailman id 1240917; Wed, 25 Feb 2026 16:34:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvHq7-0004wB-Rt for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 16:34:19 +0000 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [2a00:1450:4864:20::42a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d2168c57-1267-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 17:34:14 +0100 (CET) Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-43990aa7dbaso703338f8f.1 for ; Wed, 25 Feb 2026 08:34:14 -0800 (PST) Received: from [192.168.69.201] (88-187-86-199.subs.proxad.net. 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026-02-25 17:05, Andrew Cooper wrote: > On 20/02/2026 10:45 pm, Nicola Vetrini wrote: >> On 2026-02-20 22:46, Andrew Cooper wrote: >>> Fixing Rule 20.7 violations. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >> >> Reviewed-by: Nicola Vetrini > > Thanks. > >>> diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c >>> index 7446533c8cfb..63473925cafb 100644 >>> --- a/xen/common/livepatch.c >>> +++ b/xen/common/livepatch.c >>> @@ -664,9 +664,10 @@ static inline int >>> livepatch_check_expectations(const struct payload *payload) >>>      const struct livepatch_elf_sec *__sec = >>> livepatch_elf_sec_by_name(elf, section_name); \ >>>      if ( !__sec >>> )                                                      >>>                    \ >>>          >>> break;                                                         >>>                    \ >>> -    if ( !section_ok(elf, __sec, sizeof(*hook)) || >>> __sec->sec->sh_size != sizeof(*hook) ) \ >>> +    if ( !section_ok(elf, __sec, sizeof(*(hook))) >>> ||                                      \ >>> +         __sec->sec->sh_size != sizeof(*(hook)) >>> )                                         \ >>>          return >>> -EINVAL;                                                >>>                    \ >>> -    hook = >>> __sec->addr;                                                >>>                    \ >>> +    (hook) = >>> __sec->addr;                                              >>>                    \ >> >> This is not strictly needed, if not for consistency. > > That explains why my first try didn't succeed.  But, why is it that > only > MISRA only cares about bracketing for rvalues, not lvalues ? > It was actually asked by Xen maintainers to introduce this special case on the grounds that it is extremely unlikely to result in an operator precedence mishap that leads to incorrect expansion. See below: -doc_begin="Code violating Rule 20.7 is safe when macro parameters are used: (1) as function arguments; (2) as macro arguments; (3) as array indices; (4) as lhs in assignments; (5) as initializers, possibly designated, in initalizer lists; (6) as the constant expression in a switch clause label." -config=MC3A2.R20.7,expansion_context= [...] -- Nicola Vetrini, B.Sc. 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>> _mfn(), as a static inline, is not and cannot be made to be. > Of course, and I think the comments were meant differently. What wasn't possible > to use (with -std=gnu99) due to the referenced bug is apparently > > #define INVALID_GFN ((gfn_t){ ~0UL }) > > Now that gcc5 is our baseline, do we perhaps want to use that and do away with > INVALID_GFN_INITIALIZER? Oh.  Yeah that's very much not what the comment suggested. Changing like that almost works, but there's one snag.  common/memory.c has     BUILD_BUG_ON(INVALID_GFN_RAW + 1); and with the _RAW constant wanting to go, the obvious:     BUILD_BUG_ON(gfn_x(INVALID_GFN) + 1); doesn't compile as it's no longer a constant expression. It's not clear what to do here.  I don't think we want to keep INVALID_GFN_RAW around for just this, but nor am I completely happy dropping the BUILD_BUG_ON() either. Thoughts? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Feb 25 16:39:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 16:39:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1240956.1542184 (Exim 4.92) (envelope-from ) id 1vvHvO-0006lv-3Y; Wed, 25 Feb 2026 16:39:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1240956.1542184; Wed, 25 Feb 2026 16:39:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvHvO-0006lo-0F; Wed, 25 Feb 2026 16:39:46 +0000 Received: by outflank-mailman (input) for mailman id 1240956; Wed, 25 Feb 2026 16:39:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvHvM-0006ld-G3 for xen-devel@lists.xenproject.org; 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\ >>>>      if ( !__sec >>>> )                                                      >>>>                    \ >>>>          >>>> break;                                                         >>>>                    \ >>>> -    if ( !section_ok(elf, __sec, sizeof(*hook)) || >>>> __sec->sec->sh_size != sizeof(*hook) ) \ >>>> +    if ( !section_ok(elf, __sec, sizeof(*(hook))) >>>> ||                                      \ >>>> +         __sec->sec->sh_size != sizeof(*(hook)) >>>> )                                         \ >>>>          return >>>> -EINVAL;                                                >>>>                    \ >>>> -    hook = >>>> __sec->addr;                                                >>>>                    \ >>>> +    (hook) = >>>> __sec->addr;                                              >>>>                    \ >>> >>> This is not strictly needed, if not for consistency. >> >> That explains why my first try didn't succeed.  But, why is it that only >> MISRA only cares about bracketing for rvalues, not lvalues ? >> > > It was actually asked by Xen maintainers to introduce this special > case on the grounds that it is extremely unlikely to result in an > operator precedence mishap that leads to incorrect expansion. See below: > > -doc_begin="Code violating Rule 20.7 is safe when macro parameters are > used: (1) > as function arguments; (2) as macro arguments; (3) as array indices; > (4) as lhs > in assignments; (5) as initializers, possibly designated, in > initalizer lists; > (6) as the constant expression in a switch clause label." > -config=MC3A2.R20.7,expansion_context= > [...]  Oh ok.  I'll make it match what was agreed then. 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Wed, 25 Feb 2026 11:40:08 -0800 (PST) Message-ID: <805deb11-cba0-4567-b296-7ee35febe18a@linaro.org> Date: Wed, 25 Feb 2026 11:40:07 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] accel/kvm: Include missing 'exec/cpu-common.h' header Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Paolo Bonzini , xen-devel@lists.xenproject.org References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-2-philmd@linaro.org> From: Pierrick Bouvier Autocrypt: addr=pierrick.bouvier@linaro.org; keydata= xsDNBGK9dgwBDACYuRpR31LD+BnJ0M4b5YnPZKbj+gyu82IDN0MeMf2PGf1sux+1O2ryzmnA eOiRCUY9l7IbtPYPHN5YVx+7W3vo6v89I7mL940oYAW8loPZRSMbyCiUeSoiN4gWPXetoNBg CJmXbVYQgL5e6rsXoMlwFWuGrBY3Ig8YhEqpuYDkRXj2idO11CiDBT/b8A2aGixnpWV/s+AD gUyEVjHU6Z8UervvuNKlRUNE0rUfc502Sa8Azdyda8a7MAyrbA/OI0UnSL1m+pXXCxOxCvtU qOlipoCOycBjpLlzjj1xxRci+ssiZeOhxdejILf5LO1gXf6pP+ROdW4ySp9L3dAWnNDcnj6U 2voYk7/RpRUTpecvkxnwiOoiIQ7BatjkssFy+0sZOYNbOmoqU/Gq+LeFqFYKDV8gNmAoxBvk L6EtXUNfTBjiMHyjA/HMMq27Ja3/Y73xlFpTVp7byQoTwF4p1uZOOXjFzqIyW25GvEekDRF8 IpYd6/BomxHzvMZ2sQ/VXaMAEQEAAc0uUGllcnJpY2sgQm91dmllciA8cGllcnJpY2suYm91 dmllckBsaW5hcm8ub3JnPsLBDgQTAQoAOBYhBGa5lOyhT38uWroIH3+QVA0KHNAPBQJivXYM AhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEH+QVA0KHNAPX58L/1DYzrEO4TU9ZhJE tKcw/+mCZrzHxPNlQtENJ5NULAJWVaJ/8kRQ3Et5hQYhYDKK+3I+0Tl/tYuUeKNV74dFE7mv PmikCXBGN5hv5povhinZ9T14S2xkMgym2T3DbkeaYFSmu8Z89jm/AQVt3ZDRjV6vrVfvVW0L F6wPJSOLIvKjOc8/+NXrKLrV/YTEi2R1ovIPXcK7NP6tvzAEgh76kW34AHtroC7GFQKu/aAn HnL7XrvNvByjpa636jIM9ij43LpLXjIQk3bwHeoHebkmgzFef+lZafzD+oSNNLoYkuWfoL2l CR1mifjh7eybmVx7hfhj3GCmRu9o1x59nct06E3ri8/eY52l/XaWGGuKz1bbCd3xa6NxuzDM UZU+b0PxHyg9tvASaVWKZ5SsQ5Lf9Gw6WKEhnyTR8Msnh8kMkE7+QWNDmjr0xqB+k/xMlVLE uI9Pmq/RApQkW0Q96lTa1Z/UKPm69BMVnUvHv6u3n0tRCDOHTUKHXp/9h5CH3xawms7AzQRi vXYMAQwAwXUyTS/Vgq3M9F+9r6XGwbak6D7sJB3ZSG/ZQe5ByCnH9ZSIFqjMnxr4GZUzgBAj FWMSVlseSninYe7MoH15T4QXi0gMmKsU40ckXLG/EW/mXRlLd8NOTZj8lULPwg/lQNAnc7GN I4uZoaXmYSc4eI7+gUWTqAHmESHYFjilweyuxcvXhIKez7EXnwaakHMAOzNHIdcGGs8NFh44 oPh93uIr65EUDNxf0fDjnvu92ujf0rUKGxXJx9BrcYJzr7FliQvprlHaRKjahuwLYfZK6Ma6 TCU40GsDxbGjR5w/UeOgjpb4SVU99Nol/W9C2aZ7e//2f9APVuzY8USAGWnu3eBJcJB+o9ck y2bSJ5gmGT96r88RtH/E1460QxF0GGWZcDzZ6SEKkvGSCYueUMzAAqJz9JSirc76E/JoHXYI /FWKgFcC4HRQpZ5ThvyAoj9nTIPI4DwqoaFOdulyYAxcbNmcGAFAsl0jJYJ5Mcm2qfQwNiiW YnqdwQzVfhwaAcPVABEBAAHCwPYEGAEKACAWIQRmuZTsoU9/Llq6CB9/kFQNChzQDwUCYr12 DAIbDAAKCRB/kFQNChzQD/XaC/9MnvmPi8keFJggOg28v+r42P7UQtQ9D3LJMgj3OTzBN2as v20Ju09/rj+gx3u7XofHBUj6BsOLVCWjIX52hcEEg+Bzo3uPZ3apYtIgqfjrn/fPB0bCVIbi 0hAw6W7Ygt+T1Wuak/EV0KS/If309W4b/DiI+fkQpZhCiLUK7DrA97xA1OT1bJJYkC3y4seo 0VHOnZTpnOyZ+8Ejs6gcMiEboFHEEt9P+3mrlVJL/cHpGRtg0ZKJ4QC8UmCE3arzv7KCAc+2 dRDWiCoRovqXGE2PdAW8788qH5DEXnwfzDhnCQ9Eot0Eyi41d4PWI8TWZFi9KzGXJO82O9gW 5SYuJaKzCAgNeAy3gUVUUPrUsul1oe2PeWMFUhWKrqko0/Qo4HkwTZY6S16drTMncoUahSAl X4Z3BbSPXPq0v1JJBYNBL9qmjULEX+NbtRd3v0OfB5L49sSAC2zIO8S9Cufiibqx3mxZTaJ1 ZtfdHNZotF092MIH0IQC3poExQpV/WBYFAI= In-Reply-To: <20260225051303.91614-2-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/24/26 9:12 PM, Philippe Mathieu-Daudé wrote: > kvm-accel-ops.c uses EXCP_DEBUG, itself defined in > "exec/cpu-common.h". Include it explicitly, otherwise > we get when modifying unrelated headers: > > ../accel/kvm/kvm-accel-ops.c: In function ‘kvm_vcpu_thread_fn’: > ../accel/kvm/kvm-accel-ops.c:54:22: error: ‘EXCP_DEBUG’ undeclared (first use in this function) > 54 | if (r == EXCP_DEBUG) { > | ^~~~~~~~~~ > > Signed-off-by: Philippe Mathieu-Daudé > --- > accel/kvm/kvm-accel-ops.c | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Pierrick Bouvier From xen-devel-bounces@lists.xenproject.org Wed Feb 25 19:40:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 19:40:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241037.1542276 (Exim 4.92) (envelope-from ) id 1vvKkF-0004Sc-9m; Wed, 25 Feb 2026 19:40:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241037.1542276; Wed, 25 Feb 2026 19:40:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKkF-0004SV-6C; Wed, 25 Feb 2026 19:40:27 +0000 Received: by outflank-mailman (input) for mailman id 1241037; Wed, 25 Feb 2026 19:40:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKkE-0004C4-25 for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 19:40:26 +0000 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [2607:f8b0:4864:20::42e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d41bfc30-1281-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 20:40:25 +0100 (CET) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-827270d50d4so108647b3a.3 for ; Wed, 25 Feb 2026 11:40:25 -0800 (PST) Received: from [192.168.1.87] (216-71-219-44.dyn.novuscom.net. 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Wed, 25 Feb 2026 11:40:23 -0800 (PST) Message-ID: <9dab95ec-f4f0-4e5d-bec7-b773edddb3cd@linaro.org> Date: Wed, 25 Feb 2026 11:40:22 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] accel/mshv: Forward-declare mshv_root_hvcall structure Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Paolo Bonzini , xen-devel@lists.xenproject.org, Magnus Kulke , Wei Liu References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-3-philmd@linaro.org> From: Pierrick Bouvier Autocrypt: addr=pierrick.bouvier@linaro.org; keydata= xsDNBGK9dgwBDACYuRpR31LD+BnJ0M4b5YnPZKbj+gyu82IDN0MeMf2PGf1sux+1O2ryzmnA eOiRCUY9l7IbtPYPHN5YVx+7W3vo6v89I7mL940oYAW8loPZRSMbyCiUeSoiN4gWPXetoNBg CJmXbVYQgL5e6rsXoMlwFWuGrBY3Ig8YhEqpuYDkRXj2idO11CiDBT/b8A2aGixnpWV/s+AD gUyEVjHU6Z8UervvuNKlRUNE0rUfc502Sa8Azdyda8a7MAyrbA/OI0UnSL1m+pXXCxOxCvtU qOlipoCOycBjpLlzjj1xxRci+ssiZeOhxdejILf5LO1gXf6pP+ROdW4ySp9L3dAWnNDcnj6U 2voYk7/RpRUTpecvkxnwiOoiIQ7BatjkssFy+0sZOYNbOmoqU/Gq+LeFqFYKDV8gNmAoxBvk L6EtXUNfTBjiMHyjA/HMMq27Ja3/Y73xlFpTVp7byQoTwF4p1uZOOXjFzqIyW25GvEekDRF8 IpYd6/BomxHzvMZ2sQ/VXaMAEQEAAc0uUGllcnJpY2sgQm91dmllciA8cGllcnJpY2suYm91 dmllckBsaW5hcm8ub3JnPsLBDgQTAQoAOBYhBGa5lOyhT38uWroIH3+QVA0KHNAPBQJivXYM AhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEH+QVA0KHNAPX58L/1DYzrEO4TU9ZhJE tKcw/+mCZrzHxPNlQtENJ5NULAJWVaJ/8kRQ3Et5hQYhYDKK+3I+0Tl/tYuUeKNV74dFE7mv PmikCXBGN5hv5povhinZ9T14S2xkMgym2T3DbkeaYFSmu8Z89jm/AQVt3ZDRjV6vrVfvVW0L F6wPJSOLIvKjOc8/+NXrKLrV/YTEi2R1ovIPXcK7NP6tvzAEgh76kW34AHtroC7GFQKu/aAn HnL7XrvNvByjpa636jIM9ij43LpLXjIQk3bwHeoHebkmgzFef+lZafzD+oSNNLoYkuWfoL2l CR1mifjh7eybmVx7hfhj3GCmRu9o1x59nct06E3ri8/eY52l/XaWGGuKz1bbCd3xa6NxuzDM UZU+b0PxHyg9tvASaVWKZ5SsQ5Lf9Gw6WKEhnyTR8Msnh8kMkE7+QWNDmjr0xqB+k/xMlVLE uI9Pmq/RApQkW0Q96lTa1Z/UKPm69BMVnUvHv6u3n0tRCDOHTUKHXp/9h5CH3xawms7AzQRi vXYMAQwAwXUyTS/Vgq3M9F+9r6XGwbak6D7sJB3ZSG/ZQe5ByCnH9ZSIFqjMnxr4GZUzgBAj FWMSVlseSninYe7MoH15T4QXi0gMmKsU40ckXLG/EW/mXRlLd8NOTZj8lULPwg/lQNAnc7GN I4uZoaXmYSc4eI7+gUWTqAHmESHYFjilweyuxcvXhIKez7EXnwaakHMAOzNHIdcGGs8NFh44 oPh93uIr65EUDNxf0fDjnvu92ujf0rUKGxXJx9BrcYJzr7FliQvprlHaRKjahuwLYfZK6Ma6 TCU40GsDxbGjR5w/UeOgjpb4SVU99Nol/W9C2aZ7e//2f9APVuzY8USAGWnu3eBJcJB+o9ck y2bSJ5gmGT96r88RtH/E1460QxF0GGWZcDzZ6SEKkvGSCYueUMzAAqJz9JSirc76E/JoHXYI /FWKgFcC4HRQpZ5ThvyAoj9nTIPI4DwqoaFOdulyYAxcbNmcGAFAsl0jJYJ5Mcm2qfQwNiiW YnqdwQzVfhwaAcPVABEBAAHCwPYEGAEKACAWIQRmuZTsoU9/Llq6CB9/kFQNChzQDwUCYr12 DAIbDAAKCRB/kFQNChzQD/XaC/9MnvmPi8keFJggOg28v+r42P7UQtQ9D3LJMgj3OTzBN2as v20Ju09/rj+gx3u7XofHBUj6BsOLVCWjIX52hcEEg+Bzo3uPZ3apYtIgqfjrn/fPB0bCVIbi 0hAw6W7Ygt+T1Wuak/EV0KS/If309W4b/DiI+fkQpZhCiLUK7DrA97xA1OT1bJJYkC3y4seo 0VHOnZTpnOyZ+8Ejs6gcMiEboFHEEt9P+3mrlVJL/cHpGRtg0ZKJ4QC8UmCE3arzv7KCAc+2 dRDWiCoRovqXGE2PdAW8788qH5DEXnwfzDhnCQ9Eot0Eyi41d4PWI8TWZFi9KzGXJO82O9gW 5SYuJaKzCAgNeAy3gUVUUPrUsul1oe2PeWMFUhWKrqko0/Qo4HkwTZY6S16drTMncoUahSAl X4Z3BbSPXPq0v1JJBYNBL9qmjULEX+NbtRd3v0OfB5L49sSAC2zIO8S9Cufiibqx3mxZTaJ1 ZtfdHNZotF092MIH0IQC3poExQpV/WBYFAI= In-Reply-To: <20260225051303.91614-3-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/24/26 9:13 PM, Philippe Mathieu-Daudé wrote: > Forward-declare the target-specific mshv_root_hvcall structure > in order to keep 'system/mshv_int.h' target-agnostic. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/system/mshv_int.h | 5 ++--- > accel/mshv/mshv-all.c | 2 +- > 2 files changed, 3 insertions(+), 4 deletions(-) > Reviewed-by: Pierrick Bouvier From xen-devel-bounces@lists.xenproject.org Wed Feb 25 19:40:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 19:40:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241043.1542285 (Exim 4.92) (envelope-from ) id 1vvKka-0004yQ-HC; Wed, 25 Feb 2026 19:40:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241043.1542285; Wed, 25 Feb 2026 19:40:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKka-0004yG-Dy; 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Wed, 25 Feb 2026 11:40:39 -0800 (PST) Message-ID: <2a0b5bb2-f29a-49f5-9840-cc1385e1ada1@linaro.org> Date: Wed, 25 Feb 2026 11:40:38 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] accel/mshv: Build without target-specific knowledge Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Paolo Bonzini , xen-devel@lists.xenproject.org, Magnus Kulke , Wei Liu References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-4-philmd@linaro.org> From: Pierrick Bouvier Autocrypt: addr=pierrick.bouvier@linaro.org; keydata= xsDNBGK9dgwBDACYuRpR31LD+BnJ0M4b5YnPZKbj+gyu82IDN0MeMf2PGf1sux+1O2ryzmnA eOiRCUY9l7IbtPYPHN5YVx+7W3vo6v89I7mL940oYAW8loPZRSMbyCiUeSoiN4gWPXetoNBg CJmXbVYQgL5e6rsXoMlwFWuGrBY3Ig8YhEqpuYDkRXj2idO11CiDBT/b8A2aGixnpWV/s+AD gUyEVjHU6Z8UervvuNKlRUNE0rUfc502Sa8Azdyda8a7MAyrbA/OI0UnSL1m+pXXCxOxCvtU qOlipoCOycBjpLlzjj1xxRci+ssiZeOhxdejILf5LO1gXf6pP+ROdW4ySp9L3dAWnNDcnj6U 2voYk7/RpRUTpecvkxnwiOoiIQ7BatjkssFy+0sZOYNbOmoqU/Gq+LeFqFYKDV8gNmAoxBvk L6EtXUNfTBjiMHyjA/HMMq27Ja3/Y73xlFpTVp7byQoTwF4p1uZOOXjFzqIyW25GvEekDRF8 IpYd6/BomxHzvMZ2sQ/VXaMAEQEAAc0uUGllcnJpY2sgQm91dmllciA8cGllcnJpY2suYm91 dmllckBsaW5hcm8ub3JnPsLBDgQTAQoAOBYhBGa5lOyhT38uWroIH3+QVA0KHNAPBQJivXYM AhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEH+QVA0KHNAPX58L/1DYzrEO4TU9ZhJE tKcw/+mCZrzHxPNlQtENJ5NULAJWVaJ/8kRQ3Et5hQYhYDKK+3I+0Tl/tYuUeKNV74dFE7mv PmikCXBGN5hv5povhinZ9T14S2xkMgym2T3DbkeaYFSmu8Z89jm/AQVt3ZDRjV6vrVfvVW0L F6wPJSOLIvKjOc8/+NXrKLrV/YTEi2R1ovIPXcK7NP6tvzAEgh76kW34AHtroC7GFQKu/aAn HnL7XrvNvByjpa636jIM9ij43LpLXjIQk3bwHeoHebkmgzFef+lZafzD+oSNNLoYkuWfoL2l CR1mifjh7eybmVx7hfhj3GCmRu9o1x59nct06E3ri8/eY52l/XaWGGuKz1bbCd3xa6NxuzDM UZU+b0PxHyg9tvASaVWKZ5SsQ5Lf9Gw6WKEhnyTR8Msnh8kMkE7+QWNDmjr0xqB+k/xMlVLE uI9Pmq/RApQkW0Q96lTa1Z/UKPm69BMVnUvHv6u3n0tRCDOHTUKHXp/9h5CH3xawms7AzQRi vXYMAQwAwXUyTS/Vgq3M9F+9r6XGwbak6D7sJB3ZSG/ZQe5ByCnH9ZSIFqjMnxr4GZUzgBAj FWMSVlseSninYe7MoH15T4QXi0gMmKsU40ckXLG/EW/mXRlLd8NOTZj8lULPwg/lQNAnc7GN I4uZoaXmYSc4eI7+gUWTqAHmESHYFjilweyuxcvXhIKez7EXnwaakHMAOzNHIdcGGs8NFh44 oPh93uIr65EUDNxf0fDjnvu92ujf0rUKGxXJx9BrcYJzr7FliQvprlHaRKjahuwLYfZK6Ma6 TCU40GsDxbGjR5w/UeOgjpb4SVU99Nol/W9C2aZ7e//2f9APVuzY8USAGWnu3eBJcJB+o9ck y2bSJ5gmGT96r88RtH/E1460QxF0GGWZcDzZ6SEKkvGSCYueUMzAAqJz9JSirc76E/JoHXYI /FWKgFcC4HRQpZ5ThvyAoj9nTIPI4DwqoaFOdulyYAxcbNmcGAFAsl0jJYJ5Mcm2qfQwNiiW YnqdwQzVfhwaAcPVABEBAAHCwPYEGAEKACAWIQRmuZTsoU9/Llq6CB9/kFQNChzQDwUCYr12 DAIbDAAKCRB/kFQNChzQD/XaC/9MnvmPi8keFJggOg28v+r42P7UQtQ9D3LJMgj3OTzBN2as v20Ju09/rj+gx3u7XofHBUj6BsOLVCWjIX52hcEEg+Bzo3uPZ3apYtIgqfjrn/fPB0bCVIbi 0hAw6W7Ygt+T1Wuak/EV0KS/If309W4b/DiI+fkQpZhCiLUK7DrA97xA1OT1bJJYkC3y4seo 0VHOnZTpnOyZ+8Ejs6gcMiEboFHEEt9P+3mrlVJL/cHpGRtg0ZKJ4QC8UmCE3arzv7KCAc+2 dRDWiCoRovqXGE2PdAW8788qH5DEXnwfzDhnCQ9Eot0Eyi41d4PWI8TWZFi9KzGXJO82O9gW 5SYuJaKzCAgNeAy3gUVUUPrUsul1oe2PeWMFUhWKrqko0/Qo4HkwTZY6S16drTMncoUahSAl X4Z3BbSPXPq0v1JJBYNBL9qmjULEX+NbtRd3v0OfB5L49sSAC2zIO8S9Cufiibqx3mxZTaJ1 ZtfdHNZotF092MIH0IQC3poExQpV/WBYFAI= In-Reply-To: <20260225051303.91614-4-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/24/26 9:13 PM, Philippe Mathieu-Daudé wrote: > Code in accel/ aims to be target-agnostic. Enforce that > by moving the MSHV file units to system_ss[], which is > target-agnostic. > > Signed-off-by: Philippe Mathieu-Daudé > --- > accel/mshv/meson.build | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > Reviewed-by: Pierrick Bouvier From xen-devel-bounces@lists.xenproject.org Wed Feb 25 19:42:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 19:42:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241059.1542296 (Exim 4.92) (envelope-from ) id 1vvKll-0005dB-VS; Wed, 25 Feb 2026 19:42:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241059.1542296; Wed, 25 Feb 2026 19:42:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKll-0005d4-Sj; Wed, 25 Feb 2026 19:42:01 +0000 Received: by outflank-mailman (input) for mailman id 1241059; Wed, 25 Feb 2026 19:42:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKll-0005cy-Ch for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 19:42:01 +0000 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [2607:f8b0:4864:20::62d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0be9bc0d-1282-11f1-9ccf-f158ae23cfc8; Wed, 25 Feb 2026 20:41:58 +0100 (CET) Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-2aaf9191da3so122005ad.2 for ; Wed, 25 Feb 2026 11:41:59 -0800 (PST) Received: from [192.168.1.87] (216-71-219-44.dyn.novuscom.net. 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Wed, 25 Feb 2026 11:41:57 -0800 (PST) Message-ID: <25191af9-bcfe-491f-850e-d5a43fa89c6c@linaro.org> Date: Wed, 25 Feb 2026 11:41:56 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] accel/hvf: Build without target-specific knowledge Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Paolo Bonzini , xen-devel@lists.xenproject.org, Cameron Esfahani , Roman Bolshakov , Phil Dennis-Jordan References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-5-philmd@linaro.org> From: Pierrick Bouvier Autocrypt: addr=pierrick.bouvier@linaro.org; keydata= xsDNBGK9dgwBDACYuRpR31LD+BnJ0M4b5YnPZKbj+gyu82IDN0MeMf2PGf1sux+1O2ryzmnA eOiRCUY9l7IbtPYPHN5YVx+7W3vo6v89I7mL940oYAW8loPZRSMbyCiUeSoiN4gWPXetoNBg CJmXbVYQgL5e6rsXoMlwFWuGrBY3Ig8YhEqpuYDkRXj2idO11CiDBT/b8A2aGixnpWV/s+AD gUyEVjHU6Z8UervvuNKlRUNE0rUfc502Sa8Azdyda8a7MAyrbA/OI0UnSL1m+pXXCxOxCvtU qOlipoCOycBjpLlzjj1xxRci+ssiZeOhxdejILf5LO1gXf6pP+ROdW4ySp9L3dAWnNDcnj6U 2voYk7/RpRUTpecvkxnwiOoiIQ7BatjkssFy+0sZOYNbOmoqU/Gq+LeFqFYKDV8gNmAoxBvk L6EtXUNfTBjiMHyjA/HMMq27Ja3/Y73xlFpTVp7byQoTwF4p1uZOOXjFzqIyW25GvEekDRF8 IpYd6/BomxHzvMZ2sQ/VXaMAEQEAAc0uUGllcnJpY2sgQm91dmllciA8cGllcnJpY2suYm91 dmllckBsaW5hcm8ub3JnPsLBDgQTAQoAOBYhBGa5lOyhT38uWroIH3+QVA0KHNAPBQJivXYM AhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEH+QVA0KHNAPX58L/1DYzrEO4TU9ZhJE tKcw/+mCZrzHxPNlQtENJ5NULAJWVaJ/8kRQ3Et5hQYhYDKK+3I+0Tl/tYuUeKNV74dFE7mv PmikCXBGN5hv5povhinZ9T14S2xkMgym2T3DbkeaYFSmu8Z89jm/AQVt3ZDRjV6vrVfvVW0L F6wPJSOLIvKjOc8/+NXrKLrV/YTEi2R1ovIPXcK7NP6tvzAEgh76kW34AHtroC7GFQKu/aAn HnL7XrvNvByjpa636jIM9ij43LpLXjIQk3bwHeoHebkmgzFef+lZafzD+oSNNLoYkuWfoL2l CR1mifjh7eybmVx7hfhj3GCmRu9o1x59nct06E3ri8/eY52l/XaWGGuKz1bbCd3xa6NxuzDM UZU+b0PxHyg9tvASaVWKZ5SsQ5Lf9Gw6WKEhnyTR8Msnh8kMkE7+QWNDmjr0xqB+k/xMlVLE uI9Pmq/RApQkW0Q96lTa1Z/UKPm69BMVnUvHv6u3n0tRCDOHTUKHXp/9h5CH3xawms7AzQRi vXYMAQwAwXUyTS/Vgq3M9F+9r6XGwbak6D7sJB3ZSG/ZQe5ByCnH9ZSIFqjMnxr4GZUzgBAj FWMSVlseSninYe7MoH15T4QXi0gMmKsU40ckXLG/EW/mXRlLd8NOTZj8lULPwg/lQNAnc7GN I4uZoaXmYSc4eI7+gUWTqAHmESHYFjilweyuxcvXhIKez7EXnwaakHMAOzNHIdcGGs8NFh44 oPh93uIr65EUDNxf0fDjnvu92ujf0rUKGxXJx9BrcYJzr7FliQvprlHaRKjahuwLYfZK6Ma6 TCU40GsDxbGjR5w/UeOgjpb4SVU99Nol/W9C2aZ7e//2f9APVuzY8USAGWnu3eBJcJB+o9ck y2bSJ5gmGT96r88RtH/E1460QxF0GGWZcDzZ6SEKkvGSCYueUMzAAqJz9JSirc76E/JoHXYI /FWKgFcC4HRQpZ5ThvyAoj9nTIPI4DwqoaFOdulyYAxcbNmcGAFAsl0jJYJ5Mcm2qfQwNiiW YnqdwQzVfhwaAcPVABEBAAHCwPYEGAEKACAWIQRmuZTsoU9/Llq6CB9/kFQNChzQDwUCYr12 DAIbDAAKCRB/kFQNChzQD/XaC/9MnvmPi8keFJggOg28v+r42P7UQtQ9D3LJMgj3OTzBN2as v20Ju09/rj+gx3u7XofHBUj6BsOLVCWjIX52hcEEg+Bzo3uPZ3apYtIgqfjrn/fPB0bCVIbi 0hAw6W7Ygt+T1Wuak/EV0KS/If309W4b/DiI+fkQpZhCiLUK7DrA97xA1OT1bJJYkC3y4seo 0VHOnZTpnOyZ+8Ejs6gcMiEboFHEEt9P+3mrlVJL/cHpGRtg0ZKJ4QC8UmCE3arzv7KCAc+2 dRDWiCoRovqXGE2PdAW8788qH5DEXnwfzDhnCQ9Eot0Eyi41d4PWI8TWZFi9KzGXJO82O9gW 5SYuJaKzCAgNeAy3gUVUUPrUsul1oe2PeWMFUhWKrqko0/Qo4HkwTZY6S16drTMncoUahSAl X4Z3BbSPXPq0v1JJBYNBL9qmjULEX+NbtRd3v0OfB5L49sSAC2zIO8S9Cufiibqx3mxZTaJ1 ZtfdHNZotF092MIH0IQC3poExQpV/WBYFAI= In-Reply-To: <20260225051303.91614-5-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/24/26 9:13 PM, Philippe Mathieu-Daudé wrote: > Code in accel/ aims to be target-agnostic. Enforce that > by moving the MSHV file units to system_ss[], which is > target-agnostic. > > Signed-off-by: Philippe Mathieu-Daudé > --- > accel/hvf/meson.build | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > Reviewed-by: Pierrick Bouvier From xen-devel-bounces@lists.xenproject.org Wed Feb 25 19:42:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 19:42:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241060.1542306 (Exim 4.92) (envelope-from ) id 1vvKlr-0005sE-5t; Wed, 25 Feb 2026 19:42:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241060.1542306; Wed, 25 Feb 2026 19:42:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKlr-0005s5-2r; Wed, 25 Feb 2026 19:42:07 +0000 Received: by outflank-mailman (input) for mailman id 1241060; Wed, 25 Feb 2026 19:42:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvKlp-0005rR-TM for xen-devel@lists.xenproject.org; Wed, 25 Feb 2026 19:42:05 +0000 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [2607:f8b0:4864:20::632]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0eee4598-1282-11f1-b164-2bf370ae4941; Wed, 25 Feb 2026 20:42:04 +0100 (CET) Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2aad1bb5058so126645ad.0 for ; Wed, 25 Feb 2026 11:42:03 -0800 (PST) Received: from [192.168.1.87] (216-71-219-44.dyn.novuscom.net. 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Iglesias" References: <20260225051303.91614-1-philmd@linaro.org> <20260225051303.91614-6-philmd@linaro.org> From: Pierrick Bouvier Autocrypt: addr=pierrick.bouvier@linaro.org; keydata= xsDNBGK9dgwBDACYuRpR31LD+BnJ0M4b5YnPZKbj+gyu82IDN0MeMf2PGf1sux+1O2ryzmnA eOiRCUY9l7IbtPYPHN5YVx+7W3vo6v89I7mL940oYAW8loPZRSMbyCiUeSoiN4gWPXetoNBg CJmXbVYQgL5e6rsXoMlwFWuGrBY3Ig8YhEqpuYDkRXj2idO11CiDBT/b8A2aGixnpWV/s+AD gUyEVjHU6Z8UervvuNKlRUNE0rUfc502Sa8Azdyda8a7MAyrbA/OI0UnSL1m+pXXCxOxCvtU qOlipoCOycBjpLlzjj1xxRci+ssiZeOhxdejILf5LO1gXf6pP+ROdW4ySp9L3dAWnNDcnj6U 2voYk7/RpRUTpecvkxnwiOoiIQ7BatjkssFy+0sZOYNbOmoqU/Gq+LeFqFYKDV8gNmAoxBvk L6EtXUNfTBjiMHyjA/HMMq27Ja3/Y73xlFpTVp7byQoTwF4p1uZOOXjFzqIyW25GvEekDRF8 IpYd6/BomxHzvMZ2sQ/VXaMAEQEAAc0uUGllcnJpY2sgQm91dmllciA8cGllcnJpY2suYm91 dmllckBsaW5hcm8ub3JnPsLBDgQTAQoAOBYhBGa5lOyhT38uWroIH3+QVA0KHNAPBQJivXYM AhsDBQsJCAcCBhUKCQgLAgQWAgMBAh4BAheAAAoJEH+QVA0KHNAPX58L/1DYzrEO4TU9ZhJE tKcw/+mCZrzHxPNlQtENJ5NULAJWVaJ/8kRQ3Et5hQYhYDKK+3I+0Tl/tYuUeKNV74dFE7mv PmikCXBGN5hv5povhinZ9T14S2xkMgym2T3DbkeaYFSmu8Z89jm/AQVt3ZDRjV6vrVfvVW0L F6wPJSOLIvKjOc8/+NXrKLrV/YTEi2R1ovIPXcK7NP6tvzAEgh76kW34AHtroC7GFQKu/aAn HnL7XrvNvByjpa636jIM9ij43LpLXjIQk3bwHeoHebkmgzFef+lZafzD+oSNNLoYkuWfoL2l CR1mifjh7eybmVx7hfhj3GCmRu9o1x59nct06E3ri8/eY52l/XaWGGuKz1bbCd3xa6NxuzDM UZU+b0PxHyg9tvASaVWKZ5SsQ5Lf9Gw6WKEhnyTR8Msnh8kMkE7+QWNDmjr0xqB+k/xMlVLE uI9Pmq/RApQkW0Q96lTa1Z/UKPm69BMVnUvHv6u3n0tRCDOHTUKHXp/9h5CH3xawms7AzQRi vXYMAQwAwXUyTS/Vgq3M9F+9r6XGwbak6D7sJB3ZSG/ZQe5ByCnH9ZSIFqjMnxr4GZUzgBAj FWMSVlseSninYe7MoH15T4QXi0gMmKsU40ckXLG/EW/mXRlLd8NOTZj8lULPwg/lQNAnc7GN I4uZoaXmYSc4eI7+gUWTqAHmESHYFjilweyuxcvXhIKez7EXnwaakHMAOzNHIdcGGs8NFh44 oPh93uIr65EUDNxf0fDjnvu92ujf0rUKGxXJx9BrcYJzr7FliQvprlHaRKjahuwLYfZK6Ma6 TCU40GsDxbGjR5w/UeOgjpb4SVU99Nol/W9C2aZ7e//2f9APVuzY8USAGWnu3eBJcJB+o9ck y2bSJ5gmGT96r88RtH/E1460QxF0GGWZcDzZ6SEKkvGSCYueUMzAAqJz9JSirc76E/JoHXYI /FWKgFcC4HRQpZ5ThvyAoj9nTIPI4DwqoaFOdulyYAxcbNmcGAFAsl0jJYJ5Mcm2qfQwNiiW YnqdwQzVfhwaAcPVABEBAAHCwPYEGAEKACAWIQRmuZTsoU9/Llq6CB9/kFQNChzQDwUCYr12 DAIbDAAKCRB/kFQNChzQD/XaC/9MnvmPi8keFJggOg28v+r42P7UQtQ9D3LJMgj3OTzBN2as v20Ju09/rj+gx3u7XofHBUj6BsOLVCWjIX52hcEEg+Bzo3uPZ3apYtIgqfjrn/fPB0bCVIbi 0hAw6W7Ygt+T1Wuak/EV0KS/If309W4b/DiI+fkQpZhCiLUK7DrA97xA1OT1bJJYkC3y4seo 0VHOnZTpnOyZ+8Ejs6gcMiEboFHEEt9P+3mrlVJL/cHpGRtg0ZKJ4QC8UmCE3arzv7KCAc+2 dRDWiCoRovqXGE2PdAW8788qH5DEXnwfzDhnCQ9Eot0Eyi41d4PWI8TWZFi9KzGXJO82O9gW 5SYuJaKzCAgNeAy3gUVUUPrUsul1oe2PeWMFUhWKrqko0/Qo4HkwTZY6S16drTMncoUahSAl X4Z3BbSPXPq0v1JJBYNBL9qmjULEX+NbtRd3v0OfB5L49sSAC2zIO8S9Cufiibqx3mxZTaJ1 ZtfdHNZotF092MIH0IQC3poExQpV/WBYFAI= In-Reply-To: <20260225051303.91614-6-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2/24/26 9:13 PM, Philippe Mathieu-Daudé wrote: > Code in accel/ aims to be target-agnostic. Enforce that > by moving the MSHV file units to system_ss[], which is > target-agnostic. > > Signed-off-by: Philippe Mathieu-Daudé > --- > accel/xen/meson.build | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Pierrick Bouvier From xen-devel-bounces@lists.xenproject.org Wed Feb 25 23:55:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 25 Feb 2026 23:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241134.1542316 (Exim 4.92) (envelope-from ) id 1vvOiT-0001gJ-4S; Wed, 25 Feb 2026 23:54:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241134.1542316; Wed, 25 Feb 2026 23:54:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvOiT-0001gA-1M; Wed, 25 Feb 2026 23:54:53 +0000 Received: by outflank-mailman (input) for mailman id 1241134; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772063682; bh=yPy12zc4UT/9IGd37Ke3EDqkNAhEgrZTHrp39HK2zhQ=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=nfDQHxIwRzrEunr5AtByS7RhUbrmAhX2uD9PMvTbuP8539ydakB4Pc/T+CKxDb2SH JkjBGnc96c6lkSYpSkjiAznOHedirpSIfbNRAOOIRGr9XQlYyQx6uTSinW2z/iVWnM sOUaEJiah9MAmV3coDNGTAZdwXSJbGl0Vtj/rAGKTLCQ4vegIRtws8WaTmPVBw4gr8 z20m1uFDjUNdmd0Ukh/n9RtcBFNeWkb7EAkffiR/4BiiM/8CkoxjbyVBHgWfnelMco ObGLgyoHDdJRVFUctEDf0jpARJZlUBhoZkhbsAifit0vCM8hCrhDSaXgp6u82TGTTQ a4aUFxjMkQTZA== Date: Wed, 25 Feb 2026 15:54:35 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: anthony.perard@vates.tech cc: dmukhin@ford.com, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org Subject: Re: [PATCH v5] xen/domain: introduce DOMID_ANY In-Reply-To: Message-ID: References: <20260205235126.3764953-1-dmukhin@ford.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Anthony, we need to tools ack for this patch On Tue, 17 Feb 2026, Stefano Stabellini wrote: > On Thu, 5 Feb 2026, dmukhin@ford.com wrote: > > From: Denis Mukhin > > > > Add a new symbol DOMID_ANY to improve the readability of the code. > > > > Update all relevant domid_alloc() call sites and harden the domid_alloc() > > input value check. > > > > Also, fix problem with passing invalid domain IDs in > > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > > uses 0xffff as domain ID. > > > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > > Signed-off-by: Denis Mukhin > > > Reviewed-by: Stefano Stabellini > From xen-devel-bounces@lists.xenproject.org Thu Feb 26 00:51:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 00:51:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241155.1542325 (Exim 4.92) (envelope-from ) id 1vvPbE-00014c-Aq; Thu, 26 Feb 2026 00:51:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241155.1542325; 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Thu, 26 Feb 2026 00:51:09 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3ece1548-12ad-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772067070; bh=YpoO7+WqUpj23I2uK3HJRQ6WPlvGWMO4/6QPq+Txpgs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=or23EY0klUPaK8yqmz4ektdXHAkW+15w+MwKFTMN3H1uszg3DMMkQjRxqyoukq5iF LEhkE+5b1kWRBDfrPI5a3vTRv+7oHE1XhMOu3Q+lrq+qI45QGN06UvBR9mDO7c7rnh XN5zRMETZsSMKuKiskhKCwvDmzHsPcO8hyzdRdCMPcNDnUX0MK7MFuid3V3guby9Tl cf839BmmnHExMNJ8eca9kdA5/MISlU2om6+FdX/YPBSwXuLUWgeQMF6+JcGZle1lr8 53Pm8038IH+2mnjAYVbV4kbU62Qbsbq9q7GrdF3yZeJEpgXBAa5tVeyN4Mk6zCxDRz 76ihnzaL7SylA== Date: Wed, 25 Feb 2026 16:51:08 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: dmukhin@ford.com, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org Subject: Re: [PATCH v3 0/5] tools/tests: test harness fragment In-Reply-To: <5b0be132-07f1-4d7b-92ac-2b1d9c4db408@suse.com> Message-ID: References: <20260213024952.3270112-1-dmukhin@ford.com> <5b0be132-07f1-4d7b-92ac-2b1d9c4db408@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 17 Feb 2026, Jan Beulich wrote: > On 13.02.2026 03:49, dmukhin@ford.com wrote: > > This series introduces the use of a new common unit test fragment across > > several existing unit tests. > > > > Patch 1 contains assorted fixups for the domid Makefile. > > Patch 2 adds a new fragment for auto-generating test harness dependencies. > > Patch 3 adds some prerequisite changes for vPCI test (patch 4). > > Patch 4 switches the vPCI unit test to the new common fragment. > > Patch 5 switches the PDX unit test to the new common fragment. > > > > [1] Link to v2: https://lore.kernel.org/xen-devel/20260111041145.553673-1-dmukhin@ford.com/ > > [2] CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323352235 > > > > Denis Mukhin (5): > > tests: fixup domid make fragment > > tests: use unit test fragment in domid test > > xen/include: customize headers for host builds > > tests: use unit test fragment in vPCI test > > tests: use unit test fragment in PDX test > > I remain unconvinced of this attempt to generalize things. Yes, it eliminates > some redundancy, but at the same time some of the new constructs are harder > to read / follow. Perhaps it would help if smaller pieces were abstracted out > first / incrementally. I don't think breaking it down further would help, it is already in pretty small pieces. At least, I cannot think of a way that breaking it down would make a difference. Do you have something specific in mind? Also, I appreciate you being unconvinced about this series, but now it leaves me in a bit of limbo. I am fine with this series going in -- should I continue reviewing it regardless? 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pr=C Message-ID: Date: Wed, 25 Feb 2026 21:50:27 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/vpci: zero guest-visible BAR addresses to ensure domU asssigns its own To: Jan Beulich , Ariadne Conill CC: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Steven Noonan , References: <20260224231216.6203-1-ariadne@ariadne.space> <2aef1aab-f1f4-4063-8c61-d26ae335d06f@suse.com> Content-Language: en-US From: Stewart Hildebrand In-Reply-To: <2aef1aab-f1f4-4063-8c61-d26ae335d06f@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DB:EE_|BL3PR12MB6425:EE_ X-MS-Office365-Filtering-Correlation-Id: c28d5ab9-bd53-45c6-915d-08de74e1c7dc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: njrkWHIbwLxG+iaS0Ft7ZbcalMnBMRpC/f3jF0wrMyLYkYkbel+NWWB8wG/VYyeJT02Ej90QIc1MCJuT9nm+nyljgo7uzyDpAF3NIaLBbVaG9FWQALQeZJgoeR70TVAUoPwyABIiRO6+onRvcqAaJjVd0gLdxbK1z/k8g8UPdMzfeFwvjIFuPy2XK1KR+jCs2XqB2h7buOl4AOjCmY/7g1cHNGjQSFIrESyKbPGw83BFKnR/A5MnGNoF834SQT0GzanZdpHODbGs5vqK/6BDFp31TwaAn1gATUwfuqARfos3L0v7Ccwr80rQLj1jrg0lUSjN7h9t+S89rNIXE1kZsLnNoKZL2fBHa02uwZjn3aU5GeAyIFs7ZdO+aKq8phTxoWPwIfq93i4J8DF1U5G3lkvsz0aMpz0J1nwHv5R+Wr4EMf9er4ZGapSDvz3GU24x90Kvc6quBl5MwFXYPpr0K0ssyViV33WTyyAjJhHx7Z1IyZwzmja+2HsDELLrQpMYbKBuMw1Elu/7TD+3bAwl7bVolbJ7bZSuG6vQu39SihYD3+mB/7qm7VQ76ahNagKwxc9HbYBVWMjq5K42kp6O5iDxx0BgVpDKqlKqdaaooi7N/6WrTC1IdnIlAFs6780PlqxXtv316+Ei5L9/g4n4glVrR2XhIBdlS4u2qnKLLZ1m+l5j2VRZ1OV2+7qWxwPBjTBMhcQMU1JK/ljRk92Uw8Qj4N3iKQcajsVO81Hhl2fxJO5bUblWPQlJbsqJ77d74+1T0fzIGJK8YibWCVnE2JqLLKDTBovACcTrLkXxmhLRS/odt9/H92QQshtB0duZaI2tg2ogqnKcmbTswclcMg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1i1E+HVzQNyYnUm1/zGMSKeuE1G/9fQZK/j8puz7+b2bnay4Usoi4eFRysokVOKlVmYVLXHn76h1eJ06IkXml1d/nnpe3hAqQJCoC5miB3xmde+7kcyRbwcIYDRZTcRTT6nowetWABxC5NSvKUK6olxE2J3mZLb4/4YeNa2N3SfPuLWijtIr2GN1rdAVpeU6/p2HZP0j+3OEPUvpCdIil66OrYQ7PFXiKye+ErvbdpVtSgpXaLfMeosPvgzoxvV8KR+yGXQ8STEH9DMMRUXq4rcQTTSoZSggawe94hAxjuu5e1QdqTMol6PmNx06FgMk51mjn8xPSDhamsM0qLjffWVhn79I4eng5GjQbgub4XT+esQN164Wpvk9v4syyQqhnAL+wWH+IvUtVs3Tmiw4Kqcyhzj5rHTlyjfyDT4Ebf4ANo4b7x4BQM6Ixfekphoa X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2026 02:50:20.1887 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c28d5ab9-bd53-45c6-915d-08de74e1c7dc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6425 On 2/25/26 10:37, Jan Beulich wrote: > On 25.02.2026 00:12, Ariadne Conill wrote: >> From: Steven Noonan >> >> If we just use the host's BAR addresses, the domU might not attempt to >> reconfigure the BAR ranges and may never try to map them with the IOMMU. >> Zeroing them ensures the guest kernel knows the BARs are not configured >> and needs to make its own choices about where to map the BARs. > > Yet for this, don't we first need to expose a full topology to the guest, > i.e. at least a host bridge, and maybe further bridges? While we eventually do want to expose (a) virtual bridge(s) to vPCI domUs (this work is currently in development), I don't think it's pre-requisite for the code change herein: clearly, leaking host BAR addresses to domUs isn't right, and there's no need to wait to address that. With that said, the commit title/description don't align well with the code change. Assuming we want to move the code change forward, for v2 of the patch I suggest dropping the 2nd half of the title, and reworking the commit description to focus on describing the code change at hand and less on what the domU might do. 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In particular, memory decoding might be disabled and the BARs might be zeroed. In this case, the BARs will not be mapped in p2m. However, vpci_make_msix_hole() unconditionally attempts to punch holes in p2m, leading to init_msix() failing: (XEN) d0v0 0000:01:00.0: existing mapping (mfn: 1c1880 type: 0) at 0 clobbers MSIX MMIO area (XEN) d0 0000:01:00.0: init legacy cap 17 fail rc=-17, mask it vpci_make_msix_hole() should only attempt to punch holes if the BARs containing the MSI-X/PBA tables are mapped in p2m. Introduce a helper for checking if a BAR is enabled, and add a check for the situation inside vpci_make_msix_hole(). As a result of the newly introduced checks in vpci_make_msix_hole(), move the call to vpci_make_msix_hole() within modify_decoding() to after setting ->enabled. Fixes: ee2eb6849d50 ("vpci: Refactor REGISTER_VPCI_INIT") Signed-off-by: Stewart Hildebrand --- Pipeline: https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2347521688 v2->v3: * move check inside loop * slightly reword commit message v2: https://lore.kernel.org/xen-devel/20260224025626.26909-1-stewart.hildebrand@amd.com/T/#t v1->v2: * new title, was ("vpci/msix: conditionally invoke vpci_make_msix_hole") * move BAR enabled check to inside vpci_make_msix_hole() * introduce vmsix_table_bar_valid() helper * move vpci_make_msix_hole() call within modify_decoding() to after setting ->enabled * split typo fixup to separate patch v1: https://lore.kernel.org/xen-devel/20250812151744.460953-1-stewart.hildebrand@amd.com/T/#t --- xen/drivers/vpci/header.c | 26 +++++++++++++------------- xen/drivers/vpci/msix.c | 3 +++ xen/include/xen/vpci.h | 6 ++++++ 3 files changed, 22 insertions(+), 13 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 739a5f610e91..6a28e07a625b 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -122,19 +122,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, bool map = cmd & PCI_COMMAND_MEMORY; unsigned int i; - /* - * Make sure there are no mappings in the MSIX MMIO areas, so that accesses - * can be trapped (and emulated) by Xen when the memory decoding bit is - * enabled. - * - * FIXME: punching holes after the p2m has been set up might be racy for - * DomU usage, needs to be revisited. - */ -#ifdef CONFIG_HAS_PCI_MSI - if ( map && !rom_only && vpci_make_msix_hole(pdev) ) - return; -#endif - for ( i = 0; i < ARRAY_SIZE(header->bars); i++ ) { struct vpci_bar *bar = &header->bars[i]; @@ -164,6 +151,19 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, bar->enabled = map; } + /* + * Make sure there are no mappings in the MSIX MMIO areas, so that accesses + * can be trapped (and emulated) by Xen when the memory decoding bit is + * enabled. + * + * FIXME: punching holes after the p2m has been set up might be racy for + * DomU usage, needs to be revisited. + */ +#ifdef CONFIG_HAS_PCI_MSI + if ( map && !rom_only && vpci_make_msix_hole(pdev) ) + return; +#endif + if ( !rom_only ) { pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index eaf8fae970f8..3efdd520e4bd 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -605,6 +605,9 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) + vmsix_table_size(pdev->vpci, i) - 1); + if ( !vmsix_table_bar_valid(pdev->vpci, i) ) + continue; + for ( ; start <= end; start++ ) { p2m_type_t t; diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index d6310104ea17..8ce730791080 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -267,6 +267,12 @@ static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr) (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK); } +static inline bool vmsix_table_bar_valid(const struct vpci *vpci, + unsigned int nr) +{ + return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].enabled; +} + /* * Note regarding the size calculation of the PBA: the spec mentions "The last * QWORD will not necessarily be fully populated", so it implies that the PBA base-commit: 70c47ec5d65fa985ef7becd74b2d7b6d744b4c97 -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 03:33:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 03:33:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241207.1542356 (Exim 4.92) (envelope-from ) id 1vvS7h-0003D3-Sc; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5dNPA6jZheZUSkFRLWR0/a3enbYkntzpQERNBBdV7jtnT4GdZh9pebC01VsBUvy2pL8pQeITln9mlFPlluPvLazIbEuw1V0WskhJATR6cxfM7MmofAMF7oo7JEzypxJc5bAIdncI62rLarltJMVDhPjLjTTkFu5BLOZx7DwbmxjltrxAk25RncsK8+NIn4hFgeBTXARJ+2QWaZW3687A+FGVy8IXinmVu+9zQcxZebAQ1pHdr7piUFevql3GAP8jb2/Ely+HZm7ViiSnnbniEAW3nhxloexcG3XCOnu9NbVqB5uKGZ1N7yU48U+0wjo/hOUTvjjF+6XFsj9gygVNgCE1TXSxuyRwyvcqygZwS6tgvklq0PEImScafl8hA3blRiPNZ0zqK2KHIkkJn3QGAPyxAVzjz8VAkN/P0rxoS0GsP13vEXZ+Or1hXHBT0GYR X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2026 03:32:59.9476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 52524fe1-f4da-4126-a417-08de74e7bd9f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000208.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8499 On 2/25/26 06:43, Jan Beulich wrote: > Before adding more private stuff to xen/vpci.h, split it up. In order to > be able to include the private header first in a CU, the per-arch struct > decls also need to move (to new asm/vpci.h files). > > While adjusting the test harness'es Makefile, also switch the pre-existing > header symlink-ing rule to a pattern one. > > Apart from in the test harness code, things only move; no functional > change intended. > > Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand From xen-devel-bounces@lists.xenproject.org Thu Feb 26 07:02:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 07:02:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241258.1542366 (Exim 4.92) (envelope-from ) id 1vvVNf-0001vU-2q; Thu, 26 Feb 2026 07:01:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241258.1542366; Thu, 26 Feb 2026 07:01:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvVNe-0001vN-Vr; Thu, 26 Feb 2026 07:01:50 +0000 Received: by outflank-mailman (input) for mailman id 1241258; Thu, 26 Feb 2026 07:01:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvVNd-0001vG-EL for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 07:01:49 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ff7f4866-12e0-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 08:01:39 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-483770e0b25so4438515e9.0 for ; Wed, 25 Feb 2026 23:01:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 25 Feb 2026 23:01:38 -0800 (PST) Message-ID: Date: Thu, 26 Feb 2026 08:01:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/5] tools/tests: test harness fragment To: Stefano Stabellini Cc: dmukhin@ford.com, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, xen-devel@lists.xenproject.org References: <20260213024952.3270112-1-dmukhin@ford.com> <5b0be132-07f1-4d7b-92ac-2b1d9c4db408@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.02.2026 01:51, Stefano Stabellini wrote: > On Tue, 17 Feb 2026, Jan Beulich wrote: >> On 13.02.2026 03:49, dmukhin@ford.com wrote: >>> This series introduces the use of a new common unit test fragment across >>> several existing unit tests. >>> >>> Patch 1 contains assorted fixups for the domid Makefile. >>> Patch 2 adds a new fragment for auto-generating test harness dependencies. >>> Patch 3 adds some prerequisite changes for vPCI test (patch 4). >>> Patch 4 switches the vPCI unit test to the new common fragment. >>> Patch 5 switches the PDX unit test to the new common fragment. >>> >>> [1] Link to v2: https://lore.kernel.org/xen-devel/20260111041145.553673-1-dmukhin@ford.com/ >>> [2] CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2323352235 >>> >>> Denis Mukhin (5): >>> tests: fixup domid make fragment >>> tests: use unit test fragment in domid test >>> xen/include: customize headers for host builds >>> tests: use unit test fragment in vPCI test >>> tests: use unit test fragment in PDX test >> >> I remain unconvinced of this attempt to generalize things. Yes, it eliminates >> some redundancy, but at the same time some of the new constructs are harder >> to read / follow. Perhaps it would help if smaller pieces were abstracted out >> first / incrementally. > > I don't think breaking it down further would help, it is already in > pretty small pieces. At least, I cannot think of a way that breaking it > down would make a difference. Do you have something specific in mind? See Edwin's series moving in effectively the same direction. > Also, I appreciate you being unconvinced about this series, but now it > leaves me in a bit of limbo. I am fine with this series going in -- > should I continue reviewing it regardless? Hard to say. Maybe take a look at Edwin's first? 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Wed, 25 Feb 2026 23:45:56 -0800 (PST) Message-ID: <4dfd042c-2d33-4202-94f5-83b174a2e894@suse.com> Date: Thu, 26 Feb 2026 08:45:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/mm: Remove claim that INVALID_{MFN,GFN}_INITIALIZER is for older toolchains To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Xen-devel References: <20260225125940.3804137-1-andrew.cooper3@citrix.com> <46a711cb-1853-44f6-a9a5-4d6252a8a995@suse.com> <63ee91a5-914c-4a09-9ef7-1e55beedb3e3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <63ee91a5-914c-4a09-9ef7-1e55beedb3e3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 25.02.2026 17:35, Andrew Cooper wrote: > On 25/02/2026 2:34 pm, Jan Beulich wrote: >> On 25.02.2026 13:59, Andrew Cooper wrote: >>> This was never because of a bug in GCC. >>> >>> C requires that static objects are initialised with constant expressions; >>> _mfn(), as a static inline, is not and cannot be made to be. >> Of course, and I think the comments were meant differently. What wasn't possible >> to use (with -std=gnu99) due to the referenced bug is apparently >> >> #define INVALID_GFN ((gfn_t){ ~0UL }) >> >> Now that gcc5 is our baseline, do we perhaps want to use that and do away with >> INVALID_GFN_INITIALIZER? > > Oh.  Yeah that's very much not what the comment suggested. > > Changing like that almost works, but there's one snag.  common/memory.c has > >     BUILD_BUG_ON(INVALID_GFN_RAW + 1); > > and with the _RAW constant wanting to go, the obvious: > >     BUILD_BUG_ON(gfn_x(INVALID_GFN) + 1); > > doesn't compile as it's no longer a constant expression. > > It's not clear what to do here.  I don't think we want to keep > INVALID_GFN_RAW around for just this, but nor am I completely happy > dropping the BUILD_BUG_ON() either. One option may be to have separate forms for release and debug builds, with the debug one open-coding gfn_x. Except that this doesn't work: In BUILD_BUG_ON(INVALID_GFN._gfn + 1); the expression is a constant-expression, but not an integer constant expression. Hence the next "best" thing I can think of is if ( gfn_x(INVALID_GFN) + 1 ) BUILD_ERROR("bad INVALID_GFN"); It's not quite clear to me whether it would be worthwhile to abstract this further, e.g. by introducing BUILD_{ERROR,BUG}_IF(). If so, perhaps we would want to spell out somewhere that BUILD_BUG_ON() is to be preferred whenever it's usable. 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Wed, 25 Feb 2026 23:47:54 -0800 (PST) Message-ID: Date: Thu, 26 Feb 2026 08:47:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/vpci: zero guest-visible BAR addresses to ensure domU asssigns its own To: Stewart Hildebrand , Ariadne Conill Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Steven Noonan , xen-devel@lists.xenproject.org References: <20260224231216.6203-1-ariadne@ariadne.space> <2aef1aab-f1f4-4063-8c61-d26ae335d06f@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.02.2026 03:50, Stewart Hildebrand wrote: > On 2/25/26 10:37, Jan Beulich wrote: >> On 25.02.2026 00:12, Ariadne Conill wrote: >>> From: Steven Noonan >>> >>> If we just use the host's BAR addresses, the domU might not attempt to >>> reconfigure the BAR ranges and may never try to map them with the IOMMU. >>> Zeroing them ensures the guest kernel knows the BARs are not configured >>> and needs to make its own choices about where to map the BARs. >> >> Yet for this, don't we first need to expose a full topology to the guest, >> i.e. at least a host bridge, and maybe further bridges? > While we eventually do want to expose (a) virtual bridge(s) to vPCI domUs (this > work is currently in development), I don't think it's pre-requisite for the code > change herein: clearly, leaking host BAR addresses to domUs isn't right, and > there's no need to wait to address that. > > With that said, the commit title/description don't align well with the code > change. Assuming we want to move the code change forward, for v2 of the patch I > suggest dropping the 2nd half of the title, and reworking the commit description > to focus on describing the code change at hand and less on what the domU might > do. That would indeed work for me. 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Misra C:2012 rule 20.6 disallows this altogether, though. Combine the fix with some tidying: Fold the two level-1 checks, adjust in particular comment style, and move the unlikely() use to a single inner part of the conditional. No functional change intended. Reported-by: Andrew Cooper Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -634,35 +634,36 @@ _sh_propagate(struct vcpu *v, sflags |= _PAGE_UC; } - // protect guest page tables - // - if ( unlikely((level == 1) - && sh_mfn_is_a_page_table(target_mfn) -#if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC ) - /* Unless the page is out of sync and the guest is - writing to it. */ - && !(mfn_oos_may_write(target_mfn) - && (ft == ft_demand_write)) -#endif /* OOS */ - ) ) - sflags &= ~_PAGE_RW; - - /* - * shadow_mode_log_dirty support - * - * Only allow the guest write access to a page a) on a demand fault, - * or b) if the page is already marked as dirty. - * - * (We handle log-dirty entirely inside the shadow code, without using the - * p2m_ram_logdirty p2m type: only HAP uses that.) - */ - if ( level == 1 && unlikely(paging_mode_log_dirty(d)) && !mmio_mfn ) + if ( level == 1 ) { - if ( ft & FETCH_TYPE_WRITE ) - paging_mark_dirty(d, target_mfn); - else if ( (sflags & _PAGE_RW) && - !paging_mfn_is_dirty(d, target_mfn) ) + /* Protect guest page tables. */ + if ( unlikely(sh_mfn_is_a_page_table(target_mfn)) +#if SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC + /* + * Unless the page is out of sync and the guest is writing to it. + */ + && (ft != ft_demand_write || !mfn_oos_may_write(target_mfn)) +#endif /* OOS */ + ) sflags &= ~_PAGE_RW; + + /* + * shadow_mode_log_dirty support + * + * Only allow the guest write access to a page a) on a demand fault, + * or b) if the page is already marked as dirty. + * + * (We handle log-dirty entirely inside the shadow code, without using + * the p2m_ram_logdirty p2m type: only HAP uses that.) + */ + if ( unlikely(paging_mode_log_dirty(d)) && !mmio_mfn ) + { + if ( ft & FETCH_TYPE_WRITE ) + paging_mark_dirty(d, target_mfn); + else if ( (sflags & _PAGE_RW) && + !paging_mfn_is_dirty(d, target_mfn) ) + sflags &= ~_PAGE_RW; + } } // PV guests in 64-bit mode use two different page tables for user vs From xen-devel-bounces@lists.xenproject.org Thu Feb 26 09:01:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 09:01:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241323.1542405 (Exim 4.92) (envelope-from ) id 1vvXFn-0001EZ-6Y; Thu, 26 Feb 2026 09:01:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241323.1542405; Thu, 26 Feb 2026 09:01:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvXFn-0001ES-3t; Thu, 26 Feb 2026 09:01:51 +0000 Received: by outflank-mailman (input) for mailman id 1241323; Thu, 26 Feb 2026 09:01:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvXFm-0001EM-50 for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 09:01:50 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c7f5c472-12f1-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 10:01:47 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4836d4c26d3so3937285e9.2 for ; Thu, 26 Feb 2026 01:01:47 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 26 Feb 2026 01:01:47 -0800 (PST) Message-ID: <7af56fa6-4254-4704-9843-a0d099e6bb0b@suse.com> Date: Thu, 26 Feb 2026 10:01:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] domain: use unsigned loop induction variable in complete_domain_destroy() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Using plain (signed) int variables as array indexes can be unhelpful on at least x86, where the compiler may see the need to insert sign-extension insns (strictly speaking it should be able to avoid that when the loop continuation condition says >= 0, but that's not generally the case even with gcc15). Observed effects with gcc15 (will of course vary with compiler version and level of optimization): - on x86, one less preserved register in use, yet due to sub-optimal choice of register variables still a small code size increase (%r12 isn't a good choice when it's used for base-without-index addressing, as it requires a SIB byte which other registers wouldn't require), - on Arm64 code size decreases, albeit that's eaten up by padding which is being inserted ahead of a few labels, - on Arm32 code size increases for a reason I didn't fully understand (my ability to read Arm assembly is still somewhat limited). Signed-off-by: Jan Beulich --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1475,7 +1475,7 @@ static void cf_check complete_domain_des { struct domain *d = container_of(head, struct domain, rcu); struct vcpu *v; - int i; + unsigned int i; /* * Flush all state for the vCPU previously having run on the current CPU. @@ -1485,7 +1485,7 @@ static void cf_check complete_domain_des */ sync_local_execstate(); - for ( i = d->max_vcpus - 1; i >= 0; i-- ) + for ( i = d->max_vcpus; i-- > 0; ) { if ( (v = d->vcpu[i]) == NULL ) continue; @@ -1511,7 +1511,7 @@ static void cf_check complete_domain_des xfree(d->vm_event_share); #endif - for ( i = d->max_vcpus - 1; i >= 0; i-- ) + for ( i = d->max_vcpus; i-- > 0; ) if ( (v = d->vcpu[i]) != NULL ) vcpu_destroy(v); From xen-devel-bounces@lists.xenproject.org Thu Feb 26 10:04:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 10:04:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241364.1542415 (Exim 4.92) (envelope-from ) id 1vvYEK-0000Go-KD; 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Since the SSTC extension is not supported by Xen, an emulated (SBI-based) timer is required. To address this, a virtual timer built on Xen’s timer infrastructure is introduced, with save/restore support and SBI-based programming. To provide full guest software–based timer support, the following components are also introduced: - arch_vcpu_{create,destroy}() to initialize the virtual timer and other vCPU-related state not directly tied to timer functionality. As part of this work, struct arch_vcpu is introduced to describe the internal state of a virtual CPU, along with vcpu_csr_init() to initialize the relevant CSR state. - Support functions required by the virtual timer, including: - vcpu_kick(), and a stub implementation of smp_send_event_check_mask() (since SMP is not yet supported in Xen), which is used by vcpu_kick(). - Support for guest timer programming via interception of the SBI legacy SET_TIMER call from guest. - Implement reprogram_timer() using introduced sbi_set_timer(). - Initial lockless tracking of pending vCPU interrupts using atomic bitmaps. - Handling of hypervisor timer interrupts and dispatch into Xen’s generic timer softirq. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2346912647 --- Changes in v6: - Address comments from ML for patch 1 and 3, and minor update of patch 2 because of introduced ro_one sub-struct in patch 1. --- Changes in v5: - Merged to upstream/staging: xen/riscv: implement arch_vcpu_{create,destroy}() xen/riscv: build setup code as .init - Rebase this patch series on top of: https://lore.kernel.org/xen-devel/5756356294dc066d835269334d0f3347fe24cec4.1771504676.git.oleksii.kurochko@gmail.com/T/#u There is no logical dependency, only the potential merge conflict question. - Address comments from ML. --- Changes in v4: - Merged to upstream/staging: xen/riscv: avoid reading hstateen0 when Smstateen is not implemented - Address other comments from ML. --- Changes in v3: - Squash patch "xen/riscv: introduce struct arch_vcpu" into other patches of the patch series. - Merged to staging: - xen/riscv: implement stub for smp_send_event_check_mask() - Address other comments from ML. --- Changes in v2: - Add consumer part of tracking of pending vCPU interrupts. - Split patch "xen/riscv: init tasklet subsystem" to two. - Patches were acked: - xen/riscv: introduce vcpu_kick() implementation - xen/riscv: implement SBI legacy SET_TIMER support for guests - All other changes are patch-specific. Please check them. --- Oleksii Kurochko (14): xen/riscv: detect and store supported hypervisor CSR bits at boot xen/riscv: implement vcpu_csr_init() xen/riscv: introduce tracking of pending vCPU interrupts, part 1 xen/riscv: introduce tracking of pending vCPU interrupts, part 2 xen/time: move ticks<->ns helpers to common code xen/riscv: introduce basic vtimer infrastructure for guests xen/riscv: introduce vcpu_kick() implementation xen/riscv: add vtimer context switch helpers xen/riscv: implement SBI legacy SET_TIMER support for guests xen/riscv: introduce sbi_set_timer() xen/riscv: implement reprogram_timer() via SBI xen/riscv: handle hypervisor timer interrupts xen/riscv: init tasklet subsystem xen/riscv: implement sync_vcpu_execstate() xen/arch/arm/include/asm/time.h | 3 - xen/arch/arm/time.c | 11 - xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 245 +++++++++++++++++++- xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 32 +++ xen/arch/riscv/include/asm/perfc_defn.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/include/asm/sbi.h | 22 ++ xen/arch/riscv/include/asm/setup.h | 2 + xen/arch/riscv/include/asm/time.h | 5 - xen/arch/riscv/include/asm/vtimer.h | 20 ++ xen/arch/riscv/sbi.c | 40 +++- xen/arch/riscv/setup.c | 5 + xen/arch/riscv/stubs.c | 20 -- xen/arch/riscv/time.c | 44 ++++ xen/arch/riscv/traps.c | 20 ++ xen/arch/riscv/vsbi/legacy-extension.c | 6 + xen/arch/riscv/vtimer.c | 86 +++++++ xen/include/xen/time.h | 11 + 22 files changed, 539 insertions(+), 44 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241457.1542534 (Exim 4.92) (envelope-from ) id 1vvZu3-0007cg-PV; Thu, 26 Feb 2026 11:51:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241457.1542534; Thu, 26 Feb 2026 11:51:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu3-0007cW-Kh; Thu, 26 Feb 2026 11:51:35 +0000 Received: by outflank-mailman (input) for mailman id 1241457; Thu, 26 Feb 2026 11:51:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu2-0006E8-93 for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:34 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7ef86abe-1309-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 12:51:33 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-483770e0b25so7370705e9.0 for ; Thu, 26 Feb 2026 03:51:33 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The virtual timer is programmed in response to the guest SBI sbi_set_timer() call and injects a virtual supervisor timer interrupt into the vCPU when it expires. While a dedicated struct vtimer is not strictly required at present, it is expected to become necessary once SSTC support is introduced. In particular, it will need to carry additional state such as whether SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) to be saved and restored across context switches, and time delta state (e.g. HTIMEDELTA) required for use cases such as migration. Introducing struct vtimer now avoids a later refactoring. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - Drop copyright line from asm/vtimer.h. - Add Acked-by: Jan Beulich . --- Changes in v4: - Add vcpu_timer_destroy() to void arch_vcpu_destroy(). --- Changes in v3: - use one container_of() to get vcpu instead of two container_of()s. --- Changes in v2: - Drop domain_vtimer_init() as it does nothing. - Drop "struct vcpu *v;" from struct vtimer as it could be taken from arch_vcpu using container_of(). - Drop vtimer_initialized, use t->status == TIMER_STATUS_invalid instead to understand if timer was or wasn't initialized. - Drop inclusion of xen/domain.h as xen/sched.h already includes it. - s/ xen/time.h/ xen.timer.h in vtimer.c. - Drop ULL in if-conidtion in vtimer_set_timer() as with the cast it isn't necessary to have suffix ULL. - Add migrate timer to vtimer_set_timer() to be sure that vtimer will occur on pCPU it was ran, so the signalling to that vCPU will (commonly) be cheaper. - Check if the timeout has already expired and just inject the event in vtimer_vtimer_set_timer(). - Drop const for ticks argument of vtimer_set_timer(). - Merge two patches to one: - xen/riscv: introduce vtimer - xen/riscv: introduce vtimer_set_timer() and vtimer_expired() --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 10 +++- xen/arch/riscv/include/asm/domain.h | 3 ++ xen/arch/riscv/include/asm/vtimer.h | 17 +++++++ xen/arch/riscv/vtimer.c | 71 +++++++++++++++++++++++++++++ 5 files changed, 100 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index bc47e83b26d7..ffbd7062e214 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,6 +22,7 @@ obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ +obj-y += vtimer.o $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 6988d7032059..56b28750d3aa 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -10,6 +10,7 @@ #include #include #include +#include struct csr_masks { register_t hedeleg; @@ -138,11 +139,14 @@ int arch_vcpu_create(struct vcpu *v) vcpu_csr_init(v); + if ( (rc = vcpu_vtimer_init(v)) ) + goto fail; + /* - * As the vtimer and interrupt controller (IC) are not yet implemented, + * As interrupt controller (IC) is not yet implemented, * return an error. * - * TODO: Drop this once the vtimer and IC are implemented. + * TODO: Drop this once IC is implemented. */ rc = -EOPNOTSUPP; goto fail; @@ -156,6 +160,8 @@ int arch_vcpu_create(struct vcpu *v) void arch_vcpu_destroy(struct vcpu *v) { + vcpu_timer_destroy(v); + vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 5373a498d80b..c0de8612cc25 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -8,6 +8,7 @@ #include #include +#include struct vcpu_vmid { uint64_t generation; @@ -49,6 +50,8 @@ struct arch_vcpu { struct cpu_info *cpu_info; + struct vtimer vtimer; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h new file mode 100644 index 000000000000..111863610a92 --- /dev/null +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM__RISCV__VTIMER_H +#define ASM__RISCV__VTIMER_H + +#include + +struct vtimer { + struct timer timer; +}; + +int vcpu_vtimer_init(struct vcpu *v); +void vcpu_timer_destroy(struct vcpu *v); + +void vtimer_set_timer(struct vtimer *t, uint64_t ticks); + +#endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c new file mode 100644 index 000000000000..32d142bcdfcd --- /dev/null +++ b/xen/arch/riscv/vtimer.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include + +static void vtimer_expired(void *data) +{ + struct vtimer *t = data; + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + + vcpu_set_interrupt(v, IRQ_VS_TIMER); +} + +int vcpu_vtimer_init(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + init_timer(&t->timer, vtimer_expired, t, v->processor); + + return 0; +} + +void vcpu_timer_destroy(struct vcpu *v) +{ + struct vtimer *t = &v->arch.vtimer; + + if ( t->timer.status == TIMER_STATUS_invalid ) + return; + + kill_timer(&v->arch.vtimer.timer); +} + +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) +{ + struct vcpu *v = container_of(t, struct vcpu, arch.vtimer); + s_time_t expires = ticks_to_ns(ticks - boot_clock_cycles); + + vcpu_unset_interrupt(v, IRQ_VS_TIMER); + + /* + * According to the RISC-V sbi spec: + * If the supervisor wishes to clear the timer interrupt without + * scheduling the next timer event, it can either request a timer + * interrupt infinitely far into the future (i.e., (uint64_t)-1), + * or it can instead mask the timer interrupt by clearing sie.STIE CSR + * bit. + */ + if ( ticks == ((uint64_t)~0) ) + { + stop_timer(&t->timer); + + return; + } + + if ( expires < NOW() ) + { + /* + * Simplify the logic if the timeout has already expired and just + * inject the event. + */ + stop_timer(&t->timer); + vcpu_set_interrupt(v, IRQ_VS_TIMER); + + return; + } + + migrate_timer(&t->timer, smp_processor_id()); + set_timer(&t->timer, expires); +} -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241453.1542494 (Exim 4.92) (envelope-from ) id 1vvZty-0006fg-9d; Thu, 26 Feb 2026 11:51:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241453.1542494; Thu, 26 Feb 2026 11:51:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZty-0006fZ-77; Thu, 26 Feb 2026 11:51:30 +0000 Received: by outflank-mailman (input) for mailman id 1241453; Thu, 26 Feb 2026 11:51:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZtx-0006EH-6A for xen-devel@lists.xenproject.org; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd68826asm220079295e9.0.2026.02.26.03.51.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Feb 2026 03:51:25 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7b62d24c-1309-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1772106686; x=1772711486; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mjWgFbv6nb7y5dLkGr2P5tKeDiy8GNkU4xO5G3VBP8c=; b=MBtGR8KDxfg18JepBfQo1A0LcxujEdFRM+/zs5i9nGmj7KTyTwQsaIrEZYY21Cnqke Aj94WesKr6p/k2ywn/LgAa7VwrkXJ1TVKwUr6sfW8no5gZGGK6DX+QkZByr5NRXNkc+T P+iqItUIMTW6aC8uo4PojkTFHN1dc7UES88Doq9UQJ0KOOJnaONeowWXWCmG1BW/LIYV 0NbTB1SeBVJ90vREk9s78olkIHPFCGnIYP4cOeVhjTAjLCWkjfaAT/7mJJxgEu9QW4Hg ls61i0f389J6Wtakard/c3Cav+c5nrsWPFPvTNDE6KQM/9zYsbxCX6Jo8BPsZk9oDU0I o5zA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772106686; x=1772711486; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mjWgFbv6nb7y5dLkGr2P5tKeDiy8GNkU4xO5G3VBP8c=; b=QoUVzCjOcSx2SAwSIjWJ4wrWvRn07Lai4fbhKiKEkwXHL2kbN8NsMHSDYVlkuq3/2m t+vbOAGm7QuDvEW2kAb2NHxTMCy9fMPN3Qup9wYH08GcLHncQsQGn8Pmwd7e0WYfShAM QqvmKbFhx6HOm3Ih62DcNVWhlTyJujwwmXpD+162k3Cy9q6fw4q9PAh6FaHvpd1Agxrb aI8iac8KZ+Hd8mwZ+5ChzxqyWxvT/3XEIH41WymHjDpL/bxIpCRsNRAKl//hUMlK1mt7 zL+mu3PSdEse0zMxMQUiocgEbnjjIH0+8kzHFTTtiOfv38oO9M3Hqe44/HWLSydAhb5b ye9A== X-Gm-Message-State: AOJu0YxzQb6JevxbG6N03Umu2yt504FvSPqgFlRj12fHDh1JAIQy8X4K jWdpdNGQA9kqCo2I4d1pWhQ1Qdvf4EpUdZJRQuXjB5U7NEi9lIll/43r/31EmA== X-Gm-Gg: ATEYQzyKWU7dDI1bAe59lIQJuzxxm6DHUI6yAGTPxqWAffsfq1XyJO1Ocgp4OBk+8S0 JiDEng+7UHxrRbyIzji8mxOMkHQDYJNr526Gox/m/Up3o8U7U4ZaBpRymxzz/LJB9m/OU+3wwTq wn2iod8KCLRcvVYKzDwV76weGCOTa8j4T2TzF62+KdkwdoBtJy7XzhMfiy1khuGFFx73Rz79Z/0 9BW+r6v2hmWY6mSdl8I9YmB525biLupEJDrTIc3UclyytxDFKRNxD+9ronem7VUKEQNydfKn0jF jJ9GZkJE+Gp3cHOrsSd4v6h2mNnj16WU63I4pcSxMzBrAwWG9+t0vY8TLwgwZolUSDccYkdzQHk q8PIYZ5VQ2yXTbz1sHYUtnSCtb9CH2Q2Q6ahW9HlY0XB2yB0a7oUmndrFcrtocjrJdJR4ZfM+Jn MSNGqRUzzmfndeaQdaZ3rCr+o2cQlrhrU2yH2kO3wX3mIjkC0WPYod+4eSHxtyUqLl1luAeu/tx LA0 X-Received: by 2002:a05:600c:8708:b0:483:a922:2e8d with SMTP id 5b1f17b1804b1-483c216ab55mr57961995e9.4.1772106685950; Thu, 26 Feb 2026 03:51:25 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v6 02/14] xen/riscv: implement vcpu_csr_init() Date: Thu, 26 Feb 2026 12:51:02 +0100 Message-ID: <9694ff5787d5f162581a16f0974ac9a55c538019.1772016457.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce vcpu_csr_init() to initialise hypervisor CSRs that control vCPU execution and virtualization behaviour before the vCPU is first scheduled. The function configures trap and interrupt delegation to VS-mode by setting the appropriate bits in the hedeleg and hideleg registers, initializes hstatus so that execution enters VS-mode when control is passed to the guest, and restricts guest access to hardware performance counters by initializing hcounteren, as unrestricted access would require additional handling in Xen. When the Smstateen and SSAIA extensions are available, access to AIA CSRs and IMSIC guest interrupt files is enabled by setting the corresponding bits in hstateen0, avoiding unnecessary traps into Xen (note that SVSLCT(Supervisor Virtual Select) name is used intead of CSRIND as OpenSBI uses such name and riscv_encoding.h is mostly based on it). If the Svpbmt extension is supported, the PBMTE bit is set in henvcfg to allow its use for VS-stage address translation. Guest access to the ENVCFG CSR is also enabled by setting ENVCFG bit in hstateen0, as a guest may need to control certain characteristics of the U-mode (VU-mode when V=1) execution environment. For CSRs that may contain read-only bits (e.g. hedeleg, hideleg, hstateen0), to the written value a correspondent mask is applied to avoid divergence between the software state and the actual CSR contents. As hstatus is not part of struct arch_vcpu (it already resides in struct cpu_user_regs), introduce vcpu_guest_cpu_user_regs() to provide a uniform way to access hstatus and other guest CPU user registers. This establishes a consistent and well-defined initial CSR state for vCPUs prior to their first context switch. Signed-off-by: Oleksii Kurochko --- Changes in V6: - Apply introduced in prev. patch csr_masks.ro_one.hstaten0 in vcpu_csr_init(). --- Changes in v5: - Initialize of hstateen0 with SMSTATEEN0_HSENVCFG when a variable is defined. - Use |= for a code inside if (*_ssaia) case. - Put declaration of the registers hedeleg and hideleg together in arch_vcpu structure as they are typically used together so better chances to be in the same cache line. --- Changes in v4: - Move local variable hstateen0 into narrower scope. - Code style fixes. - Move the call of vcpu_csr_init(v) after if ( is_idle_vcpu() ) check in arcg_vcpu_create(). --- Changes in v3: - Add hypervisor register used to initalize vCPU state. - Apply masks introduced before instead of csr_write()/csr_read() pattern. --- Changes in v2: - As hstatus isn't a part of arch_vcpu structure (as it is already a part of cpu_user_regs) introduce vcpu_guest_cpu_user_regs() to be able to access hstatus and other CPU user regs. - Sort hideleg bit setting by value. Drop a stray blank. - Drop | when the first initialization of hcounteren and hennvcfg happen. - Introduce HEDELEG_DEFAULT. Sort set bits by value and use BIT() macros instead of open-coding it. - Apply pattern csr_write() -> csr_read() for hedeleg and hideleg instead of direct bit setting in v->arch.h{i,e}deleg as it could be that for some reason some bits of hedeleg and hideleg are r/o. The similar patter is used for hstateen0 as some of the bits could be r/o. - Add check that SSAIA is avaialable before setting of SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT bits. - Drop local variables hstatus, hideleg and hedeleg as they aren't used anymore. --- xen/arch/riscv/domain.c | 63 +++++++++++++++++++++ xen/arch/riscv/include/asm/current.h | 2 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/riscv_encoding.h | 2 + 4 files changed, 73 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 902aaac74290..2a81f8d94f9a 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -8,6 +8,7 @@ #include #include +#include struct csr_masks { register_t hedeleg; @@ -20,6 +21,21 @@ struct csr_masks { } ro_one; }; +#define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ + BIT(CAUSE_FETCH_ACCESS, U) | \ + BIT(CAUSE_ILLEGAL_INSTRUCTION, U) | \ + BIT(CAUSE_BREAKPOINT, U) | \ + BIT(CAUSE_MISALIGNED_LOAD, U) | \ + BIT(CAUSE_LOAD_ACCESS, U) | \ + BIT(CAUSE_MISALIGNED_STORE, U) | \ + BIT(CAUSE_STORE_ACCESS, U) | \ + BIT(CAUSE_USER_ECALL, U) | \ + BIT(CAUSE_FETCH_PAGE_FAULT, U) | \ + BIT(CAUSE_LOAD_PAGE_FAULT, U) | \ + BIT(CAUSE_STORE_PAGE_FAULT, U)) + +#define HIDELEG_DEFAULT (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) + static struct csr_masks __ro_after_init csr_masks; void __init init_csr_masks(void) @@ -52,6 +68,51 @@ void __init init_csr_masks(void) } } +static void vcpu_csr_init(struct vcpu *v) +{ + v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg; + + vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP; + + v->arch.hideleg = HIDELEG_DEFAULT & csr_masks.hideleg; + + /* + * VS should access only the time counter directly. + * Everything else should trap. + */ + v->arch.hcounteren = HCOUNTEREN_TM; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svpbmt) ) + v->arch.henvcfg = ENVCFG_PBMTE & csr_masks.henvcfg; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + /* Allow guest to access CSR_SENVCFG */ + register_t hstateen0 = SMSTATEEN0_HSENVCFG; + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + /* + * If the hypervisor extension is implemented, the same three + * bits are defined also in hypervisor CSR hstateen0 but concern + * only the state potentially accessible to a virtual machine + * executing in privilege modes VS and VU: + * bit 60 CSRs siselect and sireg (really vsiselect and + * vsireg) + * bit 59 CSRs siph and sieh (RV32 only) and stopi (really + * vsiph, vsieh, and vstopi) + * bit 58 all state of IMSIC guest interrupt files, including + * CSR stopei (really vstopei) + * If one of these bits is zero in hstateen0, and the same bit is + * one in mstateen0, then an attempt to access the corresponding + * state from VS or VU-mode raises a virtual instruction exception. + */ + hstateen0 |= SMSTATEEN0_AIA | SMSTATEEN0_IMSIC | SMSTATEEN0_SVSLCT; + + v->arch.hstateen0 = (hstateen0 & csr_masks.hstateen0) | + csr_masks.ro_one.hstateen0; + } +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); @@ -74,6 +135,8 @@ int arch_vcpu_create(struct vcpu *v) if ( is_idle_vcpu(v) ) return 0; + vcpu_csr_init(v); + /* * As the vtimer and interrupt controller (IC) are not yet implemented, * return an error. diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 58c9f1506b7c..5fbee8182caa 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -48,6 +48,8 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_cpu_current(cpu) per_cpu(curr_vcpu, cpu) #define guest_cpu_user_regs() ({ BUG_ON("unimplemented"); NULL; }) +#define vcpu_guest_cpu_user_regs(vcpu) \ + (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) #define switch_stack_and_jump(stack, fn) do { \ asm volatile ( \ diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 5aec627a7adb..17be792afe7d 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -49,6 +49,12 @@ struct arch_vcpu { struct cpu_info *cpu_info; + register_t hcounteren; + register_t hedeleg; + register_t hideleg; + register_t henvcfg; + register_t hstateen0; + register_t vsatp; }; diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 1f7e612366f8..dd15731a86fa 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -228,6 +228,8 @@ #define ENVCFG_CBIE_INV _UL(0x3) #define ENVCFG_FIOM _UL(0x1) +#define HCOUNTEREN_TM BIT(1, U) + /* ===== User-level CSRs ===== */ /* User Trap Setup (N-extension) */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241452.1542483 (Exim 4.92) (envelope-from ) id 1vvZtx-0006RY-46; Thu, 26 Feb 2026 11:51:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241452.1542483; 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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd68826asm220079295e9.0.2026.02.26.03.51.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Feb 2026 03:51:24 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7a857585-1309-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1772106685; x=1772711485; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Hp5eAdCk/2OvwDZTtcjSxeKObwgzunQJOuXOKfijBE4=; b=RyWH5bb4yR/tmFBThWdUwaJSlABlzhK/2kDuPqtrd6021Qx0ObfANh6QIHhkegpsdE rGDiiZFAiHIhQsUGEA6DMXEoRjuVRD2aXX5QpcQR+Vxt9pqKSobP0fdxgsPJNPB/QLmU 2O8M9WWSbVVPS6UKeVLO3HNZa1RD8RO+qs2c4qacX7LQSY+quVYz1/4us7mNPrMOclc2 p2MW5xk9ix7xspqKj84Q8mRzuQYJbiLuI682u0zHRr6BokxvSIZbzotb3h3ux8hkjhtp AqlH0/s7uH5eTI2v+7GbCbR8dhsEtpEhaO0klQ4zLaFuZD08g+NQ/jdzQUuRH2UIc0sW ZwYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772106685; x=1772711485; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Hp5eAdCk/2OvwDZTtcjSxeKObwgzunQJOuXOKfijBE4=; b=fGmkA5xGfcCcJXTFfhavJqGnRT7VJpRAGcR/ZzUFhpB/C/SLa3+qJtIwOqG/e3H4RR nLXLROjx+Pf0OpRd9oDFf8qDVFQiNyXmU5LhKPCNctydy3Fi7ha2I47YMhiUMtuSWZAB dmG+WL02vr+P7E93mszysQcW6f2iKC/IyM1cF3toP4QhLdM/4AC+e+niXlTwgHlp18Ss diZGt4WcenmTVTpPMRZAWTwm8iFmMIQN/HGXEW+Xnt41co6sriLo5jgOfePhcROSA9JH y5jizuhKeIEk5IuYhZ1lalK2eDoctgosCmdR1KTHFVrrig/Fud6ajAWCAgHpMAziT/jw 3AQA== X-Gm-Message-State: AOJu0YwLU7QWkDaJOxz2D8pc1Bwr6X0dmKXl6z/zCHARuQ+tngC89Xe4 NYrekiTf7D9OSXHAIWuMn+obILLrmE3xGSYmtnrlY30VxQa1XFFBR79bZckA2g== X-Gm-Gg: ATEYQzyCZ029jCQF+i+3ClRkiuDRMVXszRQsJCpuVx572YfCa1tEubMl/q+nLvUV3fb nIC6+a65JviEhsyfaU5Z6VItY6XgISPwL3UiLcKOpgLoeRsaUbPBJBGBzCqzZSodBjcP5PswHQh DzcuklLWSCvGJx81V3SSxtIBL62rJ3C9132SvJsARhtmCnq6cwtklt+WNGUdB112ZVzgqcDylRa Os9cRmyLOa9dSizZQ6AUoy17820lOwmm6+FLhAKpxa2TpQbwTW8oDjgFuP6E/CvuPAX9anFuzkT e1NGB39jeUGV56XeegXDBEZvEXtFy59cciaL0TLZp2x/q8eAyit0iyeuGfQTDmnIKQko/9Yj/MB foNdBnBqL+GbsftjFPjZygJcNnc6wTz8fsKpVLsdUN0h9IIjUbSIcHKUxMZk//oEQe6fkXzi4kV yjtVL8xDCP64PyqZXmC7rEhstUXwXWu8Mj+FcZoem6reQNxU6f5AmQV1l1W8jqYC5tizN2UJ/sP J6n X-Received: by 2002:a05:600c:1e8f:b0:477:98f7:2aec with SMTP id 5b1f17b1804b1-483c3db3198mr31642645e9.3.1772106684538; Thu, 26 Feb 2026 03:51:24 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v6 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot Date: Thu, 26 Feb 2026 12:51:01 +0100 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Some hypervisor CSRs expose optional functionality and may not implement all architectural bits. Writing unsupported bits can either be ignored or raise an exception depending on the platform. Detect the set of writable bits for selected hypervisor CSRs at boot and store the resulting masks for later use. This allows safely programming these CSRs during vCPU context switching and avoids relying on hardcoded architectural assumptions. Use csr_read()&csr_write() instead of csr_swap()+all ones mask as some CSR registers have WPRI fields which should be preserved during write operation. Also, ro_one struct is introduced to cover the cases when a bit in CSR register (at the momemnt, it is only hstateen0) may be r/o-one to have hypervisor view of register seen by guest correct. Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, hstateen0 registers as only them are going to be used in the follow up patch. If the Smstateen extension is not implemented, hstateen0 cannot be read because the register is considered non-existent. Instructions that attempt to access a CSR that is not implemented or not visible in the current mode are reserved and will raise an illegal-instruction exception. Signed-off-by: Oleksii Kurochko --- Changes in V6: - Introduce sub-struct ro_one inside csr_masks to cover the case that hstateen0 could have read-only-one bits. - Refacotr init_csr_masks() to handle hstateen0 case when a bit is r/o-one and handle WPRI fields properly. - Update the commit message. --- Changes in V5: - Move everything related to csr_masks to domain.c and make it static. - Move declaration of old variable in init_csr_masks() inside INIT_CSR_MASK. - Use csr_swap() in INIT_CSR_MASK(). --- Changes in V4: - Move csr_masks defintion to domain.c. Make it static as at the moment it is going to be used only in domain.c. - Rename and refactor X macros inside init_csr_masks(). --- Changes in V3: - New patch. --- xen/arch/riscv/domain.c | 47 ++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/setup.h | 2 ++ xen/arch/riscv/setup.c | 2 ++ 3 files changed, 51 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index b60320b90def..902aaac74290 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -2,9 +2,56 @@ #include #include +#include #include #include +#include +#include + +struct csr_masks { + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; + + struct { + register_t hstateen0; + } ro_one; +}; + +static struct csr_masks __ro_after_init csr_masks; + +void __init init_csr_masks(void) +{ + /* + * The mask specifies the bits that may be safely modified without + * causing side effects. + * + * For example, registers such as henvcfg or hstateen0 contain WPRI + * fields that must be preserved. Any write to the full register must + * therefore retain the original values of those fields. + */ +#define INIT_CSR_MASK(csr, field, mask) do { \ + old = csr_read(CSR_##csr); \ + csr_write(CSR_##csr, (old & ~(mask)) | (mask)); \ + csr_masks.field = csr_swap(CSR_##csr, old); \ + } while (0) + + register_t old; + + INIT_CSR_MASK(HEDELEG, hedeleg, ULONG_MAX); + INIT_CSR_MASK(HIDELEG, hideleg, ULONG_MAX); + + INIT_CSR_MASK(HENVCFG, henvcfg, _UL(0xE0000003000000FF)); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + { + INIT_CSR_MASK(HSTATEEN0, hstateen0, _UL(0xDE00000000000007)); + csr_masks.ro_one.hstateen0 = old; + } +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index c9d69cdf5166..2215894cfbb1 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -11,6 +11,8 @@ void setup_mm(void); void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); +void init_csr_masks(void); + #endif /* ASM__RISCV__SETUP_H */ /* diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9b4835960d20..bca6ca09eddd 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -137,6 +137,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, riscv_fill_hwcap(); + init_csr_masks(); + preinit_xen_time(); intc_preinit(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241455.1542510 (Exim 4.92) (envelope-from ) id 1vvZu1-0006xl-1i; Thu, 26 Feb 2026 11:51:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241455.1542510; Thu, 26 Feb 2026 11:51:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu0-0006xS-R9; Thu, 26 Feb 2026 11:51:32 +0000 Received: by outflank-mailman (input) for mailman id 1241455; Thu, 26 Feb 2026 11:51:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZtz-0006E8-MR for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:31 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7da961ba-1309-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 12:51:31 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4836d4c26d3so5243045e9.2 for ; Thu, 26 Feb 2026 03:51:31 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This is not a practical issue for Arm, as the latest ARM ARM that timer frequency should be fixed at 1 GHz and older platforms used much lower rates, which is shy of 32-bit overflow. As the helpers are declared as static inline, they should not affect x86, which does not use them. On Arm, these helpers were historically implemented as out-of-line functions because the counter frequency was originally defined as static and unavailable to headers [1]. Later changes [2] removed this restriction, but the helpers remained unchanged. Now they can be implemented as static inline without any issues. Centralising the helpers avoids duplication and removes subtle differences between architectures while keeping the implementation simple. Drop redundant includes where already pulls it in. No functional change is intended. [1] ddee56dc2994 arm: driver for the generic timer for ARMv7 [2] 096578b4e489 xen: move XEN_SYSCTL_physinfo, XEN_SYSCTL_numainfo and XEN_SYSCTL_topologyinfo to common code Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in v4-v6: - Nothing changed. Only rebase. --- Changes in v3: - Add Reviewed-by: Jan Beulich . --- Changes in v2: - Move ns_to_ticks() and ticks_to_ns() to common code. --- xen/arch/arm/include/asm/time.h | 3 --- xen/arch/arm/time.c | 11 ----------- xen/arch/arm/vtimer.c | 2 +- xen/arch/riscv/include/asm/time.h | 5 ----- xen/arch/riscv/time.c | 1 + xen/include/xen/time.h | 11 +++++++++++ 6 files changed, 13 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index 49ad8c1a6d47..c194dbb9f52d 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -101,9 +101,6 @@ extern void init_timer_interrupt(void); /* Counter value at boot time */ extern uint64_t boot_count; -extern s_time_t ticks_to_ns(uint64_t ticks); -extern uint64_t ns_to_ticks(s_time_t ns); - void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index cc3fcf47b66a..a12912a106a0 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -27,7 +27,6 @@ #include #include #include -#include #include uint64_t __read_mostly boot_count; @@ -47,16 +46,6 @@ unsigned int timer_get_irq(enum timer_ppi ppi) return timer_irq[ppi]; } -/*static inline*/ s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz); -} - -/*static inline*/ uint64_t ns_to_ticks(s_time_t ns) -{ - return muldiv64(ns, 1000 * cpu_khz, SECONDS(1)); -} - static __initdata struct dt_device_node *timer; #ifdef CONFIG_ACPI diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index d2124b175521..2e85ff2b6e62 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -12,13 +12,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h index 1e7801e2ea0e..be3875b9984e 100644 --- a/xen/arch/riscv/include/asm/time.h +++ b/xen/arch/riscv/include/asm/time.h @@ -24,11 +24,6 @@ static inline cycles_t get_cycles(void) return csr_read(CSR_TIME); } -static inline s_time_t ticks_to_ns(uint64_t ticks) -{ - return muldiv64(ticks, MILLISECS(1), cpu_khz); -} - void preinit_xen_time(void); #endif /* ASM__RISCV__TIME_H */ diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index e962f8518d78..2c7af0a5d63b 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -4,6 +4,7 @@ #include #include #include +#include #include unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index fe0d7a578a99..2185dd26a439 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -8,6 +8,7 @@ #ifndef __XEN_TIME_H__ #define __XEN_TIME_H__ +#include #include #include @@ -75,6 +76,16 @@ extern void send_timer_event(struct vcpu *v); void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds); +static inline s_time_t ticks_to_ns(uint64_t ticks) +{ + return muldiv64(ticks, MILLISECS(1), cpu_khz); +} + +static inline uint64_t ns_to_ticks(s_time_t ns) +{ + return muldiv64(ns, cpu_khz, MILLISECS(1)); +} + #include #endif /* __XEN_TIME_H__ */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241454.1542504 (Exim 4.92) (envelope-from ) id 1vvZu0-0006uG-Jc; Thu, 26 Feb 2026 11:51:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241454.1542504; Thu, 26 Feb 2026 11:51:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu0-0006u9-Go; Thu, 26 Feb 2026 11:51:32 +0000 Received: by outflank-mailman (input) for mailman id 1241454; Thu, 26 Feb 2026 11:51:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZty-0006EH-RH for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:30 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7c394cc8-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:28 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-483703e4b08so6569475e9.1 for ; Thu, 26 Feb 2026 03:51:28 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Note that smp_wmb() is used instead of smp_mb__before_atomic() as what we want to guarantee that if a bit in irqs_pending_mask is obversable that the correspondent bit in irqs_pending is observable too. Add lockless tracking of pending vCPU interrupts using atomic bitops. Two bitmaps are introduced: - irqs_pending — interrupts currently pending for the vCPU - irqs_pending_mask — bits that have changed in irqs_pending The design follows a multi-producer, single-consumer model, where the consumer is the vCPU itself. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg(). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. On RISC-V interrupts are not injected via guest registers, so pending interrupts must be recorded in irqs_pending (using the new vcpu_{un}set_interrupt() helpers) and flushed to the guest by updating HVIP before returning control to the guest. The consumer side is implemented in a follow-up patch. A barrier between updating irqs_pending and setting the corresponding mask bit in vcpu_set_interrupt()/vcpu_unset_interrupt() guarantees that if the consumer observes a mask bit set, the corresponding pending bit is also visible. This prevents missed interrupts during the flush. It is possible that a guest could have pending bit in the hardware register without being marked pending in irq_pending bitmap as: According to the RISC-V ISA specification: Bits hip.VSSIP and hie.VSSIE are the interrupt-pending and interrupt-enable bits for VS-level software interrupts. VSSIP in hip is an alias (writable) of the same bit in hvip. Additionally: When bit 2 of hideleg is zero, vsip.SSIP and vsie.SSIE are read-only zeros. Else, vsip.SSIP and vsie.SSIE are aliases of hip.VSSIP and hie.VSSIE. This means the guest may modify vsip.SSIP, which implicitly updates hip.VSSIP and the bit being written with 1 would also trigger an interrupt as according to the RISC-V spec: These conditions for an interrupt trap to occur must be evaluated in a bounded amount of time from when an interrupt becomes, or ceases to be, pending in sip, and must also be evaluated immediately following the execution of an SRET instruction or an explicit write to a CSR on which these interrupt trap conditions expressly depend (including sip, sie and sstatus). What means that IRQ_VS_SOFT must be synchronized separately, what is done in vcpu_sync_interrupts(). Note, also, that IRQ_PMU_OVF would want to be synced for the similar reason as IRQ_VS_SOFT, but isn't sync-ed now as PMU isn't supported now. For the remaining VS-level interrupt types (IRQ_VS_TIMER and IRQ_VS_EXT), the specification states they cannot be modified by the guest and are read-only because of: Bits hip.VSEIP and hie.VSEIE are the interrupt-pending and interrupt-enable bits for VS-level external interrupts. VSEIP is read-only in hip, and is the logical-OR of these interrupt sources: • bit VSEIP of hvip; • the bit of hgeip selected by hstatus.VGEIN; and • any other platform-specific external interrupt signal directed to VS-level. Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the logical-OR of hvip.VSTIP and any other platform-specific timer interrupt signal directed to VS-level. and When bit 10 of hideleg is zero, vsip.SEIP and vsie.SEIE are read-only zeros. Else, vsip.SEIP and vsie.SEIE are aliases of hip.VSEIP and hie.VSEIE. When bit 6 of hideleg is zero, vsip.STIP and vsie.STIE are read-only zeros. Else, vsip.STIP and vsie.STIE are aliases of hip.VSTIP and hie.VSTIE. and also, Bits sip.SEIP and sie.SEIE are the interrupt-pending and interrupt-enable bits for supervisor-level external interrupts. If implemented, SEIP is read-only in sip, and is set and cleared by the execution environment, typically through a platform-specific interrupt controller. Bits sip.STIP and sie.STIE are the interrupt-pending and interrupt-enable bits for supervisor-level timer interrupts. If implemented, STIP is read-only in sip, and is set and cleared by the execution environment Thus, for these interrupt types, it is sufficient to use vcpu_set_interrupt() and vcpu_unset_interrupt(), and flush them during the call of vcpu_flush_interrupts() (which is introduced in follow up patch). vcpu_sync_interrupts(), which is called just before entering the VM, slightly bends the rule that the irqs_pending bit must be written first, followed by updating the corresponding bit in irqs_pending_mask. However, it still respects the core guarantee that the producer never clears the mask and only writes to irqs_pending if it is the one that flipped the corresponding mask bit from 0 to 1. Moreover, since the consumer won't run concurrently because vcpu_sync_interrupts() and the consumer path are going to be invoked sequentially immediately before VM entry, it is safe to slightly relax this ordering rule in vcpu_sync_interrupts(). Signed-off-by: Oleksii Kurochko --- Changes in v6: - Drop for the moment: /* Read current HVIP and VSIE CSRs */ v->arch.vsie = csr_read(CSR_VSIE); from vcpu_sync_interrupts() as it isn't used at the moment and will be introduced when a usage will be more clear. --- Changes in v5: - Update the commit message(). - Rename c to curr. - Update vcpu_set_interrupt() to use test_and_set_bit() for irqs_pending bitmask too. - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_sync_interrupts(). --- Changes in v4: - Update the commit message. - Update the comments in vcpu_(un)set_interrupt() and add the the comment above smp_wmb() barrier. - call vcpu_kick() only if the pending_mask bit going from 0 to 1. - Code style fixes. - Update defintion of RISCV_VCPU_NR_IRQS to cover potential RV128 case and the case if AIA isn't used. - latch current into a local variable in check_for_pcpu_work(). --- Changes in v3: - Use smp_wb() instead of smp_mb__before_atomic(). - Add explanation of the change above in the commit message. - Move vcpu_sync_interrupts() here to producers side. - Introduce check_for_pcpu_work() to be clear from where vcpu_sync_interrupts() is called. --- Changes in V2: - Move the patch before an introduction of vtimer. - Drop bitmap_zero() of irqs_pending and irqs_pending_mask bitmaps as vcpu structure starts out all zeros. - Drop const for irq argument of vcpu_{un}set_interrupt(). - Drop check "irq < IRQ_LOCAL_MAX" in vcpu_{un}set_interrupt() as it could lead to overrun of irqs_pending and irqs_pending_mask bitmaps. - Drop IRQ_LOCAL_MAX as there is no usage for it now. --- xen/arch/riscv/domain.c | 71 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 22 +++++++++ xen/arch/riscv/traps.c | 4 ++ 3 files changed, 97 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 2a81f8d94f9a..047dbebc1a09 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -158,6 +159,76 @@ void arch_vcpu_destroy(struct vcpu *v) vfree((void *)&v->arch.cpu_info[1] - STACK_SIZE); } +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq) +{ + bool kick_vcpu; + + /* We only allow VS-mode software, timer, and external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + kick_vcpu = !test_and_set_bit(irq, v->arch.irqs_pending); + + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + + kick_vcpu |= !test_and_set_bit(irq, v->arch.irqs_pending_mask); + + if ( kick_vcpu ) + vcpu_kick(v); + + return 0; +} + +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq) +{ + /* We only allow VS-mode software, timer, external interrupts */ + if ( irq != IRQ_VS_SOFT && + irq != IRQ_VS_TIMER && + irq != IRQ_VS_EXT ) + return -EINVAL; + + clear_bit(irq, v->arch.irqs_pending); + /* + * The counterpart of this barrier is the one encoded implicitly in xchg() + * which is used in consumer part (vcpu_flush_interrupts()). + */ + smp_wmb(); + set_bit(irq, v->arch.irqs_pending_mask); + + return 0; +} + +void vcpu_sync_interrupts(struct vcpu *v) +{ + unsigned long hvip = csr_read(CSR_HVIP); + + /* Sync-up HVIP.VSSIP bit changes done by Guest */ + if ( ((v->arch.hvip ^ hvip) & BIT(IRQ_VS_SOFT, UL)) && + !test_and_set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending_mask) ) + { + if ( hvip & BIT(IRQ_VS_SOFT, UL) ) + set_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + else + clear_bit(IRQ_VS_SOFT, &v->arch.irqs_pending); + } + +#ifdef CONFIG_RISCV_32 + /* + * Sync-up AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't supported + * now. + */ +# error "Update v->arch.vsieh" +#endif +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 17be792afe7d..e19365c6fb77 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,8 +54,25 @@ struct arch_vcpu { register_t hideleg; register_t henvcfg; register_t hstateen0; + register_t hvip; register_t vsatp; + + /* + * VCPU interrupts + * + * We have a lockless approach for tracking pending VCPU interrupts + * implemented using atomic bitops. The irqs_pending bitmap represent + * pending interrupts whereas irqs_pending_mask represent bits changed + * in irqs_pending. Our approach is modeled around multiple producer + * and single consumer problem where the consumer is the VCPU itself. + * + * DECLARE_BITMAP() is needed here to support 64 vCPU local interrupts + * on RV32 host. + */ +#define RISCV_VCPU_NR_IRQS MAX(BITS_PER_LONG, 64) + DECLARE_BITMAP(irqs_pending, RISCV_VCPU_NR_IRQS); + DECLARE_BITMAP(irqs_pending_mask, RISCV_VCPU_NR_IRQS); }; struct paging_domain { @@ -94,6 +111,11 @@ static inline void update_guest_memory_policy(struct vcpu *v, static inline void arch_vcpu_block(struct vcpu *v) {} +int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); +int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); + +void vcpu_sync_interrupts(struct vcpu *v); + #endif /* ASM__RISCV__DOMAIN_H */ /* diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 9fca941526f6..551f886e3a69 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -171,6 +171,10 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) static void check_for_pcpu_work(void) { + struct vcpu *curr = current; + + vcpu_sync_interrupts(curr); + p2m_handle_vmenter(); } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241458.1542544 (Exim 4.92) (envelope-from ) id 1vvZu6-0007uS-2G; Thu, 26 Feb 2026 11:51:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241458.1542544; Thu, 26 Feb 2026 11:51:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu5-0007uE-SC; Thu, 26 Feb 2026 11:51:37 +0000 Received: by outflank-mailman (input) for mailman id 1241458; Thu, 26 Feb 2026 11:51:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu4-0006EH-L0 for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:36 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7fee7579-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:34 +0100 (CET) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4837f27cf2dso6970105e9.2 for ; Thu, 26 Feb 2026 03:51:34 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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This mirrors the behavior of Arm and enables proper vCPU wakeup handling on RISC-V. Remove the stub implementation from stubs.c, as it is now provided by arch/riscv/domain.c. Since vcpu_kick() calls perfc_incr(vcpu_kick), add perfcounter for vcpu_kick to handle the case when CONFIG_PERF_COUNTERS=y. Although CONFIG_PERF_COUNTERS is not enabled by default, it can be enabled, for example, by randconfig what will lead to CI build issues. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v6: - Nothing changed. Only rebase. --- Changes in v3: - Add asm/perfc_defn.h to provide vcpu_kick perfcoounter to cover the case when CONFIG_PERF_COUNTERS=y. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/domain.c | 14 ++++++++++++++ xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/perfc_defn.h | 3 +++ xen/arch/riscv/stubs.c | 5 ----- 4 files changed, 17 insertions(+), 6 deletions(-) create mode 100644 xen/arch/riscv/include/asm/perfc_defn.h diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 56b28750d3aa..fda8cff90f6a 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include #include +#include #include #include @@ -265,6 +267,18 @@ void vcpu_flush_interrupts(struct vcpu *v) #endif } +void vcpu_kick(struct vcpu *v) +{ + bool running = v->is_running; + + vcpu_unblock(v); + if ( running && v != current ) + { + perfc_incr(vcpu_kick); + smp_send_event_check_mask(cpumask_of(v->processor)); + } +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index 3824f31c395c..86c56251d5d7 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -7,7 +7,6 @@ generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h generic-y += percpu.h -generic-y += perfc_defn.h generic-y += random.h generic-y += softirq.h generic-y += vm_event.h diff --git a/xen/arch/riscv/include/asm/perfc_defn.h b/xen/arch/riscv/include/asm/perfc_defn.h new file mode 100644 index 000000000000..8a4b945df662 --- /dev/null +++ b/xen/arch/riscv/include/asm/perfc_defn.h @@ -0,0 +1,3 @@ +/* This file is intended to be included multiple times. */ + +PERFCOUNTER(vcpu_kick, "vcpu: notify other vcpu") diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index daadff0138e4..eedf8bf9350a 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -203,11 +203,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) BUG_ON("unimplemented"); } -void vcpu_kick(struct vcpu *v) -{ - BUG_ON("unimplemented"); -} - unsigned long hypercall_create_continuation(unsigned int op, const char *format, ...) { -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241456.1542523 (Exim 4.92) (envelope-from ) id 1vvZu2-0007Ld-8N; Thu, 26 Feb 2026 11:51:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241456.1542523; Thu, 26 Feb 2026 11:51:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu2-0007Kh-4g; Thu, 26 Feb 2026 11:51:34 +0000 Received: by outflank-mailman (input) for mailman id 1241456; Thu, 26 Feb 2026 11:51:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu0-0006E8-Mf for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:32 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7cd91581-1309-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 12:51:29 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4836f363ad2so9650385e9.1 for ; Thu, 26 Feb 2026 03:51:29 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Add the consumer side (vcpu_flush_interrupts()) of the lockless pending interrupt tracking introduced in part 1 (for producers). According, to the design only one consumer is possible, and it is vCPU itself. vcpu_flush_interrupts() is expected to be ran (as guests aren't ran now due to the lack of functionality) before the hypervisor returns control to the guest. Producers may set bits in irqs_pending_mask without a lock. Clearing bits in irqs_pending_mask is performed only by the consumer via xchg() (with aquire semantics). The consumer must not write to irqs_pending and must not act on bits that are not set in the mask. Otherwise, extra synchronization should be provided. The worst thing which could happen with such approach is that a new pending bit will be set to irqs_pending bitmap during update of hvip variable in vcpu_flush_interrupt() but it isn't problem as the new pending bit won't be lost and just be proceded during the next flush. As AIA specs introduced hviph register which would want to be updated when guest related AIA code vcpu_update_hvip() is introduced instead of just open-code it in vcpu_flush_interrupts(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - Reorder the defintions of local variables (mask, val, hvip) in vcpu_flush_interrupts(). Also, drop a blank line between them. - Move #ifdef CONFIG_RISCV_32 above the comment in vcpu_flush_interrupts() and align the comment properly. - Add Acked-by: Jan Beulich . --- Changes in v4: - Move defintion of hvip local variable to narrower space in vcpu_flush_interrupts(). - Use initializers for mask and val variables. - Use local variable c as an argument of vcpu_flush_interrupts() in check_for_pcpu_work(). --- Changes in v3: - Update the error message in case of RV32 from "hviph" to v->arch.hviph. - Make const argument of vcpu_update_hvip. - Move local variables mask and val inside if() in vcpu_flush_interrupts(). - Call vcpu_flush_interrupts() in check_pcpu_work(). - Move vcpu_update_hvip() inside if() in vcpu_flush_interrupts(). --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 30 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/traps.c | 2 ++ 3 files changed, 33 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 047dbebc1a09..6988d7032059 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -229,6 +229,36 @@ void vcpu_sync_interrupts(struct vcpu *v) #endif } +static void vcpu_update_hvip(const struct vcpu *v) +{ + csr_write(CSR_HVIP, v->arch.hvip); +} + +void vcpu_flush_interrupts(struct vcpu *v) +{ + if ( ACCESS_ONCE(v->arch.irqs_pending_mask[0]) ) + { + unsigned long mask = xchg(&v->arch.irqs_pending_mask[0], 0UL); + unsigned long val = ACCESS_ONCE(v->arch.irqs_pending[0]) & mask; + register_t *hvip = &v->arch.hvip; + + *hvip &= ~mask; + *hvip |= val; + + vcpu_update_hvip(v); + } + +#ifdef CONFIG_RISCV_32 + /* + * Flush AIA high interrupts. + * + * It is necessary to do only for CONFIG_RISCV_32 which isn't + * supported now. + */ +# error "Update v->arch.hviph" +#endif +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index e19365c6fb77..5373a498d80b 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -115,6 +115,7 @@ int vcpu_set_interrupt(struct vcpu *v, unsigned int irq); int vcpu_unset_interrupt(struct vcpu *v, unsigned int irq); void vcpu_sync_interrupts(struct vcpu *v); +void vcpu_flush_interrupts(struct vcpu *v); #endif /* ASM__RISCV__DOMAIN_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 551f886e3a69..244264c92a79 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -175,6 +175,8 @@ static void check_for_pcpu_work(void) vcpu_sync_interrupts(curr); + vcpu_flush_interrupts(curr); + p2m_handle_vmenter(); } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241460.1542553 (Exim 4.92) (envelope-from ) id 1vvZu7-00088X-5j; Thu, 26 Feb 2026 11:51:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241460.1542553; Thu, 26 Feb 2026 11:51:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu7-00088A-2c; Thu, 26 Feb 2026 11:51:39 +0000 Received: by outflank-mailman (input) for mailman id 1241460; Thu, 26 Feb 2026 11:51:38 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu5-0006E8-TY for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:37 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 813fca0c-1309-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 12:51:37 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so8712645e9.2 for ; Thu, 26 Feb 2026 03:51:37 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler now programs the vCPU’s virtual timer via vtimer_set_timer() and returns SBI_SUCCESS. This enables guests using the legacy SBI timer interface to schedule timer events correctly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3-v6: - Nothing changed. Only rebase. --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/vsbi/legacy-extension.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c index 2e8df191c295..090c23440cea 100644 --- a/xen/arch/riscv/vsbi/legacy-extension.c +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -7,6 +7,7 @@ #include #include +#include static void vsbi_print_char(char c) { @@ -44,6 +45,11 @@ static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, ret = SBI_ERR_NOT_SUPPORTED; break; + case SBI_EXT_0_1_SET_TIMER: + vtimer_set_timer(¤t->arch.vtimer, regs->a0); + regs->a0 = SBI_SUCCESS; + break; + default: /* * TODO: domain_crash() is acceptable here while things are still under -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241461.1542563 (Exim 4.92) (envelope-from ) id 1vvZu8-0008QP-FD; Thu, 26 Feb 2026 11:51:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241461.1542563; Thu, 26 Feb 2026 11:51:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu8-0008PN-Ar; Thu, 26 Feb 2026 11:51:40 +0000 Received: by outflank-mailman (input) for mailman id 1241461; Thu, 26 Feb 2026 11:51:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu6-0006EH-Lf for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:38 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 809db19b-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:36 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4837f27cf2dso6970295e9.2 for ; Thu, 26 Feb 2026 03:51:36 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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At present, vtimer_ctxt_switch_from() is a no-op because the RISC-V SSTC extension, which provides a virtualization-aware timer, is not yet supported. Xen therefore relies the virtual (SBI-based) timer. The virtual timer uses Xen's internal timer infrastructure and must be associated with the pCPU on which the vCPU is currently running so that timer events can be delivered efficiently. As a result, vtimer_ctxt_switch_to() migrates the timer to the target pCPU when a vCPU is scheduled in. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v6: - Nothing changed. Only rebase. --- Changes in v3: - s/vtimer_ctx_switch_to/vtimer_ctxt_switch_to - s/vtimer_ctx_switch_from/vtimer_ctxt_switch_from - Add Acked-by: Jan Beulich . --- Changes in v2: - Align the parameters names for vtimer_ctx_switch_from() and vtimer_ctx_switch_to() in declarations to match the ones in the defintions to make Misra happy. - s/vtimer_save/vtimer_ctx_switch_from. - s/vtimer_restore/vtimer_ctx_switch_to. - Update the commit message. --- xen/arch/riscv/include/asm/vtimer.h | 3 +++ xen/arch/riscv/vtimer.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/asm/vtimer.h index 111863610a92..b4d48d1a1732 100644 --- a/xen/arch/riscv/include/asm/vtimer.h +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -14,4 +14,7 @@ void vcpu_timer_destroy(struct vcpu *v); void vtimer_set_timer(struct vtimer *t, uint64_t ticks); +void vtimer_ctxt_switch_from(struct vcpu *p); +void vtimer_ctxt_switch_to(struct vcpu *n); + #endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c index 32d142bcdfcd..afd8a53a7387 100644 --- a/xen/arch/riscv/vtimer.c +++ b/xen/arch/riscv/vtimer.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include @@ -69,3 +70,17 @@ void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) migrate_timer(&t->timer, smp_processor_id()); set_timer(&t->timer, expires); } + +void vtimer_ctxt_switch_from(struct vcpu *p) +{ + ASSERT(!is_idle_vcpu(p)); + + /* Nothing to do at the moment as SSTC isn't supported now. */ +} + +void vtimer_ctxt_switch_to(struct vcpu *n) +{ + ASSERT(!is_idle_vcpu(n)); + + migrate_timer(&n->arch.vtimer.timer, n->processor); +} -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241465.1542574 (Exim 4.92) (envelope-from ) id 1vvZuA-0000JG-3B; Thu, 26 Feb 2026 11:51:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241465.1542574; Thu, 26 Feb 2026 11:51:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu9-0000IO-Tz; Thu, 26 Feb 2026 11:51:41 +0000 Received: by outflank-mailman (input) for mailman id 1241465; Thu, 26 Feb 2026 11:51:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu8-0006EH-Lp for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:40 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 81f1a138-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:38 +0100 (CET) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-48372efa020so6535065e9.2 for ; Thu, 26 Feb 2026 03:51:38 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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If the TIME extension is not available, fall back to the legacy timer mechanism. This is useful when Xen runs as a guest under another Xen, because the TIME extension is not currently virtualised and therefore will not appear as available. Despite of the fact that sbi_set_timer_v01 is introduced and used as fall back, SBI v0.1 still isn't fully supported (with the current SBI calls usage, sbi_rfence_v01 should be introduced too), so panic() in sbi_init() isn't removed. The sbi_set_timer() pointer will be used by reprogram_timer() to program Xen’s physical timer as without SSTC extension there is no any other option except SBI call to do that as only M-timer is available for us. Use dprintk() for all the cases to print that a speicifc SBI extension is available as it isn't really necessary in case of release builds. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - Add inclusion of to to deal with the compilation issue: ./arch/riscv/include/asm/sbi.h:156:30: error: expected ')' before 'sbi_set_timer' 156 | extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); - Rephrase the first sentence of the comment above declaration of sbi_set_timer pointer to function. --- Changes in v4: - Add "stime_value is in absolute time" to the comment above declaration of sbi_set_timer() function pointer. - Add Acked-by: Jan Beulich . --- Changes in v3: - Init sbi_set_timer with sbi_set_timer_v01 as fallback value. - Sort SBI IDs in the same way as SBI EXT IDs are declared. - Add __ro_after_init for sbi_set_timer variable. - use dprintk instead of printk to print information if SBI ext is available. --- Changes in v2: - Move up defintion of SBI_EXT_TIME_SET_TIMER and use the same padding as defintions around it. - Add an extra comment about stime_value granuality above declaration of sbi_set_timer function pointer. - Refactor implemetation of sbi_set_timer_v02(). - Provide fallback for sbi_set_timer_v01(). - Update the commit message. --- xen/arch/riscv/include/asm/sbi.h | 22 ++++++++++++++++++ xen/arch/riscv/sbi.c | 40 +++++++++++++++++++++++++++++++- 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index 79f7ff5c5501..ed7af200288f 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -13,6 +13,7 @@ #define ASM__RISCV__SBI_H #include +#include /* SBI-defined implementation ID */ #define SBI_XEN_IMPID 7 @@ -29,6 +30,7 @@ #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 +#define SBI_EXT_TIME 0x54494D45 /* SBI function IDs for BASE extension */ #define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 @@ -48,6 +50,9 @@ #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 +/* SBI function IDs for TIME extension */ +#define SBI_EXT_TIME_SET_TIMER 0x0 + #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f000000 #define SBI_SPEC_VERSION_MINOR_MASK 0x00ffffff @@ -134,6 +139,23 @@ int sbi_remote_hfence_gvma(const cpumask_t *cpu_mask, vaddr_t start, int sbi_remote_hfence_gvma_vmid(const cpumask_t *cpu_mask, vaddr_t start, size_t size, unsigned long vmid); +/* + * Programs the clock for next event at (or after) stime_value. stime_value is + * in absolute time. This function must clear the pending timer interrupt bit + * as well. + * + * If the supervisor wishes to clear the timer interrupt without scheduling the + * next timer event, it can either request a timer interrupt infinitely far + * into the future (i.e., (uint64_t)-1), or it can instead mask the timer + * interrupt by clearing sie.STIE CSR bit. + * + * The stime_value parameter represents absolute time measured in ticks. + * + * This SBI call returns 0 upon success or an implementation specific negative + * error code. + */ +extern int (* __ro_after_init sbi_set_timer)(uint64_t stime_value); + /* * Initialize SBI library * diff --git a/xen/arch/riscv/sbi.c b/xen/arch/riscv/sbi.c index 425dce44c679..b4a7ae6940c1 100644 --- a/xen/arch/riscv/sbi.c +++ b/xen/arch/riscv/sbi.c @@ -249,6 +249,38 @@ static int (* __ro_after_init sbi_rfence)(unsigned long fid, unsigned long arg4, unsigned long arg5); +static int cf_check sbi_set_timer_v02(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +static int cf_check sbi_set_timer_v01(uint64_t stime_value) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, +#ifdef CONFIG_RISCV_32 + stime_value >> 32, +#else + 0, +#endif + 0, 0, 0, 0); + + return sbi_err_map_xen_errno(ret.error); +} + +int (* __ro_after_init sbi_set_timer)(uint64_t stime_value) = sbi_set_timer_v01; + int sbi_remote_sfence_vma(const cpumask_t *cpu_mask, vaddr_t start, size_t size) { @@ -324,7 +356,13 @@ int __init sbi_init(void) if ( sbi_probe_extension(SBI_EXT_RFENCE) > 0 ) { sbi_rfence = sbi_rfence_v02; - printk("SBI v0.2 RFENCE extension detected\n"); + dprintk(XENLOG_INFO, "SBI v0.2 RFENCE extension detected\n"); + } + + if ( sbi_probe_extension(SBI_EXT_TIME) > 0 ) + { + sbi_set_timer = sbi_set_timer_v02; + dprintk(XENLOG_INFO, "SBI v0.2 TIME extension detected\n"); } } else -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241466.1542579 (Exim 4.92) (envelope-from ) id 1vvZuA-0000Ni-Kp; Thu, 26 Feb 2026 11:51:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241466.1542579; Thu, 26 Feb 2026 11:51:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuA-0000MU-9Z; Thu, 26 Feb 2026 11:51:42 +0000 Received: by outflank-mailman (input) for mailman id 1241466; Thu, 26 Feb 2026 11:51:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZu8-0006E8-UU for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:40 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 82f5fc2e-1309-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 12:51:39 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-4834826e5a0so8712995e9.2 for ; Thu, 26 Feb 2026 03:51:40 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The privileged architecture only defines machine-mode timer interrupts (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) is optional and is not supported on the boards available to me, so the only viable approach today is to program the timer through SBI. reprogram_timer() enables/disables the supervisor timer interrupt and programs the next timer deadline using sbi_set_timer(). If the SBI call fails, the code panics, because sbi_set_timer() is expected to return either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to the latest ones). The SBI spec does not define a standard negative error code for this call, and without SSTC there is no alternative method to program the timer, so the SBI timer call must be available. reprogram_timer() currently returns int for compatibility with the existing prototype. While it might be cleaner to return bool, keeping the existing signature avoids premature changes in case sbi_set_timer() ever needs to return other values (based on which we could try to avoid panic-ing) in the future. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5 - v6: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Correct the comments in reprogram_timer(). - Move enablement of timer interrupt after sbi_set_timer() to avoid potentially receiving a timer interrupt between these 2 operations. --- Changes in v2: - Add TODO comment above sbi_set_timer() call. - Update the commit message. --- xen/arch/riscv/stubs.c | 5 ----- xen/arch/riscv/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index eedf8bf9350a..2f3a0ce76af9 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -21,11 +21,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; /* time.c */ -int reprogram_timer(s_time_t timeout) -{ - BUG_ON("unimplemented"); -} - void send_timer_event(struct vcpu *v) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 2c7af0a5d63b..7efa76fdbcb1 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -7,6 +7,9 @@ #include #include +#include +#include + unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ uint64_t __ro_after_init boot_clock_cycles; @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) cpu_khz = rate / 1000; } +int reprogram_timer(s_time_t timeout) +{ + uint64_t deadline, now; + int rc; + + if ( timeout == 0 ) + { + /* Disable timer interrupt */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; + } + + deadline = ns_to_ticks(timeout) + boot_clock_cycles; + now = get_cycles(); + if ( deadline <= now ) + return 0; + + /* + * TODO: When the SSTC extension is supported, it would be preferable to + * use the supervisor timer registers directly here for better + * performance, since an SBI call and mode switch would no longer + * be required. + * + * This would also reduce reliance on a specific SBI implementation. + * For example, it is not ideal to panic() if sbi_set_timer() returns + * a non-zero value. Currently it can return 0 or -ENOSUPP, and + * without SSTC we still need an implementation because only the + * M-mode timer is available, and it can only be programmed in + * M-mode. + */ + if ( (rc = sbi_set_timer(deadline)) ) + panic("%s: timer wasn't set because: %d\n", __func__, rc); + + /* Enable timer interrupt */ + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; +} + void __init preinit_xen_time(void) { if ( acpi_disabled ) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241468.1542590 (Exim 4.92) (envelope-from ) id 1vvZuB-0000hs-S6; Thu, 26 Feb 2026 11:51:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241468.1542590; Thu, 26 Feb 2026 11:51:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuB-0000go-MK; Thu, 26 Feb 2026 11:51:43 +0000 Received: by outflank-mailman (input) for mailman id 1241468; Thu, 26 Feb 2026 11:51:42 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuA-0006EH-Gy for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:42 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 83963750-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:41 +0100 (CET) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4806cc07ce7so9144315e9.1 for ; Thu, 26 Feb 2026 03:51:41 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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The handler disables further timer interrupts by clearing SIE.STIE and raises TIMER_SOFTIRQ so the generic timer subsystem can perform its processing. Update do_trap() to dispatch IRQ_S_TIMER to this new handler. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v6: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Drop cause argument of timer_interrupt() as it isn't used inside the function and anyway it is pretty clear what is the cause inside timer_interrupt(). --- xen/arch/riscv/traps.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 244264c92a79..326f2be62823 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -180,6 +181,15 @@ static void check_for_pcpu_work(void) p2m_handle_vmenter(); } +static void timer_interrupt(void) +{ + /* Disable the timer to avoid more interrupts */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + /* Signal the generic timer code to do its work */ + raise_softirq(TIMER_SOFTIRQ); +} + void do_trap(struct cpu_user_regs *cpu_regs) { register_t pc = cpu_regs->sepc; @@ -221,6 +231,10 @@ void do_trap(struct cpu_user_regs *cpu_regs) intc_handle_external_irqs(cpu_regs); break; + case IRQ_S_TIMER: + timer_interrupt(); + break; + default: intr_handled = false; break; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:51:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:51:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241470.1542601 (Exim 4.92) (envelope-from ) id 1vvZuD-00017Q-C3; Thu, 26 Feb 2026 11:51:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241470.1542601; Thu, 26 Feb 2026 11:51:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuD-00016W-7L; Thu, 26 Feb 2026 11:51:45 +0000 Received: by outflank-mailman (input) for mailman id 1241470; Thu, 26 Feb 2026 11:51:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuB-0006EH-Vt for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:43 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 84475c12-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:42 +0100 (CET) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-48336a6e932so4567215e9.3 for ; Thu, 26 Feb 2026 03:51:42 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - It was something wrong with prev. rebase. So fix that and move removing of sync_local_execstate() and sync_vcpu_execstate() to the next patch. --- Changes in v4: - Nothing changed. Only rebase. --- Changes in v3: - add Acked-by: Jan Beulich . --- Changes in v2: - Update the commit message. - Move implementation of sync_vcpu_execstate() to separate commit as it doesn't connect to tasklet subsystem. --- xen/arch/riscv/setup.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index bca6ca09eddd..cae49bb29626 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -133,6 +134,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, panic("Booting using ACPI isn't supported\n"); } + tasklet_subsys_init(); + init_IRQ(); riscv_fill_hwcap(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 11:58:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 11:58:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241586.1542613 (Exim 4.92) (envelope-from ) id 1vva0D-0005Ky-Ap; Thu, 26 Feb 2026 11:57:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241586.1542613; Thu, 26 Feb 2026 11:57:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vva0D-0005Kr-8I; Thu, 26 Feb 2026 11:57:57 +0000 Received: by outflank-mailman (input) for mailman id 1241586; Thu, 26 Feb 2026 11:57:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvZuD-0006EH-2R for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 11:51:45 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 84fdef89-1309-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 12:51:43 +0100 (CET) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-483770e0b25so7372105e9.0 for ; Thu, 26 Feb 2026 03:51:43 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd68826asm220079295e9.0.2026.02.26.03.51.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Feb 2026 03:51:42 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 84fdef89-1309-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1772106702; x=1772711502; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pu3ONN1y8CnzVPPPqwVx01znDwKu8x6AESEnaYZMJ9s=; b=Q55DSSMxraHRy7VcTNID2XI8TY6x676cdTOzNAOP5OHe7mZAsfjVKhIq2qvfXQWnON IM/KYhvuy2xXxl4ON4o3Kj2Rekkw3cwtDSGZ6oNg7F8XcWiPAbmQA3yBarrsjR1GKq7W su0EnUalICO7LpgpHyPrVK8gUaq/5S+5yPMxwmM3H4395UVtpUdbrs7IrRTMvbC0YYdY EYUR/r9DDAjE/tcIkC7kovuc4zOx9o/z/Czt7uT7PkFQZm6SzSDw/dfzFvsH5WlfQQbB A3KBcSxg59aybm3WBt3g8jMJGzkOc+YRpHRCfFmYb/CI7r63BW4MYVR8I++fn8ge7OcH oZJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772106702; x=1772711502; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pu3ONN1y8CnzVPPPqwVx01znDwKu8x6AESEnaYZMJ9s=; b=qBOeUKxZpjHBGYzGFQD515EAN6sSXznSpotaausb0b+HuHdnTcgUwFnOJe5+05a5hK d8x4+pUaAmJ8+qTzAJE3L5oQzt6U0aNqaoQmurrjtwdxFwO+kUQs1TC5Zmmw47Eo0qGM +9RZs05KobGecxNPrWDSdqO0YMeS6vRKa70pYzRMxg1vU4uTYg3RBaL/zJpmqfv8ZkKz jMeDguVkKpCkktxZio5YfIQanr0wCjkBYGltb1bnLacBb9jDUhtuIfBLBt6zXhLGtL5Z 4Gjb+KZLEC2UUuKDdMDVCypgGEdYifqBMNt+fvbC/QBIviT2Y7wUlYzXN7oyRznXtLKI VOLA== X-Gm-Message-State: AOJu0Yy7tYO8OsoN/W0GPJX6l4QA+GRBj7hHZdrr8MkyyT8FeK/ABrRj TsaPlFKgUcL6FnxKiFV8XJr1ljDgBJm6hEKcSa+wqOgrqH4ZQxqjjDBXyXmclg== X-Gm-Gg: ATEYQzyc4ywa/5ZfVE704iMmmtv/n27V7JSxwh0fXxcYbSfr3do9KvZvEis2NKmjZcj l8zuynT5haoGWNSUOwngHujeILq1oPDLG1CsfwEZfo2vG+PwL+mpRoKk/VfOGAm5HO8UDwJNFW8 +PU+T7ZlzLxEb1Zn5e/p9O/jkn0Wq3DeNW/dPBFOxpAEncmUVdR1Ly9DpLktOVVolyE2FSGG99v NfnrzKAzN1WkxnTqJVxEiDiMRkUcD5ARCA7HnQ6PMpvIdr6KTZ1sfm61CU7D3PEauyzCt1rlmGC Y/jbmj5RsNVtkjcg9GjV3pdD7W0JRGMZl/tKkymyxhd2iwyhEUZc6x0GQxGx55mBgodzhqA46dd fBGOivSxJvnBiHlYeAKJDE9PBnUqxWnLln5KiRTzS+nHJpdhSM1f+qiM6R/SaEZR3KXWz2E/M6a TBNOPGn7yE9dJlC5md3P93atDShloL4h/GdZOKwdPxf2hhTRzRTxMmzP4mkDcMBF9ZZat+yw== X-Received: by 2002:a05:600c:8183:b0:477:9dc1:b706 with SMTP id 5b1f17b1804b1-483a962e3d4mr287053045e9.19.1772106702486; Thu, 26 Feb 2026 03:51:42 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v6 14/14] xen/riscv: implement sync_vcpu_execstate() Date: Thu, 26 Feb 2026 12:51:14 +0100 Message-ID: <9572c925ccbed3fa391b3a0c9d8eddad87c49ab7.1772016457.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The scheduler may call this function to force synchronization of given vCPU's state. RISC-V does not support lazy context switching, so nothing is done in sync_vcpu_execstate() and sync_local_execstate(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - It was something wrong with prev. rebase. Drop stubs for sync_local_execstate() and sync_vcpu_execstate() in this patch. --- Changes in v4: - Drop footer as [PATCH] sched: move vCPU exec state barriers is merged to upstream/staging. - Add Acked-by: Jan Beulich . --- Changes in v3: - Align sync_vcpu_execstate() with patch: [PATCH] sched: move vCPU exec state barriers --- Changes in v2: - New patch. --- xen/arch/riscv/domain.c | 10 ++++++++++ xen/arch/riscv/stubs.c | 10 ---------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index fda8cff90f6a..6e852d3b71c2 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -279,6 +279,16 @@ void vcpu_kick(struct vcpu *v) } } +void sync_local_execstate(void) +{ + /* Nothing to do -- no lazy switching */ +} + +void sync_vcpu_execstate(struct vcpu *v) +{ + /* Nothing to do -- no lazy switching */ +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 2f3a0ce76af9..acbb5b9123ea 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -91,16 +91,6 @@ void continue_running(struct vcpu *same) BUG_ON("unimplemented"); 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="jb9O67x7UBu89+m4" Content-Disposition: inline --jb9O67x7UBu89+m4 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 26 Feb 2026 14:17:16 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: xen-devel Cc: Juergen Gross , Boris Ostrovsky Subject: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 Hi, When testing Linux 7.0-rc1 in PV dom0, I hit the following panic sometimes: [ 436.849614] ------------[ cut here ]------------ [ 436.849669] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:78! [ 436.849693] Oops: invalid opcode: 0000 [#1] SMP NOPTI [ 436.849710] CPU: 3 UID: 0 PID: 4021 Comm: kworker/u25:1 Not tainted 7.0.= 0-0.rc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 [ 436.849729] Hardware name: Star Labs StarBook/StarBook, BIOS 8.97 10/03/= 2023 [ 436.849743] Workqueue: i915_flip intel_atomic_commit_work [i915] [ 436.850226] RIP: e030:xen_enter_lazy_mmu+0x24/0x30 [ 436.850245] Code: 90 90 90 90 90 90 f3 0f 1e fa 0f 1f 44 00 00 65 8b 05 = b8 e5 02 03 85 c0 75 10 65 c7 05 a9 e5 02 03 01 00 00 00 c3 cc cc cc cc <0f= > 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 [ 436.850270] RSP: e02b:ffffc90045727a68 EFLAGS: 00010202 [ 436.850283] RAX: 0000000000000001 RBX: ffff8881042fa6d0 RCX: 000fffffffe= 00000 [ 436.850296] RDX: 0000000000000001 RSI: ffff88810a5a2980 RDI: 00000000000= 00000 [ 436.850308] RBP: ffffc90049eda000 R08: ffffc90049edc000 R09: ffffc90049e= dc000 [ 436.850320] R10: ffffc90049edc000 R11: ffffc90049edbfff R12: ffffc90049e= dc000 [ 436.850332] R13: ffffc90045727bb0 R14: ffffc90045727b28 R15: 80000000000= 0006b [ 436.850356] FS: 0000000000000000(0000) GS:ffff888201e6e000(0000) knlGS:= 0000000000000000 [ 436.850371] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 436.850383] CR2: 00006543dbade250 CR3: 0000000115ef1000 CR4: 00000000000= 50660 [ 436.850401] Call Trace: [ 436.850410] [ 436.850420] vmap_pages_pud_range+0x47c/0x530 [ 436.850439] vmap_small_pages_range_noflush+0x1f1/0x2b0 [ 436.850451] ? __get_vm_area_node+0x10a/0x170 [ 436.850465] vmap+0x79/0xd0 [ 436.850476] i915_gem_object_map_page+0x13b/0x210 [i915] [ 436.850812] i915_gem_object_pin_map+0x1e2/0x210 [i915] [ 436.851123] i915_gem_object_pin_map_unlocked+0x2d/0xa0 [i915] [ 436.851424] intel_dsb_buffer_create+0xed/0x1a0 [i915] [ 436.851778] intel_dsb_prepare+0xca/0x1a0 [i915] [ 436.852110] intel_atomic_dsb_finish+0x92/0x350 [i915] [ 436.852456] intel_atomic_commit_tail+0x326/0xd40 [i915] [ 436.852769] process_one_work+0x18d/0x380 [ 436.852779] worker_thread+0x196/0x300 [ 436.852787] ? __pfx_worker_thread+0x10/0x10 [ 436.852796] kthread+0xe3/0x120 [ 436.852805] ? __pfx_kthread+0x10/0x10 [ 436.852815] ret_from_fork+0x19e/0x260 [ 436.852824] ? __pfx_kthread+0x10/0x10 [ 436.852832] ret_from_fork_asm+0x1a/0x30 [ 436.852842] [ 436.852847] Modules linked in: snd_seq_dummy snd_hrtimer snd_hda_codec_i= ntelhdmi snd_hda_codec_hdmi snd_hda_codec_alc269 snd_hda_codec_realtek_lib = snd_hda_scodec_component snd_hda_codec_generic snd_hda_intel snd_sof_pci_in= tel_tgl snd_sof_pci_intel_cnl snd_sof_intel_hda_generic soundwire_intel snd= _sof_intel_hda_sdw_bpt snd_sof_intel_hda_common snd_soc_hdac_hda snd_sof_in= tel_hda_mlink snd_sof_intel_hda soundwire_cadence snd_sof_pci snd_sof_xtens= a_dsp snd_sof snd_sof_utils snd_soc_acpi_intel_match snd_soc_acpi_intel_sdc= a_quirks soundwire_generic_allocation snd_soc_sdw_utils snd_soc_acpi crc8 i= ntel_rapl_msr soundwire_bus intel_rapl_common snd_soc_sdca snd_soc_avs snd_= soc_hda_codec snd_hda_ext_core snd_hda_codec vfat intel_uncore_frequency_co= mmon fat snd_hda_core snd_intel_dspcfg snd_intel_sdw_acpi snd_hwdep intel_p= owerclamp snd_soc_core iwlwifi snd_compress spi_nor iTCO_wdt ac97_bus intel= _pmc_bxt ee1004 mtd snd_pcm_dmaengine snd_seq cfg80211 snd_seq_device pcspk= r spi_intel_pci snd_pcm rfkill spi_intel snd_timer snd [ 436.852939] i2c_i801 soundcore i2c_smbus idma64 intel_pmc_core pmt_tele= metry pmt_discovery pmt_class intel_hid intel_pmc_ssram_telemetry intel_scu= _pltdrv sparse_keymap joydev loop fuse xenfs nfnetlink vsock_loopback vmw_v= sock_virtio_transport_common vmw_vsock_vmci_transport vsock zram vmw_vmci l= z4hc_compress lz4_compress dm_thin_pool dm_persistent_data dm_bio_prison dm= _crypt xe drm_ttm_helper drm_suballoc_helper gpu_sched drm_gpuvm drm_exec d= rm_gpusvm_helper i915 i2c_algo_bit drm_buddy hid_multitouch i2c_hid_acpi gh= ash_clmulni_intel video nvme wmi ttm i2c_hid nvme_core nvme_keyring drm_dis= play_helper nvme_auth xhci_pci pinctrl_tigerlake thunderbolt hkdf cec xhci_= hcd intel_vsec serio_raw xen_acpi_processor xen_privcmd xen_pciback xen_blk= back xen_gntalloc xen_gntdev xen_evtchn scsi_dh_rdac scsi_dh_emc scsi_dh_al= ua uinput i2c_dev [ 436.853183] ---[ end trace 0000000000000000 ]--- or this: [ 548.736884] ------------[ cut here ]------------ [ 548.736907] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:85! [ 548.736923] Oops: invalid opcode: 0000 [#1] SMP NOPTI [ 548.736935] CPU: 0 UID: 0 PID: 206 Comm: kworker/0:2 Not tainted 7.0.0-0= =2Erc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 [ 548.736949] Hardware name: LENOVO 2347A45/2347A45, BIOS CBET4000 Nitroke= y-v0.2.0-2608-ga649597 01/01/1970 [ 548.736962] Workqueue: events delayed_vfree_work [ 548.736976] RIP: e030:xen_leave_lazy_mmu+0x44/0x50 [ 548.736989] Code: 02 03 83 f8 01 75 23 65 c7 05 6c e4 02 03 00 00 00 00 = 65 ff 0d 7d b8 02 03 74 05 c3 cc cc cc cc e8 61 5d fd ff c3 cc cc cc cc <0f= > 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 [ 548.737010] RSP: e02b:ffffc90040607cf0 EFLAGS: 00010297 [ 548.737018] RAX: 0000000000000000 RBX: ffff888164a70408 RCX: 00000000000= 00000 [ 548.737029] RDX: 0000000000000000 RSI: 000ffffffffff000 RDI: ffff8881069= c0000 [ 548.737039] RBP: ffffc90049681000 R08: ffffc90049681000 R09: 00000000000= 00027 [ 548.737050] R10: 0000000000000027 R11: fefefefefefefeff R12: ffffc900496= 81000 [ 548.737060] R13: ffff8881002fd258 R14: 0000000000000000 R15: ffffc900406= 07dac [ 548.737079] FS: 0000000000000000(0000) GS:ffff8881f88ee000(0000) knlGS:= 0000000000000000 [ 548.737090] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 548.737099] CR2: 000055576c2e6058 CR3: 000000010d47b000 CR4: 00000000000= 50660 [ 548.737115] Call Trace: [ 548.737123] [ 548.737128] vunmap_pmd_range.isra.0+0x1f1/0x2e0 [ 548.737142] vunmap_p4d_range+0x17d/0x290 [ 548.737151] __vunmap_range_noflush+0x182/0x1d0 [ 548.737161] ? _raw_spin_unlock+0xe/0x30 [ 548.737171] remove_vm_area+0x40/0x70 [ 548.737180] vfree.part.0+0x1b/0x290 [ 548.737189] delayed_vfree_work+0x35/0x50 [ 548.737198] process_one_work+0x18d/0x380 [ 548.737207] worker_thread+0x196/0x300 [ 548.737215] ? __pfx_worker_thread+0x10/0x10 [ 548.737224] kthread+0xe3/0x120 [ 548.737233] ? __pfx_kthread+0x10/0x10 [ 548.737242] ret_from_fork+0x19e/0x260 [ 548.737250] ? __pfx_kthread+0x10/0x10 [ 548.737258] ret_from_fork_asm+0x1a/0x30 [ 548.737269] [ 548.737274] Modules linked in: vfat fat snd_seq_dummy snd_hrtimer ath9k = ath9k_common snd_hda_codec_intelhdmi snd_hda_codec_hdmi ath9k_hw snd_hda_co= dec_alc269 snd_hda_codec_realtek_lib snd_hda_scodec_component snd_hda_codec= _generic snd_hda_intel snd_hda_codec mac80211 snd_hda_core snd_intel_dspcfg= snd_intel_sdw_acpi snd_hwdep ath snd_seq snd_seq_device snd_ctl_led cfg802= 11 snd_pcm at24 thinkpad_acpi intel_rapl_msr i2c_i801 snd_timer sparse_keym= ap iTCO_wdt intel_rapl_common platform_profile intel_powerclamp intel_pmc_b= xt pcspkr i2c_smbus rfkill libarc4 snd soundcore mei_me e1000e mei joydev l= pc_ich loop fuse xenfs nfnetlink vsock_loopback vmw_vsock_virtio_transport_= common vmw_vsock_vmci_transport vsock zram vmw_vmci lz4hc_compress lz4_comp= ress dm_thin_pool dm_persistent_data dm_bio_prison dm_crypt i915 i2c_algo_b= it drm_buddy ghash_clmulni_intel ttm sdhci_pci drm_display_helper sdhci_uhs= 2 sdhci video xhci_pci cqhci wmi cec xhci_hcd ehci_pci mmc_core ehci_hcd se= rio_raw xen_acpi_processor xen_privcmd xen_pciback [ 548.737348] xen_blkback xen_gntalloc xen_gntdev xen_evtchn scsi_dh_rdac= scsi_dh_emc scsi_dh_alua uinput i2c_dev [ 548.737469] ---[ end trace 0000000000000000 ]--- I don't have clear pattern when this happens, one was during host suspend, but the other was during "normal" test run (starting/stopping domUs and running stuff around them). Note also one of those is Intel and the other AMD, so it isn't really hardware specific. Slightly more details with links (especially serial0.txt in the logs tab) at https://github.com/QubesOS/qubes-linux-kernel/pull/662#issuecomment-3963326= 188 Any idea? --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --jb9O67x7UBu89+m4 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmmgR9wACgkQ24/THMrX 1yxg2Qf9G9DFswU80py2OBvlxjpk7noidBL8Lna/eR6vwCKW0whEfD4nSQdOTUci JbYgN5e12asilIljv8JYzst5AyeCP1dvG3QYDglm3N/FEb6vUARFe27MRv9uOuC+ Ik6mFi494lnFHKl1rGegoOTuUvW/IvBQN0kcBE/QT+XfOX6UQ/mdIMR9/8cnVxR3 azfbWwUkzt1V37Xxwv5tVOXVW1LhvFDPFkEqUP4Tkv2xpNH71/3yCECjA0b5AGol h38XDq7PAhX07e8dlSw9pFUMh3BXtSy7rQzPoMFqdn0jYkAyjpMOugkLPOJQuJYX EQRAPeI/dgfSPcCJ3fhiq61XPSIPmQ== =/ZBR -----END PGP SIGNATURE----- --jb9O67x7UBu89+m4-- From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:21:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:21:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241661.1542639 (Exim 4.92) (envelope-from ) id 1vvbJE-0000Vb-SA; Thu, 26 Feb 2026 13:21:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241661.1542639; Thu, 26 Feb 2026 13:21:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJE-0000UE-LR; Thu, 26 Feb 2026 13:21:40 +0000 Received: by outflank-mailman (input) for mailman id 1241661; Thu, 26 Feb 2026 13:21:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJD-0000S3-LM for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 13:21:39 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 11f6616b-1316-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 14:21:34 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 2FF9A4281029; Thu, 26 Feb 2026 08:21:13 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 11f6616b-1316-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v5 0/2] Virtual NMI Date: Thu, 26 Feb 2026 13:20:41 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, the Xen hypervisor delivers NMIs to the guests using the Event Injection mechanism. The Event Injection mechanism does not block the delivery of subsequent NMIs. So, the Xen Hypervisor tracks the NMI delivery and its completion (by intercepting the IRET instruction) before sending a new NMI. With the 4th generation AMD EPYC, a hardware NMI virtualization support, Virtual NMI (VNMI), is introduced. The vNMI allows the hypervisor to inject the NMI into the guest w/o using Event Injection mechanism. No need to track the guest NMI and intercepting the IRET instruction. NMI Virtualization support is indicated by CPUID Fn8000_000A_EDX[VNMI] = 1.[1] NMI Virtualization is enabled by setting V_NMI_ENABLE (bit 26 in offset 60h of the VMCB). Enabling NMI Virtualization requires the NMI intercept bit to be set. An attempt to run a guest with V_NMI_ENABLE without the NMI intercept bit set results in #VMEXIT(INVALID) [1] Three new bits are added to the VMCB field at offset 60h to provide NMI virtualization hardware support: V_NMI(11): Indicates whether a virtual NMI is pending in the guest. The processor will clear V_NMI once it takes the virtual NMI. V_NMI_MASK(12): Indicates whether virtual NMIs are masked. The processor will set V_NMI_MASK once it takes the virtual NMI. V_NMI_MASK is cleared when the guest successfully completes an IRET instruction or #VMEXIT occurs while delivering the virtual NMI. V_NMI_ENABLE(26): Enables NMI virtualization. [1] [1] https://docs.amd.com/v/u/en-US/24593_3.43 --- Changes in v5: - Set vnmi_pending unconditionally in the svm_inject_nmi when VNMI is enabled. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2351537244 --- Changes in v4: - Delete the changes in svm_get_interrupt_shadow. The vNMI handling for multiple\concurrent NMIs should not be considered blocked if vnmi_pending and vnmi_blockking are set. - Fix formatting indentation in the svm_inject_nmi function. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2334257666 --- Changes in v3: - Delete the introduced hvm_function_table::vNMI boolean and all the 3 vNMI hooks, hvm_function_table::is_vnmi_enabled, hvm_function_table::is_vnmi_masked and hvm_function_table::set_vnmi_pending. - Use the HVM_INTR_SHADOW_NMI to indicate that the NMI is blocked rather than the usage of HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2327265341 --- Changes in v2: - Merge the patches for "svm/vnmi: introduce the vnmi bit support in the cpuid feature set" and "svm/vnmi: add the definitions for the svm vnmi management bits in the VMCB" into the one patch "x86/svm: Add Enumerations for the SVM virtual NMI". - Change the patch subject "svm/vnmi: Add support for the SVM Virtual NMI" to "x86/svm: Use virtual NMI when available" - Move the print out of the VNMI capability to the patch "x86/svm: Use virtual NMI when available" when it is being used. - Remove the hvm_intblk_vnmi enumeration that was introduced for the separate masked vNMI handling. - Introduce the hvm_function_table's is_vnmi_enabled callback to allow for the SVM implementation to verify that the VNMI is enabled by checking the VMCB bits in addition to the CPUID reported support. - Change the the name of the hvm_function_table's callback is_vnmi_pending to is_vnmi_masked. - The svm_inject_nmi function gains a check for the distinct NMI injection handling when the VNMI is enabled. - Simplify the check of AMD SVM Hardware support for the VNMI. The check cpu_has_svm_vnmi is performed unconditionally. - Simplify the introduced changes diff for the vintr_t union for the VNMI bits support. - Adopt the Xen formatting guidelines for the control structures. - CI tests: https://gitlab.com/xen-project/people/aabdelsa/xen/-/pipelines/2325298577 --- Abdelkareem Abdelsaamad (2): x86/svm: Add Enumerations for the SVM virtual NMI x86/svm: Use the virtual NMI when available xen/arch/x86/hvm/svm/intr.c | 8 ++++++++ xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/vmcb.c | 2 ++ xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 5 files changed, 19 insertions(+), 2 deletions(-) -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:21:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:21:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241660.1542633 (Exim 4.92) (envelope-from ) id 1vvbJE-0000SL-IC; Thu, 26 Feb 2026 13:21:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241660.1542633; Thu, 26 Feb 2026 13:21:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJE-0000SE-Fh; Thu, 26 Feb 2026 13:21:40 +0000 Received: by outflank-mailman (input) for mailman id 1241660; Thu, 26 Feb 2026 13:21:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJD-0000S3-0z for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 13:21:39 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1351fd05-1316-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 14:21:36 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 79281428102B; Thu, 26 Feb 2026 08:21:15 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1351fd05-1316-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v5 1/2] x86/svm: Add Enumerations for the SVM virtual NMI Date: Thu, 26 Feb 2026 13:20:42 +0000 Message-ID: X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD platforms. The feature support is indicated by the CPUID Fn8000_000A_EDX[25] = 1. Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the VMCB structure's vintr_t: vintr_t(11) - Virtual NMI is pending. vintr_t(12) - Virtual NMI is masked. vintr_t(26) - Enable NMI virtualization. Signed-off-by: Abdelkareem Abdelsaamad Reviewed-by: Teddy Astie Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/vmcb.h | 8 ++++++-- xen/arch/x86/include/asm/hvm/svm.h | 2 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 69f6047394..13ccfd3ff9 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -336,13 +336,17 @@ typedef union u64 tpr: 8; u64 irq: 1; u64 vgif: 1; - u64 rsvd0: 6; + u64 : 1; + u64 vnmi_pending: 1; + u64 vnmi_blocking:1; + u64 : 3; u64 prio: 4; u64 ign_tpr: 1; u64 rsvd1: 3; u64 intr_masking: 1; u64 vgif_enable: 1; - u64 rsvd2: 6; + u64 vnmi_enable: 1; + u64 : 5; u64 vector: 8; u64 rsvd3: 24; } fields; diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 15f0268be7..a35a61273b 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -37,6 +37,7 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_VGIF 16 /* Virtual GIF */ #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#define SVM_FEATURE_VNMI 25 /* Virtual NMI */ #define SVM_FEATURE_BUS_LOCK 29 /* Bus Lock Threshold */ static inline bool cpu_has_svm_feature(unsigned int feat) @@ -57,6 +58,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define cpu_has_svm_vnmi cpu_has_svm_feature(SVM_FEATURE_VNMI) #define cpu_has_svm_bus_lock cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK) #define MSR_INTERCEPT_NONE 0 -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:21:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:21:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241662.1542653 (Exim 4.92) (envelope-from ) id 1vvbJG-0000uC-Ur; Thu, 26 Feb 2026 13:21:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241662.1542653; Thu, 26 Feb 2026 13:21:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJG-0000u2-SB; Thu, 26 Feb 2026 13:21:42 +0000 Received: by outflank-mailman (input) for mailman id 1241662; Thu, 26 Feb 2026 13:21:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbJE-0000S3-LU for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 13:21:40 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 14539194-1316-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 14:21:38 +0100 (CET) Received: from fedora.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 270DF428102C; Thu, 26 Feb 2026 08:21:17 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 14539194-1316-11f1-9ccf-f158ae23cfc8 From: Abdelkareem Abdelsaamad To: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jbeulich@suse.com, jason.andryuk@amd.com, Abdelkareem Abdelsaamad Subject: [PATCH v5 2/2] x86/svm: Use the virtual NMI when available Date: Thu, 26 Feb 2026 13:20:43 +0000 Message-ID: <29068558780bd9c6182d7bd74b357acc44409bfe.1772109484.git.abdelkareem.abdelsaamad@citrix.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit With the Virtual NMI (vNMI), the pending NMI is simply stuffed into the VMCB and handed off to the hardware. There is no need for the artificial tracking of the NMI handling completion with the IRET instruction interception. Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware accelerated feature when the AMD platform supports the vNMI. Signed-off-by: Abdelkareem Abdelsaamad --- xen/arch/x86/hvm/svm/intr.c | 6 ++++++ xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/vmcb.c | 2 ++ 3 files changed, 9 insertions(+) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b85..112a393211 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -33,6 +33,12 @@ static void svm_inject_nmi(struct vcpu *v) u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); intinfo_t event; + if ( vmcb->_vintr.fields.vnmi_enable ) + { + vmcb->_vintr.fields.vnmi_pending = 1; + return; + } + event.raw = 0; event.v = true; event.type = X86_ET_NMI; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738..815565c33f 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2524,6 +2524,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index e583ef8548..e90bbac332 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; + return 0; } -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:27:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:27:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241717.1542664 (Exim 4.92) (envelope-from ) id 1vvbOq-000231-Kj; Thu, 26 Feb 2026 13:27:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman 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X-MS-Exchange-CrossTenant-Network-Message-Id: 2d0dd3cf-940d-438b-7b95-08de753ac55a X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2026 13:27:21.3390 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SSr36uwlfh5u8YNGuV/uJba9q+6cfludKX87tt9qCVnZOMCopfrVGbt+wS1dHtTGu2Fj3p35VY52uWMmVS9zz0hzfkwNE/MFk4dADTjgEks= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR03MB8134 On 26/02/2026 1:17 pm, Marek Marczykowski-G=C3=B3recki wrote: > Hi, > > When testing Linux 7.0-rc1 in PV dom0, I hit the following panic > sometimes: > > [ 436.849614] ------------[ cut here ]------------ > [ 436.849669] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:78! > [ 436.849693] Oops: invalid opcode: 0000 [#1] SMP NOPTI > [ 436.849710] CPU: 3 UID: 0 PID: 4021 Comm: kworker/u25:1 Not tainted 7.= 0.0-0.rc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 > [ 436.849729] Hardware name: Star Labs StarBook/StarBook, BIOS 8.97 10/0= 3/2023 > [ 436.849743] Workqueue: i915_flip intel_atomic_commit_work [i915] > [ 436.850226] RIP: e030:xen_enter_lazy_mmu+0x24/0x30 > [ 436.850245] Code: 90 90 90 90 90 90 f3 0f 1e fa 0f 1f 44 00 00 65 8b 0= 5 b8 e5 02 03 85 c0 75 10 65 c7 05 a9 e5 02 03 01 00 00 00 c3 cc cc cc cc <= 0f> 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 > [ 436.850270] RSP: e02b:ffffc90045727a68 EFLAGS: 00010202 > [ 436.850283] RAX: 0000000000000001 RBX: ffff8881042fa6d0 RCX: 000ffffff= fe00000 > [ 436.850296] RDX: 0000000000000001 RSI: ffff88810a5a2980 RDI: 000000000= 0000000 > [ 436.850308] RBP: ffffc90049eda000 R08: ffffc90049edc000 R09: ffffc9004= 9edc000 > [ 436.850320] R10: ffffc90049edc000 R11: ffffc90049edbfff R12: ffffc9004= 9edc000 > [ 436.850332] R13: ffffc90045727bb0 R14: ffffc90045727b28 R15: 800000000= 000006b > [ 436.850356] FS: 0000000000000000(0000) GS:ffff888201e6e000(0000) knlG= S:0000000000000000 > [ 436.850371] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 > [ 436.850383] CR2: 00006543dbade250 CR3: 0000000115ef1000 CR4: 000000000= 0050660 > [ 436.850401] Call Trace: > [ 436.850410] > [ 436.850420] vmap_pages_pud_range+0x47c/0x530 > [ 436.850439] vmap_small_pages_range_noflush+0x1f1/0x2b0 > [ 436.850451] ? __get_vm_area_node+0x10a/0x170 > [ 436.850465] vmap+0x79/0xd0 > [ 436.850476] i915_gem_object_map_page+0x13b/0x210 [i915] > [ 436.850812] i915_gem_object_pin_map+0x1e2/0x210 [i915] > [ 436.851123] i915_gem_object_pin_map_unlocked+0x2d/0xa0 [i915] > [ 436.851424] intel_dsb_buffer_create+0xed/0x1a0 [i915] > [ 436.851778] intel_dsb_prepare+0xca/0x1a0 [i915] > [ 436.852110] intel_atomic_dsb_finish+0x92/0x350 [i915] > [ 436.852456] intel_atomic_commit_tail+0x326/0xd40 [i915] > [ 436.852769] process_one_work+0x18d/0x380 > [ 436.852779] worker_thread+0x196/0x300 > [ 436.852787] ? __pfx_worker_thread+0x10/0x10 > [ 436.852796] kthread+0xe3/0x120 > [ 436.852805] ? __pfx_kthread+0x10/0x10 > [ 436.852815] ret_from_fork+0x19e/0x260 > [ 436.852824] ? __pfx_kthread+0x10/0x10 > [ 436.852832] ret_from_fork_asm+0x1a/0x30 > [ 436.852842] > [ 436.852847] Modules linked in: snd_seq_dummy snd_hrtimer snd_hda_codec= _intelhdmi snd_hda_codec_hdmi snd_hda_codec_alc269 snd_hda_codec_realtek_li= b snd_hda_scodec_component snd_hda_codec_generic snd_hda_intel snd_sof_pci_= intel_tgl snd_sof_pci_intel_cnl snd_sof_intel_hda_generic soundwire_intel s= nd_sof_intel_hda_sdw_bpt snd_sof_intel_hda_common snd_soc_hdac_hda snd_sof_= intel_hda_mlink snd_sof_intel_hda soundwire_cadence snd_sof_pci snd_sof_xte= nsa_dsp snd_sof snd_sof_utils snd_soc_acpi_intel_match snd_soc_acpi_intel_s= dca_quirks soundwire_generic_allocation snd_soc_sdw_utils snd_soc_acpi crc8= intel_rapl_msr soundwire_bus intel_rapl_common snd_soc_sdca snd_soc_avs sn= d_soc_hda_codec snd_hda_ext_core snd_hda_codec vfat intel_uncore_frequency_= common fat snd_hda_core snd_intel_dspcfg snd_intel_sdw_acpi snd_hwdep intel= _powerclamp snd_soc_core iwlwifi snd_compress spi_nor iTCO_wdt ac97_bus int= el_pmc_bxt ee1004 mtd snd_pcm_dmaengine snd_seq cfg80211 snd_seq_device pcs= pkr spi_intel_pci snd_pcm rfkill spi_intel snd_timer snd > [ 436.852939] i2c_i801 soundcore i2c_smbus idma64 intel_pmc_core pmt_te= lemetry pmt_discovery pmt_class intel_hid intel_pmc_ssram_telemetry intel_s= cu_pltdrv sparse_keymap joydev loop fuse xenfs nfnetlink vsock_loopback vmw= _vsock_virtio_transport_common vmw_vsock_vmci_transport vsock zram vmw_vmci= lz4hc_compress lz4_compress dm_thin_pool dm_persistent_data dm_bio_prison = dm_crypt xe drm_ttm_helper drm_suballoc_helper gpu_sched drm_gpuvm drm_exec= drm_gpusvm_helper i915 i2c_algo_bit drm_buddy hid_multitouch i2c_hid_acpi = ghash_clmulni_intel video nvme wmi ttm i2c_hid nvme_core nvme_keyring drm_d= isplay_helper nvme_auth xhci_pci pinctrl_tigerlake thunderbolt hkdf cec xhc= i_hcd intel_vsec serio_raw xen_acpi_processor xen_privcmd xen_pciback xen_b= lkback xen_gntalloc xen_gntdev xen_evtchn scsi_dh_rdac scsi_dh_emc scsi_dh_= alua uinput i2c_dev > [ 436.853183] ---[ end trace 0000000000000000 ]--- > > or this: > > [ 548.736884] ------------[ cut here ]------------ > [ 548.736907] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:85! > [ 548.736923] Oops: invalid opcode: 0000 [#1] SMP NOPTI > [ 548.736935] CPU: 0 UID: 0 PID: 206 Comm: kworker/0:2 Not tainted 7.0.0= -0.rc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 > [ 548.736949] Hardware name: LENOVO 2347A45/2347A45, BIOS CBET4000 Nitro= key-v0.2.0-2608-ga649597 01/01/1970 > [ 548.736962] Workqueue: events delayed_vfree_work > [ 548.736976] RIP: e030:xen_leave_lazy_mmu+0x44/0x50 > [ 548.736989] Code: 02 03 83 f8 01 75 23 65 c7 05 6c e4 02 03 00 00 00 0= 0 65 ff 0d 7d b8 02 03 74 05 c3 cc cc cc cc e8 61 5d fd ff c3 cc cc cc cc <= 0f> 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 > [ 548.737010] RSP: e02b:ffffc90040607cf0 EFLAGS: 00010297 > [ 548.737018] RAX: 0000000000000000 RBX: ffff888164a70408 RCX: 000000000= 0000000 > [ 548.737029] RDX: 0000000000000000 RSI: 000ffffffffff000 RDI: ffff88810= 69c0000 > [ 548.737039] RBP: ffffc90049681000 R08: ffffc90049681000 R09: 000000000= 0000027 > [ 548.737050] R10: 0000000000000027 R11: fefefefefefefeff R12: ffffc9004= 9681000 > [ 548.737060] R13: ffff8881002fd258 R14: 0000000000000000 R15: ffffc9004= 0607dac > [ 548.737079] FS: 0000000000000000(0000) GS:ffff8881f88ee000(0000) knlG= S:0000000000000000 > [ 548.737090] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 > [ 548.737099] CR2: 000055576c2e6058 CR3: 000000010d47b000 CR4: 000000000= 0050660 > [ 548.737115] Call Trace: > [ 548.737123] > [ 548.737128] vunmap_pmd_range.isra.0+0x1f1/0x2e0 > [ 548.737142] vunmap_p4d_range+0x17d/0x290 > [ 548.737151] __vunmap_range_noflush+0x182/0x1d0 > [ 548.737161] ? _raw_spin_unlock+0xe/0x30 > [ 548.737171] remove_vm_area+0x40/0x70 > [ 548.737180] vfree.part.0+0x1b/0x290 > [ 548.737189] delayed_vfree_work+0x35/0x50 > [ 548.737198] process_one_work+0x18d/0x380 > [ 548.737207] worker_thread+0x196/0x300 > [ 548.737215] ? __pfx_worker_thread+0x10/0x10 > [ 548.737224] kthread+0xe3/0x120 > [ 548.737233] ? __pfx_kthread+0x10/0x10 > [ 548.737242] ret_from_fork+0x19e/0x260 > [ 548.737250] ? __pfx_kthread+0x10/0x10 > [ 548.737258] ret_from_fork_asm+0x1a/0x30 > [ 548.737269] > [ 548.737274] Modules linked in: vfat fat snd_seq_dummy snd_hrtimer ath9= k ath9k_common snd_hda_codec_intelhdmi snd_hda_codec_hdmi ath9k_hw snd_hda_= codec_alc269 snd_hda_codec_realtek_lib snd_hda_scodec_component snd_hda_cod= ec_generic snd_hda_intel snd_hda_codec mac80211 snd_hda_core snd_intel_dspc= fg snd_intel_sdw_acpi snd_hwdep ath snd_seq snd_seq_device snd_ctl_led cfg8= 0211 snd_pcm at24 thinkpad_acpi intel_rapl_msr i2c_i801 snd_timer sparse_ke= ymap iTCO_wdt intel_rapl_common platform_profile intel_powerclamp intel_pmc= _bxt pcspkr i2c_smbus rfkill libarc4 snd soundcore mei_me e1000e mei joydev= lpc_ich loop fuse xenfs nfnetlink vsock_loopback vmw_vsock_virtio_transpor= t_common vmw_vsock_vmci_transport vsock zram vmw_vmci lz4hc_compress lz4_co= mpress dm_thin_pool dm_persistent_data dm_bio_prison dm_crypt i915 i2c_algo= _bit drm_buddy ghash_clmulni_intel ttm sdhci_pci drm_display_helper sdhci_u= hs2 sdhci video xhci_pci cqhci wmi cec xhci_hcd ehci_pci mmc_core ehci_hcd = serio_raw xen_acpi_processor xen_privcmd xen_pciback > [ 548.737348] xen_blkback xen_gntalloc xen_gntdev xen_evtchn scsi_dh_rd= ac scsi_dh_emc scsi_dh_alua uinput i2c_dev > [ 548.737469] ---[ end trace 0000000000000000 ]--- > > I don't have clear pattern when this happens, one was during host > suspend, but the other was during "normal" test run (starting/stopping > domUs and running stuff around them). Note also one of those is Intel > and the other AMD, so it isn't really hardware specific. > > Slightly more details with links (especially serial0.txt in the logs > tab) at > https://github.com/QubesOS/qubes-linux-kernel/pull/662#issuecomment-39633= 26188 > > Any idea? > That looks like the issue Juergen fixed with: https://lore.kernel.org/xen-devel/20260220123715.834848-1-jgross@suse.com/ ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:37:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:37:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241760.1542674 (Exim 4.92) (envelope-from ) id 1vvbY9-0003jE-Le; Thu, 26 Feb 2026 13:37:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241760.1542674; Thu, 26 Feb 2026 13:37:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by 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rghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujf gurhepfffhvfevuffkfhggtggujgesghdtreertddtjeenucfhrhhomhepofgrrhgvkhcu ofgrrhgtiiihkhhofihskhhiqdfikphrvggtkhhiuceomhgrrhhmrghrvghksehinhhvih hsihgslhgvthhhihhnghhslhgrsgdrtghomheqnecuggftrfgrthhtvghrnhepvdeigeef gfeijeeuudethfffheejgeejveeutdegudetueejteevveduveeiffeknecuffhomhgrih hnpehgihhthhhusgdrtghomhdpkhgvrhhnvghlrdhorhhgnecuvehluhhsthgvrhfuihii vgeptdenucfrrghrrghmpehmrghilhhfrhhomhepmhgrrhhmrghrvghksehinhhvihhsih gslhgvthhhihhnghhslhgrsgdrtghomhdpnhgspghrtghpthhtohepgedpmhhouggvpehs mhhtphhouhhtpdhrtghpthhtoheprghnughrvgifrdgtohhophgvrhefsegtihhtrhhigi drtghomhdprhgtphhtthhopeigvghnqdguvghvvghlsehlihhsthhsrdigvghnphhrohhj vggtthdrohhrghdprhgtphhtthhopehjghhrohhsshesshhushgvrdgtohhmpdhrtghpth htohepsghorhhishdrohhsthhrohhvshhkhiesohhrrggtlhgvrdgtohhm X-ME-Proxy: Feedback-ID: i1568416f:Fastmail Date: Thu, 26 Feb 2026 14:36:57 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Andrew Cooper Cc: xen-devel , Juergen Gross , Boris Ostrovsky Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 Message-ID: References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="IRzm8mZXD+3zdZ1l" Content-Disposition: inline In-Reply-To: --IRzm8mZXD+3zdZ1l Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 26 Feb 2026 14:36:57 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Andrew Cooper Cc: xen-devel , Juergen Gross , Boris Ostrovsky Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 On Thu, Feb 26, 2026 at 01:27:17PM +0000, Andrew Cooper wrote: > On 26/02/2026 1:17 pm, Marek Marczykowski-G=C3=B3recki wrote: > > Hi, > > > > When testing Linux 7.0-rc1 in PV dom0, I hit the following panic > > sometimes: > > > > [ 436.849614] ------------[ cut here ]------------ > > [ 436.849669] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:78! > > [ 436.849693] Oops: invalid opcode: 0000 [#1] SMP NOPTI > > [ 436.849710] CPU: 3 UID: 0 PID: 4021 Comm: kworker/u25:1 Not tainted = 7.0.0-0.rc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 > > [ 436.849729] Hardware name: Star Labs StarBook/StarBook, BIOS 8.97 10= /03/2023 > > [ 436.849743] Workqueue: i915_flip intel_atomic_commit_work [i915] > > [ 436.850226] RIP: e030:xen_enter_lazy_mmu+0x24/0x30 > > [ 436.850245] Code: 90 90 90 90 90 90 f3 0f 1e fa 0f 1f 44 00 00 65 8b= 05 b8 e5 02 03 85 c0 75 10 65 c7 05 a9 e5 02 03 01 00 00 00 c3 cc cc cc cc= <0f> 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 > > [ 436.850270] RSP: e02b:ffffc90045727a68 EFLAGS: 00010202 > > [ 436.850283] RAX: 0000000000000001 RBX: ffff8881042fa6d0 RCX: 000ffff= fffe00000 > > [ 436.850296] RDX: 0000000000000001 RSI: ffff88810a5a2980 RDI: 0000000= 000000000 > > [ 436.850308] RBP: ffffc90049eda000 R08: ffffc90049edc000 R09: ffffc90= 049edc000 > > [ 436.850320] R10: ffffc90049edc000 R11: ffffc90049edbfff R12: ffffc90= 049edc000 > > [ 436.850332] R13: ffffc90045727bb0 R14: ffffc90045727b28 R15: 8000000= 00000006b > > [ 436.850356] FS: 0000000000000000(0000) GS:ffff888201e6e000(0000) kn= lGS:0000000000000000 > > [ 436.850371] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 > > [ 436.850383] CR2: 00006543dbade250 CR3: 0000000115ef1000 CR4: 0000000= 000050660 > > [ 436.850401] Call Trace: > > [ 436.850410] > > [ 436.850420] vmap_pages_pud_range+0x47c/0x530 > > [ 436.850439] vmap_small_pages_range_noflush+0x1f1/0x2b0 > > [ 436.850451] ? __get_vm_area_node+0x10a/0x170 > > [ 436.850465] vmap+0x79/0xd0 > > [ 436.850476] i915_gem_object_map_page+0x13b/0x210 [i915] > > [ 436.850812] i915_gem_object_pin_map+0x1e2/0x210 [i915] > > [ 436.851123] i915_gem_object_pin_map_unlocked+0x2d/0xa0 [i915] > > [ 436.851424] intel_dsb_buffer_create+0xed/0x1a0 [i915] > > [ 436.851778] intel_dsb_prepare+0xca/0x1a0 [i915] > > [ 436.852110] intel_atomic_dsb_finish+0x92/0x350 [i915] > > [ 436.852456] intel_atomic_commit_tail+0x326/0xd40 [i915] > > [ 436.852769] process_one_work+0x18d/0x380 > > [ 436.852779] worker_thread+0x196/0x300 > > [ 436.852787] ? __pfx_worker_thread+0x10/0x10 > > [ 436.852796] kthread+0xe3/0x120 > > [ 436.852805] ? __pfx_kthread+0x10/0x10 > > [ 436.852815] ret_from_fork+0x19e/0x260 > > [ 436.852824] ? __pfx_kthread+0x10/0x10 > > [ 436.852832] ret_from_fork_asm+0x1a/0x30 > > [ 436.852842] > > [ 436.852847] Modules linked in: snd_seq_dummy snd_hrtimer snd_hda_cod= ec_intelhdmi snd_hda_codec_hdmi snd_hda_codec_alc269 snd_hda_codec_realtek_= lib snd_hda_scodec_component snd_hda_codec_generic snd_hda_intel snd_sof_pc= i_intel_tgl snd_sof_pci_intel_cnl snd_sof_intel_hda_generic soundwire_intel= snd_sof_intel_hda_sdw_bpt snd_sof_intel_hda_common snd_soc_hdac_hda snd_so= f_intel_hda_mlink snd_sof_intel_hda soundwire_cadence snd_sof_pci snd_sof_x= tensa_dsp snd_sof snd_sof_utils snd_soc_acpi_intel_match snd_soc_acpi_intel= _sdca_quirks soundwire_generic_allocation snd_soc_sdw_utils snd_soc_acpi cr= c8 intel_rapl_msr soundwire_bus intel_rapl_common snd_soc_sdca snd_soc_avs = snd_soc_hda_codec snd_hda_ext_core snd_hda_codec vfat intel_uncore_frequenc= y_common fat snd_hda_core snd_intel_dspcfg snd_intel_sdw_acpi snd_hwdep int= el_powerclamp snd_soc_core iwlwifi snd_compress spi_nor iTCO_wdt ac97_bus i= ntel_pmc_bxt ee1004 mtd snd_pcm_dmaengine snd_seq cfg80211 snd_seq_device p= cspkr spi_intel_pci snd_pcm rfkill spi_intel snd_timer snd > > [ 436.852939] i2c_i801 soundcore i2c_smbus idma64 intel_pmc_core pmt_= telemetry pmt_discovery pmt_class intel_hid intel_pmc_ssram_telemetry intel= _scu_pltdrv sparse_keymap joydev loop fuse xenfs nfnetlink vsock_loopback v= mw_vsock_virtio_transport_common vmw_vsock_vmci_transport vsock zram vmw_vm= ci lz4hc_compress lz4_compress dm_thin_pool dm_persistent_data dm_bio_priso= n dm_crypt xe drm_ttm_helper drm_suballoc_helper gpu_sched drm_gpuvm drm_ex= ec drm_gpusvm_helper i915 i2c_algo_bit drm_buddy hid_multitouch i2c_hid_acp= i ghash_clmulni_intel video nvme wmi ttm i2c_hid nvme_core nvme_keyring drm= _display_helper nvme_auth xhci_pci pinctrl_tigerlake thunderbolt hkdf cec x= hci_hcd intel_vsec serio_raw xen_acpi_processor xen_privcmd xen_pciback xen= _blkback xen_gntalloc xen_gntdev xen_evtchn scsi_dh_rdac scsi_dh_emc scsi_d= h_alua uinput i2c_dev > > [ 436.853183] ---[ end trace 0000000000000000 ]--- > > > > or this: > > > > [ 548.736884] ------------[ cut here ]------------ > > [ 548.736907] kernel BUG at arch/x86/include/asm/xen/hypervisor.h:85! > > [ 548.736923] Oops: invalid opcode: 0000 [#1] SMP NOPTI > > [ 548.736935] CPU: 0 UID: 0 PID: 206 Comm: kworker/0:2 Not tainted 7.0= =2E0-0.rc1.1.qubes.1001.fc41.x86_64 #1 PREEMPT(full)=20 > > [ 548.736949] Hardware name: LENOVO 2347A45/2347A45, BIOS CBET4000 Nit= rokey-v0.2.0-2608-ga649597 01/01/1970 > > [ 548.736962] Workqueue: events delayed_vfree_work > > [ 548.736976] RIP: e030:xen_leave_lazy_mmu+0x44/0x50 > > [ 548.736989] Code: 02 03 83 f8 01 75 23 65 c7 05 6c e4 02 03 00 00 00= 00 65 ff 0d 7d b8 02 03 74 05 c3 cc cc cc cc e8 61 5d fd ff c3 cc cc cc cc= <0f> 0b 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 > > [ 548.737010] RSP: e02b:ffffc90040607cf0 EFLAGS: 00010297 > > [ 548.737018] RAX: 0000000000000000 RBX: ffff888164a70408 RCX: 0000000= 000000000 > > [ 548.737029] RDX: 0000000000000000 RSI: 000ffffffffff000 RDI: ffff888= 1069c0000 > > [ 548.737039] RBP: ffffc90049681000 R08: ffffc90049681000 R09: 0000000= 000000027 > > [ 548.737050] R10: 0000000000000027 R11: fefefefefefefeff R12: ffffc90= 049681000 > > [ 548.737060] R13: ffff8881002fd258 R14: 0000000000000000 R15: ffffc90= 040607dac > > [ 548.737079] FS: 0000000000000000(0000) GS:ffff8881f88ee000(0000) kn= lGS:0000000000000000 > > [ 548.737090] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 > > [ 548.737099] CR2: 000055576c2e6058 CR3: 000000010d47b000 CR4: 0000000= 000050660 > > [ 548.737115] Call Trace: > > [ 548.737123] > > [ 548.737128] vunmap_pmd_range.isra.0+0x1f1/0x2e0 > > [ 548.737142] vunmap_p4d_range+0x17d/0x290 > > [ 548.737151] __vunmap_range_noflush+0x182/0x1d0 > > [ 548.737161] ? _raw_spin_unlock+0xe/0x30 > > [ 548.737171] remove_vm_area+0x40/0x70 > > [ 548.737180] vfree.part.0+0x1b/0x290 > > [ 548.737189] delayed_vfree_work+0x35/0x50 > > [ 548.737198] process_one_work+0x18d/0x380 > > [ 548.737207] worker_thread+0x196/0x300 > > [ 548.737215] ? __pfx_worker_thread+0x10/0x10 > > [ 548.737224] kthread+0xe3/0x120 > > [ 548.737233] ? __pfx_kthread+0x10/0x10 > > [ 548.737242] ret_from_fork+0x19e/0x260 > > [ 548.737250] ? __pfx_kthread+0x10/0x10 > > [ 548.737258] ret_from_fork_asm+0x1a/0x30 > > [ 548.737269] > > [ 548.737274] Modules linked in: vfat fat snd_seq_dummy snd_hrtimer at= h9k ath9k_common snd_hda_codec_intelhdmi snd_hda_codec_hdmi ath9k_hw snd_hd= a_codec_alc269 snd_hda_codec_realtek_lib snd_hda_scodec_component snd_hda_c= odec_generic snd_hda_intel snd_hda_codec mac80211 snd_hda_core snd_intel_ds= pcfg snd_intel_sdw_acpi snd_hwdep ath snd_seq snd_seq_device snd_ctl_led cf= g80211 snd_pcm at24 thinkpad_acpi intel_rapl_msr i2c_i801 snd_timer sparse_= keymap iTCO_wdt intel_rapl_common platform_profile intel_powerclamp intel_p= mc_bxt pcspkr i2c_smbus rfkill libarc4 snd soundcore mei_me e1000e mei joyd= ev lpc_ich loop fuse xenfs nfnetlink vsock_loopback vmw_vsock_virtio_transp= ort_common vmw_vsock_vmci_transport vsock zram vmw_vmci lz4hc_compress lz4_= compress dm_thin_pool dm_persistent_data dm_bio_prison dm_crypt i915 i2c_al= go_bit drm_buddy ghash_clmulni_intel ttm sdhci_pci drm_display_helper sdhci= _uhs2 sdhci video xhci_pci cqhci wmi cec xhci_hcd ehci_pci mmc_core ehci_hc= d serio_raw xen_acpi_processor xen_privcmd xen_pciback > > [ 548.737348] xen_blkback xen_gntalloc xen_gntdev xen_evtchn scsi_dh_= rdac scsi_dh_emc scsi_dh_alua uinput i2c_dev > > [ 548.737469] ---[ end trace 0000000000000000 ]--- > > > > I don't have clear pattern when this happens, one was during host > > suspend, but the other was during "normal" test run (starting/stopping > > domUs and running stuff around them). Note also one of those is Intel > > and the other AMD, so it isn't really hardware specific. > > > > Slightly more details with links (especially serial0.txt in the logs > > tab) at > > https://github.com/QubesOS/qubes-linux-kernel/pull/662#issuecomment-396= 3326188 > > > > Any idea? > > >=20 > That looks like the issue Juergen fixed with: >=20 > https://lore.kernel.org/xen-devel/20260220123715.834848-1-jgross@suse.com/ The commit message says it's about booting PV guest, here the crash is significantly later. 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Thu, 26 Feb 2026 05:39:47 -0800 (PST) Message-ID: <417d3b12-91f3-405c-aad7-d74bedb67a80@suse.com> Date: Thu, 26 Feb 2026 14:39:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/2] x86/svm: Add Enumerations for the SVM virtual NMI To: Abdelkareem Abdelsaamad Cc: roger.pau@citrix.com, teddy.astie@vates.tech, jason.andryuk@amd.com, andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.02.2026 14:20, Abdelkareem Abdelsaamad wrote: > Introduce the cpuid bit for the SVM vNMI feature support for the x86\AMD > platforms. The feature support is indicated by the CPUID > Fn8000_000A_EDX[25] = 1. > > Add defines for the three SVM's Virtual NMI (vNMI) managements bits in the > VMCB structure's vintr_t: > > vintr_t(11) - Virtual NMI is pending. > vintr_t(12) - Virtual NMI is masked. > vintr_t(26) - Enable NMI virtualization. > > Signed-off-by: Abdelkareem Abdelsaamad > Reviewed-by: Teddy Astie > Acked-by: Jan Beulich This was committed already; please post only patches applicable to the tip of staging. Jan From xen-devel-bounces@lists.xenproject.org Thu Feb 26 13:41:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 13:41:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241779.1542695 (Exim 4.92) (envelope-from ) id 1vvbcF-0005oc-CX; Thu, 26 Feb 2026 13:41:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241779.1542695; Thu, 26 Feb 2026 13:41:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbcF-0005oV-8O; Thu, 26 Feb 2026 13:41:19 +0000 Received: by outflank-mailman (input) for mailman id 1241779; Thu, 26 Feb 2026 13:41:17 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvbcD-0005oL-CZ for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 13:41:17 +0000 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [2a00:1450:4864:20::52d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d1c34b30-1318-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 14:41:14 +0100 (CET) Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-65f771c6b89so1324228a12.3 for ; Thu, 26 Feb 2026 05:41:14 -0800 (PST) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Message-ID: Date: Thu, 26 Feb 2026 14:41:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 To: Andrew Cooper , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel Cc: Boris Ostrovsky References: Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 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ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------Lyie7UzdP4eiqNcARuquM7fO" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------Lyie7UzdP4eiqNcARuquM7fO Content-Type: multipart/mixed; boundary="------------0lWbT40lvoqZA9s4ATByEDHC"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Andrew Cooper , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel Cc: Boris Ostrovsky Message-ID: Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 References: In-Reply-To: --------------0lWbT40lvoqZA9s4ATByEDHC Content-Type: multipart/mixed; boundary="------------O0fJZSWWHUkYdIhq0WB3UwUE" --------------O0fJZSWWHUkYdIhq0WB3UwUE Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 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xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:32:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:32:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241822.1542716 (Exim 4.92) (envelope-from ) id 1vvcQ0-0003xh-3x; Thu, 26 Feb 2026 14:32:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241822.1542716; Thu, 26 Feb 2026 14:32:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcQ0-0003xa-0z; Thu, 26 Feb 2026 14:32:44 +0000 Received: by outflank-mailman (input) for mailman id 1241822; Thu, 26 Feb 2026 14:32:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcPz-0003xU-6L for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:32:43 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ff1aa8e9-131f-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 15:32:37 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 0AA59427FB2E; Thu, 26 Feb 2026 09:32:15 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ff1aa8e9-131f-11f1-9ccf-f158ae23cfc8 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , Juergen Gross , Christian Lindig , David Scott Subject: [PATCH v4 0/10] xen: Add NUMA-aware memory claims for domains Date: Thu, 26 Feb 2026 14:29:14 +0000 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This series introduces NUMA-aware memory claims. Xen allocates the claimed memory only for allocations from domains with a claim for this memory. The new hypercall API is designed to support staking claims on multiple NUMA nodes for a domain. It provides a foundation that can be extended to support multi-node claims without changing the hypercall API. Patch Structure: 1. xen/page_alloc: Extract claim consumption on allocation into static inline 2. xen/page_alloc: Add per-node free page counts; make counters unsigned long 3. xen/page_alloc: Add the implementation of NUMA-node-specific claims 4. xen/page_alloc: Consolidate per-node counters into avail[node][maxzone+x] Is optional: transparent, no functional change, not needed 5. xen/domain: Add the XEN_DOMCTL_claim_memory hypercall handler 6. xsm/flask: Add a Flask security policy for the new hypercall 7. libs/ctrl/xc: Add the libxenctrl API xc_domain_claim_memory() 8. ocaml/libx/xc: Add the OCaml binding for xc_domain_claim_memory() 9. tools/tests: Add testing per-node claims and claims protection 10. doc/guest-guide: Add comprehensive API documentation The updated guest-guide is deployed here for reviewing the created output: https://bernhardk-xen-review.readthedocs.io/v4.22-claims.v4/guest-guide/ Changes in v4: - The logic for adjusting claimed pages on allocation has been completely reworked to align with recent upstream changes. (Roger Pau Monné) - The check for node memory availability has been replaced with a corrected implementation. (Marcus Granado, Roger Pau Monné, Bernhard Kaindl) - The new hypercall API patch has been refactored and split into separate patches for the DOMCTL, Flask policy, and libxenctrl implementation. - Added initial tests and Sphinx documentation for the new API. - With improvements and rebasing on upstream changes, this series has changed very much. Reviewing it as a whole is recommended over an incremental review. Credits: - Alejandro Vallejo developed the initial version - Roger Pau Monné updated the implementation and upstreamed key improvements - Marcus Granado contributed analysis and suggestions during development - Bernhard Kaindl developed the new domctl API, extended tests and documentation and developed the refactored handler for consuming claims on allocation. Comments and feedback welcome. Bernhard Kaindl (10): xen/page_alloc: Extract code for consuming claims into inline function xen/page_alloc: Optimize getting per-NUMA-node free page counts xen/page_alloc: Implement NUMA-node-specific claims xen/page_alloc: Consolidate per-node counters into avail[] array xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness xsm/flask: Add XEN_DOMCTL_claim_memory to flask tools/lib/ctrl/xc: Add xc_domain_claim_memory() to libxenctrl tools/ocaml/libs/xc: add OCaml domain_claim_memory binding tools/tests: Update the claims test to test claim_memory hypercall docs/guest-guide: document the memory claim hypercalls .readthedocs.yaml | 13 +- docs/conf.py | 6 +- .../dom/DOMCTL_claim_memory-classes.mmd | 51 ++++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 ++ .../dom/DOMCTL_claim_memory-workflow.mmd | 23 ++ docs/guest-guide/dom/DOMCTL_claim_memory.rst | 125 ++++++++ docs/guest-guide/dom/index.rst | 14 + docs/guest-guide/index.rst | 23 ++ docs/guest-guide/mem/XENMEM_claim_pages.rst | 68 +++++ docs/guest-guide/mem/index.rst | 12 + docs/hypervisor-guide/index.rst | 5 + docs/hypervisor-guide/mm/claims.rst | 114 +++++++ docs/hypervisor-guide/mm/index.rst | 10 + tools/flask/policy/modules/dom0.te | 1 + tools/flask/policy/modules/xen.if | 1 + tools/include/xenctrl.h | 4 + tools/libs/ctrl/xc_domain.c | 27 ++ tools/ocaml/libs/xc/xenctrl.ml | 11 + tools/ocaml/libs/xc/xenctrl.mli | 11 + tools/ocaml/libs/xc/xenctrl_stubs.c | 43 +++ tools/tests/mem-claim/test-mem-claim.c | 277 ++++++++++++++++-- xen/common/domain.c | 32 +- xen/common/domctl.c | 9 + xen/common/memory.c | 3 +- xen/common/page_alloc.c | 254 +++++++++++++--- xen/include/public/domctl.h | 38 +++ xen/include/xen/domain.h | 2 + xen/include/xen/mm.h | 4 +- xen/include/xen/sched.h | 1 + xen/xsm/flask/hooks.c | 3 + xen/xsm/flask/policy/access_vectors | 2 + 31 files changed, 1134 insertions(+), 76 deletions(-) create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-classes.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst create mode 100644 docs/hypervisor-guide/mm/claims.rst create mode 100644 docs/hypervisor-guide/mm/index.rst -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:35:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:35:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241848.1542726 (Exim 4.92) (envelope-from ) id 1vvcSH-0004W0-EY; Thu, 26 Feb 2026 14:35:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241848.1542726; Thu, 26 Feb 2026 14:35:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcSH-0004Vt-Bk; Thu, 26 Feb 2026 14:35:05 +0000 Received: by outflank-mailman (input) for mailman id 1241848; Thu, 26 Feb 2026 14:35:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcSF-0004VT-U5 for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:35:03 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 55065a17-1320-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 15:35:01 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 84C00814F34A; Thu, 26 Feb 2026 09:34:29 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 55065a17-1320-11f1-9ccf-f158ae23cfc8 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 01/10] xen/page_alloc: Extract code for consuming claims into inline function Date: Thu, 26 Feb 2026 14:29:15 +0000 Message-Id: <7dd887bc26830d6c50e5bc2606391963e65285a1.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Refactor the claims consumption code in preparation for node-claims. Lays the groundwork for adding the consumption of NUMA claims to it. Signed-off-by: Bernhard Kaindl --- xen/common/page_alloc.c | 56 +++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 25 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 588b5b99cbc7..6f7f30c64605 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -518,6 +518,34 @@ unsigned long domain_adjust_tot_pages(struct domain *d, long pages) return d->tot_pages; } +/* Release outstanding claims on the domain, host and later also node */ +static inline +void release_outstanding_claims(struct domain *d, unsigned long release) +{ + ASSERT(spin_is_locked(&heap_lock)); + BUG_ON(outstanding_claims < release); + outstanding_claims -= release; + d->outstanding_pages -= release; +} + +/* + * Consume outstanding claimed pages when allocating pages for a domain. + * NB. The alloc could (in principle) fail in assign_pages() afterwards. In that + * case, the consumption is not reversed, but as claims are used only during + * domain build and d is destroyed if the build fails, this has no significance. + */ +static inline +void consume_outstanding_claims(struct domain *d, unsigned long allocation) +{ + if ( !d || !d->outstanding_pages ) + return; + ASSERT(spin_is_locked(&heap_lock)); + + /* Of course, the domain can only release up its outstanding claims */ + allocation = min(allocation, d->outstanding_pages + 0UL); + release_outstanding_claims(d, allocation); +} + int domain_set_outstanding_pages(struct domain *d, unsigned long pages) { int ret = -ENOMEM; @@ -535,8 +563,7 @@ int domain_set_outstanding_pages(struct domain *d, unsigned long pages) /* pages==0 means "unset" the claim. */ if ( pages == 0 ) { - outstanding_claims -= d->outstanding_pages; - d->outstanding_pages = 0; + release_outstanding_claims(d, d->outstanding_pages); ret = 0; goto out; } @@ -1048,29 +1075,8 @@ static struct page_info *alloc_heap_pages( total_avail_pages -= request; ASSERT(total_avail_pages >= 0); - if ( d && d->outstanding_pages && !(memflags & MEMF_no_refcount) ) - { - /* - * Adjust claims in the same locked region where total_avail_pages is - * adjusted, not doing so would lead to a window where the amount of - * free memory (avail - claimed) would be incorrect. - * - * Note that by adjusting the claimed amount here it's possible for - * pages to fail to be assigned to the claiming domain while already - * having been subtracted from d->outstanding_pages. Such claimed - * amount is then lost, as the pages that fail to be assigned to the - * domain are freed without replenishing the claim. This is fine given - * claims are only to be used during physmap population as part of - * domain build, and any failure in assign_pages() there will result in - * the domain being destroyed before creation is finished. Losing part - * of the claim makes no difference. - */ - unsigned long outstanding = min(d->outstanding_pages + 0UL, request); - - BUG_ON(outstanding > outstanding_claims); - outstanding_claims -= outstanding; - d->outstanding_pages -= outstanding; - } + if ( !(memflags & MEMF_no_refcount) ) + consume_outstanding_claims(d, request); check_low_mem_virq(); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:40:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:40:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241883.1542736 (Exim 4.92) (envelope-from ) id 1vvcXP-00066r-0A; Thu, 26 Feb 2026 14:40:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241883.1542736; Thu, 26 Feb 2026 14:40:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcXO-00066k-TQ; Thu, 26 Feb 2026 14:40:22 +0000 Received: by outflank-mailman (input) for mailman id 1241883; Thu, 26 Feb 2026 14:40:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcXN-00066e-Bc for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:40:21 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0b3f6573-1321-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 15:40:15 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id CAC93428FD52; Thu, 26 Feb 2026 09:39:24 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0b3f6573-1321-11f1-9ccf-f158ae23cfc8 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo Subject: [PATCH v4 02/10] xen/page_alloc: Optimize getting per-NUMA-node free page counts Date: Thu, 26 Feb 2026 14:29:16 +0000 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Alejandro Vallejo Add per-node free page counters (node_avail_pages[]), protected by heap_lock, updated in real-time in lockstep with total_avail_pages as pages are allocated and freed. This replaces the avail_heap_pages() loop over all online nodes and zones in avail_node_heap_pages() with a direct O(1) array lookup, making it efficient to get the total free pages for a given NUMA node. The per-node counts are currently provided using sysctl for NUMA placement decisions of domain builders and monitoring, and for debugging with the debug-key 'u' to print NUMA info to the printk buffer. They will also be used for checking if a NUMA node may be able to satisfy a NUMA-node-specific allocation by comparing node availability against node-specific claims before looking for pages in the zones of the node. Also change total_avail_pages and outstanding_claims to unsigned long: Those never become negative (we protect that with ASSERT/BUG_ON already), and converting them to unsigned long makes that explicit, and also fixes signed/unsigned comparison warnings. This only needs moving the ASSERT to before the subtraction. See the previous commit moving the BUG_ON for outstanding_claims. This lays the groundwork for implementing per-node claims. Signed-off-by: Alejandro Vallejo Signed-off-by: Bernhard Kaindl --- xen/common/page_alloc.c | 36 +++++++++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 6f7f30c64605..2176cb113fe2 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -483,11 +483,32 @@ static heap_by_zone_and_order_t *_heap[MAX_NUMNODES]; static unsigned long node_need_scrub[MAX_NUMNODES]; +/* avail[node][zone] is the number of free pages on that node and zone. */ static unsigned long *avail[MAX_NUMNODES]; -static long total_avail_pages; +/* Global available pages, updated in real-time, protected by heap_lock */ +static unsigned long total_avail_pages; +/* The global heap lock, protecting access to the heap and related structures */ static DEFINE_SPINLOCK(heap_lock); -static long outstanding_claims; /* total outstanding claims by all domains */ + +/* + * Per-node count of available pages, protected by heap_lock, updated in + * lockstep with total_avail_pages as pages are allocated and freed. + * + * Each entry holds the sum of avail[node][zone] across all zones, used for + * efficiently checking node-local availability for allocation requests. + * Also provided via sysctl for NUMA placement decisions of domain builders + * and monitoring, and logged with debug-key 'u' for NUMA debugging. + * + * Maintaining this under heap_lock does not reduce scalability, as the + * allocator is already serialized on it. The accessor macro abstracts the + * storage to ease future changes (e.g. moving to per-node lock granularity). + */ +#define node_avail_pages(node) (node_avail_pages[node]) +static unsigned long node_avail_pages[MAX_NUMNODES]; + +/* total outstanding claims by all domains */ +static unsigned long outstanding_claims; static unsigned long avail_heap_pages( unsigned int zone_lo, unsigned int zone_hi, unsigned int node) @@ -1072,8 +1093,10 @@ static struct page_info *alloc_heap_pages( ASSERT(avail[node][zone] >= request); avail[node][zone] -= request; + ASSERT(node_avail_pages(node) >= request); + node_avail_pages(node) -= request; + ASSERT(total_avail_pages >= request); total_avail_pages -= request; - ASSERT(total_avail_pages >= 0); if ( !(memflags & MEMF_no_refcount) ) consume_outstanding_claims(d, request); @@ -1235,8 +1258,10 @@ static int reserve_offlined_page(struct page_info *head) continue; avail[node][zone]--; + ASSERT(node_avail_pages(node) > 0); + node_avail_pages(node)--; + ASSERT(total_avail_pages > 0); total_avail_pages--; - ASSERT(total_avail_pages >= 0); page_list_add_tail(cur_head, test_bit(_PGC_broken, &cur_head->count_info) ? @@ -1559,6 +1584,7 @@ static void free_heap_pages( } avail[node][zone] += 1 << order; + node_avail_pages(node) += 1 << order; total_avail_pages += 1 << order; if ( need_scrub ) { @@ -2816,7 +2842,7 @@ unsigned long avail_domheap_pages_region( unsigned long avail_node_heap_pages(unsigned int nodeid) { - return avail_heap_pages(MEMZONE_XEN, NR_ZONES -1, nodeid); + return node_avail_pages(nodeid); } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:43:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:43:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241908.1542745 (Exim 4.92) (envelope-from ) id 1vvcaL-0006eY-Ce; Thu, 26 Feb 2026 14:43:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241908.1542745; Thu, 26 Feb 2026 14:43:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcaL-0006eR-9y; Thu, 26 Feb 2026 14:43:25 +0000 Received: by outflank-mailman (input) for mailman id 1241908; Thu, 26 Feb 2026 14:43:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcaK-0006eL-7v for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:43:24 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7b97fbed-1321-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 15:43:16 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 4A509428FD66; Thu, 26 Feb 2026 09:42:54 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7b97fbed-1321-11f1-9ccf-f158ae23cfc8 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Marcus Granado Subject: [PATCH v4 03/10] xen/page_alloc: Implement NUMA-node-specific claims Date: Thu, 26 Feb 2026 14:29:17 +0000 Message-Id: <6927e45bf7c2ce56b8849c16a2024edb86034358.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Extend the domain memory claims infrastructure to optionally target a NUMA node, preserving backward compatibility for existing callers. Based on the design by Alejandro Vallejo with critical design changes by Roger Pau Monné and me, including suggestions by Marcus Granado. Overview: - Add tracking of per-node claims - Add tracking of the node of a claim in d->claim_node - Add per-node claims to domain_set_outstanding_pages() - Add per-node claims to consume_outstanding_claims() - Add per-node claims to release_outstanding_claims() - Add protecting per-node claims to get_free_buddy() - Update host claim protection to include both claimed and free pages Helper functions for claims: - available_after_claims() gives the pages avaiable after outstanding claims - host_allocatable_request() updates the check for globale memory to combine d->outstanding_claims with the free pages when permittign an allocation. - node_allocatable_request() is used in get_free_buddy() to enforce per-node claim protection and skip to the next node if insufficient. Cross-node claim preservation (alloc_node != d->claim_node): - When allocating with alloc_node != d->claim_node, preserve the claim unless d would exceed d->max_pages, in which case consume just enough to stay within d->max_pages to not book excess memory to the domain. Update the existing callers of domain_set_outstanding_pages() (domain_kill and XENMEM_claim_pages) to pass NUMA_NO_NODE for backward compatibility. This lays the groundwork for a NUMA claims hypercall. Suggested-by: Alejandro Vallejo Suggested-by: Roger Pau Monné Suggested-by: Marcus Granado Signed-off-by: Bernhard Kaindl --- xen/common/domain.c | 3 +- xen/common/memory.c | 3 +- xen/common/page_alloc.c | 147 ++++++++++++++++++++++++++++++++++++---- xen/include/xen/mm.h | 4 +- xen/include/xen/sched.h | 1 + 5 files changed, 140 insertions(+), 18 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index 2e46207d2db0..e7861259a2b3 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -944,6 +944,7 @@ struct domain *domain_create(domid_t domid, spin_lock_init(&d->node_affinity_lock); d->node_affinity = NODE_MASK_ALL; d->auto_node_affinity = 1; + d->claim_node = NUMA_NO_NODE; spin_lock_init(&d->shutdown_lock); d->shutdown_code = SHUTDOWN_CODE_INVALID; @@ -1311,7 +1312,7 @@ int domain_kill(struct domain *d) rspin_barrier(&d->domain_lock); argo_destroy(d); vnuma_destroy(d->vnuma); - domain_set_outstanding_pages(d, 0); + domain_set_outstanding_pages(d, 0, NUMA_NO_NODE); /* fallthrough */ case DOMDYING_dying: rc = domain_teardown(d); diff --git a/xen/common/memory.c b/xen/common/memory.c index 918510f287a0..85e242ad9e61 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1798,7 +1798,8 @@ long do_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) rc = -EINVAL; if ( !rc ) - rc = domain_set_outstanding_pages(d, reservation.nr_extents); + rc = domain_set_outstanding_pages(d, reservation.nr_extents, + NUMA_NO_NODE); rcu_unlock_domain(d); diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 2176cb113fe2..6fc7d4cb9d40 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -488,7 +488,10 @@ static unsigned long *avail[MAX_NUMNODES]; /* Global available pages, updated in real-time, protected by heap_lock */ static unsigned long total_avail_pages; -/* The global heap lock, protecting access to the heap and related structures */ +/* + * The global heap lock, protecting access to the heap and related structures + * It protects the heap and claims, d->outstanding_pages and d->claim_node + */ static DEFINE_SPINLOCK(heap_lock); /* @@ -510,6 +513,71 @@ static unsigned long node_avail_pages[MAX_NUMNODES]; /* total outstanding claims by all domains */ static unsigned long outstanding_claims; +/* + * Per-node accessor for outstanding claims, protected by heap_lock, updated + * in lockstep with the global outstanding_claims and d->outstanding_pages + * in domain_set_outstanding_pages() and release_outstanding_claims(). + * + * node_outstanding_claims(node) is used to determine the outstanding claims on + * a node, which are subtracted from the node's available pages to determine if + * a request can be satisfied without violating the node's memory availability. + */ +#define node_outstanding_claims(node) (node_outstanding_claims[node]) +/* total outstanding claims by all domains on node */ +static unsigned long node_outstanding_claims[MAX_NUMNODES]; + +/* Return available pages after subtracting claimed pages */ +static inline unsigned long available_after_claims(unsigned long avail_pages, + unsigned long claims) +{ + BUG_ON(claims > avail_pages); + return avail_pages - claims; /* Due to the BUG_ON, it cannot be negative */ +} + +/* Answer if host-level memory and claims permit this request to proceed */ +static inline bool host_allocatable_request(const struct domain *d, + unsigned int memflags, + unsigned long request) +{ + unsigned long allocatable_pages; + + ASSERT(spin_is_locked(&heap_lock)); + + allocatable_pages = available_after_claims(total_avail_pages, + outstanding_claims); + if ( allocatable_pages >= request ) + return true; /* The not claimed pages are enough to proceed */ + + if ( !d || (memflags & MEMF_no_refcount) ) + return false; /* Claims are not available for this allocation */ + + /* The domain's claims are available, return true if sufficient */ + return request <= allocatable_pages + d->outstanding_pages; +} + +/* Answer if node-level memory and claims permit this request to proceed */ +static inline bool node_allocatable_request(const struct domain *d, + unsigned int memflags, + unsigned long request, + nodeid_t node) +{ + unsigned long allocatable_pages; + + ASSERT(spin_is_locked(&heap_lock)); + ASSERT(node < MAX_NUMNODES); + + allocatable_pages = available_after_claims(node_avail_pages(node), + node_outstanding_claims(node)); + if ( allocatable_pages >= request ) + return true; /* The not claimed pages are enough to proceed */ + + if ( !d || (memflags & MEMF_no_refcount) || (node != d->claim_node) ) + return false; /* Claims are not available for this allocation */ + + /* The domain's claims are available, return true if sufficient */ + return request <= allocatable_pages + d->outstanding_pages; +} + static unsigned long avail_heap_pages( unsigned int zone_lo, unsigned int zone_hi, unsigned int node) { @@ -539,14 +607,23 @@ unsigned long domain_adjust_tot_pages(struct domain *d, long pages) return d->tot_pages; } -/* Release outstanding claims on the domain, host and later also node */ +/* Release outstanding claims on the domain, host and node */ static inline void release_outstanding_claims(struct domain *d, unsigned long release) { ASSERT(spin_is_locked(&heap_lock)); BUG_ON(outstanding_claims < release); outstanding_claims -= release; + + if ( d->claim_node != NUMA_NO_NODE ) + { + BUG_ON(node_outstanding_claims(d->claim_node) < release); + node_outstanding_claims(d->claim_node) -= release; + } d->outstanding_pages -= release; + + if ( d->outstanding_pages == 0 ) + d->claim_node = NUMA_NO_NODE; /* Clear if no outstanding pages left */ } /* @@ -556,7 +633,8 @@ void release_outstanding_claims(struct domain *d, unsigned long release) * domain build and d is destroyed if the build fails, this has no significance. */ static inline -void consume_outstanding_claims(struct domain *d, unsigned long allocation) +void consume_outstanding_claims(struct domain *d, unsigned long allocation, + nodeid_t alloc_node) { if ( !d || !d->outstanding_pages ) return; @@ -564,14 +642,41 @@ void consume_outstanding_claims(struct domain *d, unsigned long allocation) /* Of course, the domain can only release up its outstanding claims */ allocation = min(allocation, d->outstanding_pages + 0UL); + + if ( d->claim_node != NUMA_NO_NODE && d->claim_node != alloc_node ) + { + /* + * The domain has a claim on a node, but the alloc is on a different + * node. If it would exceed the domain's max_pages, reduce the claim + * up to the excess over max_pages so we don't reduce the claim more + * than we have to to honor the max_pages limit. + */ + unsigned long booked_pages = domain_tot_pages(d) + allocation + + d->outstanding_pages; + if ( booked_pages <= d->max_pages ) + return; /* booked is within max_pages, no excess, keep the claim */ + + /* Excess detected, release the exceeding pages from the claimed node */ + allocation = min(allocation, booked_pages - d->max_pages); + } release_outstanding_claims(d, allocation); } -int domain_set_outstanding_pages(struct domain *d, unsigned long pages) +/* + * Update outstanding claims for the domain. Note: The node is passed as an + * unsigned int to allow checking for overflow above the uint8_t nodeid_t limit. + */ +int domain_set_outstanding_pages(struct domain *d, unsigned long pages, + unsigned int node) { int ret = -ENOMEM; unsigned long claim, avail_pages; + /* When releasing a claim, the node must be NUMA_NO_NODE (it is not used) */ + if ( pages == 0 && node != NUMA_NO_NODE ) + return -EINVAL; + if ( node != NUMA_NO_NODE && (node >= MAX_NUMNODES || !node_online(node)) ) + return -ENOENT; /* * Two locks are needed here: * - d->page_alloc_lock: protects accesses to d->{tot,max,extra}_pages. @@ -604,9 +709,12 @@ int domain_set_outstanding_pages(struct domain *d, unsigned long pages) } /* how much memory is available? */ - avail_pages = total_avail_pages; - - avail_pages -= outstanding_claims; + if ( node == NUMA_NO_NODE ) + avail_pages = available_after_claims(total_avail_pages, + outstanding_claims); + else + avail_pages = available_after_claims(node_avail_pages(node), + node_outstanding_claims(node)); /* * Note, if domain has already allocated memory before making a claim @@ -619,6 +727,11 @@ int domain_set_outstanding_pages(struct domain *d, unsigned long pages) /* yay, claim fits in available memory, stake the claim, success! */ d->outstanding_pages = claim; outstanding_claims += d->outstanding_pages; + if ( node != NUMA_NO_NODE ) + { + node_outstanding_claims(node) += claim; + d->claim_node = node; + } ret = 0; out: @@ -953,6 +1066,13 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, */ for ( ; ; ) { + /* + * Claimed memory is considered unavailable unless the request + * is made by a domain with sufficient unclaimed pages. + */ + if ( !node_allocatable_request(d, memflags, (1UL << order), node) ) + goto try_next_node; + zone = zone_hi; do { /* Check if target node can support the allocation. */ @@ -982,6 +1102,8 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, } } while ( zone-- > zone_lo ); /* careful: unsigned zone may wrap */ + try_next_node: + /* If MEMF_exact_node was passed, we may not skip to a different node */ if ( (memflags & MEMF_exact_node) && req_node != NUMA_NO_NODE ) return NULL; @@ -1042,13 +1164,8 @@ static struct page_info *alloc_heap_pages( spin_lock(&heap_lock); - /* - * Claimed memory is considered unavailable unless the request - * is made by a domain with sufficient unclaimed pages. - */ - if ( (outstanding_claims + request > total_avail_pages) && - ((memflags & MEMF_no_refcount) || - !d || d->outstanding_pages < request) ) + /* Proceed if host-level memory and claims permit this request to proceed */ + if ( !host_allocatable_request(d, memflags, request) ) { spin_unlock(&heap_lock); return NULL; @@ -1099,7 +1216,7 @@ static struct page_info *alloc_heap_pages( total_avail_pages -= request; if ( !(memflags & MEMF_no_refcount) ) - consume_outstanding_claims(d, request); + consume_outstanding_claims(d, request, node); check_low_mem_virq(); diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index d80bfba6d393..6e589a5b6389 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -65,6 +65,7 @@ #include #include #include +#include #include #include #include @@ -131,7 +132,8 @@ int populate_pt_range(unsigned long virt, unsigned long nr_mfns); /* Claim handling */ unsigned long __must_check domain_adjust_tot_pages(struct domain *d, long pages); -int domain_set_outstanding_pages(struct domain *d, unsigned long pages); +int domain_set_outstanding_pages(struct domain *d, unsigned long pages, + unsigned int node); void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages); /* Domain suballocator. These functions are *not* interrupt-safe.*/ diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 40a35fc15c65..7f1654afbc7c 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -421,6 +421,7 @@ struct domain unsigned int outstanding_pages; unsigned int max_pages; /* maximum value for domain_tot_pages() */ unsigned int extra_pages; /* pages not included in domain_tot_pages() */ + nodeid_t claim_node; /* NUMA_NO_NODE for host-wide claims */ #ifdef CONFIG_MEM_SHARING atomic_t shr_pages; /* shared pages */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:46:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:46:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241933.1542757 (Exim 4.92) (envelope-from ) id 1vvcdH-0007H5-Vt; Thu, 26 Feb 2026 14:46:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241933.1542757; Thu, 26 Feb 2026 14:46:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcdH-0007Gx-Qv; Thu, 26 Feb 2026 14:46:27 +0000 Received: by outflank-mailman (input) for mailman id 1241933; Thu, 26 Feb 2026 14:46:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcdG-0007Gp-3O for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:46:26 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e98830c5-1321-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 15:46:24 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 92CC0428FD7C; Thu, 26 Feb 2026 09:45:56 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e98830c5-1321-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 04/10] xen/page_alloc: Consolidate per-node counters into avail[] array Date: Thu, 26 Feb 2026 14:29:18 +0000 Message-Id: <4a5477e0ae26bb29d4814b2177cdd7ad746887cc.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Replace the static node_avail_pages[] and node_outstanding_claims[] arrays with two extra entries in the per-node avail[] array: avail[node][AVAIL_NODE_TOTAL] - total free pages on this node avail[node][AVAIL_NODE_CLAIMS] - outstanding claims on this node This eliminates two MAX_NUMNODES-sized static arrays by extending the dynamically allocated avail[] from NR_ZONES to NR_AVAIL_ENTRIES (NR_ZONES + 2) per node. The node_avail_pages() and node_outstanding_claims() accessor macros now index into avail[], keeping all call sites unchanged. Placing the per-node totals and claims adjacent to the per-zone counters also improves cache locality: the allocator already touches avail[node][zone] in get_free_buddy(), so the node-level counters checked by node_allocatable_request() are likely warm in the same cache line, avoiding the extra line fetch the separate static arrays would have required. Signed-off-by: Bernhard Kaindl --- xen/common/page_alloc.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 6fc7d4cb9d40..e844c0ecf637 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -485,6 +485,18 @@ static unsigned long node_need_scrub[MAX_NUMNODES]; /* avail[node][zone] is the number of free pages on that node and zone. */ static unsigned long *avail[MAX_NUMNODES]; +/* + * The avail[] array has NR_ZONES entries for per-zone free page counts, + * plus two extra entries above NR_ZONES: + * avail[node][AVAIL_NODE_TOTAL] - total free pages on this node + * avail[node][AVAIL_NODE_CLAIMS] - outstanding claims on this node + * This replaces the former static node_avail_pages[] and + * node_outstanding_claims[] arrays. + */ +#define AVAIL_NODE_TOTAL NR_ZONES +#define AVAIL_NODE_CLAIMS (NR_ZONES + 1) +#define NR_AVAIL_ENTRIES (NR_ZONES + 2) + /* Global available pages, updated in real-time, protected by heap_lock */ static unsigned long total_avail_pages; @@ -507,8 +519,7 @@ static DEFINE_SPINLOCK(heap_lock); * allocator is already serialized on it. The accessor macro abstracts the * storage to ease future changes (e.g. moving to per-node lock granularity). */ -#define node_avail_pages(node) (node_avail_pages[node]) -static unsigned long node_avail_pages[MAX_NUMNODES]; +#define node_avail_pages(node) (avail[node][AVAIL_NODE_TOTAL]) /* total outstanding claims by all domains */ static unsigned long outstanding_claims; @@ -522,9 +533,7 @@ static unsigned long outstanding_claims; * a node, which are subtracted from the node's available pages to determine if * a request can be satisfied without violating the node's memory availability. */ -#define node_outstanding_claims(node) (node_outstanding_claims[node]) -/* total outstanding claims by all domains on node */ -static unsigned long node_outstanding_claims[MAX_NUMNODES]; +#define node_outstanding_claims(node) (avail[node][AVAIL_NODE_CLAIMS]) /* Return available pages after subtracting claimed pages */ static inline unsigned long available_after_claims(unsigned long avail_pages, @@ -762,9 +771,9 @@ static unsigned long init_node_heap(int node, unsigned long mfn, { /* First node to be discovered has its heap metadata statically alloced. */ static heap_by_zone_and_order_t _heap_static; - static unsigned long avail_static[NR_ZONES]; + static unsigned long avail_static[NR_AVAIL_ENTRIES]; unsigned long needed = (sizeof(**_heap) + - sizeof(**avail) * NR_ZONES + + sizeof(**avail) * NR_AVAIL_ENTRIES + PAGE_SIZE - 1) >> PAGE_SHIFT; int i, j; @@ -782,7 +791,7 @@ static unsigned long init_node_heap(int node, unsigned long mfn, { _heap[node] = mfn_to_virt(mfn + nr - needed); avail[node] = mfn_to_virt(mfn + nr - 1) + - PAGE_SIZE - sizeof(**avail) * NR_ZONES; + PAGE_SIZE - sizeof(**avail) * NR_AVAIL_ENTRIES; } else if ( nr >= needed && arch_mfns_in_directmap(mfn, needed) && @@ -791,7 +800,7 @@ static unsigned long init_node_heap(int node, unsigned long mfn, { _heap[node] = mfn_to_virt(mfn); avail[node] = mfn_to_virt(mfn + needed - 1) + - PAGE_SIZE - sizeof(**avail) * NR_ZONES; + PAGE_SIZE - sizeof(**avail) * NR_AVAIL_ENTRIES; *use_tail = false; } else if ( get_order_from_bytes(sizeof(**_heap)) == @@ -800,18 +809,18 @@ static unsigned long init_node_heap(int node, unsigned long mfn, _heap[node] = alloc_xenheap_pages(get_order_from_pages(needed), 0); BUG_ON(!_heap[node]); avail[node] = (void *)_heap[node] + (needed << PAGE_SHIFT) - - sizeof(**avail) * NR_ZONES; + sizeof(**avail) * NR_AVAIL_ENTRIES; needed = 0; } else { _heap[node] = xmalloc(heap_by_zone_and_order_t); - avail[node] = xmalloc_array(unsigned long, NR_ZONES); + avail[node] = xmalloc_array(unsigned long, NR_AVAIL_ENTRIES); BUG_ON(!_heap[node] || !avail[node]); needed = 0; } - memset(avail[node], 0, NR_ZONES * sizeof(long)); + memset(avail[node], 0, NR_AVAIL_ENTRIES * sizeof(long)); for ( i = 0; i < NR_ZONES; i++ ) for ( j = 0; j <= MAX_ORDER; j++ ) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:49:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:49:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241961.1542766 (Exim 4.92) (envelope-from ) id 1vvcfl-0007mm-8u; Thu, 26 Feb 2026 14:49:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241961.1542766; Thu, 26 Feb 2026 14:49:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcfl-0007mf-62; Thu, 26 Feb 2026 14:49:01 +0000 Received: by outflank-mailman (input) for mailman id 1241961; Thu, 26 Feb 2026 14:48:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcfj-0007mT-Jq for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:48:59 +0000 Received: from na1pdmzitismtp02.tibco.com (na1pdmzitismtp02.tibco.com [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 47c89918-1322-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 15:48:58 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 572748153330; Thu, 26 Feb 2026 09:48:26 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 47c89918-1322-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" Subject: [PATCH v4 05/10] xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness Date: Thu, 26 Feb 2026 14:29:19 +0000 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a DOMCTL handler for claiming memory with NUMA awareness. It rejects claims when LLC coloring (does not support claims) is enabled and translates the public constant to the internal NUMA_NO_NODE. The request is forwarded to domain_set_outstanding_pages() for the actual claim processing. The handler uses the same XSM hook as the legacy XENMEM_claim_pages hypercall. While the underlying infrastructure currently supports only a single claim, the public hypercall interface is designed to be extensible for multiple claims in the future without breaking the API. Signed-off-by: Bernhard Kaindl --- xen/common/domain.c | 29 ++++++++++++++++++++++++++++ xen/common/domctl.c | 9 +++++++++ xen/include/public/domctl.h | 38 +++++++++++++++++++++++++++++++++++++ xen/include/xen/domain.h | 2 ++ 4 files changed, 78 insertions(+) diff --git a/xen/common/domain.c b/xen/common/domain.c index e7861259a2b3..ac1b091f5574 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -268,6 +268,35 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, return rc; } +/* Claim memory for a domain or reset the claim */ +int claim_memory(struct domain *d, const struct xen_domctl_claim_memory *uinfo) +{ + memory_claim_t claim; + + /* alloc_color_heap_page() does not handle claims, so reject LLC coloring */ + if ( llc_coloring_enabled ) + return -EOPNOTSUPP; + /* + * We only support single claims at the moment, and if the domain is + * dying (d->is_dying is set), its claims have already been released + */ + if ( uinfo->pad || uinfo->nr_claims != 1 || d->is_dying ) + return -EINVAL; + + if ( copy_from_guest(&claim, uinfo->claims, 1) ) + return -EFAULT; + + if ( claim.pad ) + return -EINVAL; + + /* Convert the API tag for a host-wide claim to the NUMA_NO_NODE constant */ + if ( claim.node == XEN_DOMCTL_CLAIM_MEMORY_NO_NODE ) + claim.node = NUMA_NO_NODE; + + /* NB. domain_set_outstanding_pages() has the checks to validate its args */ + return domain_set_outstanding_pages(d, claim.pages, claim.node); +} + static void __domain_finalise_shutdown(struct domain *d) { struct vcpu *v; diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 29a7726d32d0..9e858f631aaf 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -868,6 +868,15 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) ret = get_domain_state(&op->u.get_domain_state, d, &op->domain); break; + case XEN_DOMCTL_claim_memory: + /* Use the same XSM hook as XENMEM_claim_pages */ + ret = xsm_claim_pages(XSM_PRIV, d); + if ( ret ) + break; + + ret = claim_memory(d, &op->u.claim_memory); + break; + default: ret = arch_do_domctl(op, d, u_domctl); break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..610806c8b6e0 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1276,6 +1276,42 @@ struct xen_domctl_get_domain_state { uint64_t unique_id; /* Unique domain identifier. */ }; +/* + * XEN_DOMCTL_claim_memory + * + * Claim memory for a guest domain. The claimed memory is converted into actual + * memory pages by allocating it. Except for the option to pass claims for + * multiple NUMA nodes, the semantics are based on host-wide claims as + * provided by XENMEM_claim_pages, and are identical for host-wide claims. + * + * The initial implementation supports a claim for the host or a NUMA node, but + * using an array, the API is designed to be extensible to support more claims. + */ +struct xen_memory_claim { + uint64_aligned_t pages; /* Amount of pages to be allotted to the domain */ + uint32_t node; /* NUMA node, or XEN_DOMCTL_CLAIM_MEMORY_NO_NODE for host */ + uint32_t pad; /* padding for alignment, set to 0 on input */ +}; +typedef struct xen_memory_claim memory_claim_t; +#define XEN_DOMCTL_CLAIM_MEMORY_NO_NODE 0xFFFFFFFF /* No node: host claim */ + +/* Use XEN_NODE_CLAIM_INIT to initialize a memory_claim_t structure */ +#define XEN_NODE_CLAIM_INIT(_pages, _node) { \ + .pages = (_pages), \ + .node = (_node), \ + .pad = 0 \ +} +DEFINE_XEN_GUEST_HANDLE(memory_claim_t); + +struct xen_domctl_claim_memory { + /* IN: array of struct xen_memory_claim */ + XEN_GUEST_HANDLE_64(memory_claim_t) claims; + /* IN: number of claims in the claims array handle. See the claims field. */ + uint32_t nr_claims; +#define XEN_DOMCTL_MAX_CLAIMS UINT8_MAX /* More claims require changes in Xen */ + uint32_t pad; /* padding for alignment, set it to 0 */ +}; + struct xen_domctl { /* Stable domctl ops: interface_version is required to be 0. */ uint32_t cmd; @@ -1368,6 +1404,7 @@ struct xen_domctl { #define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_set_llc_colors 89 #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ +#define XEN_DOMCTL_claim_memory 91 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1436,6 +1473,7 @@ struct xen_domctl { #endif struct xen_domctl_set_llc_colors set_llc_colors; struct xen_domctl_get_domain_state get_domain_state; + struct xen_domctl_claim_memory claim_memory; uint8_t pad[128]; } u; }; diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 93c0fd00c1d7..79e8932c4530 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -193,4 +193,6 @@ extern bool vmtrace_available; extern bool vpmu_is_available; +int claim_memory(struct domain *d, const struct xen_domctl_claim_memory *uinfo); + #endif /* __XEN_DOMAIN_H__ */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:56:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:56:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1241996.1542787 (Exim 4.92) (envelope-from ) id 1vvcms-000170-3y; Thu, 26 Feb 2026 14:56:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1241996.1542787; Thu, 26 Feb 2026 14:56:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcms-00016t-14; Thu, 26 Feb 2026 14:56:22 +0000 Received: by outflank-mailman (input) for mailman id 1241996; Thu, 26 Feb 2026 14:56:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcmr-00016l-7L for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:56:21 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4e208433-1323-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 15:56:18 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id C29404290134; Thu, 26 Feb 2026 09:55:57 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4e208433-1323-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , "Daniel P. Smith" , Anthony PERARD Subject: [PATCH v4 06/10] xsm/flask: Add XEN_DOMCTL_claim_memory to flask Date: Thu, 26 Feb 2026 14:29:20 +0000 Message-Id: <8e5680575f37ce67a81a4c712e5409ccb3f6f612.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a Flask security policy for the new XEN_DOMCTL_claim_memory hypercall introduced in the previous commit. When Flask is enabled, this permission controls whether a domain can stake memory claims for another domain. The permission is granted to: - dom0_t: Dom0 needs this to claim memory for guest domains - create_domain_common: Domain builders need this during domain creation Signed-off-by: Bernhard Kaindl --- tools/flask/policy/modules/dom0.te | 1 + tools/flask/policy/modules/xen.if | 1 + xen/xsm/flask/hooks.c | 3 +++ xen/xsm/flask/policy/access_vectors | 2 ++ 4 files changed, 7 insertions(+) diff --git a/tools/flask/policy/modules/dom0.te b/tools/flask/policy/modules/dom0.te index d30edf8be1fb..f5c330d01cec 100644 --- a/tools/flask/policy/modules/dom0.te +++ b/tools/flask/policy/modules/dom0.te @@ -103,6 +103,7 @@ allow dom0_t dom0_t:domain2 { get_cpu_policy dt_overlay get_domain_state + claim_memory }; allow dom0_t dom0_t:resource { add diff --git a/tools/flask/policy/modules/xen.if b/tools/flask/policy/modules/xen.if index ef7d8f438c65..8e2dceb505cd 100644 --- a/tools/flask/policy/modules/xen.if +++ b/tools/flask/policy/modules/xen.if @@ -98,6 +98,7 @@ define(`create_domain_common', ` vuart_op set_llc_colors get_domain_state + claim_memory }; allow $1 $2:security check_context; allow $1 $2:shadow enable; diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index b250b2706535..0cc04ada82a9 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -820,6 +820,9 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd, case XEN_DOMCTL_set_llc_colors: return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__SET_LLC_COLORS); + case XEN_DOMCTL_claim_memory: + return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__CLAIM_MEMORY); + default: return avc_unknown_permission("domctl", cmd); } diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index ce907d50a45e..2c9337f7a145 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -255,6 +255,8 @@ class domain2 set_llc_colors # XEN_DOMCTL_get_domain_state get_domain_state +# XEN_DOMCTL_claim_memory + claim_memory } # Similar to class domain, but primarily contains domctls related to HVM domains -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 14:59:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 14:59:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242025.1542797 (Exim 4.92) (envelope-from ) id 1vvcq8-0001iJ-Hj; Thu, 26 Feb 2026 14:59:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242025.1542797; Thu, 26 Feb 2026 14:59:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcq8-0001iC-EP; Thu, 26 Feb 2026 14:59:44 +0000 Received: by outflank-mailman (input) for mailman id 1242025; Thu, 26 Feb 2026 14:59:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcq7-0001i6-6e for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 14:59:43 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c73c83c2-1323-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 15:59:42 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id E9CDB4290343; Thu, 26 Feb 2026 09:59:20 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c73c83c2-1323-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Juergen Gross Subject: [PATCH v4 07/10] tools/lib/ctrl/xc: Add xc_domain_claim_memory() to libxenctrl Date: Thu, 26 Feb 2026 14:29:21 +0000 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a libxc function for the new XEN_DOMCTL_claim_memory hypercall, It supports node-specific claims and host-wide claims. Signed-off-by: Bernhard Kaindl --- tools/include/xenctrl.h | 4 ++++ tools/libs/ctrl/xc_domain.c | 27 +++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..a0a9f2143b32 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2659,6 +2659,10 @@ int xc_domain_set_llc_colors(xc_interface *xch, uint32_t domid, const uint32_t *llc_colors, uint32_t num_llc_colors); +int xc_domain_claim_memory(xc_interface *xch, uint32_t domid, + uint32_t nr_claims, + memory_claim_t *claims); + #if defined(__arm__) || defined(__aarch64__) int xc_dt_overlay(xc_interface *xch, void *overlay_fdt, uint32_t overlay_fdt_size, uint8_t overlay_op); diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 01c0669c8863..685efc03d295 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1070,6 +1070,33 @@ int xc_domain_remove_from_physmap(xc_interface *xch, return xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp)); } +/* Claim the guest memory for a domain before starting the domain build */ +int xc_domain_claim_memory(xc_interface *xch, + uint32_t domid, + uint32_t nr_claims, + memory_claim_t *claims) +{ + struct xen_domctl domctl = {}; + DECLARE_HYPERCALL_BOUNCE(claims, sizeof(*claims) * nr_claims, + XC_HYPERCALL_BUFFER_BOUNCE_IN); + int ret; + + if ( xc_hypercall_bounce_pre(xch, claims) ) + return -1; + + domctl.cmd = XEN_DOMCTL_claim_memory; + domctl.domain = domid; + domctl.u.claim_memory.nr_claims = nr_claims; + set_xen_guest_handle(domctl.u.claim_memory.claims, claims); + + ret = do_domctl(xch, &domctl); + + xc_hypercall_bounce_post(xch, claims); + + return ret; +} + +/* Legacy function for claiming pages, replaced by xc_domain_claim_memory() */ int xc_domain_claim_pages(xc_interface *xch, uint32_t domid, unsigned long nr_pages) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 15:02:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 15:02:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242052.1542809 (Exim 4.92) (envelope-from ) id 1vvcsS-0003EO-UF; Thu, 26 Feb 2026 15:02:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242052.1542809; Thu, 26 Feb 2026 15:02:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcsS-0003EG-QA; Thu, 26 Feb 2026 15:02:08 +0000 Received: by outflank-mailman (input) for mailman id 1242052; Thu, 26 Feb 2026 15:02:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvcsR-0003E5-Ra for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 15:02:07 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.corp.cloud.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1dccd3c2-1324-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 16:02:07 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 182D34290365; Thu, 26 Feb 2026 10:01:46 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1dccd3c2-1324-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Christian Lindig , David Scott , Anthony PERARD Subject: [PATCH v4 08/10] tools/ocaml/libs/xc: add OCaml domain_claim_memory binding Date: Thu, 26 Feb 2026 14:29:22 +0000 Message-Id: <538ada6fad9414a102db0096f297f77b90f3ac01.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add OCaml bindings for xc_domain_claim_memory(), for using the XEN_DOMCTL_claim_memory hypercall from OCaml. This allows OCaml toolstacks to place NUMA-aware memory claims for domains as well as host-wide claims. tools/ocaml/libs/xc/xenctrl.ml/mli: - Add claim record type and domain_claim_memory external. tools/ocaml/libs/xc/xenctrl_stubs.c: - Validate claim count and arguments. - Marshal the OCaml claim array to memory_claim_t[]. - Map node = -1 to XEN_DOMCTL_CLAIM_MEMORY_NO_NODE. Signed-off-by: Bernhard Kaindl --- tools/ocaml/libs/xc/xenctrl.ml | 11 ++++++++ tools/ocaml/libs/xc/xenctrl.mli | 11 ++++++++ tools/ocaml/libs/xc/xenctrl_stubs.c | 43 +++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index 97108b9d861a..a1a05dcaede3 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -370,6 +370,17 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory(): claim pages for a domain, + optionally per NUMA node (node = -1 means no specific node). *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for no specific node *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version: handle -> version = "stub_xc_version_version" external version_compile_info: handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 9fccb2c2c287..1781c89258fe 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -297,6 +297,17 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory(): claim pages for a domain, + optionally per NUMA node (node = -1 means no specific node). *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for no specific node *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version : handle -> version = "stub_xc_version_version" external version_compile_info : handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c index c55f73b265b2..a77d7dac58e8 100644 --- a/tools/ocaml/libs/xc/xenctrl_stubs.c +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c @@ -1435,6 +1435,49 @@ CAMLprim value stub_xc_watchdog(value xch_val, value domid, value timeout) CAMLreturn(Val_int(ret)); } +CAMLprim value stub_xc_domain_claim_memory(value xch_val, value domid, + value claims) +{ + CAMLparam3(xch_val, domid, claims); + xc_interface *xch = xch_of_val(xch_val); + mlsize_t nr_claims = Wosize_val(claims); + memory_claim_t *claim; + int retval; + + if (nr_claims > XEN_DOMCTL_MAX_CLAIMS) + caml_invalid_argument("domain_claim_memory: too many claims"); + + claim = calloc(nr_claims, sizeof(*claim)); + if (claim == NULL && nr_claims != 0) + caml_raise_out_of_memory(); + + for (mlsize_t i = 0; i < nr_claims; i++) { + value claim_rec = Field(claims, i); + int64_t pages = Int64_val(Field(claim_rec, 0)); + int32_t node = Int32_val(Field(claim_rec, 1)); + uint32_t c_node; + + if (pages < 0 || node < -1 ) { + free(claim); + caml_invalid_argument("domain_claim_memory: invalid pages or node"); + } + + if (node == -1) + c_node = XEN_DOMCTL_CLAIM_MEMORY_NO_NODE; + else + c_node = node; + + claim[i] = (memory_claim_t)XEN_NODE_CLAIM_INIT((uint64_t)pages, c_node); + } + + retval = xc_domain_claim_memory(xch, Int_val(domid), nr_claims, claim); + free(claim); + if (retval < 0) + failwith_xc(xch); + + CAMLreturn(Val_unit); +} + /* * Local variables: * indent-tabs-mode: t -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 15:11:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 15:11:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242088.1542819 (Exim 4.92) (envelope-from ) id 1vvd0y-0004va-PR; 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Thu, 26 Feb 2026 10:10:28 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 54d120c2-1325-11f1-9ccf-f158ae23cfc8 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD Subject: [PATCH v4 09/10] tools/tests: Update the claims test to test claim_memory hypercall Date: Thu, 26 Feb 2026 14:29:23 +0000 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Extend the existing mem-claim test to verify both the legacy XENMEM_claim_pages and the new XEN_DOMCTL_claim_memory hypercalls. It tests both host-wide claims (NUMA_NO_NODE) and node-specific claims (assuming at least a single NUMA node, node 0 is provided) to ensure the new infrastructure works correctly. It also checks the protection of host- and node-claims against allocations without sufficient, specific claims. Signed-off-by: Bernhard Kaindl --- tools/tests/mem-claim/test-mem-claim.c | 277 +++++++++++++++++++++++-- 1 file changed, 254 insertions(+), 23 deletions(-) diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c index ad038e45d188..a98d3e43ff54 100644 --- a/tools/tests/mem-claim/test-mem-claim.c +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -2,6 +2,7 @@ #include #include #include +#include #include #include #include @@ -20,10 +21,13 @@ static unsigned int nr_failures; #define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) +#define CLAIM_TEST_ORDER 9 /* 2M */ + static xc_interface *xch; static uint32_t domid = DOMID_INVALID; static xc_physinfo_t physinfo; +static unsigned int claim_test_node; static struct xen_domctl_createdomain create = { .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, @@ -38,10 +42,138 @@ static struct xen_domctl_createdomain create = { }, }; -static void run_tests(void) +typedef int (*claim_fn_t)(xc_interface *xch, uint32_t domid, + unsigned long pages); + +/* Wrapper function to test claiming memory using xc_domain_claim_pages. */ +static int wrap_claim_pages(xc_interface *xch, + uint32_t domid, + unsigned long pages) +{ + return xc_domain_claim_pages(xch, domid, pages); +} + +/* Wrapper function to test claiming memory using xc_domain_claim_memory. */ +static int wrap_claim_memory(xc_interface *xch, + uint32_t domid, + unsigned long pages) +{ + memory_claim_t claim[] = { + XEN_NODE_CLAIM_INIT(pages, XEN_DOMCTL_CLAIM_MEMORY_NO_NODE) + }; + + return xc_domain_claim_memory(xch, domid, 1, claim); +} + +/* Wrapper to test claiming memory using xc_domain_claim_memory on a NUMA node */ +static int wrap_claim_memory_node(xc_interface *xch, + uint32_t domid, + unsigned long pages) { int rc; + memory_claim_t claims[UINT8_MAX + 1] = {}; /* + 1 to test overflow check */ + + /* claim with a node that is not present */ + claims[0] = (memory_claim_t)XEN_NODE_CLAIM_INIT(pages, physinfo.nr_nodes); + /* Check the return value of claiming memory on an invalid node */ + rc = xc_domain_claim_memory(xch, domid, 1, claims); + if ( rc != -1 || errno != ENOENT ) + { + fail("Expected claim failure on invalid node to fail with ENOENT\n"); + return rc; + } + /* + * Check the return value of claiming on two nodes (not yet implemented) + * and that the valid claim is rejected when nr_claims > 1. We expect that + * the API will reject the call due exceeding nr_claims before it checks + * the validity of the node(s), so we expect EINVAL rather than ENOENT. + */ + rc = xc_domain_claim_memory(xch, domid, 2, claims); + if ( rc != -1 || errno != EINVAL ) + { + fail("Expected nr_claims == 2 to fail with EINVAL (for now)\n"); + return rc; + + } + /* Likewise check with nr_claims > MAX_UINT8 to test overflow */ + rc = xc_domain_claim_memory(xch, domid, UINT8_MAX + 1, claims); + if ( rc != -1 || errno != EINVAL ) + { + fail("Expected nr_claims = UINT8_MAX + 1 to fail with EINVAL\n"); + return rc; + } + /* Likewise check with a node of MAX_UINT8 + 1 to test overflow */ + claims[0].node = UINT8_MAX + 1; + rc = xc_domain_claim_memory(xch, domid, 1, claims); + if ( rc != -1 || errno != ENOENT ) + { + fail("Expected node == UINT8_MAX + 1 to fail with ENOENT\n"); + return rc; + } + /* Test with pages exceeding INT32_MAX to check overflow */ + claims[0] = (memory_claim_t)XEN_NODE_CLAIM_INIT((unsigned)INT32_MAX + 1, 0); + rc = xc_domain_claim_memory(xch, domid, 1, claims); + if ( rc != -1 || errno != ENOMEM ) + { + fail("Expected ENOMEM with pages > INT32_MAX\n"); + return rc; + } + /* Test with pad not set to zero */ + claims[0] = (memory_claim_t)XEN_NODE_CLAIM_INIT(pages, claim_test_node); + claims[0].pad = 1; + rc = xc_domain_claim_memory(xch, domid, 1, claims); + if ( rc != -1 || errno != EINVAL ) + { + fail("Expected EINVAL with pad not set to zero\n"); + return rc; + } + + /* Pass a valid claim for the selected node and continue the test */ + claims[0] = (memory_claim_t)XEN_NODE_CLAIM_INIT(pages, claim_test_node); + return xc_domain_claim_memory(xch, domid, 1, claims); +} + +static int get_node_free_pages(unsigned int node, unsigned long *free_pages) +{ + int rc; + unsigned int num_nodes = 0; + xc_meminfo_t *meminfo; + + rc = xc_numainfo(xch, &num_nodes, NULL, NULL); + if ( rc ) + return rc; + + if ( node >= num_nodes ) + { + errno = EINVAL; + return -1; + } + + meminfo = calloc(num_nodes, sizeof(*meminfo)); + if ( !meminfo ) + return -1; + + rc = xc_numainfo(xch, &num_nodes, meminfo, NULL); + if ( rc ) + goto out; + + *free_pages = meminfo[node].memfree / XC_PAGE_SIZE; + + out: + free(meminfo); + return rc; +} + +static void run_test(claim_fn_t claim_call_wrapper, const char *claim_name, + bool host_wide_claim) +{ + int rc; + uint64_t free_heap_bytes; + unsigned long free_pages, claim_pages; + const unsigned long request_pages = 1UL << CLAIM_TEST_ORDER; + + printf(" Testing %s\n", claim_name); /* * Check that the system is quiescent. Outstanding claims is a global * field. @@ -51,7 +183,7 @@ static void run_tests(void) return fail("Failed to obtain physinfo: %d - %s\n", errno, strerror(errno)); - printf("Free pages: %"PRIu64", Oustanding claims: %"PRIu64"\n", + printf("Free pages: %"PRIu64", Outstanding claims: %"PRIu64"\n", physinfo.free_pages, physinfo.outstanding_pages); if ( physinfo.outstanding_pages ) @@ -98,13 +230,30 @@ static void run_tests(void) return fail(" Unexpected outstanding claim of %"PRIu64" pages\n", physinfo.outstanding_pages); - /* - * Set a claim for 4M. This should be the only claim in the system, and - * show up globally. - */ - rc = xc_domain_claim_pages(xch, domid, MB_PAGES(4)); + rc = xc_availheap(xch, 0, 0, host_wide_claim ? -1 : (int)claim_test_node, + &free_heap_bytes); if ( rc ) - return fail(" Failed to claim 4M of RAM: %d - %s\n", + return fail(" Failed to query available heap: %d - %s\n", + errno, strerror(errno)); + + free_pages = free_heap_bytes / XC_PAGE_SIZE; + if ( !host_wide_claim ) + { + rc = get_node_free_pages(claim_test_node, &free_pages); + if ( rc ) + return fail(" Failed to query free pages on node %u: %d - %s\n", + claim_test_node, errno, strerror(errno)); + } + + if ( free_pages <= request_pages + 1 ) + return fail(" Not enough free pages (%lu) to test %s claim enforcement\n", + free_pages, host_wide_claim ? "host-wide" : "node"); + + claim_pages = free_pages - request_pages + 1; + + rc = claim_call_wrapper(xch, domid, claim_pages); + if ( rc ) + return fail(" Failed to claim calculated RAM amount: %d - %s\n", errno, strerror(errno)); rc = xc_physinfo(xch, &physinfo); @@ -112,17 +261,51 @@ static void run_tests(void) return fail(" Failed to obtain physinfo: %d - %s\n", errno, strerror(errno)); - if ( physinfo.outstanding_pages != MB_PAGES(4) ) - return fail(" Expected claim to be 4M, got %"PRIu64" pages\n", - physinfo.outstanding_pages); + if ( physinfo.outstanding_pages != claim_pages ) + return fail(" Expected claim to be %lu pages, got %"PRIu64" pages\n", + claim_pages, physinfo.outstanding_pages); + + { + uint32_t other_domid = DOMID_INVALID; + xen_pfn_t other_ram[] = { 0 }; + unsigned int memflags = host_wide_claim ? 0 : XENMEMF_exact_node(claim_test_node); + + rc = xc_domain_create(xch, &other_domid, &create); + if ( rc ) + return fail(" Second domain create failure: %d - %s\n", + errno, strerror(errno)); + + rc = xc_domain_setmaxmem(xch, other_domid, -1); + if ( rc ) + { + fail(" Failed to set maxmem for second domain: %d - %s\n", + errno, strerror(errno)); + goto destroy_other; + } + + rc = xc_domain_populate_physmap_exact( + xch, other_domid, ARRAY_SIZE(other_ram), CLAIM_TEST_ORDER, + memflags, other_ram); + if ( rc == 0 ) + fail(" Expected %s claim to block second-domain allocation\n", + host_wide_claim ? "host-wide" : "node"); + + destroy_other: + rc = xc_domain_destroy(xch, other_domid); + if ( rc ) + return fail(" Failed to destroy second domain: %d - %s\n", + errno, strerror(errno)); + } /* - * Allocate 2M of RAM to the domain. This should be deducted from global - * claim. + * Allocate one CLAIM_TEST_ORDER chunk to the domain. This should reduce + * the outstanding claim by request_pages. For node claims, request memory + * from the claimed node. */ xen_pfn_t ram[] = { 0 }; rc = xc_domain_populate_physmap_exact( - xch, domid, ARRAY_SIZE(ram), 9 /* Order 2M */, 0, ram); + xch, domid, ARRAY_SIZE(ram), CLAIM_TEST_ORDER, + host_wide_claim ? 0 : XENMEMF_node(claim_test_node), ram); if ( rc ) return fail(" Failed to populate physmap domain: %d - %s\n", errno, strerror(errno)); @@ -132,9 +315,9 @@ static void run_tests(void) return fail(" Failed to obtain physinfo: %d - %s\n", errno, strerror(errno)); - if ( physinfo.outstanding_pages != MB_PAGES(2) ) - return fail(" Expected claim to be 2M, got %"PRIu64" pages\n", - physinfo.outstanding_pages); + if ( physinfo.outstanding_pages != claim_pages - request_pages ) + return fail(" Expected claim to be %lu pages, got %"PRIu64" pages\n", + claim_pages - request_pages, physinfo.outstanding_pages); /* * Destroying the domain should release the outstanding 2M claim. @@ -161,6 +344,8 @@ static void run_tests(void) int main(int argc, char **argv) { int rc; + unsigned int num_nodes = 0; + xc_meminfo_t *meminfo = NULL; printf("Memory claims tests\n"); @@ -169,14 +354,60 @@ int main(int argc, char **argv) if ( !xch ) err(1, "xc_interface_open"); - run_tests(); + rc = xc_numainfo(xch, &num_nodes, NULL, NULL); + if ( rc || !num_nodes ) + err(1, "xc_numainfo"); + + meminfo = calloc(num_nodes, sizeof(*meminfo)); + if ( !meminfo ) + err(1, "calloc"); - if ( domid != DOMID_INVALID ) + rc = xc_numainfo(xch, &num_nodes, meminfo, NULL); + if ( rc ) + err(1, "xc_numainfo"); + + claim_test_node = 0; + for ( unsigned int i = 1; i < num_nodes; i++ ) { - rc = xc_domain_destroy(xch, domid); - if ( rc ) - fail(" Failed to destroy domain: %d - %s\n", - errno, strerror(errno)); + if ( meminfo[i].memfree > meminfo[claim_test_node].memfree ) + claim_test_node = i; + } + + free(meminfo); + + struct { + claim_fn_t fn; + const char *name; + bool host_wide; + } tests[] = { + { + .fn = wrap_claim_pages, + .name = "xc_domain_claim_pages", + .host_wide = true, + }, + { + .fn = wrap_claim_memory, + .name = "xc_domain_claim_memory", + .host_wide = true, + }, + { + .fn = wrap_claim_memory_node, + .name = "xc_domain_claim_memory_node", + .host_wide = false, + }, + }; + size_t num_tests = sizeof(tests) / sizeof(tests[0]); + for ( size_t i = 0; i < num_tests; i++ ) + { + run_test(tests[i].fn, tests[i].name, tests[i].host_wide); + if ( domid != DOMID_INVALID ) + { + rc = xc_domain_destroy(xch, domid); + if ( rc ) + fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); + domid = DOMID_INVALID; + } } return !!nr_failures; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 15:17:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 15:17:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242115.1542829 (Exim 4.92) (envelope-from ) id 1vvd7O-0005VR-DM; Thu, 26 Feb 2026 15:17:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242115.1542829; Thu, 26 Feb 2026 15:17:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvd7O-0005VK-9g; Thu, 26 Feb 2026 15:17:34 +0000 Received: by outflank-mailman (input) for mailman id 1242115; Thu, 26 Feb 2026 15:17:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvd7M-0005VE-IM for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 15:17:32 +0000 Received: from na1pdmzitismtp01.tibco.com (na1pdmzitismtp01.tibco.com [160.101.131.8]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 44625eed-1326-11f1-b164-2bf370ae4941; Thu, 26 Feb 2026 16:17:31 +0100 (CET) Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 5F6E94142B87; Thu, 26 Feb 2026 10:17:09 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 44625eed-1326-11f1-b164-2bf370ae4941 From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 10/10] docs/guest-guide: document the memory claim hypercalls Date: Thu, 26 Feb 2026 14:29:24 +0000 Message-Id: <66201baf1f046d5235ad629af35f456cd770344d.1772098423.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add guest-guide documentation for Xen’s memory-claim mechanism and the two hypercalls for it to the docs: - The legacy XENMEM_claim_pages (only for global host-wide claims) - The new XEN_DOMCTL_claim_memory which adds NUMA-aware claims Also document the implementation of claims in the hypervisor. Signed-off-by: Bernhard Kaindl --- .readthedocs.yaml | 13 +- docs/conf.py | 6 +- .../dom/DOMCTL_claim_memory-classes.mmd | 51 +++++++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 ++++ .../dom/DOMCTL_claim_memory-workflow.mmd | 23 ++++ docs/guest-guide/dom/DOMCTL_claim_memory.rst | 125 ++++++++++++++++++ docs/guest-guide/dom/index.rst | 14 ++ docs/guest-guide/index.rst | 23 ++++ docs/guest-guide/mem/XENMEM_claim_pages.rst | 68 ++++++++++ docs/guest-guide/mem/index.rst | 12 ++ docs/hypervisor-guide/index.rst | 5 + docs/hypervisor-guide/mm/claims.rst | 114 ++++++++++++++++ docs/hypervisor-guide/mm/index.rst | 10 ++ 13 files changed, 485 insertions(+), 2 deletions(-) create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-classes.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst create mode 100644 docs/hypervisor-guide/mm/claims.rst create mode 100644 docs/hypervisor-guide/mm/index.rst diff --git a/.readthedocs.yaml b/.readthedocs.yaml index d3aff7662ebf..3be7334c7527 100644 --- a/.readthedocs.yaml +++ b/.readthedocs.yaml @@ -8,11 +8,22 @@ build: tools: python: "latest" + nodejs: "20" jobs: post_install: + # Required for rendering the mermaid diagrams in the offline + # documentation (PDF & ePub) formats. + - npm install -g @mermaid-js/mermaid-cli # Instead of needing a separate requirements.txt - - python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme + - > + python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme + sphinxcontrib-mermaid sphinx: configuration: docs/conf.py + +# Build PDF & ePub +formats: + - epub + - pdf \ No newline at end of file diff --git a/docs/conf.py b/docs/conf.py index 2fb8bafe6589..9316202d3318 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -61,7 +61,11 @@ needs_sphinx = '1.4' # Add any Sphinx extension module names here, as strings. They can be # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom # ones. -extensions = [] +extensions = ['sphinxcontrib.mermaid'] + +mermaid_init_js = """ +mermaid.initialize({ theme: 'Neo', startOnLoad: true }); +""" # Add any paths that contain templates here, relative to this directory. templates_path = ['_templates'] diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-classes.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-classes.mmd new file mode 100644 index 000000000000..1406a4919442 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-classes.mmd @@ -0,0 +1,51 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +classDiagram + +class xen_domctl { + +uint32_t cmd + +uint32_t interface_version + +uint32_t domain + +xen_domctl_claim_memory +} + +class xen_domctl_claim_memory { + +memory_claim_t* claims + +uint32_t nr_claims + +uint32_t pad +} + +class memory_claim_t { + +uint64_aligned_t pages + +uint32_t node + +uint32_t pad +} + +class xc_domain_claim_memory["xc_domain_claim_memory()"] { + +xc_interface* xch + +uint32_t domid + +uint32_t nr_claims + +memory_claim_t* claims +} + +class page_alloc_globals["xen/common/page_alloc.c"] { + +unsigned long outstanding_claims + +unsigned long node_outstanding_claims[] +} + +class claim["DOMCTL_claim_memory"] { + +int claim_memory(d, uinfo) + +int domain_set_outstanding_pages(d, pages, node) +} + +class domain["struct domain"] { + +unsigned_int outstanding_pages + +nodeid_t claim_node +} + +xen_domctl_claim_memory o--> memory_claim_t +xen_domctl o--> xen_domctl_claim_memory +xc_domain_claim_memory ..> xen_domctl : populates +xc_domain_claim_memory ..> claim : calls via do_domctl() +claim ..> xen_domctl_claim_memory : reads +claim ..> domain : sets +claim ..> page_alloc_globals : updates outstanding claims diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd new file mode 100644 index 000000000000..05d688c59f13 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +actor DomainBuilder +participant OcamlStub as OCaml stub for
xc_domain
claim_memory +participant Libxc as xc_domain
claim_memory +participant Domctl as XEN_DOMCTL
claim_memory +#participant DomainLogic as claim_memory +participant Alloc as domain
set
outstanding_pages + +DomainBuilder->>OcamlStub: claims +OcamlStub->>OcamlStub: marshall claims -----> OCaml to C +OcamlStub->>Libxc: claims + +Libxc->>Domctl: do_domctl + +Domctl->>Domctl: copy_from_guest(claim) +Domctl->>Domctl: validate claim +Domctl->>Alloc: set
outstanding_pages +Alloc-->>Domctl: result +Domctl-->>Libxc: rc +Libxc-->>OcamlStub: rc +OcamlStub-->>DomainBuilder: claim_result \ No newline at end of file diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd new file mode 100644 index 000000000000..372f2bb7a616 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +participant Toolstack +participant Xen +participant NUMA Node memory + +Toolstack->>Xen: XEN_DOMCTL_createdomain +Toolstack->>Xen: XEN_DOMCTL_max_mem(max_pages) + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(pages, node) +Xen->>NUMA Node memory: Claim pages on node +Xen-->>Toolstack: Claim granted + +Toolstack->>Xen: XEN_DOMCTL_set_nodeaffinity(node) + +loop Populate domain memory + Toolstack->>Xen: XENMEM_populate_physmap(memflags:node) + Xen->>NUMA Node memory: alloc from claimed node +end + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(0, NO_NODE) +Xen-->>Toolstack: Remaining claims released diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory.rst b/docs/guest-guide/dom/DOMCTL_claim_memory.rst new file mode 100644 index 000000000000..8be37585f02a --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory.rst @@ -0,0 +1,125 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _XEN_DOMCTL_claim_memory: + +XEN_DOMCTL_claim_memory +======================= + +This **domctl** command allows a privileged domain to stake a memory claim for +a domain identical to :ref:`XENMEM_claim_pages`, but with support for +NUMA-aware memory claims. + +A claim entry with a node value of ``XEN_DOMCTL_CLAIM_MEMORY_NO_NODE`` stakes +a claim for host memory, exactly like :ref:`XENMEM_claim_pages` does. + +NUMA-aware memory claims +------------------------ + +Memory locality is an important factor for performance in NUMA systems. +Allocating memory close to the CPU that will use it can reduce latency +and improve overall performance. + +By claiming memory on specific NUMA nodes, toolstacks can ensure that they +will be able to allocate memory for the domain on those nodes. This is +particularly beneficial for workloads that are sensitive to memory latency, +such as in-memory databases. + +**Note:** The ABI supports multiple claims for future expansion. At the moment, +Xen accepts a single claim entry (either a NUMA-aware or host-wide claim). + +Implementation notes +-------------------- + +As described in :ref:`XENMEM_claim_pages`, Xen keeps track of the number +of claimed pages in the domain's ``d->outstanding_pages`` counter. + +Xen declares a NUMA-aware claim by assigning ``d->claim_node`` to a NUMA node, +which declares that ``d->outstanding_pages`` is claimed on ``d->claim_node``. + +See :ref:`hypervisor-guide` > :ref:`memory_management` > :ref:`memory_claims` +for more details on the implementation on the details how claims are handled +by the buddy allocator, and how a toolstack can populate the memory of a domain +from the claimed node, even if it needs to wait for scrubbing to complete. + +Used functions & data structures +-------------------------------- + +This diagram illustrates the key functions and data structures involved in the +implementation of the ``domctl`` hypercall command ``XEN_DOMCTL_claim_memory``: + +.. mermaid:: DOMCTL_claim_memory-classes.mmd + :caption: Diagram: Function and data relationships of XEN_DOMCTL_claim_memory + +Call sequence diagram +--------------------- + +The following sequence diagram illustrates the call flow for claiming memory +for a domain using this hypercall command from an OCaml toolstack: + +.. mermaid:: DOMCTL_claim_memory-seqdia.mmd + :caption: Sequence diagram: Call flow for claiming memory for a domain + +Claim workflow +-------------- + +The following diagram illustrates a workflow for claiming and populating memory: + +.. mermaid:: DOMCTL_claim_memory-workflow.mmd + :caption: Workflow diagram: Claiming and populating memory for a domain + +API example (libxc) +------------------- +The following example demonstrates how a toolstack can claim memory before +building the domain and then releasing the claim once the memory population +is complete. + +Note: ``memory_claim_t`` contains padding to allow for future expansion. +Thus, the structure must be zero-initialised to ensure forward compatibility. +This can be achieved by using the ``XEN_NODE_CLAIM_INIT`` macro, which sets the +pages and node fields while zero-initialising the padding of the structure, +zero-initialising the entire structure, or by using a compound literal with +designated initialisers to set the pages and node fields while zero-initialising +the padding of the structure. + +.. code-block:: C + + #include + + int claim_guest_memory(xc_interface *xch, uint32_t domid, + uint64_t pages) + { + memory_claim_t claim[] = { + /* + * Example 1: + * Uses the ``XEN_NODE_CLAIM_INIT`` macro to zero-initialise the padding + * and set the pages and node fields for a NUMA-aware claim on node 0. + */ + XEN_NODE_CLAIM_INIT(pages, 0) /* Claim memory on NUMA node 0 */ + }; + + /* Claim memory from NUMA node 0 for the domain build. */ + return xc_domain_claim_memory(xch, domid, 1, claim); + } + + int release_claim(xc_interface *xch, uint32_t domid) + { + memory_claim_t claim[] = { + /* + * Example 2: + * Uses a compound literal with designated initialisers to set the + * fields to release the claim while zero-initialising the rest + * of the structure for forward compatibility. + */ + (memory_claim_t){ + /* + * pages == 0 releases any outstanding claim. + * The node field is not used in this case, but must be set to + * XEN_DOMCTL_CLAIM_MEMORY_NO_NODE for forward compatibility. + */ + .pages = 0, + .node = XEN_DOMCTL_CLAIM_MEMORY_NO_NODE, + } + }; + + /* Release any remaining claim once population is done. */ + return xc_domain_claim_memory(xch, domid, 1, claim); + } diff --git a/docs/guest-guide/dom/index.rst b/docs/guest-guide/dom/index.rst new file mode 100644 index 000000000000..445ccf599047 --- /dev/null +++ b/docs/guest-guide/dom/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Domctl Hypercall +================ + +Through domctl hypercalls, toolstacks in privileged domains can perform +operations related to domain management. This includes operations such as +creating, destroying, and modifying domains, as well as querying domain +information. + +.. toctree:: + :maxdepth: 2 + + DOMCTL_claim_memory diff --git a/docs/guest-guide/index.rst b/docs/guest-guide/index.rst index 5455c67479cf..d9611cd7504d 100644 --- a/docs/guest-guide/index.rst +++ b/docs/guest-guide/index.rst @@ -3,6 +3,29 @@ Guest documentation =================== +Xen exposes a set of hypercalls that allow domains and toolstacks in +privileged contexts (such as Dom0) to request services from the hypervisor. + +Through these hypercalls, privileged domains can perform privileged operations +such as querying system information, memory and domain management, +and enabling inter-domain communication via shared memory and event channels. + +These hypercalls are documented in the following sections, grouped by their +functionality. Each section provides an overview of the hypercalls, their +parameters, and examples of how to use them. + +Hypercall API documentation +--------------------------- + +.. toctree:: + :maxdepth: 2 + + dom/index + mem/index + +Hypercall ABI documentation +--------------------------- + .. toctree:: :maxdepth: 2 diff --git a/docs/guest-guide/mem/XENMEM_claim_pages.rst b/docs/guest-guide/mem/XENMEM_claim_pages.rst new file mode 100644 index 000000000000..7d465d2a87fe --- /dev/null +++ b/docs/guest-guide/mem/XENMEM_claim_pages.rst @@ -0,0 +1,68 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _XENMEM_claim_pages: + +XENMEM_claim_pages +================== + +This **xenmem** command allows a privileged guest to stake a memory claim for a +domain, identical to :ref:`XEN_DOMCTL_claim_memory`, but without support for +NUMA-aware memory claims. + +Memory claims in Xen +-------------------- + +The Xen hypervisor maintains a counter of outstanding pages for each domain +which maintains a number of pages claimed, but not allocated for that domain. + +If the outstanding pages counter is zero, this hypercall allows a privileged +guest to stake a claim for a specified number of pages of system memory for the +domain. + +If the claim is successful, Xen updates the domain's outstanding pages counter +to reflect the new claim, Xen allocates from the pool of claimed memory only +for allocations for domains with a claim for this memory. + +A domain builder (toolstack in a privileged domain) building the domain can then +allocate the guest memory for the domain, which converts the outstanding claim +into actual memory of the new domain, backed by physical pages. + +Note that the resulting claim is relative to the already allocated pages for the +domain, so the **pages** argument of this hypercall is absolute and must +correspond to the total number expected to be allocated for the domain, +and not incremental to the already allocated pages. + +Memory allocations by Xen for the domain also consume the claim, so toolstacks +should stake a claim that is larger than the guest memory requirement to +account for Xen's own memory usage. The exact amount of extra memory required +depends on the configuration and features used by the domain, the host +architecture and the features enabled by the Xen hypervisor on the host. + +Life-cycle of a claim +--------------------- + +The Domain's maximum memory limit must be set prior to staking a claim as +the sum of the already allocated pages and the claim must be within that limit. + +To release the claim after the domain build is complete, call this hypercall +command with the pages argument set to zero. This releases any remaining claim. +`libxenguest` does this after the guest memory has been allocated for the domain +and Xen does this also when it kills the domain. + +API example (libxc) +------------------- +The following example demonstrates how a toolstack can claim memory before +building the domain and then releasing the claim once the memory population +is complete. + +.. code-block:: C + + #include + ... + /* Claim memory for the domain build. */ + int ret = xc_domain_claim_pages(xch, domid, nr_pages); + + /* Build the domain and allocate memory for it. */ + ... + + /* Release any remaining claim after populating the domain memory. */ + int ret = xc_domain_claim_pages(xch, domid, 0); diff --git a/docs/guest-guide/mem/index.rst b/docs/guest-guide/mem/index.rst new file mode 100644 index 000000000000..dabd1fd0153e --- /dev/null +++ b/docs/guest-guide/mem/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Memctl Hypercall +================ + +The memctl hypercall interface allows guests to perform various control +operations related to memory management. + +.. toctree:: + :maxdepth: 2 + + XENMEM_claim_pages diff --git a/docs/hypervisor-guide/index.rst b/docs/hypervisor-guide/index.rst index 520fe01554ab..fef35a1ac4fe 100644 --- a/docs/hypervisor-guide/index.rst +++ b/docs/hypervisor-guide/index.rst @@ -1,12 +1,17 @@ .. SPDX-License-Identifier: CC-BY-4.0 +.. _hypervisor-guide: Hypervisor documentation ======================== +See :ref:`memory_claims` for more details on the implementation of the claims +mechanism in the Hypervisor and its interaction with the buddy allocator. + .. toctree:: :maxdepth: 2 code-coverage + mm/index x86/index arm/index \ No newline at end of file diff --git a/docs/hypervisor-guide/mm/claims.rst b/docs/hypervisor-guide/mm/claims.rst new file mode 100644 index 000000000000..97eb8a68fb1e --- /dev/null +++ b/docs/hypervisor-guide/mm/claims.rst @@ -0,0 +1,114 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _memory_claims: + +Memory Claims +============= + +Overview +-------- + +Xen's page allocator supports a **claims** mechanism that allows a domain +builder to reserve memory before allocation begins, preventing concurrent +allocations from exhausting available pages mid-build. +A claim can be global (host-wide) or target a specific NUMA node, ensuring +that a domain's memory is allocated locally on the same node as its vCPUs. + +The host-wide claims check subtracts global claims from total available pages. +If the domain has claims, its ``d->outstanding_pages`` are added back as +available (simplified pseudo-code): + +.. code:: C + + ASSERT(spin_is_locked(&heap_lock)); + unsigned long global_avail = total_avail_pages - outstanding_claims + + d->outstanding_pages; + return alloc_request <= global_avail; + +Similarly, the per-node check enforces node-level claims by subtracting +outstanding node claims from available node pages, and adding back the domain's +claim if allocating from the claimed node: + +.. code:: C + + ASSERT(spin_is_locked(&heap_lock)); + unsigned long avail = node_avail_pages(node) + - node_outstanding_claims(node) + + (node == d->claim_node ? d->outstanding_pages : 0); + return alloc_request <= avail; + +Simplified pseudo-code for the claims checks in the buddy allocator: + +.. code:: C + + struct page_info *get_free_buddy(order, memflags, d) { + for ( ; ; ) { + node = preferred_node_or_next_node(); + if (!node_allocatable_request(d, memflags, 1 << order, node)) + goto try_next_node; + /* Find a zone on this node with a suitable buddy */ + for (zone = highest_zone; zone >= lowest_zone; zone--) + for (j = order; j <= MAX_ORDER; j++) + if (pg = remove_head(&heap(node, zone, j))) + return pg; + try_next_node: + if (req_node != NUMA_NO_NODE && memflags & MEMF_exact_node) + return NULL; + /* Fall back to the next node and repeat. */ + } + } + + struct page_info *alloc_heap_pages(d, order, memflags) { + if (!host_allocatable_request(d, memflags, 1 << order)) + return NULL; + pg = get_free_buddy(order, memflags, d); + if (!pg) /* Retry allowing unscrubbed pages */ + pg = get_free_buddy(order, memflags|MEMF_no_scrub, d); + if (!pg) + return NULL; + if (pg has dirty pages) + scrub_dirty_pages(pg); + return pg; + } + +.. note:: The first ``get_free_buddy()`` pass skips unscrubbed pages and may + fall back to other nodes. With ``memflags & MEMF_exact_node``, no fallback + occurs, so the first pass may return ``NULL``. + The 2nd pass with ``MEMF_no_scrub`` will consider the unscrubbed pages. + ``alloc_heap_pages()`` then scrubs them before returning, guaranteeing the + domain gets the desired node-local pages even when scrubbing is pending. + + Therefore, toolstacks should set ``MEMF_exact_node`` in ``memflags`` when + allocating for a domain with a NUMA-aware claim to with + ``XENMEMF_exact_node(node)``. + + For efficient scrubbing, toolstacks might want to run domain builds + pinned on a CPU of the target NUMA node to scrub the pages on that node + without cross-node traffic and lower latency to speed up domain build. + +Data Structures +--------------- + +The following diagram shows the relationships between global, per-node, +and per-domain claim counters, all protected by the global ``heap_lock``. + +.. mermaid:: + + graph TB + subgraph "Protected by the heap_lock" + direction TB + Global --Sum of--> Per-node + Per-node --Sum of--> Per-domain + end + subgraph Per-domain + direction LR + claim_node["d->claim_node"] + claim_node --claims on--> outstanding_pages["d->outstanding_pages"] + end + subgraph Per-node + direction LR + node_outstanding_claims--constrains-->node_avail_pages + end + subgraph Global + direction LR + outstanding_claims--constrains-->total_avail_pages + end diff --git a/docs/hypervisor-guide/mm/index.rst b/docs/hypervisor-guide/mm/index.rst new file mode 100644 index 000000000000..9b5d60e3181a --- /dev/null +++ b/docs/hypervisor-guide/mm/index.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _memory_management: + +Memory Management +================= + +.. toctree:: + :maxdepth: 2 + + claims -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Feb 26 15:54:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 15:54:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242161.1542837 (Exim 4.92) (envelope-from ) id 1vvdgk-00027D-4V; Thu, 26 Feb 2026 15:54:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242161.1542837; Thu, 26 Feb 2026 15:54:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvdgk-000276-1q; Thu, 26 Feb 2026 15:54:06 +0000 Received: by outflank-mailman (input) for mailman id 1242161; Thu, 26 Feb 2026 15:54:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvdgj-000270-0l for xen-devel@lists.xenproject.org; Thu, 26 Feb 2026 15:54:05 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5eb76429-132b-11f1-9ccf-f158ae23cfc8; Thu, 26 Feb 2026 16:54:02 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-436e87589e8so1011107f8f.3 for ; Thu, 26 Feb 2026 07:54:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 26 Feb 2026 07:54:01 -0800 (PST) Message-ID: Date: Thu, 26 Feb 2026 16:53:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] x86/ioreq: Extend ioreq server to support multiple ioreq pages To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260223093831.475769-1-julian.vetter@vates.tech> <20260223093831.475769-2-julian.vetter@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260223093831.475769-2-julian.vetter@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23.02.2026 10:38, Julian Vetter wrote: > A single shared ioreq page provides PAGE_SIZE/sizeof(ioreq_t) = 128 > slots, limiting HVM guests to 128 vCPUs. To support more vCPUs, extend > the ioreq server to use xvzalloc_array() for allocating a contiguous > virtual array of ioreq_t slots sized to d->max_vcpus, backed by > potentially non-contiguous physical pages. > > For the GFN-mapped path (x86), page and writable type references are > obtained directly via check_get_page_from_gfn() and get_page_type() for > each GFN. The pages are then combined into a single contiguous VA using > vmap(). The number of ioreq pages is computed at runtime via > nr_ioreq_pages(d) = DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE), so > small VMs only allocate one page. All existing single-page paths > (bufioreq, legacy clients) remain unchanged. > > Mark the now-unused shared_iopage_t in the public header as deprecated. For this I think we need to settle on one of two options: Either it was a mistake that this was used in the hypervisor (and added to the public interface), in which case the removal of the use may want to be separate (without, imo, any need to mark the item deprecated in the public header, as the property remains). Or we deem it legitimate / useful, in which case you would want to continue using it (in struct ioreq_server). > @@ -89,6 +91,39 @@ static gfn_t hvm_alloc_ioreq_gfn(struct ioreq_server *s) > return hvm_alloc_legacy_ioreq_gfn(s); > } > > +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, > + unsigned int nr_pages) > +{ > + struct domain *d = s->target; > + unsigned long mask; > + unsigned int i, run; > + > + if ( nr_pages == 1 ) > + return hvm_alloc_ioreq_gfn(s); > + > + /* Find nr_pages consecutive set bits */ > + mask = d->arch.hvm.ioreq_gfn.mask; > + > + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) > + { > + if ( !test_bit(i, &mask) ) > + run = 0; > + else if ( ++run == nr_pages ) > + { > + /* Found a run - clear all bits and return base GFN */ > + unsigned int start = i - nr_pages + 1; > + unsigned int j; > + > + for ( j = start; j <= i; j++ ) > + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); You using clear_bit() here doesn't make the while operation atomic. There will need to be synchronization (also with hvm_alloc_ioreq_gfn()), and once that's there (or if things are suitably synchronized already) __clear_bit() ought to suffice here. > + return _gfn(d->arch.hvm.ioreq_gfn.base + start); > + } > + } > + > + return INVALID_GFN; > +} Did you consider whether fragmentation could get in the way here, as is usually the case when doing mixed-size allocations from a single pool? In how far is it necessary for the GFNs used to be consecutive? > @@ -134,16 +181,41 @@ static void hvm_unmap_ioreq_gfn(struct ioreq_server *s, bool buf) > > hvm_free_ioreq_gfn(s, iorp->gfn); > iorp->gfn = INVALID_GFN; > + return; > } > + > + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) > + return; > + > + nr_pages = nr_ioreq_pages(s->target); > + > + for ( i = 0; i < nr_pages; i++ ) > + { > + struct page_info *pg = vmap_to_page((char *)s->ioreq + Please can you preferably cast to const void * (or void *)? But perhaps you would better latch the pointer into a local variable anyway, for ... > + i * PAGE_SIZE); > + > + put_page_and_type(pg); > + put_page(pg); > + } > + vunmap(s->ioreq); > + s->ioreq = NULL; ... this clearing to move up ahead of any teardown done. > + hvm_free_ioreq_gfns(s, s->ioreq_gfn, nr_pages); > + s->ioreq_gfn = INVALID_GFN; This similarly may want moving up. As to the loop body, destroy_ring_for_helper() has put_page_and_type(), but no put_page(). Why is this different here? > @@ -173,30 +245,132 @@ static int hvm_map_ioreq_gfn(struct ioreq_server *s, bool buf) > > return rc; > } > + > + /* ioreq: multi-page with contiguous VA */ > + if ( s->ioreq ) > + { > + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) > + return -EPERM; The comment on the other path at least wants referencing here. > + return 0; > + } > + > + if ( d->is_dying ) > + return -EINVAL; > + > + nr_pages = nr_ioreq_pages(d); > + base_gfn = hvm_alloc_ioreq_gfns(s, nr_pages); > + > + if ( gfn_eq(base_gfn, INVALID_GFN) ) > + return -ENOMEM; > + > + mfns = xmalloc_array(mfn_t, nr_pages); Especially when there are only a few MFNs, this dynamic allocation would be nice to avoid. If there was a not overly larger upper bound, using a per-CPU array might also be an option. If the dynamic allocation stays, new code wants to use xvmalloc() and friends. > + if ( !mfns ) > + { > + hvm_free_ioreq_gfns(s, base_gfn, nr_pages); > + return -ENOMEM; > + } > + > + /* > + * Obtain a page reference and writable type reference for each GFN. > + * No per-page VA is needed; all pages are mapped as a single contiguous > + * VA via vmap() below. > + */ I think this comment wants to mention prepare_ring_for_helper(), so that if updates are done there, there's at least a fair chance that people might spot that changes need doing here as well. > + for ( i = 0; i < nr_pages; i++ ) > + { > + struct page_info *pg; > + p2m_type_t p2mt; > + > + rc = check_get_page_from_gfn(d, _gfn(gfn_x(base_gfn) + i), gfn_add() please > + false, &p2mt, &pg); > + if ( rc ) > + { > + if ( rc == -EAGAIN ) > + rc = -ENOENT; > + goto fail; > + } > + > + if ( !get_page_type(pg, PGT_writable_page) ) > + { > + put_page(pg); > + rc = -EINVAL; > + goto fail; > + } > + > + mfns[i] = page_to_mfn(pg); > + } > + > + /* Map all mfns as single contiguous VA */ > + s->ioreq = vmap(mfns, nr_pages); > + if ( !s->ioreq ) > + { > + rc = -ENOMEM; > + goto fail; > + } > + > + s->ioreq_gfn = base_gfn; > + xfree(mfns); > + > + return 0; > + > + fail: > + while ( i-- > 0 ) > + { > + struct page_info *pg = mfn_to_page(mfns[i]); > + > + put_page_and_type(pg); > + put_page(pg); Same issue here - I can't spot which page reference you're dropping. You obtained only one above. > @@ -208,6 +382,32 @@ static int hvm_add_ioreq_gfn(struct ioreq_server *s, bool buf) > > return rc; > } > + > + if ( gfn_eq(s->ioreq_gfn, INVALID_GFN) ) > + return 0; > + > + nr_pages = nr_ioreq_pages(d); > + memset(s->ioreq, 0, nr_pages * PAGE_SIZE); > + > + for ( i = 0; i < nr_pages; i++ ) > + { > + gfn_t gfn = gfn_add(s->ioreq_gfn, i); > + struct page_info *pg = vmap_to_page((char *)s->ioreq + > + i * PAGE_SIZE); > + > + rc = p2m_add_page(d, gfn, page_to_mfn(pg), 0, p2m_ram_rw); > + if ( rc ) > + /* > + * No rollback of previously added pages: The caller > + * (arch_ioreq_server_disable) has no error handling path, > + * and partial failure here will be cleaned up when the > + * ioreq server is eventually destroyed. > + */ > + return rc; Shouldn't you continue the loop, to try to add back as many pages as you can, so the domain encountering problems later is as unlikely as possible (albeit a single missing page is already bad enough)? > @@ -260,9 +259,32 @@ bool vcpu_ioreq_handle_completion(struct vcpu *v) > > static int ioreq_server_alloc_mfn(struct ioreq_server *s, bool buf) > { > - struct ioreq_page *iorp = buf ? &s->bufioreq : &s->ioreq; > + struct ioreq_page *iorp; > struct page_info *page; > > + if ( !buf ) > + { > + if ( s->ioreq ) > + { > + /* > + * If a guest frame has already been mapped (which may happen > + * on demand if ioreq_server_get_info() is called), then > + * allocating a page is not permitted. > + */ > + if ( !gfn_eq(s->ioreq_gfn, INVALID_GFN) ) > + return -EPERM; > + > + return 0; > + } > + > + s->ioreq = xvzalloc_array(ioreq_t, s->target->max_vcpus); > + > + return s->ioreq ? 0 : -ENOMEM; At this point you haven't fulfilled what the function is supposed to be doing. The pages you allocate also aren't associated with the domain, and you haven't obtained writable references. > @@ -812,26 +861,30 @@ int ioreq_server_get_frame(struct domain *d, ioservid_t id, > if ( rc ) > goto out; > > - switch ( idx ) > + if ( idx == XENMEM_resource_ioreq_server_frame_bufioreq) > { > - case XENMEM_resource_ioreq_server_frame_bufioreq: > rc = -ENOENT; > if ( !HANDLE_BUFIOREQ(s) ) > goto out; > > *mfn = page_to_mfn(s->bufioreq.page); > rc = 0; > - break; > - > - case XENMEM_resource_ioreq_server_frame_ioreq(0): > - *mfn = page_to_mfn(s->ioreq.page); > - rc = 0; > - break; > + } > + else if (( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) ) && > + ( idx < XENMEM_resource_ioreq_server_frame_ioreq(nr_ioreq_pages(d)) )) > + { > + unsigned int page_idx = idx - XENMEM_resource_ioreq_server_frame_ioreq(0); > > - default: > rc = -EINVAL; > - break; > + if ( idx >= XENMEM_resource_ioreq_server_frame_ioreq(0) && You checked this above already, didn't you? > + page_idx < nr_ioreq_pages(d) && s->ioreq ) The former part of this check also looks redundant with the earlier one. > --- a/xen/include/xen/ioreq.h > +++ b/xen/include/xen/ioreq.h > @@ -19,9 +19,19 @@ > #ifndef __XEN_IOREQ_H__ > #define __XEN_IOREQ_H__ > > +#include > #include > > #include > +#include > + > +/* 4096 / 32 = 128 ioreq slots per page */ > +#define IOREQS_PER_PAGE (PAGE_SIZE / sizeof(ioreq_t)) I think the comment wants dropping, as it would end up wrong / useless for page size different from 4k. I'm also not quite sure the #define is overly useful, as ... > +static inline unsigned int nr_ioreq_pages(const struct domain *d) > +{ > + return DIV_ROUND_UP(d->max_vcpus, IOREQS_PER_PAGE); ... this is its only use. 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Thu, 26 Feb 2026 07:59:15 -0800 (PST) Message-ID: <7e71e904-3a15-42d8-a1dc-4ad001683ec8@suse.com> Date: Thu, 26 Feb 2026 16:59:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] x86/ioreq: Extend ioreq server to support multiple ioreq pages From: Jan Beulich To: Julian Vetter Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20260223093831.475769-1-julian.vetter@vates.tech> <20260223093831.475769-2-julian.vetter@vates.tech> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.02.2026 16:53, Jan Beulich wrote: > On 23.02.2026 10:38, Julian Vetter wrote: >> @@ -89,6 +91,39 @@ static gfn_t hvm_alloc_ioreq_gfn(struct ioreq_server *s) >> return hvm_alloc_legacy_ioreq_gfn(s); >> } >> >> +static gfn_t hvm_alloc_ioreq_gfns(struct ioreq_server *s, >> + unsigned int nr_pages) >> +{ >> + struct domain *d = s->target; >> + unsigned long mask; >> + unsigned int i, run; >> + >> + if ( nr_pages == 1 ) >> + return hvm_alloc_ioreq_gfn(s); >> + >> + /* Find nr_pages consecutive set bits */ >> + mask = d->arch.hvm.ioreq_gfn.mask; >> + >> + for ( i = 0, run = 0; i < BITS_PER_LONG; i++ ) >> + { >> + if ( !test_bit(i, &mask) ) >> + run = 0; >> + else if ( ++run == nr_pages ) >> + { >> + /* Found a run - clear all bits and return base GFN */ >> + unsigned int start = i - nr_pages + 1; >> + unsigned int j; >> + >> + for ( j = start; j <= i; j++ ) >> + clear_bit(j, &d->arch.hvm.ioreq_gfn.mask); > > You using clear_bit() here doesn't make the while operation atomic. There will > need to be synchronization (also with hvm_alloc_ioreq_gfn()), and once that's > there (or if things are suitably synchronized already) __clear_bit() ought to > suffice here. > >> + return _gfn(d->arch.hvm.ioreq_gfn.base + start); >> + } >> + } >> + >> + return INVALID_GFN; >> +} > > Did you consider whether fragmentation could get in the way here, as is usually > the case when doing mixed-size allocations from a single pool? In how far is it > necessary for the GFNs used to be consecutive? Thinking about it - isn't this GFN based approach the legacy one? Can't we demand use of the resource mapping approach to support bigger guests? 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All external callers are either themselves __init or are limited to OVERLAY_DTB=y. Adjust the Makefile accordingly to also have string literals moved into .init.rodata. Signed-off-by: Jan Beulich --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -15,7 +15,9 @@ obj-$(CONFIG_HAS_ALTERNATIVE) += alterna obj-y += cpuerrata.o obj-y += cpufeature.o obj-y += decode.o -obj-y += device.o +device-y := device.init.o +device-$(CONFIG_OVERLAY_DTB) := device.o +obj-y += $(device-y) obj-$(CONFIG_IOREQ_SERVER) += dm.o obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o obj-y += domain.o --- a/xen/arch/arm/device.c +++ b/xen/arch/arm/device.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -16,8 +17,8 @@ #include #include -int map_irq_to_domain(struct domain *d, unsigned int irq, - bool need_mapping, const char *devname) +int __overlay_init map_irq_to_domain(struct domain *d, unsigned int irq, + bool need_mapping, const char *devname) { int res; @@ -49,8 +50,8 @@ int map_irq_to_domain(struct domain *d, return 0; } -int map_range_to_domain(const struct dt_device_node *dev, - uint64_t addr, uint64_t len, void *data) +int __overlay_init map_range_to_domain(const struct dt_device_node *dev, + uint64_t addr, uint64_t len, void *data) { struct map_range_data *mr_data = data; struct domain *d = mr_data->d; @@ -124,10 +125,10 @@ int map_range_to_domain(const struct dt_ * < 0 error * 0 success */ -int map_device_irqs_to_domain(struct domain *d, - struct dt_device_node *dev, - bool need_mapping, - struct rangeset *irq_ranges) +int __overlay_init map_device_irqs_to_domain(struct domain *d, + struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges) { unsigned int i, nirq; int res, irq; @@ -180,9 +181,9 @@ int map_device_irqs_to_domain(struct dom return 0; } -static int map_dt_irq_to_domain(const struct dt_device_node *dev, - const struct dt_irq *dt_irq, - void *data) +static int __overlay_init map_dt_irq_to_domain(const struct dt_device_node *dev, + const struct dt_irq *dt_irq, + void *data) { struct map_range_data *mr_data = data; struct domain *d = mr_data->d; @@ -219,8 +220,8 @@ static int map_dt_irq_to_domain(const st * then we may need to perform additional mappings in order to make * the child resources available to domain 0. */ -static int map_device_children(const struct dt_device_node *dev, - struct map_range_data *mr_data) +static int __overlay_init map_device_children(const struct dt_device_node *dev, + struct map_range_data *mr_data) { if ( dt_device_type_is_equal(dev, "pci") ) { @@ -250,8 +251,10 @@ static int map_device_children(const str * - Assign the device to the guest if it's protected by an IOMMU * - Map the IRQs and iomem regions to DOM0 */ -int handle_device(struct domain *d, struct dt_device_node *dev, p2m_type_t p2mt, - struct rangeset *iomem_ranges, struct rangeset *irq_ranges) +int __overlay_init handle_device(struct domain *d, struct dt_device_node *dev, + p2m_type_t p2mt, + struct rangeset *iomem_ranges, + struct rangeset *irq_ranges) { unsigned int naddr; unsigned int i; --- a/xen/include/xen/dt-overlay.h +++ b/xen/include/xen/dt-overlay.h @@ -42,10 +42,18 @@ struct xen_sysctl_dt_overlay; struct xen_domctl_dt_overlay; #ifdef CONFIG_OVERLAY_DTB + +#define __overlay_init + long dt_overlay_sysctl(struct xen_sysctl_dt_overlay *op); long dt_overlay_domctl(struct domain *d, struct xen_domctl_dt_overlay *op); + #else + #include + +#define __overlay_init __init + static inline long dt_overlay_sysctl(struct xen_sysctl_dt_overlay *op) { return -EOPNOTSUPP; From xen-devel-bounces@lists.xenproject.org Thu Feb 26 17:14:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 17:14:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242236.1542867 (Exim 4.92) (envelope-from ) id 1vvewi-0005Bj-AP; Thu, 26 Feb 2026 17:14:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242236.1542867; Thu, 26 Feb 2026 17:14:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvewi-0005Bc-7o; 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Message-ID: <53b251a1-948d-4c9c-ba0c-6f4fd99b1d6a@citrix.com> Date: Thu, 26 Feb 2026 17:14:28 +0000 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel Subject: Re: [PATCH] Arm: device.c is init-only when OVERLAY_DTB=n To: Jan Beulich , "xen-devel@lists.xenproject.org" References: Content-Language: en-GB From: Andrew Cooper In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: LO2P265CA0309.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:a5::33) To CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH8PR03MB8275:EE_|MW4PR03MB6572:EE_ X-MS-Office365-Filtering-Correlation-Id: c964f201-d0d2-4253-e4fd-08de755a820c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014; X-Microsoft-Antispam-Message-Info: CcEkSig5f8BPcsE1EZwfAWtxcP6Agb7/Aeo30zeThUgSs+JmVBDTqDUgF2MMX1Rcn27Tcwr/TC8DbHnNM1qkTZ8O6/QO/f6v55iIphsnKM5L7Fw9DGKPhe1hWhuZkySfm/n8QthfLkGn7wlTyVoHTRzLPs5H/sYi5DwZPmRuW9mFKeQPOV2AcDxwid/dWuiarKnU10QcmQDbRA4X5K3waQU1TGJJAcKfsknwX3UO1Vx8EAtXhhqO+kJyQh/deQHftnwMRD/vR7laqB3+Bug5kpBMq0GuWLeJqiO/tmS7zkIo5tbtxcw0Kq15feoRZsJPX6Bx53f/qawaWhapDaKpfDXMJGcmwaui+fJk8UAtPZfVKgEJvPy/LGTrloo2WRGaV6CV++yxcrcsx2+Yh5CDGy+N3bOCZcSP8TtHLJ+PZ7I/jZaggqS2Lt0WbGIIukAwF4gFOnUJrsDetTLWAE/u9k4N54yp0GkQnfNETLSs4faX04fVT/eA274tdUCD16A+2xT0FfjbBIZvyFALbIXALsPGtYzSgmZMuoPgiOMKSyTnw0DQthob/YAuHvWtU5kfbmKxhZtT3F6yhIF9tV3SH0FpHiQ0Dw9Gk4YaGWNBfqOYvNNSk6RrYWbvsUN+rex90+M14pmyNJBMU6tEMcZ3jaiBB4mxnzB2Akwu8fqLPJ+QnOaIGBgWHizFuMqHd+V+CTjIj5pAqFiKQdIXnPHmWFnzzJIPpadFdoLfEamFDuI= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH8PR03MB8275.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(366016)(376014);DIR:OUT;SFP:1101; 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a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1772140769; x=1772401269; i=teddy.astie@vates.tech; bh=MLNN+TTM7nCCyhQnjEzu9i5uefM5EB6jJQto4+Ymqhw=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=mWEwesTNGeG27+5x2QyV2OqT9+jvkpg74d5+JKO26lRKCHnOnLtj8W8Bx8JK2MOp/ /KAr2nbXebrEfv/F4sNta11frSEu5T42yusCR97uDMp+nyDkG7tdD4wyqbSWXNSGNK VgI+K3+KugWhNKE2yTO0SfFj9UEojRBXoTj6bk6BOf5qBhPe0v7SexhKdnCRhCx2qt odI/M28Y4jI6bSKW2df9cjtpT0IyUl1T9GHmjH84xCq1cGVvFVbe1R1X+8bvPoX7Jh 1OcPtz9tYiYFYak57N6E9lmK7foC09vAlEWRDaS0ynRydJQShUVeQ3G8b81vSksl0T hgQJnWo1RQylw== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v4=2005/10]=20xen/domain:=20Add=20DOMCTL=20handler=20for=20claiming=20memory=20with=20NUMA=20awareness?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1772140767599 Message-Id: <656ff614-9165-49ce-8c55-0cfad33d4ed6@vates.tech> To: "Bernhard Kaindl" , xen-devel@lists.xenproject.org Cc: "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Daniel P. Smith" References: In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.72cbbdec2faa4e42b17a16a616dd5811?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260226:md Date: Thu, 26 Feb 2026 21:19:29 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 26/02/2026 =C3=A0 15:54, Bernhard Kaindl a =C3=A9crit=C2=A0: > Add a DOMCTL handler for claiming memory with NUMA awareness. It > rejects claims when LLC coloring (does not support claims) is enabled > and translates the public constant to the internal NUMA_NO_NODE. > > The request is forwarded to domain_set_outstanding_pages() for the > actual claim processing. The handler uses the same XSM hook as the > legacy XENMEM_claim_pages hypercall. > > While the underlying infrastructure currently supports only a single > claim, the public hypercall interface is designed to be extensible for > multiple claims in the future without breaking the API. > I'm not sure about the idea of introducing a new hypercall for this operation. Though I may be missing some context about the reasons of introducing a new hypercall. XENMEM_claim_pages doesn't have actual support for NUMA, but the hypercall interface seems to define it (e.g you can pass XENMEMF_exact_node(n) to mem_flags). Would it be preferable instead to make XENMEM_claim_pages aware of NUMA-related XENMEMF flags ? > Signed-off-by: Bernhard Kaindl > --- > xen/common/domain.c | 29 ++++++++++++++++++++++++++++ > xen/common/domctl.c | 9 +++++++++ > xen/include/public/domctl.h | 38 +++++++++++++++++++++++++++++++++++++ > xen/include/xen/domain.h | 2 ++ > 4 files changed, 78 insertions(+) > > diff --git a/xen/common/domain.c b/xen/common/domain.c > index e7861259a2b3..ac1b091f5574 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -268,6 +268,35 @@ int get_domain_state(struct xen_domctl_get_domain_st= ate *info, struct domain *d, > return rc; > } > > +/* Claim memory for a domain or reset the claim */ > +int claim_memory(struct domain *d, const struct xen_domctl_claim_memory = *uinfo) > +{ > + memory_claim_t claim; > + > + /* alloc_color_heap_page() does not handle claims, so reject LLC col= oring */ > + if ( llc_coloring_enabled ) > + return -EOPNOTSUPP; > + /* > + * We only support single claims at the moment, and if the domain is > + * dying (d->is_dying is set), its claims have already been released > + */ > + if ( uinfo->pad || uinfo->nr_claims !=3D 1 || d->is_dying ) > + return -EINVAL; > + > + if ( copy_from_guest(&claim, uinfo->claims, 1) ) > + return -EFAULT; > + > + if ( claim.pad ) > + return -EINVAL; > + > + /* Convert the API tag for a host-wide claim to the NUMA_NO_NODE con= stant */ > + if ( claim.node =3D=3D XEN_DOMCTL_CLAIM_MEMORY_NO_NODE ) > + claim.node =3D NUMA_NO_NODE; > + > + /* NB. domain_set_outstanding_pages() has the checks to validate its= args */ > + return domain_set_outstanding_pages(d, claim.pages, claim.node); > +} > + > static void __domain_finalise_shutdown(struct domain *d) > { > struct vcpu *v; > diff --git a/xen/common/domctl.c b/xen/common/domctl.c > index 29a7726d32d0..9e858f631aaf 100644 > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -868,6 +868,15 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) = u_domctl) > ret =3D get_domain_state(&op->u.get_domain_state, d, &op->domai= n); > break; > > + case XEN_DOMCTL_claim_memory: > + /* Use the same XSM hook as XENMEM_claim_pages */ > + ret =3D xsm_claim_pages(XSM_PRIV, d); > + if ( ret ) > + break; > + > + ret =3D claim_memory(d, &op->u.claim_memory); > + break; > + > default: > ret =3D arch_do_domctl(op, d, u_domctl); > break; > diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h > index 8f6708c0a7cd..610806c8b6e0 100644 > --- a/xen/include/public/domctl.h > +++ b/xen/include/public/domctl.h > @@ -1276,6 +1276,42 @@ struct xen_domctl_get_domain_state { > uint64_t unique_id; /* Unique domain identifier. */ > }; > > +/* > + * XEN_DOMCTL_claim_memory > + * > + * Claim memory for a guest domain. The claimed memory is converted into= actual > + * memory pages by allocating it. Except for the option to pass claims f= or > + * multiple NUMA nodes, the semantics are based on host-wide claims as > + * provided by XENMEM_claim_pages, and are identical for host-wide claim= s. > + * > + * The initial implementation supports a claim for the host or a NUMA no= de, but > + * using an array, the API is designed to be extensible to support more = claims. > + */ > +struct xen_memory_claim { > + uint64_aligned_t pages; /* Amount of pages to be allotted to the d= omain */ > + uint32_t node; /* NUMA node, or XEN_DOMCTL_CLAIM_MEMORY_NO_NODE for= host */ > + uint32_t pad; /* padding for alignment, set to 0 on = input */ > +}; > +typedef struct xen_memory_claim memory_claim_t; > +#define XEN_DOMCTL_CLAIM_MEMORY_NO_NODE 0xFFFFFFFF /* No node: host = claim */ > + > +/* Use XEN_NODE_CLAIM_INIT to initialize a memory_claim_t structure */ > +#define XEN_NODE_CLAIM_INIT(_pages, _node) { \ > + .pages =3D (_pages), \ > + .node =3D (_node), \ > + .pad =3D 0 \ > +} > +DEFINE_XEN_GUEST_HANDLE(memory_claim_t); > + > +struct xen_domctl_claim_memory { > + /* IN: array of struct xen_memory_claim */ > + XEN_GUEST_HANDLE_64(memory_claim_t) claims; > + /* IN: number of claims in the claims array handle. See the claims f= ield. */ > + uint32_t nr_claims; > +#define XEN_DOMCTL_MAX_CLAIMS UINT8_MAX /* More claims require changes i= n Xen */ > + uint32_t pad; /* padding for alignment, set it= to 0 */ > +}; > + > struct xen_domctl { > /* Stable domctl ops: interface_version is required to be 0. */ > uint32_t cmd; > @@ -1368,6 +1404,7 @@ struct xen_domctl { > #define XEN_DOMCTL_gsi_permission 88 > #define XEN_DOMCTL_set_llc_colors 89 > #define XEN_DOMCTL_get_domain_state 90 /* stable interface= */ > +#define XEN_DOMCTL_claim_memory 91 > #define XEN_DOMCTL_gdbsx_guestmemio 1000 > #define XEN_DOMCTL_gdbsx_pausevcpu 1001 > #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 > @@ -1436,6 +1473,7 @@ struct xen_domctl { > #endif > struct xen_domctl_set_llc_colors set_llc_colors; > struct xen_domctl_get_domain_state get_domain_state; > + struct xen_domctl_claim_memory claim_memory; > uint8_t pad[128]; > } u; > }; > diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h > index 93c0fd00c1d7..79e8932c4530 100644 > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -193,4 +193,6 @@ extern bool vmtrace_available; > > extern bool vpmu_is_available; > > +int claim_memory(struct domain *d, const struct xen_domctl_claim_memory = *uinfo); > + > #endif /* __XEN_DOMAIN_H__ */ Teddy -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Feb 26 23:16:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 26 Feb 2026 23:16:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242369.1542888 (Exim 4.92) (envelope-from ) id 1vvkaj-0004gY-3Q; Thu, 26 Feb 2026 23:16:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242369.1542888; Thu, 26 Feb 2026 23:16:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvkaj-0004gR-0N; Thu, 26 Feb 2026 23:16:21 +0000 Received: by outflank-mailman (input) for mailman id 1242369; Thu, 26 Feb 2026 23:16:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvkah-0004gL-1B for xen-devel@lists.xenproject.org; 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Smith" Subject: RE: [PATCH v4 05/10] xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness Thread-Topic: [PATCH v4 05/10] xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness Thread-Index: AQHcpy8NKyz6wh/Wrk6CsdW/rK3ShrWVfM8AgAAgIzA= Date: Thu, 26 Feb 2026 23:16:06 +0000 Message-ID: References: <656ff614-9165-49ce-8c55-0cfad33d4ed6@vates.tech> In-Reply-To: <656ff614-9165-49ce-8c55-0cfad33d4ed6@vates.tech> Accept-Language: en-GB, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: LV3PR03MB7707:EE_|MW4PR03MB6523:EE_ x-ms-office365-filtering-correlation-id: 306eb9a0-6b72-409b-19fd-08de758d051f x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|376014|1800799024|366016|38070700021; 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Thu, 26 Feb 2026 22:50:55 -0800 (PST) Message-ID: Date: Fri, 27 Feb 2026 07:50:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: device.c is init-only when OVERLAY_DTB=n To: Andrew Cooper Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , "xen-devel@lists.xenproject.org" References: <53b251a1-948d-4c9c-ba0c-6f4fd99b1d6a@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <53b251a1-948d-4c9c-ba0c-6f4fd99b1d6a@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.02.2026 18:14, Andrew Cooper wrote: > On 26/02/2026 4:28 pm, Jan Beulich wrote: >> --- a/xen/arch/arm/Makefile >> +++ b/xen/arch/arm/Makefile >> @@ -15,7 +15,9 @@ obj-$(CONFIG_HAS_ALTERNATIVE) += alterna >> obj-y += cpuerrata.o >> obj-y += cpufeature.o >> obj-y += decode.o >> -obj-y += device.o >> +device-y := device.init.o >> +device-$(CONFIG_OVERLAY_DTB) := device.o >> +obj-y += $(device-y) > > I know we've argued over this before and not come to a conclusion, but I > still firmly believe this to be an anti-pattern we should expunge. > > obj-y += $(if $(CONFIG_OVERLAY_DTB),device.o,device.init.o) Whereas I think this one (in its adjusted form to really only accept 'y') is, firmly believing that the "lists everywhere" approach is the more readable and, more importantly, more scalable one. The form you suggest quickly gets to its limits when multiple CONFIG_* need dealing with. Jan From xen-devel-bounces@lists.xenproject.org Fri Feb 27 07:33:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 07:33:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242481.1542908 (Exim 4.92) (envelope-from ) id 1vvsLb-0003PL-9t; Fri, 27 Feb 2026 07:33:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242481.1542908; Fri, 27 Feb 2026 07:33:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvsLb-0003PE-6z; Fri, 27 Feb 2026 07:33:15 +0000 Received: by outflank-mailman (input) for mailman id 1242481; Fri, 27 Feb 2026 07:33:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvsLa-0003P8-Ju for xen-devel@lists.xenproject.org; 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The issue has always been intermittent, and not easy to reproduce. Looking at the on-demand governor I've found the two issues fixed on this series. With those fixed I haven't been able to reproduce the issue, but as said I don't have a deterministic way to trigger it. Anyway, the fixes look legit, so regardless of whether there's something else causing my issue, we should take those. I'm a bit surprised no-one has noticed wonky performance with the on-demand governor before; the changes that introduce those issue have been there since the governor was introduced. Neither I know why I've only noticed the low frequency stickiness issue ~last month, if it was indeed caused by the issues here. Thanks, Roger. Roger Pau Monne (2): xen/cpufreq: fix adjusting of sampling window on early exit xen/cpufreq: fix usages of align_timer() in the on-demand governor xen/drivers/cpufreq/cpufreq_ondemand.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 07:33:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 07:33:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242482.1542918 (Exim 4.92) (envelope-from ) id 1vvsLc-0003ca-Hg; Fri, 27 Feb 2026 07:33:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242482.1542918; Fri, 27 Feb 2026 07:33:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvsLc-0003cR-EG; Fri, 27 Feb 2026 07:33:16 +0000 Received: by outflank-mailman (input) for mailman id 1242482; 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This leads to further calls finding an imbalance between the total window time and the idle time, as the total window time is possibly shorter than the idle time. Fix by resetting the sampling window start time in the same block where the current idle time is stored. While there also prevent a duplicated call to NOW() and instead re-use the previously fetched value. Fixes: d6f001cb91ac ("x86: Implement cpufreq ondemand policy") Signed-off-by: Roger Pau Monné --- xen/drivers/cpufreq/cpufreq_ondemand.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/drivers/cpufreq/cpufreq_ondemand.c b/xen/drivers/cpufreq/cpufreq_ondemand.c index 0126a3f5d9b4..537695eaab19 100644 --- a/xen/drivers/cpufreq/cpufreq_ondemand.c +++ b/xen/drivers/cpufreq/cpufreq_ondemand.c @@ -117,11 +117,12 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) cur_ns = NOW(); total_ns = cur_ns - this_dbs_info->prev_cpu_wall; - this_dbs_info->prev_cpu_wall = NOW(); if (total_ns < MIN_DBS_INTERVAL) return; + this_dbs_info->prev_cpu_wall = cur_ns; + /* Get Idle Time */ for_each_cpu(j, policy->cpus) { uint64_t idle_ns, total_idle_ns; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 07:33:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 07:33:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242483.1542928 (Exim 4.92) (envelope-from ) id 1vvsLd-0003pv-O2; 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Adjust the calls to align_timer() in the on-demand governor to pass the expected timer expiration as the first parameter. Fixes: af74e3a15a83 ("cpufreq: align dbs timer for better package C state residency") Fixes: 382b95f627a9 ("Fix cpufreq HW-ALL coordination handle") Signed-off-by: Roger Pau Monné --- xen/drivers/cpufreq/cpufreq_ondemand.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/drivers/cpufreq/cpufreq_ondemand.c b/xen/drivers/cpufreq/cpufreq_ondemand.c index 537695eaab19..0d94c0e464a6 100644 --- a/xen/drivers/cpufreq/cpufreq_ondemand.c +++ b/xen/drivers/cpufreq/cpufreq_ondemand.c @@ -185,7 +185,8 @@ static void cf_check do_dbs_timer(void *dbs) dbs_check_cpu(dbs_info); set_timer(&per_cpu(dbs_timer, dbs_info->cpu), - align_timer(NOW() , dbs_tuners_ins.sampling_rate)); + align_timer(NOW() + dbs_tuners_ins.sampling_rate, + dbs_tuners_ins.sampling_rate)); } static void dbs_timer_init(struct cpu_dbs_info_s *dbs_info) @@ -400,6 +401,6 @@ void cpufreq_dbs_timer_resume(void) (void)cmpxchg(stoppable, -1, 1); } else - set_timer(t, align_timer(now, dbs_tuners_ins.sampling_rate)); + set_timer(t, align_timer(t->expires, dbs_tuners_ins.sampling_rate)); } } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 09:40:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 09:40:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242543.1542939 (Exim 4.92) (envelope-from ) id 1vvuK2-0002W1-1y; Fri, 27 Feb 2026 09:39:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242543.1542939; Fri, 27 Feb 2026 09:39:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvuK1-0002Vu-Tc; Fri, 27 Feb 2026 09:39:45 +0000 Received: by outflank-mailman (input) for mailman id 1242543; Fri, 27 Feb 2026 09:39:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvuK0-0002Vf-Hg for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 09:39:44 +0000 Received: from mail178-23.suw51.mandrillapp.com (mail178-23.suw51.mandrillapp.com [198.2.178.23]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3d64ccc0-13c0-11f1-9ccf-f158ae23cfc8; Fri, 27 Feb 2026 10:39:41 +0100 (CET) Received: from pmta13.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail178-23.suw51.mandrillapp.com (Mailchimp) with ESMTP id 4fMjwD1HT4z35hg4R for ; Fri, 27 Feb 2026 09:39:40 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id f157163a010b4c50a07224fe7c27dba4; Fri, 27 Feb 2026 09:39:40 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3d64ccc0-13c0-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1772185180; x=1772455180; bh=Y1nYe09ke51CdH/6D0EdVY0J4b99jSrb6M8aLy27Luw=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ixcy01PAgLxpT7zq1TLjxcINUb6xHhyryIzEEcdvkHQ7nhnBz5edykZoFT/OXwB0k L+c30A9jtq6AGqpmLqUYqimYsykXlm7Cmi8KqlBZ9jxoDK5EmIXXUp6vrjYG6Miepc tUf26rUVSH44ouA1o0iQL2DGth6oYd2FaiqIxeTFkEYqb83qJdP5lT6+lpTT7qR0bz CNP6VvgJKOdhMwQw/eFvR+rVt5z4nl52Y6bbdRD91ILqLasUBP0ISEmgBx2dMxm1w/ HxUmNmHoSZS23i8/+VUPx4PGWrOLUxxF4+7EELas9cSW4997G6bFs/BA8e+2bmoRSy 2DKW29X9FJBiw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1772185180; x=1772445680; i=teddy.astie@vates.tech; bh=Y1nYe09ke51CdH/6D0EdVY0J4b99jSrb6M8aLy27Luw=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=tOz1SgFXNvE1E4F39kU6xCtAo8ZDv9AtxkBsAcGdwIpghj8WDYHibAEZIZOK5Cs7v +vA0lx7U1BN2V1IydQ2lc/aN/9ceda0BXMI98IJGHyP8S2q+nseObqGPFJCGntZt7b oiGFd6d0a7WDm+JxWToeeoCKunIibakgd5h9xevPITf5YglP5if321+a/pM/zQyOv3 DN+1mFnbPvkoJSp3poqih2X5Qn3MV83XZXSvYxq1O42U/7bmCgVe5BZyfPj4DXzfKo CTA3hsl2gHNA3BTVoZM40bGhxuwQDbfANSUgebwfN33Tv5qinWJvlRsZ+a+UTLIOUh yE74SFH30N5+A== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[PATCH=20v4=2005/10]=20xen/domain:=20Add=20DOMCTL=20handler=20for=20claiming=20memory=20with=20NUMA=20awareness?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1772185177224 Message-Id: To: "Bernhard Kaindl" , xen-devel@lists.xenproject.org Cc: "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "Roger Pau Monne" , "Stefano Stabellini" , "Daniel P. Smith" References: <656ff614-9165-49ce-8c55-0cfad33d4ed6@vates.tech> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.f157163a010b4c50a07224fe7c27dba4?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260227:md Date: Fri, 27 Feb 2026 09:39:40 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 27/02/2026 =C3=A0 00:21, Bernhard Kaindl a =C3=A9crit=C2=A0: > On 26/02/2026 =C3=A0 22:19, Teddy Astie a =C3=A9crit : >> Le 26/02/2026 =C3=A0 15:54, Bernhard Kaindl a =C3=A9crit : >>> Add a DOMCTL handler for claiming memory with NUMA awareness. It >>> rejects claims when LLC coloring (does not support claims) is enabled >>> and translates the public constant to the internal NUMA_NO_NODE. >>> >>> The request is forwarded to domain_set_outstanding_pages() for the >>> actual claim processing. The handler uses the same XSM hook as the >>> legacy XENMEM_claim_pages hypercall. >>> >>> While the underlying infrastructure currently supports only a single >>> claim, the public hypercall interface is designed to be extensible for >>> multiple claims in the future without breaking the API. >> I'm not sure about the idea of introducing a new hypercall for this >> operation. Though I may be missing some context about the reasons of >> introducing a new hypercall. >> >> XENMEM_claim_pages doesn't have actual support for NUMA, but the >> hypercall interface seems to define it (e.g you can pass >> XENMEMF_exact_node(n) to mem_flags). Would it be preferable instead to >> make XENMEM_claim_pages aware of NUMA-related XENMEMF flags ? > > Hello Teddy, > > Thank you for your review =E2=80=94 much appreciated. > > Updating the do_memory_op(XENMEM_claim_pages) handler to accept a node > parameter, as you suggested, is indeed a practical way to retrofit this > feature into existing Xen builds. That=E2=80=99s also the approach we too= k in > v1 of this series: > > * https://lists.xenproject.org/archives/html/xen-devel/2025-03/msg01127.h= tml > * https://patchew.org/Xen/20250314172502.53498-1-alejandro.vallejo@cloud.= com/ > > We are currently using this approach also in the XS9 Public Preview: > > * https://www.xenserver.com/downloads/xs9-preview > > That said, during review, Roger Pau Monn=C3=A9 suggested that for upstrea= m > inclusion, we should introduce a new hypercall API with support for > multi-node claims, even if the initial infrastructure only handles > a single node. See: > > * https://lists.xenproject.org/archives/html/xen-devel/2025-06/msg00484.h= tml > > He raised the concern that the current interface effectively constrains > domains to be allocated from one node at a time, or to sequence claims > across nodes, which undermines the purpose of claims. > > Instead, he proposed that the hypercall interface would ideally allow > making multi-node claims atomically, rather than requiring multiple > calls with rollback in case of failure. > > I favour Roger=E2=80=99s position as well: I think we should aim for a cl= ean > and extensible interface that supports claims across multiple nodes > in a single call. Otherwise, we risk having to introduce yet another > hypercall later when a real-world scenario requires multi-node claims. > > On the implementation side, a reliable first-come, first-served mechanism > for multi-node claims will require serialisation in the central claim pat= h. > Currently, the global heap_lock provides that protection, and it would > naturally cover the creation of a multi-node claim under a single lock, > ensuring atomicity and consistent behaviour. > Ok thanks. Should we state that the old interface is "deprecated" (somehow), and that people should take a look at XEN_DOMCTL_claim_memory instead, especially if they need a NUMA-aware interface ? That could be a note on the XENMEM_claim_memory hypercall. > Thanks again for the review and feedback! > > Best regards / Bien cordialement / Saludos / Liebe Gr=C3=BC=C3=9Fe, > > With warm greetings from Vienna/Austria, > Bernhard Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:40:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:40:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242562.1542947 (Exim 4.92) (envelope-from ) id 1vvvGK-0001ar-9H; Fri, 27 Feb 2026 10:40:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242562.1542947; Fri, 27 Feb 2026 10:40:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvGK-0001ak-6g; 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Fri, 27 Feb 2026 02:39:55 -0800 (PST) MIME-Version: 1.0 References: <0a5f66eaa16f262d4ffad6a8ec4b1b02461f96c1.1772013062.git.bertrand.marquis@arm.com> In-Reply-To: <0a5f66eaa16f262d4ffad6a8ec4b1b02461f96c1.1772013062.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Fri, 27 Feb 2026 11:39:44 +0100 X-Gm-Features: AaiRm51JF90RxqO2uRLppLmMZ0QLQBVcD5zM6vQKFBbZgdtuNotFTKW02KTdOlA Message-ID: Subject: Re: [PATCH 2/4] xen/arm: ffa: Cache SP partition info at init To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 25, 2026 at 11:02=E2=80=AFAM Bertrand Marquis wrote: > > FFA_PARTITION_INFO_GET currently queries the SPMC on each call and walks = the > RX buffer every time. The SP list is expected to be static, so repeated > firmware calls and validation are unnecessary. > > Cache the SPMC partition-info list at init time, keeping only secure > endpoints, and reuse the cached entries for SP count and partition-info > responses. Initialize the VM create/destroy subscriber lists from the cac= hed > list and free the cache on init failure. > > SP partition info now reflects the init-time snapshot and will not change= . > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_partinfo.c | 205 +++++++++++++++++++++----------- > 1 file changed, 138 insertions(+), 67 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_parti= nfo.c > index 6a6f3ffb822e..8a3eac25f99f 100644 > --- a/xen/arch/arm/tee/ffa_partinfo.c > +++ b/xen/arch/arm/tee/ffa_partinfo.c > @@ -6,6 +6,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -33,6 +34,10 @@ static uint16_t subscr_vm_created_count __read_mostly; > static uint16_t *subscr_vm_destroyed __read_mostly; > static uint16_t subscr_vm_destroyed_count __read_mostly; > > +/* SP list cache (secure endpoints only); populated at init. */ > +static void *sp_list __read_mostly; > +static uint32_t sp_list_count __read_mostly; > +static uint32_t sp_list_entry_size __read_mostly; > static int32_t ffa_partition_info_get(struct ffa_uuid uuid, uint32_t fla= gs, > uint32_t *count, uint32_t *fpi_siz= e) > { > @@ -79,92 +84,78 @@ static int32_t ffa_copy_info(void **dst, void *dst_en= d, const void *src, > return FFA_RET_OK; > } > > -static int32_t ffa_get_sp_count(struct ffa_uuid uuid, uint32_t *sp_count= ) > +static bool ffa_sp_entry_matches_uuid(const void *entry, struct ffa_uuid= uuid) > { > - uint32_t src_size; > + const struct ffa_partition_info_1_1 *fpi =3D entry; > + struct ffa_uuid sp_uuid; > + > + if ( ffa_uuid_is_nil(uuid) ) > + return true; > > - return ffa_partition_info_get(uuid, FFA_PARTITION_INFO_GET_COUNT_FLA= G, > - sp_count, &src_size); > + if ( sp_list_entry_size < sizeof(*fpi) ) > + return false; This can never happen since we don't accept SPMC below version 1.1. We even have a check to ensure the SPMC doesn't return a too-small spi_size. > + > + memcpy(&sp_uuid, fpi->uuid, sizeof(sp_uuid)); > + return ffa_uuid_equal(uuid, sp_uuid); > } > > -static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_co= unt, > - void **dst_buf, void *end_buf, > - uint32_t dst_size) > +static int32_t ffa_get_sp_count(struct ffa_uuid uuid, uint32_t *sp_count= ) > { > - int32_t ret; > - int32_t release_ret; > - uint32_t src_size, real_sp_count; > - void *src_buf; > uint32_t count =3D 0; > - bool notify_fw =3D false; > - > - /* We need to use the RX buffer to receive the list */ > - src_buf =3D ffa_rxtx_spmc_rx_acquire(); > - if ( !src_buf ) > - return FFA_RET_DENIED; > - > - ret =3D ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size); > - if ( ret ) > - goto out; > - notify_fw =3D true; > + uint32_t n; > > - /* Validate the src_size we got */ > - if ( src_size < sizeof(struct ffa_partition_info_1_0) || > - src_size >=3D FFA_PAGE_SIZE ) > + for ( n =3D 0; n < sp_list_count; n++ ) > { > - ret =3D FFA_RET_NOT_SUPPORTED; > - goto out; > + void *entry =3D sp_list + n * sp_list_entry_size; > + > + if ( ffa_sp_entry_matches_uuid(entry, uuid) ) > + count++; > } > > - /* > - * Limit the maximum time we hold the CPU by limiting the number of = SPs. > - * We just ignore the extra ones as this is tested during init in > - * ffa_partinfo_init so the only possible reason is SP have been add= ed > - * since boot. > - */ > - if ( real_sp_count > FFA_MAX_NUM_SP ) > - real_sp_count =3D FFA_MAX_NUM_SP; > + *sp_count =3D count; > > - /* Make sure the data fits in our buffer */ > - if ( real_sp_count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / src_siz= e ) > - { > - ret =3D FFA_RET_NOT_SUPPORTED; > - goto out; > - } > + if ( !ffa_uuid_is_nil(uuid) && !count ) > + return FFA_RET_INVALID_PARAMETERS; > > - for ( uint32_t sp_num =3D 0; sp_num < real_sp_count; sp_num++ ) > - { > - struct ffa_partition_info_1_1 *fpi =3D src_buf; > + return FFA_RET_OK; > +} > > - /* filter out SP not following bit 15 convention if any */ > - if ( FFA_ID_IS_SECURE(fpi->id) ) > - { > - /* > - * If VM is 1.0 but firmware is 1.1 we could have several en= tries > - * with the same ID but different UUIDs. In this case the VM= will > - * get a list with several time the same ID. > - * This is a non-compliance to the specification but 1.0 VMs= should > - * handle that on their own to simplify Xen implementation. > - */ > +static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_co= unt, > + void **dst_buf, void *end_buf, > + uint32_t dst_size) > +{ > + int32_t ret; > + uint32_t count =3D 0; > + uint32_t n; > > - ret =3D ffa_copy_info(dst_buf, end_buf, src_buf, dst_size, s= rc_size); > - if ( ret ) > - goto out; > + for ( n =3D 0; n < sp_list_count; n++ ) > + { > + void *entry =3D sp_list + n * sp_list_entry_size; > > - count++; > - } > + if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) > + continue; > > - src_buf +=3D src_size; > + /* > + * If VM is 1.0 but firmware is 1.1 we could have several entrie= s > + * with the same ID but different UUIDs. In this case the VM wil= l > + * get a list with several time the same ID. > + * This is a non-compliance to the specification but 1.0 VMs sho= uld > + * handle that on their own to simplify Xen implementation. > + */ > + ret =3D ffa_copy_info(dst_buf, end_buf, entry, dst_size, > + sp_list_entry_size); > + if ( ret ) > + return ret; > + > + count++; > } > > *sp_count =3D count; > > -out: > - release_ret =3D ffa_rxtx_spmc_rx_release(notify_fw); > - if ( release_ret ) > - gprintk(XENLOG_WARNING, > - "ffa: Error releasing SPMC RX buffer: %d\n", release_ret= ); > - return ret; > + if ( !ffa_uuid_is_nil(uuid) && !count ) > + return FFA_RET_INVALID_PARAMETERS; > + > + return FFA_RET_OK; > } > > static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t start_= index, > @@ -435,6 +426,14 @@ static int32_t ffa_direct_req_send_vm(uint16_t sp_id= , uint16_t vm_id, > return res; > } > > +static void ffa_sp_list_cache_free(void) > +{ > + XFREE(sp_list); > + sp_list =3D NULL; XFREE() is already setting sp_list to NULL. > + sp_list_count =3D 0; > + sp_list_entry_size =3D 0; > +} > + > static void uninit_subscribers(void) > { > subscr_vm_created_count =3D 0; > @@ -443,6 +442,68 @@ static void uninit_subscribers(void) > XFREE(subscr_vm_destroyed); > } > > +static bool ffa_sp_list_cache_init(const void *buf, uint32_t count, > + uint32_t fpi_size) > +{ > + const uint8_t *src =3D buf; > + uint32_t secure_count =3D 0; > + uint32_t n, idx =3D 0; > + bool warned =3D false; > + > + if ( fpi_size < sizeof(struct ffa_partition_info_1_0) || > + fpi_size >=3D FFA_PAGE_SIZE ) > + return false; Would it make sense to check that fpi_size is well aligned with struct ffa_partition_info_1_0? If it's an odd size, we'll make unaligned accesses below with memcpy(). But perhaps that's a bit much. The SPMC isn't supposed to provide garbage. > + > + if ( count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / fpi_size ) > + return false; > + > + for ( n =3D 0; n < count; n++ ) > + { > + const struct ffa_partition_info_1_0 *fpi =3D > + (const void *)(src + n * fpi_size); > + > + if ( !FFA_ID_IS_SECURE(fpi->id) ) > + { > + if ( !warned ) Is this needed? Doesn't printk_once() already ensure this? Or did you happen to leave printk_once() by mistake and meant for this to be printed once each time ffa_sp_list_cache_init() is called, since "warned" isn't static. > + { > + printk_once(XENLOG_ERR > + "ffa: Firmware is not using bit 15 conventio= n for IDs !!\n"); > + warned =3D true; > + } > + printk(XENLOG_ERR > + "ffa: Secure partition with id 0x%04x cannot be used\= n", > + fpi->id); > + continue; > + } > + > + secure_count++; > + } > + > + if ( secure_count ) > + { > + sp_list =3D xzalloc_bytes(secure_count * fpi_size); > + if ( !sp_list ) > + return false; > + } > + > + sp_list_count =3D secure_count; > + sp_list_entry_size =3D fpi_size; > + > + for ( n =3D 0; n < count; n++ ) > + { > + const struct ffa_partition_info_1_0 *fpi =3D > + (const void *)(src + n * fpi_size); > + > + if ( !FFA_ID_IS_SECURE(fpi->id) ) > + continue; > + > + memcpy(sp_list + idx * fpi_size, fpi, fpi_size); > + idx++; > + } > + > + return true; > +} > + > static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_siz= e) > { > uint16_t n; > @@ -549,12 +610,22 @@ bool ffa_partinfo_init(void) > goto out; > } > > - ret =3D init_subscribers(spmc_rx, count, fpi_size); > + if ( !ffa_sp_list_cache_init(spmc_rx, count, fpi_size) ) > + { > + printk(XENLOG_ERR "ffa: Failed to cache SP list\n"); > + goto out; > + } > + > + ret =3D init_subscribers(sp_list, sp_list_count, sp_list_entry_size)= ; > > out: > e =3D ffa_rxtx_spmc_rx_release(notify_fw); > if ( e ) > printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n= ", e); > + if ( !ret ) > + uninit_subscribers(); ret is initially false and can only be set to true if init_subscribers() returns true. So there's never any point in calling uninit_subscribers(). > + if ( !ret ) > + ffa_sp_list_cache_free(); ret can be false even if ffa_sp_list_cache_init() hasn't been called yet. Calling ffa_sp_list_cache_free() anyway is harmless, but not elegant. Cheers, Jens > return ret; > } > > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:58:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:58:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242578.1542998 (Exim 4.92) (envelope-from ) id 1vvvYH-0005MV-Qh; Fri, 27 Feb 2026 10:58:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242578.1542998; Fri, 27 Feb 2026 10:58:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYH-0005Lz-Ln; Fri, 27 Feb 2026 10:58:33 +0000 Received: by outflank-mailman (input) for mailman id 1242578; Fri, 27 Feb 2026 10:58:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYG-0004x2-OW for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 10:58:32 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3fccfa9a-13cb-11f1-9ccf-f158ae23cfc8; Fri, 27 Feb 2026 11:58:30 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTPS id 1CD1B81CEB9E; Fri, 27 Feb 2026 05:57:58 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3fccfa9a-13cb-11f1-9ccf-f158ae23cfc8 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v2 3/4] tools/tests/x86_emulator: fix undefined behaviour in shift Date: Fri, 27 Feb 2026 10:58:22 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes this `-fsanitize=undefined` error: ``` test_x86_emulator.c:1103:32: runtime error: left shift of 573785183 by 2 places cannot be represented in type 'int' SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior test_x86_emulator.c:1103:32 ``` Signed-off-by: Edwin Török --- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 8f93a8bbcd..3a03ea0352 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -1100,7 +1100,7 @@ int main(int argc, char **argv) regs.edi = (unsigned long)res; rc = x86_emulate(&ctxt, &emulops); if ( (rc != X86EMUL_OKAY) || - (*res != ((0x2233445F << 2) | 2)) || + (*res != ((0x2233445FUL << 2) | 2)) || ((regs.eflags & (EFLAGS_MASK & ~X86_EFLAGS_OF)) != EFLAGS_ALWAYS_SET) || (regs.eip != (unsigned long)&instr[3]) ) -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:58:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:58:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242574.1542959 (Exim 4.92) (envelope-from ) id 1vvvYE-0004VC-Np; Fri, 27 Feb 2026 10:58:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242574.1542959; Fri, 27 Feb 2026 10:58:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYE-0004V5-Jg; Fri, 27 Feb 2026 10:58:30 +0000 Received: by outflank-mailman (input) for mailman id 1242574; Fri, 27 Feb 2026 10:58:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYD-0004Ur-2r for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 10:58:29 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3e74d17c-13cb-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 11:58:28 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTPS id C298D81CEB9E; Fri, 27 Feb 2026 05:57:55 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3e74d17c-13cb-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v2 0/4] Fix building tools/tests/x86_emulator with clang-21 Date: Fri, 27 Feb 2026 10:58:19 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changed since v1: * filed upstream bug and added reference for integrated-as issue * use .ifndef directive instead of volatile workaround * fixed 2 more undefined behaviour warnings from fsanitize=undefined This makes the tests build (but not yet run) with clang. I dropped the ifdef __clang__ patch: compiling just x86-emulate.c with clang and the rest with GCC fails too, so there are probably some implicit assumptions about x86_emulate not modifying some registers (but when compiled with clang it does). I don't have a good solution for these, and I don't understand what most of these tests are trying to test. For example I don't see how this tests the result of the emulator, where rc is entirely computed by the asm block (and with clang the result here is 0xfffe instead of 0xffff): ``` asm volatile ( "pcmpeqb %%xmm1, %%xmm1\n" put_insn(movq_from_mem2, "movq 32(%0), %%xmm1") :: "c" (NULL) ); set_insn(movq_from_mem2); rc = x86_emulate(&ctxt, &emulops); if ( rc != X86EMUL_OKAY || !check_eip(movq_from_mem2) ) goto fail; asm ( "pcmpgtb %%xmm0, %%xmm0\n\t" "pcmpeqb %%xmm1, %%xmm0\n\t" "pmovmskb %%xmm0, %0" : "=r" (rc) ); if ( rc != 0xffff ) goto fail; ``` After fixing the bugs reported by UBSAN/MSAN (and disabling the memset wrapper which causes it to infloop) the tests still fail. Using -Os doesn't help either. valgrind also fails here, but that could be a bug in valgrind: Testing mulx (%eax),%ecx,%ebx... failed! Edwin Török (4): tools/tests/x86_emulator: avoid duplicate symbol error with clang tools/tests/x86_emulator: fix build on clang-21 tools/tests/x86_emulator: fix undefined behaviour in shift tools/tests/x86_emulator: avoid passing NULL to memcpy tools/tests/x86_emulator/Makefile | 5 +++++ tools/tests/x86_emulator/test_x86_emulator.c | 14 ++++++++++---- 2 files changed, 15 insertions(+), 4 deletions(-) -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:58:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:58:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242577.1542981 (Exim 4.92) (envelope-from ) id 1vvvYG-0004yp-Hq; Fri, 27 Feb 2026 10:58:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242577.1542981; Fri, 27 Feb 2026 10:58:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYG-0004xQ-DR; Fri, 27 Feb 2026 10:58:32 +0000 Received: by outflank-mailman (input) for mailman id 1242577; Fri, 27 Feb 2026 10:58:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYF-0004Ur-O5 for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 10:58:31 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 404897f6-13cb-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 11:58:31 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTPS id D996381CEB9F; Fri, 27 Feb 2026 05:57:58 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 404897f6-13cb-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v2 4/4] tools/tests/x86_emulator: avoid passing NULL to memcpy Date: Fri, 27 Feb 2026 10:58:23 +0000 Message-ID: <340f6a9fc4fdd4216f41e4bbdb1234069322d1c8.1772189234.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes this `-fsanitize=undefined` error: ``` test_x86_emulator.c:614:12: runtime error: null pointer passed as argument 1, which is declared to never be null /usr/include/string.h:44:28: note: nonnull attribute specified here SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior test_x86_emulator.c:614:12 ``` Although this is more of a grey area: I don't see anything in the standard that'd forbid calling `memset` with NULL and 0, but `glibc` does specify it as non-null, which allows the compiler to make optimizations assuming it never is NULL, so this is undefined behaviour only on glibc. Best to avoid the potential undefined behaviour though. Signed-off-by: Edwin Török --- tools/tests/x86_emulator/test_x86_emulator.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 3a03ea0352..87c1289afa 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -611,7 +611,8 @@ static int fetch( if ( verbose ) printf("** %s(CS:%p,, %u,)\n", __func__, (void *)offset, bytes); - memcpy(p_data, (void *)offset, bytes); + if (bytes) + memcpy(p_data, (void *)offset, bytes); return X86EMUL_OKAY; } -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:58:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:58:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242576.1542978 (Exim 4.92) (envelope-from ) id 1vvvYG-0004vr-Au; Fri, 27 Feb 2026 10:58:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242576.1542978; Fri, 27 Feb 2026 10:58:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYG-0004vk-6o; Fri, 27 Feb 2026 10:58:32 +0000 Received: by outflank-mailman (input) for mailman id 1242576; Fri, 27 Feb 2026 10:58:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYE-0004Ur-No for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 10:58:30 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3f63a361-13cb-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 11:58:29 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTPS id 5464281CEBA0; Fri, 27 Feb 2026 05:57:57 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3f63a361-13cb-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v2 2/4] tools/tests/x86_emulator: fix build on clang-21 Date: Fri, 27 Feb 2026 10:58:21 +0000 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang-21's built-in assembler is enabled by default, but it doesn't support some mnemonics: ``` test_x86_emulator.c:2636:36: error: invalid instruction mnemonic 'fsaves' 2636 | "fidivs %1\n\t" test_x86_emulator.c:2640:24: error: invalid instruction mnemonic 'frstors' 2640 | asm volatile ( "frstors %0" :: "m" (res[25]) : "memory" ); | ^ test_x86_emulator.c:4251:24: error: invalid instruction mnemonic 'vpcmpestriq' 4251 | put_insn(vpcmpestri, | ^ ``` Use the external assembler with Clang for consistency with GCC. Signed-off-by: Edwin Török --- Changed since v1: * filed upstream bug and added reference --- tools/tests/x86_emulator/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index e18725d0c3..5003c464f3 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -297,6 +297,11 @@ x86_emulate: HOSTCFLAGS-x86_64 := -fno-PIE $(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-pie) + +# clang's integrated as does not support some mnemonics: +# https://github.com/llvm/llvm-project/issues/183635 +$(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-integrated-as) + HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 10:58:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 10:58:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242575.1542965 (Exim 4.92) (envelope-from ) id 1vvvYF-0004YU-2B; Fri, 27 Feb 2026 10:58:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242575.1542965; Fri, 27 Feb 2026 10:58:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYE-0004XF-QJ; Fri, 27 Feb 2026 10:58:30 +0000 Received: by outflank-mailman (input) for mailman id 1242575; Fri, 27 Feb 2026 10:58:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvYD-0004Ur-Nn for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 10:58:29 +0000 Received: from na1pdmzitismtp02.tibco.com (unknown [160.101.131.9]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3eea9b42-13cb-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 11:58:28 +0100 (CET) Received: from localhost.localdomain (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTPS id 8BBEA81CEB9D; Fri, 27 Feb 2026 05:57:56 -0500 (EST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3eea9b42-13cb-11f1-b164-2bf370ae4941 From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD Subject: [PATCH v2 1/4] tools/tests/x86_emulator: avoid duplicate symbol error with clang Date: Fri, 27 Feb 2026 10:58:20 +0000 Message-ID: <358a87d89d50475a57f2a5d6ebea01d95a1df6d7.1772189234.git.edwin.torok@citrix.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clang would duplicate the loop body and end up with a double definition of the symbol: ``` /tmp/test_x86_emulator-0f3576.s:27823: Error: symbol `vmovsh_to_mem' is already defined /tmp/test_x86_emulator-0f3576.s:27825: Error: symbol `.Lvmovsh_to_mem_end' is already defined ``` Avoid this by only emitting the symbols surrounding the instructions if they are not already defined. (We know that the definitions would be identical, and we only need one of them as input to the emulator) Signed-off-by: Edwin Török --- Changed since v1: * use .ifndef directive instead of volatile workaround --- tools/tests/x86_emulator/test_x86_emulator.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index ea507f9c3a..8f93a8bbcd 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -1882,8 +1882,13 @@ int main(int argc, char **argv) #define decl_insn(which) extern const unsigned char which[], \ which##_end[] asm ( ".L" #which "_end" ) #define put_insn(which, insn) ".pushsection .test\n" \ - #which ": " insn "\n" \ + ".ifndef "#which"\n" \ + #which ": \n" \ + ".endif\n" \ + insn "\n" \ + ".ifndef .L"#which"_end\n" \ ".L" #which "_end:\n" \ + ".endif\n" \ ".popsection" #define set_insn(which) (regs.eip = (unsigned long)(which)) #define valid_eip(which) (regs.eip >= (unsigned long)(which) && \ @@ -5248,7 +5253,7 @@ int main(int argc, char **argv) memset(res + 3, ~0, 8); regs.eax = (unsigned long)res; regs.ecx = ~0; - for ( i = 0; i < 2; ++i ) + for (i = 0; i < 2; ++i ) { decl_insn(vmovsh_to_mem); -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 11:02:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 11:02:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242640.1543008 (Exim 4.92) (envelope-from ) id 1vvvbr-000868-9u; Fri, 27 Feb 2026 11:02:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242640.1543008; Fri, 27 Feb 2026 11:02:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvbr-000861-6E; Fri, 27 Feb 2026 11:02:15 +0000 Received: by outflank-mailman (input) for mailman id 1242640; Fri, 27 Feb 2026 11:02:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvvbp-00085v-Tn for xen-devel@lists.xenproject.org; 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Fri, 27 Feb 2026 03:04:16 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Fri, 27 Feb 2026 12:04:05 +0100 X-Gm-Features: AaiRm51Y4_eS1nheyFso7Oz7fzWFW3GCRsplKYVGsL2zpKMX470K9nqLWluSiBI Message-ID: Subject: Re: [PATCH 3/4] xen/arm: ffa: Drop SP subscriber lists To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 25, 2026 at 11:02=E2=80=AFAM Bertrand Marquis wrote: > > The init-time SP cache already contains partition properties, but the > code still builds separate subscriber arrays for VM created/destroyed > notifications. That duplicates state and allocation. > > Use the cached SP list directly to: > - decide which SPs receive created/destroyed notifications > - build the per-domain destroy bitmap > - skip destroy notifications for SPs not notified on create > > No functional changes. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa_partinfo.c | 155 ++++++++------------------------ > 1 file changed, 36 insertions(+), 119 deletions(-) Looks good: Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_parti= nfo.c > index 8a3eac25f99f..d7f9b9f7153c 100644 > --- a/xen/arch/arm/tee/ffa_partinfo.c > +++ b/xen/arch/arm/tee/ffa_partinfo.c > @@ -28,12 +28,6 @@ struct ffa_partition_info_1_1 { > uint8_t uuid[16]; > }; > > -/* SPs subscribing to VM_CREATE and VM_DESTROYED events */ > -static uint16_t *subscr_vm_created __read_mostly; > -static uint16_t subscr_vm_created_count __read_mostly; > -static uint16_t *subscr_vm_destroyed __read_mostly; > -static uint16_t subscr_vm_destroyed_count __read_mostly; > - > /* SP list cache (secure endpoints only); populated at init. */ > static void *sp_list __read_mostly; > static uint32_t sp_list_count __read_mostly; > @@ -434,14 +428,6 @@ static void ffa_sp_list_cache_free(void) > sp_list_entry_size =3D 0; > } > > -static void uninit_subscribers(void) > -{ > - subscr_vm_created_count =3D 0; > - subscr_vm_destroyed_count =3D 0; > - XFREE(subscr_vm_created); > - XFREE(subscr_vm_destroyed); > -} > - > static bool ffa_sp_list_cache_init(const void *buf, uint32_t count, > uint32_t fpi_size) > { > @@ -504,79 +490,6 @@ static bool ffa_sp_list_cache_init(const void *buf, = uint32_t count, > return true; > } > > -static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_siz= e) > -{ > - uint16_t n; > - uint16_t c_pos; > - uint16_t d_pos; > - struct ffa_partition_info_1_1 *fpi; > - > - if ( fpi_size < sizeof(struct ffa_partition_info_1_1) ) > - { > - printk(XENLOG_ERR "ffa: partition info size invalid: %u\n", fpi_= size); > - return false; > - } > - > - subscr_vm_created_count =3D 0; > - subscr_vm_destroyed_count =3D 0; > - for ( n =3D 0; n < count; n++ ) > - { > - fpi =3D buf + n * fpi_size; > - > - /* > - * We need to have secure partitions using bit 15 set convention= for > - * secure partition IDs. > - * Inform the user with a log and discard giving created or dest= roy > - * event to those IDs. > - */ > - if ( !FFA_ID_IS_SECURE(fpi->id) ) > - { > - printk_once(XENLOG_ERR > - "ffa: Firmware is not using bit 15 convention fo= r IDs !!\n"); > - printk(XENLOG_ERR > - "ffa: Secure partition with id 0x%04x cannot be used\= n", > - fpi->id); > - } > - else > - { > - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED= ) > - subscr_vm_created_count++; > - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROY= ED ) > - subscr_vm_destroyed_count++; > - } > - } > - > - if ( subscr_vm_created_count ) > - subscr_vm_created =3D xzalloc_array(uint16_t, subscr_vm_created_= count); > - if ( subscr_vm_destroyed_count ) > - subscr_vm_destroyed =3D xzalloc_array(uint16_t, > - subscr_vm_destroyed_count); > - if ( (subscr_vm_created_count && !subscr_vm_created) || > - (subscr_vm_destroyed_count && !subscr_vm_destroyed) ) > - { > - printk(XENLOG_ERR "ffa: Failed to allocate subscription lists\n"= ); > - uninit_subscribers(); > - return false; > - } > - > - for ( c_pos =3D 0, d_pos =3D 0, n =3D 0; n < count; n++ ) > - { > - fpi =3D buf + n * fpi_size; > - > - if ( FFA_ID_IS_SECURE(fpi->id) ) > - { > - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED= ) > - subscr_vm_created[c_pos++] =3D fpi->id; > - if ( fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROY= ED ) > - subscr_vm_destroyed[d_pos++] =3D fpi->id; > - } > - } > - > - return true; > -} > - > - > - > bool ffa_partinfo_init(void) > { > bool ret =3D false; > @@ -616,48 +529,43 @@ bool ffa_partinfo_init(void) > goto out; > } > > - ret =3D init_subscribers(sp_list, sp_list_count, sp_list_entry_size)= ; > + if ( sp_list_entry_size < sizeof(struct ffa_partition_info_1_1) ) > + { > + printk(XENLOG_ERR "ffa: partition info size invalid: %u\n", > + sp_list_entry_size); > + goto out; > + } > + ret =3D true; > > out: > e =3D ffa_rxtx_spmc_rx_release(notify_fw); > if ( e ) > printk(XENLOG_WARNING "ffa: Error releasing SPMC RX buffer: %d\n= ", e); > - if ( !ret ) > - uninit_subscribers(); > if ( !ret ) > ffa_sp_list_cache_free(); > return ret; > } > > -static bool is_in_subscr_list(const uint16_t *subscr, uint16_t start, > - uint16_t end, uint16_t sp_id) > +static void vm_destroy_bitmap_init(struct ffa_ctx *ctx, > + unsigned int first_unnotified) > { > unsigned int n; > + struct ffa_partition_info_1_1 *fpi; > > - for ( n =3D start; n < end; n++ ) > + for ( n =3D 0; n < sp_list_count; n++ ) > { > - if ( subscr[n] =3D=3D sp_id ) > - return true; > - } > - > - return false; > -} > + fpi =3D sp_list + n * sp_list_entry_size; > > -static void vm_destroy_bitmap_init(struct ffa_ctx *ctx, > - unsigned int create_signal_count) > -{ > - unsigned int n; > + if ( !(fpi->partition_properties & FFA_PART_PROP_NOTIF_DESTROYED= ) ) > + continue; > > - for ( n =3D 0; n < subscr_vm_destroyed_count; n++ ) > - { > /* > * Skip SPs subscribed to the VM created event that never was > * notified of the VM creation due to an error during > * ffa_domain_init(). > */ > - if ( is_in_subscr_list(subscr_vm_created, create_signal_count, > - subscr_vm_created_count, > - subscr_vm_destroyed[n]) ) > + if ( (fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED) &= & > + n >=3D first_unnotified ) > continue; > > set_bit(n, ctx->vm_destroy_bitmap); > @@ -666,32 +574,39 @@ static void vm_destroy_bitmap_init(struct ffa_ctx *= ctx, > > int32_t ffa_partinfo_domain_init(struct domain *d) > { > - unsigned int count =3D BITS_TO_LONGS(subscr_vm_destroyed_count); > + unsigned int count =3D BITS_TO_LONGS(sp_list_count); > struct ffa_ctx *ctx =3D d->arch.tee; > unsigned int n; > + unsigned int first_unnotified =3D sp_list_count; > int32_t res; > + struct ffa_partition_info_1_1 *fpi; > > - if ( !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32) ) > + if ( !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32) || !sp_list_co= unt ) > return 0; > > ctx->vm_destroy_bitmap =3D xzalloc_array(unsigned long, count); > if ( !ctx->vm_destroy_bitmap ) > return -ENOMEM; > > - for ( n =3D 0; n < subscr_vm_created_count; n++ ) > + for ( n =3D 0; n < sp_list_count; n++ ) > { > - res =3D ffa_direct_req_send_vm(subscr_vm_created[n], ffa_get_vm_= id(d), > + fpi =3D sp_list + n * sp_list_entry_size; > + if ( !(fpi->partition_properties & FFA_PART_PROP_NOTIF_CREATED) = ) > + continue; > + > + res =3D ffa_direct_req_send_vm(fpi->id, ffa_get_vm_id(d), > FFA_MSG_SEND_VM_CREATED); > if ( res ) > { > printk(XENLOG_ERR "ffa: Failed to report creation of vm_id %= u to %u: res %d\n", > - ffa_get_vm_id(d), subscr_vm_created[n], res); > + ffa_get_vm_id(d), fpi->id, res); > + first_unnotified =3D n; > break; > } > } > - vm_destroy_bitmap_init(ctx, n); > + vm_destroy_bitmap_init(ctx, first_unnotified); > > - if ( n !=3D subscr_vm_created_count ) > + if ( first_unnotified !=3D sp_list_count ) > return -EIO; > > return 0; > @@ -702,22 +617,24 @@ bool ffa_partinfo_domain_destroy(struct domain *d) > struct ffa_ctx *ctx =3D d->arch.tee; > unsigned int n; > int32_t res; > + struct ffa_partition_info_1_1 *fpi; > > if ( !ctx->vm_destroy_bitmap ) > return true; > > - for ( n =3D 0; n < subscr_vm_destroyed_count; n++ ) > + for ( n =3D 0; n < sp_list_count; n++ ) > { > if ( !test_bit(n, ctx->vm_destroy_bitmap) ) > continue; > > - res =3D ffa_direct_req_send_vm(subscr_vm_destroyed[n], ffa_get_v= m_id(d), > + fpi =3D sp_list + n * sp_list_entry_size; > + res =3D ffa_direct_req_send_vm(fpi->id, ffa_get_vm_id(d), > FFA_MSG_SEND_VM_DESTROYED); > > if ( res && printk_ratelimit() ) > printk(XENLOG_WARNING > "%pd: ffa: Failed to report destruction of vm_id %u t= o %u: res %d\n", > - d, ffa_get_vm_id(d), subscr_vm_destroyed[n], res); > + d, ffa_get_vm_id(d), fpi->id, res); > > /* > * For these two error codes the hypervisor is expected to resen= d > @@ -729,7 +646,7 @@ bool ffa_partinfo_domain_destroy(struct domain *d) > clear_bit(n, ctx->vm_destroy_bitmap); > } > > - if ( bitmap_empty(ctx->vm_destroy_bitmap, subscr_vm_destroyed_count)= ) > + if ( bitmap_empty(ctx->vm_destroy_bitmap, sp_list_count) ) > XFREE(ctx->vm_destroy_bitmap); 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Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <671d83d0-fe8a-4da1-af06-a09221a8442f@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External On 2/24/26 02:09, Jan Beulich wrote: > On 23.02.2026 19:49, Daniel P. Smith wrote: >> On 2/23/26 10:22, Jan Beulich wrote: >>> On 19.02.2026 19:45, Daniel P. Smith wrote: >>>> --- a/xen/drivers/char/console.c >>>> +++ b/xen/drivers/char/console.c >>>> @@ -554,7 +554,7 @@ struct domain *console_get_domain(void) >>>> if ( !d ) >>>> return NULL; >>>> >>>> - if ( d->console->input_allowed ) >>>> + if ( !xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >>>> return d; >>>> >>>> rcu_unlock_domain(d); >>>> @@ -595,7 +595,7 @@ static void console_switch_input(void) >>>> d = rcu_lock_domain_by_id(domid); >>>> if ( d ) >>>> { >>>> - if ( !d->console->input_allowed ) >>>> + if ( xsm_console_io(XSM_OTHER, d, CONSOLEIO_read) ) >>>> { >>>> rcu_unlock_domain(d); >>>> continue; >>> >>> At least the latter of these two can be called from an IRQ handler, and can >>> be called with IRQs off. Flask's avc_audit() looks to be using a spinlock, >>> which isn't IRQ-safe. (There may be other lock involved; I merely went as far >>> as I needed to to find the first one.) IOW I fear you can't call >>> xsm_console_io() from here. >> >> Apologies that I didn't consider the IRQ context. With that said, we >> can't be wiring non-XSM access control paths that circumvent FLASK's >> ability to control domain access to a resource. > > I feel like I can interpret this last sentence in different ways. Are you > suggesting that this effort needs to be dropped, and the situation needs > leaving as is? If so, aren't there options to move at least a little > closer to what is wanted? What I am saying is it needs to be controlled via XSM, so a means to enable that needs to be determined. V/r, dps From xen-devel-bounces@lists.xenproject.org Fri Feb 27 13:31:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 13:31:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242815.1543037 (Exim 4.92) (envelope-from ) id 1vvxwK-0002rh-0i; Fri, 27 Feb 2026 13:31:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242815.1543037; Fri, 27 Feb 2026 13:31:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvxwJ-0002ra-U8; Fri, 27 Feb 2026 13:31:31 +0000 Received: by outflank-mailman (input) for mailman id 1242815; Fri, 27 Feb 2026 13:31:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vvxwH-0002rT-MV for xen-devel@lists.xenproject.org; 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Fri, 27 Feb 2026 13:31:26 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9e57639e-13e0-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1772199086; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=MjLceajnFqhra3Jb3mX4oFtSi4Rj0D7JYvmHOrBhBS8=; b=id1cmgUt3Yv1H5NiPzA9q5bUsqsH0ZUnY9pkeqV5eXfwICs9MgzOPWVgeD+V2jdO0P0mU3 41TpRGU5TvnfF7SmFV8sFbibol8Tkj2hL5JxiMMESdbTvIdDIvvTUI/2Xmf3fdANZaSR5c XEtL/428Gp5pqQVSHEffcFiXH7+ANy4= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1772199086; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; 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TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_TRACE(0.00)[0:+]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; TO_DN_SOME(0.00)[]; FREEMAIL_TO(0.00)[linux.intel.com,kernel.org,gmail.com,ffwll.ch]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; ARC_NA(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.de:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:mid,suse.de:email]; RCPT_COUNT_SEVEN(0.00)[8]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCVD_VIA_SMTP_AUTH(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Rspamd-Queue-Id: C7E923FFF7 X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: Instead of testing import_attach for imported GEM buffers, invoke drm_gem_is_imported() to do the test. The test itself does not change. Signed-off-by: Thomas Zimmermann Cc: Oleksandr Andrushchenko Cc: xen-devel@lists.xenproject.org --- drivers/gpu/drm/xen/xen_drm_front_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xen/xen_drm_front_gem.c b/drivers/gpu/drm/xen/xen_drm_front_gem.c index eec4c1da3f9e..280982b85ce7 100644 --- a/drivers/gpu/drm/xen/xen_drm_front_gem.c +++ b/drivers/gpu/drm/xen/xen_drm_front_gem.c @@ -203,7 +203,7 @@ void xen_drm_front_gem_free_object_unlocked(struct drm_gem_object *gem_obj) { struct xen_gem_object *xen_obj = to_xen_gem_obj(gem_obj); - if (xen_obj->base.import_attach) { + if (drm_gem_is_imported(&xen_obj->base)) { drm_prime_gem_destroy(&xen_obj->base, xen_obj->sgt_imported); gem_free_pages_array(xen_obj); } else { -- 2.52.0 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 14:57:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 14:57:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242888.1543048 (Exim 4.92) (envelope-from ) id 1vvzHA-00054c-UZ; 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Fri, 27 Feb 2026 06:57:04 -0800 (PST) MIME-Version: 1.0 References: <832ba950a53a7139b51053f6570fd9b26ba42df1.1772013062.git.bertrand.marquis@arm.com> In-Reply-To: <832ba950a53a7139b51053f6570fd9b26ba42df1.1772013062.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Fri, 27 Feb 2026 15:56:52 +0100 X-Gm-Features: AaiRm52qXEoJkbSGbyYrWc6fx9m2wzqoHPewwueJaXSJbodqLMDRNjJ0RE4Fs7Y Message-ID: Subject: Re: [PATCH 4/4] xen/arm: ffa: Add cached GET_REGS support To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bertrand, On Wed, Feb 25, 2026 at 11:02=E2=80=AFAM Bertrand Marquis wrote: > > FF-A v1.2 defines PARTITION_INFO_GET_REGS for register-based partition > info retrieval, but Xen currently only supports the buffer-based GET > path for guests. > > Implement GET_REGS using the cached SP list and VM entries, including > the register window layout and input validation. Track VM list changes > via the partinfo tag and use it to validate GET_REGS tag inputs. Ensure > that when a non-Nil UUID is specified, the UUID fields in both GET and > GET_REGS results are MBZ as required by the specification. > > PARTITION_INFO_GET_REGS is available to v1.2 guests, returning cached SP > entries and VM entries with UUIDs zeroed for non-Nil UUID queries. > > Signed-off-by: Bertrand Marquis > --- > xen/arch/arm/tee/ffa.c | 16 +++ > xen/arch/arm/tee/ffa_partinfo.c | 211 ++++++++++++++++++++++++++++++++ > xen/arch/arm/tee/ffa_private.h | 4 +- > 3 files changed, 230 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index aa43ae2595d7..d56eb20c2239 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -44,6 +44,11 @@ > * - doesn't support signalling the secondary scheduler of pending > * notification for secure partitions > * - doesn't support notifications for Xen itself > + * o FFA_PARTITION_INFO_GET/GET_REGS: > + * - v1.0 guests may see duplicate SP IDs when firmware provides UUIDs > + * - SP list is cached at init; SPMC tag changes are not tracked > + * between calls > + * - SP list is capped at FFA_MAX_NUM_SP entries > * > * There are some large locked sections with ffa_spmc_tx_lock and > * ffa_spmc_rx_lock. Especially the ffa_spmc_tx_lock spinlock used > @@ -188,6 +193,7 @@ static bool ffa_negotiate_version(struct cpu_user_reg= s *regs) > write_lock(&ffa_ctx_list_rwlock); > list_add_tail(&ctx->ctx_list, &ffa_ctx_head); > write_unlock(&ffa_ctx_list_rwlock); > + ffa_partinfo_inc_tag(); > } > > goto out_continue; > @@ -341,6 +347,12 @@ static void handle_features(struct cpu_user_regs *re= gs) > case FFA_FEATURE_SCHEDULE_RECV_INTR: > ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0); > break; > + case FFA_PARTITION_INFO_GET_REGS: > + if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > + break; > > case FFA_NOTIFICATION_BIND: > case FFA_NOTIFICATION_UNBIND: > @@ -402,6 +414,9 @@ static bool ffa_handle_call(struct cpu_user_regs *reg= s) > case FFA_PARTITION_INFO_GET: > ffa_handle_partition_info_get(regs); > return true; > + case FFA_PARTITION_INFO_GET_REGS: > + ffa_handle_partition_info_get_regs(regs); > + return true; > case FFA_RX_RELEASE: > e =3D ffa_rx_release(ctx); > break; > @@ -629,6 +644,7 @@ static int ffa_domain_teardown(struct domain *d) > write_lock(&ffa_ctx_list_rwlock); > list_del(&ctx->ctx_list); > write_unlock(&ffa_ctx_list_rwlock); > + ffa_partinfo_inc_tag(); > } > > ffa_rxtx_domain_destroy(d); > diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_parti= nfo.c > index d7f9b9f7153c..1c7b3579f798 100644 > --- a/xen/arch/arm/tee/ffa_partinfo.c > +++ b/xen/arch/arm/tee/ffa_partinfo.c > @@ -28,10 +28,39 @@ struct ffa_partition_info_1_1 { > uint8_t uuid[16]; > }; > > +/* Registers a3..a17 (15 regs) carry partition descriptors, 3 regs each.= */ > +#define FFA_PARTINFO_REG_MAX_ENTRIES \ > + ((15 * sizeof(uint64_t)) / sizeof(struct ffa_partition_info_1_1)) > + > /* SP list cache (secure endpoints only); populated at init. */ > static void *sp_list __read_mostly; > static uint32_t sp_list_count __read_mostly; > static uint32_t sp_list_entry_size __read_mostly; > + > +/* SP list is static; tag only moves when VMs are added/removed. */ > +static atomic_t ffa_partinfo_tag =3D ATOMIC_INIT(1); > + > +void ffa_partinfo_inc_tag(void) > +{ > + atomic_inc(&ffa_partinfo_tag); Do we need to worry about this value wrapping? Is wrapping permitted? > +} > + > +static inline uint16_t ffa_partinfo_get_tag(void) > +{ > + /* > + * Tag moves with VM list changes only. > + * > + * Limitation: we cannot detect an SPMC tag change between calls bec= ause we > + * do not retain the previous SPMC tag; we only refresh it via the m= andatory > + * start_index=3D0 call and assume it stays stable while combined_ta= g (our > + * VM/SP-count tag) is used for guest validation. This means SPMC ta= g > + * changes alone will not trigger RETRY. > + */ > + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + return atomic_read(&ffa_partinfo_tag) & GENMASK(15, 0); > + else > + return 1; > +} > static int32_t ffa_partition_info_get(struct ffa_uuid uuid, uint32_t fla= gs, > uint32_t *count, uint32_t *fpi_siz= e) > { > @@ -125,6 +154,7 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid uu= id, uint32_t *sp_count, > for ( n =3D 0; n < sp_list_count; n++ ) > { > void *entry =3D sp_list + n * sp_list_entry_size; > + void *dst_pos; > > if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) > continue; > @@ -136,11 +166,20 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid = uuid, uint32_t *sp_count, > * This is a non-compliance to the specification but 1.0 VMs sho= uld > * handle that on their own to simplify Xen implementation. > */ > + dst_pos =3D *dst_buf; > ret =3D ffa_copy_info(dst_buf, end_buf, entry, dst_size, > sp_list_entry_size); > if ( ret ) > return ret; > > + if ( !ffa_uuid_is_nil(uuid) && > + dst_size >=3D sizeof(struct ffa_partition_info_1_1) ) > + { > + struct ffa_partition_info_1_1 *fpi =3D dst_pos; > + > + memset(fpi->uuid, 0, sizeof(fpi->uuid)); > + } > + > count++; > } > > @@ -152,6 +191,38 @@ static int32_t ffa_get_sp_partinfo(struct ffa_uuid u= uid, uint32_t *sp_count, > return FFA_RET_OK; > } > > +static uint16_t ffa_get_sp_partinfo_regs(struct ffa_uuid uuid, > + uint16_t start_index, > + uint64_t *out_regs, > + uint16_t max_entries) > +{ > + uint32_t idx =3D 0; > + uint16_t filled =3D 0; > + uint32_t n; > + > + for ( n =3D 0; n < sp_list_count && filled < max_entries; n++ ) > + { > + void *entry =3D sp_list + n * sp_list_entry_size; > + > + if ( !ffa_sp_entry_matches_uuid(entry, uuid) ) > + continue; > + > + if ( idx++ < start_index ) > + continue; > + > + memcpy(&out_regs[filled * 3], entry, > + sizeof(struct ffa_partition_info_1_1)); > + if ( !ffa_uuid_is_nil(uuid) ) > + { > + out_regs[filled * 3 + 1] =3D 0; > + out_regs[filled * 3 + 2] =3D 0; > + } > + filled++; > + } > + > + return filled; > +} > + > static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t start_= index, > uint32_t *vm_count, void **dst_buf, > void *end_buf, uint32_t dst_size) > @@ -368,6 +439,146 @@ out: > } > } > > +void ffa_handle_partition_info_get_regs(struct cpu_user_regs *regs) > +{ > + struct domain *d =3D current->domain; > + struct ffa_ctx *ctx =3D d->arch.tee; > + struct ffa_uuid uuid; > + uint32_t sp_count =3D 0, vm_count =3D 0, total_count; > + uint16_t start_index, tag; > + uint16_t num_entries =3D 0; > + uint64_t x3 =3D get_user_reg(regs, 3); > + int32_t ret =3D FFA_RET_OK; > + uint64_t out_regs[18] =3D { 0 }; > + unsigned int n; > + uint16_t tag_out; > + > + if ( ACCESS_ONCE(ctx->guest_vers) < FFA_VERSION_1_2 ) > + { > + ret =3D FFA_RET_NOT_SUPPORTED; > + goto out; > + } > + > + /* > + * Registers a3..a17 (15 regs) carry partition descriptors, 3 regs e= ach. > + * For FF-A 1.2, that yields a maximum of 5 entries per GET_REGS cal= l. > + * Enforce the assumed layout so window sizing stays correct. > + */ > + BUILD_BUG_ON(FFA_PARTINFO_REG_MAX_ENTRIES !=3D 5); > + > + for ( n =3D 4; n <=3D 17; n++ ) > + { > + if ( get_user_reg(regs, n) ) > + { x4-x17 are SBZ, so I think we should only ignore them. > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + } > + > + if ( x3 >> 32 ) Same here: Bits[63:32] are SBZ. > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + > + start_index =3D x3 & GENMASK(15, 0); > + tag =3D (x3 >> 16) & GENMASK(15, 0); > + > + /* Start index must allow room for up to 5 entries without 16-bit ov= erflow. */ > + if ( start_index > (GENMASK(15, 0) - (FFA_PARTINFO_REG_MAX_ENTRIES -= 1)) ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + > + uuid.val[0] =3D get_user_reg(regs, 1); > + uuid.val[1] =3D get_user_reg(regs, 2); > + > + if ( sp_list_count && > + sp_list_entry_size !=3D sizeof(struct ffa_partition_info_1_1) ) > + { > + ret =3D FFA_RET_NOT_SUPPORTED; This can't happen. But I guess a sp_list_entry_size > sizeof(struct ffa_partition_info_1_1) might be supported to be future proof. > + goto out; > + } > + > + tag_out =3D ffa_partinfo_get_tag(); > + > + if ( start_index =3D=3D 0 ) > + { > + if ( tag ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + } > + else if ( tag !=3D tag_out ) > + { > + ret =3D FFA_RET_RETRY; > + goto out; > + } > + > + if ( ffa_uuid_is_nil(uuid) ) > + { > + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + vm_count =3D get_ffa_vm_count(); > + else > + vm_count =3D 1; /* Caller VM only */ > + } > + > + ret =3D ffa_get_sp_count(uuid, &sp_count); > + if ( ret ) > + goto out; > + > + total_count =3D sp_count + vm_count; > + > + if ( total_count =3D=3D 0 || start_index >=3D total_count ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + > + if ( start_index < sp_count ) > + num_entries =3D ffa_get_sp_partinfo_regs(uuid, start_index, &out= _regs[3], > + FFA_PARTINFO_REG_MAX_ENTR= IES); > + > + if ( num_entries < FFA_PARTINFO_REG_MAX_ENTRIES ) > + { > + uint32_t vm_start =3D start_index > sp_count ? > + start_index - sp_count : 0; > + uint32_t filled =3D 0; > + void *vm_dst =3D &out_regs[3 + num_entries * 3]; > + void *vm_end =3D &out_regs[18]; > + > + ret =3D ffa_get_vm_partinfo(uuid, vm_start, &filled, &vm_dst, vm= _end, > + sizeof(struct ffa_partition_info_1_1))= ; > + if ( ret !=3D FFA_RET_OK && ret !=3D FFA_RET_NO_MEMORY ) > + goto out; > + > + num_entries +=3D filled; > + } > + > + if ( num_entries =3D=3D 0 ) > + { > + ret =3D FFA_RET_INVALID_PARAMETERS; > + goto out; > + } > + What if the tag read with ffa_partinfo_get_tag() has changed? Cheers, Jens > + out_regs[0] =3D FFA_SUCCESS_64; > + out_regs[2] =3D ((uint64_t)sizeof(struct ffa_partition_info_1_1) << = 48) | > + ((uint64_t)tag_out << 32) | > + ((uint64_t)(start_index + num_entries - 1) << 16) | > + ((uint64_t)(total_count - 1) & GENMASK(15, 0)); > + > + for ( n =3D 0; n < ARRAY_SIZE(out_regs); n++ ) > + set_user_reg(regs, n, out_regs[n]); > + > + return; > + > +out: > + if ( ret ) > + ffa_set_regs_error(regs, ret); > +} > + > static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, > uint8_t msg) > { > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 1a632983c860..c291f32b56ff 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -289,7 +289,7 @@ > #define FFA_MSG_SEND2 0x84000086U > #define FFA_CONSOLE_LOG_32 0x8400008AU > #define FFA_CONSOLE_LOG_64 0xC400008AU > -#define FFA_PARTITION_INFO_GET_REGS 0x8400008BU > +#define FFA_PARTITION_INFO_GET_REGS 0xC400008BU > #define FFA_MSG_SEND_DIRECT_REQ2 0xC400008DU > #define FFA_MSG_SEND_DIRECT_RESP2 0xC400008EU > > @@ -452,6 +452,8 @@ bool ffa_partinfo_init(void); > int32_t ffa_partinfo_domain_init(struct domain *d); > bool ffa_partinfo_domain_destroy(struct domain *d); > void ffa_handle_partition_info_get(struct cpu_user_regs *regs); > +void ffa_handle_partition_info_get_regs(struct cpu_user_regs *regs); > +void ffa_partinfo_inc_tag(void); > > int32_t ffa_endpoint_domain_lookup(uint16_t endpoint_id, struct domain *= *d_out, > struct ffa_ctx **ctx_out); > -- > 2.52.0 > From xen-devel-bounces@lists.xenproject.org Fri Feb 27 16:58:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 16:58:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242968.1543059 (Exim 4.92) (envelope-from ) id 1vw1AC-0003YD-Fc; Fri, 27 Feb 2026 16:58:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242968.1543059; Fri, 27 Feb 2026 16:58:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw1AC-0003Y6-Bg; Fri, 27 Feb 2026 16:58:04 +0000 Received: by outflank-mailman (input) for mailman id 1242968; Fri, 27 Feb 2026 16:58:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw1AA-0003Y0-JB for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 16:58:02 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 796c37ef-13fd-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 17:58:01 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-436317c80f7so2203762f8f.1 for ; Fri, 27 Feb 2026 08:58:01 -0800 (PST) Received: from [192.168.1.6] (user-109-243-67-101.play-internet.pl. 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Sorry for that. Following the 8-month release cycle, also taking into account that 4.21 has been released 19th of November 2025, the next "good" month for release should be July according to: https://lists.xen.org/archives/html/xen-devel/2018-07/msg02240.html Here is suggested schedule: ** Proposed option: Wed Jul 15, 2026 **   (~ +8 months from Xen 4.21 release) - Last posting date          Fri Apr 17, 2026 (+7 weeks from now) Patches adding new features are expected to be posted to the mailing list by this date, although perhaps not in their final version. - Feature freeze             Fri May 08, 2026 (+3 weeks from Last posting date) Patches adding new features should be committed by this date. Straightforward bugfixes may continue to be accepted by maintainers. - Code freeze                Fri Jun 05, 2026 (+4 weeks from Feature freeze) Bugfixes only. - Hard code freeze           Fri Jun 26, 2026 (+3 weeks from Code freeze) Bugfixes for serious bugs (including regressions), and low-risk fixes only. - Final commits              Fri Jul 10, 2026 (+2 weeks from Hard code freeze) Branch off staging-4.22. - Release                    Wed Jul 15, 2026 Please don't hesitate to provide your feedback. If there are no objections, I plan to update the Wiki page Xen_Project_X.YY_Release_Notes to make it easier to find our final schedule ( especially for the people who aren't following xen-devel mailing list ). As an additional benefit, it will also be accessible via SUPPORT.md (in the wiki athttps://xenbits.xen.org/docs/unstable-staging/support-matrix.html). Thanks and have a good weekend. Best regards,   Oleksii From xen-devel-bounces@lists.xenproject.org Fri Feb 27 17:00:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 17:00:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242978.1543068 (Exim 4.92) (envelope-from ) id 1vw1CE-00053M-PJ; Fri, 27 Feb 2026 17:00:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242978.1543068; Fri, 27 Feb 2026 17:00:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw1CE-00053F-Mm; Fri, 27 Feb 2026 17:00:10 +0000 Received: by outflank-mailman (input) for mailman id 1242978; Fri, 27 Feb 2026 17:00:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw1CD-00042Z-0q for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 17:00:09 +0000 Received: from mail178-23.suw51.mandrillapp.com (mail178-23.suw51.mandrillapp.com [198.2.178.23]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c48b9449-13fd-11f1-b164-2bf370ae4941; Fri, 27 Feb 2026 18:00:07 +0100 (CET) Received: from pmta13.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail178-23.suw51.mandrillapp.com (Mailchimp) with ESMTP id 4fMvhQ5v1yz35hfJ8 for ; Fri, 27 Feb 2026 17:00:06 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id f104bc196f53452b83029a520c335318; Fri, 27 Feb 2026 17:00:06 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c48b9449-13fd-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1772211606; x=1772481606; bh=ahChLrMLIwGTkk7Ei8nA/Gjew8ewv7h2QyrhOulApCs=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=cfmFE9uKr9MkLo15hr2SFefN2OMEiV1lBEtxzOdbPAVEeGBADnjdZjje+qLyGrNil EOpYXTXqe3ycTWeBess4aM9f0/+7+T+XvVwDxighHdflt1VsLjPr2oiUqFhM8Wr1FK 9ca+YdlEuT1fqADZl0NqUdzyyIqif3oUs4oJfFlLLd2W14zKPuKaWKQanIT2+avjdd K7oIbCQsoli+S3KDp14KmxQSl7qPJ1MSZTs5O8H4HnTdzyHtVrhaPNjrS7MT9IQxMv lamBY5EfeYOdnDRPlxs3fTptlT/AWmp8wndRPj9AWHRA4RAVEMb6C7n46kOeDMJby8 dW6UqCutbi5CA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1772211606; x=1772472106; i=teddy.astie@vates.tech; bh=ahChLrMLIwGTkk7Ei8nA/Gjew8ewv7h2QyrhOulApCs=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ZPLU303VNGy47vc+9aYZSefKjG8z3MxaELMwJFO4vah+M8qcZ9RNG3kq9XuxCq+Yh cjGxrGV7EqXoAR6iNC5w9k3yr+o4FgGrQWBYZkox0o4V7g8IELx2x1VuxOpjpKCSLJ dLz7AGE+x2tErET9wQjCPxA3HfUkynqa30ZtYzgdFX/BKZ5RneRJ64+E29uc7RvvcJ fQnD1QGwvTyNtk3YjAFW/JbwQ7uvgd7zQ1BJwQKS6MAuE+K3VwmUIHuU7sjQl4VMVt lEpnRQP+lQ+uUEZ7E5wwnCKdR2rFZtVNwFZv4MZX5hqsdi5ZvGqcTHKN9mgR2601K7 EM2b6JPc2SQWQ== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=20v8=202/2]=20xenpm:=20Add=20get-core-temp=20subcommand?= X-Mailer: git-send-email 2.53.0 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1772211606094 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Oleksii Kurochko" , "Community Manager" , "Anthony PERARD" , "Jan Beulich" Message-Id: In-Reply-To: References: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.f104bc196f53452b83029a520c335318?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20260227:md Date: Fri, 27 Feb 2026 17:00:06 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable get-core-temp allows querying the per-core CPU temperature and per-package one on processors that supports Digital Temperature Sensors (most Intel processors; as usual Dom0 drivers cannot work due to misalignment between Dom0 vCPU and pCPUs). Signed-off-by: Teddy Astie --- CC: Jan Beulich v4: https://lore.kernel.org/xen-devel/cover.1766158766.git.teddy.astie@vate= s.tech/ v5: Removed trailing whitespace. v6: Report errors through errno and use strerror() to display them v7: - Rename get-intel-temp with get-dts-temp - handle properly errno - make process return a error code if no data v8: - update Changelog - improve error handling - rename core-dts-temp with get-core-temp CHANGELOG.md | 2 + tools/misc/xenpm.c | 127 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 128 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 18f3d10f20..ac2a0412e0 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,8 @@ The format is based on [Keep a Changelog](https://keepach= angelog.com/en/1.0.0/) - Support for Bus Lock Threshold on AMD Zen5 and later CPUs, used by Xe= n to mitigate (by rate-limiting) the system wide impact of an HVM guest misusing atomic instructions. + - Introduce get-core-temp to xenpm to query CPU temperatures on Intel + platforms. ### Removed - On x86: diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index 682d092479..981d3ec519 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -32,11 +32,14 @@ #include +#include + #define MAX_PKG_RESIDENCIES 12 #define MAX_CORE_RESIDENCIES 8 static xc_interface *xc_handle; static unsigned int max_cpu_nr; +static xc_physinfo_t physinfo; /* help message */ void show_help(void) @@ -93,6 +96,7 @@ void show_help(void) " units default to \= "us\" if unspecified.\n" " truncates un-repre= sentable values.\n" " 0 lets the hardwar= e decide.\n" + " get-core-temp [cpuid] get CPU temperature for = or all (Intel only)\n" " start [seconds] start collect Cx/Px stat= istics,\n" " output after CTRL-C or S= IGINT or several seconds.\n" " enable-turbo-mode [cpuid] enable Turbo Mode for pr= ocessors that support it.\n" @@ -1354,6 +1358,127 @@ void enable_turbo_mode(int argc, char *argv[]) errno, strerror(errno)); } +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, i= nt *temp) +{ + xc_resource_entry_t entries[] =3D { + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STA= TUS }, + { .idx =3D MSR_TEMPERATURE_TARGET }, + }; + struct xc_resource_op ops =3D { + .cpu =3D cpu, + .entries =3D entries, + .nr_entries =3D ARRAY_SIZE(entries), + }; + int tjmax; + + int ret =3D xc_resource_op(xch, 1, &ops); + + switch ( ret ) + { + case 0: + /* This CPU isn't online or can't query this MSR */ + return -1; + + case 1: + { + /* + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's = 100 + * which is correct aside a few selected Atom CPUs. Check Linux + * kernel's coretemp.c for more information. + */ + static bool has_reported_once =3D false; + + if ( !has_reported_once ) + { + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assu= me " + "tjmax =3D 100, readings may be incorrect.\n")= ; + has_reported_once =3D true; + } + + tjmax =3D 100; + break; + } + + case 2: + tjmax =3D (entries[1].val >> 16) & 0xff; + break; + + default: + if ( ret > 0 ) + { + fprintf(stderr, "Got unexpected xc_resource_op return value: %= d", ret); + errno =3D EINVAL; + } + return -1; + } + + *temp =3D tjmax - ((entries[0].val >> 16) & 0xff); + return 0; +} + +static void get_core_temp(int argc, char *argv[]) +{ + int temp =3D -1, cpu =3D -1; + unsigned int socket; + bool has_data =3D false; + + if ( argc > 0 ) + parse_cpuid(argv[0], &cpu); + + if ( cpu !=3D -1 ) + { + if ( !fetch_dts_temp(xc_handle, cpu, false, &temp) ) + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + else + { + fprintf(stderr, "Unable to fetch temperature (%d - %s)\n", + errno, strerror(errno)); + printf("No data\n"); + exit(ENODATA); + } + return; + } + + /* Per socket measurement */ + for ( socket =3D 0, cpu =3D 0; cpu < max_cpu_nr; + socket++, cpu +=3D physinfo.cores_per_socket * physinfo.threads_= per_core ) + { + if ( fetch_dts_temp(xc_handle, cpu, true, &temp) ) + { + fprintf(stderr, + "[Package%u] Unable to fetch temperature (%d - %s)\n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("Package%u: %d=C2=B0C\n", socket, temp); + } + + if ( has_data ) + /* Avoid inserting a trailing line if we have nothing */ + printf("\n"); + + for ( cpu =3D 0; cpu < max_cpu_nr; cpu +=3D physinfo.threads_per_core = ) + { + if ( fetch_dts_temp(xc_handle, cpu, false, &temp) ) + { + fprintf(stderr, "[CPU%d] Unable to fetch temperature (%d - %s)= \n", + cpu, errno, strerror(errno)); + continue; + } + + has_data =3D true; + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + } + + if ( !has_data ) + { + printf("No data\n"); + exit(ENODATA); + } +} + void disable_turbo_mode(int argc, char *argv[]) { int cpuid =3D -1; @@ -1618,12 +1743,12 @@ struct { { "set-max-cstate", set_max_cstate_func}, { "enable-turbo-mode", enable_turbo_mode }, { "disable-turbo-mode", disable_turbo_mode }, + { "get-core-temp", get_core_temp }, }; int main(int argc, char *argv[]) { int i, ret =3D 0; - xc_physinfo_t physinfo; int nr_matches =3D 0; int matches_main_options[ARRAY_SIZE(main_options)]; -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Fri Feb 27 17:00:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 17:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1242979.1543078 (Exim 4.92) (envelope-from ) id 1vw1CH-0005HO-WE; Fri, 27 Feb 2026 17:00:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1242979.1543078; Fri, 27 Feb 2026 17:00:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw1CH-0005HD-T6; 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charset=utf-8 Content-Transfer-Encoding: 7bit xc_report_op doesn't update errno in some error conditions. Make sure it reports -ENOMEM in out of memory errors and -EINVAL in invalid usages errors. Signed-off-by: Teddy Astie --- v7: Introduced v8: Use errno to report errors tools/libs/ctrl/xc_resource.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/tools/libs/ctrl/xc_resource.c b/tools/libs/ctrl/xc_resource.c index cb6a97202b..ac1524d1bd 100644 --- a/tools/libs/ctrl/xc_resource.c +++ b/tools/libs/ctrl/xc_resource.c @@ -28,7 +28,10 @@ static int xc_resource_op_one(xc_interface *xch, xc_resource_op_t *op) XC_HYPERCALL_BUFFER_BOUNCE_BOTH); if ( xc_hypercall_bounce_pre(xch, entries) ) + { + errno = ENOMEM; return -1; + } platform_op.cmd = XENPF_resource_op; platform_op.u.resource_op.nr_entries = op->nr_entries; @@ -54,11 +57,15 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ call_list = xc_hypercall_buffer_alloc(xch, call_list, sizeof(*call_list) * nr_ops); if ( !call_list ) + { + errno = ENOMEM; return -1; + } platform_ops = xc_hypercall_buffer_array_create(xch, nr_ops); if ( !platform_ops ) { + errno = ENOMEM; rc = -1; goto out; } @@ -66,6 +73,7 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ entries_list = xc_hypercall_buffer_array_create(xch, nr_ops); if ( !entries_list ) { + errno = ENOMEM; rc = -1; goto out; } @@ -81,6 +89,7 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ platform_op, sizeof(xen_platform_op_t)); if ( !platform_op ) { + errno = ENOMEM; rc = -1; goto out; } @@ -90,6 +99,7 @@ static int xc_resource_op_multi(xc_interface *xch, uint32_t nr_ops, xc_resource_ entries, entries_size); if ( !entries) { + errno = ENOMEM; rc = -1; goto out; } @@ -137,6 +147,7 @@ int xc_resource_op(xc_interface *xch, uint32_t nr_ops, xc_resource_op_t *ops) if ( nr_ops > 1 ) return xc_resource_op_multi(xch, nr_ops, ops); + errno = EINVAL; return -1; } -- 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Fri Feb 27 18:01:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 18:01:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243026.1543091 (Exim 4.92) (envelope-from ) id 1vw296-00055R-7A; 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Smith" Subject: RE: [PATCH v4 05/10] xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness Thread-Topic: [PATCH v4 05/10] xen/domain: Add DOMCTL handler for claiming memory with NUMA awareness Thread-Index: AQHcpy8NKyz6wh/Wrk6CsdW/rK3ShrWVfM8AgAAgIzCAAK6rgIAAe1AA Date: Fri, 27 Feb 2026 18:16:30 +0000 Message-ID: References: <656ff614-9165-49ce-8c55-0cfad33d4ed6@vates.tech> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: LV3PR03MB7707:EE_|DS4PR03MB8446:EE_ x-ms-office365-filtering-correlation-id: e6043985-6ad0-45a9-bdff-08de762c54dd x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|376014|366016|1800799024|38070700021; x-microsoft-antispam-message-info: QwiIu7e81M1o2q/dJ3OBMbXtZEiJB7yGoo95Wk8hxFeuJxbRbetsO1egqODnPvB47+S5RTTlnYw3uiShGzmNFyuwVKWUEToPy17aZWOz0RSBbb0mF9el/L2aHYWstCxBD+NXffHrKlCpSuRS9BJZHUJpAexSQrOm+Zph0Bhzw4P3KylaNykF+2a1rOE+gRxXZLDXsnM/13anY7qUkHrfn7jVVMmjX43lr33qtIc5tejwTjsSvonEClf6f884hMHRgY+afNn0OB5BUzNTku74+bYe3PZwptJEnzeBPuFmMKwsDMFVxrS2XUJjLT40/wA1MQm8oNjpwYvXCkpjzXKCnyf5KeW3F6fJrBjsHWtwkUYl8JDnFRRmevuhH+0yXeUTRik8m+bJ8GwnSGu8Jo1StqqDOfGdJ9ivbQg68OfduSgHfhYjd10yJjQkFXZXFMcHiqnE2+6c3i69Bk58ZpBKrI2D9LTPW0mKLofVat9yyyDVFa6L5NWk7U0KI/nQkgxqo0LIm5Qa9eIqZ8PgdJcFxuPVJQ8+D9S+Ot3MK/JlhR/THGfRDcDVp96l5tPbH97o8T2KM3K6wJibpyvFshDpssFyrr0HESj6zpzjjsCVINeXeSAMTfpbKVBxFe9hugNzyWsju2js9yZhXVuTgetMMERE+4B20YnoHBTmt3bExUGGqQblNdc1d7/VFhKs9DqagGLUVlrGzqESSSKSjWQ52hjDP/B9KUeEVkov8EfoEN8c3DrJjz5FEBSdC8I0PMmX581ehbBavKu7lTfedyG3R8LjAzdP9Y5B4qNLqR7DHzg= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV3PR03MB7707.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(38070700021);DIR:OUT;SFP:1101; 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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd75dfaasm219264385e9.12.2026.02.27.15.15.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:15:58 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4785b3c0-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234160; x=1772838960; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=EkI6FQn9Xs3+/+P5YTSdt/PmiEpJe9GVU8LhmmOfCQs=; b=aZ4emrIWiYUqNa1uQY3ZFxynkc+/vSWg1nUkSITIrLEgJb5sBfaxmUhKxUfGSyIqBa cJi+7jBE5KDMkVBVjI9iYV+ew9Z15+auKRegleLh9lU8uwra4OJMv5U10AySU1N52oIW q2Fj7nBusHIq9ZkDXefkvccfmaWCyjd45BDRY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234160; x=1772838960; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=EkI6FQn9Xs3+/+P5YTSdt/PmiEpJe9GVU8LhmmOfCQs=; b=UXkIdEVtxiexlpAZBwJtBhxh+pkzxDqJyeKEm3qqOCioJiLBHZ5cjh+PkEMJtp7ZXY KZxFCbgx+qLio7x/DV3u+/CXB3QbTbEHhikB3p6PgGT6R8x8kOBSrTM2WPSkgEL2ArFT nJylUVWe2M4p1VruroAwMNDnGINoIvP3rXTRNIUIWjOCdEu4RfDSSFm/96vszauoz/9d 7jJURtrkhhWKdxF4MqlXHIgIkPucQF03MTFneZ/2tjb2B5cLUM5cusYz7VypBuvkaTFu k5IRNpjr5w6TgippBdggBT6IlxbqyqQ3sjLeu6EMKade5yTrliog3zHwZla6ERzK2PCP A9Ag== X-Gm-Message-State: AOJu0YzTLnsPscUaPlOCTqyQuExW0P5TawPxRhMGGMExlsYU2++fpQb7 5kdx9eIyMIzy1c7hH7e+AjtDs0XNuyn9J5MeQ31UiJ8/oJKxhYYB0Vn02Kxdx4JvTVrlaTCq5Sb e92HF X-Gm-Gg: ATEYQzwupO8rZhRoE0aiw3I2Dt+/8aKkX///bhRzaoM80QogE2QflCAr7cY2Ze2MpFB djcuFcuUrG40E0x5dMcpDMM54fdn7jN/KyaJk3Xl6CJ0otwZbI6UjJWgSoQgoHyIpYjh4y7UyZ6 jYYKvqAI1qUXgO6XLSCK5tZn5A0rbLEcZ5VFSjHvhlW5qF5l1WprsTaWQ5MLrV8Lj2CA9r7Oepv uYBHLcY3QSDHOrjjXDpkOi6d/pQ/Ftd004BWWAFLOXNcdCZJ+G/lFAffAiEdiubUE6bW/ESCn5N 6G8HKAOW2Fa5cx5fjrs+6l+8vG8WyRWphTBm+mWRvv8OjbjZRKKCHo9m64YZdvsJ8JfvTMQ9JT+ wu/oi5wsXU8Yt2UuLg65TQTFo2BIoZmFwK1uxs35whX9WtJ821OZOAa9esOBLX/NDuw4TFyJ+6U /qc4lh0jWgRBn4n5pXVslNELVjFfbMox9Fqg9xy7UFBAIrpOe5uM1W9ZqCxDp2Ec4Jcs9peoA= X-Received: by 2002:a05:600c:474c:b0:483:a352:b4e4 with SMTP id 5b1f17b1804b1-483c990bdf0mr77520595e9.6.1772234159005; Fri, 27 Feb 2026 15:15:59 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 00/14] x86: FRED support Date: Fri, 27 Feb 2026 23:15:39 +0000 Message-Id: <20260227231553.3955050-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This version of the series has finally run on real hardware, Intel PantherLake. Notable changes: * Rework TSS setup, given an unpleasant discovery about VT-x. * Fix an INT $N emulation bug in IDT mode, discovered by XTF testing to check that FRED behaved the same. * Document aspects of the PV ABI now they've been thoroughly reverse engineered. By the end of patch 6, PVH dom0 works. By the end of the series, PV dom0 works. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2354867216 Andrew Cooper (14): x86/pv: Don't assume that INT $imm8 instructions are two bytes long docs/guest-guide: Describe the PV traps and entrypoints ABI x86/boot: Move gdt_l1e caching out of traps_init() x86/boot: Document the ordering dependency of _svm_cpu_up() x86/traps: Move traps_init() earlier on boot x86/traps: Don't configure Supervisor Shadow Stack tokens in FRED mode x86/traps: Introduce FRED entrypoints x86/traps: Enable FRED when requested x86/pv: Adjust GS handling for FRED mode x86/pv: Guest exception handling in FRED mode x86/pv: ERETU error handling x86/pv: System call handling in FRED mode x86: Clamp reserved bits in eflags more aggressively x86/traps: Use fatal_trap() for #UD and #GP docs/glossary.rst | 3 + docs/guest-guide/x86/index.rst | 1 + docs/guest-guide/x86/pv-traps.rst | 123 +++++++ xen/arch/x86/cpu/common.c | 4 +- xen/arch/x86/domain.c | 22 +- xen/arch/x86/hvm/domain.c | 4 +- xen/arch/x86/hvm/svm/svm.c | 16 + xen/arch/x86/include/asm/asm_defns.h | 63 ++++ xen/arch/x86/include/asm/current.h | 3 + xen/arch/x86/include/asm/domain.h | 2 + xen/arch/x86/include/asm/hypercall.h | 2 - xen/arch/x86/include/asm/pv/traps.h | 2 + xen/arch/x86/include/asm/traps.h | 2 + xen/arch/x86/include/asm/x86-defns.h | 7 + xen/arch/x86/mm.c | 14 +- xen/arch/x86/pv/dom0_build.c | 2 +- xen/arch/x86/pv/domain.c | 22 +- xen/arch/x86/pv/emul-priv-op.c | 72 +++- xen/arch/x86/pv/iret.c | 8 +- xen/arch/x86/pv/misc-hypercalls.c | 16 +- xen/arch/x86/pv/traps.c | 39 +++ xen/arch/x86/setup.c | 20 +- xen/arch/x86/smpboot.c | 11 + xen/arch/x86/traps-setup.c | 147 +++++++- xen/arch/x86/traps.c | 486 ++++++++++++++++++++++++++- xen/arch/x86/x86_64/Makefile | 1 + xen/arch/x86/x86_64/entry-fred.S | 57 ++++ xen/arch/x86/x86_64/entry.S | 4 +- 28 files changed, 1091 insertions(+), 62 deletions(-) create mode 100644 docs/guest-guide/x86/pv-traps.rst create mode 100644 xen/arch/x86/x86_64/entry-fred.S -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243137.1543120 (Exim 4.92) (envelope-from ) id 1vw74c-0000Vk-S8; Fri, 27 Feb 2026 23:16:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243137.1543120; Fri, 27 Feb 2026 23:16:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74c-0000Vd-PN; Fri, 27 Feb 2026 23:16:42 +0000 Received: by outflank-mailman (input) for mailman id 1243137; Fri, 27 Feb 2026 23:16:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74b-0008WD-Ar for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:41 +0000 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [2a00:1450:4864:20::444]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5f5e4f5e-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:40 +0100 (CET) Received: by mail-wr1-x444.google.com with SMTP id ffacd0b85a97d-436356740e6so2643162f8f.2 for ; Fri, 27 Feb 2026 15:16:40 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:38 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5f5e4f5e-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234200; x=1772839000; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=EkI6FQn9Xs3+/+P5YTSdt/PmiEpJe9GVU8LhmmOfCQs=; b=NLyzg1Er5w29P5ijZ0/ezHI8ZhEahumh5z8HtK5GfK11PKxieIU2crsLFOKcTv9cyM WG3SDBzmpVTjcatE4uak1UoyWfSekdn2LnCS/cEN6AA60nnM1A5B+sU92iQP20wertqy n5A48loKo05anr4G2ehkXUjSAnb3tUQfb2fvw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234200; x=1772839000; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=EkI6FQn9Xs3+/+P5YTSdt/PmiEpJe9GVU8LhmmOfCQs=; b=bS832AKPCcc39warvuDoiiK2mrJr7NQsbqx8fYVAGCDq/ZGi/TOLhWBlrG0OVlDM/Q GjXwmJqqQJDLSJWT7hLehGG9F5mCfZBhY3dsoQSPSELNHJRYHjoqPCklASy5HoexxOQO 7KbACnYbCMNQLXWaPGK0e/ujTrfgnbzF+MjRxE3wjaOoUhxhCR1pzOHQ0HX4picTcDqM UDWc++qXp1Y8S/Vo54EA8UDjkYgDZGAoE+P8k5vItAOaCkb8z52aBTAxLZAqnZ0iaHl3 Ql3JKF38lS2063zI2MyiHeE8xBP8jeF+c26QFutameDEsPFllRENdUIH7L1Fugso57wQ Ynkg== X-Gm-Message-State: AOJu0YzTbVsTUj/QX/o5M0H0FL4rmUGENOiTZigm53QyCyhbOn4VjaZ7 28yijBQi1Z+rGyLvCNUz08DKJ6n33H8WRgvFGPYiejwYIq7zZB/oCSa/6W8THlKs9bnRI9amgQX ANUwFd0WE2Ru9 X-Gm-Gg: ATEYQzzducaRJAQHA+/USz3+ff/jzmUjzue4eSFWlGIvIOFQuh9QhUiKW2ZeAfF7Q9w by7PzE2jdW69K+3jl+cPov7cO8V6hBLX5P4l5m2bOJ9NT4mlAzEghQxq/8dBPVuZ1DIqxQA66KU qwJWngvgN2PCYvlN3FejLfb+f2sHC9hrods/3kXgKvnwk3ZXzMs2Tvg9FPt15rwVDFPZOelpHM+ z7ZD+IZxD9IAmN+RByCpr2rb9ca6tARopt+VNh2bEKWMDn3HZIk+fVCa1hVGP7lcr4Fs2Of1KNV d1HI/MJsjzTL3ZUDBipO6FIHAHOjJLyOJ5StDug8ZKTDfo9GEN7Vx6iDAu16rOnufna9hFPau+c phqZRR2RQYLDujX3iSHJ9fGHEgtlZsZxfHWzFrz2UtzWlDfUyPCtFAVlED4JWdl1aZcIY1TCExZ gK4rO7+XeB2AJnxnVaCuEO3jevrHaLgjXPEN/rFKk+UMaz43pn8sikhaWCBNZmqwEMMqL1cnE= X-Received: by 2002:a05:6000:40c9:b0:436:3267:3ed3 with SMTP id ffacd0b85a97d-4399ddf1ce8mr8503570f8f.22.1772234199810; Fri, 27 Feb 2026 15:16:39 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 00/14] x86: FRED support Date: Fri, 27 Feb 2026 23:16:22 +0000 Message-Id: <20260227231636.3955109-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This version of the series has finally run on real hardware, Intel PantherLake. Notable changes: * Rework TSS setup, given an unpleasant discovery about VT-x. * Fix an INT $N emulation bug in IDT mode, discovered by XTF testing to check that FRED behaved the same. * Document aspects of the PV ABI now they've been thoroughly reverse engineered. By the end of patch 6, PVH dom0 works. By the end of the series, PV dom0 works. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2354867216 Andrew Cooper (14): x86/pv: Don't assume that INT $imm8 instructions are two bytes long docs/guest-guide: Describe the PV traps and entrypoints ABI x86/boot: Move gdt_l1e caching out of traps_init() x86/boot: Document the ordering dependency of _svm_cpu_up() x86/traps: Move traps_init() earlier on boot x86/traps: Don't configure Supervisor Shadow Stack tokens in FRED mode x86/traps: Introduce FRED entrypoints x86/traps: Enable FRED when requested x86/pv: Adjust GS handling for FRED mode x86/pv: Guest exception handling in FRED mode x86/pv: ERETU error handling x86/pv: System call handling in FRED mode x86: Clamp reserved bits in eflags more aggressively x86/traps: Use fatal_trap() for #UD and #GP docs/glossary.rst | 3 + docs/guest-guide/x86/index.rst | 1 + docs/guest-guide/x86/pv-traps.rst | 123 +++++++ xen/arch/x86/cpu/common.c | 4 +- xen/arch/x86/domain.c | 22 +- xen/arch/x86/hvm/domain.c | 4 +- xen/arch/x86/hvm/svm/svm.c | 16 + xen/arch/x86/include/asm/asm_defns.h | 63 ++++ xen/arch/x86/include/asm/current.h | 3 + xen/arch/x86/include/asm/domain.h | 2 + xen/arch/x86/include/asm/hypercall.h | 2 - xen/arch/x86/include/asm/pv/traps.h | 2 + xen/arch/x86/include/asm/traps.h | 2 + xen/arch/x86/include/asm/x86-defns.h | 7 + xen/arch/x86/mm.c | 14 +- xen/arch/x86/pv/dom0_build.c | 2 +- xen/arch/x86/pv/domain.c | 22 +- xen/arch/x86/pv/emul-priv-op.c | 72 +++- xen/arch/x86/pv/iret.c | 8 +- xen/arch/x86/pv/misc-hypercalls.c | 16 +- xen/arch/x86/pv/traps.c | 39 +++ xen/arch/x86/setup.c | 20 +- xen/arch/x86/smpboot.c | 11 + xen/arch/x86/traps-setup.c | 147 +++++++- xen/arch/x86/traps.c | 486 ++++++++++++++++++++++++++- xen/arch/x86/x86_64/Makefile | 1 + xen/arch/x86/x86_64/entry-fred.S | 57 ++++ xen/arch/x86/x86_64/entry.S | 4 +- 28 files changed, 1091 insertions(+), 62 deletions(-) create mode 100644 docs/guest-guide/x86/pv-traps.rst create mode 100644 xen/arch/x86/x86_64/entry-fred.S -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243138.1543132 (Exim 4.92) (envelope-from ) id 1vw74f-0000jx-4G; Fri, 27 Feb 2026 23:16:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243138.1543132; Fri, 27 Feb 2026 23:16:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74e-0000jq-Vy; Fri, 27 Feb 2026 23:16:44 +0000 Received: by outflank-mailman (input) for mailman id 1243138; Fri, 27 Feb 2026 23:16:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74d-0008WD-T1 for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:43 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 60dd154e-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:43 +0100 (CET) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-436309f1ad7so2114584f8f.3 for ; Fri, 27 Feb 2026 15:16:43 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:40 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 60dd154e-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234202; x=1772839002; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qm1+0hl5wg0cTPkZkQcfwjLCPbdvhVekwrZIT03s7DQ=; b=NhvaORhEENEHrYdMpzFOb00mPzdMS8s5p3eibErAyaHS4HN5cZMw0VCwtVsAfoVCUS FezmlqiwMN81ItFbwEasbRZTCpP7QdY5HXGERw0ZvGFlDrA39NOOpy8G0qLUmGn1WCdf vsr6rSX0DSuobDRlofwDyt9M2ufMohsvkWFH8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234202; x=1772839002; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=qm1+0hl5wg0cTPkZkQcfwjLCPbdvhVekwrZIT03s7DQ=; b=jtbBe6sK4hUekdOHZSj7/gFRhXMsOehouPHBhHPFf7DYOVCnFV/urAr5LClLPMJdmu c3I6yYQ8N0NonZbel7gmPgTx0BsZIgVfi500ltLJOwig1JcUZBOKX1FHnw4Aj1v0kq7M rsgAUk6e3qR/U1xMiTejgkeIghFYVEmMQMHrT8GiURTpy8bFUI0noz8ShoQLj/3ex8zO 66Zs2FxqyVARxEhvMUzkKHb0N65OyfjUIbqnqRZfHNmRUnVL64FCcy9xpOrXFCNQThP1 0M+7YyLN0/bZMdJ4QVeY1ieaiM2kNJ69H7lzcwQ+YrAZKMAsQO39SrY87OO1FviCd/F2 y30g== X-Gm-Message-State: AOJu0YxWfm9Xw5aMV35qa9obqqE3HDHEVJt3OcxxxOuS2v4fIVM3GkQE 6t2XNUXH1ME0OLfmrOOOjUldlDtmsoObosKQp/43B7PdKlw4bF58gAsQMjuXRGUAbpbVBv9cjSj q+BMS X-Gm-Gg: ATEYQzwOOi0gYW1S98Cu8s0fLFST1in5LE8muKd2HEcSE0ilbhs60OlAjjc4JjQjObp GKx6JPoNKAgJqiX9Syk3x8ZSMK807qwS5tkHn0wie++zk9JNIx5pNedmw1Dgqgr4VvxCzH1eqle odeSkCUQM+wn94ktZUF9JJSeMfPpQ2zT7TYfwL2b9wpkIfWdwZADGNrKncfgjg9PMlnPlaHvvVg VE8iN2ydvjBKl1fgX1a6ck9BKlMzmBwOFaVFDcNEpYZSxkeSlilcX8kT70MjouHu6HKsDud+Grh Qp0Rx3CP3wAfYndQs8aB3t0vCIfUCd8tC2BWNzxQwy6gXhN/3CkxFH4C5ePhCXFKrqf6dR3DxyY PJw8VvXnw++M6RWMMZ+5m+J2Z0pTlv21J7V6okdA/m2CG7hHW2atBFq/QJxfAvO114wkmUHc3VA 4Wm56gSxcj574NYLqxR0BPqgT5DNW4siz1zy8+r7SJkcxjYbLkWk9xECn4X6tuf1uuGUcCvdI= X-Received: by 2002:a05:6000:2313:b0:439:84cb:288d with SMTP id ffacd0b85a97d-4399de2cb36mr7877033f8f.41.1772234201407; Fri, 27 Feb 2026 15:16:41 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 01/14] x86/pv: Don't assume that INT $imm8 instructions are two bytes long Date: Fri, 27 Feb 2026 23:16:23 +0000 Message-Id: <20260227231636.3955109-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For INT $N instructions (besides $0x80 for which there is a dedicated fast path), handling is mostly fault-based because of DPL0 gates in the IDT. This means that when the guest kernel allows the instruction too, Xen must increment %rip to the end of the instruction before passing a trap to the guest kernel. When an INT $N instruction has a prefix, it's longer than two bytes, and Xen will deliver the "trap" with %rip pointing into the middle of the instruction. Introduce a new pv_emulate_sw_interrupt() which uses x86_insn_length() to determine the instruction length, rather than assuming two. This is a change in behaviour for PV guests, but the prior behaviour cannot reasonably be said to be intentional. This change does not affect the INT $0x80 fastpath. Prefixed INT $N instructions occur almost exclusively in test code or exploits, and INT $0x80 appears to be the only user-usable interrupt gate in contemporary PV guests. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * New --- xen/arch/x86/include/asm/pv/traps.h | 2 ++ xen/arch/x86/pv/emul-priv-op.c | 48 +++++++++++++++++++++++++++++ xen/arch/x86/traps.c | 3 +- 3 files changed, 51 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/pv/traps.h b/xen/arch/x86/include/asm/pv/traps.h index 8c201190923d..16e9a8d2aa3f 100644 --- a/xen/arch/x86/include/asm/pv/traps.h +++ b/xen/arch/x86/include/asm/pv/traps.h @@ -17,6 +17,7 @@ int pv_raise_nmi(struct vcpu *v); int pv_emulate_privileged_op(struct cpu_user_regs *regs); +void pv_emulate_sw_interrupt(struct cpu_user_regs *regs); void pv_emulate_gate_op(struct cpu_user_regs *regs); bool pv_emulate_invalid_op(struct cpu_user_regs *regs); @@ -31,6 +32,7 @@ static inline bool pv_trap_callback_registered(const struct vcpu *v, static inline int pv_raise_nmi(struct vcpu *v) { return -EOPNOTSUPP; } static inline int pv_emulate_privileged_op(struct cpu_user_regs *regs) { return 0; } +static inline void pv_emulate_sw_interrupt(struct cpu_user_regs *regs) {} static inline void pv_emulate_gate_op(struct cpu_user_regs *regs) {} static inline bool pv_emulate_invalid_op(struct cpu_user_regs *regs) { return true; } diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index a3c1fd12621d..87d3bbcf901f 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -1401,6 +1402,53 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) return 0; } +/* + * Hardware already decoded the INT $N instruction and determinted that there + * was a DPL issue, hence the #GP. Xen has already determined that the guest + * kernel has permitted this software interrupt. + * + * All that is needed is the instruction length, to turn the fault into a + * trap. All errors are turned back into the original #GP, as that's the + * action that really happened. + */ +void pv_emulate_sw_interrupt(struct cpu_user_regs *regs) +{ + struct vcpu *curr = current; + struct domain *currd = curr->domain; + struct priv_op_ctxt ctxt = { + .ctxt.regs = regs, + .ctxt.lma = !is_pv_32bit_domain(currd), + }; + struct x86_emulate_state *state; + uint8_t vector = regs->error_code >> 3; + unsigned int len, ar; + + if ( !pv_emul_read_descriptor(regs->cs, curr, &ctxt.cs.base, + &ctxt.cs.limit, &ar, 1) || + !(ar & _SEGMENT_S) || + !(ar & _SEGMENT_P) || + !(ar & _SEGMENT_CODE) ) + goto error; + + state = x86_decode_insn(&ctxt.ctxt, insn_fetch); + if ( IS_ERR_OR_NULL(state) ) + goto error; + + len = x86_insn_length(state, &ctxt.ctxt); + x86_emulate_free_state(state); + + /* Note: Checked slightly late to simplify 'state' handling. */ + if ( ctxt.ctxt.opcode != 0xcd /* INT $imm8 */ ) + goto error; + + regs->rip += len; + pv_inject_sw_interrupt(vector); + return; + + error: + pv_inject_hw_exception(X86_EXC_GP, regs->entry_vector); +} + /* * Local variables: * mode: C diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 5feac88d6c0b..907fb4c186c0 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1379,8 +1379,7 @@ void do_general_protection(struct cpu_user_regs *regs) if ( permit_softint(TI_GET_DPL(ti), v, regs) ) { - regs->rip += 2; - pv_inject_sw_interrupt(vector); + pv_emulate_sw_interrupt(regs); return; } } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243139.1543142 (Exim 4.92) (envelope-from ) id 1vw74h-0000z5-EX; Fri, 27 Feb 2026 23:16:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243139.1543142; Fri, 27 Feb 2026 23:16:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74h-0000yy-9V; Fri, 27 Feb 2026 23:16:47 +0000 Received: by outflank-mailman (input) for mailman id 1243139; Fri, 27 Feb 2026 23:16:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74g-0008WD-0E for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:46 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 62230be6-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:45 +0100 (CET) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-4377174e1ebso1836355f8f.3 for ; Fri, 27 Feb 2026 15:16:45 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. 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Instead, put it in smp_prepare_cpus() which performs the BSP preparation of variables normally set up by cpu_smpboot_alloc() for APs. This removes an implicit dependency that prevents traps_init() moving earlier than move_xen() in the boot sequence. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * New I'm on the fence about the ASSERT(), but I'm getting rather tired of unstated dependencies. For a PV64 guest using SYSEXIT to enter the guest, it's the first interrupt/exception which references the GDT, which could be after the guest is running. --- xen/arch/x86/domain.c | 2 ++ xen/arch/x86/smpboot.c | 11 +++++++++++ xen/arch/x86/traps-setup.c | 7 ------- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 8eb1509782ef..e658c2d647b7 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -2029,6 +2029,8 @@ static always_inline bool need_full_gdt(const struct domain *d) static void update_xen_slot_in_full_gdt(const struct vcpu *v, unsigned int cpu) { + ASSERT(per_cpu(gdt_l1e, cpu).l1); /* Confirm these have been cached. */ + l1e_write(pv_gdt_ptes(v) + FIRST_RESERVED_GDT_PAGE, !is_pv_32bit_vcpu(v) ? per_cpu(gdt_l1e, cpu) : per_cpu(compat_gdt_l1e, cpu)); diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 961bdf53331c..491cbbba33ae 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -1167,6 +1167,17 @@ void __init smp_prepare_cpus(void) initialize_cpu_data(0); /* Final full version of the data */ print_cpu_info(0); + /* + * Cache {,compat_}gdt_l1e for the BSP now that physically relocation is + * done. It must be after physical relocation of Xen, and before the + * first context_switch(). + */ + this_cpu(gdt_l1e) = + l1e_from_pfn(virt_to_mfn(boot_gdt), __PAGE_HYPERVISOR_RW); + if ( IS_ENABLED(CONFIG_PV32) ) + this_cpu(compat_gdt_l1e) = + l1e_from_pfn(virt_to_mfn(boot_compat_gdt), __PAGE_HYPERVISOR_RW); + boot_cpu_physical_apicid = get_apic_id(); x86_cpu_to_apicid[0] = boot_cpu_physical_apicid; diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c index d77be8f83921..c5fc71c75bca 100644 --- a/xen/arch/x86/traps-setup.c +++ b/xen/arch/x86/traps-setup.c @@ -341,13 +341,6 @@ void __init traps_init(void) init_ler(); - /* Cache {,compat_}gdt_l1e now that physically relocation is done. */ - this_cpu(gdt_l1e) = - l1e_from_pfn(virt_to_mfn(boot_gdt), __PAGE_HYPERVISOR_RW); - if ( IS_ENABLED(CONFIG_PV32) ) - this_cpu(compat_gdt_l1e) = - l1e_from_pfn(virt_to_mfn(boot_compat_gdt), __PAGE_HYPERVISOR_RW); - percpu_traps_init(); } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243140.1543151 (Exim 4.92) (envelope-from ) id 1vw74k-0001Gc-Kc; Fri, 27 Feb 2026 23:16:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243140.1543151; Fri, 27 Feb 2026 23:16:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74k-0001GV-Hi; Fri, 27 Feb 2026 23:16:50 +0000 Received: by outflank-mailman (input) for mailman id 1243140; Fri, 27 Feb 2026 23:16:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74j-0001Do-As for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:49 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 632ad0ca-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:47 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-436309f1ad7so2114610f8f.3 for ; Fri, 27 Feb 2026 15:16:47 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:44 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 632ad0ca-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234206; x=1772839006; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wSmplNXhRERAowFWA9uIl/lO9zqC+gj9SfzDfIr2SeQ=; b=m6m+SJal6DBgyMJkYVtOAxLZPkvazgIJsWlBSfD+IBqJFMxDe8RG3dD1yy0wd+kEx7 M4+xbVDm0LyCHxDcM6Slf9g6czWs0BTWw13nq01VIP8Hxe7ScCVNj9hO+Pb8KYYvPAKM Fae7CLq/CcQl2z9afMzxZ/Py8bVwWf31FwI88= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234206; x=1772839006; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=wSmplNXhRERAowFWA9uIl/lO9zqC+gj9SfzDfIr2SeQ=; b=kGH5puSBtS8f2byRD3uedhh2g2Jf4UlygGY81rla5GGY3C+FaTSL+UAWJXanZp042x vyCEJrCqWGjSJ/R0d5vQmFo1KE23ofeRFd4WDyWFnJwzphCng5tRFFBXiYD2APfyNH0l 3fgCIrYdEjfeGmlllM4U4Z7JN1Spm35vQGgBYkqB25zhVawI/Rkod+gppKOiHp486KuJ 5Ebv0YaHjOa1PvFmT0qBulyzM0Pb4ACUrofeixh2MYrAaJlwQUnNwK7FiPzlZF2d0gZf llM5o1ca6H+FsPPZjmy97TzSqSs/26NrfGRzEpsLYP2stF8Ar9QzMdoQJLeGDBjQqcip aNGQ== X-Gm-Message-State: AOJu0YzU0so86jO5NdjQSfPwW9UWnIDfNZ/vhvylb1ESZaY3R74lHgWF GmzAX87BaRGeUiGsqW9uChkvx01FqL2GK8/ehtL2pmBm6XfqvDxFH3ScRPn0S8anwWoRObgdFM7 YWdlZ X-Gm-Gg: ATEYQzzAOFeCs3lTn13kaoVaZo7A/l8aCgLM2tao6krK0tFr9FiaVjfHOcZrM/AzxJh o170EqFdOnGfSc4FY/IUcTsuNUBHbn/iCQ1UgdrUEJJ/tD4+szT7JsHX+15Gdr9CQ1kCGJPVU1N C06j5gtP3tKXB9G1w/ROWyuz4b6m8gA3ULsRaTz+oz5Wt/GwWkGTfq/S0IFlgy/5xVqULJjQEkD HYbaMxpYJXwZJwKJAYYU66ki1ZDHB6YfwdQ2Mpqgctix4NRXPtbr0+LGzH7kXvvplvuA5tOqk+Y YfG2Wi7UbuYwEW6HAmzN2NmbpS1q6m8W7I2qQOOmdKNcvo0I2S7xZYiioBy0WqNg4ox6uPH77rk oX+9U9sxwrjeAHcga+wDSWnZdZE+MoizcYOfNg26ZXhk6XpIil7dU17gXbyw0SwvvJ76bPT3um7 KoBg71o3F+Xq95pTC/7A85EHshB2as1UlaMeN1z4TOLj1e0tEOLApMemD3O5Wk7EnBYLd10uQ= X-Received: by 2002:a05:6000:1447:b0:435:9e32:2b78 with SMTP id ffacd0b85a97d-4399dddbbb3mr7543711f8f.1.1772234205704; Fri, 27 Feb 2026 15:16:45 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 04/14] x86/boot: Document the ordering dependency of _svm_cpu_up() Date: Fri, 27 Feb 2026 23:16:26 +0000 Message-Id: <20260227231636.3955109-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Lets just say this took an unreasoanble amount of time and effort to track down, when trying to move traps_init() earlier during boot. When the SYSCALL linkage MSRs are not configured ahead of _svm_cpu_up() on the BSP, the first context switch into PV uses svm_load_segs() and clobbers the later-set-up linkage with the 0's cached here, causing hypercalls issues by the PV guest to enter at 0 in supervisor mode on the user stack. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * New It occurs to me that it's not actually 0's we cache here. It's whatever context was left from prior to Xen. We still don't reliably clean unused MSRs. --- xen/arch/x86/hvm/svm/svm.c | 16 ++++++++++++++++ xen/arch/x86/setup.c | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 18ba837738c6..f1e02d919cae 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -1581,6 +1582,21 @@ static int _svm_cpu_up(bool bsp) /* Initialize OSVW bits to be used by guests */ svm_host_osvw_init(); + /* + * VMSAVE writes out the current full FS, GS, LDTR and TR segments, and + * the GS_SHADOW, SYSENTER and SYSCALL linkage MSRs. + * + * The segment data gets modified by the svm_load_segs() optimisation for + * PV context switches, but all values get reloaded at that point, as well + * as during context switch from SVM. + * + * If PV guests are available (and FRED is not in use), it is critical + * that the SYSCALL linkage MSRs been configured at this juncture. + */ + ASSERT(opt_fred >= 0); /* Confirm that FRED-ness has been resolved */ + if ( IS_ENABLED(CONFIG_PV) && !opt_fred ) + ASSERT(rdmsr(MSR_LSTAR)); + svm_vmsave_pa(per_cpu(host_vmcb, cpu)); return 0; diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 27c63d1d97c9..675de3a649ea 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2078,7 +2078,7 @@ void asmlinkage __init noreturn __start_xen(void) &this_cpu(stubs).mfn); BUG_ON(!this_cpu(stubs.addr)); - traps_init(); /* Needs stubs allocated. */ + traps_init(); /* Needs stubs allocated, must be before presmp_initcalls. */ cpu_init(); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243142.1543161 (Exim 4.92) (envelope-from ) id 1vw74l-0001Vk-TD; Fri, 27 Feb 2026 23:16:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243142.1543161; Fri, 27 Feb 2026 23:16:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74l-0001Vd-Ou; Fri, 27 Feb 2026 23:16:51 +0000 Received: by outflank-mailman (input) for mailman id 1243142; Fri, 27 Feb 2026 23:16:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74j-0001Do-WE for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:50 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 63667f70-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:47 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-4377174e1ebso1836368f8f.3 for ; Fri, 27 Feb 2026 15:16:47 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:45 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 63667f70-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234207; x=1772839007; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vW+QCUaUYuUq9G8gsk0OzquSefAutMzWyPSfjvJkvyY=; b=vhLha4bonoIIVEtrCYPP1O9oG/HtAdS9glPqoD/EGaAeaM0qrSyp0hb7oBSKNSCxr2 KRSY5Z1dC4Xef20vDJo01G75YjPd8nLXjstEHDXml7wO7nRDcdxODY3UgTvjDCuwwFLW iDDmo7htP/Mp+Ob60RpxIlNP54a/Ft1pu3RKM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234207; x=1772839007; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=vW+QCUaUYuUq9G8gsk0OzquSefAutMzWyPSfjvJkvyY=; b=Zzb6OjewaZBPMNFP4yyG4zRagBGyDLHRiZH+kU8H0a1ZZFJT1su8sOEPgGqF3Xkab+ xKVcOnURpeL2CRA1IRy49nKQZUbXWynSPRzisfbWZkqNUEXdF+SyaGhIJ9uv2eOwYFSU r+smbv4RG7+89alOMtK807xyaTm+pa6/TOwQjGvehB/54gIuZlOmuT7Jo7+5Xx1sVrzr 9QTrzy6z5ebOtFIdkb4Tlayh0+YpeBgP/9Nlp3GIrmsFpW+RpNeAMu1oRqjCZh4EupEV K1dY2E3IX9JmE6IO+DNKdAxirKLaHaf6Htwapa94+HLHbDjZvc+jR33DeAWxJmah6/lN 7sqQ== X-Gm-Message-State: AOJu0YzF0KyY8nDaaI8mPnMXdz0sjnr/xuOJSXZdvLYhJSe6iMRlsoZg 8Hqq466CnoaQPy833cIqJjoTlmkLn5d55a+p3LIjZrvokpp/ZPwYmx7kqSKhf4xbecBPlUpuSlj m56CTSJzVEQ== X-Gm-Gg: ATEYQzyOh+nZyZYUl+Oxb5m9gLnnvQ77+8+JLKCIDIOOG75jmX6c3c2Hny4bRsLsSID HTqm78aNhITRpVNnVF68OYTWjb8ttQNc5KFams6hw2dBiHL8hNSx4hVun2BaG361X9vmgX6gWw3 pc9oJu7k06bTSUMI7pgGL5drJZ7oEi4BAAcEN+/025FEN+xOs1e40Yx5eDlx4xy6ZseMbwH3MmL I4Qm5hpK/BEpab3zDC7AqBkJkgWYeaDzqTmUW6M11lc8Iv3F5XDciEjoeZh1XzwFTXqQzLDSAt2 j/hDv9SCfyvO2dm6J2GqyawyVp6iCPYRfIfIlmxOP4R2TFMCnji9oMinnZz4GbrncF0svUK5Cv3 nM2dfT24ZKjJecfOe2TJLHcRQD1TRbOxwHP10SgFf9F/Y6uhgtBW5au+rIZBaB/q8zZBA7nV19l uiUXPAw8wWXt6NpPm8FvK/CauML9WWnS1R1LxyzTUfgW+HtUgzDyKXG/JkJtVFlW2lXS/AI4g= X-Received: by 2002:a05:6000:2483:b0:439:5bfe:18ce with SMTP id ffacd0b85a97d-4399dde22d3mr8576771f8f.8.1772234206354; Fri, 27 Feb 2026 15:16:46 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 05/14] x86/traps: Move traps_init() earlier on boot Date: Fri, 27 Feb 2026 23:16:27 +0000 Message-Id: <20260227231636.3955109-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We wish to make use of opt_fred earlier on boot, which involves moving traps_init() earlier, but this comes with several ordering complications. The feature word containing FRED needs collecting in early_cpu_init(), and legacy_syscall_init() cannot be called that early because it relies on the stubs being allocated, yet must be called ahead of cpu_init() so the SYSCALL linkage MSRs are set up before being cached. Delaying legacy_syscall_init() is easy enough based on a system_state check. Reuse bsp_traps_reinit() to cause a call to legacy_syscall_init() to occur at the same point as previously. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * New I don't particualrly like this solution, but the layout of these functions change for FRED. Any adjustments need to consider the logic at the end of the series, not at this point. --- xen/arch/x86/cpu/common.c | 4 +++- xen/arch/x86/setup.c | 4 +++- xen/arch/x86/traps-setup.c | 12 +++++++++++- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index bfa63fcfb721..5d0523a78b52 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -407,7 +407,9 @@ void __init early_cpu_init(bool verbose) } if (max_subleaf >= 1) - cpuid_count(7, 1, &eax, &ebx, &ecx, + cpuid_count(7, 1, + &c->x86_capability[FEATURESET_7a1], + &ebx, &ecx, &c->x86_capability[FEATURESET_7d1]); } diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 675de3a649ea..0816a713e1c8 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1386,6 +1386,8 @@ void asmlinkage __init noreturn __start_xen(void) else panic("Bootloader provided no memory information\n"); + traps_init(); + /* Choose shadow stack early, to set infrastructure up appropriately. */ if ( !boot_cpu_has(X86_FEATURE_CET_SS) ) opt_xen_shstk = 0; @@ -2078,7 +2080,7 @@ void asmlinkage __init noreturn __start_xen(void) &this_cpu(stubs).mfn); BUG_ON(!this_cpu(stubs.addr)); - traps_init(); /* Needs stubs allocated, must be before presmp_initcalls. */ + bsp_traps_reinit(); /* Needs stubs allocated, must be before presmp_initcalls. */ cpu_init(); diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c index c5fc71c75bca..b2c161943d1e 100644 --- a/xen/arch/x86/traps-setup.c +++ b/xen/arch/x86/traps-setup.c @@ -346,6 +346,10 @@ void __init traps_init(void) /* * Re-initialise all state referencing the early-boot stack. + * + * This is called twice during boot, first to ensure legacy_syscall_init() has + * run (deferred from earlier), and second when the virtual address of the BSP + * stack changes. */ void __init bsp_traps_reinit(void) { @@ -359,7 +363,13 @@ void __init bsp_traps_reinit(void) */ void percpu_traps_init(void) { - legacy_syscall_init(); + /* + * Skip legacy_syscall_init() at early boot. It requires the stubs being + * allocated, limiting the placement of the traps_init() call, and gets + * re-done anyway by bsp_traps_reinit(). + */ + if ( system_state > SYS_STATE_early_boot ) + legacy_syscall_init(); if ( cpu_has_xen_lbr ) wrmsrl(MSR_IA32_DEBUGCTLMSR, IA32_DEBUGCTLMSR_LBR); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243143.1543166 (Exim 4.92) (envelope-from ) id 1vw74m-0001ZB-95; Fri, 27 Feb 2026 23:16:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243143.1543166; Fri, 27 Feb 2026 23:16:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74m-0001Xx-1i; Fri, 27 Feb 2026 23:16:52 +0000 Received: by outflank-mailman (input) for mailman id 1243143; Fri, 27 Feb 2026 23:16:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74k-0008WD-Eh for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:50 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 64a23d16-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:49 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-436e87589e8so2508815f8f.3 for ; Fri, 27 Feb 2026 15:16:49 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:47 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 64a23d16-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234209; x=1772839009; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0UFkS5LRVpmC0KP6ipyZ4ETPBXtVQAe04/RvjF0fewY=; b=Cvna4BAnfjmVea8EYBguec/SIJ54FYSiFw6gdPhB6LP5SVDRKl+kmXZ3exQly+xriw cTFSYfL2qDqJgsElxix0kL+m6gvUSbCe89WM2O5PwSfpggfnocBJhTUJMLdmA7z9rOek 25pasuPJHgclQSOB+OBawF0VbaYHxv6X4KcC8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234209; x=1772839009; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0UFkS5LRVpmC0KP6ipyZ4ETPBXtVQAe04/RvjF0fewY=; b=nVqmpVHGilYf1jrojZoJ2589McoZe7sH64MO8Z0K8QuPoByNkKF/x6MqNO9iV94fzf WD1b/5z1cPaEXNmzRCsAQRtMlaMNJa8uFBXigrfAbDTi8hryrxlj8d7Ltt+MqyNY9djF BzfWMkUc3mBiaP9hq05wwhPylYdy2WDcpQzPd48m2dCgd5UDEXGvK6ecH2uvLaSPMgg0 j/NFoLh8So51kNxOVDeQetYTzgjw7wqZNR87zWaHZRwSazK2tVSKkLij6gZkF37KBlvu FImyb9aribDSlBSiMUtKjR9qRBz9JYzJxSDD0lOvJbC03gY4lWMhmNFD6tcym8GZMju+ Od4w== X-Gm-Message-State: AOJu0YzAnf85+91Sc+RYZIcquMot2Iie//pG/KzDg02HqxQas8+KGoqO dX0sPtZwtzePEI/NA72rnjmOrXjEK7dHjQSZjSojgH0DNql0ZeRekrwRsyi3MhwN/t58Ds45dgD CJJUq X-Gm-Gg: ATEYQzxU1CBRfw8h1JkqvHqijWhpiEwMHrN/0YLOipz5qJAchjonktSzeHRtONU+fM2 Xs3ybIK8mbREjtJwBAqJXiBpVXMaD8LQexwLKEYxIZuPUXohaJihcGYN3QukG62kVVz61kN3rfU w+pkQb6dp7L2VuSCT9kgeZIdxb5XM9Qk1jTeop0oERZ+JJUYz54DegRoCMMUcRM5C0Vv0ncivVN aJQmQ0uyvI8G2fiqkfT4k1YZTXVNSRBSN/YqvVJx1NkSfMm7t/6LCHIiTDbT9adokvmiKg9wxCS e4YJbhruJOgFNTAQIOdMEPF+iiwYdpysWae0JkV6D/vDR7b2rXZJazEXYdvcVp8BoD9wRX47b7B eQJkhCVvfmyPfRoGFFAD9HIPVZw5dkt/hjctyZcVTACZbZWY2p8KxbBMclfVjEICfxoClp3CNfn 0Q6Ihyn15F1HhrMPJAreIQTYzwoqHwfpgj/xuvOjCQJC/AxG4OlQnVF80wtbJzh8SafbQ+hFtJB vic/qbPMw== X-Received: by 2002:a5d:5f94:0:b0:435:9144:1417 with SMTP id ffacd0b85a97d-4399de2baacmr8254016f8f.49.1772234208054; Fri, 27 Feb 2026 15:16:48 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 07/14] x86/traps: Introduce FRED entrypoints Date: Fri, 27 Feb 2026 23:16:29 +0000 Message-Id: <20260227231636.3955109-8-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Under FRED, there's one entrypoint from Ring 3, and one from Ring 0. FRED gives us a good stack (even for SYSCALL/SYSENTER), and a unified event frame on the stack, meaing that all software needs to do is spill the GPRs with a line of PUSHes. Introduce PUSH_AND_CLEAR_GPRS for this purpose, along with the matching POP_GPRS. Introduce entry_FRED_R0() which to a first appoximation is complete for all event handling within Xen. entry_FRED_R0() needs deriving from entry_FRED_R3(), so introduce a basic handler. There is more work required to make the return-to-guest path work under FRED. Also introduce entry_from_{xen,pv}() to be the C level handlers. By simply copying regs->fred_ss.vector into regs->entry_vector, we can reuse all the existing fault handlers. Extend fatal_trap() to render the event type, including by name, when FRED is active. This is slightly complicated, because X86_ET_OTHER must not use vector_name() or SYSCALL and SYSENTER get rendered as #BP and #DB. This is sufficient to handle all interrupts and exceptions encountered during development, including plenty of Double Faults. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné v4: * Drop POP_GPRS %rax parameter for now. * Treat nested events as fatal. Even if the condition didn't escalate to #DF, it still indicates an error with the linkage setup. v3: * Adjust commit message to remove stale details * Adjust formatting in fatal_trap() * Group CP with others. It's probably wrong for perf, but that's out the window anyway now that we're letting a compiler make the decision tree. v2: * Don't render a vector name for X86_ET_SW_INT * Fix typos in names[] * Link entry-fred.o first SIMICS hasn't been updated to the FRED v9, and still wants ENDBR instructions at the entrypoints. --- xen/arch/x86/include/asm/asm_defns.h | 63 +++++++++++ xen/arch/x86/traps.c | 155 +++++++++++++++++++++++++++ xen/arch/x86/x86_64/Makefile | 1 + xen/arch/x86/x86_64/entry-fred.S | 33 ++++++ 4 files changed, 252 insertions(+) create mode 100644 xen/arch/x86/x86_64/entry-fred.S diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index 4a21a7b46684..0dd63270fc7c 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -312,6 +312,69 @@ static always_inline void stac(void) subq $-(UREGS_error_code-UREGS_r15+\adj), %rsp .endm +/* + * Push and clear GPRs + */ +.macro PUSH_AND_CLEAR_GPRS + push %rdi + xor %edi, %edi + push %rsi + xor %esi, %esi + push %rdx + xor %edx, %edx + push %rcx + xor %ecx, %ecx + push %rax + xor %eax, %eax + push %r8 + xor %r8d, %r8d + push %r9 + xor %r9d, %r9d + push %r10 + xor %r10d, %r10d + push %r11 + xor %r11d, %r11d + push %rbx + xor %ebx, %ebx + push %rbp +#ifdef CONFIG_FRAME_POINTER +/* Indicate special exception stack frame by inverting the frame pointer. */ + mov %rsp, %rbp + not %rbp +#else + xor %ebp, %ebp +#endif + push %r12 + xor %r12d, %r12d + push %r13 + xor %r13d, %r13d + push %r14 + xor %r14d, %r14d + push %r15 + xor %r15d, %r15d +.endm + +/* + * POP GPRs from a UREGS_* frame on the stack. Does not modify flags. + */ +.macro POP_GPRS + pop %r15 + pop %r14 + pop %r13 + pop %r12 + pop %rbp + pop %rbx + pop %r11 + pop %r10 + pop %r9 + pop %r8 + pop %rax + pop %rcx + pop %rdx + pop %rsi + pop %rdi +.endm + #ifdef CONFIG_PV32 #define CR4_PV32_RESTORE \ ALTERNATIVE_2 "", \ diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 907fb4c186c0..48667c71d591 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -88,6 +88,13 @@ const unsigned int nmi_cpu; #define stack_words_per_line 4 #define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)(regs)->rsp) +/* Only valid to use when FRED is active. */ +static inline struct fred_info *cpu_regs_fred_info(struct cpu_user_regs *regs) +{ + ASSERT(read_cr4() & X86_CR4_FRED); + return &container_of(regs, struct cpu_info, guest_cpu_user_regs)->_fred; +} + struct extra_state { unsigned long cr0, cr2, cr3, cr4; @@ -1028,6 +1035,32 @@ void show_execution_state_nmi(const cpumask_t *mask, bool show_all) printk("Non-responding CPUs: {%*pbl}\n", CPUMASK_PR(&show_state_mask)); } +static const char *x86_et_name(unsigned int type) +{ + static const char *const names[] = { + [X86_ET_EXT_INTR] = "EXT_INTR", + [X86_ET_NMI] = "NMI", + [X86_ET_HW_EXC] = "HW_EXC", + [X86_ET_SW_INT] = "SW_INT", + [X86_ET_PRIV_SW_EXC] = "PRIV_SW_EXC", + [X86_ET_SW_EXC] = "SW_EXC", + [X86_ET_OTHER] = "OTHER", + }; + + return (type < ARRAY_SIZE(names) && names[type]) ? names[type] : "???"; +} + +static const char *x86_et_other_name(unsigned int what) +{ + static const char *const names[] = { + [0] = "MTF", + [1] = "SYSCALL", + [2] = "SYSENTER", + }; + + return (what < ARRAY_SIZE(names) && names[what]) ? names[what] : "???"; +} + const char *vector_name(unsigned int vec) { static const char names[][4] = { @@ -1106,6 +1139,38 @@ void fatal_trap(const struct cpu_user_regs *regs, bool show_remote) } } + if ( read_cr4() & X86_CR4_FRED ) + { + bool render_ec = false; + const char *vec_name = NULL; + + switch ( regs->fred_ss.type ) + { + case X86_ET_HW_EXC: + case X86_ET_PRIV_SW_EXC: + case X86_ET_SW_EXC: + render_ec = true; + vec_name = vector_name(regs->fred_ss.vector); + break; + + case X86_ET_OTHER: + vec_name = x86_et_other_name(regs->fred_ss.vector); + break; + } + + if ( render_ec ) + panic("FATAL TRAP: type %u, %s, vec %u, %s[%04x]%s\n", + regs->fred_ss.type, x86_et_name(regs->fred_ss.type), + regs->fred_ss.vector, vec_name ?: "", + regs->error_code, + (regs->eflags & X86_EFLAGS_IF) ? "" : " IN INTERRUPT CONTEXT"); + else + panic("FATAL TRAP: type %u, %s, vec %u, %s%s\n", + regs->fred_ss.type, x86_et_name(regs->fred_ss.type), + regs->fred_ss.vector, vec_name ?: "", + (regs->eflags & X86_EFLAGS_IF) ? "" : " IN INTERRUPT CONTEXT"); + } + panic("FATAL TRAP: vec %u, %s[%04x]%s\n", trapnr, vector_name(trapnr), regs->error_code, (regs->eflags & X86_EFLAGS_IF) ? "" : " IN INTERRUPT CONTEXT"); @@ -2199,6 +2264,96 @@ void asmlinkage check_ist_exit(const struct cpu_user_regs *regs, bool ist_exit) } #endif +void asmlinkage entry_from_pv(struct cpu_user_regs *regs) +{ + /* Copy fred_ss.vector into entry_vector as IDT delivery would have done. */ + regs->entry_vector = regs->fred_ss.vector; + + fatal_trap(regs, false); +} + +void asmlinkage entry_from_xen(struct cpu_user_regs *regs) +{ + struct fred_info *fi = cpu_regs_fred_info(regs); + uint8_t type = regs->fred_ss.type; + + /* Copy fred_ss.vector into entry_vector as IDT delivery would have done. */ + regs->entry_vector = regs->fred_ss.vector; + + /* + * First, handle the asynchronous or fatal events. These are either + * unrelated to the interrupted context, or may not have valid context + * recorded, and all have special rules on how/whether to re-enable IRQs. + */ + if ( regs->fred_ss.nested ) + goto fatal; + + switch ( type ) + { + case X86_ET_EXT_INTR: + return do_IRQ(regs); + + case X86_ET_NMI: + return do_nmi(regs); + + case X86_ET_HW_EXC: + switch ( regs->fred_ss.vector ) + { + case X86_EXC_DF: return do_double_fault(regs); + case X86_EXC_MC: return do_machine_check(regs); + } + break; + } + + /* + * With the asynchronous events handled, what remains are the synchronous + * ones. If we interrupted an IRQs-on region, we should re-enable IRQs + * now; for #PF and #DB, %cr2 and PENDING_DBG are on the stack in edata. + */ + if ( regs->eflags & X86_EFLAGS_IF ) + local_irq_enable(); + + switch ( type ) + { + case X86_ET_HW_EXC: + case X86_ET_PRIV_SW_EXC: + case X86_ET_SW_EXC: + switch ( regs->fred_ss.vector ) + { + case X86_EXC_PF: handle_PF(regs, fi->edata); break; + case X86_EXC_GP: do_general_protection(regs); break; + case X86_EXC_UD: do_invalid_op(regs); break; + case X86_EXC_NM: do_device_not_available(regs); break; + case X86_EXC_BP: do_int3(regs); break; + case X86_EXC_DB: handle_DB(regs, fi->edata); break; + case X86_EXC_CP: do_entry_CP(regs); break; + + case X86_EXC_DE: + case X86_EXC_OF: + case X86_EXC_BR: + case X86_EXC_NP: + case X86_EXC_SS: + case X86_EXC_MF: + case X86_EXC_AC: + case X86_EXC_XM: + do_trap(regs); + break; + + default: + goto fatal; + } + break; + + default: + goto fatal; + } + + return; + + fatal: + fatal_trap(regs, false); +} + /* * Local variables: * mode: C diff --git a/xen/arch/x86/x86_64/Makefile b/xen/arch/x86/x86_64/Makefile index f20763088740..c0a0b6603221 100644 --- a/xen/arch/x86/x86_64/Makefile +++ b/xen/arch/x86/x86_64/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_PV32) += compat/ +obj-bin-y += entry-fred.o obj-bin-y += entry.o obj-$(CONFIG_KEXEC) += machine_kexec.o obj-y += pci.o diff --git a/xen/arch/x86/x86_64/entry-fred.S b/xen/arch/x86/x86_64/entry-fred.S new file mode 100644 index 000000000000..3c3320df22cb --- /dev/null +++ b/xen/arch/x86/x86_64/entry-fred.S @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + + .file "x86_64/entry-fred.S" + +#include +#include + + .section .text.entry, "ax", @progbits + + /* The Ring3 entry point is required to be 4k aligned. */ + +FUNC(entry_FRED_R3, 4096) + PUSH_AND_CLEAR_GPRS + + mov %rsp, %rdi + call entry_from_pv + + POP_GPRS + eretu +END(entry_FRED_R3) + + /* The Ring0 entrypoint is at Ring3 + 0x100. */ + .org entry_FRED_R3 + 0x100, 0xcc + +FUNC_LOCAL(entry_FRED_R0, 0) + PUSH_AND_CLEAR_GPRS + + mov %rsp, %rdi + call entry_from_xen + + POP_GPRS + erets +END(entry_FRED_R0) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243145.1543172 (Exim 4.92) (envelope-from ) id 1vw74m-0001iR-Px; Fri, 27 Feb 2026 23:16:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243145.1543172; Fri, 27 Feb 2026 23:16:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74m-0001gJ-Ky; Fri, 27 Feb 2026 23:16:52 +0000 Received: by outflank-mailman (input) for mailman id 1243145; Fri, 27 Feb 2026 23:16:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74l-0008WD-7O for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:51 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 64ee25d6-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:50 +0100 (CET) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-48329eb96a7so19849895e9.3 for ; Fri, 27 Feb 2026 15:16:50 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:48 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 64ee25d6-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234209; x=1772839009; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RbhT0QMKBr/TIGT+bhPKLxd4WsrkmIxt58Vxe9HNu08=; b=IqrRAk+QEM+BsjGUr+SQuBK4HVBy4xKrkt8t2aFjS8rGbBZfBhcBxGEaarc3rAvwE0 cvu2TTH7Bk3Yqz9101oIiBXFQIqemOqEMALQCoiF3yFSPQRui2F79lmOTnvJJZxy0nPl vf3JKBXrDO7B9GeJa5QjU2UkhprnmWYuCrSXw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234209; x=1772839009; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RbhT0QMKBr/TIGT+bhPKLxd4WsrkmIxt58Vxe9HNu08=; b=lA2IouDxFj5W0swSbIGxtrWeUYl2EPNNmrNQOAUVanUYIjjoVNgNjpsdap/O9yXuPN 2TPlCAAso3gjkGQIKemi9mDX6ANi6Lw+69+/Eyn6O38wZYtNG24C+aZIlX/v9abl/LXy zMa+6M2YoO1ZVi/Nc09LKNJcFtDkb+SUkI7GGoR4UIR3KQiFtXfj5fndF3XBqXUois6o Y/w1Zjqv3QmTCdc51k0HQkwnR/R7GxVckQ9RNvr7Cu/wSrrOu1iG6AFbcdl+YtXBhoKn ih0N8t+Fe260ryBJSHiX3QFYBT/LvTqzF6vLzaasNgjvnV1sCsGGWiZUshRCDnKiw/SA 9sJQ== X-Gm-Message-State: AOJu0YzHfQSt0GgEzTxmecBN3Up+HCrpitlJpCfa8PkInsn7S5fWPwpi 3Qw1BUX6AHxoM19WBsnQImo++zLA4BaZcCcAQp3V6yrK7iQZKL9IsXjo5+6fQQCCj4KAajDUrId 97z4O X-Gm-Gg: ATEYQzwW9A/FBnBOgsZm08n5FDN3R/tAwbxsp5pbLPSWFR18Sm5pABjldN+/V5Cdn5m U6empophNCUzSh7lDroMg84PVvnENnUdwUU+R3wH7VzQNLyswjh3Ao4n/eBukz6UW9UsIIoqfam 5EzaZ6a3WOgT74N9iDqwZyFsCNRum5PmbxD4kikY03GVXh9WsmMNhZlUmU8/jS7f71dxTZhihZD lK4CH7BeAssJ5mJLWfvgkKd8YnlFpv6RLNYLwVw/J47VyFBCbeg2P/f2vP2In9kotHoKDYNKIjD k6xj/fhvuOAUnJycU7M1TokxmmBgVMUhAQlLy84LS88AC7Xfjaqf8NrhW/Fv2W0b4zjijd/P2VI 7Dr3Zm8KMAxpFRsJbdJxzZ/e2nEZgZjm6JIJjVWuneFCu/mDGX9+2lcFI8ytN8ii5TShQXWsM1z Eobyr55xNOAe8ws5Q2rXAqKCyiA/5w2Vj5g5DLDf3daiAn1owZjCu67KrcjTaOpDa4lkSEbog= X-Received: by 2002:a05:600c:4e56:b0:483:612d:7a9a with SMTP id 5b1f17b1804b1-483c9b68304mr84594355e9.0.1772234208709; Fri, 27 Feb 2026 15:16:48 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 08/14] x86/traps: Enable FRED when requested Date: Fri, 27 Feb 2026 23:16:30 +0000 Message-Id: <20260227231636.3955109-9-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With the shadow stack and exception handling adjustements in place, we can now activate FRED when appropriate. Note that opt_fred is still disabled by default until more infrastructure is in place. Introduce init_fred() to set up all the MSRs relevant for FRED. FRED uses MSR_STAR (entries from Ring3 only), and MSR_FRED_SSP_SL0 aliases MSR_PL0_SSP when CET-SS is active. Otherwise, they're all new MSRs. Also introduce init_fred_tss(). At this juncture we need a TSS set up, even if it is mostly unused. Reinsert the BUILD_BUG_ON() checking the size of the TSS against 0x67, this time with a more precise comment. With init_fred() existing, load_system_tables() and legacy_syscall_init() should only be used when setting up IDT delivery. Insert ASSERT()s to this effect, and adjust the various init functions to make this property true. The FRED initialisation path still needs to write to all system table registers at least once, even if only to invalidate them. Per the documentation, percpu_early_traps_init() is responsible for switching off the boot GDT, which also needs doing even in FRED mode. Finally, set CR4.FRED in traps_init()/percpu_early_traps_init(). Xen can now boot in FRED mode and run a PVH dom0. PV guests still need more work before they can be run under FRED. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné [*] PVH Dom0 on an Intel PantherLake CPU. v4: * Rework TSS handling entirely, following the VT-x (re)discovery. v3: * Fix poisoning of SL1 pointers. * Adjust bsp_traps_reinit(). It probably doesn't matter. --- xen/arch/x86/include/asm/current.h | 3 + xen/arch/x86/include/asm/traps.h | 2 + xen/arch/x86/traps-setup.c | 130 +++++++++++++++++++++++++++-- 3 files changed, 130 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/include/asm/current.h b/xen/arch/x86/include/asm/current.h index 62817e8476ec..6139980ab115 100644 --- a/xen/arch/x86/include/asm/current.h +++ b/xen/arch/x86/include/asm/current.h @@ -23,6 +23,9 @@ * 2 - NMI IST stack * 1 - #MC IST stack * 0 - IST Shadow Stacks (4x 1k, read-only) + * + * In FRED mode, #DB and NMI do not need special stacks, so their IST stacks + * are unused. */ /* diff --git a/xen/arch/x86/include/asm/traps.h b/xen/arch/x86/include/asm/traps.h index 73097e957d05..5d7504bc44d1 100644 --- a/xen/arch/x86/include/asm/traps.h +++ b/xen/arch/x86/include/asm/traps.h @@ -16,6 +16,8 @@ void traps_init(void); void bsp_traps_reinit(void); void percpu_traps_init(void); +void nocall entry_FRED_R3(void); + extern unsigned int ler_msr; const char *vector_name(unsigned int vec); diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c index b2c161943d1e..4c8744eebe3c 100644 --- a/xen/arch/x86/traps-setup.c +++ b/xen/arch/x86/traps-setup.c @@ -59,6 +59,8 @@ static void load_system_tables(void) .limit = sizeof(bsp_idt) - 1, }; + ASSERT(opt_fred == 0); + /* * Set up the TSS. Warning - may be live, and the NMI/#MC must remain * valid on every instruction boundary. (Note: these are all @@ -191,6 +193,8 @@ static void legacy_syscall_init(void) unsigned char *stub_page; unsigned int offset; + ASSERT(opt_fred == 0); + /* No PV guests? No need to set up SYSCALL/SYSENTER infrastructure. */ if ( !IS_ENABLED(CONFIG_PV) ) return; @@ -268,6 +272,76 @@ static void __init init_ler(void) setup_force_cpu_cap(X86_FEATURE_XEN_LBR); } +/* + * Set up all MSRs relevant for FRED event delivery. + * + * Xen does not use any of the optional config in MSR_FRED_CONFIG, so all that + * is needed is the entrypoint. + * + * Because FRED always provides a good stack, NMI and #DB do not need any + * special treatment. Only #DF needs another stack level, and #MC for the + * offchance that Xen's main stack suffers an uncorrectable error. + * + * This makes Stack Level 1 unused, but we use #DB's stacks, and with the + * regular and shadow stacks reversed as posion to guarantee that any use + * escalates to #DF. + * + * FRED reuses MSR_STAR to provide the segment selector values to load on + * entry from Ring3. Entry from Ring0 leave %cs and %ss unmodified. + */ +static void init_fred(void) +{ + unsigned long stack_top = get_stack_bottom() & ~(STACK_SIZE - 1); + + ASSERT(opt_fred == 1); + + wrmsrns(MSR_STAR, XEN_MSR_STAR); + wrmsrns(MSR_FRED_CONFIG, (unsigned long)entry_FRED_R3); + + /* + * MSR_FRED_RSP_* all come with an 64-byte alignment check, avoiding the + * need for an explicit BUG_ON(). + */ + wrmsrns(MSR_FRED_RSP_SL0, (unsigned long)(&get_cpu_info()->_fred + 1)); + wrmsrns(MSR_FRED_RSP_SL1, stack_top + (IST_DB * IST_SHSTK_SIZE)); /* Poison */ + wrmsrns(MSR_FRED_RSP_SL2, stack_top + (1 + IST_MCE) * PAGE_SIZE); + wrmsrns(MSR_FRED_RSP_SL3, stack_top + (1 + IST_DF) * PAGE_SIZE); + wrmsrns(MSR_FRED_STK_LVLS, ((2UL << (X86_EXC_MC * 2)) | + (3UL << (X86_EXC_DF * 2)))); + + if ( cpu_has_xen_shstk ) + { + wrmsrns(MSR_FRED_SSP_SL0, stack_top + (PRIMARY_SHSTK_SLOT + 1) * PAGE_SIZE); + wrmsrns(MSR_FRED_SSP_SL1, stack_top + (1 + IST_DB) * PAGE_SIZE); /* Poison */ + wrmsrns(MSR_FRED_SSP_SL2, stack_top + (IST_MCE * IST_SHSTK_SIZE)); + wrmsrns(MSR_FRED_SSP_SL3, stack_top + (IST_DF * IST_SHSTK_SIZE)); + } +} + +/* + * Set up a minimal TSS and selector for use in FRED mode. + * + * With FRED moving the stack pointers into MSRs, we would like to avoid + * having a TSS at all, but: + * - VT-x VMExit unconditionally sets TR.limit to 0x67, meaning that + * HOST_TR_BASE needs to point to a good TSS. + * - show_stack_overflow() cross-checks tss->rsp0. + * + * Fill in rsp0 and the bitmap offset, and load a zero-length TR. If VT-x + * does get used, it will clobber TR to refer to this_cpu(tss_page).tss. + */ +static void init_fred_tss(void) +{ + seg_desc_t *gdt = this_cpu(gdt) - FIRST_RESERVED_GDT_ENTRY; + struct tss64 *tss = &this_cpu(tss_page).tss; + + tss->rsp0 = get_stack_bottom(); + tss->bitmap = IOBMP_INVALID_OFFSET; + + _set_tssldt_desc(gdt + TSS_ENTRY, 0, 0, SYS_DESC_tss_avail); + ltr(TSS_SELECTOR); +} + /* * Configure basic exception handling. This is prior to parsing the command * line or configuring a console, and needs to be as simple as possible. @@ -322,6 +396,8 @@ void __init traps_init(void) if ( opt_fred ) { + const struct desc_ptr idtr = {}; + #ifdef CONFIG_PV32 if ( opt_pv32 ) { @@ -329,16 +405,27 @@ void __init traps_init(void) printk(XENLOG_INFO "Disabling PV32 due to FRED\n"); } #endif + + init_fred(); + set_in_cr4(X86_CR4_FRED); + + /* + * Invalidate the IDT as it's not used. Set up a minimal TSS. The + * LDT was configured by bsp_early_traps_init(). + */ + lidt(&idtr); + init_fred_tss(); + setup_force_cpu_cap(X86_FEATURE_XEN_FRED); printk("Using FRED event delivery\n"); } else { + load_system_tables(); + printk("Using IDT event delivery\n"); } - load_system_tables(); - init_ler(); percpu_traps_init(); @@ -353,7 +440,11 @@ void __init traps_init(void) */ void __init bsp_traps_reinit(void) { - load_system_tables(); + if ( opt_fred ) + init_fred(); + else + load_system_tables(); + percpu_traps_init(); } @@ -368,7 +459,7 @@ void percpu_traps_init(void) * allocated, limiting the placement of the traps_init() call, and gets * re-done anyway by bsp_traps_reinit(). */ - if ( system_state > SYS_STATE_early_boot ) + if ( !opt_fred && system_state > SYS_STATE_early_boot ) legacy_syscall_init(); if ( cpu_has_xen_lbr ) @@ -384,7 +475,29 @@ void percpu_traps_init(void) */ void asmlinkage percpu_early_traps_init(void) { - load_system_tables(); + if ( opt_fred ) + { + seg_desc_t *gdt = this_cpu(gdt) - FIRST_RESERVED_GDT_ENTRY; + const struct desc_ptr gdtr = { + .base = (unsigned long)gdt, + .limit = LAST_RESERVED_GDT_BYTE, + }, idtr = {}; + + lgdt(&gdtr); + + init_fred(); + write_cr4(read_cr4() | X86_CR4_FRED); + + /* + * Invalidate the IDT (not used) and LDT (not set up yet). Set up a + * minimal TSS. + */ + lidt(&idtr); + init_fred_tss(); + lldt(0); + } + else + load_system_tables(); } static void __init __maybe_unused build_assertions(void) @@ -403,4 +516,11 @@ static void __init __maybe_unused build_assertions(void) endof_field(struct cpu_info, guest_cpu_user_regs)) & 15); BUILD_BUG_ON((sizeof(struct cpu_info) - endof_field(struct cpu_info, _fred)) & 63); + + /* + * The x86 architecture is happy with TR.limit being less than 0x67, but + * VT-x is not. VMExit unconditionally sets the limit to 0x67, meaning + * that HOST_TR_BASE needs to refer to a good TSS of at least this size. + */ + BUILD_BUG_ON(sizeof(struct tss64) <= 0x67); } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243146.1543189 (Exim 4.92) (envelope-from ) id 1vw74o-00029Q-4i; Fri, 27 Feb 2026 23:16:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243146.1543189; Fri, 27 Feb 2026 23:16:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74n-00029E-W6; Fri, 27 Feb 2026 23:16:53 +0000 Received: by outflank-mailman (input) for mailman id 1243146; Fri, 27 Feb 2026 23:16:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74m-0001Do-0J for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:52 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 641b136d-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:48 +0100 (CET) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-43994aa265eso1501203f8f.3 for ; Fri, 27 Feb 2026 15:16:48 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 641b136d-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234208; x=1772839008; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0CZO8VvFJTkoemSFkzFWEvoCyFq1y2gQ5xOPrI9dn3A=; b=dweHs6CDlyA5ruvLcqqzr5Zu5mYbhtimbFNBp2lpIBiMIXDjKa7DrsopvcWKSNt2lH ODbWCWBzPbLkLnP/+ZcbSxAeP4MR9RN+AUjD9wX8ptpPP47f1agyFG7HI/d3j12dI/05 /EyVuvt/EA0G2i+CbYWuJVK1y9kUg3BYlAS7s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234208; x=1772839008; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0CZO8VvFJTkoemSFkzFWEvoCyFq1y2gQ5xOPrI9dn3A=; b=Tj3fXQep3FnfwEvoDFzLMI6BYuBL5xP//0wtoXcS0guckHB6nqZ7v7FM8hahGUDrhK 4ajERYCbsDAW8Mq54uwSRBvWVjNDGBN+N+oNXmUI/6ET07Bb1m4Ofy7EfP74p2e7FD3n nVrXmyGWXh/KTtrPgFoqOv82MI9lquSPH/fTHiJ+GkLgH5P5tMso9D59B+cNtJgPtNRf KJ5oV0eq2TqqLzInPi30h4V48G1cviONL8MhwiRs6Mlm0/3uCM5Nf5hXc73h8/5a30fE BijuHCnO7qOP5iSHUC9XydYJFPC9MLyNAZGCL/rZYGqFakLrNwbdch9POW770QHILRRq IYTw== X-Gm-Message-State: AOJu0YxKO9McFlP/WRhAsEPQWKY+0J2jfjotLVqJ4LwqgUyXhRIy7Iqw OVULngWr9lUSRMXWSmOx2Ra8ArYMn1vIjy/HPKm8NxK+ZnTge0gK5lgx/M5LGYSujlxjdF5Z+HV MyPfT X-Gm-Gg: ATEYQzxij0quOpjKrHY/jT0jQUkNrDLuUECa1kNEY2eNmdUm/dLOtcuDZDt+dL4FO0u 2ieoeIKaKY41qfhogoKpvOwDXGIlg9cMonogHQcjqEe3LDwKBgYn/OFiPoBu90OzjuaUJ2uHhm+ 7BgBeL/nRckCiCmAaGFjgNOnvfOH2y6dg3+P3fNfu3rHJ2RklguTBw+XUihBVbe5salxZ0mNtzH WPvBmfcb1aVyYUBwb7ZYiJS4SXvDbwNkiQorGv1ooQbLZEJd6CHoMiViBPh6kLW02OeuLibldLa ZVNHvwWK/SxEoHRfdpk8IjEyAPBUuUc9unOLeWeGg/6pLUoz1VBJUfNKaMZ2IKiCi48bURgmVXC alurzysNBTq4xdAV5cEMJPF0xcU0CeSQBXJP+M3svVNpqWYd6T2VpCuCuAOCSUHvbD0DEWRoE51 g62Yx6UYZrIoSY0GgVBnbiM5L/0yblNtJeReR52pHQDfc/1LkruyxFLKTWXMbEutOQy35HVJo= X-Received: by 2002:a05:6000:18a9:b0:439:8e2f:689e with SMTP id ffacd0b85a97d-4399de2c5demr7687079f8f.43.1772234207185; Fri, 27 Feb 2026 15:16:47 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 06/14] x86/traps: Don't configure Supervisor Shadow Stack tokens in FRED mode Date: Fri, 27 Feb 2026 23:16:28 +0000 Message-Id: <20260227231636.3955109-7-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit FRED doesn't use Supervisor Shadow Stack tokens. This means that: 1) memguard_guard_stack() should not write Supervisor Shadow Stack Tokens. 2) cpu_has_bug_shstk_fracture is no longer relevant when deciding whether or not to enable Shadow Stacks in the first place. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * Adjust for cpu_has_bug_shstk_fracture. * Reworked entirely in light of the prior 3 patches. The SDM explicitly points out the shstk fracture vs FRED case, yet PTL enumerates CET-SSS (immunity to shstk fracture). I can only assume that there are other Intel CPUs with FRED but without CET-SSS. --- xen/arch/x86/mm.c | 14 +++++++++++--- xen/arch/x86/setup.c | 16 ++++++++++------ 2 files changed, 21 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 0d0d5292953b..4c404b6c134f 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -129,6 +129,7 @@ #include #include #include +#include #include #include @@ -6441,8 +6442,15 @@ static void write_sss_token(unsigned long *ptr) void memguard_guard_stack(void *p) { - /* IST Shadow stacks. 4x 1k in stack page 0. */ - if ( IS_ENABLED(CONFIG_XEN_SHSTK) ) + ASSERT(opt_fred >= 0); /* Confirm that FRED-ness has been resolved */ + + /* + * IST Shadow stacks. 4x 1k in stack page 0. + * + * With IDT delivery, we need Supervisor Shadow Stack tokens at the base + * of each stack. With FRED delivery, these no longer exist. + */ + if ( IS_ENABLED(CONFIG_XEN_SHSTK) && !opt_fred ) { write_sss_token(p + (IST_MCE * IST_SHSTK_SIZE) - 8); write_sss_token(p + (IST_NMI * IST_SHSTK_SIZE) - 8); @@ -6453,7 +6461,7 @@ void memguard_guard_stack(void *p) /* Primary Shadow Stack. 1x 4k in stack page 5. */ p += PRIMARY_SHSTK_SLOT * PAGE_SIZE; - if ( IS_ENABLED(CONFIG_XEN_SHSTK) ) + if ( IS_ENABLED(CONFIG_XEN_SHSTK) && !opt_fred ) write_sss_token(p + PAGE_SIZE - 8); map_pages_to_xen((unsigned long)p, virt_to_mfn(p), 1, PAGE_HYPERVISOR_SHSTK); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 0816a713e1c8..8e59c9801afe 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1412,15 +1412,19 @@ void asmlinkage __init noreturn __start_xen(void) boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && !boot_cpu_has(X86_FEATURE_CET_SSS); + ASSERT(opt_fred >= 0); /* Confirm that FRED-ness has been resolved */ + /* - * On bare metal, assume that Xen won't be impacted by shstk - * fracturing problems. Under virt, be more conservative and disable - * shstk by default. + * If FRED is in use, Supervisor Shadow Stack tokens are not used and + * shstk fracturing is of no consequence. Otherwise: + * - On bare metal, assume that Xen won't be impacted by shstk + * fracturing problems. + * - Under virt, be more conservative and disable shstk by default. */ if ( opt_xen_shstk == -1 ) opt_xen_shstk = - cpu_has_hypervisor ? !cpu_has_bug_shstk_fracture - : true; + opt_fred || (cpu_has_hypervisor ? !cpu_has_bug_shstk_fracture + : true); if ( opt_xen_shstk ) { @@ -1925,7 +1929,7 @@ void asmlinkage __init noreturn __start_xen(void) system_state = SYS_STATE_boot; - bsp_stack = cpu_alloc_stack(0); + bsp_stack = cpu_alloc_stack(0); /* Needs to know IDT vs FRED */ if ( !bsp_stack ) panic("No memory for BSP stack\n"); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243147.1543201 (Exim 4.92) (envelope-from ) id 1vw74p-0002RR-Gl; Fri, 27 Feb 2026 23:16:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243147.1543201; Fri, 27 Feb 2026 23:16:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74p-0002R4-7r; Fri, 27 Feb 2026 23:16:55 +0000 Received: by outflank-mailman (input) for mailman id 1243147; Fri, 27 Feb 2026 23:16:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74n-0001Do-0Y for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:53 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 61d57dc2-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:44 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-4375d4fb4d4so1676483f8f.0 for ; Fri, 27 Feb 2026 15:16:44 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:41 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 61d57dc2-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234204; x=1772839004; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XgdpzNU2ggPbFTgmu4VQz6T9b6r+7R4jXsnlPDE3Rcg=; b=NHLWGZQfYMaqUS/TGKOv5SxPxfjZXs9FFoH+q1SFnWgC+VSzNCtVY3yYo4DJkdeaEe 2snzK35OXTjfKKkGbtlWZmM9oD9MugXYCiYwCbBXTo/U5gCXtli5LHVnADr8UnvNP9n5 WfLp1NMIUDoNk/9ZcExzZo57GoZA3SaOsEIUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234204; x=1772839004; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XgdpzNU2ggPbFTgmu4VQz6T9b6r+7R4jXsnlPDE3Rcg=; b=Ru1sBgrIwWgS0SBT+bzWP0s/rlq3QpigeUxOUNx5Ss6rk8vEABOC/9H7vHqGAEqoeW 6vCR/nK+BbEPCak8PmGWqvFhnSOYOn8Pcx3Z2I0qI5kMQ312Vu5xsrb6BKFKQUUCYUGL u6GGXWolKmvaLkTrFr76pqdSbyL+t10gMeSkfxFET53Om7ixD/OIgkkPpl955cG5ZXTd KzkNiwAVYUOB6fkeNz/HHETDCQGdXH14ZNQ6ie8vHwoLIedw2NZ+UHreMYaD2qEX6DPr lYZsxM6m9QOG1iDB+67GxRfp2JYLdQqIatp/SQhj5ugUSL6SFqec25iLaShyQMEIqmAI Fyzw== X-Gm-Message-State: AOJu0Yyvw0A8CToqUVAGGeQSlQ9Ief5UBEUKW7LWZLtZi44eOXEDbEX7 br8yQMmqN8AwgsBaWKMT4UXI1+dv0zvuSGcNYhaYrbLRGXn5i4GzQ+SuJ2LdAc3w8gRBoE76hkE KVnqB X-Gm-Gg: ATEYQzwFJhY2pvvPWauC8sr1+iqhPKbXOp9/LiLG7q6P2bzQdo8g2kjSwV8RWK7zaUG ziuQM5w9FyVTNpKKzkr+Fgffzed3jJ3+MG7/SEiD7cZdxhH5x2wj6tFSgRrnPIzM3rU/AD0rjz3 0wgyZzGbfcz+p9xc/h02/4uJ//eqVACbRgDDiBKQmMPOYwRga/OTjyNLd65JPoscsmfcuXqR6mm DnLp4cEMWuY8wH0i8RQuhlfxbrDe40ObarrMDtZl/TYbTcuIbfUe793/Ms4QURbx8UgEvu3O+ET xIyN4Ijd8SqdSOEXBYvrpaVeVloWtj6hROhVpu+YaKNasz2Z5924BpmTTnNiZM1mi3F6E8grVdX x2Fk2DHezKNjiv/VRklyBkpAGbHkIcXZYVi74cpEucftIMboO6V+c4LquWsMw1eiqizmzhMDlU0 vZhojuy1rfg2nBD5g60yIFHigapjSLPD022QLLHbi1q5WR4YenbKU6vifv8DkDTgAfshyZ4p0= X-Received: by 2002:a05:6000:420d:b0:439:8a4f:5250 with SMTP id ffacd0b85a97d-4399dde503fmr7936970f8f.17.1772234203211; Fri, 27 Feb 2026 15:16:43 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 02/14] docs/guest-guide: Describe the PV traps and entrypoints ABI Date: Fri, 27 Feb 2026 23:16:24 +0000 Message-Id: <20260227231636.3955109-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ... seeing as I've had to thoroughly reverse engineer it for FRED and make tweaks in places. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné Obviously there's a lot more in need of doing, but this is at least a start. v4: * New --- docs/glossary.rst | 3 + docs/guest-guide/x86/index.rst | 1 + docs/guest-guide/x86/pv-traps.rst | 123 ++++++++++++++++++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 docs/guest-guide/x86/pv-traps.rst diff --git a/docs/glossary.rst b/docs/glossary.rst index 6adeec77e14c..c8ab2386bc6e 100644 --- a/docs/glossary.rst +++ b/docs/glossary.rst @@ -43,6 +43,9 @@ Glossary Sapphire Rapids (Server, 2023) CPUs. AMD support only CET-SS, starting with Zen3 (Both client and server, 2020) CPUs. + event channel + A paravirtual facility for guests to send and recieve interrupts. + guest The term 'guest' has two different meanings, depending on context, and should not be confused with :term:`domain`. diff --git a/docs/guest-guide/x86/index.rst b/docs/guest-guide/x86/index.rst index 502968490d9d..5b38ae397a9f 100644 --- a/docs/guest-guide/x86/index.rst +++ b/docs/guest-guide/x86/index.rst @@ -7,3 +7,4 @@ x86 :maxdepth: 2 hypercall-abi + pv-traps diff --git a/docs/guest-guide/x86/pv-traps.rst b/docs/guest-guide/x86/pv-traps.rst new file mode 100644 index 000000000000..2ff18e2f9454 --- /dev/null +++ b/docs/guest-guide/x86/pv-traps.rst @@ -0,0 +1,123 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +PV Traps and Entrypoints +======================== + +.. note:: + + The details here are specific to 64bit builds of Xen. Details for 32bit + builds of Xen, are different and not discussed further. + +PV guests are subject to Xen's linkage setup for events (interrupts, +exceptions and system calls). x86's IDT architecture and limitations are the +majority influence on the PV ABI. + +All external interrupts are routed to PV guests via the :term:`Event Channel` +interface, and not discussed further here. + +What remain are exceptions, and the instructions which cause a control +transfers. In the x86 architecture, the instructions relevant for PV guests +are: + + * ``INT3``, which generates ``#BP``. + + * ``INTO``, which generates ``#OF`` only if the overflow flag is set. It is + only usable in compatibility mode, and will ``#UD`` in 64bit mode. + + * ``CALL (far)`` referencing a gate in the GDT. + + * ``INT $N``, which invokes an arbitrary IDT gate. These four instructions + so far all check the gate DPL and will ``#GP`` otherwise. + + * ``INT1``, also known as ``ICEBP``, which generates ``#DB``. This + instruction does *not* check DPL, and can be used unconditionally by + userspace. + + * ``SYSCALL``, which enters CPL0 as configured by the ``{C,L,}STAR`` MSRs. + It is usable if enabled by ``MSR_EFER.SCE``, and will ``#UD`` otherwise. + On Intel parts, ``SYSCALL`` is unusable outside of 64bit mode. + + * ``SYSENTER``, which enters CPL0 as configured by the ``SEP`` MSRs. It is + usable if enabled by ``MSR_SYSENTER_CS`` having a non-NUL selector, and + will ``#GP`` otherwise. On AMD parts, ``SYSENTER`` is unusable in Long + mode. + + +Xen's configuration +------------------- + +Xen maintains a complete IDT, with most gates configured with DPL0. This +causes most ``INT $N`` instructions to ``#GP``. This allows Xen to emulate +the instruction, referring to the guest kernels vDPL choice. + + * Vectors 3 ``#BP`` and 4 ``#OF`` are DPL3, in order to allow the ``INT3`` + and ``INTO`` instructions to function in userspace. + + * Vector 0x80 is DPL3 in order to implement the legacy system call fastpath + commonly found in UNIXes. + + * Vector 0x82 is DPL1 when PV32 is enabled, allowing the guest kernel to make + hypercalls to Xen. All other cases (PV32 guest userspace, and both PV64 + modes) operate in CPL3 and this vector behaves like all others to ``INT + $N`` instructions. + +A range of the GDT is guest-owned, allowing for call gates. During audit, Xen +forces all call gates to DPL0, causing their use to ``#GP`` allowing for +emulation. + +Xen enables ``SYSCALL`` in all cases as it is mandatory in 64bit mode, and +enables ``SYSENTER`` when available in 64bit mode. + +When Xen is using FRED delivery the hardware configuration is substantially +different, but the behaviour for guests remains as unchanged as possible. + + +PV Guest's configuration +------------------------ + +The PV ABI contains the "trap table", modelled very closely on the IDT. It is +manipulated by ``HYPERCALL_set_trap_table``, has 256 entries, each containing +a code segment selector, an address, and flags. A guest is expected to +configure handlers for all exceptions; failure to do so is terminal similar to +a Triple Fault. + +Part of the GDT is guest owned with descriptors audited by Xen. This range +can be manipulated with ``HYPERVISOR_set_gdt`` and +``HYPERVISOR_update_descriptor``. + +Other entrypoints are configured via ``HYPERVISOR_callback_op``. Of note here +are the callback types ``syscall``, ``syscall32`` (relevant for AMD parts) and +``sysenter`` (relevant for Intel parts). + +.. warning:: + + Prior to Xen 4.15, there was no check that the ``syscall`` or ``syscall32`` + callbacks had been registered before attempting to deliver via them. + Guests are strongly advised to ensure the entrypoints are registered before + running userspace. + + +Notes +----- + +``INT3`` vs ``INT $3`` and ``INTO`` vs ``INT $4`` are hard to distinguish +architecturally as both forms have a DPL check and use the same IDT vectors. +Because Xen configures both as DPL3, the ``INT $`` forms do not fault for +emulation, and are treated as if they were exceptions. This means the guest +can't block these instruction by trying to configure them with vDPL0. + +The instructions which trap into Xen (``INT $0x80``, ``SYSCALL``, +``SYSENTER``) but can be disabled by guest configuration need turning back +into faults for the guest kernel to process. + + * When using IDT delivery, instruction lengths are not provided by hardware + and Xen does not account for possible prefixes. ``%rip`` only gets rewound + by the length of the unprefixed instruction. This is observable, but not + expected to be an issue in practice. + + * When Xen is using FRED delivery, the full instruction length is provided by + hardware, and ``%rip`` is rewound fully. + +While both PV32 and PV64 guests are permitted to write Call Gates into the +GDT, emulation is only wired up for PV32. At the time of writing, the x86 +maintainers feel no specific need to fix this omission. -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243150.1543205 (Exim 4.92) (envelope-from ) id 1vw74q-0002Ys-4b; Fri, 27 Feb 2026 23:16:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243150.1543205; Fri, 27 Feb 2026 23:16:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74p-0002WH-Px; Fri, 27 Feb 2026 23:16:55 +0000 Received: by outflank-mailman (input) for mailman id 1243150; Fri, 27 Feb 2026 23:16:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74o-0008WD-45 for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:54 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 670b5881-1432-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 00:16:53 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-4398e850783so1818829f8f.0 for ; Fri, 27 Feb 2026 15:16:53 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:51 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 670b5881-1432-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234213; x=1772839013; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x/38gQJt4Duoysgo51k9uCF7ZRs4cy2MMdxCGTZF0sM=; b=GwO9z+1DaK9BHfSRVqY8Diu6eVJb4bJSYHwF8F5cOUbWPqQs1wN1++kMotfSrKBAl8 +eWXfnAeSgAFW5GXsipzHoFWtOdungSB+Y85070W6Q0NonZJEJfI32bUjSSsPx7ij2UP NOA1QMmhq1Za0WeUEBhFI96PJkcSD3LktowuQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234213; x=1772839013; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=x/38gQJt4Duoysgo51k9uCF7ZRs4cy2MMdxCGTZF0sM=; b=YxDvAZ7w5aKNTlES29maHt7pMKvVLeGnSMSQY6OifS2dj0TUEf298ncQdbgArykNrZ lU5FF/GSUTB2s7lGaBW4rdsqvLp+VJg8/Np4pzvoN+udem5dN8m4UpBa0KhBY8znVhzn HuiCxb4xKKcncKPEVMg89g4ewNrtnTyrm0wWhALnLeO3wMKHld0xUlG3sNNSXu2LAHAy Wuce0oROHYCZRr+i9feqo+Sj236B8S3eMV3GPe28N0Z8pE+oYq/MZUdYueupk6gggr6s hysC3Of69D7TmkEwGPxQS/qd2Bijw45LZc59r3XutGSnlA3bjadd+PEEBzNBHgPSCnYu M/2w== X-Gm-Message-State: AOJu0YyN05C3f0WS2jlsOyM/JZXfKYPl1A4v+7r4NmrK/4SvXWNpsEjJ NokQXvlrv9bCPoGLxflE11boSNWbsq9+Dn1OY0/HR44IkHXRXOdVrOW7c3OcfIyHGWVkB/k1tg8 qC4tM X-Gm-Gg: ATEYQzwxTcOMy3RAOZ141Knqh9zIAnYodc0jirAuUS9onALlU5hCYvYmbCFj7xVFZgl m0ATV0aDiU8qLhXXOWWsqXqFirhWmottTk9dPJBklSZ1gIuOuqiGSlfQciBNI4rNESHW3hTFk6Z YuCGx7b17o7i1d+97K9dey/Zm0wU/wAjh7jBaDj59wuaxMElxgVJyfborxDKM/5OUmeMEu8DgdL 7WmLU5cvTXA/vywBKFF/225gchmGtQDHCsStFRKAGxiYHngbQ6Vyke/GLU7B3L89AdibFij3lQ8 tatM4zxzlWuEDmKlgVSG73Xf6C6lvEfT8dGdeaQ9mt8flve3qmAgQO18fDX9q1g+8DOVGjFX8pB nK46ZLK1C/Q9dljwDMyv5GIoBBreZKixb9jqOujmqO2Wdp7mS1qbJ+w4K9vtTPhoW3hvuHXuXBp keoM0LyMZnZsfLa0Mi4HWun+sGpg7kmYsU8HYRgf3o9cfyQL8hxqtVbGO0MERlJ/gMaswR6xG4r yUHn2Kmvw== X-Received: by 2002:a5d:5703:0:b0:439:9203:595a with SMTP id ffacd0b85a97d-4399de2fd89mr5736542f8f.43.1772234212143; Fri, 27 Feb 2026 15:16:52 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 13/14] x86: Clamp reserved bits in eflags more aggressively Date: Fri, 27 Feb 2026 23:16:35 +0000 Message-Id: <20260227231636.3955109-14-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ERETU, unlike IRET, requires the sticky-1 bit (bit 2) be set, and reserved bits to be clear. Notably this means that dom0_construct() must set X86_EFLAGS_MBS in order for a PV dom0 to start. Xen has been overly lax with reserved bit handling. Adjust arch_set_info_guest*() and hypercall_iret() which consume flags to clamp the reserved bits for all guest types. This is a minor ABI change, but by the same argument as commit 9f892f84c279 ("x86/domctl: Stop using XLAT_cpu_user_regs()"); the reserved bits would get clamped like this naturally by hardware when the vCPU is run. This allows PV guests to start when Xen is using FRED mode. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné Still slightly RFC. Testing still in progress. v3: * Rewrite the commit message. v2: * New The handling of VM is complicated. It turns out that it's simply ignored by IRET in Long Mode (i.e. clearing it commit 0e47f92b0725 ("x86: force EFLAGS.IF on when exiting to PV guests") wasn't actually necessary) but ERETU does care. But, it's unclear how to handle this in in arch_set_info(). We must preserve it for HVM guests (which can use vm86 mode). PV32 has special handling but only in hypercall_iret(), not in arch_set_info(). --- xen/arch/x86/domain.c | 4 ++-- xen/arch/x86/hvm/domain.c | 4 ++-- xen/arch/x86/include/asm/x86-defns.h | 7 +++++++ xen/arch/x86/pv/dom0_build.c | 2 +- xen/arch/x86/pv/iret.c | 8 +++++--- 5 files changed, 17 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 9c1f6ef76d52..1372a65d8123 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1244,7 +1244,7 @@ int arch_set_info_guest( v->arch.user_regs.rax = c.nat->user_regs.rax; v->arch.user_regs.rip = c.nat->user_regs.rip; v->arch.user_regs.cs = c.nat->user_regs.cs; - v->arch.user_regs.rflags = c.nat->user_regs.rflags; + v->arch.user_regs.rflags = (c.nat->user_regs.rflags & X86_EFLAGS_ALL) | X86_EFLAGS_MBS; v->arch.user_regs.rsp = c.nat->user_regs.rsp; v->arch.user_regs.ss = c.nat->user_regs.ss; v->arch.pv.es = c.nat->user_regs.es; @@ -1268,7 +1268,7 @@ int arch_set_info_guest( v->arch.user_regs.eax = c.cmp->user_regs.eax; v->arch.user_regs.eip = c.cmp->user_regs.eip; v->arch.user_regs.cs = c.cmp->user_regs.cs; - v->arch.user_regs.eflags = c.cmp->user_regs.eflags; + v->arch.user_regs.eflags = (c.cmp->user_regs.eflags & X86_EFLAGS_ALL) | X86_EFLAGS_MBS; v->arch.user_regs.esp = c.cmp->user_regs.esp; v->arch.user_regs.ss = c.cmp->user_regs.ss; v->arch.pv.es = c.cmp->user_regs.es; diff --git a/xen/arch/x86/hvm/domain.c b/xen/arch/x86/hvm/domain.c index 155d61db13f8..a0e811ea47a0 100644 --- a/xen/arch/x86/hvm/domain.c +++ b/xen/arch/x86/hvm/domain.c @@ -194,7 +194,7 @@ int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context *ctx) uregs->rsi = regs->esi; uregs->rdi = regs->edi; uregs->rip = regs->eip; - uregs->rflags = regs->eflags; + uregs->rflags = (regs->eflags & X86_EFLAGS_ALL) | X86_EFLAGS_MBS; v->arch.hvm.guest_cr[0] = regs->cr0; v->arch.hvm.guest_cr[3] = regs->cr3; @@ -245,7 +245,7 @@ int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context *ctx) uregs->rsi = regs->rsi; uregs->rdi = regs->rdi; uregs->rip = regs->rip; - uregs->rflags = regs->rflags; + uregs->rflags = (regs->rflags & X86_EFLAGS_ALL) | X86_EFLAGS_MBS; v->arch.hvm.guest_cr[0] = regs->cr0; v->arch.hvm.guest_cr[3] = regs->cr3; diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h index 0a0ba83de786..edeb0b4ff95a 100644 --- a/xen/arch/x86/include/asm/x86-defns.h +++ b/xen/arch/x86/include/asm/x86-defns.h @@ -27,6 +27,13 @@ (X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF | \ X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF) +#define X86_EFLAGS_ALL \ + (X86_EFLAGS_ARITH_MASK | X86_EFLAGS_TF | X86_EFLAGS_IF | \ + X86_EFLAGS_DF | X86_EFLAGS_OF | X86_EFLAGS_IOPL | \ + X86_EFLAGS_NT | X86_EFLAGS_RF | X86_EFLAGS_VM | \ + X86_EFLAGS_AC | X86_EFLAGS_VIF | X86_EFLAGS_VIP | \ + X86_EFLAGS_ID) + /* * Intel CPU flags in CR0 */ diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 9a11a0a16b4e..075a3646c2a3 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -1024,7 +1024,7 @@ static int __init dom0_construct(const struct boot_domain *bd) regs->rip = parms.virt_entry; regs->rsp = vstack_end; regs->rsi = vstartinfo_start; - regs->eflags = X86_EFLAGS_IF; + regs->eflags = X86_EFLAGS_IF | X86_EFLAGS_MBS; /* * We don't call arch_set_info_guest(), so some initialisation needs doing diff --git a/xen/arch/x86/pv/iret.c b/xen/arch/x86/pv/iret.c index d3a1fb2c685b..39ce316b8d91 100644 --- a/xen/arch/x86/pv/iret.c +++ b/xen/arch/x86/pv/iret.c @@ -80,8 +80,9 @@ long do_iret(void) regs->rip = iret_saved.rip; regs->cs = iret_saved.cs | 3; /* force guest privilege */ - regs->rflags = ((iret_saved.rflags & ~(X86_EFLAGS_IOPL|X86_EFLAGS_VM)) - | X86_EFLAGS_IF); + regs->rflags = ((iret_saved.rflags & X86_EFLAGS_ALL & + ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM)) | + X86_EFLAGS_IF | X86_EFLAGS_MBS); regs->rsp = iret_saved.rsp; regs->ss = iret_saved.ss | 3; /* force guest privilege */ @@ -143,7 +144,8 @@ int compat_iret(void) if ( VM_ASSIST(v->domain, architectural_iopl) ) v->arch.pv.iopl = eflags & X86_EFLAGS_IOPL; - regs->eflags = (eflags & ~X86_EFLAGS_IOPL) | X86_EFLAGS_IF; + regs->eflags = ((eflags & X86_EFLAGS_ALL & ~X86_EFLAGS_IOPL) | + X86_EFLAGS_IF | X86_EFLAGS_MBS); if ( unlikely(eflags & X86_EFLAGS_VM) ) { -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243149.1543213 (Exim 4.92) (envelope-from ) id 1vw74r-0002eB-0y; Fri, 27 Feb 2026 23:16:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243149.1543213; Fri, 27 Feb 2026 23:16:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74q-0002cA-9b; Fri, 27 Feb 2026 23:16:56 +0000 Received: by outflank-mailman (input) for mailman id 1243149; Fri, 27 Feb 2026 23:16:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74o-0001Do-0q for xen-devel@lists.xenproject.org; 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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:49 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6538baf4-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234210; x=1772839010; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cuNoDLVINXiEv4BH5R0XrplZaA/DMViGBRkmV2Hoar0=; b=nhaxy+kRcF+C2+tZvjT2wr31Q5Iuvdv8PS4XJUT5OGRin0oFuxhadey1qXJzpv+C4C xMfxBD+v8B92zhDBYgigeXRcsJ3dAT4jRmwHAIvDkFoi7yCn1p0vu05hFka6kIqxCR7j ETs+hecEm/6ooGJhAz2UWbME53LWxTuDlphsc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234210; x=1772839010; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=cuNoDLVINXiEv4BH5R0XrplZaA/DMViGBRkmV2Hoar0=; b=uVI3IgOaPa9Hc1ismpVdG8u4U7qgnM2dU58onOWt8x9stuXSMcvYlNDg7cspntGKp0 tzQCZ2kFLFWt1gZtpJwXcDsGeQhYld3JF0N7nlshdBEdzRHUrSQ1eViC0ff5OKtPHEJX sKPucq6/t78ssO8kjkjJR0I6cUp7E0jV+9/T/AplMjZoInOmzCUJzRIbnLtXC+4cFPrm A4Czc/w0Oheq4sH6S9Bwr+1U2bRR1y/dxtWPEcgwZSFdt8kwka1XTx1gDo5XuTuQdTq/ WxoOd0Ew4CUzftG8TzPLYM0WzUmdk7NDTpNmwZhlgVNFs1NVRkDXXD/1gLeNPtXuLYXE OeWw== X-Gm-Message-State: AOJu0YzXZt5MQmqfn7l79LRwW+KxKRba9qyiYC+bTs8mcPSU24LlY10I yx/B0+Xv3UvbjutnH+Mp8jXzU031IZmPO5X+O/EhJvC+Hr/BpEodmZhmjViquyQYYdTLo4UPqL/ E1qCtdT2RYKhF X-Gm-Gg: ATEYQzxegyOx4HMVIQ1D540v8VOsOuSd6OEfXsIj11bBGFVGNVZHjf/5Z2bw/Db5eYA aEeDl8SR+o1uVD9mCbFRkwNjAKi4fhSqiN5M6n4ZF/tOPA+ZbHa3QOkJu2EeDfWF9tFajn/pRvQ M04NwNmK+rE2JlHzqeM+ox3lQRUJQRG24MnubQscaM2fPHmVsXTkL9KQbm2FV8pmpE4joBFZOul lry9ZcJtxhJwk6KWyu30aviksM/UKMRrTz0LmiQRu2bYc5vdFN5pHA5s7O009ncspt0XVMqlegr JbwDQcVgGUeAccWI/blq7v7Hk42RZmf4DV9ksFKrkyB0c8nM9O7Iq9osaovfXLv4/cJENT17rjO g+2UyyL5O5kaU4JVfxhhulD7wLunHYRK/5QQOoML0fkcwsRR5kL3ktQNCfrkkdMexlPtbSAVWyS huxl7Wq1HSmqilgOxNeIx7fwDsfZQzssRrP+7Yf/w4lhq+SrEWdIyaNPvdKqf8z1pISG/hmx97O qqlkuMnkA== X-Received: by 2002:a05:600c:c16e:b0:475:ddad:c3a9 with SMTP id 5b1f17b1804b1-483c99348c5mr75009455e9.13.1772234209589; Fri, 27 Feb 2026 15:16:49 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 09/14] x86/pv: Adjust GS handling for FRED mode Date: Fri, 27 Feb 2026 23:16:31 +0000 Message-Id: <20260227231636.3955109-10-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When FRED is active, hardware automatically swaps GS when changing privilege, and the SWAPGS instruction is disallowed. For native OSes using GS as the thread local pointer this is a massive improvement on the pre-FRED architecture, but under Xen it makes handling PV guests more complicated. Specifically, it means that GS_BASE and GS_SHADOW are the opposite way around in FRED mode, as opposed to IDT mode. This leads to the following changes: * In load_segments(), we have to load both GSes. Account for this in the SWAP() condition and avoid the path with SWAGS. * In save_segments(), we need to read GS_SHADOW rather than GS_BASE. * In toggle_guest_mode(), we need to emulate SWAPGS. * In {read,write}_msr() which access the live registers, GS_SHADOW and GS_BASE need swapping. * In do_set_segment_base(), merge the SEGBASE_GS_{USER,KERNEL} cases and take FRED into account when choosing which base to update. SEGBASE_GS_USER_SEL was already an LKGS invocation (decades before FRED) so under FRED needs to be just a MOV %gs. Simply skip the SWAPGSes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné v4: * Adjust GS accesses for emulated {RD,WR}MSR too. --- xen/arch/x86/domain.c | 16 +++++++++++----- xen/arch/x86/pv/domain.c | 22 ++++++++++++++++++++-- xen/arch/x86/pv/emul-priv-op.c | 24 +++++++++++++++--------- xen/arch/x86/pv/misc-hypercalls.c | 16 ++++++++++------ 4 files changed, 56 insertions(+), 22 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index e658c2d647b7..9c1f6ef76d52 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1791,9 +1791,10 @@ static void load_segments(struct vcpu *n) /* * Figure out which way around gsb/gss want to be. gsb needs to be - * the active context, and gss needs to be the inactive context. + * the active context, and gss needs to be the inactive context, + * unless we're in FRED mode where they're reversed. */ - if ( !(n->arch.flags & TF_kernel_mode) ) + if ( !(n->arch.flags & TF_kernel_mode) ^ opt_fred ) SWAP(gsb, gss); if ( using_svm() && (n->arch.pv.fs | n->arch.pv.gs) <= 3 ) @@ -1814,7 +1815,9 @@ static void load_segments(struct vcpu *n) if ( !fs_gs_done && !compat ) { - if ( read_cr4() & X86_CR4_FSGSBASE ) + unsigned long cr4 = read_cr4(); + + if ( !(cr4 & X86_CR4_FRED) && (cr4 & X86_CR4_FSGSBASE) ) { __wrgsbase(gss); __wrfsbase(n->arch.pv.fs_base); @@ -1931,6 +1934,9 @@ static void load_segments(struct vcpu *n) * Guests however cannot use SWAPGS, so there is no mechanism to modify the * inactive GS base behind Xen's back. Therefore, Xen's copy of the inactive * GS base is still accurate, and doesn't need reading back from hardware. + * + * Under FRED, hardware automatically swaps GS for us, so SHADOW_GS is the + * active GS from the guest's point of view. */ static void save_segments(struct vcpu *v) { @@ -1946,12 +1952,12 @@ static void save_segments(struct vcpu *v) if ( read_cr4() & X86_CR4_FSGSBASE ) { fs_base = __rdfsbase(); - gs_base = __rdgsbase(); + gs_base = opt_fred ? rdmsr(MSR_SHADOW_GS_BASE) : __rdgsbase(); } else { fs_base = rdmsr(MSR_FS_BASE); - gs_base = rdmsr(MSR_GS_BASE); + gs_base = opt_fred ? rdmsr(MSR_SHADOW_GS_BASE) : rdmsr(MSR_GS_BASE); } v->arch.pv.fs_base = fs_base; diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index d16583a7454d..b85abb5ed903 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -14,9 +14,10 @@ #include #include #include -#include #include #include +#include +#include #ifdef CONFIG_PV32 int8_t __read_mostly opt_pv32 = -1; @@ -514,11 +515,28 @@ void toggle_guest_mode(struct vcpu *v) * subsequent context switch won't bother re-reading it. */ gs_base = read_gs_base(); + + /* + * In FRED mode, not only are the two GSes the other way around (i.e. we + * want to read GS_SHADOW here), the SWAPGS instruction is disallowed so + * we have to emulate it. + */ + if ( opt_fred ) + { + unsigned long gs_shadow = rdmsr(MSR_SHADOW_GS_BASE); + + wrmsrns(MSR_SHADOW_GS_BASE, gs_base); + write_gs_base(gs_shadow); + + gs_base = gs_shadow; + } + else + asm volatile ( "swapgs" ); + if ( v->arch.flags & TF_kernel_mode ) v->arch.pv.gs_base_kernel = gs_base; else v->arch.pv.gs_base_user = gs_base; - asm volatile ( "swapgs" ); _toggle_guest_pt(v); diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 87d3bbcf901f..81153084129a 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -926,7 +927,7 @@ static int cf_check read_msr( case MSR_GS_BASE: if ( !cp->extd.lm ) break; - *val = read_gs_base(); + *val = opt_fred ? rdmsr(MSR_SHADOW_GS_BASE) : read_gs_base(); return X86EMUL_OKAY; case MSR_SHADOW_GS_BASE: @@ -1066,17 +1067,22 @@ static int cf_check write_msr( if ( !cp->extd.lm || !is_canonical_address(val) ) break; - if ( reg == MSR_FS_BASE ) - write_fs_base(val); - else if ( reg == MSR_GS_BASE ) - write_gs_base(val); - else if ( reg == MSR_SHADOW_GS_BASE ) + switch ( reg ) { - write_gs_shadow(val); + case MSR_FS_BASE: + write_fs_base(val); + break; + + case MSR_SHADOW_GS_BASE: curr->arch.pv.gs_base_user = val; + fallthrough; + case MSR_GS_BASE: + if ( (reg == MSR_GS_BASE) ^ opt_fred ) + write_gs_base(val); + else + write_gs_shadow(val); + break; } - else - ASSERT_UNREACHABLE(); return X86EMUL_OKAY; case MSR_EFER: diff --git a/xen/arch/x86/pv/misc-hypercalls.c b/xen/arch/x86/pv/misc-hypercalls.c index 4c2abeb4add8..2c9cf50638db 100644 --- a/xen/arch/x86/pv/misc-hypercalls.c +++ b/xen/arch/x86/pv/misc-hypercalls.c @@ -11,6 +11,7 @@ #include #include +#include long do_set_debugreg(int reg, unsigned long value) { @@ -192,11 +193,12 @@ long do_set_segment_base(unsigned int which, unsigned long base) case SEGBASE_GS_USER: v->arch.pv.gs_base_user = base; - write_gs_shadow(base); - break; - + fallthrough; case SEGBASE_GS_KERNEL: - write_gs_base(base); + if ( (which == SEGBASE_GS_KERNEL) ^ opt_fred ) + write_gs_base(base); + else + write_gs_shadow(base); break; } break; @@ -209,7 +211,8 @@ long do_set_segment_base(unsigned int which, unsigned long base) * We wish to update the user %gs from the GDT/LDT. Currently, the * guest kernel's GS_BASE is in context. */ - asm volatile ( "swapgs" ); + if ( !opt_fred ) + asm volatile ( "swapgs" ); if ( sel > 3 ) /* Fix up RPL for non-NUL selectors. */ @@ -247,7 +250,8 @@ long do_set_segment_base(unsigned int which, unsigned long base) /* Update the cache of the inactive base, as read from the GDT/LDT. */ v->arch.pv.gs_base_user = read_gs_base(); - asm volatile ( safe_swapgs ); + if ( !opt_fred ) + asm volatile ( safe_swapgs ); break; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243151.1543219 (Exim 4.92) (envelope-from ) id 1vw74r-0002rE-Sr; Fri, 27 Feb 2026 23:16:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243151.1543219; Fri, 27 Feb 2026 23:16:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74r-0002ok-A5; Fri, 27 Feb 2026 23:16:57 +0000 Received: by outflank-mailman (input) for mailman id 1243151; Fri, 27 Feb 2026 23:16:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74p-0001Do-0s for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:55 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 65a17652-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:51 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-4398d9a12c6so2002729f8f.2 for ; Fri, 27 Feb 2026 15:16:51 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:49 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 65a17652-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234210; x=1772839010; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IPkD49jGeQX0+NTjYasufq4vkWv8Wa7wJQ5GOxuUBzw=; b=aWu0v+aKBSi+ZKXTbUAIbhqLiQ3t0UCag3SY/IXNU8JtgkdzoJIrQ60VGwJb9cv4Y4 jNGvfp2rCW7wSHNUZy3zh3kDtFHniQVLflFDdMPuqlR4IRkD2OQJX3rR/25hji2Yr8HH VuPEQ7C6rHI5+6XRZF9iwNbB4CWl99pMP+7y8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234210; x=1772839010; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=IPkD49jGeQX0+NTjYasufq4vkWv8Wa7wJQ5GOxuUBzw=; b=DdWnCDvVvP4AqNzRXCvmgu0RjdtbedXT+uxnK61aVSi9EDuCwNfkBsgDWQ4Vcwko49 xwMSpOstGei/PHJf3MFw9W2upjdGZ+sNsAQk4rh7CnqLKupX75CqsoAhnEOHxOpGkgOX ddq/UDaizVe57NPvgGQxav1UFkWJ0pd8Ys2PB0ddmk/x8uDTuz37FymzbxcyPMreON6A ekJ9BcEk14xtQ6f17AYzFMHurBy/GchNZf9lKE7PgF/v1ObU126ndDvhd3KeqNMAqTWD JqOzLffncvpIa/J4wsVLsLVVQqARTK4gs1tSxN10sECeeCgOCR60X7XjvUHz2uuzHfZz 63vA== X-Gm-Message-State: AOJu0Yynw/kQWYsK7Gl9vJD84x3w0caPwULE5E+XnTFTR8JB4EaySAv4 oeIifRzWvhN0xnR5cXv0IGhvQ83fwdGX8zMaSmX5PJ09dyR/k6cavq26iOzcfMyeRYpNn8FjcDu rBGxP2XccOA== X-Gm-Gg: ATEYQzwLpygoeAfajVlmhzf9oEj32veKnLugd0DsSSkyl+XViBax4otbgprtdLRlHlv e1il92qsxUkEZ0jvQkPNWGWwkp7uXKp/WfvLRgjw68mj60YUlX8DXRourpImchy6ITOvimnvd79 +X9F5L7LKCL2QulJqnKjX+7PoZzC30h0Y4gbGJ3OP+f9EHl0I3PS+aeYp8j1CpYyycst19XIttL EumeAkxACZMWjf3iF8akKhdggWsYxv261LEgmXnq3EOrtb5y3wzilNEhT/BAQPjPn4VXlADKy5X GaC6zhylzoN2GHUUZ13EIYDYARmyO6C+cFiU0EQEo296G16TQa7xeLtuQrNMk0i4ui0GR/qOdc4 iWhfv2RJkYNt7XQ10YJvl8KfliWzwPzFnaQjXMVakXSmfr3vv+U1r+BCIs74URBXCUy4YjqISdn 3yAkuBG23jG3jY4ViUIaqAwz0aDJdwiQi+cZ7NYVQ1gRbL3LadQRIR58ae6qXPIHi62ocJ1fo= X-Received: by 2002:a05:6000:4301:b0:439:8487:73b2 with SMTP id ffacd0b85a97d-4399ddf1330mr8136464f8f.14.1772234210254; Fri, 27 Feb 2026 15:16:50 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 10/14] x86/pv: Guest exception handling in FRED mode Date: Fri, 27 Feb 2026 23:16:32 +0000 Message-Id: <20260227231636.3955109-11-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Under FRED, entry_from_pv() handles everything. To start with, implement exception handling in the same manner as entry_from_xen(), although we can unconditionally enable interrupts after the async/fatal events. After entry_from_pv() returns, test_all_events() needs to run to perform exception and interrupt injection. Split entry_FRED_R3() into two and introduce eretu_exit_to_guest() as the latter half, coming unilaterally from restore_all_guest(). For all of this, there is a slightly complicated relationship with CONFIG_PV. entry_FRED_R3() must exist irrespective of CONFIG_PV, because it's the entrypoint registered with hardware. For simplicity, entry_from_pv() is always called, but it collapses into fatal_trap() in the !PV case. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné v4: * Treat nested events as fatal. v3: * Adjust comments. * Group CP with others. It's definitely wrong for perf, but that's out the window anyway now that we're letting a compiler make the decision tree. v2: * New --- xen/arch/x86/traps.c | 78 +++++++++++++++++++++++++++++++- xen/arch/x86/x86_64/entry-fred.S | 13 +++++- xen/arch/x86/x86_64/entry.S | 4 +- 3 files changed, 92 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 48667c71d591..7563576fb477 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -2266,9 +2266,85 @@ void asmlinkage check_ist_exit(const struct cpu_user_regs *regs, bool ist_exit) void asmlinkage entry_from_pv(struct cpu_user_regs *regs) { + struct fred_info *fi = cpu_regs_fred_info(regs); + uint8_t type = regs->fred_ss.type; + uint8_t vec = regs->fred_ss.vector; + /* Copy fred_ss.vector into entry_vector as IDT delivery would have done. */ - regs->entry_vector = regs->fred_ss.vector; + regs->entry_vector = vec; + + if ( !IS_ENABLED(CONFIG_PV) ) + goto fatal; + + /* + * First, handle the asynchronous or fatal events. These are either + * unrelated to the interrupted context, or may not have valid context + * recorded, and all have special rules on how/whether to re-enable IRQs. + */ + if ( regs->fred_ss.nested ) + goto fatal; + + switch ( type ) + { + case X86_ET_EXT_INTR: + return do_IRQ(regs); + + case X86_ET_NMI: + return do_nmi(regs); + + case X86_ET_HW_EXC: + switch ( vec ) + { + case X86_EXC_DF: return do_double_fault(regs); + case X86_EXC_MC: return do_machine_check(regs); + } + break; + } + /* + * With the asynchronous events handled, what remains are the synchronous + * ones. PV guest context always had interrupts enabled. + */ + local_irq_enable(); + + switch ( type ) + { + case X86_ET_HW_EXC: + case X86_ET_PRIV_SW_EXC: + case X86_ET_SW_EXC: + switch ( vec ) + { + case X86_EXC_PF: handle_PF(regs, fi->edata); break; + case X86_EXC_GP: do_general_protection(regs); break; + case X86_EXC_UD: do_invalid_op(regs); break; + case X86_EXC_NM: do_device_not_available(regs); break; + case X86_EXC_BP: do_int3(regs); break; + case X86_EXC_DB: handle_DB(regs, fi->edata); break; + case X86_EXC_CP: do_entry_CP(regs); break; + + case X86_EXC_DE: + case X86_EXC_OF: + case X86_EXC_BR: + case X86_EXC_NP: + case X86_EXC_SS: + case X86_EXC_MF: + case X86_EXC_AC: + case X86_EXC_XM: + do_trap(regs); + break; + + default: + goto fatal; + } + break; + + default: + goto fatal; + } + + return; + + fatal: fatal_trap(regs, false); } diff --git a/xen/arch/x86/x86_64/entry-fred.S b/xen/arch/x86/x86_64/entry-fred.S index 3c3320df22cb..a1ff9a4a9747 100644 --- a/xen/arch/x86/x86_64/entry-fred.S +++ b/xen/arch/x86/x86_64/entry-fred.S @@ -15,9 +15,20 @@ FUNC(entry_FRED_R3, 4096) mov %rsp, %rdi call entry_from_pv +#ifdef CONFIG_PV + GET_STACK_END(14) + movq STACK_CPUINFO_FIELD(current_vcpu)(%r14), %rbx + + jmp test_all_events +#else + BUG /* Not Reached */ +#endif +END(entry_FRED_R3) + +FUNC(eretu_exit_to_guest) POP_GPRS eretu -END(entry_FRED_R3) +END(eretu_exit_to_guest) /* The Ring0 entrypoint is at Ring3 + 0x100. */ .org entry_FRED_R3 + 0x100, 0xcc diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 8b83082413a5..17ca6a493906 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -63,7 +63,7 @@ UNLIKELY_END(syscall_no_callback) /* Conditionally clear DF */ and %esi, UREGS_eflags(%rsp) /* %rbx: struct vcpu */ -test_all_events: +LABEL(test_all_events, 0) ASSERT_NOT_IN_ATOMIC cli # tests must not race interrupts /*test_softirqs:*/ @@ -152,6 +152,8 @@ END(switch_to_kernel) FUNC_LOCAL(restore_all_guest) ASSERT_INTERRUPTS_DISABLED + ALTERNATIVE "", "jmp eretu_exit_to_guest", X86_FEATURE_XEN_FRED + /* Stash guest SPEC_CTRL value while we can read struct vcpu. */ mov VCPU_arch_msrs(%rbx), %rdx mov VCPUMSR_spec_ctrl_raw(%rdx), %r15d -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:16:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:16:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243152.1543228 (Exim 4.92) (envelope-from ) id 1vw74t-00035m-1p; Fri, 27 Feb 2026 23:16:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243152.1543228; Fri, 27 Feb 2026 23:16:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74s-00032V-Bp; Fri, 27 Feb 2026 23:16:58 +0000 Received: by outflank-mailman (input) for mailman id 1243152; Fri, 27 Feb 2026 23:16:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74q-0001Do-1B for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:56 +0000 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [2a00:1450:4864:20::442]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 66064ac5-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:51 +0100 (CET) Received: by mail-wr1-x442.google.com with SMTP id ffacd0b85a97d-4398f9e3b40so2692986f8f.1 for ; Fri, 27 Feb 2026 15:16:51 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:50 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 66064ac5-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234211; x=1772839011; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+mPsNS3LpQ9n9lXMqkSeJXydtadjNiDxPpSog7A2Jaw=; b=PdjhBNUzXeKG5TFAcbNR1UbXPQwTxr46q7dh0n8XrILY8ncoEHcMbnPBtV741sLYe9 ZKmSRnSaJJ8aiFeIbSu3KUZ1iYE77MuDnUe0dGd39rgPt/A1rvMR2ZKCGHyxoANjDs6s caPxN4Mjd3Dl/fYLkltU2he5mEWdeiuDqONVk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234211; x=1772839011; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=+mPsNS3LpQ9n9lXMqkSeJXydtadjNiDxPpSog7A2Jaw=; b=C4PDdfQAWDkpMVNe7Azk0b+WMjaiCRJhmgW1TL1dpb4EA70EFCJYxu46PRi+ZO7MZg 3jBtA6xVOnHb5XbTfpaTZzH/IQWtloOFjEExRyqM7Tk7PANC3M0pSJHIz5oKCnfRfU/G Um4PsD1mgKZbN1ZPaXyR1PlEyX4Q0wY0Q8u69/3gAQtZA/j5AP0IJf5xu4JZ8l1+Gh9A 44B7Df7ocwiClV+xl3fpnUUL/VHBhPp1pWVO5dKgPAPVtQg8bRIEcxoBl0lPIAcvCbrY 6CFhH6tM9NQKe+CvB+DJPBR8StLq6pvHsnFMHou1hYMkpsYA4XRUL+F0FMPvybCfeTuS 6saw== X-Gm-Message-State: AOJu0YzewyUad9XglwYsYOC3n2s/dj2OVEzcrmaEXqJweM+gONO1hoxS 47QC3Nyoy7AQxM+X8uId3fBSEntTgkkweBdsDGbjP9jQhJTkcb0xn8MXMyDAyBHvjUnLaqknQzO 6bTx8uh2OK5jf X-Gm-Gg: ATEYQzyI0CRFEDiPMAKVs96VXZqbxgex+bPLPjlCTUgSplaBcBRisSA+Bp7sVVZSnos 8S4aFXcSvcXyL6Y3TjrRoq28VhfKSTgVGFN0oL+TbkhX7s0ZdODBgp1GcvLBdnRhnrLAGWjUBQN QOMtV4Qr94w9l+JfefHxKylj/qqZF2vfyIrcZ6S++5TAK49QbnMOOqk0HKywPZ0G+FLM+ohjzRq lLYBOCkUTkYY2KuYjeUnZU2rOeNTbtxFe5jalw0XnolH9UWmf3DzhNfUR5zWrWJU0hdIaIcsxi1 gCZG9RY5naUcppdtsoccdW3+6+nF4MPsUT0tPWxzkXAXBc6DfMpbga8yeqQoXGXwwSYIlDgjx/0 DUgHpebFKKLjjDWWaNMNITBT67Ix9XIhVNQYY+VxS4dW+yAPO8Do8RUOOytRmNx4hb6uzu4Uprc 7vudvUAUjvSyKstyc3CvM+TIARdKPqygRmKJxZQnhC4fR/OjeHgeQ9Yvs0qeYjp26afQ0xJvQ= X-Received: by 2002:a05:6000:144c:b0:430:f3ab:56af with SMTP id ffacd0b85a97d-4399de4a662mr8040445f8f.48.1772234210832; Fri, 27 Feb 2026 15:16:50 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 11/14] x86/pv: ERETU error handling Date: Fri, 27 Feb 2026 23:16:33 +0000 Message-Id: <20260227231636.3955109-12-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ERETU can fault for guest reasons, and like IRET needs special handling to forward the error into the guest. As this is largely written in C, take the opportunity to better classify the sources of error, and in particilar, not forward errors that are actually Xen's fault into the guest, opting for a domain crash instead. Because ERETU does not enable NMIs if it faults, a corner case exists if an NMI was taken while in guest context, and the ERETU back out faults. Recovery must involve an ERETS with the interrupted context's NMI flag. See the comments for full details. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné v4: * Tweak comments. v2: * New --- xen/arch/x86/traps.c | 115 +++++++++++++++++++++++++++++++ xen/arch/x86/x86_64/entry-fred.S | 13 ++++ 2 files changed, 128 insertions(+) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 7563576fb477..2f40f628cbff 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -2348,6 +2348,113 @@ void asmlinkage entry_from_pv(struct cpu_user_regs *regs) fatal_trap(regs, false); } +void nocall eretu_error_dom_crash(void); + +/* + * Classify an event at the ERETU instruction, and handle if possible. + * Returns @true if handled, @false if the event should continue down the + * normal handlers. + */ +static bool handle_eretu_event(struct cpu_user_regs *regs) +{ + unsigned long recover; + + /* + * WARNING: The GPRs in gregs overlaps with regs. Only gregs->error_code + * and later are legitimate to access. + */ + struct cpu_user_regs *gregs = + _p(regs->rsp - offsetof(struct cpu_user_regs, error_code)); + + /* + * The asynchronous or fatal events (INTR, NMI, #MC, #DF) have been dealt + * with, meaning we only have synchronous ones to consider. Anything + * which isn't a hardware exception (e.g. #BP) wants handling normally. + */ + if ( regs->fred_ss.type != X86_ET_HW_EXC ) + return false; + + /* + * Guests are permitted to write non-present GDT/LDT entries. Therefore + * #NP[sel] (%cs) and #SS[sel] (%ss) must be handled as guest errors. The + * only other source of #SS is for a bad %ss-relative memory access in + * Xen, and if the stack is that bad, we'll have escalated to #DF. + * + * #PF can happen from ERETU accessing the GDT/LDT. Xen may translate + * these into #GP for the guest, so must be handled as guest errors. In + * theory we can get #PF for a bad instruction fetch or bad stack access, + * but either of these will be fatal and not end up here. + */ + switch ( regs->fred_ss.vector ) + { + case X86_EXC_GP: + /* + * #GP[0] can occur because of a NULL %cs or %ss (which are a guest + * error), but some #GP[0]'s are errors in Xen (ERETU at SL != 0), or + * errors of Xen's handling of guest state (bad metadata). + * + * These magic numbers came from the FRED Spec; they check that ERETU + * is trying to return to Ring 3, and that reserved or inapplicable + * bits are 0. + */ + if ( regs->error_code == 0 && (gregs->cs & ~3) && (gregs->ss & ~3) && + (regs->fred_cs.sl != 0 || + (gregs->csx & 0xffffffffffff0003UL) != 3 || + (gregs->rflags & 0xffffffffffc2b02aUL) != 2 || + (gregs->ssx & 0xfff80003UL) != 3) ) + { + recover = (unsigned long)eretu_error_dom_crash; + + if ( regs->fred_cs.sl ) + gprintk(XENLOG_ERR, "ERETU at SL %u\n", regs->fred_cs.sl); + else + gprintk(XENLOG_ERR, "Bad return state: csx %#lx, rflags %#lx, ssx %#x\n", + gregs->csx, gregs->rflags, (unsigned int)gregs->ssx); + break; + } + fallthrough; + case X86_EXC_NP: + case X86_EXC_SS: + case X86_EXC_PF: + recover = (unsigned long)entry_FRED_R3; + break; + + /* + * Handle everything else normally. e.g. #DB would be debugging + * activities in Xen. In theory we can get #UD if CR4.FRED gets + * cleared, but in practice if that were the case we wouldn't be here + * handling the result. + */ + default: + return false; + } + + this_cpu(last_extable_addr) = regs->rip; + + /* + * If an NMI was taken in guest context and the ERETU faulted, NMIs will + * still be blocked. Therefore we copy the interrupted frame's NMI status + * into our own, and must ERETS as part of recovery. + */ + regs->fred_ss.nmi = gregs->fred_ss.nmi; + + /* + * Next, copy the exception information from the current frame back onto + * the interrupted frame, preserving the interrupted frame's %cs and %ss. + */ + *cpu_regs_fred_info(regs) = *cpu_regs_fred_info(gregs); + gregs->ssx = (regs->ssx & ~0xffff) | gregs->ss; + gregs->csx = (regs->csx & ~0xffff) | gregs->cs; + gregs->error_code = regs->error_code; + gregs->entry_vector = regs->entry_vector; + + fixup_exception_return(regs, recover, 0); + + return true; +} + +void nocall eretu(void); + void asmlinkage entry_from_xen(struct cpu_user_regs *regs) { struct fred_info *fi = cpu_regs_fred_info(regs); @@ -2389,6 +2496,14 @@ void asmlinkage entry_from_xen(struct cpu_user_regs *regs) if ( regs->eflags & X86_EFLAGS_IF ) local_irq_enable(); + /* + * An event taken at the ERETU instruction may be because of bad guest + * state. If so, it will need special handling. + */ + if ( unlikely(regs->rip == (unsigned long)eretu) && + handle_eretu_event(regs) ) + return; + switch ( type ) { case X86_ET_HW_EXC: diff --git a/xen/arch/x86/x86_64/entry-fred.S b/xen/arch/x86/x86_64/entry-fred.S index a1ff9a4a9747..2fa57beb930c 100644 --- a/xen/arch/x86/x86_64/entry-fred.S +++ b/xen/arch/x86/x86_64/entry-fred.S @@ -27,9 +27,22 @@ END(entry_FRED_R3) FUNC(eretu_exit_to_guest) POP_GPRS + + /* + * Exceptions here are handled by redirecting either to + * entry_FRED_R3() (for an error to be passed to the guest), or to + * eretu_error_dom_crash() (for a Xen error handling guest state). + */ +LABEL(eretu, 0) eretu END(eretu_exit_to_guest) +FUNC(eretu_error_dom_crash) + PUSH_AND_CLEAR_GPRS + sti + call asm_domain_crash_synchronous /* Does not return */ +END(eretu_error_dom_crash) + /* The Ring0 entrypoint is at Ring3 + 0x100. */ .org entry_FRED_R3 + 0x100, 0xcc -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:17:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:17:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243153.1543235 (Exim 4.92) (envelope-from ) id 1vw74t-0003EC-UW; Fri, 27 Feb 2026 23:16:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243153.1543235; Fri, 27 Feb 2026 23:16:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74t-0003AJ-1i; Fri, 27 Feb 2026 23:16:59 +0000 Received: by outflank-mailman (input) for mailman id 1243153; Fri, 27 Feb 2026 23:16:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74r-0001Do-1S for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:57 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 666569d4-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:52 +0100 (CET) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-43991cc3155so2439113f8f.0 for ; Fri, 27 Feb 2026 15:16:52 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:51 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 666569d4-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234212; x=1772839012; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XGrbegNxX52Qprjc9LHURGzyjTJEjBVjNc2DvWM4rPE=; b=cfR24MA2ZraMNZhxpjRXI0EIbZ8NDwIT124BCWEKOOxIpVODXNVfm7sqWxnY215+SB c9eTPTVUImIkeuhweszpCcqS3M9Xw1mC7mzexbtADsS31Fjb+cXZJ4OeEG7rmNpT3SUX uBRZsySD3IPaexCOHGFdiX0OrEEdQEFmYh/ds= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234212; x=1772839012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XGrbegNxX52Qprjc9LHURGzyjTJEjBVjNc2DvWM4rPE=; b=TyGAYADbd++/NH1gXaEmYlw7vAUL2z/WxPH/tNVxnPjnFnL9qyrBCe7ejbjbKOIUk2 ekpCy8pakF0Xoy3YSIOHfgSOekoDlNVzXyycbtDkf2q4ldzhXHiH+obqzbQQipZud4Kf ssOeqe4zxo7Pexosf0poovHUv4hQdkQa0LQ4YmXqr6qcw6sz6P4+X5XXrdkjhiYRY7J/ qumSZkgJSO68ru0/jayaoNisvk6PJYV7DR8fFQNpXhG9P5tfo1shKl5KpqSylr/zgDgx /sMtyJ98qe+MISByUcOAPRBKGIiONIeSh0CHA977jI0Z+5zRxbvRIpDV9hr75zzDxmgu yl0g== X-Gm-Message-State: AOJu0YxIIe/ytVrI9jSYpvy/iDPrQ6J/E+bFIgxu2Jdrvaxmv2ZPb61Y jmTp7v+dDPXpbhYYuZVOkXyKIde0HR3mFFdEEqy56lnjSc0CW5tz6DfzFmorq2LX6gBFDy8gxli Pe/azSH3Y0w== X-Gm-Gg: ATEYQzyPiaMOoCLw84T75GywpbfjHVYkFwjH6Irtf4gIH3NOzv27anX6qR5zPi62HbC HTdYDnRAIfDLZMGRTu3GgSeKLa+H46OLCAZsA1hHSNP1n0QfVo0h7BZdkVs6EpS7CkrYK2HIi+y 9jQSlKNpoyvUeQR84YEoiNxdu0AesfS0F1PI+/AzRofCkvw7alhi+puYwKRsvlToBO7BB/nK6Fi QcyGNSBrMLuP9+OnRAafsQdJFOZV8WLaVstiNHpQ8vSCmFnWjvQMBR732P/MOfDUEntimTUSl5N UBmzh88iINf2bJXOwpj8kakfar2j41Di5ti6Sok4XoMjsR+Nmnl2VPQrh5v570j4KWkvlXRj0ME awTQaJ1C944J8pDPoeGc6ehBhIukGsH5SSQ8gopQIuYzy2sNTnQAsUOCNo007nq0w7TqaKsAxhX EkyzI8rXMtRXFoxL4LM/ZOOmyB75rW6JGrzq9PpbOwsY4Ig9MfnJLxps3cx1qxRtDKRNV6XOM= X-Received: by 2002:a05:6000:2482:b0:439:852f:c9e0 with SMTP id ffacd0b85a97d-4399de21f73mr7666076f8f.47.1772234211529; Fri, 27 Feb 2026 15:16:51 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 12/14] x86/pv: System call handling in FRED mode Date: Fri, 27 Feb 2026 23:16:34 +0000 Message-Id: <20260227231636.3955109-13-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Under FRED, entry_from_pv() handles everything, even system call instructions. This means more of our logic is written in C now, rather than assembly. In order to facilitate this, introduce pv_inject_callback(), which reuses struct trap_bounce infrastructure to inject the syscall/sysenter callbacks. This in turns requires some !PV compatibility for pv_inject_callback() and pv_hypercall() which can both be ASSERT_UNREACHABLE(). For each of INT $N, SYSCALL and SYSENTER, FRED gives us interrupted context which was previously lost. As the guest can't see FRED, Xen has to lose state in the same way to maintain the prior behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné v3: * Simplify DCE handling. * Add ASSERT_UNREACHABLE() to pv_inject_callback(). * Adjust comment for X86_ET_SW_INT v2: * New --- xen/arch/x86/include/asm/domain.h | 2 + xen/arch/x86/include/asm/hypercall.h | 2 - xen/arch/x86/pv/traps.c | 39 ++++++++ xen/arch/x86/traps.c | 131 +++++++++++++++++++++++++++ 4 files changed, 172 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 94b0cf7f1d95..ad7f6adb2cb9 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -725,6 +725,8 @@ void arch_vcpu_regs_init(struct vcpu *v); struct vcpu_hvm_context; int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context *ctx); +void pv_inject_callback(unsigned int type); + #ifdef CONFIG_PV void pv_inject_event(const struct x86_event *event); #else diff --git a/xen/arch/x86/include/asm/hypercall.h b/xen/arch/x86/include/asm/hypercall.h index bf2f0e169aef..d042a61d1702 100644 --- a/xen/arch/x86/include/asm/hypercall.h +++ b/xen/arch/x86/include/asm/hypercall.h @@ -18,9 +18,7 @@ #define __HYPERVISOR_paging_domctl_cont __HYPERVISOR_arch_1 -#ifdef CONFIG_PV void pv_hypercall(struct cpu_user_regs *regs); -#endif void pv_ring1_init_hypercall_page(void *p); void pv_ring3_init_hypercall_page(void *p); diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index b0395b99145a..c863ab9d372a 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -20,6 +20,8 @@ #include #include +#include + void pv_inject_event(const struct x86_event *event) { struct vcpu *curr = current; @@ -96,6 +98,43 @@ void pv_inject_event(const struct x86_event *event) } } +void pv_inject_callback(unsigned int type) +{ + struct vcpu *curr = current; + struct trap_bounce *tb = &curr->arch.pv.trap_bounce; + unsigned long rip; + bool irq; + + ASSERT(is_pv_64bit_vcpu(curr)); + + switch ( type ) + { + case CALLBACKTYPE_syscall: + rip = curr->arch.pv.syscall_callback_eip; + irq = curr->arch.pv.vgc_flags & VGCF_syscall_disables_events; + break; + + case CALLBACKTYPE_syscall32: + rip = curr->arch.pv.syscall32_callback_eip; + irq = curr->arch.pv.syscall32_disables_events; + break; + + case CALLBACKTYPE_sysenter: + rip = curr->arch.pv.sysenter_callback_eip; + irq = curr->arch.pv.sysenter_disables_events; + break; + + default: + ASSERT_UNREACHABLE(); + rip = 0; + irq = false; + break; + } + + tb->flags = TBF_EXCEPTION | (irq ? TBF_INTERRUPT : 0); + tb->eip = rip; +} + /* * Called from asm to set up the MCE trapbounce info. * Returns false no callback is set up, else true. diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 2f40f628cbff..e2c35a046e6b 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -51,6 +52,8 @@ #include #include +#include + /* * opt_nmi: one of 'ignore', 'dom0', or 'fatal'. * fatal: Xen prints diagnostic message and then hangs. @@ -2267,6 +2270,7 @@ void asmlinkage check_ist_exit(const struct cpu_user_regs *regs, bool ist_exit) void asmlinkage entry_from_pv(struct cpu_user_regs *regs) { struct fred_info *fi = cpu_regs_fred_info(regs); + struct vcpu *curr = current; uint8_t type = regs->fred_ss.type; uint8_t vec = regs->fred_ss.vector; @@ -2309,6 +2313,38 @@ void asmlinkage entry_from_pv(struct cpu_user_regs *regs) switch ( type ) { + case X86_ET_SW_INT: + /* + * For better or worse, Xen writes IDT vectors 3 and 4 with DPL3 (so + * INT3/INTO work), making INT $3/4 indistinguishable, and the guest + * choice of DPL for these vectors is ignored. + * + * Have them fall through into X86_ET_HW_EXC, as #BP in particular + * needs handling by do_int3() in case an external debugger is + * attached. + * + * As the event type is provided, INT $N instructions don't need #GP + * tricks to spot, and INT $0x80 doesn't need a fastpath. As the + * guest is necessary PV64, INT $0x82 has no special meaning either. + * + * When converting to a fault, hardware finally gives us enough + * information to account for prefixes, so provide the more correct + * behaviour rather than assuming the instruction was two bytes long. + */ + if ( vec != X86_EXC_BP && vec != X86_EXC_OF ) + { + const struct trap_info *ti = &curr->arch.pv.trap_ctxt[vec]; + + if ( permit_softint(TI_GET_DPL(ti), curr, regs) ) + pv_inject_sw_interrupt(vec); + else + { + regs->rip -= regs->fred_ss.insnlen; + pv_inject_hw_exception(X86_EXC_GP, (vec << 3) | X86_XEC_IDT); + } + break; + } + fallthrough; case X86_ET_HW_EXC: case X86_ET_PRIV_SW_EXC: case X86_ET_SW_EXC: @@ -2338,6 +2374,101 @@ void asmlinkage entry_from_pv(struct cpu_user_regs *regs) } break; + case X86_ET_OTHER: + switch ( regs->fred_ss.vector ) + { + case 1: /* SYSCALL */ + { + /* + * FRED delivery preserves the interrupted %cs/%ss, but previously + * SYSCALL lost the interrupted selectors, and SYSRET forced the + * use of the ones in MSR_STAR. + * + * The guest isn't aware of FRED, so recreate the legacy + * behaviour. + * + * The non-FRED SYSCALL path sets TRAP_syscall in entry_vector to + * signal that SYSRET can be used, but this isn't relevant in FRED + * mode. + * + * When setting the selectors, clear all upper metadata again for + * backwards compatibility. In particular fred_ss.swint becomes + * pend_DB on ERETx, and nothing else in the pv_hypercall() would + * clean up. + * + * When converting to a fault, hardware finally gives us enough + * information to account for prefixes, so provide the more + * correct behaviour rather than assuming the instruction was two + * bytes long. + */ + bool l = regs->fred_ss.l; + unsigned int len = regs->fred_ss.insnlen; + + regs->ssx = l ? FLAT_KERNEL_SS : FLAT_USER_SS32; + regs->csx = l ? FLAT_KERNEL_CS64 : FLAT_USER_CS32; + + if ( guest_kernel_mode(curr, regs) ) + pv_hypercall(regs); + else if ( (l ? curr->arch.pv.syscall_callback_eip + : curr->arch.pv.syscall32_callback_eip) == 0 ) + { + regs->rip -= len; + pv_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); + } + else + { + /* + * The PV ABI, given no virtual SYSCALL_MASK, hardcodes that + * DF is cleared. Other flags are handled in the same way as + * interrupts and exceptions in create_bounce_frame(). + */ + regs->eflags &= ~X86_EFLAGS_DF; + pv_inject_callback(l ? CALLBACKTYPE_syscall + : CALLBACKTYPE_syscall32); + } + break; + } + + case 2: /* SYSENTER */ + { + /* + * FRED delivery preserves the interrupted state, but previously + * SYSENTER discarded almost everything. + * + * The guest isn't aware of FRED, so recreate the legacy + * behaviour. + * + * When setting the selectors, clear all upper metadata. In + * particular fred_ss.swint becomes pend_DB on ERETx. + * + * When converting to a fault, hardware finally gives us enough + * information to account for prefixes, so provide the more + * correct behaviour rather than assuming the instruction was two + * bytes long. + */ + unsigned int len = regs->fred_ss.insnlen; + + regs->ssx = FLAT_USER_SS; + regs->rsp = 0; + regs->eflags &= ~(X86_EFLAGS_VM | X86_EFLAGS_IF); + regs->csx = 3; + regs->rip = 0; + + if ( !curr->arch.pv.sysenter_callback_eip ) + { + regs->rip -= len; + pv_inject_hw_exception(X86_EXC_GP, 0); + } + else + pv_inject_callback(CALLBACKTYPE_sysenter); + break; + } + + default: + goto fatal; + } + break; + default: goto fatal; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Feb 27 23:17:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 27 Feb 2026 23:17:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243232.1543260 (Exim 4.92) (envelope-from ) id 1vw75N-0007S2-Tm; Fri, 27 Feb 2026 23:17:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243232.1543260; Fri, 27 Feb 2026 23:17:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw75N-0007Qw-R3; Fri, 27 Feb 2026 23:17:29 +0000 Received: by outflank-mailman (input) for mailman id 1243232; Fri, 27 Feb 2026 23:17:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw74t-0001Do-21 for xen-devel@lists.xenproject.org; Fri, 27 Feb 2026 23:16:59 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68457e39-1432-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 00:16:55 +0100 (CET) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-4398f8e2837so2228203f8f.1 for ; Fri, 27 Feb 2026 15:16:55 -0800 (PST) Received: from localhost.localdomain (host-92-22-18-152.as13285.net. [92.22.18.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4399c70e8e8sm9680306f8f.10.2026.02.27.15.16.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 15:16:52 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68457e39-1432-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1772234215; x=1772839015; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=15zWx1qA8rFF4HWlAuchK/hb06gvUooknaZohCqKUPM=; b=gA5HPosuZY0sgr9RKW7vL/IlCwdrJsKS0i2R5ajdi7HQaaTgB5jVqb1PYgC5P1Rq+T ZAHEHOXzouLrhKkjPhAdWcDJ5CLk8u1QXGKuJJEnGn1f/GAFVdLcd3brameTli/IJ6rW C/oyhcPeLzHWSkrbP+8YcnNuVOm8mYuqg1+mM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772234215; x=1772839015; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=15zWx1qA8rFF4HWlAuchK/hb06gvUooknaZohCqKUPM=; b=gPkz2llYAEJtMs8F3OCQtis6W9CC767+rD0yoxQ1ciLcoYObdsFpCGMx+1IqpEx0O0 Luk84Alkoau1rBBxRk0YtRU44JIIm4Nnfj2EyA3U/RAUeRLDKHqU9zjPHYI0jJYslveO uw5pWhuDFY0tAf53q0zrQQKiyWIuxR0MOo+DwVgDHCXn6cxiOYIEE9mXeKm4TyUgHxLJ X8WWdxSOW6BWUA23OYsrUqk/JERcHXK/QBGCMqig2yRhfZvK608g8/1DLhhohRMHxc3j d6Hy2fVf33nnCxtH7Y4ysIxIqDUCs5jugz79L+Bf7+JM0c7Y1Nei3JsSAYpxo4azm61s B8VQ== X-Gm-Message-State: AOJu0YzM3uzxaAEnSyJR1Of4Im9hzqd2bkMpaY1UeKe8oT4OSiLyw1DX hCRsH1a2roj5b/jVGFvHOyWmJxL9Y8JLwHfXyACVlFkWK8vKLFC6VUTNtZ/wNO/Y9CNx0H3bPoO e6XYr X-Gm-Gg: ATEYQzw+p6xljYYIBunjpviBiMAkoh8JYTGzNyTZ+2hqDn5gIcHEgz9i2cl/bb+gelQ grbgK+KI0s6hJ9CaPEJAlVD7x8bXHtCbX3kOHaiyDVEBBHhW2Pfnw4/9pJDzpvAWPISSM0S3s9U R73vvDhrRXtAVPs9H2pDWKC49nbmbKT2fZQ7FgNXh6JxmthFU/AdJLS73U2aNcwaUprhUGZqSqi paycop1BDkNc+FBEQwo35Z6pXQdUDsmxgs0skAvV5Rf2nJCHOArHM7ARlGo9eKVGnEou8981lXW fBAHHEvQSN2rYS427Sn2xVxIa+P3/9GbiTIc3Jbtmj/Y+d5252cmHXvNohuYuY4wO6KZFZ/TG3E yDJqNxfcQlb8fjwDJG4yxDKaxYIHRWwshD5pbAHHzsqRJrdcI4ItKFUw3Ea48xJYWRyVG2osKtw PjuiRrLqELhDO3ytfSy6IjaKdXM6aDsfhJaK0IdyVmbQEh4igasXYtp/HxmQQmFoRN6rtQezU= X-Received: by 2002:a05:6000:603:b0:432:a9db:f9a2 with SMTP id ffacd0b85a97d-4399de2b52amr8236751f8f.41.1772234214125; Fri, 27 Feb 2026 15:16:54 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 14/14] x86/traps: Use fatal_trap() for #UD and #GP Date: Fri, 27 Feb 2026 23:16:36 +0000 Message-Id: <20260227231636.3955109-15-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260227231636.3955109-1-andrew.cooper3@citrix.com> References: <20260227231636.3955109-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This renders the diagnostics in a more uniform way. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v4: * New PF and CP are more complicated and not converted yet. --- xen/arch/x86/traps.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index e2c35a046e6b..c04ab484ad27 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1375,8 +1375,7 @@ void asmlinkage do_invalid_op(struct cpu_user_regs *regs) if ( likely(extable_fixup(regs, true)) ) return; - show_execution_state(regs); - panic("FATAL TRAP: vector = %d (invalid opcode)\n", X86_EXC_UD); + fatal_trap(regs, false); } void asmlinkage do_int3(struct cpu_user_regs *regs) @@ -1475,8 +1474,7 @@ void do_general_protection(struct cpu_user_regs *regs) return; hardware_gp: - show_execution_state(regs); - panic("GENERAL PROTECTION FAULT\n[error_code=%04x]\n", regs->error_code); + fatal_trap(regs, false); } #ifdef CONFIG_PV -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Sat Feb 28 01:43:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 28 Feb 2026 01:43:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243318.1543271 (Exim 4.92) (envelope-from ) id 1vw9MD-0002Zi-Mv; Sat, 28 Feb 2026 01:43:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243318.1543271; Sat, 28 Feb 2026 01:43:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw9MD-0002Za-IC; Sat, 28 Feb 2026 01:43:01 +0000 Received: by outflank-mailman (input) for mailman id 1243318; Sat, 28 Feb 2026 01:43:01 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw9MC-0002ZU-VA for xen-devel@lists.xenproject.org; Sat, 28 Feb 2026 01:43:01 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cc8b8db3-1446-11f1-b164-2bf370ae4941; Sat, 28 Feb 2026 02:42:54 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 0D4EE6057A; Sat, 28 Feb 2026 01:42:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BBB0C19422; Sat, 28 Feb 2026 01:42:51 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cc8b8db3-1446-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772242972; bh=QWxFQqcImv7PUWhFYJ4t2rsrZuzrFQJtZYWOFWoYlkA=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=HzNwHMkKDmvkEKzfVwUOT9nofbGoTNeAvpcERivYdV9Dihn/yLCcBz720zGa7AetO iwXxy0jxIvC0hfmhaRl7fgF1wJ9UmZZtMEf/Nb3Lcr7v20KDANnC2VcxQ1rkcv1jg9 OK0Iw8IYUk8Y9ntsOL9KUfYM6GaaSOTC095J1IhYGaslwyaKkcEHw3OEoHl9lKnVOE sYGdPUX+o10NABlIPEYktCLwUAY8+FhLSGEAM0mMmfWCcAS8e2bRJ2IjPykZLM6emB XW/YpMYrXavR0NbnuQfdhTIJFkeEgvPQkgwsoHBl+cdXA9tm09AxLiIxu5Ab9Rbppy YQ7O75FQW1t3A== Date: Fri, 27 Feb 2026 17:42:47 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Oleksii Kurochko , Stefano Stabellini , Romain Caritey , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header In-Reply-To: <74060a96-110f-4d6f-bbad-361021315884@suse.com> Message-ID: References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> <5eb4ba3b-f7b6-4cfb-ab67-60198c3f8572@gmail.com> <0c0061ab-acdb-4ceb-92e2-ca4e591ee741@suse.com> <74060a96-110f-4d6f-bbad-361021315884@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 18 Feb 2026, Jan Beulich wrote: > On 18.02.2026 15:38, Oleksii Kurochko wrote: > > On 2/18/26 2:12 PM, Jan Beulich wrote: > >> On 18.02.2026 13:58, Oleksii Kurochko wrote: > >>> On 2/17/26 8:34 AM, Jan Beulich wrote: > >>>> On 16.02.2026 19:42, Stefano Stabellini wrote: > >>>>> On Mon, 16 Feb 2026, Jan Beulich wrote: > >>>>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: > >>>>>>> domain_use_host_layout() is generic enough to be moved to the > >>>>>>> common header xen/domain.h. > >>>>>> Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... > >>>>>> > >>>>>>> --- a/xen/include/xen/domain.h > >>>>>>> +++ b/xen/include/xen/domain.h > >>>>>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); > >>>>>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) > >>>>>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) > >>>>>>> > >>>>>>> +/* > >>>>>>> + * Is the domain using the host memory layout? > >>>>>>> + * > >>>>>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. > >>>>>>> + * To avoid any trouble finding space, it is easier to force using the > >>>>>>> + * host memory layout. > >>>>>>> + * > >>>>>>> + * The hardware domain will use the host layout regardless of > >>>>>>> + * direct-mapped because some OS may rely on a specific address ranges > >>>>>>> + * for the devices. > >>>>>>> + */ > >>>>>>> +#ifndef domain_use_host_layout > >>>>>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ > >>>>>>> + is_hardware_domain(d)) > >>>>>> ... is_domain_direct_mapped() isn't something that I'd like to see further > >>>>>> proliferate in common (non-DT) code. > >>>>> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware > >>>>> domain) on x86 as well. In fact, we already have a working prototype, > >>>>> although it is not suitable for upstream yet. > >>>>> > >>>>> In addition to the PSP use case that we discussed a few months ago, > >>>>> where the PSP is not behind an IOMMU and therefore exchanged addresses > >>>>> must be 1:1 mapped, we also have a new use case. We are running the full > >>>>> Xen-based automotive stack on an Azure instance where SVM (vmentry and > >>>>> vmexit) is available, but an IOMMU is not present. All virtual machines > >>>>> are configured as PVH. > >>>> Hmm. Then adjustments need making, for commentary and macro to be correct > >>>> on x86. First and foremost none of what is there is true for PV. > >>> As is_domain_direct_mapped() returns always false for x86, so > >>> domain_use_host_layout macro will return incorrect value for non-hardware > >>> domains (dom0?). And as PV domains are not auto_translated domains so are > >>> always direct-mapped, so technically is_domain_direct_mapped() (or > >>> domain_use_host_layout()) should return true in such case. > >> Hmm? PV domains aren't direct-mapped. Direct-map was introduced by Arm for > >> some special purpose (absence of IOMMU iirc). > > > > I made such conclusion because of the comments in the code mentioned below: > > - https://elixir.bootlin.com/xen/v4.21.0/source/tools/libs/guest/xg_dom_x86.c#L1880 > > - https://elixir.bootlin.com/xen/v4.21.0/source/xen/include/public/features.h#L107 > > > > Also, in the comment where it is introduced (d66bf122c0a "xen: introduce XENFEAT_direct_mapped and XENFEAT_not_direct_mapped") > > is mentioned that: > > XENFEAT_direct_mapped is always set for not auto-translated guests. > > Hmm, this you're right with, and XENVER_get_features handling indeed has > > if ( !paging_mode_translate(d) || is_domain_direct_mapped(d) ) > fi.submap |= (1U << XENFEAT_direct_mapped); > > Which now I have a vague recollection of not having been happy with back at > the time. Based solely on the GFN == MFN statement this may be correct, but > "GFN" is a questionable term for PV in the first place. See how e.g. > common/memory.c resorts to using GPFN and GMFN, in line with commentary in > public/memory.h. > > What the above demonstrates quite well though is that there's no direct > relationship between XENFEAT_direct_mapped and is_domain_direct_mapped(). Let's start from the easy case: domain_use_host_layout. domain_use_host_layout is meant to indicate whether the domain memory map (e.g. the address of the interrupt controller, the start of RAM, etc.) matches the host memory map or not. It is implemented as: #define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ is_hardware_domain(d)) Because on ARM there are two cases: 1) hardware domain is always using the host layout 2) non-hardware domain only use the host layout when directly mapped (more on the later) I think this can be generalized and made arch-neutral with the caveat that it should return False for PV guests as Jan mentioned. After all the virtual interrupt controller in a PV domain doesn't start at the same guest physical address of the real interrupt controller. The comment can be improved, but let's get to it after we talk about is_domain_direct_mapped. is_domain_direct_mapped is meant to indicate that a domain's memory is allocated 1:1 such that GFN == MFN. is_domain_direct_mapped is easily applicable as-is to PVH and HVM guests where there are two stages of translation. What about PV guests? One could take the stance that given that there are no real GFN space, then GFN is always the same as MFN. But this is more philosophical than practical. Practically, is_domain_direct_mapped() triggers a different code path in xen/common/memory.c:populate_physmap for contiguous 1:1 memory allocations which is probably undesirable for PV guests. Practically, there is a related flag exposed to Linux XENFEAT_direct_mapped. For HVM/PVH guests makes sense to be one and the same as is_domain_direct_mapped(). This flag is used by Linux to know whether it can use swiotlb-xen or not. Specifically, swiotlb-xen is only usable when XENFEAT_direct_mapped is enabled for ARM guests and the principle could apply to HVM/PVH guests too. What about PV guests? They also make use of swiotlb-xen and XENFEAT_direct_mapped is set to True for PV guests today. In conclusion, is_domain_direct_mapped() was born for autotranslated guests and is meant to trigger large contigous memory allocations is Xen and permit the usage of swiotlb-xen in Linux. For PV guests, while we want swiotlb-xen and the XENFEAT_direct_mapped flag is already set to True, we don't want to change the memory allocation scheme. So I think is_domain_direct_mapped() should be always False on x86: - PV guests should be always False - PVH/HVM guests could be True but it is currently unimplemented (AMD is working on an implementation) For compatibility and functionality, XENFEAT_direct_mapped should be left as is. The implementation of domain_use_host_layout() can be moved to common code with a change: /* * Is the auto-translated domain using the host memory layout? * * domain_use_host_layout() is always False for PV guests. * * Direct-mapped domains (autotranslated domains with memory allocated * contiguously and mapped 1:1 so that GFN == MFN) are always using the * host memory layout to avoid address clashes. * * The hardware domain will use the host layout (regardless of * direct-mapped) because some OS may rely on a specific address ranges * for the devices. PV Dom0, like any other PV guests, has * domain_use_host_layout() returning False. */ #define domain_use_host_layout(d) (is_domain_direct_mapped(d) || (paging_mode_translate(d) && is_hardware_domain(d))) From xen-devel-bounces@lists.xenproject.org Sat Feb 28 01:59:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 28 Feb 2026 01:59:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1243328.1543281 (Exim 4.92) (envelope-from ) id 1vw9cP-0004U7-W4; Sat, 28 Feb 2026 01:59:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1243328.1543281; Sat, 28 Feb 2026 01:59:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw9cP-0004U0-TO; Sat, 28 Feb 2026 01:59:45 +0000 Received: by outflank-mailman (input) for mailman id 1243328; Sat, 28 Feb 2026 01:59:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vw9cP-0004Tp-Ag for xen-devel@lists.xenproject.org; Sat, 28 Feb 2026 01:59:45 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [2600:3c04:e001:324:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 25255df6-1449-11f1-9ccf-f158ae23cfc8; Sat, 28 Feb 2026 02:59:42 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id D3E9260141; Sat, 28 Feb 2026 01:59:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1048EC116C6; Sat, 28 Feb 2026 01:59:38 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 25255df6-1449-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772243980; bh=aR6yunxln3OqrIoTNoSl965jqC5RqFB7fmoeTW9Ykik=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=lWN46iuN3j2a3Y4zPJucCCHBvSmonC638hBiJhfxfOTNIb+FZfqtfa60jnOIDtYY3 1MOqB/1AfJSyIP1eTrBQ43kAWoD+D92gOEUno4YYTVeC7VnarE4hBfPh1os5BIWVeN JizGJ7fnxC9hrOSTDR06a/jsMnBFq6QCKFoVfTC1iC+6MVF3pdnJGLbBZ469yTSxUD TbIaEZOMBhdA7AhjDfW24Q0nFpeWZ4HGGB57cFL6mPfs42WqPWJi2wAB/c1sgpwXgT RdPVzqAgMuku40SlBZUJOQFUkH6UWDMiHBWLmc0YMIfKYlxWgAvyGqPPf86WMwCPqQ d+xcD27uamgdA== Date: Fri, 27 Feb 2026 17:59:37 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Stefano Stabellini cc: Jan Beulich , Oleksii Kurochko , Romain Caritey , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 5/6] xen: move domain_use_host_layout() to common header In-Reply-To: Message-ID: References: <678eb53c56bc4f6147feb0bbb6c1319197d0f0df.1770821989.git.oleksii.kurochko@gmail.com> <522a71ce-05da-4a66-956e-5581f0c49e0e@suse.com> <5eb4ba3b-f7b6-4cfb-ab67-60198c3f8572@gmail.com> <0c0061ab-acdb-4ceb-92e2-ca4e591ee741@suse.com> <74060a96-110f-4d6f-bbad-361021315884@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Fri, 27 Feb 2026, Stefano Stabellini wrote: > On Wed, 18 Feb 2026, Jan Beulich wrote: > > On 18.02.2026 15:38, Oleksii Kurochko wrote: > > > On 2/18/26 2:12 PM, Jan Beulich wrote: > > >> On 18.02.2026 13:58, Oleksii Kurochko wrote: > > >>> On 2/17/26 8:34 AM, Jan Beulich wrote: > > >>>> On 16.02.2026 19:42, Stefano Stabellini wrote: > > >>>>> On Mon, 16 Feb 2026, Jan Beulich wrote: > > >>>>>> On 12.02.2026 17:21, Oleksii Kurochko wrote: > > >>>>>>> domain_use_host_layout() is generic enough to be moved to the > > >>>>>>> common header xen/domain.h. > > >>>>>> Maybe, but then something DT-specific, not xen/domain.h. Specifically, ... > > >>>>>> > > >>>>>>> --- a/xen/include/xen/domain.h > > >>>>>>> +++ b/xen/include/xen/domain.h > > >>>>>>> @@ -62,6 +62,22 @@ void domid_free(domid_t domid); > > >>>>>>> #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) > > >>>>>>> #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) > > >>>>>>> > > >>>>>>> +/* > > >>>>>>> + * Is the domain using the host memory layout? > > >>>>>>> + * > > >>>>>>> + * Direct-mapped domain will always have the RAM mapped with GFN == MFN. > > >>>>>>> + * To avoid any trouble finding space, it is easier to force using the > > >>>>>>> + * host memory layout. > > >>>>>>> + * > > >>>>>>> + * The hardware domain will use the host layout regardless of > > >>>>>>> + * direct-mapped because some OS may rely on a specific address ranges > > >>>>>>> + * for the devices. > > >>>>>>> + */ > > >>>>>>> +#ifndef domain_use_host_layout > > >>>>>>> +# define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ > > >>>>>>> + is_hardware_domain(d)) > > >>>>>> ... is_domain_direct_mapped() isn't something that I'd like to see further > > >>>>>> proliferate in common (non-DT) code. > > >>>>> Hi Jan, we have a requirement for 1:1 mapped Dom0 (I should say hardware > > >>>>> domain) on x86 as well. In fact, we already have a working prototype, > > >>>>> although it is not suitable for upstream yet. > > >>>>> > > >>>>> In addition to the PSP use case that we discussed a few months ago, > > >>>>> where the PSP is not behind an IOMMU and therefore exchanged addresses > > >>>>> must be 1:1 mapped, we also have a new use case. We are running the full > > >>>>> Xen-based automotive stack on an Azure instance where SVM (vmentry and > > >>>>> vmexit) is available, but an IOMMU is not present. All virtual machines > > >>>>> are configured as PVH. > > >>>> Hmm. Then adjustments need making, for commentary and macro to be correct > > >>>> on x86. First and foremost none of what is there is true for PV. > > >>> As is_domain_direct_mapped() returns always false for x86, so > > >>> domain_use_host_layout macro will return incorrect value for non-hardware > > >>> domains (dom0?). And as PV domains are not auto_translated domains so are > > >>> always direct-mapped, so technically is_domain_direct_mapped() (or > > >>> domain_use_host_layout()) should return true in such case. > > >> Hmm? PV domains aren't direct-mapped. Direct-map was introduced by Arm for > > >> some special purpose (absence of IOMMU iirc). > > > > > > I made such conclusion because of the comments in the code mentioned below: > > > - https://elixir.bootlin.com/xen/v4.21.0/source/tools/libs/guest/xg_dom_x86.c#L1880 > > > - https://elixir.bootlin.com/xen/v4.21.0/source/xen/include/public/features.h#L107 > > > > > > Also, in the comment where it is introduced (d66bf122c0a "xen: introduce XENFEAT_direct_mapped and XENFEAT_not_direct_mapped") > > > is mentioned that: > > > XENFEAT_direct_mapped is always set for not auto-translated guests. > > > > Hmm, this you're right with, and XENVER_get_features handling indeed has > > > > if ( !paging_mode_translate(d) || is_domain_direct_mapped(d) ) > > fi.submap |= (1U << XENFEAT_direct_mapped); > > > > Which now I have a vague recollection of not having been happy with back at > > the time. Based solely on the GFN == MFN statement this may be correct, but > > "GFN" is a questionable term for PV in the first place. See how e.g. > > common/memory.c resorts to using GPFN and GMFN, in line with commentary in > > public/memory.h. > > > > What the above demonstrates quite well though is that there's no direct > > relationship between XENFEAT_direct_mapped and is_domain_direct_mapped(). > > Let's start from the easy case: domain_use_host_layout. > > domain_use_host_layout is meant to indicate whether the domain memory > map (e.g. the address of the interrupt controller, the start of RAM, > etc.) matches the host memory map or not. > > It is implemented as: > > #define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ > is_hardware_domain(d)) > > Because on ARM there are two cases: > 1) hardware domain is always using the host layout > 2) non-hardware domain only use the host layout when directly mapped > (more on the later) > > > I think this can be generalized and made arch-neutral with the caveat > that it should return False for PV guests as Jan mentioned. After all > the virtual interrupt controller in a PV domain doesn't start at the > same guest physical address of the real interrupt controller. The > comment can be improved, but let's get to it after we talk about > is_domain_direct_mapped. > > > is_domain_direct_mapped is meant to indicate that a domain's memory is > allocated 1:1 such that GFN == MFN. is_domain_direct_mapped is easily > applicable as-is to PVH and HVM guests where there are two stages of > translation. > > What about PV guests? One could take the stance that given that there > are no real GFN space, then GFN is always the same as MFN. But this is > more philosophical than practical. > > Practically, is_domain_direct_mapped() triggers a different code path in > xen/common/memory.c:populate_physmap for contiguous 1:1 memory > allocations which is probably undesirable for PV guests. > > Practically, there is a related flag exposed to Linux > XENFEAT_direct_mapped. For HVM/PVH guests makes sense to be one and the > same as is_domain_direct_mapped(). This flag is used by Linux to know > whether it can use swiotlb-xen or not. Specifically, swiotlb-xen is only > usable when XENFEAT_direct_mapped is enabled for ARM guests and the > principle could apply to HVM/PVH guests too. What about PV guests? > They also make use of swiotlb-xen and XENFEAT_direct_mapped is set to > True for PV guests today. > > > In conclusion, is_domain_direct_mapped() was born for autotranslated > guests and is meant to trigger large contigous memory allocations is Xen > and permit the usage of swiotlb-xen in Linux. For PV guests, while we > want swiotlb-xen and the XENFEAT_direct_mapped flag is already set to > True, we don't want to change the memory allocation scheme. > > So I think is_domain_direct_mapped() should be always False on x86: > - PV guests should be always False > - PVH/HVM guests could be True but it is currently unimplemented (AMD > is working on an implementation) > > For compatibility and functionality, XENFEAT_direct_mapped should be > left as is. > > The implementation of domain_use_host_layout() can be moved to common > code with a change: > > > /* > * Is the auto-translated domain using the host memory layout? > * > * domain_use_host_layout() is always False for PV guests. > * > * Direct-mapped domains (autotranslated domains with memory allocated > * contiguously and mapped 1:1 so that GFN == MFN) are always using the > * host memory layout to avoid address clashes. > * > * The hardware domain will use the host layout (regardless of > * direct-mapped) because some OS may rely on a specific address ranges > * for the devices. PV Dom0, like any other PV guests, has > * domain_use_host_layout() returning False. > */ > #define domain_use_host_layout(d) (is_domain_direct_mapped(d) || > (paging_mode_translate(d) && > is_hardware_domain(d))) I'll add one thing. While I think it is clear that XENFEAT_direct_mapped should remain as is and that is_domain_direct_mapped() should be always False for PV guests, given that domain_use_host_layout is not currently used on x86 it is debatable how it should be implemented. For PVH/HVM, domain_use_host_layout() can easily be aligned with ARM. For PV DomUs, it will return false and there is no issue. For PV Dom0, I would argue it should return False because the concept of "host memory layout" is about the address of virtual platform devices (interrupt controller, UART, etc.) in the guest physical address space. PV guests don't have virtual devices mapped at specific guest physical addresses, they use hypercalls. But I can see it could be argued either way, when you take into consideration EFI/ACPI tables. For now, domain_use_host_layout() is unused on x86, so it doesn't make a difference.