[Minios-devel] [PATCH 19/40] arm64: define the CALLEE_SAVED_REGISTERS

[Huang Shijie <shijie.huang@xxxxxxx>]

In the arm64, the callee-saved registers are x19 ~ x29, and sp.

This patch also moves the macro to os.h for arm32.

Change-Id: I875ee0eb65ab918870636e518b1b50b0209c67cd
Jira: ENTOS-247
Signed-off-by: Huang Shijie <shijie.huang@xxxxxxx>
---
 arch/arm/sched.c       | 4 +---
 include/arm/arm32/os.h | 3 +++
 include/arm/arm64/os.h | 3 +++
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/sched.c b/arch/arm/sched.c
index 8091566..d1af379 100644
--- a/arch/arm/sched.c
+++ b/arch/arm/sched.c
@@ -1,12 +1,10 @@
 #include <mini-os/sched.h>
 #include <mini-os/xmalloc.h>
 #include <mini-os/console.h>
+#include <mini-os/os.h>
 
 void arm_start_thread(void);
 
-/* The AAPCS requires the callee (e.g. __arch_switch_threads) to preserve 
r4-r11. */
-#define CALLEE_SAVED_REGISTERS 8
-
 /* Architecture specific setup of thread creation */
 struct thread* arch_create_thread(char *name, void (*function)(void *),
                                   void *data)
diff --git a/include/arm/arm32/os.h b/include/arm/arm32/os.h
index 6da604f..5b089b4 100644
--- a/include/arm/arm32/os.h
+++ b/include/arm/arm32/os.h
@@ -26,4 +26,7 @@ static inline void local_irq_enable(void) {
 #define rmb() __asm__("dsb":::"memory");
 #define wmb() __asm__("dsb":::"memory");
 
+/* The AAPCS requires the callee (e.g. __arch_switch_threads) to preserve 
r4-r11. */
+#define CALLEE_SAVED_REGISTERS 8
+
 #endif
diff --git a/include/arm/arm64/os.h b/include/arm/arm64/os.h
index cb2ab14..9c36a2c 100644
--- a/include/arm/arm64/os.h
+++ b/include/arm/arm64/os.h
@@ -32,4 +32,7 @@ static inline void local_irq_enable(void)
 #define wmb()           dmb(st) /* Full system memory barrier store */
 #define rmb()           dmb(ld) /* Full system memory barrier load */
 
+/* The Callee-saved registers : x19 ~ x29, and SP */
+#define CALLEE_SAVED_REGISTERS 12
+
 #endif
-- 
2.7.4


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