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[Minios-devel] [UNIKRAFT PATCH 01/17] plat/common: Common x86 CPU definitions


  • To: minios-devel@xxxxxxxxxxxxx
  • From: Costin Lupu <costin.lupu@xxxxxxxxx>
  • Date: Wed, 4 Apr 2018 16:53:52 +0300
  • Cc: simon.kuenzer@xxxxxxxxx
  • Delivery-date: Wed, 04 Apr 2018 13:54:24 +0000
  • Ironport-phdr: 9a23:lC0nAR9KJSpuR/9uRHKM819IXTAuvvDOBiVQ1KB31+4cTK2v8tzYMVDF4r011RmVBd6ds6oMotGVmpioYXYH75eFvSJKW713fDhBt/8rmRc9CtWOE0zxIa2iRSU7GMNfSA0tpCnjYgBaF8nkelLdvGC54yIMFRXjLwp1Ifn+FpLPg8it2O2+55Pebx9UiDahfLh/MAi4oQLNu8cMnIBsMLwxyhzHontJf+RZ22ZlLk+Nkhj/+8m94odt/zxftPw9+cFAV776f7kjQrxDEDsmKWE169b1uhTFUACC+2ETUmQSkhpPHgjF8BT3VYr/vyfmquZw3jSRMMvrRr42RDui9b9mRh/2hikaOTA382bZhc5+jK9AvB6tuwZyz5LObY2JKPZzeL7Wc9MARWpGW8ZcTzJMAoSnb4sTDuoBO/tToY/gp1sWsBu1GA6hC//oyj9Tmn/23Ks63/4lEQHbxAwgAskDv2jPrNnvLKcSTPu6wLPSzTXEdv5b3yr25obPchAku/6MXLRwfNLPxkkpCwPFlFWRpI3qMj+PzeQCqG6W5PdjW+K3k2Mrtg58riW1ysovioTFnJwZxk7G+Cljzos5PcC0RUFmbdK+E5ZdtzuWO5V4T84sWW1kpSk3xqMAtJWmZiYF0o4nyATaa/GfdoiI5Q/sW/iJLDdjgXJlZKq/hxGv8Ui80uH8Vte70FJNriddjNnMs2oC1x3X6sSdVvR95V2t2S6S1w/I8O1EO0c0mbLaK54n3LEwioIevVnMEyPrgkn7j6+bel869uS26enreLvrqoeZN4BuiwH+Nqoumta4AeQ9KgUBQ2+b+f+g1L3i+031WrFKjuAukqnEq53VOd8bqrShAw9IyYkv8Qy/DzC+3NQCgXYHNE5FeA6Aj4XxPlHOIfb4Dfa4g1S3iTtk2u7JPqP/DZXJNXXDlLbhfa1h605H0gYyws5Q55ROBrEGOvLzVVf7tMbEAR8hLwy03+HnBc1m1oMfXGKPBamZPLnRsV+V+O0vJeiNa5EPuDvmLfgq+eLhjXsjllAGZ6Wmw4YXOziEGaFjIkOYZmGpjtofHGMiugslUPesmFCEFzlJaCWcRaU5sxo8E56nC8/nW5iwyOiK2zynH5sQYn1eF3iHCjHwao/CQfBaO3HaGdNojjFRDevpcIQmzxz77AI=
  • List-id: Mini-os development list <minios-devel.lists.xenproject.org>

Introducing new header for x86 CPU register layouts.

Signed-off-by: Costin Lupu <costin.lupu@xxxxxxxxx>
---
 plat/common/include/x86/cpu_defs.h         | 76 ++++++++++++++++++++++++++++++
 plat/kvm/Makefile.uk                       |  2 +
 plat/kvm/include/kvm-x86/cpu_x86_64_defs.h | 46 +-----------------
 plat/kvm/x86/entry64.S                     |  2 +-
 plat/xen/Makefile.uk                       |  2 +
 plat/xen/include/xen-x86/os.h              |  9 +---
 6 files changed, 83 insertions(+), 54 deletions(-)
 create mode 100644 plat/common/include/x86/cpu_defs.h

diff --git a/plat/common/include/x86/cpu_defs.h 
b/plat/common/include/x86/cpu_defs.h
new file mode 100644
index 0000000..9ecec96
--- /dev/null
+++ b/plat/common/include/x86/cpu_defs.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Costin Lupu <costin.lupu@xxxxxxxxx>
+ *
+ * Copyright (c) 2018, NEC Europe Ltd., NEC Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+#ifndef __PLAT_CMN_X86_CPU_DEFS_H__
+#define __PLAT_CMN_X86_CPU_DEFS_H__
+
+/* EFLAGS register */
+#define X86_EFLAGS_CF           (1 <<  0)   /* carry flag                */
+#define X86_EFLAGS_PF           (1 <<  2)   /* parity flag               */
+#define X86_EFLAGS_AF           (1 <<  4)   /* auxiliary flag            */
+#define X86_EFLAGS_ZF           (1 <<  6)   /* zero flag                 */
+#define X86_EFLAGS_SF           (1 <<  7)   /* sign flag                 */
+#define X86_EFLAGS_TF           (1 <<  8)   /* trap flag                 */
+#define X86_EFLAGS_IF           (1 <<  9)   /* interrupt flag            */
+#define X86_EFLAGS_DF           (1 << 10)   /* direction flag            */
+#define X86_EFLAGS_OF           (1 << 11)   /* overflow flag             */
+#define X86_EFLAGS_NT           (1 << 14)   /* nested task flag          */
+#define X86_EFLAGS_RF           (1 << 16)   /* resume flag               */
+#define X86_EFLAGS_VM           (1 << 17)   /* virtual 8086 mode flag    */
+#define X86_EFLAGS_AC           (1 << 18)   /* alignment check flag      */
+#define X86_EFLAGS_VIF          (1 << 19)   /* virtual interrupt flag    */
+#define X86_EFLAGS_VIP          (1 << 20)   /* virtual interrupt pending */
+#define X86_EFLAGS_ID           (1 << 21)   /* ID flag                   */
+
+
+/*
+ * Basic CPU control in CR0
+ */
+#define X86_CR0_MP              (1 << 1)    /* Monitor Coprocessor */
+#define X86_CR0_EM              (1 << 2)    /* Emulation */
+#define X86_CR0_NE              (1 << 5)    /* Numeric Exception */
+#define X86_CR0_PG              (1 << 31)   /* Paging */
+
+/*
+ * Intel CPU features in CR4
+ */
+#define X86_CR4_PAE             (1 << 5)    /* enable PAE */
+#define X86_CR4_OSFXSR          (1 << 9)    /* OS support for FXSAVE/FXRSTOR */
+#define X86_CR4_OSXMMEXCPT      (1 << 10)   /* OS support for FP exceptions */
+
+/*
+ * Intel CPU features in EFER
+ */
+#define X86_EFER_LME            (1 << 8)    /* Long mode enable (R/W) */
+
+#endif /* __PLAT_CMN_X86_CPU_DEFS_H__ */
diff --git a/plat/kvm/Makefile.uk b/plat/kvm/Makefile.uk
index 4b3abc3..e7a55fd 100644
--- a/plat/kvm/Makefile.uk
+++ b/plat/kvm/Makefile.uk
@@ -12,7 +12,9 @@ $(eval $(call addplatlib,kvm,libkvmplat))
 ## Platform library definitions
 ##
 LIBKVMPLAT_ASINCLUDES-y        += -I$(LIBKVMPLAT_BASE)/include
+LIBKVMPLAT_ASINCLUDES-y        += -I$(UK_PLAT_COMMON_BASE)/include
 LIBKVMPLAT_CINCLUDES-y         += -I$(LIBKVMPLAT_BASE)/include
+LIBKVMPLAT_CINCLUDES-y         += -I$(UK_PLAT_COMMON_BASE)/include
 
 LIBKVMPLAT_SRCS-$(ARCH_X86_64) += $(LIBKVMPLAT_BASE)/x86/entry64.S
 LIBKVMPLAT_SRCS-$(ARCH_X86_64) += $(LIBKVMPLAT_BASE)/x86/cpu_x86_64.c
diff --git a/plat/kvm/include/kvm-x86/cpu_x86_64_defs.h 
b/plat/kvm/include/kvm-x86/cpu_x86_64_defs.h
index 9459689..985f8d3 100644
--- a/plat/kvm/include/kvm-x86/cpu_x86_64_defs.h
+++ b/plat/kvm/include/kvm-x86/cpu_x86_64_defs.h
@@ -19,51 +19,7 @@
  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-#ifndef _BITUL
-
-#define _AC(X, Y)               X
-#define _AT(T, X)               X
-#else
-#define __AC(X, Y)              (X##Y)
-#define _AC(X, Y)               __AC(X, Y)
-#define _AT(T, X)               ((T)(X))
-#endif
-
-#define _BITUL(x)               (_AC(1, UL) << (x))
-#define _BITULL(x)              (_AC(1, ULL) << (x))
-
-/*
- * Basic CPU control in CR0
- */
-#define X86_CR0_MP_BIT          1 /* Monitor Coprocessor */
-#define X86_CR0_MP              _BITUL(X86_CR0_MP_BIT)
-#define X86_CR0_EM_BIT          2 /* Emulation */
-#define X86_CR0_EM              _BITUL(X86_CR0_EM_BIT)
-#define X86_CR0_NE_BIT          5 /* Numeric Exception */
-#define X86_CR0_NE              _BITUL(X86_CR0_NE_BIT)
-#define X86_CR0_PG_BIT          31 /* Paging */
-#define X86_CR0_PG              _BITUL(X86_CR0_PG_BIT)
-
-/*
- * Intel CPU features in CR4
- */
-#define X86_CR4_PAE_BIT         5 /* enable physical address extensions */
-#define X86_CR4_PAE             _BITUL(X86_CR4_PAE_BIT)
-#define X86_CR4_OSFXSR_BIT      9 /* OS support for FXSAVE/FXRSTOR */
-#define X86_CR4_OSFXSR          _BITUL(X86_CR4_OSFXSR_BIT)
-#define X86_CR4_OSXMMEXCPT_BIT  10 /* OS support for FP exceptions */
-#define X86_CR4_OSXMMEXCPT      _BITUL(X86_CR4_OSXMMEXCPT_BIT)
-
-/*
- * Intel CPU features in EFER
- */
-#define X86_EFER_LME_BIT        8 /* Long mode enable (R/W) */
-#define X86_EFER_LME            _BITUL(X86_EFER_LME_BIT)
-
-/* Needed by mem.c */
-#define PAGE_SIZE               4096
-//#define PAGE_SHIFT              12
-#define PAGE_MASK               ~(0xfff)
+#include <x86/cpu_defs.h>
 
 /*
  * GDT layout
diff --git a/plat/kvm/x86/entry64.S b/plat/kvm/x86/entry64.S
index 2d14386..6570c47 100644
--- a/plat/kvm/x86/entry64.S
+++ b/plat/kvm/x86/entry64.S
@@ -27,8 +27,8 @@
  * SUCH DAMAGE.
  */
 
+#include <x86/cpu_defs.h>
 #include <kvm-x86/multiboot_defs.h>
-#include <kvm-x86/cpu_x86_64_defs.h>
 
 #define ENTRY(x) .text; .globl x; .type x,%function; x:
 #define END(x)   .size x, . - x
diff --git a/plat/xen/Makefile.uk b/plat/xen/Makefile.uk
index 08e77e0..c1b2ecb 100644
--- a/plat/xen/Makefile.uk
+++ b/plat/xen/Makefile.uk
@@ -22,7 +22,9 @@ LIBXENPLAT_CXXFLAGS-y    += 
-D__XEN_INTERFACE_VERSION__=$(XEN_INTERFACE_VERSION)
 ## Platform library definitions
 ##
 LIBXENPLAT_ASINCLUDES-y        += -I$(LIBXENPLAT_BASE)/include
+LIBXENPLAT_ASINCLUDES-y        += -I$(UK_PLAT_COMMON_BASE)/include
 LIBXENPLAT_CINCLUDES-y         += -I$(LIBXENPLAT_BASE)/include
+LIBXENPLAT_CINCLUDES-y         += -I$(UK_PLAT_COMMON_BASE)/include
 LIBXENPLAT_SRCS-y              += $(LIBXENPLAT_BASE)/hypervisor.c
 LIBXENPLAT_SRCS-y              += $(LIBXENPLAT_BASE)/memory.c
 
diff --git a/plat/xen/include/xen-x86/os.h b/plat/xen/include/xen-x86/os.h
index 99c9d14..3df773c 100644
--- a/plat/xen/include/xen-x86/os.h
+++ b/plat/xen/include/xen-x86/os.h
@@ -60,14 +60,7 @@ typedef unsigned long u_long;
 #include <xen/xsm/flask_op.h>
 #endif
 
-#define MSR_EFER        0xc0000080
-#define _EFER_LME       8           /* Long mode enable */
-
-#define X86_CR0_PG      0x80000000  /* Paging */
-#define X86_CR4_PAE     0x00000020  /* enable physical address extensions */
-#define X86_CR4_OSFXSR  0x00000200  /* enable fast FPU save and restore */
-
-#define X86_EFLAGS_IF   0x00000200
+#include <x86/cpu_defs.h>
 
 #define __KERNEL_CS     FLAT_KERNEL_CS
 #define __KERNEL_DS     FLAT_KERNEL_DS
-- 
2.1.4


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