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[Minios-devel] [UNIKRAFT PATCHv4 17/43] plat/include: Define macros for Arm64 to access registers


  • To: <minios-devel@xxxxxxxxxxxxxxxxxxxx>, <simon.kuenzer@xxxxxxxxx>
  • From: Wei Chen <Wei.Chen@xxxxxxx>
  • Date: Fri, 6 Jul 2018 09:03:30 +0000
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  • Cc: Kaly.Xin@xxxxxxx, nd@xxxxxxx, wei.chen@xxxxxxx
  • Delivery-date: Fri, 06 Jul 2018 09:05:06 +0000
  • List-id: Mini-os development list <minios-devel.lists.xenproject.org>
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In the progress of Arm64 system initialization, we need to access
the system registers to configure some CPU features, we also need
to access device registers to make device work. So in this patch,
we define macros to access device registers and system registers.

Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
 plat/common/include/arm/arm64/cpu.h | 72 +++++++++++++++++++++++++++++
 plat/common/include/arm/cpu.h       | 46 ++++++++++++++++++
 plat/common/include/cpu.h           |  4 +-
 3 files changed, 121 insertions(+), 1 deletion(-)
 create mode 100644 plat/common/include/arm/arm64/cpu.h
 create mode 100644 plat/common/include/arm/cpu.h

diff --git a/plat/common/include/arm/arm64/cpu.h 
b/plat/common/include/arm/arm64/cpu.h
new file mode 100644
index 0000000..7c79462
--- /dev/null
+++ b/plat/common/include/arm/arm64/cpu.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <wei.chen@xxxxxxx>
+ *
+ * Copyright (c) 2018, Arm Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <inttypes.h>
+
+#define REG_READ8(addr)            \
+       (*((const volatile uint8_t*)(addr)))
+#define REG_WRITE8(addr, value)    \
+       (*((volatile uint8_t*)(addr)) = (uint8_t)(value))
+
+#define REG_READ16(addr)            \
+       (*((const volatile uint16_t*)(addr)))
+#define REG_WRITE16(addr, value)    \
+       (*((volatile uint16_t*)(addr)) = (uint16_t)(value))
+
+#define REG_READ32(addr)            \
+       (*((const volatile uint32_t*)(addr)))
+#define REG_WRITE32(addr, value)    \
+       (*((volatile uint32_t*)(addr)) = (uint32_t)(value))
+
+#define REG_READ64(addr)            \
+       (*((const volatile uint64_t*)(addr)))
+#define REG_WRITE64(addr, value)    \
+       (*((volatile uint64_t*)(addr)) = (uint64_t)(value))
+
+/* Define compatibility IO macros */
+#define outb(addr, v)   REG_WRITE8(addr, v)
+#define outw(addr, v)   REG_WRITE16(addr, v)
+#define inb(addr)       REG_READ8(addr)
+
+/* Macros to access system registers */
+#define        SYSREG_READ(reg)            \
+({  uint64_t val;                   \
+       __asm__ __volatile__("mrs %0, " __STRINGIFY(reg) \
+                                       : "=&r" (val)); \
+       val;                            \
+})
+
+#define        SYSREG_WRITE(reg, val)      \
+       __asm__ __volatile__("msr " __STRINGIFY(reg) ", %0" \
+                                       : : "r" ((uint64_t)(val)))
diff --git a/plat/common/include/arm/cpu.h b/plat/common/include/arm/cpu.h
new file mode 100644
index 0000000..558945f
--- /dev/null
+++ b/plat/common/include/arm/cpu.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <wei.chen@xxxxxxx>
+ *
+ * Copyright (c) 2018, Arm Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#ifndef __PLAT_CMN_ARM_CPU_H__
+#define __PLAT_CMN_ARM_CPU_H__
+
+#if defined(__ARM_32__)
+#include <arm/arm/cpu.h>
+#elif defined(__ARM_64__)
+#include <arm/arm64/cpu.h>
+#else
+#error "Add cpu.h for current architecture."
+#endif
+
+#endif /* __PLAT_CMN_ARM_CPU_H__ */
diff --git a/plat/common/include/cpu.h b/plat/common/include/cpu.h
index 153ebf9..4f04df5 100644
--- a/plat/common/include/cpu.h
+++ b/plat/common/include/cpu.h
@@ -36,8 +36,10 @@
 #define __PLAT_CMN_CPU_H__
 
 #include <uk/arch/lcpu.h>
-#ifdef __X86_64__
+#if defined(__X86_64__)
 #include <x86/cpu.h>
+#elif defined(__ARM_32__) || defined(__ARM_64__)
+#include <arm/cpu.h>
 #else
 #error "Add cpu.h for current architecture."
 #endif
-- 
2.17.1


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