[Minios-devel] [UNIKRAFT PATCHv4 35/43] plat/common: Implement CPU suspend for arm64

[Wei Chen <Wei.Chen@xxxxxxx>]

Using PSCI despatch function to call PSCI_CPU_SUSPEND
function to halt CPU.

Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
 plat/common/arm/cpu_native.c        | 44 +++++++++++++++++++++++++++++
 plat/common/include/arm/arm64/cpu.h |  2 ++
 2 files changed, 46 insertions(+)
 create mode 100644 plat/common/arm/cpu_native.c

diff --git a/plat/common/arm/cpu_native.c b/plat/common/arm/cpu_native.c
new file mode 100644
index 0000000..07548bf
--- /dev/null
+++ b/plat/common/arm/cpu_native.c
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <wei.chen@xxxxxxx>
+ *
+ * Copyright (c) 2018, Arm Ltd., All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <arm/cpu.h>
+#include <arm/cpu_defs.h>
+
+void halt(void)
+{
+       if (psci_method == PSCI_METHOD_HVC)
+               psci_hvc_call(PSCI_FNID_CPU_SUSPEND);
+       else if (psci_method == PSCI_METHOD_SMC)
+               psci_smc_call(PSCI_FNID_CPU_SUSPEND);
+}
diff --git a/plat/common/include/arm/arm64/cpu.h 
b/plat/common/include/arm/arm64/cpu.h
index 397c81f..1fd5c72 100644
--- a/plat/common/include/arm/arm64/cpu.h
+++ b/plat/common/include/arm/arm64/cpu.h
@@ -71,6 +71,8 @@
        __asm__ __volatile__("msr " __STRINGIFY(reg) ", %0" \
                                        : : "r" ((uint64_t)(val)))
 
+/* CPU native APIs */
+void halt(void);
 
 /* PSCI conduit method to call functions */
 extern int psci_method;
-- 
2.17.1


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