[Minios-devel] [UNIKRAFT PATCHv5 12/46] uk/arch: Add necessary header files for Arm64

[Wei Chen <wei.chen@xxxxxxx>]

From: Wei Chen <Wei.Chen@xxxxxxx>

These files are copied from x86_64 folder, but have been modified
to follow the Arm64 architecture.

Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
 include/uk/arch/arm/arm64/intsizes.h | 48 +++++++++++++++
 include/uk/arch/arm/arm64/lcpu.h     | 89 ++++++++++++++++++++++++++++
 include/uk/arch/arm/arm64/limits.h   | 48 +++++++++++++++
 include/uk/arch/arm/arm64/types.h    | 38 ++++++++++++
 4 files changed, 223 insertions(+)
 create mode 100644 include/uk/arch/arm/arm64/intsizes.h
 create mode 100644 include/uk/arch/arm/arm64/lcpu.h
 create mode 100644 include/uk/arch/arm/arm64/limits.h
 create mode 100644 include/uk/arch/arm/arm64/types.h

diff --git a/include/uk/arch/arm/arm64/intsizes.h 
b/include/uk/arch/arm/arm64/intsizes.h
new file mode 100644
index 0000000..a1bff49
--- /dev/null
+++ b/include/uk/arch/arm/arm64/intsizes.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>
+ *          Wei Chen <Wei.Chen@xxxxxxx>
+ *
+ *
+ * Copyright (c) 2017, NEC Europe Ltd., NEC Corporation. All rights reserved.
+ * Copyright (c) 2018, Arm Ltd., All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#if ((!defined __UKARCH_TYPES_H__) && (!defined __UKARCH_LIMITS_H__))
+#error Do not include this header directly
+#endif
+
+#define __C_IS_8    /* char */
+#define __S_IS_16   /* short */
+#define __I_IS_32   /* int */
+#define __L_IS_64   /* long */
+#define __LL_IS_64  /* long long */
+#define __PTR_IS_64 /* void * */
+#define __PHY_ADDR_IS_64 /* phys_addr */
diff --git a/include/uk/arch/arm/arm64/lcpu.h b/include/uk/arch/arm/arm64/lcpu.h
new file mode 100644
index 0000000..1acdd2b
--- /dev/null
+++ b/include/uk/arch/arm/arm64/lcpu.h
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright (c) 2009, Citrix Systems, Inc.
+ * Copyright (c) 2017, NEC Europe Ltd., NEC Corporation.
+ * Copyright (c) 2018, Arm Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef __UKARCH_LCPU_H__
+#error Do not include this header directly
+#endif
+
+struct __regs {
+       /* Generic Purpose registers, from x0 ~ x29 */
+       unsigned long x[30];
+
+       /* Link Register (x30) */
+       unsigned long lr;
+
+       /* Exception Link Register */
+       unsigned long elr_el1;
+
+       /* Processor State Register */
+       unsigned long spsr_el1;
+
+       /* Exception Status Register */
+       unsigned long esr_el1;
+
+       /* Stack Pointer */
+       unsigned long sp;
+};
+
+/*
+ * Instruction Synchronization Barrier flushes the pipeline in the
+ * processor, so that all instructions following the ISB are fetched
+ * from cache or memory, after the instruction has been completed.
+ */
+#define isb()   __asm__ __volatile("isb" ::: "memory")
+
+/*
+ * Options for DMB and DSB:
+ *     oshld   Outer Shareable, load
+ *     oshst   Outer Shareable, store
+ *     osh     Outer Shareable, all
+ *     nshld   Non-shareable, load
+ *     nshst   Non-shareable, store
+ *     nsh     Non-shareable, all
+ *     ishld   Inner Shareable, load
+ *     ishst   Inner Shareable, store
+ *     ish     Inner Shareable, all
+ *     ld      Full system, load
+ *     st      Full system, store
+ *     sy      Full system, all
+ */
+#define dmb(opt)    __asm__ __volatile("dmb " #opt ::: "memory")
+#define dsb(opt)    __asm__ __volatile("dsb " #opt ::: "memory")
+
+/* We probably only need "dmb" here, but we'll start by being paranoid. */
+#ifndef mb
+#define mb()    dsb(sy) /* Full system memory barrier all */
+#endif
+
+#ifndef rmb
+#define rmb()   dsb(ld) /* Full system memory barrier load */
+#endif
+
+#ifndef wmb
+#define wmb()   dsb(st) /* Full system memory barrier store */
+#endif
diff --git a/include/uk/arch/arm/arm64/limits.h 
b/include/uk/arch/arm/arm64/limits.h
new file mode 100644
index 0000000..cec0564
--- /dev/null
+++ b/include/uk/arch/arm/arm64/limits.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright (c) 2009, Citrix Systems, Inc.
+ * Copyright (c) 2017, NEC Europe Ltd., NEC Corporation.
+ * Copyright (c) 2018, Arm Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef __UKARCH_LIMITS_H__
+#error Do not include this header directly
+#endif
+
+#define __PAGE_SHIFT           12
+
+#ifdef __ASSEMBLY__
+#define __PAGE_SIZE            (1 << __PAGE_SHIFT)
+#define __PAGE_MASK            (~((__PAGE_SIZE) - 1))
+#else
+#define __PAGE_SIZE            (1ULL << __PAGE_SHIFT)
+#define __PAGE_MASK            (~((__PAGE_SIZE) - 1))
+#endif
+
+#define __STACK_SIZE_PAGE_ORDER        4
+#define __STACK_SIZE   (__PAGE_SIZE * (1 << __STACK_SIZE_PAGE_ORDER))
+#define __STACK_ALIGN_SIZE     16
+
+#define __WORDSIZE             64
+#define __WORDSIZE_COMPAT32    1
diff --git a/include/uk/arch/arm/arm64/types.h 
b/include/uk/arch/arm/arm64/types.h
new file mode 100644
index 0000000..5547b37
--- /dev/null
+++ b/include/uk/arch/arm/arm64/types.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2002-2003, K A Fraser & R Neugebauer
+ * Copyright (c) 2005, Grzegorz Milos, Intel Research Cambridge
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __UKARCH_TYPES_H__
+#error Do not include this header directly
+#endif
+
+#ifndef __ASSEMBLY__
+
+struct __pte { unsigned long pte; };
+#define npte(x) ((struct __pte) { (x) })
+
+#define _WORD ".quad"
+
+#else
+#define _WORD .quad
+#endif /* !__ASSEMBLY__ */
-- 
2.17.1


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