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Re: [Minios-devel] [UNIKRAFT PATCHv5 37/46] plat/common: Implement PSCI despatch functions for arm64


  • To: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>, "minios-devel@xxxxxxxxxxxxxxxxxxxx" <minios-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: "Wei Chen (Arm Technology China)" <Wei.Chen@xxxxxxx>
  • Date: Wed, 12 Sep 2018 03:28:31 +0000
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  • Cc: "Kaly Xin \(Arm Technology China\)" <Kaly.Xin@xxxxxxx>, nd <nd@xxxxxxx>
  • Delivery-date: Wed, 12 Sep 2018 03:28:45 +0000
  • List-id: Mini-os development list <minios-devel.lists.xenproject.org>
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  • Thread-topic: [Minios-devel] [UNIKRAFT PATCHv5 37/46] plat/common: Implement PSCI despatch functions for arm64


> -----Original Message-----
> From: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>
> Sent: 2018年9月12日 4:15
> To: Wei Chen (Arm Technology China) <Wei.Chen@xxxxxxx>; minios-
> devel@xxxxxxxxxxxxxxxxxxxx
> Cc: Kaly Xin (Arm Technology China) <Kaly.Xin@xxxxxxx>; nd <nd@xxxxxxx>
> Subject: Re: [Minios-devel] [UNIKRAFT PATCHv5 37/46] plat/common: Implement
> PSCI despatch functions for arm64
> 
> On 10.08.2018 09:08, Wei Chen wrote:
> > Implement PSCI despatch functions for different conduits.
> 
> dispatch? ;-)

Yes ; ( 

> 
> > The platforms can select correct despatch function as the
> > PSCI conduit they are using.
> >
> > Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
> 
> I am not an ARM expert, but this looks okay to me. You are going to use
> this for issuing device resets, right?
> 

Yes, PSCI is a power management interface for Arm, it includes shutdown,
suspend, reset and etc ; )

> Reviewed-by: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>
> 
> > ---
> >   plat/common/arm/psci_arm64.S             | 55 ++++++++++++++++++++++++
> >   plat/common/include/arm/arm64/cpu.h      |  9 ++++
> >   plat/common/include/arm/arm64/cpu_defs.h | 14 ++++++
> >   plat/kvm/Makefile.uk                     |  1 +
> >   4 files changed, 79 insertions(+)
> >   create mode 100644 plat/common/arm/psci_arm64.S
> >
> > diff --git a/plat/common/arm/psci_arm64.S b/plat/common/arm/psci_arm64.S
> > new file mode 100644
> > index 0000000..ee42008
> > --- /dev/null
> > +++ b/plat/common/arm/psci_arm64.S
> > @@ -0,0 +1,55 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause */
> > +/*
> > + * Authors: Wei Chen <wei.chen@xxxxxxx>
> > + *
> > + * Copyright (c) 2018, Arm Ltd. All rights reserved.
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + *
> > + * 1. Redistributions of source code must retain the above copyright
> > + *    notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *    notice, this list of conditions and the following disclaimer in the
> > + *    documentation and/or other materials provided with the distribution.
> > + * 3. Neither the name of the copyright holder nor the names of its
> > + *    contributors may be used to endorse or promote products derived from
> > + *    this software without specific prior written permission.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> IS"
> > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS
> BE
> > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
> THE
> > + * POSSIBILITY OF SUCH DAMAGE.
> > + *
> > + * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
> > + */
> > +#include <arm/cpu_defs.h>
> > +#include <asm.h>
> > +
> > +/*
> > + * Use HVC to call PSCI functions, based on the SMC Calling
> > + * Convention:
> > + * int32_t smcc_psci_hvc_call(uint32_t, uint64_t, uint64_t, uint64_t);
> > + */
> > +ENTRY(smcc_psci_hvc_call)
> > +   hvc #0
> > +   ret
> > +END(smcc_psci_hvc_call)
> > +
> > +/*
> > + * Use SMC to call PSCI functions, based on the SMC Calling
> > + * Convention:
> > + * int32_t smcc_psci_smc_call(uint32_t, uint64_t, uint64_t, uint64_t);
> > + */
> > +ENTRY(smcc_psci_smc_call)
> > +   smc #0
> > +   ret
> > +END(smcc_psci_smc_call)
> > diff --git a/plat/common/include/arm/arm64/cpu.h
> b/plat/common/include/arm/arm64/cpu.h
> > index fac6cdb..cd2c257 100644
> > --- a/plat/common/include/arm/arm64/cpu.h
> > +++ b/plat/common/include/arm/arm64/cpu.h
> > @@ -90,3 +90,12 @@ static inline void ioreg_write64(volatile uint64_t *addr,
> uint64_t value)
> >   #define SYSREG_WRITE(reg, val) \
> >     __asm__ __volatile__("msr " __STRINGIFY(reg) ", %0" \
> >                     : : "r" ((uint64_t)(val)))
> > +
> > +/*
> > + * PSCI conduit method to call functions, based on the SMC Calling
> > + * Convention.
> > + */
> > +typedef int (*smcc_psci_callfn_t)(uint32_t, uint64_t, uint64_t, uint64_t);
> > +extern smcc_psci_callfn_t smcc_psci_call;
> > +int32_t smcc_psci_hvc_call(uint32_t, uint64_t, uint64_t, uint64_t);
> > +int32_t smcc_psci_smc_call(uint32_t, uint64_t, uint64_t, uint64_t);
> > diff --git a/plat/common/include/arm/arm64/cpu_defs.h
> b/plat/common/include/arm/arm64/cpu_defs.h
> > index 9fefcca..0ac4670 100644
> > --- a/plat/common/include/arm/arm64/cpu_defs.h
> > +++ b/plat/common/include/arm/arm64/cpu_defs.h
> > @@ -34,6 +34,20 @@
> >   #ifndef __CPU_ARM_64_DEFS_H__
> >   #define __CPU_ARM_64_DEFS_H__
> >
> > +/*
> > + * Power State Coordination Interface (PSCI v0.2) function codes
> > + */
> > +#define PSCI_FNID_VERSION          0x84000000
> > +#define PSCI_FNID_CPU_SUSPEND              0xc4000001
> > +#define PSCI_FNID_CPU_OFF          0x84000002
> > +#define PSCI_FNID_CPU_ON           0xc4000003
> > +#define PSCI_FNID_AFFINITY_INFO            0xc4000004
> > +#define PSCI_FNID_MIGRATE          0xc4000005
> > +#define PSCI_FNID_MIGRATE_INFO_TYPE        0x84000006
> > +#define PSCI_FNID_MIGRATE_INFO_UP_CPU      0xc4000007
> > +#define PSCI_FNID_SYSTEM_OFF               0x84000008
> > +#define PSCI_FNID_SYSTEM_RESET             0x84000009
> > +
> >   /*
> >    * The supported virtual address bits.
> >    * We will do 1:1 VA to PA Mapping, so we define the same address size
> > diff --git a/plat/kvm/Makefile.uk b/plat/kvm/Makefile.uk
> > index a54bddf..001044b 100644
> > --- a/plat/kvm/Makefile.uk
> > +++ b/plat/kvm/Makefile.uk
> > @@ -54,6 +54,7 @@ ifeq ($(findstring y,$(CONFIG_KVM_KERNEL_SERIAL_CONSOLE)
> $(CONFIG_KVM_DEBUG_SERI
> >   LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/console.c|common
> >   endif
> >   LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/cache64.S|common
> > +LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/psci_arm64.S|common
> >   LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/time.c|common
> >   LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/traps.c|common
> >   LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) += $(LIBKVMPLAT_BASE)/arm/entry64.S
> >
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