Re: [Minios-devel] [UNIKRAFT PATCHv3 2/5] arch/arm64: Define the size of callee-saved-registers for thread switch

["Justin He (Arm Technology China)" <Justin.He@xxxxxxx>]

Hi Santiago

> -----Original Message-----
> From: Santiago Pagani <Santiago.Pagani@xxxxxxxxx>
> Sent: Monday, October 28, 2019 5:38 PM
> To: Justin He (Arm Technology China) <Justin.He@xxxxxxx>; minios-
> devel@xxxxxxxxxxxxxxxxxxxx; Simon Kuenzer <simon.kuenzer@xxxxxxxxx>;
> Sharan Santhanam <Sharan.Santhanam@xxxxxxxxx>
> Cc: Julien Grall <Julien.Grall@xxxxxxx>; Kaly Xin (Arm Technology China)
> <Kaly.Xin@xxxxxxx>; Wei Chen (Arm Technology China)
> <Wei.Chen@xxxxxxx>; Jianyong Wu (Arm Technology China)
> <Jianyong.Wu@xxxxxxx>
> Subject: Re: [UNIKRAFT PATCHv3 2/5] arch/arm64: Define the size of callee-
> saved-registers for thread switch
>
> Hi Justin,
>
> Thanks fort he patch. Please see my comments inline.
>
> On 31.07.19, 04:48, "Jia He" <justin.he@xxxxxxx> wrote:
>
>     From: Wei Chen <wei.chen@xxxxxxx>
>
>     In thread context switch, we will save the callee-saved registers
>     (x19 ~ x28) and Frame Point Register and Link Register to prev's
>     thread stack [1]
>
>     [1]
> http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapc
> s64.pdf
>
>     Signed-off-by: Wei Chen <wei.chen@xxxxxxx>
>     Signed-off-by: Jianyong Wu <jianyong.wu@xxxxxxx>
>     Signed-off-by: Jia He <justin.he@xxxxxxx>
>     ---
>      arch/arm/arm64/include/uk/asm/lcpu.h | 24 ++++++++++++++++++++++++
>      1 file changed, 24 insertions(+)
>
>     diff --git a/arch/arm/arm64/include/uk/asm/lcpu.h
> b/arch/arm/arm64/include/uk/asm/lcpu.h
>     index 9eea746..9d839a6 100644
>     --- a/arch/arm/arm64/include/uk/asm/lcpu.h
>     +++ b/arch/arm/arm64/include/uk/asm/lcpu.h
>     @@ -44,6 +44,15 @@
>      #define __TRAP_STACK_SIZE        288
>      #define __SP_OFFSET              272
>      #define __SP_EL0_OFFSET          280
>     +
>     +/*
>     + * In thread context switch, we will save the callee-saved registers
>     + * (x19 ~ x28) and Frame Point Register and Link Register to prev's
>     + * thread stack:
>     + *
> http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapc
> s64.pdf
>     + */
>     +#define __CALLEE_SAVED_SIZE    96
>     +
>      #else
>      /*
>       * Change this structure must update TRAP_STACK_SIZE at the same time.
>     @@ -72,6 +81,21 @@ struct __regs {
>       unsigned long sp_el0;
>      };
>
>     +/*
>     + * Change this structure must update __CALLEE_SAVED_SIZE at the
>     + * same time.
>     + */
>     +struct __callee_saved_regs {
>     + /* Callee-saved registers, from x19 ~ x28 */
>     + unsigned long callee[10];
> I would suggest to use uint64_t here. Not that unsigned long is not the
> correct type, just that it makes it very explicit that this is to save 64-bit
> registers.

Ok


--
Cheers,
Justin (Jia He)


IMPORTANT NOTICE: The contents of this email and any attachments are 
confidential and may also be privileged. If you are not the intended recipient, 
please notify the sender immediately and do not disclose the contents to any 
other person, use it for any purpose, or store or copy the information in any 
medium. Thank you.
_______________________________________________
Minios-devel mailing list
Minios-devel@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/mailman/listinfo/minios-devel