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[Minios-devel] [UNIKRAFT/PLAT_RASPI PATCH 09/13] plats/raspi: Adding timer related and platform information functions



Adding timer related and platform information functions.

Signed-off-by: Santiago Pagani <santiagopagani@xxxxxxxxx>
---
 include/raspi/raspi_info.h |  49 +++++++++++
 include/raspi/time.h       |  91 +++++++++++++++++++
 raspi_info.c               |  63 ++++++++++++++
 raspi_info_asm.S           |  89 +++++++++++++++++++
 time.c                     | 173 +++++++++++++++++++++++++++++++++++++
 5 files changed, 465 insertions(+)
 create mode 100644 include/raspi/raspi_info.h
 create mode 100644 include/raspi/time.h
 create mode 100644 raspi_info.c
 create mode 100644 raspi_info_asm.S
 create mode 100644 time.c

diff --git a/include/raspi/raspi_info.h b/include/raspi/raspi_info.h
new file mode 100644
index 0000000..8013dd5
--- /dev/null
+++ b/include/raspi/raspi_info.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Santiago Pagani <santiagopagani@xxxxxxxxx>
+ *
+ * Copyright (c) 2020, NEC Laboratories Europe GmbH, NEC Corporation.
+ *                     All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#ifndef __RASPI_INFO_H__
+#define __RASPI_INFO_H__
+
+#include <stdint.h>
+
+unsigned long get_el ( void );
+unsigned long get_spsel ( void );
+unsigned long get_sctlr_el1 ( void );
+unsigned long get_unikraft_text_size ( void );
+unsigned long get_unikraft_data_size ( void );
+unsigned long get_unikraft_bss_size ( void );
+uint64_t computeUsedStack( void );
+
+#endif /* __RASPI_INFO_H__ */
diff --git a/include/raspi/time.h b/include/raspi/time.h
new file mode 100644
index 0000000..f788a66
--- /dev/null
+++ b/include/raspi/time.h
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Santiago Pagani <santiagopagani@xxxxxxxxx>
+ *
+ * Copyright (c) 2020, NEC Laboratories Europe GmbH, NEC Corporation.
+ *                     All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#ifndef __RASPI_TIME_H__
+#define __RASPI_TIME_H__
+
+#include "sysregs.h"
+#include <stdint.h>
+
+#define RASPI_SYS_TIMER_BASE           MMIO_BASE
+#define RASPI_SYS_TIMER_CS                     ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003000))
+#define RASPI_SYS_TIMER_CLO                    ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003004))
+#define RASPI_SYS_TIMER_CHI                    ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003008))
+#define RASPI_SYS_TIMER_C0                     ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x0000300C))
+#define RASPI_SYS_TIMER_C1                     ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003010))
+#define RASPI_SYS_TIMER_C2                     ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003014))
+#define RASPI_SYS_TIMER_C3                     ((volatile uint32_t 
*)(RASPI_SYS_TIMER_BASE+0x00003018))
+
+#define RASPI_SYS_TIMER_CS_M0          (1 << 0)
+#define RASPI_SYS_TIMER_CS_M1          (1 << 1)
+#define RASPI_SYS_TIMER_CS_M2          (1 << 2)
+#define RASPI_SYS_TIMER_CS_M3          (1 << 3)
+
+
+#define RASPI_ARM_TIMER_BASE           (MMIO_BASE + 0x1000000)
+#define RASPI_ARM_C0_TIMER_IRQ_CTL     ((volatile uint32_t 
*)(RASPI_ARM_TIMER_BASE+0x40))
+#define RASPI_ARM_C0_TIMER_IRQ_CTL_CNTVIRQ_BIT         (1 << 3)
+
+
+#define RASPI_ARM_SIDE_TIMER_BASE              (MMIO_BASE + 0xB000)
+#define RASPI_ARM_SIDE_TIMER_LOAD              ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x400))
+#define RASPI_ARM_SIDE_TIMER_VALUE             ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x404))
+#define RASPI_ARM_SIDE_TIMER_CTL               ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x408))
+#define RASPI_ARM_SIDE_TIMER_IRQ_CLEAR ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x40C))
+#define RASPI_ARM_SIDE_TIMER_RAW_IRQ   ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x410))
+#define RASPI_ARM_SIDE_TIMER_MASKED_IRQ        ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x414))
+#define RASPI_ARM_SIDE_TIMER_RELOAD            ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x418))
+#define RASPI_ARM_SIDE_TIMER_PREDIVIDER        ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x41C))
+#define RASPI_ARM_SIDE_TIMER_FREE              ((volatile uint32_t 
*)(RASPI_ARM_SIDE_TIMER_BASE+0x420))
+#define RASPI_ARM_SIDE_TIMER_CTL_FREE_COUNTER_BIT      (1 << 9)
+#define RASPI_ARM_SIDE_TIMER_CTL_ENABLE_BIT                    (1 << 7)
+#define RASPI_ARM_SIDE_TIMER_CTL_IRQ_BIT                       (1 << 5)
+#define RASPI_ARM_SIDE_TIMER_CTL_BITS_BIT                      (1 << 1)
+
+
+#define raspi_arm_side_timer_get_value()       (*RASPI_ARM_SIDE_TIMER_VALUE)
+#define raspi_arm_side_timer_get_load()                
(*RASPI_ARM_SIDE_TIMER_LOAD)
+#define raspi_arm_side_timer_irq_enable()      {*RASPI_ARM_SIDE_TIMER_CTL = 
*RASPI_ARM_SIDE_TIMER_CTL | RASPI_ARM_SIDE_TIMER_CTL_IRQ_BIT; }
+#define raspi_arm_side_timer_irq_disable()     {*RASPI_ARM_SIDE_TIMER_CTL = 
*RASPI_ARM_SIDE_TIMER_CTL & ~RASPI_ARM_SIDE_TIMER_CTL_IRQ_BIT; }
+#define raspi_arm_side_timer_irq_clear()       
{*RASPI_ARM_SIDE_TIMER_IRQ_CLEAR = 1; }
+#define raspi_arm_side_timer_irq_triggered() (*RASPI_ARM_SIDE_TIMER_MASKED_IRQ 
& 1)
+
+
+void raspi_irq_delay_measurements_init(void);
+uint64_t get_system_timer(void);
+uint32_t get_timer_irq_delay(void);
+void reset_timer_irq_delay(void);
+
+#endif /* __RASPI_TIME_H__ */
\ No newline at end of file
diff --git a/raspi_info.c b/raspi_info.c
new file mode 100644
index 0000000..b618c15
--- /dev/null
+++ b/raspi_info.c
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Santiago Pagani <santiagopagani@xxxxxxxxx>
+ *
+ * Copyright (c) 2020, NEC Laboratories Europe GmbH, NEC Corporation.
+ *                     All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <stdint.h>
+#include <uk/config.h>
+
+uint64_t computeUsedStack(void) {
+#if CONFIG_RASPI_WATERMARK_STACK
+       #define MAX_ADDRESS     0x80000
+       #define STACK_START     0
+       #define STACK_SIZE      (MAX_ADDRESS - STACK_START)
+       void *address = (void *)(STACK_SIZE/2 + STACK_START);
+       unsigned int step = STACK_SIZE/4;
+
+       while (step >= 8) {
+               uint64_t expectedValue = ((MAX_ADDRESS - (uint64_t)address) >> 
3);
+               uint64_t readValue = (uint64_t)*((volatile uint64_t *)address);
+
+               if (expectedValue == readValue) {
+                       address = (void *)((uint64_t)address + step);
+               } else {
+                       address = (void *)((uint64_t)address - step);
+               }
+               step >>= 1;
+       }
+       
+       return MAX_ADDRESS - (uint64_t)address;
+#else
+       return 0;
+#endif
+}
diff --git a/raspi_info_asm.S b/raspi_info_asm.S
new file mode 100644
index 0000000..28215a9
--- /dev/null
+++ b/raspi_info_asm.S
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Santiago Pagani <santiagopagani@xxxxxxxxx>
+ *
+ * Copyright (c) 2020, NEC Laboratories Europe GmbH, NEC Corporation.
+ *                     All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+ 
+.globl get_sp
+get_sp:
+    mov                x0, sp
+    ret
+
+.globl get_sp_start
+get_sp_start:
+    ldr     x1, =_start
+    ret
+
+.globl get_el
+get_el:
+    mrs x0, CurrentEL
+    lsr x0, x0, #2
+    ret
+
+.globl get_spsel
+get_spsel:
+    mrs x0, SPSel
+    ret
+
+.globl get_sctlr_el1
+get_sctlr_el1:
+    mrs x0, sctlr_el1
+    ret
+
+.globl get_unikraft_text_size
+get_unikraft_text_size:
+       ldr x0, =_text
+       ldr x1, =_ectors
+       sub x0, x1, x0
+       ret
+
+.globl get_unikraft_data_size
+get_unikraft_data_size:
+       ldr x0, =_data
+       ldr x1, =_edata
+       sub x0, x1, x0
+       ldr x1, =_tls_start
+       ldr x2, =_etdata
+       sub x1, x2, x1
+       add x0, x0, x1
+       ret
+
+.globl get_unikraft_bss_size
+get_unikraft_bss_size:
+       ldr x0, =__bss_start
+       ldr x1, =__bss_end
+       sub x0, x1, x0
+       ldr x1, =_etdata
+       ldr x2, =_tls_end
+       sub x1, x2, x1
+       add x0, x0, x1
+       ret
diff --git a/time.c b/time.c
new file mode 100644
index 0000000..3b736ad
--- /dev/null
+++ b/time.c
@@ -0,0 +1,173 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Santiago Pagani <santiagopagani@xxxxxxxxx>
+ *
+ * Copyright (c) 2020, NEC Laboratories Europe GmbH, NEC Corporation.
+ *                     All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <stdlib.h>
+#include <uk/assert.h>
+#include <uk/plat/time.h>
+#include <uk/plat/lcpu.h>
+#include <uk/plat/irq.h>
+#include <uk/bitops.h>
+#include <uk/essentials.h>
+#include <uk/plat/common/cpu.h>
+#include <uk/plat/common/irq.h>
+#include <arm/time.h>
+#include <raspi/time.h>
+#include <raspi/irq.h>
+
+#define RASPI_ARM_SIDE_TIMER_LOAD_INIT (0x00FFFFFF)
+
+static uint32_t timer_irq_delay;
+
+void generic_timer_mask_irq(void)
+{
+       set_el0(cntv_ctl, get_el0(cntv_ctl) | GT_TIMER_MASK_IRQ);
+
+       /* Ensure the write of sys register is visible */
+       isb();
+}
+
+void generic_timer_unmask_irq(void)
+{
+       set_el0(cntv_ctl, get_el0(cntv_ctl) & ~GT_TIMER_MASK_IRQ);
+
+       /* Ensure the write of sys register is visible */
+       isb();
+}
+
+uint32_t generic_timer_get_frequency(int fdt_timer __unused)
+{
+       return get_el0(cntfrq);
+}
+
+unsigned long sched_have_pending_events;
+
+void time_block_until(__snsec until)
+{
+       while ((__snsec) ukplat_monotonic_clock() < until) {
+               generic_timer_cpu_block_until(until);
+       }
+}
+
+/* must be called before interrupts are enabled */
+void ukplat_time_init(void)
+{
+       int rc;
+
+       /*
+        * Monotonic time begins at boot_ticks (first read of counter
+        * before calibration).
+        */
+       generic_timer_update_boot_ticks();
+
+       /* Currently, we only support 1 timer per system */
+       rc = generic_timer_init(0);
+       if (rc < 0)
+               UK_CRASH("Failed to initialize platform time\n");
+
+       rc = ukplat_irq_register(IRQ_ID_ARM_GENERIC_TIMER, 
generic_timer_irq_handler, NULL);
+       if (rc < 0)
+               UK_CRASH("Failed to register timer interrupt handler\n");
+
+       /*
+        * Mask IRQ before scheduler start working. Otherwise we will get
+        * unexpected timer interrupts when system is booting.
+        */
+       generic_timer_mask_irq();
+
+       /* Enable timer */
+       generic_timer_enable();
+}
+
+static void raspi_arm_side_timer_init(void)
+{
+       *RASPI_ARM_SIDE_TIMER_CTL = RASPI_ARM_SIDE_TIMER_CTL_ENABLE_BIT | 
RASPI_ARM_SIDE_TIMER_CTL_BITS_BIT;
+       *RASPI_ARM_SIDE_TIMER_PREDIVIDER = 0;
+       *RASPI_ARM_SIDE_TIMER_LOAD = RASPI_ARM_SIDE_TIMER_LOAD_INIT;
+}
+
+static int handle_raspi_side_timer_irq(void *arg __unused)
+{
+       uint64_t timerValue1 = raspi_arm_side_timer_get_value();
+       uint64_t timerValue2 = raspi_arm_side_timer_get_value();
+       raspi_arm_side_timer_irq_disable();
+       raspi_arm_side_timer_irq_clear();
+
+       // The counter is decreasing, so to get the delay of the IRQ response 
we substract the value of the timer at the entry of this
+       // function from the timer load value. Further, to account for the time 
needed to sample the timer, we take a second sample
+       // and also substract the difference beween the two points
+       timer_irq_delay = (raspi_arm_side_timer_get_load() - timerValue1) - 
(timerValue1 - timerValue2);
+
+       return 1;
+}
+
+void raspi_irq_delay_measurements_init(void)
+{
+       int rc;
+
+       raspi_arm_side_timer_init();
+
+       rc = ukplat_irq_register(IRQ_ID_RASPI_ARM_SIDE_TIMER, 
handle_raspi_side_timer_irq, NULL);
+       if (rc < 0)
+               UK_CRASH("Failed to register timer interrupt handler\n");
+}
+
+/**
+ * Get System Timer's counter
+ */
+uint64_t get_system_timer(void)
+{
+       uint32_t h, l;
+       // we must read MMIO area as two separate 32 bit reads
+       h = *RASPI_SYS_TIMER_CHI;
+       l = *RASPI_SYS_TIMER_CLO;
+       // we have to repeat it if high word changed during read
+       if (h != *RASPI_SYS_TIMER_CHI)
+       {
+               h = *RASPI_SYS_TIMER_CHI;
+               l = *RASPI_SYS_TIMER_CLO;
+       }
+       // compose long int value
+       return ((uint64_t)h << 32) | l;
+}
+
+uint32_t get_timer_irq_delay(void)
+{
+       return timer_irq_delay;
+}
+
+void reset_timer_irq_delay(void)
+{
+       timer_irq_delay = 0;
+}
-- 
2.17.1


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