[UNIKRAFT PATCH v2 4/4] plat/xen: enable XSAVE for PKRU register

[Hugo Lefeuvre <hle@xxxxxxxxxx>]

This patch is identical to the KVM patch.

Signed-off-by: Hugo Lefeuvre <hugo.lefeuvre@xxxxxxxxxxxxxxxx>
---
 plat/xen/x86/entry64.S | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/plat/xen/x86/entry64.S b/plat/xen/x86/entry64.S
index c1bee635..dee832ec 100644
--- a/plat/xen/x86/entry64.S
+++ b/plat/xen/x86/entry64.S
@@ -81,18 +81,19 @@ _libxenplat_start:
        movq %rdi, %cr4
        ldmxcsr (mxcsr_ptr)
 #endif /* __SSE__ */
+#if (__AVX__ || CONFIG_HAVE_X86PKU)
        /* Check capabilities subject to availability as indicated by cpuid.
         * First, start off with "standard features" */
        movl $0x1, %eax
        cpuid
-#if __AVX__
        /* ecx and edx now contain capability information, so we can now
         * enable capabilities based on the indicated features */
-       /* OSXSAVE needs to be enabled before AVX */
+       /* note: OSXSAVE needs to be enabled before AVX and PKU */
        testl $(X86_CPUID1_ECX_XSAVE), %ecx
        jz noxsave
        orl $(X86_CR4_OSXSAVE), %edi
        movq %rdi, %cr4
+#if __AVX__
        /* now enable AVX. This needs to be last checking cpuid features from
         * the eax=1 cpuid call, because it clobbers ecx */
        testl $(X86_CPUID1_ECX_AVX), %ecx
@@ -102,8 +103,10 @@ _libxenplat_start:
        orl $(X86_XCR0_SSE | X86_XCR0_AVX), %eax
        xsetbv
 noavx:
-noxsave:
 #endif /* __AVX__ */
+/* Do not enable AVX without XSAVE, otherwise we'll get #UD */
+noxsave:
+#endif /* __AVX__ || CONFIG_HAVE_X86PKU */
        /* Now, check for extended features. */
        movl $0x7, %eax
        movl $0x0, %ecx
@@ -119,9 +122,17 @@ nofsgsbase:
        /* check for Memory Protection Keys (PKU) */
        testl $(X86_CPUID7_ECX_PKU), %ecx
        jz nopku
-       /* if PKU is supported, enable it via CR4 */
+       /* only enable PKU if we support XSAVE */
+       testl $(X86_CR4_OSXSAVE), %edi
+       jz nopku
+       /* PKU is supported, enable it via CR4 */
        orl $(X86_CR4_PKE), %edi
        movq %rdi, %cr4
+       /* also enable XSAVE for the PKRU */
+       xorl %ecx, %ecx
+       xgetbv
+       orl $(X86_XCR0_PKRU), %eax
+       xsetbv
 nopku:
 #endif /* CONFIG_HAVE_X86PKU */
        /* Done setting up CPU capabilities, hand over to C entry point. */
-- 
2.20.1