[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: upcoming MirageOS meeting 2022-10-12
# MirageOS 2022-10-12 participants: pierre, thomas, taka, lucas, christiano, jules, hannes ## reports from the retreat - qubes firewall (just released 0.8.2)- raspberry pi 4 (starting from romain's gilbraltar, fixed compilation with gcc11 + gcc12, with sonja worked on a jack driver): we can now play sound :) - https://github.com/dinosaure/gilbraltar - https://github.com/pitag-ha/rpi/tree/interrupts - next step is: bare-metal with multiple cpus (one unikernel per cpu)- how to boot? u-boot? maybe one unikernel boots on one core, and then starts the other unikernels (i.e. one OCaml runtime per CPU) - or have pthread (user-space) support (and even multiple domains per vcpu) - ocaml 5 compilation of ocaml-solo5: compiles, but doesn't link yet: - https://github.com/kit-ty-kate/mirage-solo5/tree/500- albatross and nixos: still not working in production (due to lack of time) https://github.com/roburio/albatross/pull/119 https://github.com/roburio/albatross/pull/120 - we again used DHCP and DNS resolver unikernels https://github.com/roburio/dnsvizor - we also used the opam-mirror unikernel https://git.robur.io/robur/opam-mirror - jan developed mirage-hole (a pi-hole in mirageos) https://github.com/jmid/mirage-hole - various other PR and bugfixes (including DNS-over-UDP)- raphael wrote https://raphael-proust.gitlab.io/code/mirage-retreat-2022-10.html ## cstruct using bytes - https://github.com/hannesm/ocaml-cstruct/tree/no-bigarray - also mirage-tcpip and mirage-crypto - needs some further benchmarking on unikernels ## memory stuff- maybe something similar to mbuf: appending, prepending, injecting, reserving - faraday, also in eio (doesn't allow for e.g. checksum) - You can ask it for the final iovec and then modify that, though - put_be_64, etc. ## MirageOS/Solo5 porting to MCUs https://github.com/TImada/solo5-embedded Current status:- Initial implementation finished (Target: ARM Cortex-R5F core @ 800MHz in TI AM64x series processors) - Support only a console device- Having better implementation and documents in progress (will be available soon) Future plan: - Support a wired network device on TI AM64x- Support a different MCU (ARM Cortex-M7 core @ 1GHz in NXP i.MX RT1170 Crossover MCUs)
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