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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen-4.5-testing test] 94543: regressions - FAIL
flight 94543 xen-4.5-testing real [real] http://logs.test-lab.xenproject.org/osstest/logs/94543/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-amd64-libvirt-vhd 13 guest-saverestore fail REGR. vs. 93989 test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 9 windows-install fail REGR. vs. 93989 Regressions which are regarded as allowable (not blocking): test-amd64-amd64-xl-rtds 6 xen-boot fail like 93989 test-amd64-i386-xl-qemut-win7-amd64 16 guest-stop fail like 93989 test-amd64-amd64-xl-qemut-win7-amd64 16 guest-stop fail like 93989 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail like 93989 test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail like 93989 test-armhf-armhf-xl-rtds 15 guest-start/debian.repeat fail like 93989 Tests which did not succeed, but are not blocking: test-amd64-amd64-xl-pvh-intel 11 guest-start fail never pass test-amd64-amd64-xl-pvh-amd 11 guest-start fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 13 saverestore-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-armhf-armhf-libvirt 14 guest-saverestore fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 10 guest-start fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt-raw 10 guest-start fail never pass test-armhf-armhf-libvirt-qcow2 10 guest-start fail never pass test-armhf-armhf-xl-cubietruck 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass version targeted for testing: xen facf1562437fb79c05c5e9f1ba9d33e26535930a baseline version: xen 2bc9bd9483b254a80b7f83408f45aa1c6ef17ef3 Last test of basis 93989 2016-05-10 14:43:18 Z 8 days Failing since 94030 2016-05-11 13:08:55 Z 7 days 12 attempts Testing same since 94543 2016-05-18 07:57:51 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Ian Jackson <ian.jackson@xxxxxxxxxxxxx> Jan Beulich <jbeulich@xxxxxxxx> Julien Grall <julien.grall@xxxxxxx> Kyle J. Temkin <temkink@xxxxxxxxxxxx> Kyle Temkin <temkink@xxxxxxxxxxxx> Shanker Donthineni <shankerd@xxxxxxxxxxxxxx> Stefano Stabellini <sstabellini@xxxxxxxxxx> Vikram Sethi <vikrams@xxxxxxxxxxxxxx> Wei Liu <wei.liu2@xxxxxxxxxx> jobs: build-amd64 pass build-armhf pass build-i386 pass build-amd64-libvirt pass build-armhf-libvirt pass build-i386-libvirt pass build-amd64-prev pass build-i386-prev pass build-amd64-pvops pass build-armhf-pvops pass build-i386-pvops pass build-amd64-rumpuserxen pass build-i386-rumpuserxen pass test-amd64-amd64-xl pass test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd fail test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemut-debianhvm-amd64 pass test-amd64-i386-xl-qemut-debianhvm-amd64 pass test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-rumpuserxen-amd64 pass test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-armhf-armhf-xl-arndale pass test-amd64-amd64-xl-credit2 pass test-armhf-armhf-xl-credit2 pass test-armhf-armhf-xl-cubietruck pass test-amd64-i386-freebsd10-i386 pass test-amd64-i386-rumpuserxen-i386 pass test-amd64-amd64-qemuu-nested-intel pass test-amd64-amd64-xl-pvh-intel fail test-amd64-i386-qemut-rhel6hvm-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-armhf-armhf-libvirt fail test-amd64-i386-libvirt pass test-amd64-amd64-migrupgrade pass test-amd64-i386-migrupgrade pass test-amd64-amd64-xl-multivcpu pass test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-armhf-armhf-libvirt-qcow2 fail test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw fail test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds fail test-armhf-armhf-xl-rtds fail test-amd64-i386-xl-qemut-winxpsp3-vcpus1 pass test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 fail test-amd64-amd64-libvirt-vhd fail test-armhf-armhf-xl-vhd fail test-amd64-amd64-xl-qemut-winxpsp3 pass test-amd64-i386-xl-qemut-winxpsp3 pass test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit facf1562437fb79c05c5e9f1ba9d33e26535930a Author: Wei Liu <wei.liu2@xxxxxxxxxx> Date: Tue May 17 16:40:32 2016 +0200 libxl: fix old style declarations Fix errors like: /local/work/xen.git/dist/install/usr/local/include/libxl_uuid.h:59:1: error: 'static' is not at beginning of declaration [-Werror=old-style-declaration] void static inline libxl_uuid_copy_0x040400(libxl_uuid *dst, ^ /local/work/xen.git/dist/install/usr/local/include/libxl_uuid.h:59:1: error: 'inline' is not at beginning of declaration [-Werror=old-style-declaration] /local/work/xen.git/dist/install/usr/local/include/libxl.h:1233:1: error: 'static' is not at beginning of declaration [-Werror=old-style-declaration] int static inline libxl_domain_create_restore_0x040200( ^ Signed-off-by: Wei Liu <wei.liu2@xxxxxxxxxx> Acked-by: Ian Jackson <ian.jackson@xxxxxxxxxxxxx> master commit: d5b6844942f7b21b24e92bccd85c1249592315c8 master date: 2016-04-20 14:34:04 +0100 commit 62e890246736d48030640198d3fd9d71fe392de3 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Tue May 17 14:55:32 2016 +0200 x86/mm: fully honor PS bits in guest page table walks In L4 entries it is currently unconditionally reserved (and hence should, when set, always result in a reserved bit page fault), and is reserved on hardware not supporting 1Gb pages (and hence should, when set, similarly cause a reserved bit page fault on such hardware). This is CVE-2016-4480 / XSA-176. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Tested-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: 46699c7393bd991234b5642763c5c24b6b39a6c4 master date: 2016-05-17 14:41:14 +0200 commit 4065709a02a963c86ba64631c123ea2481c71712 Author: Kyle J. Temkin <temkink@xxxxxxxxxxxx> Date: Thu Apr 28 13:14:07 2016 -0400 xen/arm64: ensure that the correct SP is used for exceptions The ARMv8 architecture has a SPSel ("stack pointer selection") machine register that allows us to determine which exception level's stack pointer is loaded when an exception occurs. As we don't want to use the non-privileged SP_EL0 stack pointer -- or even assume that SP_EL0 points to a valid address in the hypervisor context-- we'll need to ensure that our EL2 code sets the SPSel to SP_ELn mode, so exceptions that trap to EL2 use the EL2 stack pointer. This corrects an issue that can manifest as a hang-on-IRQ on some arm64 cores if the firmware/bootloader has previously initialized SPSel to 0; in which case Xen's exceptions will incorrectly use an invalid SP_EL0, and will endlessly spin on the synchronous abort handler. Signed-off-by: Kyle Temkin <temkink@xxxxxxxxxxxx> Signed-off-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> Reviewed-by: Julien Grall <julien.grall@xxxxxxx> commit d19f9412f2fe046247bc6bf68dc6a4c5129bfd41 Author: Vikram Sethi <vikrams@xxxxxxxxxxxxxx> Date: Mon Mar 28 23:46:12 2016 -0500 arm: Fix asynchronous aborts (SError exceptions) due to bogus PTEs ARMv8 architecture allows performing prefetch data/instructions from memory locations marked as normal memory. Prefetch does not mean that the data/instruction has to be used/executed in code flow. All PTEs that appear to be valid to MMU must contain valid physical address with proper attributes otherwise MMU table walk might cause imprecise asynchronous aborts. The way current XEN code is preparing page tables for frametable and xenheap memory can create bogus PTEs. This patch fixes the issue by clearing page table memory before populating EL2 L0/L1 PTEs. Without this patch XEN crashes on Qualcomm Technologies server chips due to asynchronous aborts. The speculative/prefetch feature explanation is scattered everywhere in ARM specification but below two sections have useful information. E2.8 Memory types and attributes (ver DDI0487A_h) G4.12.6 External abort on a translation table walk (ver DDI0487A_h) Signed-off-by: Vikram Sethi <vikrams@xxxxxxxxxxxxxx> Signed-off-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx> Acked-by: Julien Grall <julien.grall@xxxxxxx> commit c0bb033951c7595a020025e2e765e0e5b4aa1312 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Apr 27 12:22:53 2016 +0100 xen/arm: Force broadcast of TLB and instruction cache maintenance instructions UP guest may use TLB instructions to flush only on the local CPU. Therefore, TLB flush will not be broadcasted across all the CPUs within the same innershareable domain. When the vCPU is migrated between different CPUs, it may be rescheduled to a previous CPU where the TLB has not been flushed. The TLB may contain stale entries which will result to translate incorrectly a VA to IPA or even cause TLB conflicts. To avoid a such situation, it is possible to set HCR_EL2.FB, which will force the broadcast of TLB and instruction cache maintenance instructions. The performance impact of setting HCR_EL2.FB will depend on how often a guest makes use of local flush instructions. ARM64 Linux kernel is SMP-aware (no possibility to build only for UP). Most of the flush instructions are innershareable. The local flushes are limited to the boot (1 per CPU) and when a task is getting a new ASIC. Therefore the impact of setting HCR.FB for those guests is very limited. ARM32 Linux kernel offers the possibility to be built either for SMP or UP. The number of local flush is very limited in the former kernel whilst the latter will only issue local flushes. Therefore there will be an impact to set HCR.FB for guest kernel only built for UP. Note that the SMP kernel can run in a domain using 1 vCPU and it will still make use of innershareable flush instruction. Looking at other OSes, such as FreeBSD, they are very similar to ARM32 Linux kernel (i.e offering two configuration: SMP and UP). However, nothing prevents an SMP-aware kernel to make more often use of local flush instrutions. In the case that HCR_EL2.FB is not set, Xen would need to: * Flush all the TLBs for the VMID associated to this domain * Invalidate all the entries from the branch predictor * Invalidate all the entries from the instruction cache Those actions would only be needed when the vCPU is migrating between 2 physical CPUs. Whilst this solution would have a negative performance impact on kernels which do not heavily use local flush instructions, this may improve performance for kernels only built for UP system. For now implement the easiest solution (i.e setting HCR_EL2.FB). We can revisit it if the performance impact is too high for UP kernel. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 1334fa937ad269e9f476fc6a69fd895f5fc99864 Author: Ian Jackson <ian.jackson@xxxxxxxxxxxxx> Date: Tue May 10 19:20:16 2016 +0100 Update QEMU_UPSTREAM_REVISION commit 478ad3fddeeaf57b883f21e506e65e8393668d23 Author: Ian Jackson <ian.jackson@xxxxxxxxxxxxx> Date: Tue May 10 19:16:08 2016 +0100 QEMU_TAG update commit 2c438f811f8c9fb615f1f05bc11ab1de5aaab857 Author: Ian Jackson <ian.jackson@xxxxxxxxxxxxx> Date: Tue May 10 19:07:29 2016 +0100 QEMU_TAG update (qemu changes not included) _______________________________________________ osstest-output mailing list osstest-output@xxxxxxxxxxxxxxxxxxxx http://lists.xenproject.org/cgi-bin/mailman/listinfo/osstest-output
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