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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen-unstable test] 106565: regressions - FAIL
flight 106565 xen-unstable real [real] http://logs.test-lab.xenproject.org/osstest/logs/106565/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: build-i386-xsm 5 xen-build fail REGR. vs. 106534 build-amd64-oldkern 5 kernel-build fail REGR. vs. 106534 Regressions which are regarded as allowable (not blocking): test-amd64-amd64-xl-qemut-win7-amd64 16 guest-stop fail like 106534 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail like 106534 test-amd64-i386-xl-qemut-win7-amd64 16 guest-stop fail like 106534 test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail like 106534 test-armhf-armhf-libvirt 13 saverestore-support-check fail like 106534 test-armhf-armhf-libvirt-xsm 13 saverestore-support-check fail like 106534 test-armhf-armhf-libvirt-raw 12 saverestore-support-check fail like 106534 test-amd64-amd64-xl-rtds 9 debian-install fail like 106534 Tests which did not succeed, but are not blocking: test-arm64-arm64-libvirt-xsm 1 build-check(1) blocked n/a test-amd64-i386-xl-xsm 1 build-check(1) blocked n/a test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 1 build-check(1) blocked n/a test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm 1 build-check(1) blocked n/a test-amd64-i386-xl-qemut-debianhvm-amd64-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl 1 build-check(1) blocked n/a build-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-libvirt-qcow2 1 build-check(1) blocked n/a test-arm64-arm64-libvirt 1 build-check(1) blocked n/a test-amd64-i386-libvirt-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl-credit2 1 build-check(1) blocked n/a test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl-rtds 1 build-check(1) blocked n/a test-arm64-arm64-xl-multivcpu 1 build-check(1) blocked n/a test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a test-amd64-amd64-xl-pvh-amd 11 guest-start fail never pass test-amd64-amd64-xl-pvh-intel 11 guest-start fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass build-arm64 5 xen-build fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass build-arm64-xsm 5 xen-build fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass build-arm64-pvops 5 kernel-build fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 13 saverestore-support-check fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 13 saverestore-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass version targeted for testing: xen bd8451964078b006081fcef6d169961a3a6f746a baseline version: xen 4036e7c592905c2292cdeba8269e969959427237 Last test of basis 106534 2017-03-07 19:14:51 Z 2 days Failing since 106547 2017-03-08 08:59:30 Z 1 days 3 attempts Testing same since 106561 2017-03-09 00:44:57 Z 0 days 2 attempts ------------------------------------------------------------ People who touched revisions under test: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Christoph Egger <chegger@xxxxxxxxx> Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Jan Beulich <jbeulich@xxxxxxxx> Julien Grall <julien.grall@xxxxxxx> Paul Durrant <paul.durrant@xxxxxxxxxx> jobs: build-amd64-xsm pass build-arm64-xsm fail build-armhf-xsm pass build-i386-xsm fail build-amd64-xtf pass build-amd64 pass build-arm64 fail build-armhf pass build-i386 pass build-amd64-libvirt pass build-arm64-libvirt blocked build-armhf-libvirt pass build-i386-libvirt pass build-amd64-oldkern fail build-i386-oldkern pass build-amd64-prev pass build-i386-prev pass build-amd64-pvops pass build-arm64-pvops fail build-armhf-pvops pass build-i386-pvops pass build-amd64-rumprun pass build-i386-rumprun pass test-xtf-amd64-amd64-1 pass test-xtf-amd64-amd64-2 pass test-xtf-amd64-amd64-3 pass test-xtf-amd64-amd64-4 pass test-xtf-amd64-amd64-5 pass test-amd64-amd64-xl pass test-arm64-arm64-xl blocked test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-debianhvm-amd64-xsm blocked test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm blocked test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm blocked test-amd64-amd64-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm blocked test-amd64-amd64-libvirt-xsm pass test-arm64-arm64-libvirt-xsm blocked test-armhf-armhf-libvirt-xsm pass test-amd64-i386-libvirt-xsm blocked test-amd64-amd64-xl-xsm pass test-arm64-arm64-xl-xsm blocked test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm blocked test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd fail test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemut-debianhvm-amd64 pass test-amd64-i386-xl-qemut-debianhvm-amd64 pass test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-rumprun-amd64 pass test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-armhf-armhf-xl-arndale pass test-amd64-amd64-xl-credit2 pass test-arm64-arm64-xl-credit2 blocked test-armhf-armhf-xl-credit2 pass test-armhf-armhf-xl-cubietruck pass test-amd64-i386-freebsd10-i386 pass test-amd64-i386-rumprun-i386 pass test-amd64-amd64-qemuu-nested-intel pass test-amd64-amd64-xl-pvh-intel fail test-amd64-i386-qemut-rhel6hvm-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-arm64-arm64-libvirt blocked test-armhf-armhf-libvirt pass test-amd64-i386-libvirt pass test-amd64-amd64-migrupgrade pass test-amd64-i386-migrupgrade pass test-amd64-amd64-xl-multivcpu pass test-arm64-arm64-xl-multivcpu blocked test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-arm64-arm64-libvirt-qcow2 blocked test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw pass test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds fail test-arm64-arm64-xl-rtds blocked test-armhf-armhf-xl-rtds pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 pass test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 pass test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd pass test-amd64-amd64-xl-qemut-winxpsp3 pass test-amd64-i386-xl-qemut-winxpsp3 pass test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit bd8451964078b006081fcef6d169961a3a6f746a Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 18:06:01 2017 +0000 xen/arm: Introduce INVALID_VCPU_ID Define INVALID_VCPU_ID as MAX_VIRT_CPUS to avoid casting problem later on. At the moment it can always fit in uint8_t. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit e29d37da55f842e17dd95d17aca6a1c7b6fde705 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 18:06:00 2017 +0000 xen/arm: hvm_domain does not need to be cacheline aligned hvm_domain only contains the HVM_PARAM that on ARM are not used often. So it is not necessary to have hvm_domain fitting in a cacheline. Drop it to save 128 bytes in the structure arch_domain. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 60c005c78c41be8d39690879068e52679d45edf5 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 17:54:36 2017 +0000 xen/arm: acpi: Move the ACPI banks in bootinfo Currently the acpi banks are stored in a separate variable and have an header just for them. This variable can be moved in the structure bootinfo removing an header and a global variable. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 792aba23a5cc6f87e8ba8f18799f522e33815bf1 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 17:54:35 2017 +0000 xen/arm: efi: Rework acpi_create_efi_mmap_table to avoid memory_map[offset] The code contains a lot of memory_map[offset]. This could be simplified by incrementing the descriptor pointer every time. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit d229f7de70610a1983842e7a113db26c053bc592 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 17:54:34 2017 +0000 xen/arm: efi: Avoid duplicating the addition of a new efi memory descriptor The code to add a new memory descriptor is duplicated three times. Add a new helper that adds the descriptor. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 2c277ddb77ba054bb8c4c882d98618556d334f12 Author: Julien Grall <julien.grall@xxxxxxx> Date: Wed Mar 8 17:54:33 2017 +0000 xen/arm: efi: Avoid duplicating the addition of a new bank The code to add a new bank is duplicated twice. Add a new helper that checks if the maximum of bank has not reached and adds the bank. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 4cb22710d42a425b811fab622ced8ec622858116 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Mar 8 15:19:02 2017 +0100 x86: drop underscore prefixed 32-bit register names Now that all underscore prefixed instances have been replaced, this concludes the register renaming project. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit ca8cdc176a3f1785f907ed7fcf410412036f77a4 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Mar 8 15:15:19 2017 +0100 x86/hypercall: switch away from temporary 32-bit register names Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 1ecc8fd1660a8448840713bc917a4bab89fc43b9 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Mar 8 15:14:43 2017 +0100 x86emul: switch away from temporary 32-bit register names Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 0489efef749e064efd0eba5fb45cf9f229fb22aa Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:11:06 2017 +0100 x86/mce: remove ASSERT's about mce_[u|d]handler_num in mce_action() Those assertions as well as mce_[u|d]handlers[], mce_[u|d]handler_num and mce_action() were intel only and lifted to the common code by c/s 3a91769d6e1. However, MCE handling on AMD does not use mce_[u|d]handlers[] before and after that commit, so assertions in mce_action() about their size do not make sense for AMD. To be worse, they can crash the debug build on AMD. Remove them to make the debug build work on AMD. Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit 6fd56bc825e633470fb0807785cd32dbee8182a6 Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:10:45 2017 +0100 x86/mce: clear MSR_IA32_MCG_STATUS by writing 0 On Intel CPU, an attemp to write to MSR_IA32_MCG_STATUS with any non-zero value would result in #GP. This commit writes 0 on AMD CPU as well instead of just clearing MCIP bit, because all non-reserved bits of MSR_IA32_MCG_STATUS have been handled at this point. Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> commit 795b988e7c3d271c9472d4b9150b57a3e5b5a50b Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:10:29 2017 +0100 x86/vmce: fill MSR_IA32_MCG_STATUS on all vcpus in broadcast case The current implementation only fills MC MSRs on vcpu0 and leaves MC MSRs on other vcpus empty in the broadcast case. When guest reads 0 from MSR_IA32_MCG_STATUS on vcpuN (N > 0), it may think it's not possible to recover the execution on that vcpu and then get panic, although MSR_IA32_MCG_STATUS filled on vcpu0 may imply the injected vMCE is actually recoverable. To avoid such unnecessary guest panic, set MSR_IA32_MCG_STATUS on vcpuN (N > 0) to MCG_STATUS_MCIP|MCG_STATUS_RIPV. In addition, fill_vmsr_data(mc_bank, ...) is changed to return -EINVAL rather than 0, if an invalid domain ID is contained in mc_bank. Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit 2bb81abf0430cbe9a7d4dd29f32ee1d0b47a16d7 Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:10:06 2017 +0100 x86/mce: set mcinfo_comm.type and .size in x86_mcinfo_reserve() All existing calls to x86_mcinfo_reserve() are followed by statements that set the size and the type of the reserved space, so move them into x86_mcinfo_reserve() to simplify the code. Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit 9dfba75334d31aa09a66ff5476ddf16595a41697 Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:09:46 2017 +0100 x86/mce: remove unused x86_mcinfo_add() c/s 9d13fd9fd320a7740c6446c048ff6a2990095966 turned to update the mcinfo buffer in-place instead of using x86_mcinfo_add(). The last uses of x86_mcinfo_add() were removed by that commit as well. Therefore, x86_mcinfo_add() was deprecated in fact. Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit f735aa5356afef66bc0d3b8fc645955006aebc0d Author: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Date: Wed Mar 8 15:09:16 2017 +0100 x86/mce: adjust comment of callback register functions c/s e966818264908e842e2847f579ca4d94e586eaac added mce_need_clearbank_register below the comment of x86_mce_callback_register(). This commit (1) adjusts the first paragraph of comment to be a general statement of all callback register functions, and (2) moves the second paragraph to the front of x86_mce_callback_register(). Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> commit bf118558984ebd42843bc81f873b3f378aca4fdd Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Mar 8 15:07:41 2017 +0100 x86/MCE: sanitize domain/vcpu ID handling Storing -1 into both fields was misleading consumers: We really should have a manifest constant for "invalid vCPU" here, and the already existing DOMID_INVALID should be used. Also correct a bogus (dead code) check in mca_init_global(), at once introducing a manifest constant for the early boot "invalid vCPU" pointer (avoiding proliferation of the open coding). Make that pointer a non-canonical address at once. Finally, don't leave mc_domid uninitialized in mca_init_bank(). Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> commit 7b726df89c2ec55aeb19cd37395777091c1c32fa Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Mar 8 15:07:14 2017 +0100 MAINTAINERS: drop Christoph Egger Other Amazon folks indicate he's not available as a maintainer anymore at this point in time. Maintenance of the MCE sub-component will fall back to the x86 maintainers. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Christoph Egger <chegger@xxxxxxxxx> commit f9adc1e66098e96861af49ca2d5a223ad654dec6 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Mar 7 23:32:24 2017 +0000 x86/emul: Avoid #UD in SIMD stubs v{,u}comis{s,d}, and vcvt{,t}s{s,d}2si are two-operand instructions, while vzero{all,upper} take no operands. Each require vex.reg set to ~0 to avoid suffering #UD. Spotted while fuzzing with AFL Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit 4361e80d228655b100bae5d19b489b39d20aa68d Author: Paul Durrant <paul.durrant@xxxxxxxxxx> Date: Tue Mar 7 14:58:04 2017 +0000 vlapic/viridian: abort existing APIC assist if any vector is pending in ISR The vlapic code already aborts an APIC assist if an interrupt is deferred because a higher priority interrupt has already been delivered (and hence its vector is pending in the ISR). However, it is also necessary to abort an APIC assist in the case where a higher priority is about to be delivered because, in either case, at least two vectors will be pending in the ISR and hence an EOI is necessary. Also, following on from the above reasoning, the decision to start a new APIC assist should clearly be based upon whether any other vector is pending in the ISR, regardless of whether it is lower or higher in priority. (In fact the code in question cannot be reached if the vector is lower in priority). Thus the single use of vlapic_find_lowest_vector() can be replaced with a call to vlapic_find_highest_isr() and the former function removed. Without this patch, because the logic is flawed, a domain_crash() results when an attempt is made to erroneously start a new APIC assist. Reported-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit c2e316b2f220af06dab76b1219e61441c31f6ff9 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Mon Mar 6 10:29:17 2017 +0000 x86/emul: Correct the decoding of mov to/from cr/dr The mov to/from cr/dr behave as if they were encoded with Mod = 3. When encoded with Mod != 3, no displacement or SIB bytes are fetched. Add a test with a deliberately malformed ModRM byte. (Also add the automatically-generated simd.h to .gitignore.) Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> (qemu changes not included) _______________________________________________ osstest-output mailing list osstest-output@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/cgi-bin/mailman/listinfo/osstest-output
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