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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen-unstable baseline-only test] 71115: tolerable trouble: blocked/broken/fail/pass
This run is configured for baseline tests only. flight 71115 xen-unstable real [real] http://osstest.xs.citrite.net/~osstest/testlogs/logs/71115/ Failures :-/ but no regressions. Regressions which are regarded as allowable (not blocking): test-amd64-amd64-xl 6 xen-boot fail baseline untested test-armhf-armhf-libvirt 13 saverestore-support-check fail baseline untested test-armhf-armhf-libvirt-xsm 13 saverestore-support-check fail baseline untested test-armhf-armhf-libvirt-raw 12 saverestore-support-check fail baseline untested test-armhf-armhf-libvirt-raw 14 guest-start/debian.repeat fail baseline untested test-amd64-amd64-qemuu-nested-intel 16 debian-hvm-install/l1/l2 fail baseline untested test-amd64-i386-xl-qemut-debianhvm-amd64 20 leak-check/check fail baseline untested test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop fail baseline untested test-amd64-i386-xl-qemut-winxpsp3-vcpus1 9 windows-install fail baseline untested test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 9 windows-install fail baseline untested test-amd64-amd64-xl-qemut-winxpsp3 9 windows-install fail baseline untested Tests which did not succeed, but are not blocking: test-arm64-arm64-libvirt-xsm 1 build-check(1) blocked n/a test-arm64-arm64-xl 1 build-check(1) blocked n/a build-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-libvirt-qcow2 1 build-check(1) blocked n/a test-arm64-arm64-libvirt 1 build-check(1) blocked n/a test-arm64-arm64-xl-credit2 1 build-check(1) blocked n/a test-arm64-arm64-xl-rtds 1 build-check(1) blocked n/a test-arm64-arm64-xl-multivcpu 1 build-check(1) blocked n/a test-arm64-arm64-xl-xsm 1 build-check(1) blocked n/a build-arm64 2 hosts-allocate broken never pass build-arm64-pvops 2 hosts-allocate broken never pass build-arm64-xsm 2 hosts-allocate broken never pass build-arm64-xsm 3 capture-logs broken never pass build-arm64 3 capture-logs broken never pass build-arm64-pvops 3 capture-logs broken never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-armhf-armhf-xl-midway 12 migrate-support-check fail never pass test-armhf-armhf-xl-midway 13 saverestore-support-check fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass test-amd64-i386-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-amd64-i386-xl-qemut-win7-amd64 16 guest-stop fail never pass test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail never pass test-amd64-amd64-xl-qemut-win7-amd64 16 guest-stop fail never pass version targeted for testing: xen ac9ff74f39a734756af90ccbb7184551f7b1e22a baseline version: xen 5b08f85689a8479f947be74563fe993875b9caa9 Last test of basis 71104 2017-03-27 05:53:25 Z 1 days Testing same since 71115 2017-03-28 18:14:51 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Dario Faggioli <dario.faggioli@xxxxxxxxxx> George Dunlap <george.dunlap@xxxxxxxxxx> Jan Beulich <jbeulich@xxxxxxxx> Paul Durrant <paul.durrant@xxxxxxxxxx> Tim Deegan <tim@xxxxxxx> Wei Liu <wei.liu2@xxxxxxxxxx> jobs: build-amd64-xsm pass build-arm64-xsm broken build-armhf-xsm pass build-i386-xsm pass build-amd64-xtf pass build-amd64 pass build-arm64 broken build-armhf pass build-i386 pass build-amd64-libvirt pass build-arm64-libvirt blocked build-armhf-libvirt pass build-i386-libvirt pass build-amd64-oldkern pass build-i386-oldkern pass build-amd64-prev pass build-i386-prev pass build-amd64-pvops pass build-arm64-pvops broken build-armhf-pvops pass build-i386-pvops pass build-amd64-rumprun pass build-i386-rumprun pass test-xtf-amd64-amd64-1 pass test-xtf-amd64-amd64-2 pass test-xtf-amd64-amd64-3 pass test-xtf-amd64-amd64-4 pass test-xtf-amd64-amd64-5 pass test-amd64-amd64-xl fail test-arm64-arm64-xl blocked test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-xsm pass test-arm64-arm64-libvirt-xsm blocked test-armhf-armhf-libvirt-xsm pass test-amd64-i386-libvirt-xsm pass test-amd64-amd64-xl-xsm pass test-arm64-arm64-xl-xsm blocked test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd pass test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemut-debianhvm-amd64 pass test-amd64-i386-xl-qemut-debianhvm-amd64 fail test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-rumprun-amd64 pass test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-amd64-amd64-xl-credit2 pass test-arm64-arm64-xl-credit2 blocked test-armhf-armhf-xl-credit2 pass test-amd64-i386-freebsd10-i386 pass test-amd64-i386-rumprun-i386 pass test-amd64-amd64-qemuu-nested-intel fail test-amd64-amd64-xl-pvh-intel pass test-amd64-i386-qemut-rhel6hvm-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-arm64-arm64-libvirt blocked test-armhf-armhf-libvirt pass test-amd64-i386-libvirt pass test-armhf-armhf-xl-midway pass test-amd64-amd64-migrupgrade pass test-amd64-i386-migrupgrade pass test-amd64-amd64-xl-multivcpu pass test-arm64-arm64-xl-multivcpu blocked test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-arm64-arm64-libvirt-qcow2 blocked test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw fail test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds pass test-arm64-arm64-xl-rtds blocked test-armhf-armhf-xl-rtds pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 fail test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 fail test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd pass test-amd64-amd64-xl-qemut-winxpsp3 fail test-amd64-i386-xl-qemut-winxpsp3 pass test-amd64-amd64-xl-qemuu-winxpsp3 pass test-amd64-i386-xl-qemuu-winxpsp3 pass ------------------------------------------------------------ sg-report-flight on osstest.xs.citrite.net logs: /home/osstest/logs images: /home/osstest/images Logs, config files, etc. are available at http://osstest.xs.citrite.net/~osstest/testlogs/logs Test harness code can be found at http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary broken-step build-arm64 hosts-allocate broken-step build-arm64-pvops hosts-allocate broken-step build-arm64-xsm hosts-allocate broken-step build-arm64-xsm capture-logs broken-step build-arm64 capture-logs broken-step build-arm64-pvops capture-logs Push not applicable. ------------------------------------------------------------ commit ac9ff74f39a734756af90ccbb7184551f7b1e22a Author: Wei Liu <wei.liu2@xxxxxxxxxx> Date: Mon Mar 27 12:26:56 2017 +0100 x86: clarify shadow paging Dom0 support Classic PV shadow paging Dom0 has been broken for years, and can't possibly be configured after 4045953. PVH shadow paging Dom0 should still be possible. Change the code and documentation to clarify that. Signed-off-by: Wei Liu <wei.liu2@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper@xxxxxxxxxx> commit a3653e6a279213ba4e883b2252415dc98633106a Author: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Date: Fri Mar 17 19:19:37 2017 +0100 xen: sched: don't call hooks of the wrong scheduler via VCPU2OP Within context_saved(), we call the context_saved hook, and we use VCPU2OP() to determine from what scheduler. VCPU2OP uses DOM2OP, which uses d->cpupool, which is NULL when d is the idle domain. And in that case, DOM2OP just returns ops, the scheduler of cpupool0. Therefore, if: - cpupool0's scheduler defines context_saved (like Credit2 and RTDS do), - we are not in cpupool0 (i.e., our scheduler is not ops), - we are context switching from idle, we call VCPU2OP(idle_vcpu), which means DOM2OP(idle->cpupool), which is ops. Therefore, we both: - check if context_saved is defined in the wrong scheduler; - if yes, call the wrong one. When using Credit2 at boot, and also Credit2 in the other cpupool, this is wrong but innocuous, because it only involves the idle vcpus. When using Credit2 at boot, and Credit1 in the other cpupool, this is *totally* wrong, and it's by chance it does not explode! When using Credit2 and other schedulers I'm developping, I hit the following assert (in sched_credit2.c, on a CPU inside a cpupool that does not use Credit2): csched2_context_saved() { ... ASSERT(!vcpu_on_runq(svc)); ... } Fix this by dealing explicitly, in VCPU2OP, with idle vcpus, returning the scheduler of the pCPU they (always) run on. Signed-off-by: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Reviewed-by: Juergen Gross <jgross@xxxxxxxx> Reviewed-by: George Dunlap <george.dunlap@xxxxxxxxxx> commit bd819203e05b5204b5d6911294149609cf436387 Author: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Date: Tue Feb 21 12:56:24 2017 +0100 tracing: xenalyze: kill spurious ", " in Credit1 traces. Signed-off-by: Dario Faggioli <dario.faggioli@xxxxxxxxxx> Acked-by: George Dunlap <george.dunlap@xxxxxxxxxx> commit 9a7fbdd6925bd6323941ee8a08b3884aa0cef6fe Author: Paul Durrant <paul.durrant@xxxxxxxxxx> Date: Mon Mar 27 11:51:22 2017 +0100 tools/libxenforeignmemory: bind restrict operation to new version Commit 5823d6eb "add a call to restrict the handle" added a new function to the foreignmemory API. This API is considered stable and so the new function should be bound to a new version. This patch creates version 1.1 of the API, dependent on version 1.0, and binds the restrict call to version 1.1. Thus version 1.0 is as it was before the new function was added. Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx> Acked-by: Wei Liu <wei.liu2@xxxxxxxxxx> commit d8868bff6c3f569658e0ba14cdc4cf1891862ee1 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Thu Mar 2 17:45:47 2017 +0000 x86/pagewalk: non-functional cleanup * Drop trailing whitespace * Consistently apply Xen style * Introduce a local variable block Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Tim Deegan <tim@xxxxxxx> commit d9d0dd10794588c7f9a97f21b75916b6fa48630e Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Thu Mar 2 18:07:33 2017 +0000 x86/pagewalk: Improve the logic behind setting access and dirty bits The boolean pse2M is misnamed, because it might refer to a 4M superpage. Switch the logic to be in terms of the level of the leaf entry, and rearrange the calls to set_ad_bits() to be a fallthrough switch statement, to make it easier to follow. Alter set_ad_bits() to take properly typed pointers and booleans rather than integers. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> commit f9964cae8c3ee1c486f14022163e72e2ffd9fe04 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Jul 5 10:40:21 2016 +0100 x86/shadow: Use the pagewalk reserved bits helpers The shadow logic should not create a valid/present shadow of a guest PTE which contains reserved bits from the guests point of view. It is not guaranteed that the hardware pagewalk will come to the same conclusion, and raise a pagefault. Shadows created on demand from the pagefault handler are fine because the pagewalk over the guest tables will have injected the fault into the guest rather than creating a shadow. However, shadows created by sh_resync_l1() and sh_prefetch() haven't undergone a pagewalk and need to account for reserved bits before creating the shadow. In practice, this means a 3-level guest could previously cause PTEs with bits 63:52 set to be shadowed (and discarded). This PTE should cause #PF[RSVD] when encountered by hardware, but the installed shadow is valid and hardware doesn't fault. Reuse the pagewalk reserved bits helpers, and assert in l?e_propagate_from_guest() that shadows are not attempted to be created with reserved bits set. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> commit 4c5d78a10dc89427140a50a1df5a0b8e9f073e82 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue Jun 14 20:52:57 2016 +0100 x86/pagewalk: Re-implement the pagetable walker The existing pagetable walker has complicated return semantics, which squeeze multiple pieces of information into single integer. This would be fine if the information didn't overlap, but it does. Specifically, _PAGE_INVALID_BITS for 3-level guests alias _PAGE_PAGED and _PAGE_SHARED. A guest which constructs a PTE with bits 52 or 53 set (the start of the upper software-available range) will create a virtual address which, when walked by Xen, tricks Xen into believing the frame is paged or shared. This behaviour was introduced by XSA-173 (c/s 8b17648). It is also complicated to turn rc back into a normal pagefault error code. Instead, change the calling semantics to return a boolean indicating success, and have the function accumulate a real pagefault error code as it goes (including synthetic error codes, which do not alias hardware ones). This requires an equivalent adjustment to map_domain_gfn(). Issues fixed: * 2-level PSE36 superpages now return the correct translation. * 2-level L2 superpages without CR0.PSE now return the correct translation. * SMEP now inhibits a user instruction fetch even if NX isn't active. * Supervisor writes without CR0.WP now set the leaf dirty bit. * L4e._PAGE_GLOBAL is strictly reserved on AMD. * 3-level l3 entries have all reserved bits checked. * 3-level entries can no longer alias Xen's idea of paged or shared. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> Reviewed-by: George Dunlap <george.dunlap@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> commit 16f2ad1fe96373c8e656365738bdae1598c40006 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Tue May 24 15:46:01 2016 +0100 x86/pagewalk: Helpers for reserved bit handling Some bits are unconditionally reserved in pagetable entries, or reserved because of alignment restrictions. Other bits are reserved because of control register configuration. Introduce helpers which take an individual vcpu and guest pagetable entry, and calculates whether any reserved bits are set. While here, add a couple of newlines to aid readability. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> commit c68a88583e588f6fb987f5dcb730817512277a6a Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Thu Mar 2 14:55:38 2017 +0000 x86/pagewalk: Clean up guest_supports_* predicates Switch them to returning bool, and taking const parameters. Rename guest_supports_superpages() to guest_can_use_l2_superpages() to indicate which level of pagetables it is actually referring to as well as indicating that it is more complicated than just control register settings, and rename guest_supports_1G_superpages() to guest_can_use_l3_superpages() for consistency. guest_can_use_l3_superpages() is a static property of the domain, rather than control register settings, so is switched to take a domain pointer. hvm_pse1gb_supported() is inlined into its sole user because it isn't strictly hvm-specific (it is hap-specific) and really should be beside a comment explaining why the cpuid policy is ignored. guest_supports_nx() on the other hand refers simply to a control register bit, and is renamed to guest_nx_enabled(). While cleaning up part of the file, clean up all trailing whilespace, and fix one comment which accidently refered to PG living in CR4 rather than CR0. Requested-by: Jan Beulich <jbeulich@xxxxxxxx> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Tim Deegan <tim@xxxxxxx> (qemu changes not included) _______________________________________________ osstest-output mailing list osstest-output@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/cgi-bin/mailman/listinfo/osstest-output
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