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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [qemu-mainline test] 110968: regressions - FAIL
flight 110968 qemu-mainline real [real] http://logs.test-lab.xenproject.org/osstest/logs/110968/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-i386-xl-qemuu-win7-amd64 15 guest-localmigrate/x10 fail REGR. vs. 110925 test-amd64-amd64-qemuu-nested-intel 16 debian-hvm-install/l1/l2 fail REGR. vs. 110925 Tests which did not succeed, but are not blocking: test-armhf-armhf-libvirt 13 saverestore-support-check fail like 110925 test-armhf-armhf-libvirt-xsm 13 saverestore-support-check fail like 110925 test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop fail like 110925 test-armhf-armhf-libvirt-raw 12 saverestore-support-check fail like 110925 test-amd64-amd64-xl-rtds 9 debian-install fail like 110925 test-armhf-armhf-xl-rtds 15 guest-start/debian.repeat fail like 110925 test-amd64-amd64-xl-qemuu-ws16-amd64 9 windows-install fail never pass test-amd64-i386-libvirt 12 migrate-support-check fail never pass test-amd64-i386-libvirt-xsm 12 migrate-support-check fail never pass test-amd64-amd64-libvirt-xsm 12 migrate-support-check fail never pass test-arm64-arm64-xl-credit2 12 migrate-support-check fail never pass test-arm64-arm64-xl-credit2 13 saverestore-support-check fail never pass test-arm64-arm64-xl-xsm 12 migrate-support-check fail never pass test-arm64-arm64-xl-xsm 13 saverestore-support-check fail never pass test-arm64-arm64-libvirt-xsm 12 migrate-support-check fail never pass test-arm64-arm64-libvirt-xsm 13 saverestore-support-check fail never pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check fail never pass test-arm64-arm64-xl 12 migrate-support-check fail never pass test-arm64-arm64-xl 13 saverestore-support-check fail never pass test-amd64-amd64-libvirt-vhd 11 migrate-support-check fail never pass test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2 fail never pass test-armhf-armhf-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 12 migrate-support-check fail never pass test-armhf-armhf-xl-multivcpu 13 saverestore-support-check fail never pass test-armhf-armhf-xl-xsm 12 migrate-support-check fail never pass test-armhf-armhf-xl-xsm 13 saverestore-support-check fail never pass test-armhf-armhf-xl-cubietruck 12 migrate-support-check fail never pass test-armhf-armhf-xl-cubietruck 13 saverestore-support-check fail never pass test-amd64-i386-xl-qemuu-ws16-amd64 12 guest-saverestore fail never pass test-amd64-amd64-libvirt 12 migrate-support-check fail never pass test-armhf-armhf-libvirt-raw 11 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 12 migrate-support-check fail never pass test-armhf-armhf-xl-credit2 13 saverestore-support-check fail never pass test-armhf-armhf-xl 12 migrate-support-check fail never pass test-armhf-armhf-xl-arndale 12 migrate-support-check fail never pass test-armhf-armhf-xl 13 saverestore-support-check fail never pass test-armhf-armhf-xl-arndale 13 saverestore-support-check fail never pass test-armhf-armhf-xl-rtds 12 migrate-support-check fail never pass test-armhf-armhf-xl-rtds 13 saverestore-support-check fail never pass test-armhf-armhf-xl-vhd 11 migrate-support-check fail never pass test-armhf-armhf-xl-vhd 12 saverestore-support-check fail never pass test-amd64-i386-xl-qemuu-win10-i386 9 windows-install fail never pass test-amd64-amd64-xl-qemuu-win10-i386 9 windows-install fail never pass version targeted for testing: qemuu db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11 baseline version: qemuu 8dfaf23ae1f2273a9730a9b309cc8471269bb524 Last test of basis 110925 2017-06-21 10:21:59 Z 2 days Testing same since 110968 2017-06-22 10:49:28 Z 1 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Alex Bennée <alex.bennee@xxxxxxxxxx> Emilio G. Cota <cota@xxxxxxxxx> Geert Martin Ijewski <gm.ijewski@xxxxxx> Peter Maydell <peter.maydell@xxxxxxxxxx> Richard Henderson <rth@xxxxxxxxxxx> jobs: build-amd64-xsm pass build-arm64-xsm pass build-armhf-xsm pass build-i386-xsm pass build-amd64 pass build-arm64 pass build-armhf pass build-i386 pass build-amd64-libvirt pass build-arm64-libvirt pass build-armhf-libvirt pass build-i386-libvirt pass build-amd64-pvops pass build-arm64-pvops pass build-armhf-pvops pass build-i386-pvops pass test-amd64-amd64-xl pass test-arm64-arm64-xl pass test-armhf-armhf-xl pass test-amd64-i386-xl pass test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm pass test-amd64-amd64-libvirt-xsm pass test-arm64-arm64-libvirt-xsm pass test-armhf-armhf-libvirt-xsm pass test-amd64-i386-libvirt-xsm pass test-amd64-amd64-xl-xsm pass test-arm64-arm64-xl-xsm pass test-armhf-armhf-xl-xsm pass test-amd64-i386-xl-xsm pass test-amd64-amd64-qemuu-nested-amd fail test-amd64-amd64-xl-pvh-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-amd64-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-xl-qemuu-debianhvm-amd64 pass test-amd64-i386-freebsd10-amd64 pass test-amd64-amd64-xl-qemuu-ovmf-amd64 pass test-amd64-i386-xl-qemuu-ovmf-amd64 pass test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-amd64-amd64-xl-qemuu-ws16-amd64 fail test-amd64-i386-xl-qemuu-ws16-amd64 fail test-armhf-armhf-xl-arndale pass test-amd64-amd64-xl-credit2 pass test-arm64-arm64-xl-credit2 pass test-armhf-armhf-xl-credit2 pass test-armhf-armhf-xl-cubietruck pass test-amd64-i386-freebsd10-i386 pass test-amd64-amd64-xl-qemuu-win10-i386 fail test-amd64-i386-xl-qemuu-win10-i386 fail test-amd64-amd64-qemuu-nested-intel fail test-amd64-amd64-xl-pvh-intel pass test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-amd64-libvirt pass test-armhf-armhf-libvirt pass test-amd64-i386-libvirt pass test-amd64-amd64-xl-multivcpu pass test-armhf-armhf-xl-multivcpu pass test-amd64-amd64-pair pass test-amd64-i386-pair pass test-amd64-amd64-libvirt-pair pass test-amd64-i386-libvirt-pair pass test-amd64-amd64-amd64-pvgrub pass test-amd64-amd64-i386-pvgrub pass test-amd64-amd64-pygrub pass test-amd64-amd64-xl-qcow2 pass test-armhf-armhf-libvirt-raw pass test-amd64-i386-xl-raw pass test-amd64-amd64-xl-rtds fail test-armhf-armhf-xl-rtds fail test-amd64-amd64-libvirt-vhd pass test-armhf-armhf-xl-vhd pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11 Merge: 8dfaf23 8da54b2 Author: Peter Maydell <peter.maydell@xxxxxxxxxx> Date: Thu Jun 22 10:25:03 2017 +0100 Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into staging Queued TCG patches # gpg: Signature made Mon 19 Jun 2017 19:12:06 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@xxxxxxxxx>" # gpg: aka "Richard Henderson <rth@xxxxxxxxxx>" # gpg: aka "Richard Henderson <rth@xxxxxxxxxxx>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170619: target/arm: Exit after clearing aarch64 interrupt mask target/s390x: Exit after changing PSW mask target/alpha: Use tcg_gen_lookup_and_goto_ptr tcg: Increase hit rate of lookup_tb_ptr tcg/arm: Use ldr (literal) for goto_tb tcg/arm: Try pc-relative addresses for movi tcg/arm: Remove limit on code buffer size tcg/arm: Use indirect branch for goto_tb tcg/aarch64: Use ADR in tcg_out_movi translate-all: consolidate tb init in tb_gen_code tcg: allocate TB structs before the corresponding translated code util: add cacheinfo Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx> commit 8da54b2507c1cabf60c2de904cf0383b23239231 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Wed Jun 14 12:39:54 2017 -0700 target/arm: Exit after clearing aarch64 interrupt mask Exit to cpu loop so we reevaluate cpu_arm_hw_interrupts. Tested-by: Emilio G. Cota <cota@xxxxxxxxx> Tested-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Reviewed-by: Emilio G. Cota <cota@xxxxxxxxx> Reviewed-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 542f70c22edd22367373b4cb34d3c478f1ac7c0f Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Wed Jun 14 12:09:50 2017 -0700 target/s390x: Exit after changing PSW mask Exit to cpu loop so we reevaluate cpu_s390x_hw_interrupts. Reviewed-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 54e1d4ed1dcdae27b8c02575c155c26434579485 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Fri May 26 13:31:49 2017 -0700 target/alpha: Use tcg_gen_lookup_and_goto_ptr Tested-by: Emilio G. Cota <cota@xxxxxxxxx> Reviewed-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit b97a879de980e99452063851597edb98e7e8039c Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Wed Jun 14 08:18:36 2017 -0700 tcg: Increase hit rate of lookup_tb_ptr We can call tb_htable_lookup even when the tb_jmp_cache is completely empty. Therefore, un-nest most of the code dependent on tb != NULL from the read from the cache. This improves the hit rate of lookup_tb_ptr; for instance, when booting and immediately shutting down debian-arm, the hit rate improves from 93.2% to 99.4%. Reviewed-by: Alex Bennée <alex.bennee@xxxxxxxxxx> Signed-off-by: Emilio G. Cota <cota@xxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 308714e6bc945389c64faf1b9213e2c0d3f03391 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Mon Jun 5 19:42:51 2017 -0400 tcg/arm: Use ldr (literal) for goto_tb The new placement of the TB means that we can use one insn to load the goto_tb destination directly from the TB. Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 9c39b94f1448770e7e573e9516d2483816785d1b Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Mon Jun 5 20:18:54 2017 -0400 tcg/arm: Try pc-relative addresses for movi Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit acb0b292b6d0f49972dc98f742e79ed53973e438 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Mon Jun 5 19:15:25 2017 -0400 tcg/arm: Remove limit on code buffer size Since we're no longer using a direct branch, we have no limit on the branch distance. Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 3fb53fb4d12f2e7833bd1659e6013237b130ef20 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Mon Jun 5 19:13:56 2017 -0400 tcg/arm: Use indirect branch for goto_tb Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit cc74d332ff9a78684374847375ef63fc4bd10436 Author: Richard Henderson <rth@xxxxxxxxxxx> Date: Mon Jun 5 12:12:59 2017 -0700 tcg/aarch64: Use ADR in tcg_out_movi The new placement of the TB means that we can use one insn to load the return value for exit_tb returning the TB pointer. Tested-by: Emilio G. Cota <cota@xxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 2b48e10f888059a98043b4816769fa2a326a1d2c Author: Emilio G. Cota <cota@xxxxxxxxx> Date: Fri Jun 9 15:55:22 2017 -0400 translate-all: consolidate tb init in tb_gen_code We are partially initializing tb in tb_alloc. Instead, fully initialize it in tb_gen_code, which is tb_alloc's only caller. This saves an unnecessary write to tb->cflags. Signed-off-by: Emilio G. Cota <cota@xxxxxxxxx> Message-Id: <1497038122-26364-1-git-send-email-cota@xxxxxxxxx> Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit 6e3b2bfd6af488a896f7936e99ef160f8f37e6f2 Author: Emilio G. Cota <cota@xxxxxxxxx> Date: Tue Jun 6 19:12:25 2017 -0400 tcg: allocate TB structs before the corresponding translated code Allocating an arbitrarily-sized array of tbs results in either (a) a lot of memory wasted or (b) unnecessary flushes of the code cache when we run out of TB structs in the array. An obvious solution would be to just malloc a TB struct when needed, and keep the TB array as an array of pointers (recall that tb_find_pc() needs the TB array to run in O(log n)). Perhaps a better solution, which is implemented in this patch, is to allocate TB's right before the translated code they describe. This results in some memory waste due to padding to have code and TBs in separate cache lines--for instance, I measured 4.7% of padding in the used portion of code_gen_buffer when booting aarch64 Linux on a host with 64-byte cache lines. However, it can allow for optimizations in some host architectures, since TCG backends could safely assume that the TB and the corresponding translated code are very close to each other in memory. See this message by rth for a detailed explanation: https://lists.gnu.org/archive/html/qemu-devel/2017-03/msg05172.html Subject: Re: GSoC 2017 Proposal: TCG performance enhancements Message-ID: <1e67644b-4b30-887e-d329-1848e94c9484@xxxxxxxxxxx> Suggested-by: Richard Henderson <rth@xxxxxxxxxxx> Reviewed-by: Pranith Kumar <bobby.prani@xxxxxxxxx> Signed-off-by: Emilio G. Cota <cota@xxxxxxxxx> Message-Id: <1496790745-314-3-git-send-email-cota@xxxxxxxxx> [rth: Simplify the arithmetic in tcg_tb_alloc] Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> commit b255b2c8a5484742606e8760870ba3e14d0c9605 Author: Emilio G. Cota <cota@xxxxxxxxx> Date: Tue Jun 6 20:17:04 2017 -0400 util: add cacheinfo Add helpers to gather cache info from the host at init-time. For now, only export the host's I/D cache line sizes, which we will use to improve cache locality to avoid false sharing. Suggested-by: Richard Henderson <rth@xxxxxxxxxxx> Suggested-by: Geert Martin Ijewski <gm.ijewski@xxxxxx> Tested-by: Geert Martin Ijewski <gm.ijewski@xxxxxx> Signed-off-by: Emilio G. Cota <cota@xxxxxxxxx> Message-Id: <1496794624-4083-1-git-send-email-cota@xxxxxxxxx> [rth: Move all implementations from tcg/ppc/] Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx> _______________________________________________ osstest-output mailing list osstest-output@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/cgi-bin/mailman/listinfo/osstest-output
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