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[ovmf baseline-only test] 71698: all pass



This run is configured for baseline tests only.

flight 71698 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71698/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 d4f6c35c84b8503bc2acde89a7adb7ee05c56516
baseline version:
 ovmf                 e38eb2595b86434f2d488b0d575af71f07b6428f

Last test of basis    71694  2017-07-15 17:20:09 Z    2 days
Testing same since    71698  2017-07-17 21:19:14 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Jun Nie <jun.nie@xxxxxxxxxx>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit d4f6c35c84b8503bc2acde89a7adb7ee05c56516
Author: Jun Nie <jun.nie@xxxxxxxxxx>
Date:   Fri Jul 7 17:18:45 2017 +0800

    ArmPlatformPkg: Support different PL011 reg offset
    
    ZTE/SanChip version pl011 has different reg offset and bit offset
    for some registers.
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx>
    Reviewed-by: Leif Lindholm <leif.lindholm@xxxxxxxxxx>

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