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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen-unstable-smoke test] 120987: regressions - FAIL
flight 120987 xen-unstable-smoke real [real] http://logs.test-lab.xenproject.org/osstest/logs/120987/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-arm64-arm64-xl-xsm 7 xen-boot fail REGR. vs. 120949 Tests which did not succeed, but are not blocking: test-amd64-amd64-libvirt 13 migrate-support-check fail never pass test-armhf-armhf-xl 13 migrate-support-check fail never pass test-armhf-armhf-xl 14 saverestore-support-check fail never pass version targeted for testing: xen 5cb00d181c799d414438476f3af6e4ecf6afad18 baseline version: xen 7a1358bbe73e5f749c3d2f53478dc1f30720f949 Last test of basis 120949 2018-03-19 02:41:07 Z 1 days Testing same since 120987 2018-03-20 10:02:16 Z 0 days 1 attempts ------------------------------------------------------------ People who touched revisions under test: Andre Przywara <andre.przywara@xxxxxxx> Andre Przywara <andre.przywara@xxxxxxxxxx> Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Julien Grall <julien.grall@xxxxxxx> Stefano Stabellini <sstabellini@xxxxxxxxxx> jobs: build-arm64-xsm pass build-amd64 pass build-armhf pass build-amd64-libvirt pass test-armhf-armhf-xl pass test-arm64-arm64-xl-xsm fail test-amd64-amd64-xl-qemuu-debianhvm-i386 pass test-amd64-amd64-libvirt pass ------------------------------------------------------------ sg-report-flight on osstest.test-lab.xenproject.org logs: /home/logs/logs images: /home/logs/images Logs, config files, etc. are available at http://logs.test-lab.xenproject.org/osstest/logs Explanation of these reports, and of osstest in general, is at http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master Test harness code can be found at http://xenbits.xen.org/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit 5cb00d181c799d414438476f3af6e4ecf6afad18 Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:13 2018 +0000 ARM: GIC: extend LR read/write functions to cover EOI and source So far our LR read/write functions do not handle the EOI bit and the source CPUID bits in an LR, because the current VGIC implementation does not use them. Extend the gic_lr data structure to hold these bits of information by using a union to differentiate field used depending on whether the vIRQ has a corresponding pIRQ. This allows the new VGIC to use this information. This is based on the original patch sent by Andre Przywara [1]. [1] https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg00435.html Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit ee375749052c649fc2710c73c7ce5371393f7742 Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:12 2018 +0000 xen/arm: GIC: Only set pirq in the LR when hw_status is set The field pirq should only be valid when the virtual interrupt is associated to a physical interrupt. This change will help to extend gic_lr for supporting specific virtual interrupt field (e.g eoi, source) that clashes with the PIRQ field. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit ba8e3e422896d420510297011558cfaeb8aa75ce Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:11 2018 +0000 xen/arm: gic: Split the field state in gic_lr in 2 fields active and pending Mostly making the code nicer to read. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 9100b6f0e8fc3ea6e03ab56c9c7538326f654606 Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:10 2018 +0000 xen/arm: gic: Use bool instead of uint8_t for the hw_status in gic_lr hw_status can only be 1 or 0. So convert to a bool. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 5fb8dd60d3d43b20dce4f4bc9091f94200709f93 Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:09 2018 +0000 xen/arm: vgic: Override the group in lr everytime At the moment, write_lr is assuming the caller will set correctly the group. However the group should always be 0 when the guest is using vGICv2 and 1 for vGICv3. As the caller should not care about the group, override it directly. With that change, write_lr is now behaving like update_lr for the group. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 151b0cf14f8dca9b4632d4ad4d54dc2657704c58 Author: Julien Grall <julien.grall@xxxxxxx> Date: Thu Mar 15 20:30:08 2018 +0000 xen/arm: gic: Fix indentation in gic_update_one_lr Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> commit f27009ff9ec478676f1d7635b77975875755e5a2 Author: Andre Przywara <andre.przywara@xxxxxxxxxx> Date: Thu Mar 15 20:30:07 2018 +0000 ARM: Implement vcpu_kick() If we change something in a vCPU that affects its runnability or otherwise needs the vCPU's attention, we might need to tell the scheduler about it. We are using this in one place (vIRQ injection) at the moment, but will need this at more places soon. So let's factor out this functionality, using the already existing vcpu_kick() prototype (used in x86 only so far), to make this available to the rest of the Xen code. Also adjust the perfcounter name to reflect the new usage. Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx> Reviewed-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit cf29708ff6f945d5c00f9b4d2bd88d684e12897f Author: Andre Przywara <andre.przywara@xxxxxxxxxx> Date: Thu Mar 15 20:30:06 2018 +0000 ARM: VGIC: rename gic_event_needs_delivery() gic_event_needs_delivery() is not named very intuitively, especially the gic_ prefix is somewhat misleading. Rename it to vgic_vcpu_pending_irq(), which makes it clear that this relates to the virtual GIC and is about interrupts. Also add a VCPU parameter, which makes the code more flexible in the future. The current VGIC expect this to be the current VCPU, so add an assert to spot any regressions. Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx> Reviewed-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> commit 129666555387709105aca5e2adaad97d60333a3b Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Date: Mon Mar 19 19:13:44 2018 +0000 arm/boot: Mark construct_dom0() as __init Its sole caller, start_xen(), is __init. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Julien Grall <julien.grall@xxxxxxx> (qemu changes not included) _______________________________________________ osstest-output mailing list osstest-output@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/osstest-output
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