[ovmf baseline-only test] 74807: all pass

[Platform Team regression test user <citrix-osstest@xxxxxxxxxxxxxx>]

This run is configured for baseline tests only.

flight 74807 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/74807/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 236601136fea5dcfad4b57ce4a81cf980a22e1f4
baseline version:
 ovmf                 91c31ff04a7a72b4b0e476972ad3c76e03a106a2

Last test of basis    74792  2018-06-06 12:27:22 Z    2 days
Testing same since    74807  2018-06-08 08:49:58 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Dandan Bi <dandan.bi@xxxxxxxxx>
  Ezra Godfrey <egodfrey.qdt@xxxxxxxxxxxxxxxxxxxxxx>
  Liming Gao <liming.gao@xxxxxxxxx>
  Michael Zimmermann <sigmaepsilon92@xxxxxxxxx>
  Star Zeng <star.zeng@xxxxxxxxx>
  Yunhua Feng <yunhuax.feng@xxxxxxxxx>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit 236601136fea5dcfad4b57ce4a81cf980a22e1f4
Author: Liming Gao <liming.gao@xxxxxxxxx>
Date:   Mon Jun 4 13:36:40 2018 +0800

    UefiCpuPkg: Remove X86 ASM and S files
    
    NASM has replaced ASM and S files.
    1. Remove ASM from all modules expect for the ones in ResetVector directory.
    The ones in ResetVector directory are included by Vtf0.nasmb. They are
    also nasm style.
    2. Remove S files from the drivers only.
    3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
    After NASM is updated, S files can be removed from Library.
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Liming Gao <liming.gao@xxxxxxxxx>
    Reviewed-by: Eric Dong <eric.dong@xxxxxxxxx>
    Reviewed-by: Laszlo Ersek <lersek@xxxxxxxxxx>

commit ec51c05936ee46f5a8cc11e3b127e153af3e3943
Author: Liming Gao <liming.gao@xxxxxxxxx>
Date:   Mon Jun 4 13:36:30 2018 +0800

    SourceLevelDebugPkg: Remove X86 ASM and S files
    
    NASM has replaced ASM and S files.
    1. Remove ASM from all modules.
    2. Remove S files from the drivers only.
    3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
    After NASM is updated, S files can be removed from Library.
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Liming Gao <liming.gao@xxxxxxxxx>
    Reviewed-by: Ruiyu Ni <ruiyu.ni@xxxxxxxxx>

commit ccbd8d84a6027394a41ac940177d6ffa418b2384
Author: Liming Gao <liming.gao@xxxxxxxxx>
Date:   Mon Jun 4 13:36:20 2018 +0800

    IntelFrameworkModulePkg: Remove X86 ASM and S files
    
    NASM has replaced ASM and S files.
    1. Remove ASM from all modules.
    2. Remove S files from the drivers only.
    3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
    After NASM is updated, S files can be removed from Library.
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Liming Gao <liming.gao@xxxxxxxxx>
    Reviewed-by: Michael Kinney <michael.d.kinney@xxxxxxxxx>

commit 6d614649abfb4fc80d303467bc1a30851e191fdd
Author: Liming Gao <liming.gao@xxxxxxxxx>
Date:   Mon Jun 4 13:35:58 2018 +0800

    MdeModulePkg: Remove X86 ASM and S files
    
    NASM has replaced ASM and S files.
    1. Remove ASM from all modules.
    2. Remove S files from the drivers only.
    3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
    After NASM is updated, S files can be removed from Library.
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Liming Gao <liming.gao@xxxxxxxxx>
    Reviewed-by: Star Zeng <star.zeng@xxxxxxxxx>

commit 13688930ae9ad5101f10d28f650382058e449616
Author: Liming Gao <liming.gao@xxxxxxxxx>
Date:   Mon Jun 4 13:26:22 2018 +0800

    MdePkg: Remove X86 ASM and S files
    
    NASM has replaced ASM and S files.
    1. Remove ASM from all modules.
    2. Remove S files from the drivers only.
    3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
    After NASM is updated, S files can be removed from Library.
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Liming Gao <liming.gao@xxxxxxxxx>
    Reviewed-by: Michael Kinney <michael.d.kinney@xxxxxxxxx>

commit b20085454e91bb1ded87009722c9994b4684472c
Author: Michael Zimmermann <sigmaepsilon92@xxxxxxxxx>
Date:   Thu Jun 7 09:09:07 2018 +0200

    ArmPkg/ArmDisassemblerLib: fix check for MSR instruction
    
    GCC8 reported it with the following warning:
    ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c: In function 
'DisassembleArmInstruction':
    ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c:397:30: error: bitwise
    comparison always evaluates to false [-Werror=tautological-compare]
    if ((OpCode  & 0x0db00000) == 0x03200000) {
    
    This condition tries to be true for both the immediate and the register
    version of the MSR instruction. They get identified inside the if-block
    using the variable I, which contains the value of bit 25.
    
    The problem with the comparison reported by GCC is that the
    bitmask excludes bit 25, while the value requires it to be set to one:
    0x0db00000: 0000 11011 0 11 00 00 0000 000000000000
    0x03200000: 0000 00110 0 10 00 00 0000 000000000000
                       ^
    So the solution is to just don't require that bit to be set, because
    it gets checked later using 'I', which results in the following value:
    0x01200000: 0000 00010 0 10 00 00 0000 000000000000
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Michael Zimmermann <sigmaepsilon92@xxxxxxxxx>
    Reviewed-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>

commit ec50f7535bc5747a95c6eae3c0907ccdc8ece1a5
Author: Dandan Bi <dandan.bi@xxxxxxxxx>
Date:   Tue Jun 5 10:01:04 2018 +0800

    MdeModulePkg/DisplayUpdateProgressLib: Fix ECC issues
    
    Make the comment align with Edk2 coding style.
    
    Cc: Star Zeng <star.zeng@xxxxxxxxx>
    Cc: Eric Dong <eric.dong@xxxxxxxxx>
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Dandan Bi <dandan.bi@xxxxxxxxx>
    Reviewed-by: Star Zeng <star.zeng@xxxxxxxxx>

commit cb004eb0ad308a4bac86037ce67a56d9ed924e50
Author: Ezra Godfrey <egodfrey.qdt@xxxxxxxxxxxxxxxxxxxxxx>
Date:   Mon Apr 30 22:33:31 2018 +0800

    BaseTools/VolInfo: Update EFI FV FILETYPES for new MM types.
    
    Add support for the following types to VolInfo:
      EFI_FV_FILETYPE_MM_STANDALONE
      EFI_FV_FILETYPE_MM_CORE_STANDALONE
    
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Ezra Godfrey <egodfrey.qdt@xxxxxxxxxxxxxxxxxxxxxx>
    Reviewed-by: Jiewen Yao <jiewen.yao@xxxxxxxxx>

commit 179c2f97f949509ec55f0ec7cb84480fb0c015a7
Author: Yunhua Feng <yunhuax.feng@xxxxxxxxx>
Date:   Thu May 24 10:25:21 2018 +0800

    BaseTools: Display both Hex and integer value format of PCD value
    
    If the PCD's datum type is UINT8, UINT16, UINT32 or UINT64, then in
    the report will display both hexadecimal format and integer format
    of PCD value.
    
    Cc: Liming Gao <liming.gao@xxxxxxxxx>
    Cc: Yonghong Zhu <yonghong.zhu@xxxxxxxxx>
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Yunhua Feng <yunhuax.feng@xxxxxxxxx>
    Reviewed-by: Yonghong Zhu <yonghong.zhu@xxxxxxxxx>

commit 238d9b5c64520acdd784667a29326804dde7ea31
Author: Yunhua Feng <yunhuax.feng@xxxxxxxxx>
Date:   Thu May 24 11:25:21 2018 +0800

    BaseTools: Sort PCD by token space first then by PcdCName
    
    Sort PCD by token space first, then by PcdCName in the build report.
    
    Cc: Liming Gao <liming.gao@xxxxxxxxx>
    Cc: Yonghong Zhu <yonghong.zhu@xxxxxxxxx>
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Yunhua Feng <yunhuax.feng@xxxxxxxxx>
    Reviewed-by: Yonghong Zhu <yonghong.zhu@xxxxxxxxx>

commit 8653ea2088a386075c0d65bfc891ad3c8072db9f
Author: Star Zeng <star.zeng@xxxxxxxxx>
Date:   Tue Jun 5 16:04:38 2018 +0800

    IntelSiliconPkg IntelVTdDxe: Fix incorrect code to clear VTd error
    
    According to VTd spec, Software writes the value read from this
    field (F) to Clear it. But current code is using 0 to clear the
    field, that is incorrect.
    
    And R_FSTS_REG register value clearing should be not in the for loop.
    
    Without this patch, we will see same VTd error message appears again
    and again after it occurs first time.
    
    Cc: Jiewen Yao <jiewen.yao@xxxxxxxxx>
    Contributed-under: TianoCore Contribution Agreement 1.1
    Signed-off-by: Star Zeng <star.zeng@xxxxxxxxx>
    Reviewed-by: Jiewen Yao <jiewen.yao@xxxxxxxxx>

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