[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: Xen article for the FreeBSD Journal
- To: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>
- From: Ayan Kumar Halder <ayankuma@xxxxxxx>
- Date: Fri, 15 Nov 2024 18:40:01 +0000
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=MTbRIAczSJRpfJa8N3C/hkF0wwBVuEBhDXUwau/gUOs=; b=OXvdkpiA7HIooVrKIXmMI1L+o4icPuexh7sVtUHtbGM3q0dzpXn+tjsoriOnEO2yFoJg7Pli8rNrb0nqtYCs6jvES9/rxossopAjMKpr5W6DMt457ngHB5HM5I/qTv5OxcaO4R9+m/Z0u8gyOk2+RNzmKgHeHnIRAgxtdy9NvzQZp1oLRdd32NSvTGJUZjztTggS18cPlhF/j8MS2KGLMumx+v70VPcpBZtm1Bulv0N/SHh+/NSt2ydV/NBemMFM4gvwhG5Reth2tnfEI0za7296PmLkThtf0McJGnueqTzYFBVQgPtf3eHG7NxAevT+zxRfsUJMatRQN5qb2ot5OQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=NdmXDi9ZXhzcQ91pmbBYefkD1VPILrNdNgqvsg9b3CEI8WXJPMPj1RD3lGT8MlyrEL2N5rpHsl0qxnIgAix4mppRFMlpEeu76zNzUNIXyogZ7cVEcHPB2z/duCKZYm0BhvzTwWe7psuOdLcCpPFi2sskLxJ3L2d2a1QL0TnX2MxT2IC4kGqnO0jOnWu9T2GcgomTNr5WoASwf39DiBvjAnYq7TNM2D46wiizcT2T+O83UqtpZyG9nDZ8kspnBwt1MSYPXzv2ouKRhZQeM8upDyUs6G9JjKZ1RRF8OSJc3vgzXYpj3Yb1oubv+IVBJDMwnTipYoSTxOB0T6pTeRrE0w==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com;
- Cc: publicity@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Mon, 18 Nov 2024 08:29:00 +0000
- List-id: "List for Xen Publicity, PR and events" <publicity.lists.xenproject.org>
Hi Roger,
On 15/11/2024 12:23, Roger Pau Monné wrote:
<snip>
I've added the following bullet point ahead of the
dom0less/hyperlaunch one:
* Deterministic interrupt latency: significant efforts have been put into Xen
to ensure interrupt latency remains both low and deterministic, even in the
presence of cache pressure caused by noisy neighbors. There's a patch
series currently in review that adds cache coloring support to Xen.
An additional point worth mentioning (in the context of real time) is
that Xen is being ported on Arm-v8R MPU (memory protection unit) based
system. This is quite significant change in Xen's architecture as it has
always been supported on MMU based systems. With MPU, there is flat
mapping between VA and PA and thus, one can achieve real time effect as
there is no translation involved. There is a limited number of memory
protection regions that can be created by Xen to ensure memory type and
access restrictions on different regions.
This is a work in progress.
- Ayan
|