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RE: Races in power IRP handling path.
- To: Paul Durrant <xadimgnik@xxxxxxxxx>, "win-pv-devel@xxxxxxxxxxxxxxxxxxxx" <win-pv-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Martin Harvey <martin.harvey@xxxxxxxxxx>
- Date: Thu, 13 Oct 2022 08:30:27 +0000
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- Thread-topic: Races in power IRP handling path.
-----Original Message-----
From: Paul Durrant <xadimgnik@xxxxxxxxx>
Sent: 12 October 2022 13:57
To: Martin Harvey <martin.harvey@xxxxxxxxxx>; win-pv-devel@xxxxxxxxxxxxxxxxxxxx
Subject: Re: Races in power IRP handling path.
> I would very much prefer that we kept the power (and pnp) IRP handling as it
> is. It took *years* to debug this stuff and using threads for power IRPs was
> largely because there were too many mind-bending corner cases to do it
> reliably any other way.
OK. Another one for the back-burner. Main wonderings are whether there are any
specific serialisation cases for ACPI/PCI/vGPU where emulation might requires
us to take a more parallel course than is traditionally the case.
MH.
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