[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] vcpu.c, process.c:
ChangeSet 1.1277.1.9, 2005/04/20 12:12:03-06:00, djm@xxxxxxxxxxxxxxx vcpu.c, process.c: correct handling for cr.iha process.c | 4 ++++ vcpu.c | 7 ++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff -Nru a/xen/arch/ia64/process.c b/xen/arch/ia64/process.c --- a/xen/arch/ia64/process.c 2005-05-03 04:03:39 -04:00 +++ b/xen/arch/ia64/process.c 2005-05-03 04:03:39 -04:00 @@ -171,6 +171,10 @@ else if (vector == IA64_INST_TLB_VECTOR) vector = IA64_ALT_INST_TLB_VECTOR; // } + if (vector == IA64_ALT_DATA_TLB_VECTOR || + vector == IA64_ALT_INST_TLB_VECTOR) { + vcpu_thash(ed,ifa,&PSCB(ed,iha)); + } PSCB(ed,unat) = regs->ar_unat; // not sure if this is really needed? PSCB(ed,precover_ifs) = regs->cr_ifs; vcpu_bsw0(ed); diff -Nru a/xen/arch/ia64/vcpu.c b/xen/arch/ia64/vcpu.c --- a/xen/arch/ia64/vcpu.c 2005-05-03 04:03:39 -04:00 +++ b/xen/arch/ia64/vcpu.c 2005-05-03 04:03:39 -04:00 @@ -394,7 +394,10 @@ IA64FAULT vcpu_get_iha(VCPU *vcpu, UINT64 *pval) { - return vcpu_thash(vcpu,PSCB(vcpu,ifa),pval); + //return vcpu_thash(vcpu,PSCB(vcpu,ifa),pval); + UINT64 val = PSCB(vcpu,iha); + *pval = val; + return (IA64_NO_FAULT); } IA64FAULT vcpu_set_dcr(VCPU *vcpu, UINT64 val) @@ -1138,11 +1141,13 @@ UINT64 VHPT_addr = VHPT_addr1 | ((VHPT_addr2a | VHPT_addr2b) << 15) | VHPT_addr3; +#if 0 if (VHPT_addr1 == 0xe000000000000000L) { printf("vcpu_thash: thash unsupported with rr7 @%lx\n", PSCB(vcpu,iip)); return (IA64_ILLOP_FAULT); } +#endif //verbose("vcpu_thash: vadr=%p, VHPT_addr=%p\n",vadr,VHPT_addr); *pval = VHPT_addr; return (IA64_NO_FAULT); _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |