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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] Move per-domain-per-cpu variables out of shared page for security
ChangeSet 1.1423.5.3, 2005/05/09 12:51:24-06:00, djm@xxxxxxxxxxxxxxx
Move per-domain-per-cpu variables out of shared page for security
arch/ia64/asm-offsets.c | 4 -
arch/ia64/process.c | 5 +
arch/ia64/vcpu.c | 134 ++++++++++++++++++++++-----------------------
include/asm-ia64/domain.h | 20 ++++++
include/public/arch-ia64.h | 20 ------
5 files changed, 93 insertions(+), 90 deletions(-)
diff -Nru a/xen/arch/ia64/asm-offsets.c b/xen/arch/ia64/asm-offsets.c
--- a/xen/arch/ia64/asm-offsets.c 2005-05-11 03:03:50 -04:00
+++ b/xen/arch/ia64/asm-offsets.c 2005-05-11 03:03:50 -04:00
@@ -50,8 +50,8 @@
//DEFINE(IA64_TASK_SIGHAND_OFFSET,offsetof (struct task_struct,
sighand));
//DEFINE(IA64_TASK_SIGNAL_OFFSET,offsetof (struct task_struct, signal));
//DEFINE(IA64_TASK_TGID_OFFSET, offsetof (struct task_struct, tgid));
- DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct task_struct,
thread.ksp));
- DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct task_struct,
thread.on_ustack));
+ DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct exec_domain,
arch._thread.ksp));
+ DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct exec_domain,
arch._thread.on_ustack));
BLANK();
diff -Nru a/xen/arch/ia64/process.c b/xen/arch/ia64/process.c
--- a/xen/arch/ia64/process.c 2005-05-11 03:03:50 -04:00
+++ b/xen/arch/ia64/process.c 2005-05-11 03:03:50 -04:00
@@ -51,6 +51,7 @@
IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA)
#define PSCB(x,y) x->vcpu_info->arch.y
+#define PSCBX(x,y) x->arch.y
extern unsigned long vcpu_verbose;
@@ -154,7 +155,7 @@
}
//printf("Delivering NESTED DATA TLB fault\n");
vector = IA64_DATA_NESTED_TLB_VECTOR;
- regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) &
~0xffUL;
+ regs->cr_iip = ((unsigned long) PSCBX(ed,iva) + vector) &
~0xffUL;
regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) |
DELIVER_PSR_SET;
// NOTE: nested trap must NOT pass PSCB address
//regs->r31 = (unsigned long) &PSCB(ed);
@@ -187,7 +188,7 @@
PSCB(ed,ifs) = 0;
PSCB(ed,incomplete_regframe) = 0;
- regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) & ~0xffUL;
+ regs->cr_iip = ((unsigned long) PSCBX(ed,iva) + vector) & ~0xffUL;
regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET;
#ifdef CONFIG_SMP
#error "sharedinfo doesn't handle smp yet"
diff -Nru a/xen/arch/ia64/vcpu.c b/xen/arch/ia64/vcpu.c
--- a/xen/arch/ia64/vcpu.c 2005-05-11 03:03:50 -04:00
+++ b/xen/arch/ia64/vcpu.c 2005-05-11 03:03:50 -04:00
@@ -1,6 +1,6 @@
/*
* Virtualized CPU functions
- *
+ *
* Copyright (C) 2004 Hewlett-Packard Co.
* Dan Magenheimer (dan.magenheimer@xxxxxx)
*
@@ -26,6 +26,7 @@
// this def for vcpu_regs won't work if kernel stack is present
#define vcpu_regs(vcpu) ((struct pt_regs *) vcpu->arch.regs)
#define PSCB(x,y) x->vcpu_info->arch.y
+#define PSCBX(x,y) x->arch.y
#define TRUE 1
#define FALSE 0
@@ -289,9 +290,9 @@
UINT64 vcpu_get_ipsr_int_state(VCPU *vcpu,UINT64 prevpsr)
{
- UINT64 dcr = PSCB(vcpu,dcr);
+ UINT64 dcr = PSCBX(vcpu,dcr);
PSR psr = {0};
-
+
//printf("*** vcpu_get_ipsr_int_state (0x%016lx)...",prevpsr);
psr.i64 = prevpsr;
psr.ia64_psr.be = 0; if (dcr & IA64_DCR_BE) psr.ia64_psr.be = 1;
@@ -317,13 +318,13 @@
//verbose("vcpu_get_dcr: called @%p\n",PSCB(vcpu,iip));
// Reads of cr.dcr on Xen always have the sign bit set, so
// a domain can differentiate whether it is running on SP or not
- *pval = PSCB(vcpu,dcr) | 0x8000000000000000L;
+ *pval = PSCBX(vcpu,dcr) | 0x8000000000000000L;
return (IA64_NO_FAULT);
}
IA64FAULT vcpu_get_iva(VCPU *vcpu, UINT64 *pval)
{
- *pval = PSCB(vcpu,iva) & ~0x7fffL;
+ *pval = PSCBX(vcpu,iva) & ~0x7fffL;
return (IA64_NO_FAULT);
}
@@ -423,13 +424,13 @@
// a domain can differentiate whether it is running on SP or not
// Thus, writes of DCR should ignore the sign bit
//verbose("vcpu_set_dcr: called\n");
- PSCB(vcpu,dcr) = val & ~0x8000000000000000L;
+ PSCBX(vcpu,dcr) = val & ~0x8000000000000000L;
return (IA64_NO_FAULT);
}
IA64FAULT vcpu_set_iva(VCPU *vcpu, UINT64 val)
{
- PSCB(vcpu,iva) = val & ~0x7fffL;
+ PSCBX(vcpu,iva) = val & ~0x7fffL;
return (IA64_NO_FAULT);
}
@@ -523,16 +524,16 @@
return;
}
if (!test_bit(vector,PSCB(vcpu,delivery_mask))) return;
- if (test_bit(vector,PSCB(vcpu,irr))) {
+ if (test_bit(vector,PSCBX(vcpu,irr))) {
//printf("vcpu_pend_interrupt: overrun\n");
}
- set_bit(vector,PSCB(vcpu,irr));
+ set_bit(vector,PSCBX(vcpu,irr));
PSCB(vcpu,pending_interruption) = 1;
}
void early_tick(VCPU *vcpu)
{
- UINT64 *p = &PSCB(vcpu,irr[3]);
+ UINT64 *p = &PSCBX(vcpu,irr[3]);
printf("vcpu_check_pending: about to deliver early tick\n");
printf("&irr[0]=%p, irr[0]=0x%lx\n",p,*p);
}
@@ -550,9 +551,9 @@
{
UINT64 *p, *q, *r, bits, bitnum, mask, i, vector;
- p = &PSCB(vcpu,irr[3]);
+ p = &PSCBX(vcpu,irr[3]);
q = &PSCB(vcpu,delivery_mask[3]);
- r = &PSCB(vcpu,insvc[3]);
+ r = &PSCBX(vcpu,insvc[3]);
for (i = 3; ; p--, q--, r--, i--) {
bits = *p & *q;
if (bits) break; // got a potential interrupt
@@ -592,9 +593,9 @@
#if 0
if (vector == (PSCB(vcpu,itv) & 0xff)) {
UINT64 now = ia64_get_itc();
- UINT64 itm = PSCB(vcpu,domain_itm);
+ UINT64 itm = PSCBX(vcpu,domain_itm);
if (now < itm) early_tick(vcpu);
-
+
}
#endif
return vector;
@@ -654,13 +655,13 @@
i = vector >> 6;
mask = 1L << (vector & 0x3f);
//printf("ZZZZZZ vcpu_get_ivr: setting insvc mask for vector %ld\n",vector);
- PSCB(vcpu,insvc[i]) |= mask;
- PSCB(vcpu,irr[i]) &= ~mask;
+ PSCBX(vcpu,insvc[i]) |= mask;
+ PSCBX(vcpu,irr[i]) &= ~mask;
//PSCB(vcpu,pending_interruption)--;
*pval = vector;
// if delivering a timer interrupt, remember domain_itm
if (vector == (PSCB(vcpu,itv) & 0xff)) {
- PSCB(vcpu,domain_itm_last) = PSCB(vcpu,domain_itm);
+ PSCBX(vcpu,domain_itm_last) = PSCBX(vcpu,domain_itm);
}
return IA64_NO_FAULT;
}
@@ -775,7 +776,7 @@
UINT64 *p, bits, vec, bitnum;
int i;
- p = &PSCB(vcpu,insvc[3]);
+ p = &PSCBX(vcpu,insvc[3]);
for (i = 3; (i >= 0) && !(bits = *p); i--, p--);
if (i < 0) {
printf("Trying to EOI interrupt when none are in-service.\r\n");
@@ -826,8 +827,8 @@
if (val & 0xef00) return (IA64_ILLOP_FAULT);
PSCB(vcpu,itv) = val;
if (val & 0x10000) {
-printf("**** vcpu_set_itv(%d): vitm=%lx, setting to
0\n",val,PSCB(vcpu,domain_itm));
- PSCB(vcpu,domain_itm) = 0;
+printf("**** vcpu_set_itv(%d): vitm=%lx, setting to
0\n",val,PSCBX(vcpu,domain_itm));
+ PSCBX(vcpu,domain_itm) = 0;
}
else vcpu_enable_timer(vcpu,1000000L);
return (IA64_NO_FAULT);
@@ -860,14 +861,14 @@
BOOLEAN vcpu_timer_inservice(VCPU *vcpu)
{
UINT64 itv = PSCB(vcpu,itv);
- return (test_bit(itv, PSCB(vcpu,insvc)));
+ return (test_bit(itv, PSCBX(vcpu,insvc)));
}
BOOLEAN vcpu_timer_expired(VCPU *vcpu)
{
- unsigned long domain_itm = PSCB(vcpu,domain_itm);
+ unsigned long domain_itm = PSCBX(vcpu,domain_itm);
unsigned long now = ia64_get_itc();
-
+
if (!domain_itm) return FALSE;
if (now < domain_itm) return FALSE;
if (vcpu_timer_disabled(vcpu)) return FALSE;
@@ -892,36 +893,36 @@
void vcpu_set_next_timer(VCPU *vcpu)
{
- UINT64 d = PSCB(vcpu,domain_itm);
- //UINT64 s = PSCB(vcpu,xen_itm);
+ UINT64 d = PSCBX(vcpu,domain_itm);
+ //UINT64 s = PSCBX(vcpu,xen_itm);
UINT64 s = local_cpu_data->itm_next;
UINT64 now = ia64_get_itc();
- //UINT64 interval = PSCB(vcpu,xen_timer_interval);
+ //UINT64 interval = PSCBX(vcpu,xen_timer_interval);
/* gloss over the wraparound problem for now... we know it exists
* but it doesn't matter right now */
#if 0
/* ensure at least next SP tick is in the future */
- if (!interval) PSCB(vcpu,xen_itm) = now +
+ if (!interval) PSCBX(vcpu,xen_itm) = now +
#if 0
(running_on_sim() ? SIM_DEFAULT_CLOCK_RATE :
- DEFAULT_CLOCK_RATE);
+ DEFAULT_CLOCK_RATE);
#else
3000000;
//printf("vcpu_set_next_timer: HACK!\n");
#endif
#if 0
- if (PSCB(vcpu,xen_itm) < now)
- while (PSCB(vcpu,xen_itm) < now + (interval>>1))
- PSCB(vcpu,xen_itm) += interval;
+ if (PSCBX(vcpu,xen_itm) < now)
+ while (PSCBX(vcpu,xen_itm) < now + (interval>>1))
+ PSCBX(vcpu,xen_itm) += interval;
#endif
#endif
if (is_idle_task(vcpu->domain)) {
printf("****** vcpu_set_next_timer called during idle!!\n");
}
- //s = PSCB(vcpu,xen_itm);
+ //s = PSCBX(vcpu,xen_itm);
if (d && (d > now) && (d < s)) {
vcpu_safe_set_itm(d);
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