[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] Fix the build on gcc-3.4.x (ia64 files)
# HG changeset patch # User djm@xxxxxxxxxxxxxxx # Node ID 24dd9a53dd95c062f9f4a68489e00a2c3d7bab56 # Parent 36ac9bc7dd154d92934db03980399384c781d4e5 Fix the build on gcc-3.4.x (ia64 files) Signed-off-by: Arun Sharma <arun.sharma@xxxxxxxxx> diff -r 36ac9bc7dd15 -r 24dd9a53dd95 xen/arch/ia64/vcpu.c --- a/xen/arch/ia64/vcpu.c Mon Aug 1 18:00:10 2005 +++ b/xen/arch/ia64/vcpu.c Mon Aug 1 19:11:00 2005 @@ -392,6 +392,21 @@ return (IA64_NO_FAULT); } +unsigned long vcpu_get_rr_ps(VCPU *vcpu,UINT64 vadr) +{ + ia64_rr rr; + + rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; + return(rr.ps); +} + +unsigned long vcpu_get_rr_rid(VCPU *vcpu,UINT64 vadr) +{ + ia64_rr rr; + + rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; + return(rr.rid); +} unsigned long vcpu_get_itir_on_fault(VCPU *vcpu, UINT64 ifa) { @@ -884,6 +899,15 @@ return (IA64_NO_FAULT); } +// parameter is a time interval specified in cycles +void vcpu_enable_timer(VCPU *vcpu,UINT64 cycles) +{ + PSCBX(vcpu,xen_timer_interval) = cycles; + vcpu_set_next_timer(vcpu); + printf("vcpu_enable_timer(%d): interval set to %d cycles\n", + PSCBX(vcpu,xen_timer_interval)); + __set_bit(PSCB(vcpu,itv), PSCB(vcpu,delivery_mask)); +} IA64FAULT vcpu_set_itv(VCPU *vcpu, UINT64 val) { @@ -1010,16 +1034,6 @@ vcpu_safe_set_itm(s); //using_xen_as_itm++; } -} - -// parameter is a time interval specified in cycles -void vcpu_enable_timer(VCPU *vcpu,UINT64 cycles) -{ - PSCBX(vcpu,xen_timer_interval) = cycles; - vcpu_set_next_timer(vcpu); - printf("vcpu_enable_timer(%d): interval set to %d cycles\n", - PSCBX(vcpu,xen_timer_interval)); - __set_bit(PSCB(vcpu,itv), PSCB(vcpu,delivery_mask)); } IA64FAULT vcpu_set_itm(VCPU *vcpu, UINT64 val) @@ -1219,7 +1233,6 @@ IA64FAULT vcpu_thash(VCPU *vcpu, UINT64 vadr, UINT64 *pval) { - extern unsigned long vcpu_get_rr_ps(VCPU *vcpu,UINT64 vadr); UINT64 pta = PSCB(vcpu,pta); UINT64 pta_sz = (pta & IA64_PTA_SZ(0x3f)) >> IA64_PTA_SZ_BIT; UINT64 pta_base = pta & ~((1UL << IA64_PTA_BASE_BIT)-1); @@ -1521,28 +1534,8 @@ return(rr.ve); } - -unsigned long vcpu_get_rr_ps(VCPU *vcpu,UINT64 vadr) -{ - ia64_rr rr; - - rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; - return(rr.ps); -} - - -unsigned long vcpu_get_rr_rid(VCPU *vcpu,UINT64 vadr) -{ - ia64_rr rr; - - rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; - return(rr.rid); -} - - IA64FAULT vcpu_set_rr(VCPU *vcpu, UINT64 reg, UINT64 val) { - extern void set_one_rr(UINT64, UINT64); PSCB(vcpu,rrs)[reg>>61] = val; // warning: set_one_rr() does it "live" set_one_rr(reg,val); diff -r 36ac9bc7dd15 -r 24dd9a53dd95 xen/include/asm-ia64/config.h --- a/xen/include/asm-ia64/config.h Mon Aug 1 18:00:10 2005 +++ b/xen/include/asm-ia64/config.h Mon Aug 1 19:11:00 2005 @@ -230,6 +230,7 @@ #define FORCE_CRASH() asm("break 0;;"); +void dummy_called(char *function); #define dummy() dummy_called(__FUNCTION__) // these declarations got moved at some point, find a better place for them diff -r 36ac9bc7dd15 -r 24dd9a53dd95 xen/include/asm-ia64/regionreg.h --- a/xen/include/asm-ia64/regionreg.h Mon Aug 1 18:00:10 2005 +++ b/xen/include/asm-ia64/regionreg.h Mon Aug 1 19:11:00 2005 @@ -39,4 +39,7 @@ #define RR_RID(arg) (((arg) & 0x0000000000ffffff) << 8) #define RR_RID_MASK 0x00000000ffffff00L + +int set_one_rr(unsigned long rr, unsigned long val); + #endif /* !_REGIONREG_H_ */ _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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