[Xen-changelog] Load kernel regs from virtual kernel regs at domain switch (found by Kevin Tian)

[Xen patchbot -unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID 4f83028380371149d9922130dde4022fdf2837ed
# Parent  aa81f4e44ca5e4eddb1b7a29f9a25ec46fa9d796
Load kernel regs from virtual kernel regs at domain switch (found by Kevin Tian)

diff -r aa81f4e44ca5 -r 4f8302838037 xen/arch/ia64/xen/process.c
--- a/xen/arch/ia64/xen/process.c       Mon Oct 31 23:27:38 2005
+++ b/xen/arch/ia64/xen/process.c       Tue Nov  1 04:07:56 2005
@@ -83,9 +83,8 @@
     if(VMX_DOMAIN(current)){
        vmx_load_all_rr(current);
     }else{
-           if (rr7 = load_region_regs(current)) {
-                   printk("schedule_tail: change to rr7 not yet 
implemented\n");
-       }
+           load_region_regs(current);
+            vcpu_load_kernel_regs(current);
     }
 }
 
diff -r aa81f4e44ca5 -r 4f8302838037 xen/arch/ia64/xen/regionreg.c
--- a/xen/arch/ia64/xen/regionreg.c     Mon Oct 31 23:27:38 2005
+++ b/xen/arch/ia64/xen/regionreg.c     Tue Nov  1 04:07:56 2005
@@ -341,23 +341,13 @@
 // rr7 (because we have to to assembly and physical mode
 // to change rr7).  If no change to rr7 is required, returns 0.
 //
-unsigned long load_region_regs(struct vcpu *v)
+void load_region_regs(struct vcpu *v)
 {
        unsigned long rr0, rr1,rr2, rr3, rr4, rr5, rr6, rr7;
        // TODO: These probably should be validated
        unsigned long bad = 0;
 
        if (VCPU(v,metaphysical_mode)) {
-               ia64_rr rrv;
-
-#if 0
-               rrv.rrval = 0;
-               rrv.rid = v->domain->arch.metaphysical_rr0;
-               rrv.ps = PAGE_SHIFT;
-               rrv.ve = 1;
-               rr0 = rrv.rrval;
-               set_rr_no_srlz(0x0000000000000000L, rr0);
-#endif
                rr0 = v->domain->arch.metaphysical_rr0;
                ia64_set_rr(0x0000000000000000L, rr0);
                ia64_srlz_d();
@@ -383,5 +373,4 @@
        if (bad) {
                panic_domain(0,"load_region_regs: can't set! bad=%lx\n",bad);
        }
-       return 0;
-}
+}
diff -r aa81f4e44ca5 -r 4f8302838037 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c  Mon Oct 31 23:27:38 2005
+++ b/xen/arch/ia64/xen/vcpu.c  Tue Nov  1 04:07:56 2005
@@ -134,6 +134,18 @@
 /**************************************************************************
  VCPU privileged application register access routines
 **************************************************************************/
+
+void vcpu_load_kernel_regs(VCPU *vcpu)
+{
+       ia64_set_kr(0, VCPU(vcpu, krs[0]));
+       ia64_set_kr(1, VCPU(vcpu, krs[1]));
+       ia64_set_kr(2, VCPU(vcpu, krs[2]));
+       ia64_set_kr(3, VCPU(vcpu, krs[3]));
+       ia64_set_kr(4, VCPU(vcpu, krs[4]));
+       ia64_set_kr(5, VCPU(vcpu, krs[5]));
+       ia64_set_kr(6, VCPU(vcpu, krs[6]));
+       ia64_set_kr(7, VCPU(vcpu, krs[7]));
+}
 
 IA64FAULT vcpu_set_ar(VCPU *vcpu, UINT64 reg, UINT64 val)
 {
@@ -1872,4 +1884,3 @@
        // don't forget to recompute itr_regions
        return (IA64_ILLOP_FAULT);
 }
-
diff -r aa81f4e44ca5 -r 4f8302838037 xen/arch/ia64/xen/xenmisc.c
--- a/xen/arch/ia64/xen/xenmisc.c       Mon Oct 31 23:27:38 2005
+++ b/xen/arch/ia64/xen/xenmisc.c       Tue Nov  1 04:07:56 2005
@@ -320,6 +320,7 @@
                VHPT_ENABLED);
        if (!is_idle_task(current->domain)) {
                load_region_regs(current);
+               vcpu_load_kernel_regs(current);
                    if (vcpu_timer_expired(current)) vcpu_pend_timer(current);
        }
            if (vcpu_timer_expired(current)) vcpu_pend_timer(current);

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