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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] Merged.
# HG changeset patch
# User emellor@xxxxxxxxxxxxxxxxxxxxxx
# Node ID 114946d9937f15620cac11fc531781db56779829
# Parent b77ceb2481b330ad363b84bd1da65545f7630a92
# Parent ccb923727f93e8228e5693f8f3470c0d0fc45851
Merged.
diff -r b77ceb2481b3 -r 114946d9937f tools/examples/vif-nat
--- a/tools/examples/vif-nat Fri Dec 2 15:57:24 2005
+++ b/tools/examples/vif-nat Fri Dec 2 22:27:04 2005
@@ -91,8 +91,6 @@
netmask=$(dotted_quad $intmask)
network=$(dotted_quad $(( $vif_int & $intmask )) )
-main_ip=$(dom0_ip)
-
dhcp_remove_entry()
{
@@ -140,7 +138,7 @@
do_or_die ip link set "$vif" up arp on
do_or_die ip addr add "$router_ip" dev "$vif"
- do_or_die ip route add "$vif_ip" dev "$vif" src "$main_ip"
+ do_or_die ip route add "$vif_ip" dev "$vif" src "$router_ip"
echo 1 >/proc/sys/net/ipv4/conf/${vif}/proxy_arp
[ "$dhcp" != 'no' ] && dhcp_up
;;
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/Makefile
--- a/xen/arch/x86/Makefile Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/Makefile Fri Dec 2 22:27:04 2005
@@ -37,7 +37,8 @@
default: $(TARGET)
$(TARGET): $(TARGET)-syms boot/mkelf32
- ./boot/mkelf32 $(TARGET)-syms $(TARGET) 0x100000
+ ./boot/mkelf32 $(TARGET)-syms $(TARGET) 0x100000 \
+ `nm $(TARGET)-syms | sort | tail -n 1 | sed -e 's/^\([^ ]*\).*/0x\1/'`
$(CURDIR)/arch.o: $(OBJS)
$(LD) $(LDFLAGS) -r -o $@ $(OBJS)
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/boot/mkelf32.c
--- a/xen/arch/x86/boot/mkelf32.c Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/boot/mkelf32.c Fri Dec 2 22:27:04 2005
@@ -222,6 +222,7 @@
int main(int argc, char **argv)
{
+ u64 final_exec_addr;
u32 loadbase, dat_siz, mem_siz;
char *inimage, *outimage;
int infd, outfd;
@@ -234,15 +235,17 @@
Elf64_Ehdr in64_ehdr;
Elf64_Phdr in64_phdr;
- if ( argc != 4 )
- {
- fprintf(stderr, "Usage: mkelf32 <in-image> <out-image> <load-base>\n");
+ if ( argc != 5 )
+ {
+ fprintf(stderr, "Usage: mkelf32 <in-image> <out-image> "
+ "<load-base> <final-exec-addr>\n");
return 1;
}
inimage = argv[1];
outimage = argv[2];
loadbase = strtoul(argv[3], NULL, 16);
+ final_exec_addr = strtoul(argv[4], NULL, 16);
infd = open(inimage, O_RDONLY);
if ( infd == -1 )
@@ -286,7 +289,10 @@
(void)lseek(infd, in32_phdr.p_offset, SEEK_SET);
dat_siz = (u32)in32_phdr.p_filesz;
- mem_siz = (u32)in32_phdr.p_memsz;
+
+ /* Do not use p_memsz: it does not include BSS alignment padding. */
+ /*mem_siz = (u32)in32_phdr.p_memsz;*/
+ mem_siz = (u32)(final_exec_addr - in32_phdr.p_vaddr);
break;
case ELFCLASS64:
@@ -314,7 +320,10 @@
(void)lseek(infd, in64_phdr.p_offset, SEEK_SET);
dat_siz = (u32)in64_phdr.p_filesz;
- mem_siz = (u32)in64_phdr.p_memsz;
+
+ /* Do not use p_memsz: it does not include BSS alignment padding. */
+ /*mem_siz = (u32)in64_phdr.p_memsz;*/
+ mem_siz = (u32)(final_exec_addr - in64_phdr.p_vaddr);
break;
default:
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/boot/x86_32.S
--- a/xen/arch/x86/boot/x86_32.S Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/boot/x86_32.S Fri Dec 2 22:27:04 2005
@@ -74,16 +74,16 @@
cmp $0x2BADB002,%eax
jne not_multiboot
- /* Save the Multiboot info structure for later use. */
- add $__PAGE_OFFSET,%ebx
- push %ebx
-
/* Initialize BSS (no nasty surprises!) */
mov $__bss_start-__PAGE_OFFSET,%edi
mov $_end-__PAGE_OFFSET,%ecx
sub %edi,%ecx
xor %eax,%eax
rep stosb
+
+ /* Save the Multiboot info structure for later use. */
+ add $__PAGE_OFFSET,%ebx
+ push %ebx
#ifdef CONFIG_X86_PAE
/* Initialize low and high mappings of all memory with 2MB pages */
@@ -238,27 +238,28 @@
.fill 2*NR_CPUS,8,0 /* space for TSS and LDT per CPU */
.org 0x2000
-/* Maximum STACK_ORDER for x86/32 is 1. We must therefore ensure that the */
-/* CPU0 stack is aligned on an even page boundary! */
-ENTRY(cpu0_stack)
- .org 0x2000 + STACK_SIZE
-
-#ifdef CONFIG_X86_PAE
-
+
+#ifdef CONFIG_X86_PAE
ENTRY(idle_pg_table)
ENTRY(idle_pg_table_l3)
- .quad 0x100000 + 0x2000 + STACK_SIZE + 1*PAGE_SIZE + 0x01
- .quad 0x100000 + 0x2000 + STACK_SIZE + 2*PAGE_SIZE + 0x01
- .quad 0x100000 + 0x2000 + STACK_SIZE + 3*PAGE_SIZE + 0x01
- .quad 0x100000 + 0x2000 + STACK_SIZE + 4*PAGE_SIZE + 0x01
- .org 0x2000 + STACK_SIZE + 1*PAGE_SIZE
+ .long idle_pg_table_l2 + 0*PAGE_SIZE + 0x01 - __PAGE_OFFSET, 0
+ .long idle_pg_table_l2 + 1*PAGE_SIZE + 0x01 - __PAGE_OFFSET, 0
+ .long idle_pg_table_l2 + 2*PAGE_SIZE + 0x01 - __PAGE_OFFSET, 0
+ .long idle_pg_table_l2 + 3*PAGE_SIZE + 0x01 - __PAGE_OFFSET, 0
+.section ".bss.page_aligned","w"
ENTRY(idle_pg_table_l2)
- .org 0x2000 + STACK_SIZE + 5*PAGE_SIZE
-
-#else /* CONFIG_X86_PAE */
-
+ .fill 4*PAGE_SIZE,1,0
+#else
+.section ".bss.page_aligned","w"
ENTRY(idle_pg_table)
-ENTRY(idle_pg_table_l2) # Initial page directory is 4kB
- .org 0x2000 + STACK_SIZE + PAGE_SIZE
-
-#endif /* CONFIG_X86_PAE */
+ENTRY(idle_pg_table_l2)
+ .fill 1*PAGE_SIZE,1,0
+#endif
+
+#if (STACK_ORDER == 0)
+.section ".bss.page_aligned","w"
+#else
+.section ".bss.twopage_aligned","w"
+#endif
+ENTRY(cpu0_stack)
+ .fill STACK_SIZE,1,0
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/boot/x86_64.S
--- a/xen/arch/x86/boot/x86_64.S Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/boot/x86_64.S Fri Dec 2 22:27:04 2005
@@ -249,13 +249,8 @@
ENTRY(idle_pg_table_l3)
.quad idle_pg_table_l2 - __PAGE_OFFSET + 7
+/* Initial PDE -- level-2 page table. Maps first 64MB physical memory. */
.org 0x4000
-/* Maximum STACK_ORDER for x86/64 is 2. We must therefore ensure that the */
-/* CPU0 stack is aligned on a 4-page boundary. */
-ENTRY(cpu0_stack)
-
-/* Initial PDE -- level-2 page table. Maps first 64MB physical memory. */
- .org 0x4000 + STACK_SIZE
ENTRY(idle_pg_table_l2)
.macro identmap from=0, count=32
.if \count-1
@@ -265,7 +260,15 @@
.quad 0x00000000000001e3 + \from
.endif
.endm
- identmap /* Too orangey for crows :-) */
-
- .org 0x4000 + STACK_SIZE + PAGE_SIZE
+ identmap
+
+ .org 0x4000 + PAGE_SIZE
.code64
+
+#if (STACK_ORDER == 0)
+.section ".bss.page_aligned","w"
+#else
+.section ".bss.twopage_aligned","w"
+#endif
+ENTRY(cpu0_stack)
+ .fill STACK_SIZE,1,0
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/mm.c
--- a/xen/arch/x86/mm.c Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/mm.c Fri Dec 2 22:27:04 2005
@@ -128,8 +128,9 @@
/* Used to defer flushing of memory structures. */
static struct {
-#define DOP_FLUSH_TLB (1<<0) /* Flush the TLB. */
-#define DOP_RELOAD_LDT (1<<1) /* Reload the LDT shadow mapping. */
+#define DOP_FLUSH_TLB (1<<0) /* Flush the local TLB. */
+#define DOP_FLUSH_ALL_TLBS (1<<1) /* Flush TLBs of all VCPUs of current dom. */
+#define DOP_RELOAD_LDT (1<<2) /* Reload the LDT shadow mapping. */
unsigned int deferred_ops;
/* If non-NULL, specifies a foreign subject domain for some operations. */
struct domain *foreign;
@@ -1323,14 +1324,28 @@
struct domain *owner = page_get_owner(page);
unsigned long gpfn;
- if ( unlikely((owner != NULL) && shadow_mode_enabled(owner)) )
- {
- mark_dirty(owner, page_to_pfn(page));
- if ( unlikely(shadow_mode_refcounts(owner)) )
- return;
- gpfn = __mfn_to_gpfn(owner, page_to_pfn(page));
- ASSERT(VALID_M2P(gpfn));
- remove_shadow(owner, gpfn, type & PGT_type_mask);
+ if ( likely(owner != NULL) )
+ {
+ /*
+ * We have to flush before the next use of the linear mapping
+ * (e.g., update_va_mapping()) or we could end up modifying a page
+ * that is no longer a page table (and hence screw up ref counts).
+ */
+ percpu_info[smp_processor_id()].deferred_ops |= DOP_FLUSH_ALL_TLBS;
+
+ if ( unlikely(shadow_mode_enabled(owner)) )
+ {
+ /* Raw page tables are rewritten during save/restore. */
+ if ( !shadow_mode_translate(owner) )
+ mark_dirty(owner, page_to_pfn(page));
+
+ if ( shadow_mode_refcounts(owner) )
+ return;
+
+ gpfn = __mfn_to_gpfn(owner, page_to_pfn(page));
+ ASSERT(VALID_M2P(gpfn));
+ remove_shadow(owner, gpfn, type & PGT_type_mask);
+ }
}
switch ( type & PGT_type_mask )
@@ -1600,11 +1615,14 @@
deferred_ops = percpu_info[cpu].deferred_ops;
percpu_info[cpu].deferred_ops = 0;
- if ( deferred_ops & DOP_FLUSH_TLB )
+ if ( deferred_ops & (DOP_FLUSH_ALL_TLBS|DOP_FLUSH_TLB) )
{
if ( shadow_mode_enabled(d) )
shadow_sync_all(d);
- local_flush_tlb();
+ if ( deferred_ops & DOP_FLUSH_ALL_TLBS )
+ flush_tlb_mask(d->cpumask);
+ else
+ local_flush_tlb();
}
if ( deferred_ops & DOP_RELOAD_LDT )
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/x86_32/xen.lds
--- a/xen/arch/x86/x86_32/xen.lds Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/x86_32/xen.lds Fri Dec 2 22:27:04 2005
@@ -23,7 +23,6 @@
_etext = .; /* End of text section */
.rodata : { *(.rodata) *(.rodata.*) } :text
- .kstrtab : { *(.kstrtab) } :text
. = ALIGN(32); /* Exception table */
__start___ex_table = .;
@@ -35,23 +34,10 @@
__pre_ex_table : { *(__pre_ex_table) } :text
__stop___pre_ex_table = .;
- __start___ksymtab = .; /* Kernel symbol table */
- __ksymtab : { *(__ksymtab) } :text
- __stop___ksymtab = .;
-
- __start___kallsyms = .; /* All kernel symbols */
- __kallsyms : { *(__kallsyms) } :text
- __stop___kallsyms = .;
-
.data : { /* Data */
*(.data)
CONSTRUCTORS
} :text
-
- _edata = .; /* End of data section */
-
- . = ALIGN(8192); /* init_task */
- .data.init_task : { *(.data.init_task) } :text
. = ALIGN(4096); /* Init code and data */
__init_begin = .;
@@ -64,10 +50,13 @@
__initcall_start = .;
.initcall.init : { *(.initcall.init) } :text
__initcall_end = .;
+ . = ALIGN(8192);
__init_end = .;
__bss_start = .; /* BSS */
.bss : {
+ *(.bss.twopage_aligned)
+ *(.bss.page_aligned)
*(.bss)
} :text
_end = . ;
diff -r b77ceb2481b3 -r 114946d9937f xen/arch/x86/x86_64/xen.lds
--- a/xen/arch/x86/x86_64/xen.lds Fri Dec 2 15:57:24 2005
+++ b/xen/arch/x86/x86_64/xen.lds Fri Dec 2 22:27:04 2005
@@ -21,7 +21,6 @@
_etext = .; /* End of text section */
.rodata : { *(.rodata) *(.rodata.*) } :text
- .kstrtab : { *(.kstrtab) } :text
. = ALIGN(32); /* Exception table */
__start___ex_table = .;
@@ -33,23 +32,10 @@
__pre_ex_table : { *(__pre_ex_table) } :text
__stop___pre_ex_table = .;
- __start___ksymtab = .; /* Kernel symbol table */
- __ksymtab : { *(__ksymtab) } :text
- __stop___ksymtab = .;
-
- __start___kallsyms = .; /* All kernel symbols */
- __kallsyms : { *(__kallsyms) } :text
- __stop___kallsyms = .;
-
.data : { /* Data */
*(.data)
CONSTRUCTORS
} :text
-
- _edata = .; /* End of data section */
-
- . = ALIGN(8192); /* init_task */
- .data.init_task : { *(.data.init_task) } :text
. = ALIGN(4096); /* Init code and data */
__init_begin = .;
@@ -62,10 +48,13 @@
__initcall_start = .;
.initcall.init : { *(.initcall.init) } :text
__initcall_end = .;
+ . = ALIGN(8192);
__init_end = .;
__bss_start = .; /* BSS */
.bss : {
+ *(.bss.twopage_aligned)
+ *(.bss.page_aligned)
*(.bss)
} :text
_end = . ;
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