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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [IA64] Make sharedinfo and shared_archinfo adjacent
# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 27050b1390cf74cf6fc1579c0f6bdceb6eeb3e6f
# Parent 0d4a846232cc446f811081736e682eef9561ef59
[IA64] Make sharedinfo and shared_archinfo adjacent
Move SHAREDINFO_ADDR and SHARED_ARCHINFO_ADDR to be adjacent, which
makes easier to access two areas by offset into same base.
Also remove duplicated XSI_ definitions in asm-offsets.c.
Signed-off-by: Kevin Tian <kevin.tian@xxxxxxxxx>
diff -r 0d4a846232cc -r 27050b1390cf xen/arch/ia64/Makefile
--- a/xen/arch/ia64/Makefile Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/arch/ia64/Makefile Mon Mar 27 15:35:31 2006 -0700
@@ -70,6 +70,8 @@ asm-xsi-offsets.s: asm-xsi-offsets.c $(H
# Solve circular reference on asm-offsets.h
[ -f $(BASEDIR)/include/asm-ia64/asm-offsets.h ] \
|| echo "#define IA64_TASK_SIZE 0" >
$(BASEDIR)/include/asm-ia64/asm-offsets.h
+ [ -f $(BASEDIR)/include/asm-ia64/asm-xsi-offsets.h ] \
+ || touch $(BASEDIR)/include/asm-ia64/asm-xsi-offsets.h
#Bad hack. Force asm-offsets.h out-of-date
sleep 1
touch $@
diff -r 0d4a846232cc -r 27050b1390cf xen/arch/ia64/asm-offsets.c
--- a/xen/arch/ia64/asm-offsets.c Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/arch/ia64/asm-offsets.c Mon Mar 27 15:35:31 2006 -0700
@@ -41,38 +41,6 @@ void foo(void)
BLANK();
- DEFINE(XSI_PSR_IC_OFS, offsetof(mapped_regs_t,
interrupt_collection_enabled));
- DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
interrupt_collection_enabled)));
- DEFINE(XSI_PSR_I_OFS, offsetof(mapped_regs_t,
interrupt_delivery_enabled));
- DEFINE(XSI_IIP_OFS, offsetof(mapped_regs_t, iip));
- DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iip)));
- DEFINE(XSI_IFA_OFS, offsetof(mapped_regs_t, ifa));
- DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifa)));
- DEFINE(XSI_ITIR_OFS, offsetof(mapped_regs_t, itir));
- DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir)));
-
- DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ipsr)));
- DEFINE(XSI_IPSR_OFS, offsetof(mapped_regs_t, ipsr));
- DEFINE(XSI_IFS_OFS, offsetof(mapped_regs_t, ifs));
- DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifs)));
- DEFINE(XSI_ISR_OFS, offsetof(mapped_regs_t, isr));
- DEFINE(XSI_IIM_OFS, offsetof(mapped_regs_t, iim));
- DEFINE(XSI_BANKNUM_OFS, offsetof(mapped_regs_t, banknum));
- DEFINE(XSI_BANK0_OFS, offsetof(mapped_regs_t, bank0_regs[0]));
- DEFINE(XSI_BANK1_OFS, offsetof(mapped_regs_t, bank1_regs[0]));
- DEFINE(XSI_B0NATS_OFS, offsetof(mapped_regs_t, vbnat));
- DEFINE(XSI_B1NATS_OFS, offsetof(mapped_regs_t, vnat));
- DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
- DEFINE(XSI_METAPHYS_OFS, offsetof(mapped_regs_t, metaphysical_mode));
- DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(mapped_regs_t, precover_ifs));
- DEFINE(XSI_INCOMPL_REG_OFS, offsetof(mapped_regs_t,
incomplete_regframe));
- DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption));
- DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
- DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha));
- DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr));
- DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta));
- DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv));
- DEFINE(XSI_KR0_OFS, offsetof(mapped_regs_t, krs[0]));
DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct vcpu,
arch._thread.ksp));
DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct vcpu,
arch._thread.on_ustack));
diff -r 0d4a846232cc -r 27050b1390cf xen/arch/ia64/asm-xsi-offsets.c
--- a/xen/arch/ia64/asm-xsi-offsets.c Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/arch/ia64/asm-xsi-offsets.c Mon Mar 27 15:35:31 2006 -0700
@@ -47,60 +47,62 @@
void foo(void)
{
+ /* First is shared info page, and then arch specific vcpu context */
+ DEFINE(XSI_BASE, SHAREDINFO_ADDR);
- DEFINE(XSI_BASE, SHARED_ARCHINFO_ADDR);
-
- DEFINE(XSI_PSR_I_OFS, offsetof(mapped_regs_t,
interrupt_delivery_enabled));
+ DEFINE(XSI_PSR_I_OFS, (XSI_OFS + offsetof(mapped_regs_t,
interrupt_delivery_enabled)));
DEFINE(XSI_PSR_I, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
interrupt_delivery_enabled)));
DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ipsr)));
- DEFINE(XSI_IPSR_OFS, offsetof(mapped_regs_t, ipsr));
- DEFINE(XSI_IIP_OFS, offsetof(mapped_regs_t, iip));
+ DEFINE(XSI_IPSR_OFS, (XSI_OFS + offsetof(mapped_regs_t, ipsr)));
+ DEFINE(XSI_IIP_OFS, (XSI_OFS + offsetof(mapped_regs_t, iip)));
DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iip)));
- DEFINE(XSI_IFS_OFS, offsetof(mapped_regs_t, ifs));
+ DEFINE(XSI_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifs)));
DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifs)));
- DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(mapped_regs_t, precover_ifs));
+ DEFINE(XSI_PRECOVER_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t,
precover_ifs)));
DEFINE(XSI_PRECOVER_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
precover_ifs)));
- DEFINE(XSI_ISR_OFS, offsetof(mapped_regs_t, isr));
+ DEFINE(XSI_ISR_OFS, (XSI_OFS + offsetof(mapped_regs_t, isr)));
DEFINE(XSI_ISR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, isr)));
- DEFINE(XSI_IFA_OFS, offsetof(mapped_regs_t, ifa));
+ DEFINE(XSI_IFA_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifa)));
DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifa)));
- DEFINE(XSI_IIPA_OFS, offsetof(mapped_regs_t, iipa));
+ DEFINE(XSI_IIPA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iipa)));
DEFINE(XSI_IIPA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iipa)));
- DEFINE(XSI_IIM_OFS, offsetof(mapped_regs_t, iim));
+ DEFINE(XSI_IIM_OFS, (XSI_OFS + offsetof(mapped_regs_t, iim)));
DEFINE(XSI_IIM, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iim)));
- DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr));
+ DEFINE(XSI_TPR_OFS, (XSI_OFS + offsetof(mapped_regs_t, tpr)));
DEFINE(XSI_TPR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, tpr)));
- DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha));
+ DEFINE(XSI_IHA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iha)));
DEFINE(XSI_IHA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iha)));
- DEFINE(XSI_ITIR_OFS, offsetof(mapped_regs_t, itir));
+ DEFINE(XSI_ITIR_OFS, (XSI_OFS + offsetof(mapped_regs_t, itir)));
DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir)));
- DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv));
+ DEFINE(XSI_ITV_OFS, (XSI_OFS + offsetof(mapped_regs_t, itv)));
DEFINE(XSI_ITV, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itv)));
- DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta));
+ DEFINE(XSI_PTA_OFS, (XSI_OFS + offsetof(mapped_regs_t, pta)));
DEFINE(XSI_PTA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, pta)));
- DEFINE(XSI_PSR_IC_OFS, offsetof(mapped_regs_t,
interrupt_collection_enabled));
+ DEFINE(XSI_PSR_IC_OFS, (XSI_OFS + offsetof(mapped_regs_t,
interrupt_collection_enabled)));
DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
interrupt_collection_enabled)));
- DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption));
+ DEFINE(XSI_PEND_OFS, (XSI_OFS + offsetof(mapped_regs_t,
pending_interruption)));
DEFINE(XSI_PEND, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
pending_interruption)));
- DEFINE(XSI_INCOMPL_REGFR_OFS, offsetof(mapped_regs_t,
incomplete_regframe));
+ DEFINE(XSI_INCOMPL_REGFR_OFS, (XSI_OFS + offsetof(mapped_regs_t,
incomplete_regframe)));
DEFINE(XSI_INCOMPL_REGFR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
incomplete_regframe)));
- DEFINE(XSI_METAPHYS_OFS, offsetof(mapped_regs_t, metaphysical_mode));
+ DEFINE(XSI_METAPHYS_OFS, (XSI_OFS + offsetof(mapped_regs_t,
metaphysical_mode)));
DEFINE(XSI_METAPHYS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
metaphysical_mode)));
- DEFINE(XSI_BANKNUM_OFS, offsetof(mapped_regs_t, banknum));
+ DEFINE(XSI_BANKNUM_OFS, (XSI_OFS + offsetof(mapped_regs_t, banknum)));
DEFINE(XSI_BANKNUM, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
banknum)));
- DEFINE(XSI_BANK0_R16_OFS, offsetof(mapped_regs_t, bank0_regs[0]));
+ DEFINE(XSI_BANK0_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t,
bank0_regs[0])));
DEFINE(XSI_BANK0_R16, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
bank0_regs[0])));
- DEFINE(XSI_BANK1_R16_OFS, offsetof(mapped_regs_t, bank1_regs[0]));
+ DEFINE(XSI_BANK1_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t,
bank1_regs[0])));
DEFINE(XSI_BANK1_R16, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
bank1_regs[0])));
- DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
+ DEFINE(XSI_B0NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vbnat)));
+ DEFINE(XSI_B1NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vnat)));
+ DEFINE(XSI_RR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, rrs[0])));
DEFINE(XSI_RR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, rrs[0])));
- DEFINE(XSI_KR0_OFS, offsetof(mapped_regs_t, krs[0]));
+ DEFINE(XSI_KR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, krs[0])));
DEFINE(XSI_KR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, krs[0])));
- DEFINE(XSI_PKR0_OFS, offsetof(mapped_regs_t, pkrs[0]));
+ DEFINE(XSI_PKR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, pkrs[0])));
DEFINE(XSI_PKR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
pkrs[0])));
- DEFINE(XSI_TMP0_OFS, offsetof(mapped_regs_t, tmp[0]));
+ DEFINE(XSI_TMP0_OFS, (XSI_OFS + offsetof(mapped_regs_t, tmp[0])));
DEFINE(XSI_TMP0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t,
tmp[0])));
}
diff -r 0d4a846232cc -r 27050b1390cf xen/arch/ia64/xen/domain.c
--- a/xen/arch/ia64/xen/domain.c Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/arch/ia64/xen/domain.c Mon Mar 27 15:35:31 2006 -0700
@@ -38,7 +38,7 @@
//#include <asm/page.h>
#include <asm/pgalloc.h>
-#include <asm/asm-offsets.h> /* for IA64_THREAD_INFO_SIZE */
+#include <asm/offsets.h> /* for IA64_THREAD_INFO_SIZE */
#include <asm/vcpu.h> /* for function declarations */
#include <public/arch-ia64.h>
diff -r 0d4a846232cc -r 27050b1390cf xen/arch/ia64/xen/hyperprivop.S
--- a/xen/arch/ia64/xen/hyperprivop.S Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/arch/ia64/xen/hyperprivop.S Mon Mar 27 15:35:31 2006 -0700
@@ -287,7 +287,7 @@ ENTRY(hyper_ssm_i)
// set shared_mem ifs and incomplete_regframe to 0
cover ;;
mov r20=cr.ifs;;
- adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
+ adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
st4 [r21]=r0 ;;
adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
st8 [r21]=r0 ;;
@@ -304,8 +304,8 @@ ENTRY(hyper_ssm_i)
mov cr.iip=r24;;
// OK, now all set to go except for switch to virtual bank0
mov r30=r2; mov r29=r3;;
- adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
- adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
+ adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
+ adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
bsw.1;;
// FIXME?: ar.unat is not really handled correctly,
// but may not matter if the OS is NaT-clean
@@ -460,7 +460,7 @@ GLOBAL_ENTRY(fast_tick_reflect)
// set shared_mem ifs and incomplete_regframe to 0
cover ;;
mov r20=cr.ifs;;
- adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
+ adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
st4 [r21]=r0 ;;
adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
st8 [r21]=r0 ;;
@@ -478,8 +478,8 @@ GLOBAL_ENTRY(fast_tick_reflect)
#ifdef HANDLE_AR_UNAT
mov r28=ar.unat;
#endif
- adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
- adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
+ adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
+ adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
bsw.1;;
.mem.offset 0,0; st8.spill [r2]=r16,16;
.mem.offset 8,0; st8.spill [r3]=r17,16 ;;
@@ -633,7 +633,7 @@ ENTRY(fast_reflect)
// set shared_mem ifs and incomplete_regframe to 0
cover ;;
mov r24=cr.ifs;;
- adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
+ adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
st4 [r21]=r0 ;;
adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
st8 [r21]=r0 ;;
@@ -654,8 +654,8 @@ ENTRY(fast_reflect)
#ifdef HANDLE_AR_UNAT
mov r28=ar.unat;
#endif
- adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
- adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
+ adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
+ adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
bsw.1;;
.mem.offset 0,0; st8.spill [r2]=r16,16;
.mem.offset 8,0; st8.spill [r3]=r17,16 ;;
@@ -1055,7 +1055,7 @@ just_do_rfi:
just_do_rfi:
// r18=&vpsr.i|vpsr.ic, r21==vpsr, r22=vcr.iip
mov cr.iip=r22;;
- adds r20=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
+ adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
st4 [r20]=r0 ;;
adds r20=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
ld8 r20=[r20];;
@@ -1088,8 +1088,8 @@ just_do_rfi:
mov r30=r2; mov r29=r3;;
mov r17=ar.unat;;
adds r16=XSI_B1NATS_OFS-XSI_PSR_IC_OFS,r18
- adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
- adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
+ adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
+ adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
ld8 r16=[r16];;
mov ar.unat=r16;;
bsw.1;;
@@ -1296,7 +1296,7 @@ ENTRY(hyper_cover)
mov r25=cr.iip;;
// skip test for vpsr.ic.. it's a prerequisite for hyperprivops
cover ;;
- adds r20=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
+ adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
mov r30=cr.ifs;;
adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18
ld4 r21=[r20] ;;
diff -r 0d4a846232cc -r 27050b1390cf xen/include/asm-ia64/offsets.h
--- a/xen/include/asm-ia64/offsets.h Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/include/asm-ia64/offsets.h Mon Mar 27 15:35:31 2006 -0700
@@ -1,2 +1,8 @@
//dummy file to resolve non-arch-indep include
+#ifndef __IA64_OFFSETS_H
+#define __IA64_OFFSETS_H
+
#include <asm/asm-offsets.h>
+#include <asm/asm-xsi-offsets.h>
+
+#endif /* __IA64_OFFSETS_H */
diff -r 0d4a846232cc -r 27050b1390cf xen/include/asm-ia64/xensystem.h
--- a/xen/include/asm-ia64/xensystem.h Mon Mar 27 15:34:02 2006 -0700
+++ b/xen/include/asm-ia64/xensystem.h Mon Mar 27 15:35:31 2006 -0700
@@ -22,10 +22,11 @@
#undef KERNEL_START
#define KERNEL_START 0xf000000004000000
#undef PERCPU_ADDR
-#define PERCPU_ADDR 0xf100000000000000-PERCPU_PAGE_SIZE
#define SHAREDINFO_ADDR 0xf100000000000000
+#define SHARED_ARCHINFO_ADDR (SHAREDINFO_ADDR + PAGE_SIZE)
+#define PERCPU_ADDR (SHAREDINFO_ADDR - PERCPU_PAGE_SIZE)
+#define XSI_OFS (SHARED_ARCHINFO_ADDR - SHAREDINFO_ADDR)
#define VHPT_ADDR 0xf200000000000000
-#define SHARED_ARCHINFO_ADDR 0xf300000000000000
#define XEN_END_ADDR 0xf400000000000000
#ifndef __ASSEMBLY__
@@ -34,7 +35,6 @@
#define IA64_HAS_EXTRA_STATE(t) 0
#undef __switch_to
-#if 1
extern struct task_struct *vmx_ia64_switch_to (void *next_task);
#define __switch_to(prev,next,last) do { \
ia64_save_fpu(prev->arch._thread.fph); \
@@ -57,19 +57,6 @@ extern struct task_struct *vmx_ia64_swit
vcpu_set_next_timer(current); \
} \
} while (0)
-#else
-#define __switch_to(prev,next,last) do {
\
- ia64_save_fpu(prev->arch._thread.fph);
\
- ia64_load_fpu(next->arch._thread.fph);
\
- if (IA64_HAS_EXTRA_STATE(prev))
\
- ia64_save_extra(prev);
\
- if (IA64_HAS_EXTRA_STATE(next))
\
- ia64_load_extra(next);
\
- /*ia64_psr(ia64_task_regs(next))->dfh =
!ia64_is_local_fpu_owner(next);*/ \
- (last) = ia64_switch_to((next));
\
- vcpu_set_next_timer(current);
\
-} while (0)
-#endif
#undef switch_to
// FIXME SMP... see system.h, does this need to be different?
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