[Xen-changelog] [xen-unstable] [IA64] add memory barrier to domain_flush_vtlb_range()

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 7da52d016bcc933318a6894f7cd516b1ce66e6d5
# Parent  ececeade018f220defbea820b98b89c1de51be3a
[IA64] add memory barrier to domain_flush_vtlb_range()

add memory barrier to domain_flush_vtlb_range().
vtlb purge must be visible before vhpt invalidation.
added some BUG_ON().

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
---
 xen/arch/ia64/xen/vcpu.c |    4 ++++
 xen/arch/ia64/xen/vhpt.c |    6 +++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff -r ececeade018f -r 7da52d016bcc xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c  Fri Jun 09 10:35:37 2006 -0600
+++ b/xen/arch/ia64/xen/vcpu.c  Fri Jun 09 10:35:38 2006 -0600
@@ -2016,6 +2016,8 @@ IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64 
 
 IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 log_range)
 {
+       BUG_ON(vcpu != current);
+
        /* Purge TC  */
        vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
        vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
@@ -2082,6 +2084,7 @@ IA64FAULT vcpu_ptr_d(VCPU *vcpu,UINT64 v
        unsigned long rid, rr;
        int i;
        TR_ENTRY *trp;
+       BUG_ON(vcpu != current);
 
        rr = PSCB(vcpu,rrs)[region];
        rid = rr & RR_RID_MASK;
@@ -2110,6 +2113,7 @@ IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 v
        unsigned long rid, rr;
        int i;
        TR_ENTRY *trp;
+       BUG_ON(vcpu != current);
 
        rr = PSCB(vcpu,rrs)[region];
        rid = rr & RR_RID_MASK;
diff -r ececeade018f -r 7da52d016bcc xen/arch/ia64/xen/vhpt.c
--- a/xen/arch/ia64/xen/vhpt.c  Fri Jun 09 10:35:37 2006 -0600
+++ b/xen/arch/ia64/xen/vhpt.c  Fri Jun 09 10:35:38 2006 -0600
@@ -202,10 +202,14 @@ void domain_flush_vtlb_range (struct dom
                   FIXME: clear only if match.  */
                vcpu_purge_tr_entry(&PSCBX(v,dtlb));
                vcpu_purge_tr_entry(&PSCBX(v,itlb));
-
+       }
+       smp_mb();
+
+       for_each_vcpu (d, v) {
                /* Invalidate VHPT entries.  */
                cpu_flush_vhpt_range (v->processor, vadr, addr_range);
        }
+       // ptc.ga has release semantics.
 
        /* ptc.ga  */
        ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT);

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