[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] [XEN] Fix PAE PDPT shadowing coherence.
# HG changeset patch # User kaf24@xxxxxxxxxxxxxxxxxxxx # Node ID 69f7e0ea2985e6a8bd013740e8d76ad94de8e07b # Parent 46e853c34a2eb537bbac8f45ba6adda949d305f0 [XEN] Fix PAE PDPT shadowing coherence. Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx> --- xen/arch/x86/mm.c | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-) diff -r 46e853c34a2e -r 69f7e0ea2985 xen/arch/x86/mm.c --- a/xen/arch/x86/mm.c Tue Jun 20 14:45:46 2006 +0100 +++ b/xen/arch/x86/mm.c Tue Jun 20 17:04:13 2006 +0100 @@ -268,18 +268,20 @@ void share_xen_page_with_privileged_gues #if defined(CONFIG_X86_PAE) -#if 1 /*def NDEBUG*/ /* KAF: Non-debug case is suspect: let's always use it. */ +#ifdef NDEBUG /* Only PDPTs above 4GB boundary need to be shadowed in low memory. */ #define l3tab_needs_shadow(mfn) ((mfn) >= 0x100000) #else /* - * In debug builds we aggressively shadow PDPTs to exercise code paths. + * In debug builds we shadow a selection of <4GB PDPTs to exercise code paths. * We cannot safely shadow the idle page table, nor shadow-mode page tables - * (detected by lack of an owning domain). Always shadow PDPTs above 4GB. + * (detected by lack of an owning domain). As required for correctness, we + * always shadow PDPTs aboive 4GB. */ #define l3tab_needs_shadow(mfn) \ (((((mfn) << PAGE_SHIFT) != __pa(idle_pg_table)) && \ - (page_get_owner(mfn_to_page(mfn)) != NULL)) || \ + (page_get_owner(mfn_to_page(mfn)) != NULL) && \ + ((mfn) & 1)) || /* odd MFNs are shadowed */ \ ((mfn) >= 0x100000)) #endif @@ -305,6 +307,8 @@ static void __write_ptbase(unsigned long if ( !l3tab_needs_shadow(mfn) ) { write_cr3(mfn << PAGE_SHIFT); + /* Cache is no longer in use or valid (/after/ write to %cr3). */ + cache->high_mfn = 0; return; } _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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