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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] merge with xen-unstable.hg
# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 5ad72f9e639c8d24a59f7758ecdf46022eee1381
# Parent e317ad162eba350fe32b780dd8293fc1ae883716
# Parent 8273f730371bfabbfa15f79a47a59ada06711aec
merge with xen-unstable.hg
---
buildconfigs/Rules.mk | 2 +-
tools/ioemu/hw/pci.c | 13 +++++++++++++
tools/ioemu/hw/rtl8139.c | 2 ++
tools/ioemu/hw/usb-uhci.c | 2 ++
tools/ioemu/patches/qemu-pci | 34 ++++++++++++++++++++++++++++++++++
tools/ioemu/patches/series | 1 +
xen/arch/x86/mm/shadow/common.c | 34 +++++++++++++++++-----------------
xen/arch/x86/mm/shadow/multi.c | 14 ++++++++++++--
xen/arch/x86/mm/shadow/private.h | 2 +-
xen/common/perfc.c | 15 ++++++++-------
xen/common/sysctl.c | 6 +++---
xen/include/asm-x86/mm.h | 2 +-
12 files changed, 95 insertions(+), 32 deletions(-)
diff -r e317ad162eba -r 5ad72f9e639c buildconfigs/Rules.mk
--- a/buildconfigs/Rules.mk Tue Aug 29 08:09:28 2006 -0600
+++ b/buildconfigs/Rules.mk Tue Aug 29 08:28:38 2006 -0600
@@ -19,7 +19,7 @@ endif
# Expand Linux series to Linux version
LINUX_SERIES ?= 2.6
-LINUX_VER ?= $(shell grep "^LINUX_VER" buildconfigs/mk.linux-2.6-xen |
sed -e 's/.*=[ ]*//')
+LINUX_VER ?= $(shell grep "^LINUX_VER " buildconfigs/mk.linux-2.6-xen |
sed -e 's/.*=[ ]*//')
# Setup Linux search path
LINUX_SRC_PATH ?= .:..
diff -r e317ad162eba -r 5ad72f9e639c tools/ioemu/hw/pci.c
--- a/tools/ioemu/hw/pci.c Tue Aug 29 08:09:28 2006 -0600
+++ b/tools/ioemu/hw/pci.c Tue Aug 29 08:28:38 2006 -0600
@@ -286,6 +286,7 @@ void pci_default_write_config(PCIDevice
case 0x0b:
case 0x0e:
case 0x10 ... 0x27: /* base */
+ case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */
case 0x30 ... 0x33: /* rom */
case 0x3d:
can_write = 0;
@@ -318,6 +319,18 @@ void pci_default_write_config(PCIDevice
break;
}
if (can_write) {
+ if( addr == 0x05 ) {
+ /* In Command Register, bits 15:11 are reserved */
+ val &= 0x07;
+ } else if ( addr == 0x06 ) {
+ /* In Status Register, bits 6, 2:0 are reserved, */
+ /* and bits 7,5,4,3 are read only */
+ val = d->config[addr];
+ } else if ( addr == 0x07 ) {
+ /* In Status Register, bits 10,9 are reserved, */
+ val = (val & ~0x06) | (d->config[addr] & 0x06);
+ }
+
d->config[addr] = val;
}
addr++;
diff -r e317ad162eba -r 5ad72f9e639c tools/ioemu/hw/rtl8139.c
--- a/tools/ioemu/hw/rtl8139.c Tue Aug 29 08:09:28 2006 -0600
+++ b/tools/ioemu/hw/rtl8139.c Tue Aug 29 08:28:38 2006 -0600
@@ -3423,6 +3423,8 @@ void pci_rtl8139_init(PCIBus *bus, NICIn
pci_conf[0x0e] = 0x00; /* header_type */
pci_conf[0x3d] = 1; /* interrupt pin 0 */
pci_conf[0x34] = 0xdc;
+ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
+ pci_conf[0x2d] = pci_conf[0x01];
s = &d->rtl8139;
diff -r e317ad162eba -r 5ad72f9e639c tools/ioemu/hw/usb-uhci.c
--- a/tools/ioemu/hw/usb-uhci.c Tue Aug 29 08:09:28 2006 -0600
+++ b/tools/ioemu/hw/usb-uhci.c Tue Aug 29 08:28:38 2006 -0600
@@ -659,6 +659,8 @@ void usb_uhci_init(PCIBus *bus, int devf
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 4; // interrupt pin 3
pci_conf[0x60] = 0x10; // release number
+ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
+ pci_conf[0x2d] = pci_conf[0x01];
for(i = 0; i < NB_PORTS; i++) {
qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
diff -r e317ad162eba -r 5ad72f9e639c tools/ioemu/patches/series
--- a/tools/ioemu/patches/series Tue Aug 29 08:09:28 2006 -0600
+++ b/tools/ioemu/patches/series Tue Aug 29 08:28:38 2006 -0600
@@ -44,3 +44,4 @@ xen-platform-device
xen-platform-device
qemu-bootorder
qemu-tunable-ide-write-cache
+qemu-pci -p3
diff -r e317ad162eba -r 5ad72f9e639c xen/arch/x86/mm/shadow/common.c
--- a/xen/arch/x86/mm/shadow/common.c Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/arch/x86/mm/shadow/common.c Tue Aug 29 08:28:38 2006 -0600
@@ -397,22 +397,14 @@ shadow_validate_guest_pt_write(struct vc
ASSERT(shadow_lock_is_acquired(v->domain));
rc = __shadow_validate_guest_entry(v, gmfn, entry, size);
if ( rc & SHADOW_SET_FLUSH )
- {
- // Flush everyone except the local processor, which will flush when it
- // re-enters the HVM guest.
- //
- cpumask_t mask = d->domain_dirty_cpumask;
- cpu_clear(v->processor, mask);
- flush_tlb_mask(mask);
- }
+ /* Need to flush TLBs to pick up shadow PT changes */
+ flush_tlb_mask(d->domain_dirty_cpumask);
if ( rc & SHADOW_SET_ERROR )
{
/* This page is probably not a pagetable any more: tear it out of the
* shadows, along with any tables that reference it */
shadow_remove_all_shadows_and_parents(v, gmfn);
}
- /* We ignore the other bits: since we are about to change CR3 on
- * VMENTER we don't need to do any extra TLB flushes. */
}
@@ -1129,7 +1121,7 @@ sh_gfn_to_mfn_foreign(struct domain *d,
#if CONFIG_PAGING_LEVELS > 2
- if ( gpfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) )
+ if ( gpfn >= (RO_MPT_VIRT_END-RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) )
/* This pfn is higher than the p2m map can hold */
return _mfn(INVALID_MFN);
#endif
@@ -1898,16 +1890,16 @@ int shadow_remove_write_access(struct vc
} while (0)
- /* Linux lowmem: first 1GB is mapped 1-to-1 above 0xC0000000 */
- if ( v == current
- && (gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x40000000 )
- GUESS(0xC0000000 + (gfn << PAGE_SHIFT), 4);
-
if ( v->arch.shadow.mode->guest_levels == 2 )
{
if ( level == 1 )
/* 32bit non-PAE w2k3: linear map at 0xC0000000 */
GUESS(0xC0000000UL + (fault_addr >> 10), 1);
+
+ /* Linux lowmem: first 896MB is mapped 1-to-1 above 0xC0000000 */
+ if ((gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x38000 )
+ GUESS(0xC0000000UL + (gfn << PAGE_SHIFT), 4);
+
}
#if CONFIG_PAGING_LEVELS >= 3
else if ( v->arch.shadow.mode->guest_levels == 3 )
@@ -1918,6 +1910,10 @@ int shadow_remove_write_access(struct vc
case 1: GUESS(0xC0000000UL + (fault_addr >> 9), 2); break;
case 2: GUESS(0xC0600000UL + (fault_addr >> 18), 2); break;
}
+
+ /* Linux lowmem: first 896MB is mapped 1-to-1 above 0xC0000000 */
+ if ((gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x38000 )
+ GUESS(0xC0000000UL + (gfn << PAGE_SHIFT), 4);
}
#if CONFIG_PAGING_LEVELS >= 4
else if ( v->arch.shadow.mode->guest_levels == 4 )
@@ -1929,6 +1925,10 @@ int shadow_remove_write_access(struct vc
case 2: GUESS(0x70380000000UL + (fault_addr >> 18), 3); break;
case 3: GUESS(0x70381C00000UL + (fault_addr >> 27), 3); break;
}
+
+ /* Linux direct map at 0xffff810000000000 */
+ gfn = sh_mfn_to_gfn(v->domain, gmfn);
+ GUESS(0xffff810000000000UL + (gfn << PAGE_SHIFT), 4);
}
#endif /* CONFIG_PAGING_LEVELS >= 4 */
#endif /* CONFIG_PAGING_LEVELS >= 3 */
@@ -2185,7 +2185,7 @@ void sh_remove_shadows(struct vcpu *v, m
pg = mfn_to_page(gmfn);
- /* Bale out now if the page is not shadowed */
+ /* Bail out now if the page is not shadowed */
if ( (pg->count_info & PGC_page_table) == 0 )
return;
diff -r e317ad162eba -r 5ad72f9e639c xen/arch/x86/mm/shadow/multi.c
--- a/xen/arch/x86/mm/shadow/multi.c Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/arch/x86/mm/shadow/multi.c Tue Aug 29 08:28:38 2006 -0600
@@ -2543,6 +2543,16 @@ static int validate_gl3e(struct vcpu *v,
perfc_incrc(shadow_validate_gl3e_calls);
+#if (SHADOW_PAGING_LEVELS == 3) && (GUEST_PAGING_LEVELS == 3)
+ {
+ /* If we've updated a subshadow which is unreferenced then
+ we don't care what value is being written - bail. */
+ struct pae_l3_bookkeeping *info = sl3p_to_info(se);
+ if(!info->refcount)
+ return result;
+ }
+#endif
+
if ( guest_l3e_get_flags(*new_gl3e) & _PAGE_PRESENT )
{
gfn_t gl2gfn = guest_l3e_get_gfn(*new_gl3e);
@@ -2634,7 +2644,7 @@ static int validate_gl1e(struct vcpu *v,
/**************************************************************************/
-/* Functions which translate and install a the shadows of arbitrary guest
+/* Functions which translate and install the shadows of arbitrary guest
* entries that we have just seen the guest write. */
@@ -2934,7 +2944,7 @@ static int sh_page_fault(struct vcpu *v,
&& shadow_vcpu_mode_translate(v)
&& mmio_space(gfn_to_paddr(gfn)) );
- /* For MMIO, the shadow holds the *gfn*; for normal accesses, if holds
+ /* For MMIO, the shadow holds the *gfn*; for normal accesses, it holds
* the equivalent mfn. */
if ( mmio )
gmfn = _mfn(gfn_x(gfn));
diff -r e317ad162eba -r 5ad72f9e639c xen/arch/x86/mm/shadow/private.h
--- a/xen/arch/x86/mm/shadow/private.h Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/arch/x86/mm/shadow/private.h Tue Aug 29 08:28:38 2006 -0600
@@ -555,7 +555,7 @@ vcpu_gfn_to_mfn_nofault(struct vcpu *v,
return _mfn(gfn);
#if CONFIG_PAGING_LEVELS > 2
- if ( gfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) )
+ if ( gfn >= (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) )
/* This pfn is higher than the p2m map can hold */
return _mfn(INVALID_MFN);
#endif
diff -r e317ad162eba -r 5ad72f9e639c xen/common/perfc.c
--- a/xen/common/perfc.c Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/common/perfc.c Tue Aug 29 08:28:38 2006 -0600
@@ -7,6 +7,7 @@
#include <xen/spinlock.h>
#include <xen/mm.h>
#include <xen/guest_access.h>
+#include <public/sysctl.h>
#include <asm/perfc.h>
#undef PERFCOUNTER
@@ -131,12 +132,12 @@ void perfc_reset(unsigned char key)
arch_perfc_reset ();
}
-static dom0_perfc_desc_t perfc_d[NR_PERFCTRS];
-static dom0_perfc_val_t *perfc_vals;
+static xen_sysctl_perfc_desc_t perfc_d[NR_PERFCTRS];
+static xen_sysctl_perfc_val_t *perfc_vals;
static int perfc_nbr_vals;
static int perfc_init = 0;
-static int perfc_copy_info(XEN_GUEST_HANDLE(dom0_perfc_desc_t) desc,
- XEN_GUEST_HANDLE(dom0_perfc_val_t) val)
+static int perfc_copy_info(XEN_GUEST_HANDLE_64(xen_sysctl_perfc_desc_t) desc,
+ XEN_GUEST_HANDLE_64(xen_sysctl_perfc_val_t) val)
{
unsigned int i, j;
unsigned int v = 0;
@@ -171,7 +172,7 @@ static int perfc_copy_info(XEN_GUEST_HAN
}
perfc_nbr_vals += perfc_d[i].nr_vals;
}
- perfc_vals = xmalloc_array(dom0_perfc_val_t, perfc_nbr_vals);
+ perfc_vals = xmalloc_array(xen_sysctl_perfc_val_t, perfc_nbr_vals);
perfc_init = 1;
}
if (perfc_vals == NULL)
@@ -206,7 +207,7 @@ static int perfc_copy_info(XEN_GUEST_HAN
}
BUG_ON(v != perfc_nbr_vals);
- if (copy_to_guest(desc, (dom0_perfc_desc_t *)perfc_d, NR_PERFCTRS))
+ if (copy_to_guest(desc, (xen_sysctl_perfc_desc_t *)perfc_d, NR_PERFCTRS))
return -EFAULT;
if (copy_to_guest(val, perfc_vals, perfc_nbr_vals))
return -EFAULT;
@@ -214,7 +215,7 @@ static int perfc_copy_info(XEN_GUEST_HAN
}
/* Dom0 control of perf counters */
-int perfc_control(dom0_perfccontrol_t *pc)
+int perfc_control(xen_sysctl_perfc_op_t *pc)
{
static DEFINE_SPINLOCK(lock);
int rc;
diff -r e317ad162eba -r 5ad72f9e639c xen/common/sysctl.c
--- a/xen/common/sysctl.c Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/common/sysctl.c Tue Aug 29 08:28:38 2006 -0600
@@ -121,10 +121,10 @@ long do_sysctl(XEN_GUEST_HANDLE(xen_sysc
break;
#ifdef PERF_COUNTERS
- case XEN_SYSCTL_perfccontrol:
+ case XEN_SYSCTL_perfc_op:
{
- extern int perfc_control(xen_sysctl_perfccontrol_t *);
- ret = perfc_control(&op->u.perfccontrol);
+ extern int perfc_control(xen_sysctl_perfc_op_t *);
+ ret = perfc_control(&op->u.perfc_op);
if ( copy_to_guest(u_sysctl, op, 1) )
ret = -EFAULT;
}
diff -r e317ad162eba -r 5ad72f9e639c xen/include/asm-x86/mm.h
--- a/xen/include/asm-x86/mm.h Tue Aug 29 08:09:28 2006 -0600
+++ b/xen/include/asm-x86/mm.h Tue Aug 29 08:28:38 2006 -0600
@@ -368,7 +368,7 @@ static inline unsigned long get_mfn_from
int ret;
#if CONFIG_PAGING_LEVELS > 2
- if ( pfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof (l1_pgentry_t) )
+ if ( pfn >= (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) )
/* This pfn is higher than the p2m map can hold */
return INVALID_MFN;
#endif
diff -r e317ad162eba -r 5ad72f9e639c tools/ioemu/patches/qemu-pci
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/tools/ioemu/patches/qemu-pci Tue Aug 29 08:28:38 2006 -0600
@@ -0,0 +1,54 @@
+diff -r d5eb5205ff35 tools/ioemu/hw/pci.c
+--- a/tools/ioemu/hw/pci.c Thu Aug 24 16:25:49 2006 +0100
++++ b/tools/ioemu/hw/pci.c Fri Aug 25 11:00:03 2006 +0800
+@@ -286,6 +286,7 @@ void pci_default_write_config(PCIDevice
+ case 0x0b:
+ case 0x0e:
+ case 0x10 ... 0x27: /* base */
++ case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */
+ case 0x30 ... 0x33: /* rom */
+ case 0x3d:
+ can_write = 0;
+@@ -318,6 +319,18 @@ void pci_default_write_config(PCIDevice
+ break;
+ }
+ if (can_write) {
++ if( addr == 0x05 ) {
++ /* In Command Register, bits 15:11 are reserved */
++ val &= 0x07;
++ } else if ( addr == 0x06 ) {
++ /* In Status Register, bits 6, 2:0 are reserved, */
++ /* and bits 7,5,4,3 are read only */
++ val = d->config[addr];
++ } else if ( addr == 0x07 ) {
++ /* In Status Register, bits 10,9 are reserved, */
++ val = (val & ~0x06) | (d->config[addr] & 0x06);
++ }
++
+ d->config[addr] = val;
+ }
+ addr++;
+diff -r d5eb5205ff35 tools/ioemu/hw/rtl8139.c
+--- a/tools/ioemu/hw/rtl8139.c Thu Aug 24 16:25:49 2006 +0100
++++ b/tools/ioemu/hw/rtl8139.c Fri Aug 25 11:00:03 2006 +0800
+@@ -3423,6 +3423,8 @@ void pci_rtl8139_init(PCIBus *bus, NICIn
+ pci_conf[0x0e] = 0x00; /* header_type */
+ pci_conf[0x3d] = 1; /* interrupt pin 0 */
+ pci_conf[0x34] = 0xdc;
++ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
++ pci_conf[0x2d] = pci_conf[0x01];
+
+ s = &d->rtl8139;
+
+diff -r d5eb5205ff35 tools/ioemu/hw/usb-uhci.c
+--- a/tools/ioemu/hw/usb-uhci.c Thu Aug 24 16:25:49 2006 +0100
++++ b/tools/ioemu/hw/usb-uhci.c Fri Aug 25 11:00:03 2006 +0800
+@@ -659,6 +659,8 @@ void usb_uhci_init(PCIBus *bus, int devf
+ pci_conf[0x0e] = 0x00; // header_type
+ pci_conf[0x3d] = 4; // interrupt pin 3
+ pci_conf[0x60] = 0x10; // release number
++ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
++ pci_conf[0x2d] = pci_conf[0x01];
+
+ for(i = 0; i < NB_PORTS; i++) {
+ qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
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