[Xen-changelog] [xen-unstable] [POWERPC][XEN] Define all cache information globaly

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
# Node ID 3ee3376a5eb3112af2578509c2354b0605674903
# Parent  7b350fc692d5eca532595da7dbdcbf7375ec78fd
[POWERPC][XEN] Define all cache information globaly

Rather than use the config.h macro

Signed-off-by: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
Signed-off-by: Hollis Blanchard <hollisb@xxxxxxxxxx>
---
 xen/arch/powerpc/dart.c             |    6 +++---
 xen/arch/powerpc/powerpc64/ppc970.c |    9 +++++++++
 xen/include/asm-powerpc/cache.h     |   11 +++++++++++
 xen/include/asm-powerpc/config.h    |    3 ---
 4 files changed, 23 insertions(+), 6 deletions(-)

diff -r 7b350fc692d5 -r 3ee3376a5eb3 xen/arch/powerpc/dart.c
--- a/xen/arch/powerpc/dart.c   Wed Sep 13 18:41:11 2006 -0400
+++ b/xen/arch/powerpc/dart.c   Thu Sep 14 01:12:26 2006 -0400
@@ -114,7 +114,7 @@ static void dart_fill(ulong index, int p
         ++rpg;
         if (i == num_pg) break;
 
-        if (((ulong)&entry[i]) % CACHE_LINE_SIZE == 0) {
+        if ((((ulong)&entry[i]) % cpu_caches.dline_size) == 0) {
             last_flush = (ulong)&entry[i - 1];
             dcbst(last_flush);
         }
@@ -134,7 +134,7 @@ static void dart_clear(ulong index, ulon
         ++i;
         if (i == num_pg) break;
 
-        if (((ulong)&entry[i]) % CACHE_LINE_SIZE == 0) {
+        if ((((ulong)&entry[i]) % cpu_caches.dline_size) == 0) {
             last_flush = (ulong)&entry[i - 1];
             dcbst(last_flush);
         }
@@ -263,7 +263,7 @@ static int init_dart(void)
     /* Linux uses a dummy page, filling "empty" DART entries with a
        reference to this page to capture stray DMA's */
     dummy_page = (ulong)alloc_xenheap_pages(1);
-    memset((void *)dummy_page, 0, PAGE_SIZE);
+    clear_page((void *)dummy_page);
     dummy_page >>= PAGE_SHIFT;
 
     printk("Initializing DART 0x%lx: tbl: %p[0x%lx] entries: 0x%lx\n",
diff -r 7b350fc692d5 -r 3ee3376a5eb3 xen/arch/powerpc/powerpc64/ppc970.c
--- a/xen/arch/powerpc/powerpc64/ppc970.c       Wed Sep 13 18:41:11 2006 -0400
+++ b/xen/arch/powerpc/powerpc64/ppc970.c       Thu Sep 14 01:12:26 2006 -0400
@@ -34,6 +34,15 @@
 #undef DEBUG
 #undef SERIALIZE
 
+struct cpu_caches cpu_caches = {
+       .dline_size = 0x80,
+       .log_dline_size = 7,
+    .dlines_per_page = PAGE_SIZE >> 7,
+       .iline_size = 0x80,
+       .log_iline_size = 7,
+    .ilines_per_page = PAGE_SIZE >> 7,
+};
+
 struct rma_settings {
     int order;
     int rmlr_0;
diff -r 7b350fc692d5 -r 3ee3376a5eb3 xen/include/asm-powerpc/cache.h
--- a/xen/include/asm-powerpc/cache.h   Wed Sep 13 18:41:11 2006 -0400
+++ b/xen/include/asm-powerpc/cache.h   Thu Sep 14 01:12:26 2006 -0400
@@ -59,4 +59,15 @@ static __inline__ void synchronize_cache
 
 #define __read_mostly
 
+struct cpu_caches {
+       u32     dsize;                  /* L1 d-cache size */
+       u32     dline_size;             /* L1 d-cache line size */
+       u32     log_dline_size;
+       u32     dlines_per_page;
+       u32     isize;                  /* L1 i-cache size */
+       u32     iline_size;             /* L1 i-cache line size */
+       u32     log_iline_size;
+       u32     ilines_per_page;
+};
+extern struct cpu_caches cpu_caches;
 #endif
diff -r 7b350fc692d5 -r 3ee3376a5eb3 xen/include/asm-powerpc/config.h
--- a/xen/include/asm-powerpc/config.h  Wed Sep 13 18:41:11 2006 -0400
+++ b/xen/include/asm-powerpc/config.h  Thu Sep 14 01:12:26 2006 -0400
@@ -43,9 +43,6 @@ extern char __bss_start[];
 /* align addr on a size boundary - adjust address up/down if needed */
 #define ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
 #define ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
-
-/* this should be per processor, but for now */
-#define CACHE_LINE_SIZE 128
 
 /* 256M - 64M of Xen space seems like a nice number */
 #define CONFIG_MIN_DOM0_PAGES (192 << (20 - PAGE_SHIFT))

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