[Xen-changelog] [xen-3.0.3-testing] [HVM][SVM] Obtaining instruction address needs to mask to 32 bits

["Xen patchbot-3.0.3-testing" <patchbot-3.0.3-testing@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1159527051 -3600
# Node ID 792fb641ea7b2a7bdd65ac3c959f92b7528e157a
# Parent  e229687561cff6d4daa0548c746c07e549bbc0ca
[HVM][SVM] Obtaining instruction address needs to mask to 32 bits
if not running in 64-bit mode.
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
 xen/arch/x86/hvm/svm/emulate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletion(-)

diff -r e229687561cf -r 792fb641ea7b xen/arch/x86/hvm/svm/emulate.c
--- a/xen/arch/x86/hvm/svm/emulate.c    Fri Sep 29 11:25:25 2006 +0100
+++ b/xen/arch/x86/hvm/svm/emulate.c    Fri Sep 29 11:50:51 2006 +0100
@@ -341,7 +341,11 @@ unsigned long svm_rip2pointer(struct vmc
      * %cs is update, but fortunately, base contain the valid base address
      * no matter what kind of addressing is used.
      */
-    return vmcb->cs.base + vmcb->rip;
+    unsigned long p = vmcb->cs.base + vmcb->rip;
+    if (!(vmcb->cs.attributes.fields.l && vmcb->efer & EFER_LMA))
+        return (u32)p; /* mask to 32 bits */
+    /* NB. Should mask to 16 bits if in real mode or 16-bit protected mode. */
+    return p;
 }
 
 

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