[Xen-changelog] [xen-unstable] [IA64] backport check_sal_cache_flush()

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 6e7cc23ab18c23fdb2a8b4d0a7778c4144851818
# Parent  5727c3c4070ec5391b53c20a953af5259653629f
[IA64] backport check_sal_cache_flush()

Backport check_sal_cache_flush() from Linux/ia64.  This checks for
SAL_CACHE_FLUSH implementations that drop interrupts and calls
PAL_CACHE_FLUSH instead.  This should only be necessary on hp
rx5670 systems.

Signed-off-by: Alex Williamson <alex.williamson@xxxxxx>
---
 xen/arch/ia64/linux-xen/sal.c                  |   75 +++++++++++++++++++++++++
 xen/include/asm-ia64/linux-xen/asm/processor.h |   18 ++++++
 xen/include/asm-ia64/linux/asm/sal.h           |   10 ---
 3 files changed, 94 insertions(+), 9 deletions(-)

diff -r 5727c3c4070e -r 6e7cc23ab18c xen/arch/ia64/linux-xen/sal.c
--- a/xen/arch/ia64/linux-xen/sal.c     Mon Oct 02 21:42:59 2006 -0600
+++ b/xen/arch/ia64/linux-xen/sal.c     Mon Oct 02 21:53:07 2006 -0600
@@ -16,8 +16,10 @@
 
 #ifdef XEN
 #include <linux/smp.h>
+#include <asm/hw_irq.h>
 #include <xen/lib.h>
 #endif
+#include <asm/delay.h>
 #include <asm/page.h>
 #include <asm/sal.h>
 #include <asm/pal.h>
@@ -218,6 +220,77 @@ static void __init sal_desc_ap_wakeup(vo
 static void __init sal_desc_ap_wakeup(void *p) { }
 #endif
 
+/*
+ * HP rx5670 firmware polls for interrupts during SAL_CACHE_FLUSH by reading
+ * cr.ivr, but it never writes cr.eoi.  This leaves any interrupt marked as
+ * "in-service" and masks other interrupts of equal or lower priority.
+ *
+ * HP internal defect reports: F1859, F2775, F3031.
+ */
+static int sal_cache_flush_drops_interrupts;
+
+static void __init
+check_sal_cache_flush (void)
+{
+       unsigned long flags, itv;
+       int cpu;
+       u64 vector;
+
+       cpu = get_cpu();
+       local_irq_save(flags);
+
+       /*
+        * Schedule a timer interrupt, wait until it's reported, and see if
+        * SAL_CACHE_FLUSH drops it.
+        */
+       itv = ia64_get_itv();
+       BUG_ON((itv & (1 << 16)) == 0);
+
+       ia64_set_itv(IA64_TIMER_VECTOR);
+       ia64_set_itm(ia64_get_itc() + 1000);
+
+       while (!ia64_get_irr(IA64_TIMER_VECTOR))
+               cpu_relax();
+
+       ia64_sal_cache_flush(3);
+
+       if (ia64_get_irr(IA64_TIMER_VECTOR)) {
+               vector = ia64_get_ivr();
+               ia64_eoi();
+       } else {
+               sal_cache_flush_drops_interrupts = 1;
+               printk(KERN_ERR "SAL: SAL_CACHE_FLUSH drops interrupts; "
+                       "PAL_CACHE_FLUSH will be used instead\n");
+               ia64_eoi();
+       }
+
+       ia64_set_itv(itv);
+       local_irq_restore(flags);
+       put_cpu();
+}
+
+s64
+ia64_sal_cache_flush (u64 cache_type)
+{
+       struct ia64_sal_retval isrv;
+
+       if (sal_cache_flush_drops_interrupts) {
+               unsigned long flags;
+               u64 progress;
+               s64 rc;
+
+               progress = 0;
+               local_irq_save(flags);
+               rc = ia64_pal_cache_flush(cache_type,
+                       PAL_CACHE_FLUSH_INVALIDATE, &progress, NULL);
+               local_irq_restore(flags);
+               return rc;
+       }
+
+       SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
+       return isrv.status;
+}
+
 void __init
 ia64_sal_init (struct ia64_sal_systab *systab)
 {
@@ -271,6 +344,8 @@ ia64_sal_init (struct ia64_sal_systab *s
                }
                p += SAL_DESC_SIZE(*p);
        }
+
+       check_sal_cache_flush();
 }
 
 int
diff -r 5727c3c4070e -r 6e7cc23ab18c 
xen/include/asm-ia64/linux-xen/asm/processor.h
--- a/xen/include/asm-ia64/linux-xen/asm/processor.h    Mon Oct 02 21:42:59 
2006 -0600
+++ b/xen/include/asm-ia64/linux-xen/asm/processor.h    Mon Oct 02 21:53:07 
2006 -0600
@@ -89,6 +89,7 @@
 
 #ifdef XEN
 #include <asm/xenprocessor.h>
+#include <xen/bitops.h>
 #else
 /* like above but expressed as bitfields for more efficient access: */
 struct ia64_psr {
@@ -571,6 +572,23 @@ ia64_eoi (void)
 
 #define cpu_relax()    ia64_hint(ia64_hint_pause)
 
+static inline int
+ia64_get_irr(unsigned int vector)
+{
+       unsigned int reg = vector / 64;
+       unsigned int bit = vector % 64;
+       u64 irr;
+
+       switch (reg) {
+       case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
+       case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
+       case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
+       case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
+       }
+
+       return test_bit(bit, &irr);
+}
+
 static inline void
 ia64_set_lrr0 (unsigned long val)
 {
diff -r 5727c3c4070e -r 6e7cc23ab18c xen/include/asm-ia64/linux/asm/sal.h
--- a/xen/include/asm-ia64/linux/asm/sal.h      Mon Oct 02 21:42:59 2006 -0600
+++ b/xen/include/asm-ia64/linux/asm/sal.h      Mon Oct 02 21:53:07 2006 -0600
@@ -657,15 +657,7 @@ ia64_sal_freq_base (unsigned long which,
        return isrv.status;
 }
 
-/* Flush all the processor and platform level instruction and/or data caches */
-static inline s64
-ia64_sal_cache_flush (u64 cache_type)
-{
-       struct ia64_sal_retval isrv;
-       SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
-       return isrv.status;
-}
-
+extern s64 ia64_sal_cache_flush (u64 cache_type);
 
 /* Initialize all the processor and platform level instruction and data caches 
*/
 static inline s64

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