[Xen-changelog] [xen-unstable] [IA64] Passing address of PSCB is not needed

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User awilliam@xxxxxxxxxxxx
# Date 1169088948 25200
# Node ID 7e9077dd4010a64d2161d10b688412c998ec7eff
# Parent  efaf9c2de07e74a847c05e2cddae8df08851f55c
[IA64] Passing address of PSCB is not needed

Since the address of PSCB is decided by xenolinux now,
passing address of PSCB to xenolinux is not needed.

Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
 xen/arch/ia64/xen/faults.c      |    4 ----
 xen/arch/ia64/xen/hyperprivop.S |   17 -----------------
 2 files changed, 21 deletions(-)

diff -r efaf9c2de07e -r 7e9077dd4010 xen/arch/ia64/xen/faults.c
--- a/xen/arch/ia64/xen/faults.c        Wed Jan 17 19:51:40 2007 -0700
+++ b/xen/arch/ia64/xen/faults.c        Wed Jan 17 19:55:48 2007 -0700
@@ -91,7 +91,6 @@ void reflect_interruption(unsigned long 
 
        regs->cr_iip = ((unsigned long)PSCBX(v, iva) + vector) & ~0xffUL;
        regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET;
-       regs->r31 = current->domain->arch.shared_info_va + XSI_IPSR_OFS;
 
        v->vcpu_info->evtchn_upcall_mask = 1;
        PSCB(v, interrupt_collection_enabled) = 0;
@@ -152,7 +151,6 @@ void reflect_event(void)
 
        regs->cr_iip = v->arch.event_callback_ip;
        regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET;
-       regs->r31 = current->domain->arch.shared_info_va + XSI_IPSR_OFS;
 
        v->vcpu_info->evtchn_upcall_mask = 1;
        PSCB(v, interrupt_collection_enabled) = 0;
@@ -263,8 +261,6 @@ void ia64_do_page_fault(unsigned long ad
                    ((unsigned long)PSCBX(current, iva) + fault) & ~0xffUL;
                regs->cr_ipsr =
                    (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET;
-               // NOTE: nested trap must NOT pass PSCB address
-               //regs->r31 = (unsigned long) &PSCB(current);
                perfc_incra(slow_reflect, fault >> 8);
                return;
        }
diff -r efaf9c2de07e -r 7e9077dd4010 xen/arch/ia64/xen/hyperprivop.S
--- a/xen/arch/ia64/xen/hyperprivop.S   Wed Jan 17 19:51:40 2007 -0700
+++ b/xen/arch/ia64/xen/hyperprivop.S   Wed Jan 17 19:55:48 2007 -0700
@@ -292,11 +292,9 @@ ENTRY(hyper_ssm_i)
        // OK, now all set to go except for switch to virtual bank0
        mov r30=r2
        mov r29=r3
-       mov r28=r4
        ;;
        adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
        adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
-       adds r4=XSI_IPSR_OFS-XSI_PSR_IC_OFS,r18
        bsw.1;;
        // FIXME?: ar.unat is not really handled correctly,
        // but may not matter if the OS is NaT-clean
@@ -316,11 +314,9 @@ ENTRY(hyper_ssm_i)
        .mem.offset 8,0; st8.spill [r3]=r29,16 ;;
        .mem.offset 0,0; st8.spill [r2]=r30,16;
        .mem.offset 8,0; st8.spill [r3]=r31,16 ;;
-       mov r31=r4
        bsw.0 ;;
        mov r2=r30
        mov r3=r29
-       mov r4=r28
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
        st4 [r20]=r0 ;;
        mov pr=r31,-1 ;;
@@ -477,14 +473,12 @@ GLOBAL_ENTRY(fast_tick_reflect)
        // OK, now all set to go except for switch to virtual bank0
        mov r30=r2
        mov r29=r3
-       mov r27=r4
 #ifdef HANDLE_AR_UNAT
        mov r28=ar.unat;
 #endif
        ;;
        adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18
        adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18
-       adds r4=XSI_IPSR_OFS-XSI_PSR_IC_OFS,r18
        ;;
        bsw.1;;
        .mem.offset 0,0; st8.spill [r2]=r16,16;
@@ -516,13 +510,11 @@ GLOBAL_ENTRY(fast_tick_reflect)
        ld8 r22=[r2],16;
        ld8 r23=[r3],16;;
 #endif
-       mov r31=r4
        ;;
        bsw.0 ;;
        mov r24=ar.unat;
        mov r2=r30
        mov r3=r29
-       mov r4=r27
 #ifdef HANDLE_AR_UNAT
        mov ar.unat=r28;
 #endif
@@ -665,10 +657,8 @@ ENTRY(fast_reflect)
 #ifdef HANDLE_AR_UNAT
        mov r28=ar.unat;
 #endif
-       mov r27=r4
        adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
        adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18
-       adds r4=XSI_IPSR_OFS-XSI_PSR_IC_OFS,r18
        ;;
        bsw.1;;
        .mem.offset 0,0; st8.spill [r2]=r16,16;
@@ -700,7 +690,6 @@ ENTRY(fast_reflect)
        ld8 r22=[r2],16;
        ld8 r23=[r3],16;;
 #endif
-       mov r31=r4
        ;;
        bsw.0 ;;
        mov r24=ar.unat;
@@ -709,7 +698,6 @@ ENTRY(fast_reflect)
 #ifdef HANDLE_AR_UNAT
        mov ar.unat=r28;
 #endif
-       mov r4=r27
        ;;
        adds r25=XSI_B1NATS_OFS-XSI_PSR_IC_OFS,r18 ;
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
@@ -1311,13 +1299,8 @@ ENTRY(rfi_with_interrupt)
        .mem.offset 8,0; st8.spill [r3]=r29,16 ;;
        .mem.offset 0,0; st8.spill [r2]=r30,16;
        .mem.offset 8,0; st8.spill [r3]=r31,16 ;;
-       movl r31=XSI_IPSR;;
        bsw.0 ;;
        mov r2=r30; mov r3=r29;;
-#else
-       bsw.1;;
-       movl r31=XSI_IPSR;;
-       bsw.0 ;;
 #endif
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
        st4 [r20]=r0 ;;

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