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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] [IA64] merge increment_iip
# HG changeset patch
# User awilliam@xxxxxxxxxxxx
# Date 1168551744 25200
# Node ID db72b85b81bb1478cb2e91b6411596648bdc9a2c
# Parent d607d575ec6a03ca7f67f37020bef70a731d1c74
[IA64] merge increment_iip
Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
xen/arch/ia64/vmx/mmio.c | 10 ++++----
xen/arch/ia64/vmx/vmx_process.c | 10 ++++----
xen/arch/ia64/vmx/vmx_vcpu.c | 45 ----------------------------------------
xen/arch/ia64/vmx/vmx_virt.c | 2 -
xen/arch/ia64/xen/vcpu.c | 14 ++++++++++++
xen/include/asm-ia64/vcpu.h | 1
xen/include/asm-ia64/vmx_vcpu.h | 2 -
7 files changed, 26 insertions(+), 58 deletions(-)
diff -r d607d575ec6a -r db72b85b81bb xen/arch/ia64/vmx/mmio.c
--- a/xen/arch/ia64/vmx/mmio.c Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/arch/ia64/vmx/mmio.c Thu Jan 11 14:42:24 2007 -0700
@@ -362,7 +362,7 @@ void emulate_io_inst(VCPU *vcpu, u64 pad
temp += post_update;
vcpu_set_gr(vcpu,inst.M15.r3,temp,0);
- vmx_vcpu_increment_iip(vcpu);
+ vcpu_increment_iip(vcpu);
return;
}
// Floating-point Load Pair + Imm ldfp8 M12
@@ -382,9 +382,9 @@ void emulate_io_inst(VCPU *vcpu, u64 pad
vcpu_set_fpreg(vcpu,inst.M12.f2,&v);
padr += 8;
vcpu_set_gr(vcpu,inst.M12.r3,padr,0);
- vmx_vcpu_increment_iip(vcpu);
+ vcpu_increment_iip(vcpu);
return;
- }
+ }
else{
panic_domain
(NULL,"This memory access instr can't be emulated: %lx pc=%lx\n ",
@@ -420,5 +420,5 @@ void emulate_io_inst(VCPU *vcpu, u64 pad
*/
}
}
- vmx_vcpu_increment_iip(vcpu);
-}
+ vcpu_increment_iip(vcpu);
+}
diff -r d607d575ec6a -r db72b85b81bb xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/arch/ia64/vmx/vmx_process.c Thu Jan 11 14:42:24 2007 -0700
@@ -93,7 +93,7 @@ void vmx_reflect_interruption(u64 ifa, u
if (vector == IA64_FP_FAULT_VECTOR) {
status = handle_fpu_swa(1, regs, isr);
if (!status) {
- vmx_vcpu_increment_iip(vcpu);
+ vcpu_increment_iip(vcpu);
return;
} else if (IA64_RETRY == status)
return;
@@ -104,7 +104,7 @@ void vmx_reflect_interruption(u64 ifa, u
if (!status)
return;
else if (IA64_RETRY == status) {
- vmx_vcpu_decrement_iip(vcpu);
+ vcpu_decrement_iip(vcpu);
return;
}
}
@@ -143,16 +143,16 @@ vmx_ia64_handle_break (unsigned long ifa
/* Allow hypercalls only when cpl = 0. */
if (iim == d->arch.breakimm) {
ia64_hypercall(regs);
- vmx_vcpu_increment_iip(v);
+ vcpu_increment_iip(v);
return IA64_NO_FAULT;
}
else if(iim == DOMN_PAL_REQUEST){
pal_emul(v);
- vmx_vcpu_increment_iip(v);
+ vcpu_increment_iip(v);
return IA64_NO_FAULT;
}else if(iim == DOMN_SAL_REQUEST){
sal_emul(v);
- vmx_vcpu_increment_iip(v);
+ vcpu_increment_iip(v);
return IA64_NO_FAULT;
}
}
diff -r d607d575ec6a -r db72b85b81bb xen/arch/ia64/vmx/vmx_vcpu.c
--- a/xen/arch/ia64/vmx/vmx_vcpu.c Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/arch/ia64/vmx/vmx_vcpu.c Thu Jan 11 14:42:24 2007 -0700
@@ -145,48 +145,6 @@ vmx_vcpu_set_psr(VCPU *vcpu, unsigned lo
return ;
}
-/* Adjust slot both in pt_regs and vpd, upon vpsr.ri which
- * should have sync with ipsr in entry.
- *
- * Clear some bits due to successfully emulation.
- */
-IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu)
-{
- // TODO: trap_bounce?? Eddie
- REGS *regs = vcpu_regs(vcpu);
- IA64_PSR *ipsr = (IA64_PSR *)®s->cr_ipsr;
-
- if (ipsr->ri == 2) {
- ipsr->ri = 0;
- regs->cr_iip += 16;
- } else {
- ipsr->ri++;
- }
-
- ipsr->val &=
- (~ (IA64_PSR_ID |IA64_PSR_DA | IA64_PSR_DD |
- IA64_PSR_SS | IA64_PSR_ED | IA64_PSR_IA
- ));
-
- return (IA64_NO_FAULT);
-}
-
-
-IA64FAULT vmx_vcpu_decrement_iip(VCPU *vcpu)
-{
- REGS *regs = vcpu_regs(vcpu);
- IA64_PSR *ipsr = (IA64_PSR *)®s->cr_ipsr;
-
- if (ipsr->ri == 0) {
- ipsr->ri = 2;
- regs->cr_iip -= 16;
- } else {
- ipsr->ri--;
- }
- return (IA64_NO_FAULT);
-}
-
-
IA64FAULT vmx_vcpu_cover(VCPU *vcpu)
{
REGS *regs = vcpu_regs(vcpu);
@@ -199,14 +157,11 @@ IA64FAULT vmx_vcpu_cover(VCPU *vcpu)
return (IA64_NO_FAULT);
}
-
struct virtual_platform_def *
vmx_vcpu_get_plat(VCPU *vcpu)
{
return &(vcpu->domain->arch.vmx_platform);
}
-
-
IA64FAULT vmx_vcpu_set_rr(VCPU *vcpu, u64 reg, u64 val)
{
diff -r d607d575ec6a -r db72b85b81bb xen/arch/ia64/vmx/vmx_virt.c
--- a/xen/arch/ia64/vmx/vmx_virt.c Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/arch/ia64/vmx/vmx_virt.c Thu Jan 11 14:42:24 2007 -0700
@@ -1568,7 +1568,7 @@ if ( (cause == 0xff && opcode == 0x1e000
#endif
if ( status == IA64_NO_FAULT && cause !=EVENT_RFI ) {
- vmx_vcpu_increment_iip(vcpu);
+ vcpu_increment_iip(vcpu);
}
recover_if_physical_mode(vcpu);
diff -r d607d575ec6a -r db72b85b81bb xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/arch/ia64/xen/vcpu.c Thu Jan 11 14:42:24 2007 -0700
@@ -695,6 +695,20 @@ IA64FAULT vcpu_increment_iip(VCPU * vcpu
return IA64_NO_FAULT;
}
+IA64FAULT vcpu_decrement_iip(VCPU * vcpu)
+{
+ REGS *regs = vcpu_regs(vcpu);
+ struct ia64_psr *ipsr = (struct ia64_psr *)®s->cr_ipsr;
+
+ if (ipsr->ri == 0) {
+ ipsr->ri = 2;
+ regs->cr_iip -= 16;
+ } else
+ ipsr->ri--;
+
+ return IA64_NO_FAULT;
+}
+
IA64FAULT vcpu_set_ifa(VCPU * vcpu, u64 val)
{
PSCB(vcpu, ifa) = val;
diff -r d607d575ec6a -r db72b85b81bb xen/include/asm-ia64/vcpu.h
--- a/xen/include/asm-ia64/vcpu.h Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/include/asm-ia64/vcpu.h Thu Jan 11 14:42:24 2007 -0700
@@ -77,6 +77,7 @@ extern IA64FAULT vcpu_get_isr(VCPU * vcp
extern IA64FAULT vcpu_get_isr(VCPU * vcpu, u64 * pval);
extern IA64FAULT vcpu_get_iip(VCPU * vcpu, u64 * pval);
extern IA64FAULT vcpu_increment_iip(VCPU * vcpu);
+extern IA64FAULT vcpu_decrement_iip(VCPU * vcpu);
extern IA64FAULT vcpu_get_ifa(VCPU * vcpu, u64 * pval);
extern IA64FAULT vcpu_get_itir(VCPU * vcpu, u64 * pval);
extern unsigned long vcpu_get_itir_on_fault(VCPU * vcpu, u64 ifa);
diff -r d607d575ec6a -r db72b85b81bb xen/include/asm-ia64/vmx_vcpu.h
--- a/xen/include/asm-ia64/vmx_vcpu.h Thu Jan 11 14:27:39 2007 -0700
+++ b/xen/include/asm-ia64/vmx_vcpu.h Thu Jan 11 14:42:24 2007 -0700
@@ -115,8 +115,6 @@ extern void memwrite_v(VCPU * vcpu, thas
size_t s);
extern void memwrite_p(VCPU * vcpu, u64 * src, u64 * dest, size_t s);
extern void vcpu_load_kernel_regs(VCPU * vcpu);
-extern IA64FAULT vmx_vcpu_increment_iip(VCPU * vcpu);
-extern IA64FAULT vmx_vcpu_decrement_iip(VCPU * vcpu);
extern void vmx_switch_rr7(unsigned long, shared_info_t *, void *, void *,
void *);
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