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[Xen-changelog] [xen-unstable] x86 emulation: fix bswap



# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1171991150 0
# Node ID e7994a122aab535b7e13fd1686cc3b8ce5d4552a
# Parent  4719e34ed7a7b25f47f926c631b1efc263ccdf63
x86 emulation: fix bswap

REX.R needs to be decoded. Since it is simple to do, faster, and
smaller, let hardware do 32- and 64-bit BSWAP. 16-bite BSWAP is
undefined: emulate with observed behaviour (write zero).

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
 xen/arch/x86/x86_emulate.c |   30 ++++++++++--------------------
 1 files changed, 10 insertions(+), 20 deletions(-)

diff -r 4719e34ed7a7 -r e7994a122aab xen/arch/x86/x86_emulate.c
--- a/xen/arch/x86/x86_emulate.c        Tue Feb 20 16:57:50 2007 +0000
+++ b/xen/arch/x86/x86_emulate.c        Tue Feb 20 17:05:50 2007 +0000
@@ -2350,33 +2350,23 @@ x86_emulate(
 #endif
 
     case 0xc8 ... 0xcf: /* bswap */
-        dst.type  = OP_REG;
-        dst.reg   = decode_register(b & 7, &_regs, 0);
-        dst.val = *dst.reg;
+        dst.type = OP_REG;
+        dst.reg  = decode_register(
+            (b & 7) | ((rex_prefix & 1) << 3), &_regs, 0);
         switch ( dst.bytes = op_bytes )
         {
-        case 2:
-            dst.val = (((dst.val & 0x00FFUL) << 8) |
-                       ((dst.val & 0xFF00UL) >> 8));
+        default: /* case 2: */
+            /* Undefined behaviour. Writes zero on all tested CPUs. */
+            dst.val = 0;
             break;
         case 4:
-            dst.val = (((dst.val & 0x000000FFUL) << 24) |
-                       ((dst.val & 0x0000FF00UL) <<  8) |
-                       ((dst.val & 0x00FF0000UL) >>  8) |
-                       ((dst.val & 0xFF000000UL) >> 24));
-            break;
 #ifdef __x86_64__
+            __asm__ ( "bswap %k0" : "=r" (dst.val) : "0" (*dst.reg) );
+            break;
         case 8:
-            dst.val = (((dst.val & 0x00000000000000FFUL) << 56) |
-                       ((dst.val & 0x000000000000FF00UL) << 40) |
-                       ((dst.val & 0x0000000000FF0000UL) << 24) |
-                       ((dst.val & 0x00000000FF000000UL) <<  8) |
-                       ((dst.val & 0x000000FF00000000UL) >>  8) |
-                       ((dst.val & 0x0000FF0000000000UL) >> 24) |
-                       ((dst.val & 0x00FF000000000000UL) >> 40) |
-                       ((dst.val & 0xFF00000000000000UL) >> 56));
-            break;
 #endif
+            __asm__ ( "bswap %0" : "=r" (dst.val) : "0" (*dst.reg) );
+            break;
         }
         break;
     }

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