[Xen-changelog] [xen-unstable] [IA64] Avoid insertion of pte.ma=001 into VHPT

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Alex Williamson <alex.williamson@xxxxxx>
# Date 1175272035 21600
# Node ID e7da2fcb7a226a4a96a97f1c17711649309aa15c
# Parent  864a4553b2d0352213fa1caafa586f6fae6f458e
[IA64] Avoid insertion of pte.ma=001 into VHPT

A TLB entry shouldn't be inserted into VHPT when its memory
attribute field is 001 "software reserved".

Without this patch, a TLB fault expected by a guest OS is missing.

Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
---
 xen/arch/ia64/vmx/vmx_process.c |    5 +++++
 1 files changed, 5 insertions(+)

diff -r 864a4553b2d0 -r e7da2fcb7a22 xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c   Fri Mar 30 10:25:16 2007 -0600
+++ b/xen/arch/ia64/vmx/vmx_process.c   Fri Mar 30 10:27:15 2007 -0600
@@ -437,6 +437,11 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
         if (!guest_vhpt_lookup(vhpt_adr, &pteval)) {
             /* VHPT successfully read.  */
             if (pteval & _PAGE_P) {
+                if ((pteval & _PAGE_MA_MASK) == _PAGE_MA_ST) {
+                    vcpu_set_isr(v, misr.val);
+                    itlb_fault(v, vadr);
+                    return IA64_FAULT;
+                }
                 vcpu_get_rr(v, vadr, &rr);
                 itir = rr & (RR_RID_MASK | RR_PS_MASK);
                 thash_purge_and_insert(v, pteval, itir, vadr, ISIDE_TLB);

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