[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] Fix fixup of invalid PTE writes, broken by 13392:0fd65225e4c6.
# HG changeset patch # User Ian Campbell <ian.campbell@xxxxxxxxxxxxx> # Date 1183052420 -3600 # Node ID a5360bf1866892498f4fda9fb86f96035143221d # Parent d0608ecb56bc9dd77740096fd734332c46c737bd Fix fixup of invalid PTE writes, broken by 13392:0fd65225e4c6. By the time we test if addr is the upper word it has already been aligned to the 8 byte pte size. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxxxxx> --- xen/arch/x86/mm.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) diff -r d0608ecb56bc -r a5360bf18668 xen/arch/x86/mm.c --- a/xen/arch/x86/mm.c Wed Jun 27 22:20:17 2007 +0100 +++ b/xen/arch/x86/mm.c Thu Jun 28 18:40:20 2007 +0100 @@ -3240,6 +3240,7 @@ static int ptwr_emulated_update( struct ptwr_emulate_ctxt *ptwr_ctxt) { unsigned long mfn; + unsigned long unaligned_addr = addr; struct page_info *page; l1_pgentry_t pte, ol1e, nl1e, *pl1e; struct vcpu *v = current; @@ -3294,7 +3295,7 @@ static int ptwr_emulated_update( if ( unlikely(!get_page_from_l1e(nl1e, d)) ) { if ( (CONFIG_PAGING_LEVELS >= 3) && is_pv_32bit_domain(d) && - (bytes == 4) && (addr & 4) && !do_cmpxchg && + (bytes == 4) && (unaligned_addr & 4) && !do_cmpxchg && (l1e_get_flags(nl1e) & _PAGE_PRESENT) ) { /* _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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