[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] vt-d: Some fixes and cleanup of Intel iommu
# HG changeset patch # User Keir Fraser <keir.fraser@xxxxxxxxxx> # Date 1196253251 0 # Node ID f173cd885ffb3dc530ae082429ce75da978af867 # Parent 6fd17d0dcbcd8e9cd5dd2c5795f08f1ec0231d92 vt-d: Some fixes and cleanup of Intel iommu This patch modifies domain id in __iommu_flush_context() and __iommu_flush_iotlb() to be consistent consist with domain id set by context_set_domain_id(), avoids setting NULL to address space root and corrects macro cap_ndoms. Signed-off-by: Weidong Han <weidong.han@xxxxxxxxx> --- xen/arch/x86/hvm/vmx/vtd/intel-iommu.c | 22 ++++++++++++++++++++-- xen/include/asm-x86/hvm/vmx/intel-iommu.h | 3 ++- 2 files changed, 22 insertions(+), 3 deletions(-) diff -r 6fd17d0dcbcd -r f173cd885ffb xen/arch/x86/hvm/vmx/vtd/intel-iommu.c --- a/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c Tue Nov 27 12:49:16 2007 +0000 +++ b/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c Wed Nov 28 12:34:11 2007 +0000 @@ -276,6 +276,9 @@ static int __iommu_flush_context( unsigned long flag; unsigned long start_time; + /* Domain id in context is 1 based */ + did++; + /* * In the non-present entry flush case, if hardware doesn't cache * non-present entry we do nothing and if hardware cache non-present @@ -359,6 +362,9 @@ static int __iommu_flush_iotlb(struct io u64 val = 0, val_iva = 0; unsigned long flag; unsigned long start_time; + + /* Domain id in context is 1 based */ + did++; /* * In the non-present entry flush case, if hardware doesn't cache @@ -1037,6 +1043,18 @@ static int domain_context_mapping_one( context_set_translation_type(*context, CONTEXT_TT_PASS_THRU); else { + if ( !hd->pgd ) + { + struct dma_pte *pgd = (struct dma_pte *)alloc_xenheap_page(); + if ( !pgd ) + { + spin_unlock_irqrestore(&hd->mapping_lock, flags); + return -ENOMEM; + } + memset(pgd, 0, PAGE_SIZE); + hd->pgd = pgd; + } + context_set_address_root(*context, virt_to_maddr(hd->pgd)); context_set_translation_type(*context, CONTEXT_TT_MULTI_LEVEL); } @@ -1429,7 +1447,7 @@ void iommu_domain_teardown(struct domain return_devices_to_dom0(d); } -static int domain_context_mapped(struct domain *domain, struct pci_dev *pdev) +static int domain_context_mapped(struct pci_dev *pdev) { struct acpi_drhd_unit *drhd; struct iommu *iommu; @@ -1589,7 +1607,7 @@ static int iommu_prepare_rmrr_dev( if ( ret ) return ret; - if ( domain_context_mapped(d, pdev) == 0 ) + if ( domain_context_mapped(pdev) == 0 ) { drhd = acpi_find_matched_drhd_unit(pdev); ret = domain_context_mapping(d, drhd->iommu, pdev); diff -r 6fd17d0dcbcd -r f173cd885ffb xen/include/asm-x86/hvm/vmx/intel-iommu.h --- a/xen/include/asm-x86/hvm/vmx/intel-iommu.h Tue Nov 27 12:49:16 2007 +0000 +++ b/xen/include/asm-x86/hvm/vmx/intel-iommu.h Wed Nov 28 12:34:11 2007 +0000 @@ -89,7 +89,8 @@ #define cap_plmr(c) (((c) >> 5) & 1) #define cap_rwbf(c) (((c) >> 4) & 1) #define cap_afl(c) (((c) >> 3) & 1) -#define cap_ndoms(c) (2 ^ (4 + 2 * ((c) & 0x7))) +#define cap_ndoms(c) (1 << (4 + 2 * ((c) & 0x7))) + /* * Extended Capability Register */ _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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