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[Xen-changelog] [xen-3.1-testing] [IA64] Fix TLB insertion for subpaging



# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1197031557 0
# Node ID 4e16701e94b1516d451b688ffd78202bc002ed15
# Parent  1301c84728aa7bd4724f48fcb1f1fd6bb7146953
[IA64] Fix TLB insertion for subpaging

Without this patch, Longhorn is sure to hang up.  .NET application
might hit this bug.  itc.i instruction is repeated forever, because
TLB entry with smaller page size is volatile.

Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
xen-unstable changeset: 16177:52d9f5028397081990791e633aa12e112bfe2677
xen-unstable date: Fri Oct 12 14:49:37 2007 -0600
---
 xen/arch/ia64/vmx/vtlb.c |   17 ++++++++++-------
 1 files changed, 10 insertions(+), 7 deletions(-)

diff -r 1301c84728aa -r 4e16701e94b1 xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c  Fri Dec 07 12:45:37 2007 +0000
+++ b/xen/arch/ia64/vmx/vtlb.c  Fri Dec 07 12:45:57 2007 +0000
@@ -556,13 +556,16 @@ void thash_purge_and_insert(VCPU *v, u64
         }
         else {
             u64 psr;
-            phy_pte  &= ~PAGE_FLAGS_RV_MASK;
-            psr = ia64_clear_ic();
-            ia64_itc(type + 1, ifa, phy_pte, ps);
-            ia64_set_psr(psr);
-            ia64_srlz_i();
-            // ps < mrr.ps, this is not supported
-            // panic_domain(NULL, "%s: ps (%lx) < mrr.ps \n", __func__, ps);
+
+            vtlb_insert(v, pte, itir, ifa);
+            vcpu_quick_region_set(PSCBX(v, tc_regions), ifa);
+            if (!(pte & VTLB_PTE_IO)) {
+                phy_pte  &= ~PAGE_FLAGS_RV_MASK;
+                psr = ia64_clear_ic();
+                ia64_itc(type + 1, ifa, phy_pte, ps);
+                ia64_set_psr(psr);
+                ia64_srlz_i();
+            }
         }
     }
     else{

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