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[Xen-changelog] [xen-unstable] [IA64] Fix thash long format crash



# HG changeset patch
# User Alex Williamson <alex.williamson@xxxxxx>
# Date 1200690680 25200
# Node ID ff90abf572f2d5aa7d4a7f764b3c343b66a06210
# Parent  759a9fb42645e4c95eb68124abab44c832f7e746
[IA64] Fix thash long format crash

Do not overwrite r25 (and restore r24) for C fallback of vmx_asm_thash.

Signed-off-by: Tristan Gingold <tgingold@xxxxxxx>
---
 xen/arch/ia64/vmx/optvfault.S |   15 +++++++++------
 1 files changed, 9 insertions(+), 6 deletions(-)

diff -r 759a9fb42645 -r ff90abf572f2 xen/arch/ia64/vmx/optvfault.S
--- a/xen/arch/ia64/vmx/optvfault.S     Fri Jan 18 14:09:04 2008 -0700
+++ b/xen/arch/ia64/vmx/optvfault.S     Fri Jan 18 14:11:20 2008 -0700
@@ -17,6 +17,7 @@
 #include <asm/vmx_vpd.h>
 #include <asm/vmx_pal_vsa.h>
 #include <asm/asm-offsets.h>
+#include <asm/virt_event.h>
 #include <asm-ia64/vmx_mm_def.h>
 #include <asm-ia64/vmx_phy_mode.h>
 
@@ -467,24 +468,26 @@ GLOBAL_ENTRY(vmx_asm_thash)
     ;;                                                     
 vmx_asm_thash_back1:
     shr.u r23=r19,61           // get RR number
-    adds r25=VCPU_VRR0_OFS,r21 // get vcpu->arch.arch_vmx.vrr[0]'s addr
+    adds r28=VCPU_VRR0_OFS,r21 // get vcpu->arch.arch_vmx.vrr[0]'s addr
     adds r16=IA64_VPD_VPTA_OFFSET,r16  // get virtual pta 
     ;;
-    shladd r27=r23,3,r25       // get vcpu->arch.arch_vmx.vrr[r23]'s addr
+    shladd r27=r23,3,r28       // get vcpu->arch.arch_vmx.vrr[r23]'s addr
     ld8 r17=[r16]              // get virtual PTA
     mov r26=1
     ;;
     extr.u r29=r17,2,6         // get pta.size
-    ld8 r25=[r27]              // get vcpu->arch.arch_vmx.vrr[r23]'s value
+    ld8 r28=[r27]              // get vcpu->arch.arch_vmx.vrr[r23]'s value
     ;;
     // Fall-back to C if VF (long format) is set
     tbit.nz p6,p0=r17,8
     mov b0=r24
-    (p6) br.cond.dpnt.many vmx_virtualization_fault_back
-    extr.u r25=r25,2,6         // get rr.ps
+    ;;
+(p6) mov r24=EVENT_THASH
+(p6) br.cond.dpnt.many vmx_virtualization_fault_back
+    extr.u r28=r28,2,6         // get rr.ps
     shl r22=r26,r29            // 1UL << pta.size
     ;;
-    shr.u r23=r19,r25          // vaddr >> rr.ps
+    shr.u r23=r19,r28          // vaddr >> rr.ps
     adds r26=3,r29             // pta.size + 3 
     shl r27=r17,3              // pta << 3 
     ;;

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