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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] Port acpi bit register support from Linux.
# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1209634911 -3600
# Node ID 93bc6d9b5f3186ad5f0221a8e23e524284c3197e
# Parent 74cae5c11f0a2fb81212b52b7a7b38b599fe2ac2
Port acpi bit register support from Linux.
Bit register read/write is required by deep C code.
Remove dependendy on acpi_sinfo.
Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
---
xen/arch/x86/acpi/boot.c | 16 ++
xen/drivers/acpi/Makefile | 1
xen/drivers/acpi/hwregs.c | 339 +++++++++++++++++++++++++++++++++++++++++---
xen/drivers/acpi/utglobal.c | 136 +++++++++++++++++
4 files changed, 473 insertions(+), 19 deletions(-)
diff -r 74cae5c11f0a -r 93bc6d9b5f31 xen/arch/x86/acpi/boot.c
--- a/xen/arch/x86/acpi/boot.c Thu May 01 10:40:58 2008 +0100
+++ b/xen/arch/x86/acpi/boot.c Thu May 01 10:41:51 2008 +0100
@@ -462,6 +462,20 @@ bad:
}
#endif
+static void __init
+acpi_fadt_parse_reg(struct acpi_table_fadt *fadt)
+{
+ memcpy(&acpi_gbl_FADT, fadt, sizeof(acpi_gbl_FADT));
+
+ memcpy(&acpi_gbl_xpm1a_enable, &(fadt->xpm1a_event_block),
+ sizeof(acpi_gbl_xpm1a_enable));
+ memcpy(&acpi_gbl_xpm1b_enable, &(fadt->xpm1b_event_block),
+ sizeof(acpi_gbl_xpm1b_enable));
+
+ acpi_gbl_xpm1a_enable.address += 2;
+ acpi_gbl_xpm1b_enable.address += 2;
+}
+
static int __init acpi_parse_fadt(unsigned long phys, unsigned long size)
{
struct acpi_table_fadt *fadt = NULL;
@@ -512,6 +526,8 @@ static int __init acpi_parse_fadt(unsign
#ifdef CONFIG_ACPI_SLEEP
acpi_fadt_parse_sleep_info(fadt);
#endif
+
+ acpi_fadt_parse_reg(fadt);
return 0;
}
diff -r 74cae5c11f0a -r 93bc6d9b5f31 xen/drivers/acpi/Makefile
--- a/xen/drivers/acpi/Makefile Thu May 01 10:40:58 2008 +0100
+++ b/xen/drivers/acpi/Makefile Thu May 01 10:41:51 2008 +0100
@@ -3,3 +3,4 @@ obj-y += osl.o
obj-y += osl.o
obj-$(x86) += hwregs.o
+obj-$(x86) += utglobal.o
diff -r 74cae5c11f0a -r 93bc6d9b5f31 xen/drivers/acpi/hwregs.c
--- a/xen/drivers/acpi/hwregs.c Thu May 01 10:40:58 2008 +0100
+++ b/xen/drivers/acpi/hwregs.c Thu May 01 10:41:51 2008 +0100
@@ -53,6 +53,241 @@
#define _COMPONENT ACPI_HARDWARE
ACPI_MODULE_NAME("hwregs")
+/*******************************************************************************
+ *
+ * FUNCTION: acpi_hw_get_register_bit_mask
+ *
+ * PARAMETERS: register_id - Index of ACPI Register to access
+ *
+ * RETURN: The bitmask to be used when accessing the register
+ *
+ * DESCRIPTION: Map register_id into a register bitmask.
+ *
+
******************************************************************************/
+struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
+{
+ ACPI_FUNCTION_ENTRY();
+
+ if (register_id > ACPI_BITREG_MAX) {
+ ACPI_DEBUG_PRINT((AE_INFO, "Invalid BitRegister ID: %X",
+ register_id));
+ return (NULL);
+ }
+
+ return (&acpi_gbl_bit_register_info[register_id]);
+}
+
+/*******************************************************************************
+ *
+ * FUNCTION: acpi_get_register
+ *
+ * PARAMETERS: register_id - ID of ACPI bit_register to access
+ * return_value - Value that was read from the register
+ *
+ * RETURN: Status and the value read from specified Register. Value
+ * returned is normalized to bit0 (is shifted all the way right)
+ *
+ * DESCRIPTION: ACPI bit_register read function.
+ *
+
******************************************************************************/
+
+acpi_status acpi_get_register_unlocked(u32 register_id, u32 * return_value)
+{
+ u32 register_value = 0;
+ struct acpi_bit_register_info *bit_reg_info;
+ acpi_status status;
+
+ ACPI_FUNCTION_TRACE(acpi_get_register);
+
+ /* Get the info structure corresponding to the requested ACPI Register
*/
+
+ bit_reg_info = acpi_hw_get_bit_register_info(register_id);
+ if (!bit_reg_info) {
+ return_ACPI_STATUS(AE_BAD_PARAMETER);
+ }
+
+ /* Read from the register */
+
+ status = acpi_hw_register_read(bit_reg_info->parent_register,
+ ®ister_value);
+
+ if (ACPI_SUCCESS(status)) {
+
+ /* Normalize the value that was read */
+
+ register_value =
+ ((register_value & bit_reg_info->access_bit_mask)
+ >> bit_reg_info->bit_position);
+
+ *return_value = register_value;
+
+ ACPI_DEBUG_PRINT((ACPI_DB_IO, "Read value %8.8X register %X\n",
+ register_value,
+ bit_reg_info->parent_register));
+ }
+
+ return_ACPI_STATUS(status);
+}
+
+acpi_status acpi_get_register(u32 register_id, u32 * return_value)
+{
+ acpi_status status;
+ //acpi_cpu_flags flags;
+ //flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
+ status = acpi_get_register_unlocked(register_id, return_value);
+ //acpi_os_release_lock(acpi_gbl_hardware_lock, flags);
+ return status;
+}
+
+/*******************************************************************************
+ *
+ * FUNCTION: acpi_set_register
+ *
+ * PARAMETERS: register_id - ID of ACPI bit_register to access
+ * Value - (only used on write) value to write to the
+ * Register, NOT pre-normalized to the bit pos
+ *
+ * RETURN: Status
+ *
+ * DESCRIPTION: ACPI Bit Register write function.
+ *
+
******************************************************************************/
+acpi_status acpi_set_register(u32 register_id, u32 value)
+{
+ u32 register_value = 0;
+ struct acpi_bit_register_info *bit_reg_info;
+ acpi_status status;
+ //acpi_cpu_flags lock_flags;
+
+ ACPI_FUNCTION_TRACE_U32(acpi_set_register, register_id);
+
+ /* Get the info structure corresponding to the requested ACPI Register
*/
+
+ bit_reg_info = acpi_hw_get_bit_register_info(register_id);
+ if (!bit_reg_info) {
+ ACPI_DEBUG_PRINT((AE_INFO, "Bad ACPI HW RegisterId: %X",
+ register_id));
+ return_ACPI_STATUS(AE_BAD_PARAMETER);
+ }
+
+ //lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
+
+ /* Always do a register read first so we can insert the new bits */
+
+ status = acpi_hw_register_read(bit_reg_info->parent_register,
+ ®ister_value);
+ if (ACPI_FAILURE(status)) {
+ goto unlock_and_exit;
+ }
+
+ /*
+ * Decode the Register ID
+ * Register ID = [Register block ID] | [bit ID]
+ *
+ * Check bit ID to fine locate Register offset.
+ * Check Mask to determine Register offset, and then read-write.
+ */
+ switch (bit_reg_info->parent_register) {
+ case ACPI_REGISTER_PM1_STATUS:
+
+ /*
+ * Status Registers are different from the rest. Clear by
+ * writing 1, and writing 0 has no effect. So, the only relevant
+ * information is the single bit we're interested in, all
others should
+ * be written as 0 so they will be left unchanged.
+ */
+ value = ACPI_REGISTER_PREPARE_BITS(value,
+ bit_reg_info->bit_position,
+ bit_reg_info->
+ access_bit_mask);
+ if (value) {
+ status =
acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
+ (u16) value);
+ register_value = 0;
+ }
+ break;
+
+ case ACPI_REGISTER_PM1_ENABLE:
+
+ ACPI_REGISTER_INSERT_VALUE(register_value,
+ bit_reg_info->bit_position,
+ bit_reg_info->access_bit_mask,
+ value);
+
+ status = acpi_hw_register_write(ACPI_REGISTER_PM1_ENABLE,
+ (u16) register_value);
+ break;
+
+ case ACPI_REGISTER_PM1_CONTROL:
+
+ /*
+ * Write the PM1 Control register.
+ * Note that at this level, the fact that there are actually TWO
+ * registers (A and B - and B may not exist) is abstracted.
+ */
+ ACPI_DEBUG_PRINT((ACPI_DB_IO, "PM1 control: Read %X\n",
+ register_value));
+
+ ACPI_REGISTER_INSERT_VALUE(register_value,
+ bit_reg_info->bit_position,
+ bit_reg_info->access_bit_mask,
+ value);
+
+ status = acpi_hw_register_write(ACPI_REGISTER_PM1_CONTROL,
+ (u16) register_value);
+ break;
+
+ case ACPI_REGISTER_PM2_CONTROL:
+
+ status = acpi_hw_register_read(ACPI_REGISTER_PM2_CONTROL,
+ ®ister_value);
+ if (ACPI_FAILURE(status)) {
+ goto unlock_and_exit;
+ }
+
+ ACPI_DEBUG_PRINT((ACPI_DB_IO,
+ "PM2 control: Read %X from %8.8X%8.8X\n",
+ register_value,
+ ACPI_FORMAT_UINT64(acpi_gbl_FADT.
+ xpm2_control_block.
+ address)));
+
+ ACPI_REGISTER_INSERT_VALUE(register_value,
+ bit_reg_info->bit_position,
+ bit_reg_info->access_bit_mask,
+ value);
+
+ ACPI_DEBUG_PRINT((ACPI_DB_IO,
+ "About to write %4.4X to %8.8X%8.8X\n",
+ register_value,
+ ACPI_FORMAT_UINT64(acpi_gbl_FADT.
+ xpm2_control_block.
+ address)));
+
+ status = acpi_hw_register_write(ACPI_REGISTER_PM2_CONTROL,
+ (u8) (register_value));
+ break;
+
+ default:
+ break;
+ }
+
+ unlock_and_exit:
+
+ //acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
+
+ /* Normalize the value that was read */
+
+ ACPI_DEBUG_EXEC(register_value =
+ ((register_value & bit_reg_info->access_bit_mask) >>
+ bit_reg_info->bit_position));
+
+ ACPI_DEBUG_PRINT((ACPI_DB_IO,
+ "Set bits: %8.8X actual %8.8X register %X\n", value,
+ register_value, bit_reg_info->parent_register));
+ return_ACPI_STATUS(status);
+}
+
/******************************************************************************
*
* FUNCTION: acpi_hw_register_read
@@ -79,7 +314,7 @@ acpi_hw_register_read(u32 register_id, u
status =
acpi_hw_low_level_read(16, &value1,
- &acpi_sinfo.pm1a_evt_blk);
+ &acpi_gbl_FADT.xpm1a_event_block);
if (ACPI_FAILURE(status)) {
goto exit;
}
@@ -88,28 +323,62 @@ acpi_hw_register_read(u32 register_id, u
status =
acpi_hw_low_level_read(16, &value2,
- &acpi_sinfo.pm1b_evt_blk);
+ &acpi_gbl_FADT.xpm1b_event_block);
value1 |= value2;
break;
+ case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access */
+
+ status =
+ acpi_hw_low_level_read(16, &value1, &acpi_gbl_xpm1a_enable);
+ if (ACPI_FAILURE(status)) {
+ goto exit;
+ }
+
+ /* PM1B is optional */
+
+ status =
+ acpi_hw_low_level_read(16, &value2, &acpi_gbl_xpm1b_enable);
+ value1 |= value2;
+ break;
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
status =
acpi_hw_low_level_read(16, &value1,
- &acpi_sinfo.pm1a_cnt_blk);
+ &acpi_gbl_FADT.xpm1a_control_block);
if (ACPI_FAILURE(status)) {
goto exit;
}
status =
acpi_hw_low_level_read(16, &value2,
- &acpi_sinfo.pm1b_cnt_blk);
+ &acpi_gbl_FADT.xpm1b_control_block);
value1 |= value2;
break;
+ case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
+
+ status =
+ acpi_hw_low_level_read(8, &value1,
+ &acpi_gbl_FADT.xpm2_control_block);
+ break;
+
+ case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
+
+ status =
+ acpi_hw_low_level_read(32, &value1,
+ &acpi_gbl_FADT.xpm_timer_block);
+ break;
+
+ case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
+
+ status =
+ acpi_os_read_port(acpi_gbl_FADT.smi_command, &value1, 8);
+ break;
default:
+ ACPI_DEBUG_PRINT((AE_INFO, "Unknown Register ID: %X",
register_id));
status = AE_BAD_PARAMETER;
break;
}
@@ -127,7 +396,7 @@ acpi_hw_register_read(u32 register_id, u
*
* FUNCTION: acpi_hw_register_write
*
- * PARAMETERS: register_id - ACPI Register ID
+ * PARAMETERS: register_id - ACPI Register ID
* Value - The value to write
*
* RETURN: Status
@@ -156,7 +425,7 @@ acpi_status acpi_hw_register_write(u32 r
ACPI_FUNCTION_TRACE(hw_register_write);
- switch (register_id) { //By now we just need handle PM1 status/PM1
control
+ switch (register_id) {
case ACPI_REGISTER_PM1_STATUS: /* 16-bit access */
/* Perform a read first to preserve certain bits (per ACPI
spec) */
@@ -176,7 +445,7 @@ acpi_status acpi_hw_register_write(u32 r
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1a_evt_blk);
+ &acpi_gbl_FADT.xpm1a_event_block);
if (ACPI_FAILURE(status)) {
goto exit;
}
@@ -185,16 +454,27 @@ acpi_status acpi_hw_register_write(u32 r
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1b_evt_blk);
- break;
-
+ &acpi_gbl_FADT.xpm1b_event_block);
+ break;
+
+ case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access */
+
+ status =
+ acpi_hw_low_level_write(16, value, &acpi_gbl_xpm1a_enable);
+ if (ACPI_FAILURE(status)) {
+ goto exit;
+ }
+
+ /* PM1B is optional */
+
+ status =
+ acpi_hw_low_level_write(16, value, &acpi_gbl_xpm1b_enable);
+ break;
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
/*
* Perform a read first to preserve certain bits (per ACPI spec)
- *
- * Note: This includes SCI_EN, we never want to change this bit
*/
status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
&read_value);
@@ -211,30 +491,51 @@ acpi_status acpi_hw_register_write(u32 r
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1a_cnt_blk);
+ &acpi_gbl_FADT.xpm1a_control_block);
if (ACPI_FAILURE(status)) {
goto exit;
}
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1b_cnt_blk);
+ &acpi_gbl_FADT.xpm1b_control_block);
break;
case ACPI_REGISTER_PM1A_CONTROL: /* 16-bit access */
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1a_cnt_blk);
+ &acpi_gbl_FADT.xpm1a_control_block);
break;
case ACPI_REGISTER_PM1B_CONTROL: /* 16-bit access */
status =
acpi_hw_low_level_write(16, value,
- &acpi_sinfo.pm1b_cnt_blk);
- break;
-
+ &acpi_gbl_FADT.xpm1b_control_block);
+ break;
+
+ case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
+
+ status =
+ acpi_hw_low_level_write(8, value,
+ &acpi_gbl_FADT.xpm2_control_block);
+ break;
+
+ case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
+
+ status =
+ acpi_hw_low_level_write(32, value,
+ &acpi_gbl_FADT.xpm_timer_block);
+ break;
+
+ case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
+
+ /* SMI_CMD is currently always in IO space */
+
+ status =
+ acpi_os_write_port(acpi_gbl_FADT.smi_command, value, 8);
+ break;
default:
status = AE_BAD_PARAMETER;
@@ -242,7 +543,6 @@ acpi_status acpi_hw_register_write(u32 r
}
exit:
-
return_ACPI_STATUS(status);
}
@@ -383,3 +683,4 @@ acpi_hw_low_level_write(u32 width, u32 v
return (status);
}
+
diff -r 74cae5c11f0a -r 93bc6d9b5f31 xen/drivers/acpi/utglobal.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/drivers/acpi/utglobal.c Thu May 01 10:41:51 2008 +0100
@@ -0,0 +1,136 @@
+/******************************************************************************
+ *
+ * Module Name: utglobal - Global variables for the ACPI subsystem
+ *
+ *****************************************************************************/
+
+/*
+ * Copyright (C) 2000 - 2007, R. Byron Moore
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon
+ * including a substantially similar Disclaimer requirement for further
+ * binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ * of any contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGES.
+ */
+
+//#define DEFINE_ACPI_GLOBALS
+
+#include <acpi/acpi.h>
+//#include <acpi/acnamesp.h>
+
+#define _COMPONENT ACPI_UTILITIES
+ ACPI_MODULE_NAME("utglobal")
+
+struct acpi_table_fadt acpi_gbl_FADT;
+
+/* These addresses are calculated from FADT address values */
+
+struct acpi_generic_address acpi_gbl_xpm1a_enable;
+struct acpi_generic_address acpi_gbl_xpm1b_enable;
+
+/******************************************************************************
+ *
+ * Event and Hardware globals
+ *
+
******************************************************************************/
+
+struct acpi_bit_register_info acpi_gbl_bit_register_info[ACPI_NUM_BITREG] = {
+ /* Name Parent Register
Register Bit Position Register Bit Mask */
+
+ /* ACPI_BITREG_TIMER_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+ ACPI_BITPOSITION_TIMER_STATUS,
+ ACPI_BITMASK_TIMER_STATUS},
+ /* ACPI_BITREG_BUS_MASTER_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_BUS_MASTER_STATUS,
+ ACPI_BITMASK_BUS_MASTER_STATUS},
+ /* ACPI_BITREG_GLOBAL_LOCK_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_GLOBAL_LOCK_STATUS,
+
ACPI_BITMASK_GLOBAL_LOCK_STATUS},
+ /* ACPI_BITREG_POWER_BUTTON_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_POWER_BUTTON_STATUS,
+
ACPI_BITMASK_POWER_BUTTON_STATUS},
+ /* ACPI_BITREG_SLEEP_BUTTON_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_SLEEP_BUTTON_STATUS,
+
ACPI_BITMASK_SLEEP_BUTTON_STATUS},
+ /* ACPI_BITREG_RT_CLOCK_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_RT_CLOCK_STATUS,
+ ACPI_BITMASK_RT_CLOCK_STATUS},
+ /* ACPI_BITREG_WAKE_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+ ACPI_BITPOSITION_WAKE_STATUS,
+ ACPI_BITMASK_WAKE_STATUS},
+ /* ACPI_BITREG_PCIEXP_WAKE_STATUS */ {ACPI_REGISTER_PM1_STATUS,
+
ACPI_BITPOSITION_PCIEXP_WAKE_STATUS,
+
ACPI_BITMASK_PCIEXP_WAKE_STATUS},
+
+ /* ACPI_BITREG_TIMER_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
+ ACPI_BITPOSITION_TIMER_ENABLE,
+ ACPI_BITMASK_TIMER_ENABLE},
+ /* ACPI_BITREG_GLOBAL_LOCK_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
+
ACPI_BITPOSITION_GLOBAL_LOCK_ENABLE,
+
ACPI_BITMASK_GLOBAL_LOCK_ENABLE},
+ /* ACPI_BITREG_POWER_BUTTON_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
+
ACPI_BITPOSITION_POWER_BUTTON_ENABLE,
+
ACPI_BITMASK_POWER_BUTTON_ENABLE},
+ /* ACPI_BITREG_SLEEP_BUTTON_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
+
ACPI_BITPOSITION_SLEEP_BUTTON_ENABLE,
+
ACPI_BITMASK_SLEEP_BUTTON_ENABLE},
+ /* ACPI_BITREG_RT_CLOCK_ENABLE */ {ACPI_REGISTER_PM1_ENABLE,
+
ACPI_BITPOSITION_RT_CLOCK_ENABLE,
+ ACPI_BITMASK_RT_CLOCK_ENABLE},
+ /* ACPI_BITREG_WAKE_ENABLE */ {ACPI_REGISTER_PM1_ENABLE, 0, 0},
+ /* ACPI_BITREG_PCIEXP_WAKE_DISABLE */ {ACPI_REGISTER_PM1_ENABLE,
+
ACPI_BITPOSITION_PCIEXP_WAKE_DISABLE,
+
ACPI_BITMASK_PCIEXP_WAKE_DISABLE},
+
+ /* ACPI_BITREG_SCI_ENABLE */ {ACPI_REGISTER_PM1_CONTROL,
+ ACPI_BITPOSITION_SCI_ENABLE,
+ ACPI_BITMASK_SCI_ENABLE},
+ /* ACPI_BITREG_BUS_MASTER_RLD */ {ACPI_REGISTER_PM1_CONTROL,
+ ACPI_BITPOSITION_BUS_MASTER_RLD,
+ ACPI_BITMASK_BUS_MASTER_RLD},
+ /* ACPI_BITREG_GLOBAL_LOCK_RELEASE */ {ACPI_REGISTER_PM1_CONTROL,
+
ACPI_BITPOSITION_GLOBAL_LOCK_RELEASE,
+
ACPI_BITMASK_GLOBAL_LOCK_RELEASE},
+ /* ACPI_BITREG_SLEEP_TYPE_A */ {ACPI_REGISTER_PM1_CONTROL,
+ ACPI_BITPOSITION_SLEEP_TYPE_X,
+ ACPI_BITMASK_SLEEP_TYPE_X},
+ /* ACPI_BITREG_SLEEP_TYPE_B */ {ACPI_REGISTER_PM1_CONTROL,
+ ACPI_BITPOSITION_SLEEP_TYPE_X,
+ ACPI_BITMASK_SLEEP_TYPE_X},
+ /* ACPI_BITREG_SLEEP_ENABLE */ {ACPI_REGISTER_PM1_CONTROL,
+ ACPI_BITPOSITION_SLEEP_ENABLE,
+ ACPI_BITMASK_SLEEP_ENABLE},
+
+ /* ACPI_BITREG_ARB_DIS */ {ACPI_REGISTER_PM2_CONTROL,
+ ACPI_BITPOSITION_ARB_DISABLE,
+ ACPI_BITMASK_ARB_DISABLE}
+};
+
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