[Xen-changelog] [xen-unstable] Enable Px/Cx related CPUID/MSR bits for dom0 to get correct Px/Cx info.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1209978966 -3600
# Node ID 0eb471aa24dcaf14f309a985f44c075092fd3c8b
# Parent  dab1301bc7229b5ca82a570e72ad02bfb3353dcd
Enable Px/Cx related CPUID/MSR bits for dom0 to get correct Px/Cx info.

Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
---
 xen/arch/x86/traps.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff -r dab1301bc722 -r 0eb471aa24dc xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Mon May 05 10:13:17 2008 +0100
+++ b/xen/arch/x86/traps.c      Mon May 05 10:16:06 2008 +0100
@@ -713,11 +713,13 @@ static int emulate_forced_invalid_op(str
         __clear_bit(X86_FEATURE_PBE, &d);
 
         __clear_bit(X86_FEATURE_DTES64 % 32, &c);
-        __clear_bit(X86_FEATURE_MWAIT % 32, &c);
+        if ( !IS_PRIV(current->domain) )
+            __clear_bit(X86_FEATURE_MWAIT % 32, &c);
         __clear_bit(X86_FEATURE_DSCPL % 32, &c);
         __clear_bit(X86_FEATURE_VMXE % 32, &c);
         __clear_bit(X86_FEATURE_SMXE % 32, &c);
-        __clear_bit(X86_FEATURE_EST % 32, &c);
+        if ( !IS_PRIV(current->domain) )
+            __clear_bit(X86_FEATURE_EST % 32, &c);
         __clear_bit(X86_FEATURE_TM2 % 32, &c);
         if ( is_pv_32bit_vcpu(current) )
             __clear_bit(X86_FEATURE_CX16 % 32, &c);
@@ -2146,8 +2148,9 @@ static int emulate_privileged_op(struct 
         case MSR_IA32_MISC_ENABLE:
             if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
                 goto fail;
-            regs->eax &= ~(MSR_IA32_MISC_ENABLE_PERF_AVAIL |
-                           MSR_IA32_MISC_ENABLE_MONITOR_ENABLE);
+            regs->eax &= ~MSR_IA32_MISC_ENABLE_PERF_AVAIL;
+            if ( !IS_PRIV(current->domain) )
+                regs->eax &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENABLE;
             regs->eax |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL |
                          MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
                          MSR_IA32_MISC_ENABLE_XTPR_DISABLE;

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