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[Xen-changelog] [xen-unstable] x86: Make MSI-X work with 64-bit BARs



# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1210770773 -3600
# Node ID 86587698116d742ff257e64ddfd230157fcee42c
# Parent  c9ec94410137d9509a6ea8329e9c0a1f22a4378b
x86: Make MSI-X work with 64-bit BARs

The code for working out the base address of a 64-bit BAR currently
puts the two halves together in the wrong order and leaves the type
bits in the resulting value.   It also treats
PCI_BASE_ADDRESS_MEM_TYPE_64 as a flag rather than an enumeration
value.

Signed-off-by: Neil Turton <nturton@xxxxxxxxxxxxxx>
---
 xen/arch/x86/msi.c |   17 ++++++++++-------
 1 files changed, 10 insertions(+), 7 deletions(-)

diff -r c9ec94410137 -r 86587698116d xen/arch/x86/msi.c
--- a/xen/arch/x86/msi.c        Wed May 14 13:55:26 2008 +0100
+++ b/xen/arch/x86/msi.c        Wed May 14 14:12:53 2008 +0100
@@ -521,17 +521,20 @@ static u64 pci_resource_start(struct pci
 static u64 pci_resource_start(struct pci_dev *dev, u8 bar_index)
 {
     u64 bar_base;
+    u32 reg_val;
     u8 bus = dev->bus;
     u8 slot = PCI_SLOT(dev->devfn);
     u8 func = PCI_FUNC(dev->devfn);
 
-    bar_base = pci_conf_read32(bus, slot, func,
-                               PCI_BASE_ADDRESS_0 + 4 * bar_index);
-    if ( bar_base & PCI_BASE_ADDRESS_MEM_TYPE_64 )
-    {
-        bar_base <<= 32;
-        bar_base += pci_conf_read32(bus, slot, func,
-                               PCI_BASE_ADDRESS_0 + 4 * (bar_index + 1));
+    reg_val = pci_conf_read32(bus, slot, func,
+                              PCI_BASE_ADDRESS_0 + 4 * bar_index);
+    bar_base = reg_val & PCI_BASE_ADDRESS_MEM_MASK;
+    if ( ( reg_val & PCI_BASE_ADDRESS_MEM_TYPE_MASK ) ==
+         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+    {
+        reg_val = pci_conf_read32(bus, slot, func,
+                                  PCI_BASE_ADDRESS_0 + 4 * (bar_index + 1));
+        bar_base |= ((u64)reg_val) << 32;
     }
 
     return bar_base;

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