[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-changelog] [xen-unstable] [IA64] Add head files and helper functions for VTD/ia64



# HG changeset patch
# User Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
# Date 1224663615 -32400
# Node ID 02c8733e2d91557a98b6964bfb7e136f0e3924d4
# Parent  d9b70fc0ee0f7be6a36f4b80ab871ee4bd09fee6
[IA64] Add head files and helper functions for VTD/ia64

Add head files and helper functions for VTD/ia64.

Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
 xen/arch/ia64/vmx/viosapic.c                 |    4 -
 xen/arch/ia64/vmx/vmx_interrupt.c            |   42 ++++++++++
 xen/arch/ia64/xen/domain.c                   |    1 
 xen/arch/ia64/xen/mm.c                       |   12 ---
 xen/arch/ia64/xen/xensetup.c                 |   12 +++
 xen/include/asm-ia64/domain.h                |    3 
 xen/include/asm-ia64/hvm/iommu.h             |   35 ++++++++
 xen/include/asm-ia64/hvm/irq.h               |  106 +++++++++++++++++++++++++++
 xen/include/asm-ia64/linux-xen/asm/iosapic.h |    3 
 xen/include/asm-ia64/linux/asm/hw_irq.h      |    7 -
 xen/include/asm-ia64/vmx_platform.h          |    5 +
 11 files changed, 207 insertions(+), 23 deletions(-)

diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/arch/ia64/vmx/viosapic.c
--- a/xen/arch/ia64/vmx/viosapic.c      Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/arch/ia64/vmx/viosapic.c      Wed Oct 22 17:20:15 2008 +0900
@@ -315,10 +315,6 @@ out:
     spin_unlock(&viosapic->lock);
 }
 
-#define hvm_pci_intx_gsi(dev, intx)  \
-    (((((dev) << 2) + ((dev) >> 3) + (intx)) & 31) + 16)
-        
-
 void viosapic_set_pci_irq(struct domain *d, int device, int intx, int level)
 {
     int irq;
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/arch/ia64/vmx/vmx_interrupt.c
--- a/xen/arch/ia64/vmx/vmx_interrupt.c Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/arch/ia64/vmx/vmx_interrupt.c Wed Oct 22 17:20:15 2008 +0900
@@ -112,3 +112,45 @@ inject_guest_interruption(VCPU *vcpu, u6
     debugger_event(vec == IA64_EXTINT_VECTOR ?
                    XEN_IA64_DEBUG_ON_EXTINT : XEN_IA64_DEBUG_ON_EXCEPT);
 }
+
+void hvm_pci_intx_assert(
+        struct domain *d, unsigned int device, unsigned int intx)
+{
+    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
+    unsigned int gsi;
+
+    ASSERT((device <= 31) && (intx <= 3));
+
+    if ( __test_and_set_bit(device * 4 + intx, &hvm_irq->pci_intx.i) )
+        return;
+    gsi = hvm_pci_intx_gsi(device, intx);
+    if ( ++hvm_irq->gsi_assert_count[gsi] == 1 )
+        viosapic_set_irq(d, gsi, 1);
+}
+
+void hvm_pci_intx_deassert(
+        struct domain *d, unsigned int device, unsigned int intx)
+{
+    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
+    unsigned int gsi;
+
+    ASSERT((device <= 31) && (intx <= 3));
+
+    if ( !__test_and_clear_bit(device * 4 + intx, &hvm_irq->pci_intx.i) )
+        return;
+
+    gsi = hvm_pci_intx_gsi(device, intx);
+
+    if (--hvm_irq->gsi_assert_count[gsi] == 0)
+        viosapic_set_irq(d, gsi, 0);
+}
+
+void hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq)
+{
+    /* dummy */
+}
+
+void hvm_isa_irq_deassert(struct domain *d, unsigned int isa_irq)
+{
+    /* dummy */
+}
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/arch/ia64/xen/domain.c
--- a/xen/arch/ia64/xen/domain.c        Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/arch/ia64/xen/domain.c        Wed Oct 22 17:20:15 2008 +0900
@@ -569,6 +569,7 @@ int arch_domain_create(struct domain *d,
        if (is_idle_domain(d))
            return 0;
 
+       INIT_LIST_HEAD(&d->arch.pdev_list);
        foreign_p2m_init(d);
 #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT
        d->arch.has_pervcpu_vhpt = opt_pervcpu_vhpt;
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/arch/ia64/xen/mm.c
--- a/xen/arch/ia64/xen/mm.c    Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/arch/ia64/xen/mm.c    Wed Oct 22 17:20:15 2008 +0900
@@ -3445,18 +3445,6 @@ void xencomm_mark_dirty(unsigned long ad
     __xencomm_mark_dirty(current->domain, addr, len);
 }
 
-int iommu_map_page(struct domain *d, unsigned long gfn, unsigned long mfn)
-{
-    /* STUB to compile */
-    return -ENOSYS;
-}
-
-int iommu_unmap_page(struct domain *d, unsigned long gfn)
-{
-    /* STUB to compile */
-    return -ENOSYS;
-}
-
 /*
  * Local variables:
  * mode: C
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/arch/ia64/xen/xensetup.c
--- a/xen/arch/ia64/xen/xensetup.c      Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/arch/ia64/xen/xensetup.c      Wed Oct 22 17:20:15 2008 +0900
@@ -740,3 +740,15 @@ void arch_get_xen_caps(xen_capabilities_
     }
 }
 
+int xen_in_range(paddr_t start, paddr_t end)
+{
+    start = max_t(paddr_t, start, xen_pstart);
+    end = min_t(paddr_t, end, xen_pstart + XENHEAP_DEFAULT_SIZE);
+
+    return start < end;
+}
+
+int tboot_in_range(paddr_t start, paddr_t end)
+{
+    return 0;
+}
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/include/asm-ia64/domain.h
--- a/xen/include/asm-ia64/domain.h     Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/include/asm-ia64/domain.h     Wed Oct 22 17:20:15 2008 +0900
@@ -42,6 +42,8 @@ extern int shadow_mode_control(struct do
 /* Cleanly crash the current domain with a message.  */
 extern void panic_domain(struct pt_regs *, const char *, ...)
      __attribute__ ((noreturn, format (printf, 2, 3)));
+
+#define has_arch_pdevs(d)    (!list_empty(&(d)->arch.pdev_list))
 
 struct mm_struct {
        volatile pgd_t * pgd;
@@ -166,6 +168,7 @@ struct arch_domain {
     unsigned char rid_bits;            /* number of virtual rid bits (default: 
18) */
     int breakimm;               /* The imm value for hypercalls.  */
 
+    struct list_head pdev_list;
     struct virtual_platform_def     vmx_platform;
 #define        hvm_domain vmx_platform /* platform defs are not vmx specific */
 
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/include/asm-ia64/hvm/iommu.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/include/asm-ia64/hvm/iommu.h  Wed Oct 22 17:20:15 2008 +0900
@@ -0,0 +1,35 @@
+#ifndef __ASM_IA64_HVM_IOMMU_H__
+#define __ASM_IA64_HVM_IOMMU_H__
+
+#include <asm/hvm/irq.h>
+#include <public/event_channel.h>
+#include <public/arch-ia64/hvm/save.h>
+#include <asm/linux-xen/asm/iosapic.h>
+
+struct iommu_ops;
+extern struct iommu_ops intel_iommu_ops;
+extern int intel_vtd_setup(void);
+
+#define iommu_get_ops() (&intel_iommu_ops)
+#define iommu_hardware_setup()  (intel_vtd_setup())
+
+static inline int domain_irq_to_vector(struct domain *d, int irq)
+{
+    return irq;
+}
+
+static inline void ack_APIC_irq(void)
+{
+    /* TODO */
+}
+
+static inline void pci_cleanup_msi(struct pci_dev *pdev)
+{
+    /* TODO */
+}
+
+#define AUTO_ASSIGN         -1
+
+extern int assign_irq_vector (int irq);
+
+#endif /* __ASM_IA64_HVM_IOMMU_H__ */
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/include/asm-ia64/hvm/irq.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/include/asm-ia64/hvm/irq.h    Wed Oct 22 17:20:15 2008 +0900
@@ -0,0 +1,106 @@
+/******************************************************************************
+ * irq.h
+ *
+ * Interrupt distribution and delivery logic.
+ *
+ * Copyright (c) 2006, K A Fraser, XenSource Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#ifndef __ASM_IA64_HVM_IRQ_H__
+#define __ASM_IA64_HVM_IRQ_H__
+
+#include <xen/irq.h>
+
+#define NR_VECTORS 256
+#define VIOAPIC_NUM_PINS  48
+#define NR_PIRQS   256
+
+#include <xen/hvm/irq.h>
+
+struct hvm_hw_pci_irqs {
+    /*
+     * Virtual interrupt wires for a single PCI bus.
+     * Indexed by: device*4 + INTx#.
+     */
+    union {
+        DECLARE_BITMAP(i, 32*4);
+        uint64_t pad[2];
+    };
+};
+
+struct hvm_irq {
+    /*
+     * Virtual interrupt wires for a single PCI bus.
+     * Indexed by: device*4 + INTx#.
+     */
+    struct hvm_hw_pci_irqs pci_intx;
+
+    /* Virtual interrupt and via-link for paravirtual platform driver. */
+    uint32_t callback_via_asserted;
+    union {
+        enum {
+            HVMIRQ_callback_none,
+            HVMIRQ_callback_gsi,
+            HVMIRQ_callback_pci_intx
+        } callback_via_type;
+    };
+    union {
+        uint32_t gsi;
+        struct { uint8_t dev, intx; } pci;
+    } callback_via;
+
+    /*
+     * Number of wires asserting each GSI.
+     *
+     * GSIs 0-15 are the ISA IRQs. ISA devices map directly into this space
+     * except ISA IRQ 0, which is connected to GSI 2.
+     * PCI links map into this space via the PCI-ISA bridge.
+     *
+     * GSIs 16+ are used only be PCI devices. The mapping from PCI device to
+     * GSI is as follows: ((device*4 + device/8 + INTx#) & 31) + 16
+     */
+    u8 gsi_assert_count[VIOAPIC_NUM_PINS];
+
+    /*
+     * GSIs map onto PIC/IO-APIC in the usual way:
+     *  0-7:  Master 8259 PIC, IO-APIC pins 0-7
+     *  8-15: Slave  8259 PIC, IO-APIC pins 8-15
+     *  16+ : IO-APIC pins 16+
+     */
+
+    /* Last VCPU that was delivered a LowestPrio interrupt. */
+    u8 round_robin_prev_vcpu;
+
+    struct hvm_irq_dpci *dpci;
+};
+
+#define hvm_pci_intx_gsi(dev, intx)  \
+    (((((dev)<<2) + ((dev)>>3) + (intx)) & 31) + 16)
+#define hvm_pci_intx_link(dev, intx) \
+    (((dev) + (intx)) & 3)
+
+/* Extract the IA-64 vector that corresponds to IRQ.  */
+static inline int
+irq_to_vector (int irq)
+{
+    return irq;
+}
+
+
+extern u8 irq_vector[NR_IRQ_VECTORS];
+extern int vector_irq[NR_VECTORS];
+
+#endif /* __ASM_IA64_HVM_IRQ_H__ */
diff -r d9b70fc0ee0f -r 02c8733e2d91 
xen/include/asm-ia64/linux-xen/asm/iosapic.h
--- a/xen/include/asm-ia64/linux-xen/asm/iosapic.h      Wed Oct 22 12:41:52 
2008 +0900
+++ b/xen/include/asm-ia64/linux-xen/asm/iosapic.h      Wed Oct 22 17:20:15 
2008 +0900
@@ -175,5 +175,8 @@ extern unsigned long ia64_xen_vector[];
 extern unsigned long ia64_xen_vector[];
 #endif /* XEN */
 
+#define IO_APIC_BASE(idx) ((unsigned int *)iosapic_lists[idx].addr)
+#define IO_APIC_ID(idx)   (iosapic_lists[idx].id)
+
 # endif /* !__ASSEMBLY__ */
 #endif /* __ASM_IA64_IOSAPIC_H */
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/include/asm-ia64/linux/asm/hw_irq.h
--- a/xen/include/asm-ia64/linux/asm/hw_irq.h   Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/include/asm-ia64/linux/asm/hw_irq.h   Wed Oct 22 17:20:15 2008 +0900
@@ -124,13 +124,6 @@ irq_descp (int irq)
        return irq_desc + irq;
 }
 
-/* Extract the IA-64 vector that corresponds to IRQ.  */
-static inline ia64_vector
-irq_to_vector (int irq)
-{
-       return (ia64_vector) irq;
-}
-
 /*
  * Convert the local IA-64 vector to the corresponding irq number.  This 
translation is
  * done in the context of the interrupt domain that the currently executing 
CPU belongs
diff -r d9b70fc0ee0f -r 02c8733e2d91 xen/include/asm-ia64/vmx_platform.h
--- a/xen/include/asm-ia64/vmx_platform.h       Wed Oct 22 12:41:52 2008 +0900
+++ b/xen/include/asm-ia64/vmx_platform.h       Wed Oct 22 17:20:15 2008 +0900
@@ -21,8 +21,10 @@
 
 #include <public/xen.h>
 #include <public/hvm/params.h>
+#include <asm/hvm/irq.h>
 #include <asm/viosapic.h>
 #include <asm/hvm/vacpi.h>
+#include <xen/hvm/iommu.h>
 
 struct vmx_ioreq_page {
     spinlock_t          lock;
@@ -41,6 +43,9 @@ typedef struct virtual_platform_def {
     /* One IOSAPIC now... */
     struct viosapic             viosapic;
     struct vacpi                vacpi;
+    /* Pass-throgh VT-d */
+    struct hvm_irq              irq;
+    struct hvm_iommu            hvm_iommu;
 } vir_plat_t;
 
 static inline int __fls(uint32_t word)

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.