[Xen-changelog] [xen-unstable] [SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1236930311 0
# Node ID 4fd39881f9f185b49cd1e007b550b9ccab10d139
# Parent  0f7e2ba5d0e62022f0d59b0e098ab9b0747ce1f4
[SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration

Signed-off-by: Christoph Egger <Christoph.Egger@xxxxxxx>
---
 xen/arch/x86/hvm/hvm.c |    9 +++++++++
 1 files changed, 9 insertions(+)

diff -r 0f7e2ba5d0e6 -r 4fd39881f9f1 xen/arch/x86/hvm/hvm.c
--- a/xen/arch/x86/hvm/hvm.c    Fri Mar 13 07:43:45 2009 +0000
+++ b/xen/arch/x86/hvm/hvm.c    Fri Mar 13 07:45:11 2009 +0000
@@ -1776,6 +1776,15 @@ int hvm_msr_read_intercept(struct cpu_us
         msr_content = var_range_base[index];
         break;
 
+    case MSR_K8_ENABLE_C1E:
+         /* There's no point in letting the guest see C-States.
+          * Further, this AMD-only register may be accessed if this HVM guest
+          * has been migrated to an Intel host. This fixes a guest crash
+          * in this case.
+          */
+         msr_content = 0;
+         break;
+
     default:
         return hvm_funcs.msr_read_intercept(regs);
     }

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