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[Xen-changelog] [xen-unstable] i386: eliminate unsupported CPUs' MCA handling code



# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1247664934 -3600
# Node ID 855d0f17e36444ea07da8133884d50d67624dfa7
# Parent  91407452cdb62f427c74e227956dc34a107cab46
i386: eliminate unsupported CPUs' MCA handling code

Neither Intel P5 nor Winchip are supported by Xen (due to
-march=i686 being passed to the compiler), so there is no point in
having code for handling their (rudimentary) MCA capabilities.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
 xen/arch/x86/cpu/mcheck/p5.c      |   50 --------------------------------------
 xen/arch/x86/cpu/mcheck/winchip.c |   39 -----------------------------
 xen/arch/x86/cpu/mcheck/Makefile  |    2 -
 xen/arch/x86/cpu/mcheck/mce.c     |   14 ----------
 xen/arch/x86/cpu/mcheck/mce.h     |    2 -
 5 files changed, 107 deletions(-)

diff -r 91407452cdb6 -r 855d0f17e364 xen/arch/x86/cpu/mcheck/Makefile
--- a/xen/arch/x86/cpu/mcheck/Makefile  Wed Jul 15 13:15:50 2009 +0100
+++ b/xen/arch/x86/cpu/mcheck/Makefile  Wed Jul 15 14:35:34 2009 +0100
@@ -6,5 +6,3 @@ obj-y += mce.o
 obj-y += mce.o
 obj-y += mce_intel.o
 obj-y += non-fatal.o
-obj-$(x86_32) += p5.o
-obj-$(x86_32) += winchip.o
diff -r 91407452cdb6 -r 855d0f17e364 xen/arch/x86/cpu/mcheck/mce.c
--- a/xen/arch/x86/cpu/mcheck/mce.c     Wed Jul 15 13:15:50 2009 +0100
+++ b/xen/arch/x86/cpu/mcheck/mce.c     Wed Jul 15 14:35:34 2009 +0100
@@ -616,26 +616,12 @@ void mcheck_init(struct cpuinfo_x86 *c)
 
        case X86_VENDOR_INTEL:
                switch (c->x86) {
-               case 5:
-#ifndef CONFIG_X86_64
-                       inited = intel_p5_mcheck_init(c);
-#endif
-                       break;
-
                case 6:
                case 15:
                        inited = intel_mcheck_init(c);
                        break;
                }
                break;
-
-#ifndef CONFIG_X86_64
-       case X86_VENDOR_CENTAUR:
-               if (c->x86==5) {
-                       inited = winchip_mcheck_init(c);
-               }
-               break;
-#endif
 
        default:
                break;
diff -r 91407452cdb6 -r 855d0f17e364 xen/arch/x86/cpu/mcheck/mce.h
--- a/xen/arch/x86/cpu/mcheck/mce.h     Wed Jul 15 13:15:50 2009 +0100
+++ b/xen/arch/x86/cpu/mcheck/mce.h     Wed Jul 15 14:35:34 2009 +0100
@@ -17,8 +17,6 @@ int amd_k8_mcheck_init(struct cpuinfo_x8
 int amd_k8_mcheck_init(struct cpuinfo_x86 *c);
 int amd_f10_mcheck_init(struct cpuinfo_x86 *c);
 
-int intel_p5_mcheck_init(struct cpuinfo_x86 *c);
-int winchip_mcheck_init(struct cpuinfo_x86 *c);
 int intel_mcheck_init(struct cpuinfo_x86 *c);
 
 void intel_mcheck_timer(struct cpuinfo_x86 *c);
diff -r 91407452cdb6 -r 855d0f17e364 xen/arch/x86/cpu/mcheck/p5.c
--- a/xen/arch/x86/cpu/mcheck/p5.c      Wed Jul 15 13:15:50 2009 +0100
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,50 +0,0 @@
-/*
- * P5 specific Machine Check Exception Reporting
- * (C) Copyright 2002 Alan Cox <alan@xxxxxxxxxx>
- */
-
-#include <xen/init.h>
-#include <xen/types.h>
-#include <xen/kernel.h>
-#include <xen/smp.h>
-
-#include <asm/processor.h> 
-#include <asm/system.h>
-#include <asm/msr.h>
-
-#include "mce.h"
-#include "x86_mca.h"
-
-/* Machine check handler for Pentium class Intel */
-static void pentium_machine_check(struct cpu_user_regs * regs, long error_code)
-{
-       u32 loaddr, hi, lotype;
-       rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
-       rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi);
-       printk(KERN_EMERG "CPU#%d: Machine Check Exception:  0x%8X (type 
0x%8X).\n", smp_processor_id(), loaddr, lotype);
-       if(lotype&(1<<5))
-               printk(KERN_EMERG "CPU#%d: Possible thermal failure (CPU on 
fire ?).\n", smp_processor_id());
-       add_taint(TAINT_MACHINE_CHECK);
-}
-
-/* Set up machine check reporting for processors with Intel style MCE */
-int intel_p5_mcheck_init(struct cpuinfo_x86 *c)
-{
-       u32 l, h;
-       
-       /* Default P5 to off as its often misconnected */
-       if(mce_disabled != -1)
-               return 0;
-       x86_mce_vector_register(pentium_machine_check);
-
-       /* Read registers before enabling */
-       rdmsr(MSR_IA32_P5_MC_ADDR, l, h);
-       rdmsr(MSR_IA32_P5_MC_TYPE, l, h);
-       printk(KERN_INFO "Intel old style machine check architecture 
supported.\n");
-
-       /* Enable MCE */
-       set_in_cr4(X86_CR4_MCE);
-       printk(KERN_INFO "Intel old style machine check reporting enabled on 
CPU#%d.\n", smp_processor_id());
-
-       return 1;
-}
diff -r 91407452cdb6 -r 855d0f17e364 xen/arch/x86/cpu/mcheck/winchip.c
--- a/xen/arch/x86/cpu/mcheck/winchip.c Wed Jul 15 13:15:50 2009 +0100
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,39 +0,0 @@
-/*
- * IDT Winchip specific Machine Check Exception Reporting
- * (C) Copyright 2002 Alan Cox <alan@xxxxxxxxxx>
- */
-
-#include <xen/config.h>
-#include <xen/init.h>
-#include <xen/lib.h>
-#include <xen/types.h>
-#include <xen/kernel.h>
-
-#include <asm/processor.h> 
-#include <asm/system.h>
-#include <asm/msr.h>
-
-#include "mce.h"
-
-/* Machine check handler for WinChip C6 */
-static void winchip_machine_check(struct cpu_user_regs * regs, long error_code)
-{
-       printk(KERN_EMERG "CPU0: Machine Check Exception.\n");
-       add_taint(TAINT_MACHINE_CHECK);
-}
-
-/* Set up machine check reporting on the Winchip C6 series */
-int winchip_mcheck_init(struct cpuinfo_x86 *c)
-{
-       u32 lo, hi;
-
-       wmb();
-       x86_mce_vector_register(winchip_machine_check);
-       rdmsr(MSR_IDT_FCR1, lo, hi);
-       lo|= (1<<2);    /* Enable EIERRINT (int 18 MCE) */
-       lo&= ~(1<<4);   /* Enable MCE */
-       wrmsr(MSR_IDT_FCR1, lo, hi);
-       set_in_cr4(X86_CR4_MCE);
-       printk(KERN_INFO "Winchip machine check reporting enabled on CPU#0.\n");
-       return (1);
-}

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