[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] vt-d: Fix ioapic write order in io_apic_write_remap_rte
# HG changeset patch # User Keir Fraser <keir.fraser@xxxxxxxxxx> # Date 1281367965 -3600 # Node ID add40eb478680b6f8de7102e87fba259f721ce1d # Parent fe930e1b2ce8f205fb368d0cc86876cc54d761a9 vt-d: Fix ioapic write order in io_apic_write_remap_rte At the end of io_apic_write_remap_rte, it writes new entry (remapped interrupt) to ioapic. But it writes low 32 bits before high 32 bits, it unmasks interrupt before writing high 32 bits if 'mask' bit in low 32 bits is cleared. Thus it may result in issues. This patch fixes this issue by writing high 32 bits before low 32 bits. Signed-off-by: Jiang, Yunhong <yunhong.jiang@xxxxxxxxx> Signed-off-by: Weidong Han <weidong.han@xxxxxxxxx> --- xen/drivers/passthrough/vtd/intremap.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff -r fe930e1b2ce8 -r add40eb47868 xen/drivers/passthrough/vtd/intremap.c --- a/xen/drivers/passthrough/vtd/intremap.c Fri Aug 06 18:35:02 2010 +0100 +++ b/xen/drivers/passthrough/vtd/intremap.c Mon Aug 09 16:32:45 2010 +0100 @@ -444,10 +444,10 @@ void io_apic_write_remap_rte( } /* write new entry to ioapic */ + *IO_APIC_BASE(apic) = reg + 1; + *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1); *IO_APIC_BASE(apic) = reg; *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+0); - *IO_APIC_BASE(apic) = reg + 1; - *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1); } #if defined(__i386__) || defined(__x86_64__) _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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