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[Xen-changelog] [xen-4.0-testing] vt-d: Fix ioapic write order in io_apic_write_remap_rte



# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1281369063 -3600
# Node ID 101d44e16b72c7cabb70f3ab534391c0681f40b3
# Parent  6cd35103cadbfb40d62ee11bb46a1fcf86103e99
vt-d: Fix ioapic write order in io_apic_write_remap_rte

At the end of io_apic_write_remap_rte, it writes new entry (remapped
interrupt) to ioapic. But it writes low 32 bits before high 32 bits,
it unmasks interrupt before writing high 32 bits if 'mask' bit in low
32 bits is cleared. Thus it may result in issues. This patch fixes
this issue by writing high 32 bits before low 32 bits.

Signed-off-by: Jiang, Yunhong <yunhong.jiang@xxxxxxxxx>
Signed-off-by: Weidong Han <weidong.han@xxxxxxxxx>
xen-unstable changeset:   21933:add40eb47868
xen-unstable date:        Mon Aug 09 16:32:45 2010 +0100
---
 xen/drivers/passthrough/vtd/intremap.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff -r 6cd35103cadb -r 101d44e16b72 xen/drivers/passthrough/vtd/intremap.c
--- a/xen/drivers/passthrough/vtd/intremap.c    Mon Aug 09 16:50:37 2010 +0100
+++ b/xen/drivers/passthrough/vtd/intremap.c    Mon Aug 09 16:51:03 2010 +0100
@@ -442,10 +442,10 @@ void io_apic_write_remap_rte(
     }
 
     /* write new entry to ioapic */
+    *IO_APIC_BASE(apic) = reg + 1;
+    *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1);
     *IO_APIC_BASE(apic) = reg;
     *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+0);
-    *IO_APIC_BASE(apic) = reg + 1;
-    *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1);
 }
 
 #if defined(__i386__) || defined(__x86_64__)

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