[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] x86: set ARAT feature flag for non-buggy AMD CPUs
# HG changeset patch # User Jan Beulich <jbeulich@xxxxxxxxxx> # Date 1304241255 -3600 # Node ID 1ac7336b629840df31e5857ca0245142fb783f2a # Parent e4fc9494b940ab5c6fa21885395c5b69418f43a0 x86: set ARAT feature flag for non-buggy AMD CPUs This is the equivalent of a recent Linux change. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx> --- diff -r e4fc9494b940 -r 1ac7336b6298 xen/arch/x86/cpu/amd.c --- a/xen/arch/x86/cpu/amd.c Sun May 01 10:11:58 2011 +0100 +++ b/xen/arch/x86/cpu/amd.c Sun May 01 10:14:15 2011 +0100 @@ -474,6 +474,10 @@ } #endif + /* As a rule processors have APIC timer running in deep C states */ + if (c->x86 >= 0xf && !cpu_has_amd_erratum(c, AMD_ERRATUM_400)) + set_bit(X86_FEATURE_ARAT, c->x86_capability); + /* Prevent TSC drift in non single-processor, single-core platforms. */ if ((smp_processor_id() == 1) && c1_ramping_may_cause_clock_drift(c)) disable_c1_ramping(); diff -r e4fc9494b940 -r 1ac7336b6298 xen/include/asm-x86/amd.h --- a/xen/include/asm-x86/amd.h Sun May 01 10:11:58 2011 +0100 +++ b/xen/include/asm-x86/amd.h Sun May 01 10:14:15 2011 +0100 @@ -134,6 +134,10 @@ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf), \ AMD_MODEL_RANGE(0x12, 0x0, 0x0, 0x1, 0x0)) +#define AMD_ERRATUM_400 \ + AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), \ + AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)) + struct cpuinfo_x86; int cpu_has_amd_erratum(const struct cpuinfo_x86 *, int, ...); _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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