[Xen-changelog] [xen-unstable] x86: Hide CPUID leaf 7 from PV guests.

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir@xxxxxxx>
# Date 1307021990 -3600
# Node ID 5839e797a1307fceffcd0b9ad35ed31644378b47
# Parent  c72869c8ae02deaba538cb78efff04ace1455918
x86: Hide CPUID leaf 7 from PV guests.

Except for the whitelisted FSGSBASE feature.

Signed-off-by: Keir Fraser <keir@xxxxxxx>
---


diff -r c72869c8ae02 -r 5839e797a130 tools/libxc/xc_cpufeature.h
--- a/tools/libxc/xc_cpufeature.h       Thu Jun 02 14:34:34 2011 +0100
+++ b/tools/libxc/xc_cpufeature.h       Thu Jun 02 14:39:50 2011 +0100
@@ -141,4 +141,7 @@
 #define X86_FEATURE_TBM         (6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT     (6*32+22) /* topology extensions CPUID leafs */
 
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
+#define X86_FEATURE_FSGSBASE   (7*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */
+
 #endif /* __LIBXC_CPUFEATURE_H */
diff -r c72869c8ae02 -r 5839e797a130 tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c        Thu Jun 02 14:34:34 2011 +0100
+++ b/tools/libxc/xc_cpuid_x86.c        Thu Jun 02 14:39:50 2011 +0100
@@ -466,6 +466,14 @@
         set_bit(X86_FEATURE_HYPERVISOR, regs[2]);
         break;
 
+    case 7:
+        if ( input[1] == 0 )
+            regs[1] &= bitmaskof(X86_FEATURE_FSGSBASE);
+        else
+            regs[1] = 0;
+        regs[0] = regs[2] = regs[3] = 0;
+        break;
+
     case 0x0000000d:
         xc_cpuid_config_xsave(xch, domid, xfeature_mask, input, regs);
         break;
@@ -612,7 +620,7 @@
             input[0] = 0x80000000u;
 
         input[1] = XEN_CPUID_INPUT_UNUSED;
-        if ( (input[0] == 4) || (input[0] == 0xd) )
+        if ( (input[0] == 4) || (input[0] == 7) || (input[0] == 0xd) )
             input[1] = 0;
 
         if ( (input[0] & 0x80000000u) && (input[0] > ext_max) )
diff -r c72869c8ae02 -r 5839e797a130 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Thu Jun 02 14:34:34 2011 +0100
+++ b/xen/arch/x86/traps.c      Thu Jun 02 14:39:50 2011 +0100
@@ -813,6 +813,13 @@
            __clear_bit(X86_FEATURE_X2APIC % 32, &c);
         __set_bit(X86_FEATURE_HYPERVISOR % 32, &c);
         break;
+    case 7:
+        if ( regs->ecx == 0 )
+            b &= cpufeat_mask(X86_FEATURE_FSGSBASE);
+        else
+            b = 0;
+        a = c = d = 0;
+        break;
     case 0x80000001:
         /* Modify Feature Information. */
         if ( is_pv_32bit_vcpu(current) )

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